查询LMH6572供应商
LMH6572
Triple 2:1 High Speed Video Multiplexer
LMH6572 Triple 2:1 High Speed Video Multiplexer
August 2004
General Description
The LMH™6572 is a high performance analog mulitplexer
optimized for professional grade video and other high fidelity
high bandwidth analog applications. The LMH6572 provides
a 290MHz bandwidth at 2 V
MHz of .1 dB bandwidth and a 1500 V/µs slew rate make this
part suitable for High Definition Television (HDTV) and High
Resolution Multimedia Video applications.
The LMH6572 supports composite video applications with its
0.02% and 0.02˚ differential gain and phase errors for NTSC
and PAL video signals while driving a single, back terminated
75Ω load. The LMH6572 can deliver 80 mA linear output
current for driving multiple video load applications.
The LMH6572 has an internal gain of two for driving back
terminated transmission lines at a net gain of one.
The LMH6572 is available in the SSOP package.
output signal levels. The 140
PP
Connection Diagram
16-Pin SSOP
Features
n 350 MHz, 250 mV −3 dB bandwidth
n 290 MHz, 2 V
n 10 ns channel switching time
n 90 dB channel to channel isolation
n 0.02%, 0.02˚ diff. gain, phase
n .1 dB gain flatness to 140 MHz
n 1400 V/µs slew rate
n Wide supply voltage range: 6V (
n −78 dB HD2
n −75 dB HD3
−3 dB bandwidth
PP
@
10MHz
@
10MHz
±
Applications
n RGB video router
n Multi input video monitor
n Fault tolerant data switch
Truth Table
SEL EN OUT
0 0 CH 1
1 0 CH 0
X 1 Disable
@
5 MHz
3V) to 12V (±6V)
Top View
20109605
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
16-Pin SSOP
LMH™is a trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation DS201096 www.national.com
LMH6572MQ
LMH6572MQX 2.5 Units Tape and Reel
LH6572MQ
95 Units/Rail
MQA16
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
LMH6572
Distributors for availability and specifications.
ESD Tolerance (Note 4)
Soldering Information
Infrared or Convection (20 sec) 235˚C
Wave Soldering (10 sec) 260˚C
Operating Ratings (Note 1)
Human Body Model 2000V
Machine Model 200V
+−V−
Supply Voltage (V
I
(Note 3) 130 mA
OUT
IInput Voltage Range
) 13.2V
±
V
Maximum Junction Temperature +150˚C (Note 4)
S
Operating Temperature −40˚C to 85˚C
Supply Voltage Range 6V to 12V
Thermal Resistance
Package (θ
)(θJC)
JA
16-Pin SSOP 125˚C/W 36˚C/W
Storage Temperature Range −65˚C to +150˚C
±
5V Electrical Characteristics
VS=±5V, RL= 100Ω, Unless otherwise specified.
Symbol Parameter Conditions(Note 2) Min Typ Max Units
Frequency Domain Performance
SSBW −3 dB Bandwidth V
LSBW –3 dB Bandwidth (Note 6) V
.1 dBBW . 1 dB Bandwidth V
DG Differential Gain R
DP Differential Phase R
= 0.25 V
OUT
=2V
OUT
= 0.25 V
OUT
= 150Ω, f=4.43 MHz 0.02 %
L
= 150Ω, f=4.43 MHz 0.02 deg
L
PP
PP
PP
250 290 MHz
350 MHz
140 MHz
Time Domain Response
TRS Channel to Channel Switching Time Logic transition to 90% output 10 ns
Enable and Disable Times Logic transition to 90% or 10%
11 ns
output.
TRL Rise and Fall Time 2V Step 1.5 ns
TSS Settling Time to 0.05% 2V Step 17 ns
OS Overshoot 4V Step 5 %
SR Slew Rate(Note 6) 4V Step 1200 1400 V/µs
Distortion
HD2 2
HD3 3
IMD 3
nd
Harmonic Distortion 2 VPP, 10 MHz −78 dBc
rd
Harmonic Distortion 2 VPP, 10 MHz −75 dBc
rd
Order Intermodulation Products 10 MHz, Two tones 2Vpp at output −80 dBc
Equivalent Input Noise
VN Voltage
ICN Current
>
1 MHz, Input Referred 5 nV
>
1 MHz, Input Referred 5 pA/
Static, DC Performance
GAIN Voltage Gain (Note 5) No Load 1.9 2.0 2.1 V/V
Gain Error(Note 5) No Load, channel to channel
±
0.3
±
0.5
±
0.7
%
Gain Error R
VIO Output Offset Voltage (Note 5) V
=50Ω 0.3 %
L
±
±
14
17.5
=0V 1
IN
DVIO Average Drift 27 µV/˚C
IBN Input Bias Current (Notes 7, 5) V
= 0V −1.4
IN
±
2.8
±
3.5
DIBN Average Drift 7 nA/˚C
PSRR Power Supply Rejection Ratio
(Note 5)
www.national.com 2
DC, Input referred 50
48
54 dB
mV
µA
±
5V Electrical Characteristics (Continued)
VS=±5V, RL= 100Ω, Unless otherwise specified.
Symbol Parameter Conditions(Note 2) Min Typ Max Units
ICC Supply Current (Note 5) No Load 20 23 25
mA
28.5
Supply Current Disabled(Note 5) No Load 2.0 2.2
mA
2.3
VIH Logic High Threshold(Note 5) Select & Enable Pins 2.0 V
VIL Logic Low Threshold (Note 5) Select & Enable Pins 0.8 V
IiL Logic Pin Input Current Low(Note 7) Logic Input = 0V −1
IiH Logic Pin Input Current High(Note7)Logic Input = 2.0V 112
150 200
100
±
±
210
2.5
10
µA
µA
Miscellaneous Performance
RF Internal Feedback and Gain Set
resistor Values
RODIS Disabled Output Resistance Internal Feedback and Gain Set
resistors in series to ground.
650
620
800 940
1010
1.3 1.6 1.88
Ω
kΩ
RIN+ Input Resistance 100 kΩ
CIN Input Capacitance 0.9 pF
ROUT Output Resistance 0.26 Ω
VO Output Voltage Range No Load
VOL R
= 100Ω
L
CMIR Input Voltage Range
IO Linear Output Current (Notes 5, 7) V
= 0V, +70
IN
±
±
±
3.83
3.80
3.52
±
3.5
±
2
±
3.9 V
±
3.53 V
±
2.5 V
±
80 mA
-40
ISC Short Circuit Current VIN=±2V, Output shorted to
±
230 mA
ground
XTLK Channel to Channel Crosstalk V
XTLK Channel to Channel Crosstalk V
IN
IN
=2V
=2V
XTLK All Hostile Crosstalk In A, C. Out B, V
@
5 MHz −90 dBc
PP
@
100 MHZ −54 dBc
PP
IN
=2V
@
5
PP
−95 dBc
MHz
LMH6572
±
3.3V Electrical Characteristics
VS=±3.3V, RL= 100Ω; Unless otherwise specified.
Symbol Parameter Conditions(Note 2) Min Typ Max Units
Frequency Domain Performance
SSBW −3 dB Bandwidth V
LSBW −3 dB Bandwidth V
.1 dBBW .1 dB Bandwidth V
OUT
OUT
OUT
= 0.25 V
= 2.0 V
= 0.5 V
PP
PP
PP
360 MHz
270 MHz
80 MHz
GFP Peaking DC to 200 MHz 0.3 dB
DG Differential Gain R
DP Differential Phase R
= 150Ω, f=4.43 MHz 0.02 %
L
= 150Ω, f=4.43 MHz 0.03 deg
L
Time Domain Response
TRS Rise and Fall Time 2V Step 2.0 ns
TSS Settling Time to 0.05% 2V Step 15 ns
OS Overshoot 2V Step 5 %
SR Slew Rate 2V Step 1000 V/µs
Distortion
HD2 2
nd
Harmonic Distortion 2 VPP, 10MHz −70 dBc
www.national.com3
±
3.3V Electrical Characteristics (Continued)
VS=±3.3V, RL= 100Ω; Unless otherwise specified.
LMH6572
Symbol Parameter Conditions(Note 2) Min Typ Max Units
HD3 3
IMD 3
rd
Harmonic Distortion 2 VPP, 10MHz −74 dBc
rd
Order Intermodulation Products 10 MHz, Two tones 2Vpp at output −79 dBc
Static, DC Performance
GAIN Voltage Gain 2.0 V/V
VIO Output Offset Voltage V
=0V 1 mV
IN
DVIO Average Drift 36 µV/˚C
IBN Input Bias Current (Note 7) V
=0V 2 µA
IN
DIBN Average Drift 24 nA/˚C
PSRR Power Supply Rejection Ratio DC, Input Referred 54 dB
ICC Supply Current R
∞
=
L
20 mA
VIH Logic High Threshold Select & Enable Pins 1.3 V
VIL Logic Low Threshold Select & Enable Pins 0.4 V
Miscellaneous Performance
RIN+ Input Resistance 100 kΩ
CIN Input Capacitance 0.9 pF
ROUT Output Resistance 0.27 Ω
VO Output Voltage Range No Load
VOL R
= 100Ω
L
CMIR Input Voltage Range
IO Linear Output Current V
ISC Short Circuit Current V
=0V
IN
=±1V, Output shorted to
IN
±
2.5 V
±
2.2 V
±
1.2 V
±
60 mA
±
150 mA
ground
XTLK Channel to Channel Crosstalk 5 MHz −90 dBc
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device such that T
See Applications Section for information on temperature de-rating of this device. Min/Max ratings are based on product testing, characterization and simulation.
Individual parameters are tested as noted.
Note 3: The maximum output current (I
more details. A short circuit condition should be limited to 5 seconds or less.
Note 4: Human Body model, 1.5 kΩ in series with 100 pF. Machine model, 0Ω In series with 200 pF
Note 5: Parameters guaranteed by electrical testing at 25˚ C.
Note 6: Parameters guaranteed by design.
Note 7: Positive Value is current into device.
. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where T
J=TA
) is determined by device power dissipation limitations. See the Power Dissipation section of the Application Section for
OUT
>
TA.
J
www.national.com 4
LMH6572
Typical Performance Characteristics V
Frequency Response vs. V
Frequency Response vs. Capacitive Load
OUT
20109602 20109601
=±5V, RL= 100Ω; unless otherwise specified.
s
Frequency Response vs. V
Suggested R
vs. Capacitive Load
S
Load= 1kΩ i C
L
OUT
20109613 20109604
Harmonic Distortion vs. Output Voltage Harmonic Distortion vs. Output Voltage
20109611
20109612
www.national.com5
Typical Performance Characteristics V
=±5V, RL= 100Ω; unless otherwise specified. (Continued)
s
LMH6572
Harmonic Distortion vs. Frequency Harmonic Distortion vs. Frequency
20109603
Harmonic Distortion vs. Supply Voltage Channel Switching Time
20109610
20109616
Disable Time Pulse Response
20109626 20109625
www.national.com 6
20109621
LMH6572
Typical Performance Characteristics V
Crosstalk PSRR
20109614 20109607
PSRR Closed Loop Output Impedance
=±5V, RL= 100Ω; unless otherwise specified. (Continued)
s
Closed Loop Output Impedance
20109606
20109608
20109609
www.national.com7
Application Notes
GENERAL INFORMATION
LMH6572
The LMH6572 is a high-speed triple 2:1 multiplexer, optimized for very high speed and low distortion. With a fixed
gain of 2 and excellent AC performance, the LMH6572 is
ideally suited for switching high resolution, presentation
grade video signals. The LMH6572 has no internal ground
reference. Single or split supply configurations are both possible. The LMH6572 features very high speed channel
switching and disable times. When disabled the LMH6572
output is high impedance making MUX expansion possible
by combining multiple devices.
20109623
FIGURE 2. Single Supply Application
GAIN ACCURACY
The gain accuracy of the LMH6572 is accurate to
±
0.5%
(0.3% typical) and stable over temperature. The internal gain
setting resistors, R
and RG, match very well. However, over
F
process and temperature their absolute value will change.
20109622
FIGURE 1. Typical Application
VIDEO PERFORMANCE
The LMH6572 has been designed to provide excellent performance with production quality video signals in a wide
variety of formats such as HDTV and High Resolution VGA.
Best performance will be obtained with back-terminated
loads. The back termination reduces reflections from the
transmission line and effectively masks transmission line
and other parasitic capacitances from the amplifier output
stage.Figure 1 shows a typical configuration for driving a 75.
Cable. The output buffer is configured for a gain of 2, so
using back terminated loads will give a net gain of 1.
SINGLE SUPPLY OPERATION
The LMH6572 uses mid supply referenced circuits for the
select and disable pins. In order to use the LMH6572 in
single supply configuration it is necessary to use a circuit
similar to Figure 2. In this configuration the logical inputs are
compatible with high breakdown Open collector TTL, or
Open Drain CMOS logic. In addition, the default logic state is
reversed since there is a pull up resistor on those pins.
Single supply operation also requires the input to be biased
±
to within the common mode input range of roughly
2V from
the mid supply point.
EVALUATION BOARDS
National Semiconductor provides the following evaluation
boards as a guide for high frequency layout and as an aid in
device testing and characterization. Many of the datasheet
plots were measured with these boards.
Device Package Evaluation Board
Part Number
LMH6572 TSSOP LMH730151
An evaluation board is shipped when a sample request is
placed with National Semiconductor.
MULTIPLEXER EXPANSION
With the Enable or the Select pins putting the output stage
into a high impedance state, several LMH6572’s can be tied
together to form a larger input MUX. However, there is a
slight loading effect on the active output caused by the
off-channel feedback and gain set resistors, as shown in
Figure 3 below. Figure 3 is assuming there are 4 LMH6572
outputs (2 LMH6572 devices) similar to the schematic of
Figure 4. With the internal resistors valued at 800Ω, the
effect is rather slight. For the 4:1 MUX function shown in
Figure 3, the gain error is only about -0.57 dB, or about 6%.
www.national.com 8
LMH6572
Application Notes (Continued)
FIGURE 3. Multiplexer Input Expansion by
Combining Output
An alternate approach would be to tie the outputs directly
together and let all devices share a common back termination resistor in order to alleviate the gain error issue above.
The drawback in this case is the increased capacitive load
presented to the output of each LMH6572 due to the offstate capacitance of the LMH6572.
EXPANDING THE MUX
It is possible to build higher density MUX’s by paralleling
several LMH6572’s. Figure 4 shows a 4:1 RGB MUX using
two LMH6572’s:
20109617
FIGURE 4. RGB MUX USING TWO LMH6572’s
If it is important in the end application to make sure that no
two inputs are presented to the output at the same time, an
optional delay block can be added, prior to the ENABLE (EN)
pin of each device, as shown. Figure 5 shows one possible
20109618
approach to this delay circuit. The delay circuit shown will
delay ENABLE’s H to L transitions (R
and C1decay) but
1
won’t delay its L to H transition.
www.national.com9
Application Notes (Continued)
LMH6572
20109619
FIGURE 5. Delay Circuit Implementation
should be kept small compared to R1in order to not
R
2
reduce the ENABLE voltage and to produce little or no delay
to ENABLE.
Other Applications
The LMH6572 may be utilized in systems that involve a
single RGB channel as well whenever there is a need to
switch between different “flavors” of a single RGB input.
Here are some examples:
1. RGB positive polarity, negative polarity switch
2. RGB full resolution, High Pass filter switch
In each of these applications, the same RGB input occupies
one set of inputs to the LMH6572 and the other “flavor”
would be tied to the other input set.
DRIVING CAPACITIVE LOADS
Capacitive output loading applications will benefit from the
use of a series output resistor R
of a series output resistor, R
output under capacitive loading. Capacitive loads of
5 to 120 pF are the most critical, causing ringing, frequency
response peaking and possible oscillation. The chart “Suggested R
vs. Cap Load” gives a recommended value for
OUT
selecting a series output resistor for mitigating capacitive
loads. The values suggested in the charts are selected for .5
dB or less of peaking in the frequency response. This gives
a good compromise between settling time and bandwidth.
For applications where maximum frequency response is
needed and some peaking is tolerable, the value of R
can be reduced slightly from the recommended values.
FIGURE 6. Decoupling Capacitive Loads
. Figure 6 shows the use
OUT
, to stabilize the amplifier
OUT
20109624
OUT
20109604
FIGURE 7. Recommended R
vs. Capacitive Load
OUT
20109613
FIGURE 8. Frequency Response vs. Capacitive Load
LAYOUT CONSIDERATIONS
Whenever questions about layout arise, use the evaluation
board as a guide. The LMH730151 is the evaluation board
supplied with samples of the LMH6572. To reduce parasitic
capacitances, ground and power planes should be removed
near the input and output pins. For long signal paths controlled impedance lines should be used, along with impedance matching elements at both ends. Bypass capacitors
should be placed as close to the device as possible. Bypass
capacitors from each rail to ground are applied in pairs. The
larger electrolytic bypass capacitors can be located farther
from the device, the smaller ceramic capacitors should be
placed as close to the device as possible. In Figure 1 and
Figure 2, the capacitor between V
+
and V−is optional, but is
recommended for best second harmonic distortion. Another
way to enhance performance is to use pairs of .01 µF and
.1 µF ceramic capacitors for each supply bypass.
www.national.com 10
Other Applications (Continued)
POWER DISSIPATION
The LMH6572 is optimized for maximum speed and performance in the small form factor of the standard SSOP package. To achieve its high level of performance, the LMH6572
consumes 23 mA of quiescent current, which cannot be
neglected when considering the total package power dissipation limit. To ensure maximum output drive and highest
performance, thermal shutdown is not provided. Therefore, it
is of utmost importance to make sure that the T
exceeded due to the overall power dissipation.
Follow these steps to determine the Maximum power dissipation for the LMH6572:
1. Calculate the quiescent (no-load) power: P
), where VS=V+-V−.
(V
S
2. Calculate the RMS power dissipated in the output stage:
(rms) = rms ((VS-V
P
D
are the voltage across and the current through the
I
OUT
external load and V
S
3. Calculate the total RMS power: P
)*I
OUT
), where V
OUT
is the total supply voltage.
T=PAMP+PD
The maximum power that the LMH6572, package can dissipate at a given temperature can be derived with the following
equation:
is never
JMAX
AMP=ICC
OUT
.
and
LMH6572
P
= (150˚ – T
MAX
ture (˚C) and θ
ambient, for a given package (˚C/W). For the SSOP package
is 125˚C/W.
θ
JA
ESD PROTECTION
The LMH6572 is protected against electrostatic discharge
(ESD) on all pins. The LMH6572 will survive 2000V Human
Body model and 200V Machine model events. Under normal
operation the ESD diodes have no effect on circuit performance. There are occasions, however, when the ESD diodes will be evident. If the LMH6572 is driven by a large
signal while the device is powered down the ESD diodes will
conduct. The current that flows through the ESD diodes will
*
either exit the chip through the supply pins or will flow
through the device, hence it is possible to power up a chip
with a large signal applied to the input pins. Shorting the
power pins to each other will prevent the chip from being
powered up through the input.
)/ θJA, where T
AMB
= Thermal resistance, from junction to
JA
= Ambient tempera-
AMB
www.national.com11
Physical Dimensions inches (millimeters)
unless otherwise noted
LMH6572 Triple 2:1 High Speed Video Multiplexer
16-Pin SSOP
NS Package Number MQA16
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
BANNED SUBSTANCE COMPLIANCE
National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products
Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification
(CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Americas Customer
Support Center
Email: new.feedback@nsc.com
Tel: 1-800-272-9959
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
National Semiconductor
Europe Customer Support Center
Fax: +49 (0) 180-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 69 9508 6208
English Tel: +44 (0) 870 24 0 2171
Français Tel: +33 (0) 1 41 91 8790
National Semiconductor
Asia Pacific Customer
Support Center
Email: ap.support@nsc.com
National Semiconductor
Japan Customer Support Center
Fax: 81-3-5639-7507
Email: jpn.feedback@nsc.com
Tel: 81-3-5639-7560
Loading...