National Semiconductor LMH6572 Technical data

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LMH6572 Triple 2:1 High Speed Video Multiplexer
LMH6572 Triple 2:1 High Speed Video Multiplexer
August 2004
General Description
The LMH™6572 is a high performance analog mulitplexer optimized for professional grade video and other high fidelity high bandwidth analog applications. The LMH6572 provides a 290MHz bandwidth at 2 V MHz of .1 dB bandwidth and a 1500 V/µs slew rate make this part suitable for High Definition Television (HDTV) and High Resolution Multimedia Video applications.
The LMH6572 supports composite video applications with its
0.02% and 0.02˚ differential gain and phase errors for NTSC and PAL video signals while driving a single, back terminated 75load. The LMH6572 can deliver 80 mA linear output current for driving multiple video load applications.
The LMH6572 has an internal gain of two for driving back terminated transmission lines at a net gain of one.
The LMH6572 is available in the SSOP package.
output signal levels. The 140
PP
Connection Diagram
16-Pin SSOP
Features
n 350 MHz, 250 mV −3 dB bandwidth n 290 MHz, 2 V n 10 ns channel switching time n 90 dB channel to channel isolation n 0.02%, 0.02˚ diff. gain, phase n .1 dB gain flatness to 140 MHz n 1400 V/µs slew rate n Wide supply voltage range: 6V ( n −78 dB HD2 n −75 dB HD3
−3 dB bandwidth
PP
@
10MHz
@
10MHz
±
Applications
n RGB video router n Multi input video monitor n Fault tolerant data switch
Truth Table
SEL EN OUT
0 0 CH 1
1 0 CH 0
X 1 Disable
@
5 MHz
3V) to 12V (±6V)
Top View
20109605
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
16-Pin SSOP
LMH™is a trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation DS201096 www.national.com
LMH6572MQ
LMH6572MQX 2.5 Units Tape and Reel
LH6572MQ
95 Units/Rail
MQA16
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
LMH6572
Distributors for availability and specifications.
ESD Tolerance (Note 4)
Soldering Information
Infrared or Convection (20 sec) 235˚C
Wave Soldering (10 sec) 260˚C
Operating Ratings (Note 1)
Human Body Model 2000V
Machine Model 200V
+−V−
Supply Voltage (V
I
(Note 3) 130 mA
OUT
IInput Voltage Range
) 13.2V
±
V
Maximum Junction Temperature +150˚C (Note 4)
S
Operating Temperature −40˚C to 85˚C
Supply Voltage Range 6V to 12V
Thermal Resistance
Package (θ
)(θJC)
JA
16-Pin SSOP 125˚C/W 36˚C/W
Storage Temperature Range −65˚C to +150˚C
±
5V Electrical Characteristics
VS=±5V, RL= 100, Unless otherwise specified.
Symbol Parameter Conditions(Note 2) Min Typ Max Units
Frequency Domain Performance
SSBW −3 dB Bandwidth V
LSBW –3 dB Bandwidth (Note 6) V
.1 dBBW . 1 dB Bandwidth V
DG Differential Gain R
DP Differential Phase R
= 0.25 V
OUT
=2V
OUT
= 0.25 V
OUT
= 150, f=4.43 MHz 0.02 %
L
= 150, f=4.43 MHz 0.02 deg
L
PP
PP
PP
250 290 MHz
350 MHz
140 MHz
Time Domain Response
TRS Channel to Channel Switching Time Logic transition to 90% output 10 ns
Enable and Disable Times Logic transition to 90% or 10%
11 ns
output.
TRL Rise and Fall Time 2V Step 1.5 ns
TSS Settling Time to 0.05% 2V Step 17 ns
OS Overshoot 4V Step 5 %
SR Slew Rate(Note 6) 4V Step 1200 1400 V/µs
Distortion
HD2 2
HD3 3
IMD 3
nd
Harmonic Distortion 2 VPP, 10 MHz −78 dBc
rd
Harmonic Distortion 2 VPP, 10 MHz −75 dBc
rd
Order Intermodulation Products 10 MHz, Two tones 2Vpp at output −80 dBc
Equivalent Input Noise
VN Voltage
ICN Current
>
1 MHz, Input Referred 5 nV
>
1 MHz, Input Referred 5 pA/
Static, DC Performance
GAIN Voltage Gain (Note 5) No Load 1.9 2.0 2.1 V/V
Gain Error(Note 5) No Load, channel to channel
±
0.3
±
0.5
±
0.7
%
Gain Error R
VIO Output Offset Voltage (Note 5) V
=50 0.3 %
L
±
±
14
17.5
=0V 1
IN
DVIO Average Drift 27 µV/˚C
IBN Input Bias Current (Notes 7, 5) V
= 0V −1.4
IN
±
2.8
±
3.5
DIBN Average Drift 7 nA/˚C
PSRR Power Supply Rejection Ratio
(Note 5)
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DC, Input referred 50
48
54 dB
mV
µA
±
5V Electrical Characteristics (Continued)
VS=±5V, RL= 100, Unless otherwise specified.
Symbol Parameter Conditions(Note 2) Min Typ Max Units
ICC Supply Current (Note 5) No Load 20 23 25
mA
28.5
Supply Current Disabled(Note 5) No Load 2.0 2.2
mA
2.3
VIH Logic High Threshold(Note 5) Select & Enable Pins 2.0 V
VIL Logic Low Threshold (Note 5) Select & Enable Pins 0.8 V
IiL Logic Pin Input Current Low(Note 7) Logic Input = 0V −1
IiH Logic Pin Input Current High(Note7)Logic Input = 2.0V 112
150 200
100
±
±
210
2.5
10
µA
µA
Miscellaneous Performance
RF Internal Feedback and Gain Set
resistor Values
RODIS Disabled Output Resistance Internal Feedback and Gain Set
resistors in series to ground.
650
620
800 940
1010
1.3 1.6 1.88
k
RIN+ Input Resistance 100 k
CIN Input Capacitance 0.9 pF
ROUT Output Resistance 0.26
VO Output Voltage Range No Load
VOL R
= 100
L
CMIR Input Voltage Range
IO Linear Output Current (Notes 5, 7) V
= 0V, +70
IN
±
±
±
3.83
3.80
3.52
±
3.5
±
2
±
3.9 V
±
3.53 V
±
2.5 V
±
80 mA
-40
ISC Short Circuit Current VIN=±2V, Output shorted to
±
230 mA
ground
XTLK Channel to Channel Crosstalk V
XTLK Channel to Channel Crosstalk V
IN
IN
=2V
=2V
XTLK All Hostile Crosstalk In A, C. Out B, V
@
5 MHz −90 dBc
PP
@
100 MHZ −54 dBc
PP
IN
=2V
@
5
PP
−95 dBc
MHz
LMH6572
±
3.3V Electrical Characteristics
VS=±3.3V, RL= 100; Unless otherwise specified.
Symbol Parameter Conditions(Note 2) Min Typ Max Units
Frequency Domain Performance
SSBW −3 dB Bandwidth V
LSBW −3 dB Bandwidth V
.1 dBBW .1 dB Bandwidth V
OUT
OUT
OUT
= 0.25 V
= 2.0 V
= 0.5 V
PP
PP
PP
360 MHz
270 MHz
80 MHz
GFP Peaking DC to 200 MHz 0.3 dB
DG Differential Gain R
DP Differential Phase R
= 150, f=4.43 MHz 0.02 %
L
= 150, f=4.43 MHz 0.03 deg
L
Time Domain Response
TRS Rise and Fall Time 2V Step 2.0 ns
TSS Settling Time to 0.05% 2V Step 15 ns
OS Overshoot 2V Step 5 %
SR Slew Rate 2V Step 1000 V/µs
Distortion
HD2 2
nd
Harmonic Distortion 2 VPP, 10MHz −70 dBc
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±
3.3V Electrical Characteristics (Continued)
VS=±3.3V, RL= 100; Unless otherwise specified.
LMH6572
Symbol Parameter Conditions(Note 2) Min Typ Max Units
HD3 3
IMD 3
rd
Harmonic Distortion 2 VPP, 10MHz −74 dBc
rd
Order Intermodulation Products 10 MHz, Two tones 2Vpp at output −79 dBc
Static, DC Performance
GAIN Voltage Gain 2.0 V/V
VIO Output Offset Voltage V
=0V 1 mV
IN
DVIO Average Drift 36 µV/˚C
IBN Input Bias Current (Note 7) V
=0V 2 µA
IN
DIBN Average Drift 24 nA/˚C
PSRR Power Supply Rejection Ratio DC, Input Referred 54 dB
ICC Supply Current R
=
L
20 mA
VIH Logic High Threshold Select & Enable Pins 1.3 V
VIL Logic Low Threshold Select & Enable Pins 0.4 V
Miscellaneous Performance
RIN+ Input Resistance 100 k
CIN Input Capacitance 0.9 pF
ROUT Output Resistance 0.27
VO Output Voltage Range No Load
VOL R
= 100
L
CMIR Input Voltage Range
IO Linear Output Current V
ISC Short Circuit Current V
=0V
IN
=±1V, Output shorted to
IN
±
2.5 V
±
2.2 V
±
1.2 V
±
60 mA
±
150 mA
ground
XTLK Channel to Channel Crosstalk 5 MHz −90 dBc
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that T See Applications Section for information on temperature de-rating of this device. Min/Max ratings are based on product testing, characterization and simulation. Individual parameters are tested as noted.
Note 3: The maximum output current (I more details. A short circuit condition should be limited to 5 seconds or less.
Note 4: Human Body model, 1.5 kin series with 100 pF. Machine model, 0In series with 200 pF
Note 5: Parameters guaranteed by electrical testing at 25˚ C.
Note 6: Parameters guaranteed by design.
Note 7: Positive Value is current into device.
. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where T
J=TA
) is determined by device power dissipation limitations. See the Power Dissipation section of the Application Section for
OUT
>
TA.
J
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