January 24, 2008
LMH6514
600 MHz, Digital Controlled, Variable Gain Amplifier
LMH6514 600 MHz, Digital Controlled, Variable Gain Amplifier
General Description
The LMH6514 is a high performance, digitally controlled variable gain amplifier (DVGA). It combines precision gain control
with a low noise, ultra-linear, differential amplifier. Typically,
the LMH6514 drives a high performance ADC in a broad
range of mixed signal and digital communication applications
such as mobile radio and cellular base stations where automatic gain control (AGC) is required to increase system dynamic range. When used in conjunction with a high speed
ADC, system dynamic range can be extended by up to 42 dB.
The LMH6514 has a differential input and output allowing
large signal swings on a single 5V supply. It is designed to
accept signals from RF elements and maintain a terminated
impedance environment. The input impedance is 200Ω resistive. The output impedance is either 200Ω or 400Ω and is
user selectable. A unique internal architecture allows use with
both single ended and differential input signals.
Input signals to the LMH6514 are scaled by a highly linear,
digitally controlled attenuator with seven accurate 6 dB steps.
The attenuator output provides the input signal for a high gain,
ultra linear differential transconductor. The transconductor
differential output current can be converted into a voltage by
using the on-chip 200Ω or 400Ω loads. The transconductance
gain is 0.1 Amp/Volt resulting in a maximum voltage gain of
+32 dB when driving a 200Ω load, or 38 dB when driving the
400Ω load. On chip digital latches are provided for local storage of the gain setting. The gain step settling time is 5 ns and
care has been taken to reduce the sensitivity of bandwidth
and phase to gain setting.
The LMH6514 operates over the industrial temperature range
of −40°C to +85°C. The LMH6514 is available in a 16-Pin,
thermally enhanced, LLP package.
Features
Adjustable gain with a 42 dB range
■
Precise 6.02 dB gain steps
■
Parallel 3 bit gain control
■
On chip register gain setting
■
Fully differential signal path
■
Single ended to differential capable
■
200Ω input impedance
■
Small footprint (4 mm x 4 mm) LLP package
■
Key Specifications
600 MHz bandwidth at 100Ω load
■
39 dBm OIP3 at 75 MHz, 200Ω load
■
26 dB to 38 dB maximum gain
■
Selectable output impedance of 200Ω or 400Ω.
■
8.3 dB noise figure
■
5 ns gain step switching time
■
100 mA supply current
■
Applications
Cellular base stations
■
IF sampling receivers
■
Instrumentation
■
Modems
■
Imaging
■
Differential line receiver
■
Typical Application
30042901
LMH™ is a trademark of National Semiconductor Corporation.
© 2008 National Semiconductor Corporation 300429 www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
LMH6514
Distributors for availability and specifications.
Storage Temperature Range −65°C to +150°C
Soldering Information
Infrared or Convection (20 sec) 235°C
Wave Soldering (10 sec) 260°C
ESD Tolerance (Note 2)
Human Body Model 2 kV
Machine Model 150V
Positive Supply Voltage (Pin 3) −0.6V to 5.5V
Output Voltage (Pin 14,15) −0.6V to 6.8V
Differential Voltage between Any
Two Grounds <200 mV
Analog Input Voltage Range −0.6V to V
CC
Digital Input Voltage Range −0.6V to 3.6V
Output Short Circuit Duration
(one pin to ground) Infinite
Operating Ratings (Note 1)
Supply Voltage (Pin 3) 4V to 5.25V
Output Voltage Range (Pin 14, 15) 1.4V to 6.4V
Differential Voltage Between Any
Two Grounds <10 mV
Analog Input Voltage Range,
AC Coupled ±1.4V
Temperature Range (Note 3) −40°C to +85°C
Package Thermal Resistance (θJA)
16-Pin LLP 47°C/W
Junction Temperature +150°C
5V Electrical Characteristics (Note 4)
The following specifications apply for single supply with VCC = 5V, Maximum Gain , RL = 100Ω (200Ω external || 200Ω internal),
V
= 2 VPP, fin = 150 MHz. Boldface limits apply at temperature extremes.
OUT
Symbol Parameter Conditions Min
(Note 6)
Dynamic Performance
SSBW −3 dB Bandwidth Average of all Gain Settings 600 MHz
Noise and Distortion
Third Order Intermodulation
Products
OIP3 Output Third Order Intercept Point f = 75 MHz, V
f = 75 MHz, V
f = 150 MHz, V
f = 250 MHz, V
f = 450 MHz, V
OUT
OUT
OUT
OUT
OUT
= 2 V
PP
= 2 V
= 2 V
= 2 V
= 2 VPP,
PP
PP
PP
−70
−66
−60
−52
35
Tone Spacing = 0.5 MHz
f = 150 MHz, V
OUT
= 2 VPP,
33
Tone Spacing = 2 MHz
f = 250 MHz, V
OUT
= 2 VPP,
31
Tone Spacing = 2 MHz
f = 75 MHz, RL= 200Ω, V
OUT
= 2 V
PP
39
Tone Spacing = 0.5 MHz
f = 150 MHz, RL = 200Ω, V
OUT
= 2 VPP,
37
Tone Spacing = 2 MHz
f = 250 MHz, RL = 200Ω, V
OUT
= 2 VPP,
34
Tone Spacing = 2 MHz
P1 dB Output Level for 1 dB Gain
Compression
f = 75 MHz, R L = 200Ω
f = 250 MHz, R L = 200Ω
16.7
14.7
f = 75 MHz 14.5
f = 450 MHz 13.2
VNI Input Noise Voltage Maximum Gain, f = 40 MHz 1.8
VNO Output Noise Voltage Maximum Gain, f = 40 MHz 36
NF Noise Figure Maximum Gain 8.3 dB
Analog I/O
Differential Input Resistance 165
158
Input Common Mode Resistance 825
785
Typ
(Note 5)
(Note 6)
188 220
955 1120
Max
230
1160
Units
dBc
dBm
dBm
nV/
nV/
Ω
Ω
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LMH6514
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
Differential Output Resistance Low Gain Option 186
High Gain Option 330
325
Internal Load Resistors Between Pins 13, 14 and Pins 15, 16 165
158
Input Signal Level (AC Coupled)
Max Gain, VO = 2 VPP, RL = 1 kΩ
370 420
425
187 215
225
63 mV
Ω
Ω
Maximum Differential Input Signal AC Coupled 5.6 V
Input Common Mode Voltage Self Biased 1.3
1.1
Input Common Mode Voltage
Driven Externally 0.9 to 2.0 V
1.4 1.5
1.7
V
Range
Minimum Input Voltage DC 0 V
Maximum Input Voltage DC 3.3 V
Maximum Differential Output
VCC = 5V, Output Common Mode = 5V 5.5 V
Voltage Swing
V
OS
Output Offset Voltage All Gain Settings −21 mV
CMRR Common Mode Rejection Ratio Maximum Gain 81 dB
PSRR Power Supply Rejection Ratio Maximum Gain 63
61
81
dB
Gain Parameters
Maximum Gain
Minimum Gain
DC, Internal RL = 186Ω,
External RL = 1280Ω
DC, Internal RL = 186Ω,
External RL = 1280Ω
29.3
28.7
−12.75
−13.15
30 30.3
30.9
−12 −11.85
−11.45
dB
dB
Gain Step Size DC 6.02 dB
Gain Step Error DC 0.02
f = 150 MHz 0.07
Cumulative Gain Step Error DC, Gain Step 7 to Gain Step 0 −0.35
−0.50
0.02 0.30
0.45
dB
dB
Gain Step Switching Time 5 ns
Digital Inputs/Timing
Logic Compatibility CMOS Logic 3.3 V
VIL Logic Input Low Voltage 0.8 V
VIH Logic Input High Voltage 2.0 V
IIH Logic Input High Input Current Digital Input Voltage = 3.3V 33 40
μA
TSU Setup Time 3 ns
THOLD Hold Time 3 ns
TPW Minimum Latch Pulse Width 10 ns
Power Requirements
ICC Total Supply Current V
Amplifier Supply Current Pin 3 Only 56 66
Output Stage Bias Currents Pins 13, 14 and Pins 15, 16;
= 0V Differential, V
OUT
Mode = 5V
V
Common Mode = 5 V
OUT
Common
OUT
107 124
134
74
51 58
60
mA
mA
mA
PP
PP
PP
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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
LMH6514
Note 3: The maximum power dissipation is a function of T
PD = (T
Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. No guarantee of parametric performance is indicated in the
electrical tables under conditions different than those tested
Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality
Control (SQC) methods.
Note 7: Negative input current implies current flowing out of the device.
Note 8: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.
– TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
J(MAX)
, θJA. The maximum allowable power dissipation at any ambient temperature is
J(MAX)
Connection Diagram
16-Pin LLP
Top View
30042904
Gain Control Pins
Pin Number Pin Name Gain Step Size
11 GAIN_0 6.02 dB
10 GAIN_1 12.04 dB
9 GAIN_2 24.08 dB
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
16-Pin LLP
LMH6514SQ
LMH6514SQX 4.5k Units Tape and Reel
L6514SQ
1k Units Tape and Reel
SQA16A
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Pin Descriptions
Pin Number Symbol Description
Analog I/O
6 IN+ Non-inverting analog input. Internally biased to 1.4V. Input voltage should not exceed
VCC or go below GND by more than 0.5V.
7 IN− Inverting analog input. Internally biased to 1.4V. Input voltage should not exceed VCC or
go below GND by more than 0.5V. If using amplifier single ended this input should be
capacitively coupled to ground.
15 OUT− Open collector inverting output. This pin is an output that also requires a power source.
This pin should be connected to 5V through either an RF choke or an appropriately sized
inductor that can form part of a filter. See application section for details.
14 OUT+ Open collector non-inverting output. This pin is an output that also requires a power
source. This pin should be connected to 5V through either an RF choke or an
appropriately sized inductor that can form part of a filter. See application section for
details.
16 LOAD−
13 LOAD+
Power
3 V
5,8 GND Ground pins. Connect to low impedance ground plane. All pin voltages are specified with
Digital Inputs
11,10,9 GAIN_0 to
2 LATCH This pin controls the function of the gain setting pins mentioned above. With LATCH in
1,4,12 NC These pins are not connected. They can be grounded or left floating.
CC
GAIN_2
Internal 200Ω resistor connection to pin 15. This pin can be left floating for higher gain
or shorted to pin 13 for lower gain and lower effective output impedance. See application
section for details.
Internal 200Ω resistor connection to pin 14. This pin can be left floating for higher gain
or shorted to pin 16 for lower gain and lower effective output impedance. See application
section for details.
5V power supply pin. Use ceramic, low ESR bypass capacitors. This pin powers
everything except the output stage.
respect to the voltage on these pins. The exposed thermal pad is also a ground
connection.
Gain setting pins. See above table for gain step sizes for each pin. These pins are 3.3V
CMOS logic compatible. 5V inputs may cause damage.
the logic HIGH state the gain is fixed and will not change. With the LATCH in the logic
LOW state the gain is set by the state of the gain control pins. Any changes in gain made
with the LATCH pin in the LOW state will take effect immediately. This pin is 3.3V CMOS
logic compatible. 5V inputs may cause damage.
LMH6514
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Typical Performance Characteristics V
CC
= 5V
LMH6514
Frequency Response All Gain Settings
Frequency Response over Temperature, Minimum Gain
30042922
Frequency Response over Temperature, Maximum Gain
30042949
OIP3 High Gain Mode
30042950
OIP3 Low Gain Mode
30042942
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30042943
OIP3 Over Temperature
30042926
LMH6514
IMD3 Low Gain Mode
HD2 vs. Frequency
30042940
IMD3 High Gain Mode
30042941
HD3 vs. Frequency
HD2 vs. Frequency
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30042938
30042939
HD3 vs. Frequency
30042937
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LMH6514
Noise Figure for All Gain Settings
Noise Figure vs. Frequency
Differential Output Noise
Gain vs. External Load
30042914
30042918
30042917
Maximum Gain vs. Supply Voltage
30042927
Maximum Gain over Temperature
30042912
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30042944
LMH6514
Worst Case Gain Step Error vs Frequency
30042945
Worst Case Gain Step Error over Temperature
Gain Steps over Temperature
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Input Impedance (S11) at Maximum Gain
30042951
Input Impedance (S11) at Minimum Gain
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30042964
Output Impedance (S22) at Maximum Gain Low Gain Mode
30042965
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Output Impedance (S22) at Maximum Gain High Gain Mode
LMH6514
Digital Crosstalk
30042967
Digital Crosstalk
30042948
Minimum Gain to Maximum Gain Switching
Using Latch Pin
30042947
Digital Pin to Output Isolation
30042919
Maximum Gain to Minimum Gain Switching
Using Latch Pin
30042930
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30042935
LMH6514
24 dB Gain Step
12 dB Gain Step
30042932
24 dB Gain Step
30042929
12 dB Gain Step
6 dB Gain Step
30042928
30042934
30042931
6 dB Gain Step
30042933
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LMH6514
Power On Timing, Maximum Gain
Power On Timing, Minimum Gain
Power Off Timing, Maximum Gain
30042953
30042956
30042954
Power Off Timing, Minimum Gain
30042955
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Application Information
The LMH6514 is a fully differential amplifier optimized for signal path applications up to 400 MHz. The LMH6514 has a
200Ω input. The absolute gain is load dependent, however
the gain steps are always 6 dB. The LMH6514 output stage
is a class A amplifier. This class A operation results in excellent distortion and linearity characteristics. This makes the
LMH6514 ideal for voltage amplification and an ideal ADC
driver where high linearity is necessary.
LMH6514
30042962
30042903
FIGURE 1. LMH6514 Typical Application
The LMH6514 output common mode should be set carefully.
Using inductors to set the output common mode is one preferred method and will give maximum output swing. AC coupling of the output is recommended. The inductors mentioned
above will shift the idling output common mode to the positive
supply. Also, with the inductors, the output voltage can exceed the supply voltage. Other options for setting the output
common mode require supply voltages above 5V. If using a
supply higher than 5V care should be taken to make sure the
output common mode does not exceed the 5.25V supply rating.
It is also important to note the maximum voltage limits for the
OUT+ and OUT− pins, which is 6.4V. When using inductors
these pins will experience voltage swings beyond the supply
voltage. With a 5V output common mode operating point this
makes the effective maximum swing 5.6 VPP differential. System calibration and automatic gain control algorithms should
be tailored to avoid exceeding this limit. Figure 2 shows how
output voltage and output common mode add together and
approach the maximum output voltage.
FIGURE 2. Output Voltage with Respect to the Output
Common Mode
In order to help with system design National Semiconductor
offers the ADC14V155KDRB High IF Receiver reference design board. This board combines the LMH6514 DVGA with
the ADC14V155 ADC and provides a ready made solution for
many IF receiver applications. Using an IF frequency of 169
MHz it achieves a small signal SNR of 72 dBFS and an SFDR
of greater than 90 dBFS. Large signal measurements show
an SNR of 68 dBFS and an SFDR of 77 dBFS. The High IF
Receiver board also features the LMK03000 low-jitter precision clock conditioner.
30042911
FIGURE 3. LMH6514 Block Diagram
INPUT CHARACTERISTICS
The LMH6514 input impedance is set by internal resistors to
a nominal 200Ω. Process variations will result in a range of
values as shown in the 5V Electrical Characteristics table. At
higher frequencies parasitics will start to impact the
impedance. This characteristic will also depend on board layout and should be verified on the customer’s system board.
At maximum gain the digital attenuator is set to 0 dB and the
input signal will be much smaller than the output. At minimum
gain the output is 4 dB or more smaller than the input. In this
configuration the input signal size may limit the amplifier output amplitude, depending on the output configuration and the
desired output signal voltage. The input signal cannot swing
more than 0.5V below the negative supply voltage (normally
0V) nor should it exceed the positive supply voltage. The input
signal will clip and cause severe distortion if it is too large.
Because the input stage self biases to approximately 1.4V the
lower supply voltage will impose the limit for input voltage
13 www.national.com
swing. To drive larger input signals the input common mode
can be forced higher than 1.4V to allow for more swing. An
input common mode of 2.0V will allow an 8 VPP maximum
LMH6514
input signal. The trade off for input signal swing is that as the
input common mode is shifted away from the 1.4V internal
bias point the distortion performance will suffer slightly.
FIGURE 4. Single Ended Input
(Note capacitor on grounded input)
At the frequencies where the LMH6514 is the most useful the
input impedance is not 200 Ω and it may not be purely resistive. For many AC coupled applications the impedance can
be easily changed using LC circuits to transform the actual
impedance to the desired impedance.
30042969
30042907
FIGURE 6. Differential 200Ω LC Conversion Circuit
In Figure 6 the input source resistance is 200Ω differential.
Here the desired input impedance is higher than the amplifier
input impedance, and is differential as well. The amplifier
impedance of (150–j0)Ω is increased to (202–j0.5)Ω. For an
easy way to calculate the L and C circuit values there are
several options for online tools or down-loadable programs.
The following tool might be helpful.
http://www.circuitsage.com/matching/matcher2.html
Excel can also be used for simple circuits; however, the “Anal-
ysis ToolPak” add-in must be installed to calculate complex
numbers.
30042968
FIGURE 5. Single Ended Input with LC Matching
As shown in Figure 5 a single ended 50Ω source is matched
to the LMH6514 input at 100 MHz. The loss in this circuit is
related to the parasitic resistance in the inductor and capacitor
and the bandwidth is related to the loaded Q of the circuit.
Since the Q, at 1.4 is quite low, the bandwidth is very wide.
(59 MHz 0.3 dB bandwidth). The input match of this circuit is
quite good. It converts the Z
(150 +j0)Ω to (50+j1)Ω. The benefit of LC matching circuits
of the amplifier, which is
AMP
over a transformer is the ability to match ratios that are not
commonly found on transformers and also the ability to neutralize reactance to present a purely resistive load to the
voltage source.
OUTPUT CHARACTERISTICS
The LMH6514 has the option of two different output configurations. The LMH6514 is an open collector topology. As
shown in Figure 11 each output has an on chip 200Ω pull up
resistor. In addition there is an internal 400Ω resistor between
the two outputs. This results in a 200Ω or a 400Ω differential
load in parallel with the external load. The 400Ω option is the
high gain option and the 200Ω provides for less gain. The
200Ω configuration is recommended unless more gain is required.
The output common mode of the LMH6514 must be set by
external components. Most applications will benefit from the
use of inductors on the output stage. In particular, the 400Ω
option as shown in Figure 12 will require inductors in order to
be able to develop an output voltage. The 200Ω option as
shown in Figure 13 or Figure 14 will also require inductors
since the voltage drop due to the on chip 200Ω resistors will
saturate the output transistors. It is also possible to use resistors and high voltage power supplies to set the output
common mode. This operation is not recommended, unless
it is necessary to DC couple the output. If DC coupling is required the input common mode and output common mode
voltages must be taken into account.
Maximum bandwidth with the LMH6514 is achieved by using
the low gain, low impedance output option and using a low
load resistance. With an effective load of 67Ω a bandwidth of
nearly a 1 GHz can be realized. As the effective resistance
on the output stage goes up the capacitance of the board
traces and amplifier output stage limit bandwidth in a roughly
linear fashion. At an output impedance of 100Ω the bandwidth
is down to 600 MHz, and at 200Ω the bandwidth is 260 MHz.
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For this reason driving very high impedance loads is not recommended.
Although bandwidth goes down with higher values of load resistance, the distortion performance improves and gain increases. The LMH6514 has a common emitter Class A output
stage and minimizing the amount of current swing in the output devices improves distortion substantially.
The LMH6514 output stage is powered through the collectors
of the output transistors. Power for the output stage is fed
through inductors and the reactance of the inductors allows
the output voltage to develop. In Figure 1 the inductors are
shown with a value of 44.4 nH. The value of the inductors
used will be different for different applications. In Figure 1 the
inductors have been chosen to resonate with the ADC and
the load capacitor to provide a weak band pass filter effect.
For broad band applications higher value inductors will allow
for better low frequency operation. However, large valued inductors will reduce high frequency performance, particularly
inductors of small physical sizes like 0603 or smaller. Larger
inductors will tend to perform better than smaller ones of the
same value even for narrow band applications. This is because the larger inductors will have a lower DC resistance
and less inter-winding capacitance and hence a higher Q and
a higher self resonance frequency. The self resonance frequency should be higher than any desired signal content by
at least a factor of 2. Another consideration is that the power
inductors and the filter inductors need to be placed on the
circuit board such that their magnetic fields do not cause coupling. Mutual coupling of inductors can compromise filter
characteristics and lead to unwanted distortion products.
30042915
FIGURE 7. Bandwidth Changes Due to Different Inductor
Values
LMH6514
30042906
FIGURE 8. Gain vs. External Load
DIGITAL CONTROL
The LMH6514 has eight gain settings covering a range of
42 dB. To avoid undesirable signal transients the LMH6514
should be powered on at the minimum gain state (all logic
input pins at 0V). The LMH6514 has a 3-bit gain control bus
as well as a Latch pin. When the Latch pin is low, data from
the gain control pins is immediately sent to the gain circuit (i.e.
gain is changed immediately). When the Latch pin transitions
high the current gain state is held and subsequent changes
to the gain set pins are ignored. To minimize gain change
glitches multiple gain control pins should not change while the
latch pin is low. In order to achieve the very fast gain step
switching time of 5 ns the internal gain change circuit is very
fast. Gain glitches could result from timing skew between the
gain set bits. This is especially the case when a small gain
change requires a change in state of three or more gain control pins. If continuous gain control is desired the Latch pin
can be tied to ground. This state is called transparent mode
and the gain pins are always active. In this state the timing of
the gain pin logic transitions should be planned carefully to
avoid undesirable transients.
The LMH6514 was designed to interface with 3.3V CMOS
logic circuits. If operation with 5V logic is required a simple
voltage divider at each logic pin will allow for this. To properly
terminate 100Ω transmission lines a divider with a 66.5Ω resistor to ground and a 33.2Ω series resistor will properly
terminate the line as well as give the 3.3V logic levels. Care
should be taken not to exceed the 3.6V absolute maximum
voltage rating of the logic pins.
EXPOSED PAD LLP PACKAGE
The LMH6514 is packaged in a thermally enhanced package.
The exposed pad is connected to the GND pins. It is recommended, but not necessary, that the exposed pad be connected to the supply ground plane. In any case, the thermal
dissipation of the device is largely dependent on the attachment of this pad. The exposed pad should be attached to as
much copper on the circuit board as possible, preferably external copper. However, it is also very important to maintain
good high speed layout practices when designing a system
board. Please refer to the LMH6514 evaluation board for suggested layout techniques.
Package information is available on the National web site.
http://www.national.com/packaging/folders/sqa16a.html
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INTERFACING TO ADC
The LMH6514 was designed to be used with high speed
ADCs such as the ADC14155. As shown in the Typical Ap-
LMH6514
plication on page 1, AC coupling provides the best flexibility
especially for IF sub-sampling applications. Any resistive networks on the output will also cause a gain loss because the
output signal is developed across the output resistors. The
chart Maximum Gain vs. External Load shows the change in
gain when an external load is added.
The inputs of the LMH6514 will self bias to the optimum voltage for normal operation. The internal bias voltage for the
inputs is approximately 1.4V. In most applications the
LMH6514 input will need to be AC coupled.
The output common mode voltage is not self biasing, it needs
to be pulled up to the positive supply rail with external inductors as shown in Figure 1. This gives the LMH6514 the
capability for large signal swings with very low distortion on a
single 5V supply. The internal load resistors provide the
LMH6514 with very consistent gain.
A unique internal architecture allows the LMH6514 to be driven by either a differential or single ended source. If driving the
LMH6514 single ended the unused input should be terminated to ground with a 0.01 µF capacitor. Directly shorting the
unused input to ground will disrupt the internal bias circuitry
and will result in poor performance.
Filter Component Values
Filter Component Values
Fc 75 MHz 140
MHz
170
MHz
250 MHz
BW 40 MHz 20 MHz 25 MHz Narrow
Band
Components L1, L2 10 µH 10 µH 10 µH 10 µH
L3, L4 390 nH 39 0nH 560 nH
—
C1,C210 pF 3 pF 1.4 pF 47 pF
C3 22 pF 41 pF 32 pF 11 pF
L5 220 nH 27 nH 30 nH 22 nH
R1,R2100 200 100 499
30042906
FIGURE 9. Bandpass Filter
Center Frequency is 140 MHz with a 20 MHz Bandwidth
Designed for 200Ω Impedance
ADC Noise Filter
Below is a filter schematic and a table of values for some
common IF frequencies. The filter shown below offers a good
compromise between bandwidth, noise rejection and cost.
This filter topology is the same as is used on the ADC14V155KDRB High IF Receiver reference design board.
This filter topology works best with the 12 and 14 bit subsampling analog to digital converters shown in the Compati-
ble High Speed Analog to Digital Converters table.
30042913
FIGURE 10. Sample Filter
POWER SUPPLIES
As shown in Figure 11, the LMH6514 has a number of options
for power supply connections on the output pins. Pin 3 (VCC)
is always connected. The output stage can be connected as
shown in Figure 12, Figure 13, and Figure 14. The supply
voltage range for VCC is 4V to 5.25V. A 5V supply provides
the best performance while lower supplies will result in less
power consumption. Power supply regulation of 2.5% or better is advised.
Of special note is that the digital circuits are powered from an
internal supply voltage of 3.3V. The logic pins should not be
driven above the absolute maximum value of 3.6V. See the
Digital Control section for details.
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LMH6514
30042902
FIGURE 11. Internal Load Resistors
FIGURE 12. Using High Gain Mode (400Ω Load)
30042908
30042909
FIGURE 13. Using Low Gain Mode (200Ω Load)
30042910
FIGURE 14. Alternate Connection for Low Gain Mode
(200Ω Load)
17 www.national.com
Compatible High Speed Analog to Digital Converters
LMH6514
Product Number Max Sampling Rate (MSPS) Resolution Channels
ADC12L063 62 12 SINGLE
ADC12DL065 65 12 DUAL
ADC12L066 66 12 SINGLE
ADC12DL066 66 12 DUAL
CLC5957 70 12 SINGLE
ADC12L080 80 12 SINGLE
ADC12DL080 80 12 DUAL
ADC12C080 80 12 SINGLE
ADC12C105 105 12 SINGLE
ADC12C170 170 12 SINGLE
ADC12V170 170 12 SINGLE
ADC14C080 80 14 SINGLE
ADC14C105 105 14 SINGLE
ADC14DS105 105 14 DUAL
ADC14155 155 14 SINGLE
ADC14V155 155 14 SINGLE
ADC08D500 500 8 DUAL
ADC08500 500 8 SINGLE
ADC08D1000 1000 8 DUAL
ADC081000 1000 8 SINGLE
ADC08D1500 1500 8 DUAL
ADC081500 1500 8 SINGLE
ADC08(B)3000 3000 8 SINGLE
ADC08L060 60 8 SINGLE
ADC08060 60 8 SINGLE
ADC10DL065 65 10 DUAL
ADC10065 65 10 SINGLE
ADC10080 80 10 SINGLE
ADC08100 100 8 SINGLE
ADCS9888 170 8 SINGLE
ADC08(B)200 200 8 SINGLE
ADC11C125 125 11 SINGLE
ADC11C170 170 11 SINGLE
www.national.com 18
Physical Dimensions inches (millimeters) unless otherwise noted
LMH6514
16-Pin Package
NS Package Number SQA16A
19 www.national.com
Notes
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