National Semiconductor LMH6502 Technical data

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LMH6502 Wideband, Low Power, Linear-in-dB Variable Gain Amplifier
LMH6502 Wideband, Low Power, Linear-in-dB Variable Gain Amplifier
June 2004
General Description
The LMH™6502 is a wideband DC coupled differential input voltage controlled gain stage followed by a high-speed cur­rent feedback Op Amp which can directly drive a low imped­ance load. Gain adjustment range is more than 70dB for up to 10MHz.
Maximum gain is set by external components and the gain can be reduced all the way to cut-off. Power consumption is 300mW with a speed of 130MHz. Output referred DC offset voltage is less than 350mV over the entire gain control voltage range. Device-to-device Gain matching is within
±
0.6dB at maximum gain. Furthermore, gain at any VGis tested and the tolerance is guaranteed. The output current feedback Op Amp allows high frequency large signals (Slew Rate = 1800V/µs) and can also drive heavy load current (75mA). Differential inputs allow common mode rejection in low level amplification or in applications where signals are carried over relatively long wires. For single ended opera­tion, the unused input can easily be tied to ground (or to a virtual half-supply in single supply application). Inverting or non-inverting gains could be obtained by choosing one input polarity or the other.
To provide ease of use when working with a single supply,
range is set to be from 0V to +2V relative to pin 11
V
G
potential (ground pin). In single supply operation, this ground pin is tied to a "virtual" half supply.
LMH6502 gain control is linear in dB for a large portion of the total gain control range. This makes the device suitable for AGC circuits among other applications. For linear gain con­trol applications, see the LMH6503 datasheet. The LMH6502 is available in the SOIC-14 and TSSOP-14 pack­age.
Features
VS=±5V, TA= 25˚C, RF=1kΩ,RG= 174,RL= 100,A =A
n -3dB BW 130MHz n Gain control BW 100MHz n Adjustment range (typical over temp) 70dB n Gain matching (limit) n Slew rate 1800V/µs n Supply current (no load) 27mA n Linear output current n Output voltage (R n Input voltage noise 7.7nV/ n Input current noise 2.4pA/ n THD (20MHz, RL= 100,VO=2VPP) −53dBc n Replacement for CLC520
= 10 Typical values unless specified.
V(MAX)
= 100)
L
±
0.6dB
±
75mA
±
3.2V
Applications
n Variable attenuator n AGC n Voltage controller filter n Video imaging processing
V
Gain vs. VGfor Various Temperature
20067706
LMH™is a trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation DS200677 www.national.com
Typical Application
A
= 10V/V
VMAX
20067737
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
LMH6502
Distributors for availability and specifications.
Junction Temperature +150˚C
Soldering Information:
Infrared or Convection (20 sec) 235˚C
Wave Soldering (10 sec) 260˚C
ESD Tolerance (Note 4):
Human Body 2KV
Machine Model 200V
±
Input Current
V
Differential
IN
10mA
±
(V+-V−)
Output Current 120mA (Note 3)
Supply Voltages (V
Voltage at Input/ Output pins V
+-V−
) 12.6V
+
+0.8V,V−- 0.8V
Operating Ratings (Note 1)
Supply Voltages (V
Temperature Range −40˚C to +85˚C
Thermal Resistance: (θ
14-Pin SOIC 45˚C/W 138˚C/W
14-Pin TSSOP 51˚C/W 160˚C/W
+-V−
) 5Vto12V
)(θJA)
JC
Storage Temperature Range −65˚C to +150˚C
Electrical Characteristics(Note 2)
Unless otherwise specified, all limits guaranteed for TJ= 25˚C, VS=±5V, A V
=±0.1V, RL= 100,VG= +2V. Boldface limits apply at the temperature extremes.
IN_DIFF
Symbol Parameter Conditions
Frequency Domain Response
BW -3dB Bandwidth V
GF Gain Flatness V
<
0.5
OUT
V
OUT
OUT
<
0.5PP,A
<
0.5V
PP
= 100 50
V(MAX)
PP
0.6V VG≤ 2V,±0.3dB
Att Range Flat Band (Relative to Max Gain)
Attenuation Range (Note 14)
BW
Gain control Bandwidth V
±
0.2dB, f<30MHz 16
±
0.1dB, f<30MHz 7.5
= 1V (Note 13) 100 MHz
G
Control
PL Linear Phase Deviation DC to 60MHz 1.5 deg
G Delay Group Delay DC to 130MHz 2.5 ns
CT (dB) Feed-through V
= 0V, 30MHz (Output
G
Referred)
GR Gain Adjustment Range f<10MHz 72
<
f
30MHz 67
Time Domain Response
t
r,tf
Rise and Fall Time 0.5V Step 2.2 ns
OS % Overshoot 0.5V Step 10 %
SR Slew Rate 4V Step 1800 V/µs
G Rate Gain Change Rate V
= 0.3V, 10%-90% of Final
IN
Output
Distortion & Noise Performance
HD2 2
HD3 3
THD Total Harmonic Distortion 2V
nd
Harmonic Distortion 2VPP, 20MHz −55 dBc
rd
Harmonic Distortion 2VPP, 20MHz −57 dBc
, 20MHz −53 dBc
PP
En tot Total Equivalent Input Noise 1MHz to 150MHz 7.7 nV/
I
N
Input Noise Current 1MHz to 150MHz 2.4 pA/
DG Differential Gain f = 4.43MHz, RL= 150,
Neg. Sync
DP Differential Phase f = 4.43MHz, R
= 150,
L
Neg. Sync
= 10, VCM= 0V, RF=1kΩ,RG= 174,
V(MAX)
Min
(Note 6)
Typ
(Note 6)
(Note 6) Units
130
30 MHz
−47 dB
4.8 dB/ns
0.34 %
0.10 deg
Max
MHz
dB
dB
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Electrical Characteristics(Note 2) (Continued)
Unless otherwise specified, all limits guaranteed for TJ= 25˚C, VS=±5V, A V
Symbol Parameter Conditions
DC & Miscellaneous Performance
GACCU Gain Accuracy (See Application
G Match Gain Matching (See Application
K Gain Multiplier
V
CM
V
IN_DIFF
I
RG_MAX
I
BIAS
TC I
I
OFF
TC I
R
IN
C
IN
I
VG
TC I
R
VG
C
VG
V
OUT
R
OUT
I
OUT
V
O
OFFSET
+PSRR +Power Supply Rejection Ratio
−PSRR −Power Supply Rejection Ratio
CMRR Common Mode Rejection Ratio
I
S
=±0.1V, RL= 100,VG= +2V. Boldface limits apply at the temperature extremes.
IN_DIFF
V
= 2.0V 0.0 +0.6
G
Note)
Note)
<
1V
V
1
G
<
V
2V +0.6/−0.3 +3.1/−3.6
G
= 2.0V
<
<
V
2V +2.8/−3.9
G
(See Application Notes)
Input Voltage Range Pin3&6Common Mode,
>
|CMRR|
55dB (Note 9)
Differential Input Voltage Between pins3&6
RGCurrent Pins4&5
Bias Current Pins 3 & 6(Note 7) 9 18
Pins3&6(Note 7),
=±2.5V
V
S
Bias Current Drift Pin 3 & 6(Note 8) 100 nA/˚C
BIAS
Offset Current Pin3&6 0.01 2.0
Offset Current Drift (Note 8) 5 nA/˚C
OFF
Input Resistance Pin3&6 750 k
Input Capacitance Pin3&6 5 pF
VGBias Current Pin 2, VG= 0V(Note 7) −300 µA
VGBias Drift Pin 2(Note 8) 20 nA/˚C
VG
VGInput Resistance Pin 2 10 k
VGInput Capacitance Pin 2 1.3 pF
Output Voltage Range RL= 100
= Open
R
L
Output Impedance DC 0.1
Output Current V
Output Offset Voltage 0V<V
=±4V from Rails
OUT
<
2V
G
Input Referred, 1V change,
(Note 10)
V
= 2.2V
G
Input Referred, 1V change,
(Note 10)
(Note 9)
= 2.2V
V
G
Input Referred,V
<
<
−1.8V
V
CM
=2V
G
1.8V
Supply Current No Load 27 38
=±2.5V, RL= Open 9.3 16
V
S
= 10, VCM= 0V, RF=1kΩ,RG= 174,
V(MAX)
Min
(Note 6)
1.61
Typ
(Note 6)
(Note 6) Units
1.72 1.84
1.58
±
±
±
±
±
1.70
±
0.12
1.70
1.56
2.0
0.3
±
2.2 V
±
0.39
±
2.22 mA
2.5 5
±
±
±
±
3.00
2.95
3.95
3.82
±
80
±
75
±
3.20
±
4.00
±
90 mA
±
80
−69 −47
−58 −41
−72 dB
Max
±
0.6
1.91
20
6
3.6
±
300
±
380
−45
−40
41
19
LMH6502
dB
dB
V/V
V
µA
µA
V
mV
dB
dB
mA
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Electrical Characteristics(Note 2) (Continued)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
LMH6502
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device such that T
Note 3: The maximum output current (I
Note 4: Human body model: 1.5kin series with 100pF. Machine model: 0in series with 200pF.
Note 5: Slew Rate is the average of the rising and falling rates.
Note 6: Typical values represent the most likely parametric norm. Bold numbers refer to over temperature limits.
Note 7: Positive current corresponds to current flowing in the device.
Note 8: Drift determined by dividing the change in parameter distribution average at temperature extremes by the total temperature change.
Note 9: CMRR definition: [|V
Note 10: +PSRR definition: [|V
Note 11: Gain/Phase normalized to low frequency value at 25˚C.
Note 12: Gain/Phase normalized to low frequency value at each A
Note 13: Gain Control Frequency Response Schematic:
. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T
J=TA
OUT
OUT
) is determined by device power dissipation limitations or value specified, whichever is lower.
OUT
/VCM|/AV] with 0.1V differential input voltage.
/V+|/AV], −PSRR definition: [|V
/V−|/AV] with 0.1V differential input voltage.
OUT
.
V
>
TA.
J
20067738
Note 14: Flat Band Attenuation (Relative to Max Gain) Range Definition: Specified as the attenuation range from maximum which allows gain flatness specified
±
(either
0.2dB or±0.1dB) relative to A
±
0.2dB 20dB down to 4dB = 16dB range
±
0.1dB 20dB down to 12.5 dB = 7.5dB range
gain. For example, for f<30MHz, here are the Flat Band Attenuation ranges:
VMAX
Connection Diagram
14-Pin SOIC/TSSOP
Top View
20067736
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
14-pin SOIC LMH6502MA LMH6502MA 55 Units/Rail M14A
LMH6502MAX 2.5k Units Tape and Reel
14-Pin TSSOP
LMH6502MT
LMH6502MTX 2.5k Units Tape and Reel
LMH6502MT
94 Units/Rail
MTC14
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LMH6502
Typical Performance Characteristics Unless otherwise specified: V
= 0V, RF=1kΩ,RG= 174, both inputs terminated in 50,RL= 100, Typical values, results referred to device output.
V
CM
Small Signal Frequency for Various V
G
20067731
Frequency Response Over Temperature (AV= 10) Frequency Response for Various VG(A
Large Signal Frequency for Various V
=±5V, 25˚C, VG=V
S
VMAX
GMAX
G
20067732
= 10)
,
Frequency Response for Various VG(A
±
2.5V) Small Signal Frequency Response for Various A
(
20067707 20067708
= 10)
VMAX
20067714
VMAX
20067723
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Typical Performance Characteristics Unless otherwise specified: V
=±5V, 25˚C, VG=V
S
= 0V, RF=1kΩ,RG= 174, both inputs terminated in 50,RL= 100, Typical values, results referred to device output. (Continued)
LMH6502
GMAX,VCM
Large Signal Frequency Response for Various A
20067724
Frequency Response for Various VG(A
VMAX
= 100)
(Large Signal) I
VMAX
Frequency Response for Various VG(A
(Small Signal)
vs. V
S
S
VMAX
= 100)
20067729
20067730
ISvs. V
S
20067751
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Input Bias Current vs. V
20067750
S
20067752
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