National Semiconductor LMH0356 Technical data

August 19, 2008

LMH0356
3 Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4
EQs

LMH0356 3 Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs

General Description

The LMH0356 3 Gbps HD/SD SDI Reclocker with 4:1 Input
Mux and FR4 EQs retimes serial digital video data conforming
to the SMPTE 424M, SMPTE 292M, and SMPTE 259M (C)
standards. The LMH0356 operates at serial data rates of 270
Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps.
The LMH0356 supports DVB-ASI operation at 270 Mbps. The
LMH0356 includes an integrated 4:1 input multiplexer for se­lecting one of four input data streams for retiming. In addition,
the four inputs of the LMH0356 each have an FR4 equalizer
capable of equalizing 0-30” of FR4 trace length.

The LMH0356 automatically detects the incoming data rate
and adjusts itself to retime the incoming data to suppress ac­cumulated jitter. The LMH0356 recovers the serial data-rate
clock and optionally provides it as an output. The LMH0356
has two differential serial data outputs; the second output may
be selected as a low-jitter, data-rate clock output. Controls
and indicators are: serial clock or second serial data output
select, manual rate select input, SD/HD rate indicator output,
lock detect output, auto/manual data bypass, output mute,
and device enable. The serial data inputs, outputs, and serial
clock outputs are differential LVPECL compatible. The CML
serial data and serial clock outputs are suitable for driving
100Ω differentially terminated networks. The control logic in­puts and outputs are LVCMOS compatible.

The LMH0356 is powered from a single 3.3V supply. Power
dissipation is typically 430 mW. The device is housed in a 48­pin LLP (also known as QFN) package.

Features

Supports SMPTE 424M, SMPTE 292M, and SMPTE

■

259M (C) serial digital video standards
Supports 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967

■

Gbps, and 2.97 Gbps serial data rate operation
Supports DVB-ASI at 270 Mbps

■

Single 3.3V supply operation

■

430 mW typical power consumption

■

Integrated 4:1 multiplexed input

■

0-30” FR4 equalizer on each multiplexed input

■

Two differential, reclocked outputs

■

Choice of second reclocked output or recovered clock

■

output
Single 27 MHz external crystal or reference clock input

■

Manual rate select input

■

SD/HD operating rate indicator output

■

Lock Detect indicator output

■

Output mute function for data and clock

■

Auto/Manual reclocker bypass

■

Power saver mode with device power down control

■

(10 mW typical power consumption in disabled state)
Differential LVPECL compatible serial data inputs and

■

outputs
LVCMOS control inputs and indicator outputs

■

48-Pin LLP package

■

Industrial temperature range: -40°C to +85°C

■

Footprint compatible with the LMH0056 and LMH0036

■

Applications

SDTV/HDTV and 3 Gbps serial digital video interfaces for:

■

Digital video routers and switchers

—

Digital video processing and editing equipment

—

DVB-ASI equipment

—

Video standards and format converters

—

2.97 Gbps Signal Before FR4
Equalization (0.6 UI Jitter)

30016710

© 2008 National Semiconductor Corporation 300167 www.national.com

2.97 Gbps Signal After FR4
Equalization (0.23 UI Jitter)

30016711

2.97 Gbps Signal After Reclocking
(0.06 UI Jitter)

30016712

Typical Application

LMH0356

Block Diagram

30016701

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30016703

Pin Descriptions

Pin Name Description

1 SDI0 Data Input 0 True.

2 SDI0 Data Input 0 Complement.

4 SDI1 Data Input 1 True.

5 SDI1 Data Input 1 Complement.

7 SDI2 Data Input 2 True.

8 SDI2 Data Input 2 Complement.

9 ENABLE Device Enable. Powers down device when low. This pin has an internal pullup.

10 SDI3 Data Input 3 True.

11 SDI3 Data Input 3 Complement.

15 BYPASS/AUTO BYPASS Bypass/Auto Bypass mode select. Bypasses reclocking when high. This pin has an

internal pulldown.

16 OUTPUT MUTE Data and Clock Output Mute input. Mutes the output when low. This pin has an internal

pullup.

18 XTAL IN/EXT CLK Crystal or External Oscillator input.

22 XTAL OUT Crystal Oscillator output.

24 LOCK DETECT PLL Lock Detect output (active high).

28 SCO/SDO2 Serial Clock or Serial Data Output 2 Complement.

29 SCO/SDO2 Serial Clock or Serial Data Output 2 True.

32 SDO Data Output Complement.

33 SDO Data Output True.

36 SD/HD Data Rate Range output. Output is high for SD and low for HD or 3G.

37 SCO_EN Serial Clock or Serial Data 2 Output select. Sets second output to output the clock when

high and the data when low. This pin has an internal pulldown.

43 LF1 Loop Filter.

44 LF2 Loop Filter.

45 RATE0 Data Rate select input. This pin has an internal pulldown.

46 RATE1 Data Rate select input. This pin has an internal pulldown.

47 SEL0 Data Input select input. This pin has an internal pulldown.

48 SEL1 Data Input select input. This pin has an internal pulldown.

3, 6, 12, 14, 30,

31, 34, 35,

DAP, 13, 17,
19, 20, 21, 23,
25, 26, 27, 38,

39, 40, 41, 42

V

CC

V

EE

Positive power supply input.

Negative power supply input.

LMH0356

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Connection Diagram

LMH0356

The exposed die attach pad is the primary negative electrical terminal for this device. It must be connected to the negative power supply voltage.

48-Pin LLP

Order Number LMH0356SQ

See NS Package Number SQA48A

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30016702

LMH0356

Absolute Maximum Ratings (Note 1)

It is anticipated that this device will not be offered in a
military qualified version. If Military/Aerospace specified

devices are required, please contact the National Semicon­ductor Sales Office/Distributors for availability and specifica­tions.

Supply Voltage (VCC–VEE)

Logic Supply Voltage (Vi) VEE−0.15V to V

Logic Input Current (single input):
Vi = VEE−0.15V

Vi = VCC+0.15V

Logic Output Voltage (Vo) VEE−0.15V to V

Logic Output Source/Sink Current ±8 mA
Serial Data Input Voltage (V

Serial Data Output Sink Current (I

) VCC to VCC−2.0V

SDI

)

SDO

4.0V

CC

+0.15V

−5 mA

+5 mA

CC

+0.15V

24 mA

Storage Temp. Range −65°C to +150°C
Junction Temperature +125°C
Lead Temperature (Soldering 4 Sec) +260°C (Pb-free)
ESD Rating (HBM) 8 kV
ESD Rating (MM) 400V
ESD Rating (CDM) 1250V

Recommended Operating Conditions

Supply Voltage (VCC–VEE)

Logic Input Voltage VEE to V

Differential Serial Input Voltage 800 mV ±10%
Serial Data or Clock Output Sink

Current (ISO)

Operating Free Air Temperature (TA)

3.3V ±5%

16 mA max.

−40°C to +85°C

Package Thermal Resistance

 θJA 48-pin LLP

 θJC 48-pin LLP

24°C/W

1.5°C/W

DC Electrical Characteristics

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 2, 3)

Symbol Parameter Conditions Reference Min Typ Max Units

V

V

V

V

V

V

V

V

V

SDOD

SCOD

I

Input Voltage High Level Logic inputs

IH

Input Voltage Low Level V

IL

I

Input Current High Level VIH = V

IH

I

Input Current Low Level VIL = V

IL

Output Voltage High Level IOH = −2 mA Logic outputs

OH

Output Voltage Low Level IOL = +2 mA

OL

Serial Input Voltage,

SDID

CC

EE

(Note 8) SDI

Differential

Input Common Mode

CMI

V

= 200 mV, (Note 8)

SDID

Voltage

Serial Data Output

100Ω differential load

SDO

Voltage, Differential

Serial Clock Output
Voltage, Differential

Output Common Mode

CMO

100Ω differential load,

2970 Mbps, (Note 8)

100Ω differential load

SCO

SDO, SCO

Voltage

Power Supply Current,

CC

3.3V supply, Total

2970 Mbps, device
enabled

Device disabled
(ENABLE = 0)

2

EE

0.8 V

V

CC

47 65 µA

−18 −25 µA

2 V

VEE + 0.6

200 1600

VEE+1.2

VCC−0.2

620 750 880

400 525 650

VCC−

V

SDOD

V

130 150 mA

3 mA

mV

mV

mV

V

V

P-P

V

P-P

P-P

CC

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