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LMC6482
CMOS Dual Rail-To-Rail Input and Output Operational
Amplifier
LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational Amplifier
November 1997
General Description
The LMC6482 provides a common-mode range that extends
to both supply rails. This rail-to-rail performance combined
with excellent accuracy, due to a high CMRR, makes it
unique among rail-to-rail input amplifiers.
It is ideal for systems, such as data acquisition, that require
a large input signal range. The LMC6482 is also anexcellent
upgrade for circuits using limited common-mode range amplifiers such as the TLC272 and TLC277.
Maximum dynamic signal range is assured in low voltage
and single supply systems by the LMC6482’s rail-to-rail output swing.TheLMC6482’srail-to-railoutput swing is guaranteed for loads down to 600Ω.
Guaranteed low voltage characteristics and low power dissipation make the LMC6482 especially well-suited for
battery-operated systems.
LMC6482 is also available in MSOP package which is almost half the size of a SO-8 device.
See the LMC6484 data sheet for a Quad CMOS operational
amplifier with these same features.
3V Single Supply Buffer Circuit
Rail-To-Rail Input
Features
(Typical unless otherwise noted)
n Rail-to-Rail Input Common-Mode Voltage Range
(Guaranteed Over Temperature)
n Rail-to-Rail Output Swing (within 20 mV of supply rail,
100 kΩ load)
n Guaranteed 3V, 5V and 15V Performance
n Excellent CMRR and PSRR: 82 dB
n Ultra Low Input Current: 20 fA
n High Voltage Gain (R
n Specified for 2 kΩ and 600Ω loads
n Available in MSOP Package
=
500 kΩ): 130 dB
L
Applications
n Data Acquisition Systems
n Transducer Amplifiers
n Hand-held Analytic Instruments
n Medical Instrumentation
n Active Filter, Peak Detector, Sample and Hold, pH
Meter, Current Source
n Improved Replacement for TLC272, TLC277
Rail-To-Rail Output
DS011713-2
DS011713-1
DS011713-3
Connection Diagram
DS011713-4
© 1999 National Semiconductor Corporation DS011713 www.national.com
Ordering Information
Package Temperature Range NSC
Military Industrial
−55˚C to +125˚C −40˚C to +85˚C
8-Pin LMC6482MN LMC6482AIN, N08E Rail LMC6482MN,
Molded DIP LMC6482IN LMC6482AIN, LMC6482IN
8-pin LMC6482AIM, M08A Rail LMC6482AIM, LMC6482IM
Small Outline LMC6482IM Tape and Reel
8-pin LMC6482AMJ/883 J08A Rail LMC6482AMJ/883Q5962-9453401MPA
Ceramic DIP
8-pin LMC6482IMM MUA08A Rail A10
Mini SO Tape and Reel
Drawing
Transport
Media
Package Marking
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2) 1.5 kV
Differential Input Voltage
Voltage at Input/Output Pin (V
Supply Voltage (V
+−V−
) 16V
Current at Input Pin (Note 12)
Current at Output Pin
(Notes 3, 8)
Current at Power Supply Pin 40 mA
Lead Temperature
(Soldering, 10 sec.) 260˚C
±
Supply Voltage
+
) +0.3V, (V−) −0.3V
±
5mA
±
30 mA
Storage Temperature Range −65˚C to +150˚C
Junction Temperature (Note 4) 150˚C
Operating Ratings (Note 1)
Supply Voltage 3.0V ≤ V+ ≤ 15.5V
Junction Temperature Range
LMC6482AM −55˚C ≤ T
LMC6482AI, LMC6482I −40˚C ≤ T
Thermal Resistance (θ
)
JA
N Package, 8-Pin Molded DIP 90˚C/W
M Package, 8-Pin Surface Mount 155˚C/W
MSOP package, 8-Pin Mini SO 194˚C/W
≤ +125˚C
J
≤ +85˚C
J
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
limits apply at the temperature extremes.
Symbol Parameter Conditions Typ
V
TCV
Input Offset Voltage 0.11 0.750 3.0 3.0 mV
OS
Input Offset Voltage 1.0 µV/˚C
OS
=
J
25˚C, V
+
=
(Note 5)
5V, V
Average Drift
I
I
C
Input Current (Note 13) 0.02 4.0 4.0 10.0 pA
B
Input Offset Current (Note 13) 0.01 2.0 2.0 5.0 pA
OS
Common-Mode 3 pF
IN
Input Capacitance
R
IN
Input Resistance
CMRR Common Mode 0V ≤ V
+
=
Rejection Ratio V
15V 67 62 60
0V ≤ V
+
=
V
5V 67 62 60
+PSRR Positive Power Supply 5V ≤ V
Rejection Ratio V
=
O
−PSRR Negative Power Supply −5V ≤ V
Rejection Ratio V
V
Input Common-Mode V
CM
=
O
+
=
5V and 15V V
≤ 15.0V 82 70 65 65 dB
CM
≤ 5.0V 82 70 65 65
CM
+
≤ 15V, V
−
=
0V 82 70 65 65 dB
2.5V 67 62 60 min
−
≤ −15V, V
+
=
0V 82 70 65 65 dB
−2.5V 67 62 60 min
>
−
− 0.3 − 0.25 − 0.25 − 0.25 V
Voltage Range For CMRR ≥ 50 dB 000max
+
V
+ 0.3V V++ 0.25 V++ 0.25 V++ 0.25 V
A
Large Signal R
V
=
2kΩ Sourcing 666 140 120 120 V/mV
L
Voltage Gain (Notes 7, 13) 84 72 60 min
Sinking 75 35 35 35 V/mV
=
R
600Ω Sourcing 300 80 50 50 V/mV
L
(Notes 7, 13) 48 30 25 min
Sinking 35 20 15 15 V/mV
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
1M. Boldface
L
LMC6482AI LMC6482I LMC6482M Units
Limit Limit Limit
(Note 6) (Note 6) (Note 6)
1.35 3.7 3.8 max
max
max
10 TeraΩ
min
+
V
+
V
+
V
min
20 20 18 min
13 10 8 min
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DC Electrical Characteristics (Continued)
25˚C, V
+
=
5V, V
(Note 5)
0.1 0.18 0.18 0.18 V
0.3 0.5 0.5 0.5 V
0.16 0.32 0.32 0.32 V
0.5 1.0 1.0 1.0 V
Unless otherwise specified, all limits guaranteed for T
limits apply at the temperature extremes.
=
J
Symbol Parameter Conditions Typ
+
V
I
Output Swing V
O
Output Short Circuit Sourcing, V
SC
=
5V 4.9 4.8 4.8 4.8 V
=
R
2kΩto V
L
+
=
V
5V 4.7 4.5 4.5 4.5 V
=
R
600Ω to V
L
+
=
V
15V 14.7 14.4 14.4 14.4 V
=
R
2kΩto V
L
+
=
V
15V 14.1 13.4 13.4 13.4 V
=
R
600Ω to V
L
+
/2 4.7 4.7 4.7 min
+
/2 4.24 4.24 4.24 min
+
/2 14.2 14.2 14.2 min
+
/2 13.0 13.0 13.0 min
=
0V 20 16 16 16 mA
O
Current 12 12 10 min
+
=
V
5V Sinking, V
I
Output Short Circuit Sourcing, V
SC
=
5V 15 11 11 11 mA
O
=
0V 30 28 28 28 mA
O
Current 22 22 20 min
+
=
V
15V Sinking, V
=
12V 30 30 30 30 mA
O
(Note 8) 24 24 22 min
I
Supply Current Both Amplifiers 1.0 1.4 1.4 1.4 mA
S
+
=
V
+5V, V
+
=
/2 1.8 1.8 1.9 max
V
O
Both Amplifiers 1.3 1.6 1.6 1.6 mA
+
=
V
15V, V
O
+
=
/2
V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
1M. Boldface
L
LMC6482AI LMC6482I LMC6482M Units
Limit Limit Limit
(Note 6) (Note 6) (Note 6)
0.24 0.24 0.24 max
0.65 0.65 0.65 max
0.45 0.45 0.45 max
1.3 1.3 1.3 max
9.5 9.5 8.0 min
1.9 1.9 2.0 max
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
limits apply at the temperature extremes.
Symbol Parameter Conditions Typ
=
J
25˚C, V
+
=
5V, V
(Note 5)
−
=
0V, V
CM
+
=
=
/2, and R
V
V
O
>
1M. Boldface
L
LMC6482AI LMC6482I LMC6482M Units
Limit Limit Limit
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 9) 1.3 1.0 0.9 0.9 V/µs
0.7 0.63 0.54 min
+
=
GBW Gain-Bandwidth Product V
φ
G
Phase Margin 50 Deg
m
Gain Margin 15 dB
m
15V 1.5 MHz
Amp-to-Amp Isolation (Note 10) 150 dB
e
i
n
Input-Referred F=1 kHz 37 nV/√Hz
n
Voltage Noise V
=
1V
cm
Input-Referred F=1 kHz 0.03 pA/√Hz
Current Noise
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AC Electrical Characteristics (Continued)
25˚C, V
=
−2
=
4.1 V
=
−2
=
8.5 V
PP
PP
+
=
5V, V
(Note 5)
0.01
0.01
Unless otherwise specified, all limits guaranteed for T
limits apply at the temperature extremes.
=
J
Symbol Parameter Conditions Typ
T.H.D. Total Harmonic Distortion F=10 kHz, A
=
R
L
F=10 kHz, A
=
R
L
+
=
V
10 kΩ,V
10 kΩ,V
10V
V
O
V
O
−
=
0V, V
CM
+
=
=
/2, and R
V
V
O
>
1M. Boldface
L
LMC6482AI LMC6482I LMC6482M Units
Limit Limit Limit
(Note 6) (Note 6) (Note 6)
%
%
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
Symbol Parameter Conditions Typ
V
OS
TCV
Input Offset Voltage 0.9 2.0 3.0 3.0 mV
Input Offset Voltage 2.0 µV/˚C
OS
=
J
25˚C, V
+
=
(Note 5)
Average Drift
I
B
I
OS
CMRR Common Mode 0V ≤ V
Input Bias Current 0.02 pA
Input Offset Current 0.01 pA
≤ 3V 74 64 60 60 dB
CM
Rejection Ratio min
PSRR Power Supply 3V ≤ V
+
≤ 15V, V
−
=
0V 80 68 60 60 dB
Rejection Ratio min
V
CM
Input Common-Mode For CMRR ≥ 50 dB V−−0.25 0 0 0 V
Voltage Range max
+
V
+ 0.25 V
2kΩto V
+
/2 2.8 V
V
O
Output Swing R
=
L
0.2 V
R
L
=
600Ω to V
+
/2 2.7 2.5 2.5 2.5 V
0.37 0.6 0.6 0.6 V
I
S
Supply Current Both Amplifiers 0.825 1.2 1.2 1.2 mA
3V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
L
LMC6482AI LMC6482I LMC6482M Units
Limit Limit Limit
(Note 6) (Note 6) (Note 6)
2.7 3.7 3.8 max
+
+
V
1.5 1.5 1.6 max
1M.
V
+
V
min
min
max
AC Electrical Characteristics
Unless otherwise specified, V
Symbol Parameter Conditions Typ
+
=
3V, V
−
=
0V, V
CM
+
=
=
/2, and R
V
V
O
>
L
(Note 5)
1M.
LMC6482AI LMC6482I LMC6482M Units
Limit Limit Limit
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 11) 0.9 V/µs
GBW Gain-Bandwidth Product 1.0 MHz
=
T.H.D. Total Harmonic Distortion F=10 kHz, A
=
R
10 kΩ,V
Note 1: Absolute Maximum Ratings indicate limts beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩ in series with 100 pF. All pins rated per method 3015.6 of MIL-STD-883. This is a Class 1 device rating.
L
−2 0.01
V
=
2V
O
PP
%
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AC Electrical Characteristics (Continued)
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C. Output currents in excess of
Note 4: The maximum power dissipation is a function of T
−TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
+
Note 7: V
Note 8: Do not short circuit output to V
Note 9: V
Note 10: Input referred, V
Note 11: Connected as voltage Follower with 2V step input. Number specified is the slower of either the positive or negative slew rates.
Note 12: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Note 13: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
Note 14: For guaranteed Military Temperature parameters see RETS6482X.
=
+
=
=
15V, V
15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of either the positive or negative slew rates.
CM
7.5V and R
+
connected to 7.5V. For Sourcing tests, 7.5V ≤ VO≤ 11.5V. For Sinking tests, 3.5V ≤ VO≤ 7.5V.
L
+
, when V+is greater than 13V or reliability will be adversely affected.
=
15V and R
=
100 kΩ connected to 7.5V. Each amp excited in turn with 1 kHz to produce V
L
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is P
J(max)
±
30 mA over long term may adversely affect reliability.
=
O
12 V
=
(T
D
J(max)
.
PP
Typical Performance Characteristics V
specified
Supply Current vs
Supply Voltage
DS011713-40
Sourcing Current vs
Output Voltage
Input Current vs
Temperature
Sourcing Current vs
Output Voltage
=
+15V, Single Supply, T
S
DS011713-41
=
25˚C unless otherwise
A
Sourcing Current vs
Output Voltage
Sinking Current vs
Output Voltage
DS011713-42
DS011713-43
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DS011713-44
DS011713-45
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Sinking Current vs
Output Voltage
Input Voltage Noise
vs Frequency
Input Voltage Noise
vs Input Voltage
DS011713-46
DS011713-49
Sinking Current vs
Output Voltage
Input Voltage Noise
vs Input Voltage
Crosstalk Rejection
vs Frequency
DS011713-47
DS011713-50
Output Voltage Swing vs
Supply Voltage
DS011713-48
Input Voltage Noise
vs Input Voltage
DS011713-51
DS011713-52
DS011713-53
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Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Crosstalk Rejection
vs Frequency
CMRR vs
Frequency
CMRR vs
Input Voltage
DS011713-54
DS011713-57
Positive PSRR
vs Frequency
CMRR vs
Input Voltage
∆V
OS
vs CMR
DS011713-55
DS011713-58
Negative PSRR
vs Frequency
CMRR vs
Input Voltage
∆V
OS
vs CMR
DS011713-56
DS011713-59
DS011713-60
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DS011713-61
DS011713-62
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Input Voltage vs
Output Voltage
Open Loop
Frequency Responce
Gain and Phase vs
Capacitive Load
DS011713-63
DS011713-66
Input Voltage vs
Output Voltage
Open Loop Frequency
Response vs Temperature
Gain and Phase vs
Capacitive Load
DS011713-64
DS011713-67
Open Loop
Frequency Response
DS011713-65
Maximum Output Swing
vs Frequency
DS011713-68
Open Loop Output
Impedance vs Frequency
DS011713-69
DS011713-70
DS011713-71
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Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Open Loop Output
Impedance vs Frequency
Non-Inverting Large
Signal Pulse Response
Non-Inverting Small
Signal Pulse Response
DS011713-72
DS011713-75
Slew Rate vs
Supply Voltage
Non-Inverting Large
Signal Pulse Response
Non-Inverting Small
Signal Pulse Response
DS011713-73
DS011713-76
Non-Inverting Large
Signal Pulse Response
DS011713-74
Non-Inverting Small
Signal Pulse Response
DS011713-77
Inverting Large
Signal Pulse Response
DS011713-78
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DS011713-79
DS011713-80
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Inverting Large Signal
Pulse Response
Inverting Small Signal
Pulse Response
Stability vs
Capacitive Load
DS011713-81
DS011713-84
Inverting Large Signal
Pulse Response
Inverting Small Signal
Pulse Response
Stability vs
Capacitive Load
DS011713-82
DS011713-85
Inverting Small Signal
Pulse Response
DS011713-83
Stability vs
Capacitive Load
DS011713-86
Stability vs
Capacitive Load
DS011713-87
DS011713-88
DS011713-89
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Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Stability vs
Capacitive Load
DS011713-90
Stability vs
Capacitive Load
Application Information
1.0 Amplifier Topology
The LMC6482 incorporates specially designed
wide-compliance range current mirrors and the body effect to
extend input common mode range to each supply rail.
Complementary paralleled differential input stages, like the
type used in other CMOS and bipolar rail-to-rail input amplifiers, were not used because of their inherent accuracy problems due to CMRR, cross-over distortion, and open-loop
gain variation.
The LMC6482’s input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
2.0 Input Common-Mode Voltage Range
Unlike Bi-FET amplifier designs, the LMC6482 does not exhibit phase inversion when an input voltage exceeds the
negative supply voltage.
ceeding both supplies with no resulting phase inversion on
the output.
Figure 1
shows an input voltage ex-
DS011713-91
DS011713-39
FIGURE 2. A±7.5V Input Signal Greatly
Exceeds the 3V Supply in
No Phase Inversion Due to R
Figure 3
Causing
I
Applications that exceed this rating must externally limit the
maximum input current to
as shown in
Figure 3
±
5 mA with an input resistor (RI)
.
DS011713-10
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6482 Power Supply Voltages with
No Output Phase Inversion
The absolute maximum input voltage is 300 mV beyond either supply rail at room temperature. Voltages greatly ex-
Figure 2
ceeding this absolute maximum rating, as in
, can
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
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DS011713-11
FIGURE 3. RIInput Current Protection for
Voltages Exceeding the Supply Voltages
3.0 Rail-To-Rail Output
The approximated output resistance of the LMC6482 is
180Ω sourcing and 130Ω sinking at Vs=3V and 110Ω
sourcing and 80Ω sinking at Vs=5V. Using the calculated
output resistance, maximum output voltage swing can be estimated as a function of load.
4.0 Capacitive Load Tolerance
The LMC6482 can typically directly drive a 100 pF load with
=
V
15V at unity gain without oscillating. The unity gain fol-
S
lower is the most sensitive configuration. Direct capacitive
loading reduces the phase margin of op-amps. The combi-
Application Information (Continued)
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an underdamped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in
nique is useful for isolating the capacitive inputs of multiplexers and A/D converters.
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
Figure 4
. This simple tech-
DS011713-17
DS011713-16
FIGURE 7. Pulse Response of
LMC6482 Circuit in
Figure 6
5.0 Compensating for Input
Capacitance
It is quite common to use large values of feedback resistance with amplifiers that have ultra-low input current, like
the LMC6482. Large feedback resistors can react with small
values of input capacitance due to transducers, photodiodes, and circuits board parasitics to reduce phase
margins.
DS011713-18
FIGURE 5. Pulse Response of
the LMC6482 Circuit in
Figure 4
Improved frequency response is achieved by indirectly driv-
Figure 6
ing capacitive loads, as shown in
.
DS011713-15
FIGURE 6. LMC6482 Noninverting Amplifier,
Compensated to Handle a 330 pF Capacitive Load
R1 and C1 serve to counteract the loss of phase margin by
feeding forward the high frequency component of the output
signal back to the amplifiers inverting input, thereby preserving phase margin in the overall feedback loop. The values of
R1 and C1 are experimentally determined for the desired
pulse response. The resulting pulse response can be seen in
Figure 7
.
DS011713-19
FIGURE 8. Canceling the Effect of Input Capacitance
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 8
), Cf, is first estimated by:
or
≤ R2C
R
1CIN
f
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a bread-board, so the actual optimum
value for C
checked on the actual circuit. (Refer to the LMC660 quad
may be different. The values of Cfshould be
f
CMOS amplifier data sheet for a more detailed discussion.)
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Application Information (Continued)
6.0 Printed-Circuit-Board Layout for High-Impedance
Work
It is generally recognized that any circuit which must operrate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low input current of the LMC6482, typically
less than 20 fA, it is essential to have an excellent layout.
Fortunately, the techniques of obtaining low leakages are
quite simple. First, the user must not ignore the surface leakage of the PC board, even through it may sometimes appear
acceptably low, because under conditions of high humidity or
dust or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LM6482’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs, as in
ure 9
. To have a significant effect, guard rings should be
placed on both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
12
Ω, which is normally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 250 times degradation from the LMC6482’s
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current. See
typical connections of guard rings for standard op-amp
configurations.
11
Ω would
Figure 10
Fig-
for
DS011713-21
Inverting Amplifier
DS011713-22
Non-Inverting Amplifier
DS011713-23
Follower
FIGURE 10. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring.
See
Figure 11
.
DS011713-20
FIGURE 9. Example of Guard Ring in P.C. Board
Layout
www.national.com 14
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
DS011713-24
FIGURE 11. Air Wiring
Application Information (Continued)
7.0 Offset Voltage Adjustment
Offset voltage adjustment circuits are illustrated in
Figure 13
. Large value resistances and potentiometers are
used to reduce power consumption while providing typically
±
2.5 mV of adjustment range, referred to the input, for both
configurations with V
=
±
5V.
S
FIGURE 12. Inverting Configuration
Offset Voltage Adjustment
Figure 12
DS011713-25
DS011713-26
FIGURE 13. Non-Inverting Configuration
Offset Voltage Adjustment
8.0 Upgrading Applications
The LMC6484 quads and LMC6482 duals have industry
standard pin outs to retrofit existing applications. System
performance can be greatly increased by the LMC6482’s
features. The key benefit of designing in the LMC6482 is increased linear signal range. Most op-amps have limited input common mode ranges. Signals that exceed this range
generate a non-linear output response that persists long after the input signal returns to the common mode range.
Linear signal range is vital in applications such as filters
where signal peaking can exceed input common mode
ranges resulting in output phase inverison or severe distortion.
9.0 Data Acquisition Systems
Low power, single supply data acquisition system solutions
are provided by buffering the ADC12038 with the LMC6482
(
Figure 14
). Capable of using the full supply range, the
LMC6482 does not require input signals to be scaled down
to meet limited common mode voltage ranges. The
LMC4282 CMRR of 82 dB maintains integral linearity of a
12-bit data acquisition system to
±
0.325 LSB. Other
rail-to-rail input amplifiers with only 50 dB of CMRR will degrade the accuracy of the data acquisition system to only 8
bits.
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Application Information (Continued)
FIGURE 14. Operating from the same
Supply Voltage, the LMC6482 buffers the
ADC12038 maintaining excellent accuracy
10.0 Instrumentation Circuits
The LMC6482 has the high input impedance, large
common-mode range and high CMRR needed for designing
instrumentation circuits. Instrumentation circuits designed
with the LMC6482 can reject a larger range of
common-mode signals than most in-amps. This makes instrumentation circuits designed with the LMC6482 an excellent choice of noisy or industrial environments. Other appli-
DS011713-28
cations that benefit from these features include analytic
medical instruments, magnetic field detectors, gas detectors,
and silicon-based tranducers.
A small valued potentiometer is used in series with R
the differential gain of the 3 op-amp instrumentation circuit in
Figure 15
. This combination is used instead of one large val-
g
to set
ued potentiometer to increase gain trim accuracy and reduce
error due to vibration.
FIGURE 15. Low Power 3 Op-Amp Instrumentation Amplifier
A 2 op-amp instrumentation amplifier designed for a gain of
100 is shown in
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Figure 16
. Low sensitivity trimming is made
DS011713-29
Application Information (Continued)
for offset voltage, CMRR and gain. Low cost and low power
consumption are the main advantages of this two op-amp
circuit.
FIGURE 16. Low-Power Two-Op-Amp Instrumentation Amplifier
11.0 Spice Macromodel
A spice macromodel is available for the LMC6482. This
model includes accurate simulation of:
Input common-mode voltage range
•
Frequency and transient response
•
GBW dependence on loading conditions
•
Quiescent and dynamic supply current
•
Output swing dependence on loading conditions
•
and many more characteristics as listed on the macromodel
disk.
Contact your local National Semiconductor sales office to
obtain an operational amplifier spice model library disk.
Higher frequency and larger common-mode range applications are best facilitated by a three op-amp instrumentation
amplifier.
DS011713-30
Typical Single-Supply Applications
DS011713-31
FIGURE 17. Half-Wave Rectifier
with Input Current Protection (RI)
DS011713-32
FIGURE 18. Half-Wave Rectifier Waveform
The circuit in
tify a sinusoid centered about ground. R
the amplifier caused by the input voltage exceeding the sup-
Figure 17
uses a single supply to half wave rec-
limits current into
I
ply voltage. Full wave rectification is provided by the circuit in
Figure 19
.
DS011713-33
FIGURE 19. Full Wave Rectifier
with Input Current Protection (R
)
I
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Typical Single-Supply Applications (Continued)
FIGURE 20. Full Wave Rectifier Waveform
DS011713-34
FIGURE 21. Large Compliance Range Current Source
FIGURE 22. Positive Supply Current Sense
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DS011713-35
DS011713-36
Typical Single-Supply Applications (Continued)
DS011713-37
FIGURE 23. Low Voltage Peak Detector with Rail-to-Rail Peak Capture Range
Figure 23
In
is primarily determined by the value of C
effect on droop.
The LMC6482’s high CMRR (82 dB) allows excellent accuracy throughout the circuit’s rail-to-rail dynamic capture range.
dielectric absorption and leakage is minimized by using a polystyrene or polyethylene hold capacitor. The droop rate
and diode leakage current. The ultra-low input current of the LMC6482 has a negligible
H
DS011713-38
FIGURE 24. Rail-to-Rail Sample and Hold
DS011713-27
FIGURE 25. Rail-to-Rail Single Supply Low Pass Filter
The low pass filter circuit in
Figure 25
can be used as an anti-aliasing filter with the same voltage supply as the A/D converter.
Filter designs can also take advantage of the LMC6482 ultra-low input current. The ultra-low input current yields negligible offset
error even when large value resistors are used. This in turn allows the use of smaller valued capacitors which take less board
space and cost less.
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Physical Dimensions inches (millimeters) unless otherwise noted
8-Pin Ceramic Dual-In-Line Package
Order Number LMC6482AMJ/883
NS Package Number J08A
Order Package Number LMC6482AIM or LMC6482IM
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8-Pin Small Outline Package
NS Package Number M08A
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Order Package Number LMC6482AIN, LMC6482IN or LMC6482MN
8-Pin Molded Dual-In-Line Package
NS Package Number N08E
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead Mini Small Outline Molded Package, JEDEC
Order Number LMC6482IMM, or LMC6482IMMX
NS Package Number MUA08A
LIFE SUPPORT POLICY
LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational Amplifier
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
labeling, can be reasonably expected to result in a
significant injury to the user.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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Email: europe.support@nsc.com
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