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LMC6082
Precision CMOS Dual Operational Amplifier
LMC6082 Precision CMOS Dual Operational Amplifier
December 1994
General Description
The LMC6082 is a precision dual low offset voltage operational amplifier, capable of single supply operation. Performance characteristics include ultra low input bias current,
high voltage gain, rail-to-rail output swing, and an input common mode voltage range that includes ground. These features, plus its low offset voltage, make the LMC6082 ideally
suited for precision circuit applications.
Other applications using the LMC6082 include precision
full-wave rectifiers, integrators, references, and
sample-and-hold circuits.
This device is built with National’s advanced Double-Poly
Silicon-Gate CMOS process.
For designs with more critical power demands, see the
LMC6062 precision dual micropower operational amplifier.
PATENT PENDING
Connection Diagram
8-Pin DIP/SO
Features
(Typical unless otherwise stated)
n Low offset voltage: 150 µV
n Operates from 4.5V to 15V single supply
n Ultra low input bias current: 10 fA
n Output swing to within 20 mV of supply rail, 100k load
n Input common-mode range includes V
n High voltage gain: 130 dB
n Improved latchup immunity
−
Applications
n Instrumentation amplifier
n Photodiode and infrared detector preamplifier
n Transducer amplifiers
n Medical instrumentation
n D/A converter
n Charge amplifier for piezoelectric transducers
DS011297-1
Top View
Ordering Information
Package Temperature Range NSC
Military Industrial
−55˚C to +125˚C −40˚C to +85˚C
8-Pin LMC6082AMN LMC6082AIN N08E Rail
Molded DIP LMC6082IN
8-Pin LMC6082AIM M08A Rail
Small Outline LMC6082IM Tape and Reel
For MIL-STD-883C qualified products, please contact your local National
Semiconductor Sales Office or Distributor for availability and specification
information.
© 1999 National Semiconductor Corporation DS011297 www.national.com
Drawing
Transport
Media
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the NationalSemiconductorSalesOffice/
Distributors for availability and specifications.
Differential Input Voltage
Voltage at Input/Output Pin (V
+−V−
Supply Voltage (V
Output Short Circuit to V
Output Short Circuit to V
) 16V
+
−
Lead Temperature
(Soldering, 10 Sec.) 260˚C
Storage Temp. Range −65˚C to +150˚C
Junction Temperature 150˚C
ESD Tolerance (Note 4) 2 kV
±
Supply Voltage
+
) +0.3V,
−
) −0.3V
(V
(Note 11)
(Note 2)
±
Current at Input Pin
Current at Output Pin
10 mA
±
30 mA
Current at Power Supply Pin 40 mA
Power Dissipation (Note 3)
Operating Ratings (Note 1)
Temperature Range
LMC6082AM −55˚C ≤ T
LMC6082AI, LMC6082I −40˚C ≤ T
Supply Voltage 4.5V ≤ V
Thermal Resistance (θ
) (Note 12)
JA
8-Pin Molded DIP 115˚C/W
8-Pin SO 193˚C/W
Power Dissipation (Note 10)
≤ +125˚C
J
≤ +85˚C
J
+
≤ 15.5V
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
=
0V, V
=
1.5V, V
CM
=
2.5V and R
O
>
1M unless otherwise specified.
L
=
25˚C. Boldface limits apply at the temperature extremes. V
J
+
=
5V, V
Typ LMC6082AM LMC6082AI LMC6082I
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
V
OS
Input Offset Voltage 150 350 350 800 µV
1000 800 1300 Max
TCV
Input Offset Voltage 1.0 µV/˚C
OS
Average Drift
I
B
Input Bias Current 0.010 pA
100 4 4 Max
I
OS
Input Offset Current 0.005 pA
100 2 2 Max
R
IN
Input Resistance
CMRR Common Mode 0V ≤ V
+
Rejection Ratio V
=
+PSRR Positive Power Supply 5V ≤ V
Rejection Ratio V
=
O
−PSRR Negative Power Supply 0V ≤ V
≤ 12.0V 85 75 75 66 dB
CM
15V 72 72 63 Min
+
≤ 15V 85 75 75 66 dB
2.5V 72 72 63 Min
−
≤ −10V 94 84 84 74 dB
>
10 Tera Ω
Rejection Ratio 81 81 71 Min
+
V
CM
Input Common-Mode V
=
5V and 15V −0.4 −0.1 −0.1 −0.1 V
Voltage Range for CMRR ≥ 60 dB 000Max
+
V
− 1.9 V+− 2.3 V+− 2.3 V+− 2.3 V
A
V
Large Signal R
=
2kΩ Sourcing 1400 400 400 300 V/mV
L
+
V
− 2.6 V+− 2.5 V+− 2.5 Min
Voltage Gain (Note 7) 300 300 200 Min
Sinking 350 180 180 90 V/mV
70 100 60 Min
=
R
600Ω Sourcing 1200 400 400 200 V/mV
L
(Note 7) 150 150 80 Min
Sinking 150 100 100 70 V/mV
35 50 35 Min
−
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DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
=
0V, V
=
1.5V, V
CM
=
2.5V and R
O
>
1M unless otherwise specified.
L
=
25˚C. Boldface limits apply at the temperature extremes. V
J
Typ LMC6082AM LMC6082AI LMC6082I
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
+
V
O
Output Swing V
=
5V 4.87 4.80 4.80 4.75 V
=
R
2kΩto 2.5V 4.70 4.73 4.67 Min
L
0.10 0.13 0.13 0.20 V
0.19 0.17 0.24 Max
+
=
V
5V 4.61 4.50 4.50 4.40 V
=
R
600Ω to 2.5V 4.24 4.31 4.21 Min
L
0.30 0.40 0.40 0.50 V
0.63 0.50 0.63 Max
+
=
V
15V 14.63 14.50 14.50 14.37 V
=
R
2kΩto 7.5V 14.30 14.34 14.25 Min
L
0.26 0.35 0.35 0.44 V
0.48 0.45 0.56 Max
+
=
V
15V 13.90 13.35 13.35 12.92 V
=
R
600Ω to 7.5V 12.80 12.86 12.44 Min
L
0.79 1.16 1.16 1.33 V
1.42 1.32 1.58 Max
I
O
Output Current Sourcing, V
+
=
V
5V 8108Min
Sinking, V
=
0V 22 16 16 13 mA
O
=
5V 21 16 16 13 mA
O
11 13 10 Min
I
O
Output Current Sourcing, V
+
=
V
15V 18 22 18 Min
Sinking, V
=
0V 30 28 28 23 mA
O
=
13V 34 28 28 23 mA
O
(Note 11) 19 22 18 Min
I
S
Supply Current Both Amplifiers 0.9 1.5 1.5 1.5 mA
+
=
V
+5V, V
=
1.5V 1.8 1.8 1.8 Max
O
Both Amplifiers 1.1 1.7 1.7 1.7 mA
+
V
=
+15V, V
=
7.5V 222Max
O
+
=
5V, V
−
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AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
=
0V, V
=
1.5V, V
CM
=
O
2.5V and R
>
1M unless otherwise specified.
L
=
25˚C, Boldface limits apply at the temperature extremes. V
J
+
=
5V, V
Typ LMC6082AM LMC6082AI LMC6082I
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 8) 1.5 0.8 0.8 0.8 V/µs
0.5 0.6 0.6 Min
GBW Gain-Bandwidth Product 1.3 MHz
φ
Phase Margin 50 Deg
m
Amp-to-Amp Isolation (Note 9) 140 dB
e
i
n
T.H.D. Total Harmonic
n
Input-Referred
Voltage Noise
Input-Referred
F=1 kHz 22
F=1 kHz 0.0002
Current Noise
Distortion
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 2: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C. Output currents in excess of
Note 3: The maximum power dissipation is a function of T
−TA)/θJA.
Note 4: Human body model, 1.5 kΩ in series with 100 pF.
Note 5: Typical values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
+
=
Note 7: V
+
=
Note 8: V
Note 9: Input referred V
Note 10: Foroperating at elevated temperatures the device must be derated based on the thermal resistance θ
ages soldered directly into a PC board.
Note 11: Do not connect output to V
Note 12: All numbers apply for packages soldered directly into a PC board.
=
15V, V
15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
CM
7.5V and R
+
=
15V and R
L
+
, when V+is greater than 13V or reliability will be adversely affected.
=
R
2kΩ,V
L
±
5V Supply
connected to 7.5V. For Sourcing tests, 7.5V ≤ VO≤ 11.5V. For Sinking tests, 2.5V ≤ VO≤ 7.5V.
=
100 kΩ connected to 7.5V. Each amp excited in turm with 1 kHz to produce V
L
F=10 kHz, A
=
−10
V
=
8V
O
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is P
J(Max)
0.01
PP
±
30 mA over long term may adversely affect reliability.
with P
JA
=
.
12 V
O
PP
=
)/θJA.All numbers apply for pack-
(T
D
J−TA
=
(T
D
J(Max)
%
−
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Typical Performance Characteristics V
Distribution of LMC6082
Input Offset Voltage
=
(T
+25˚C)
A
Distribution of LMC6082
Input Offset Voltage
=
(T
−55˚C)
A
=
±
S
7.5V, T
=
25˚C, Unless otherwise specified
A
Distribution of LMC6082
Input Offset Voltage
=
(T
+125˚C)
A
Input Bias Current
vs Temperature
Common Mode
Rejection Ratio
vs Frequency
DS011297-15
DS011297-18
Supply Current
vs Supply Voltage
Power Supply Rejection
Ratio vs Frequency
DS011297-16
DS011297-19
DS011297-17
Input Voltage
vs Output Voltage
DS011297-20
Input Voltage Noise
vs Frequency
DS011297-21
DS011297-22
DS011297-23
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Typical Performance Characteristics V
specified (Continued)
=
±
7.5V, T
S
=
25˚C, Unless otherwise
A
Output Characteristics
Sourcing Current
DS011297-24
Gain and Phase
Response vs Capacitive Load
=
with R
600Ω
L
DS011297-27
Output Characteristics
Sinking Current
DS011297-25
Gain and Phase
Response vs Capacitive Load
=
with R
L
500 kΩ
DS011297-28
Gain and Phase Response
vs Temperature
(−55˚C to +125˚C)
DS011297-26
Open Loop
Frequency Response
DS011297-29
Inverting Small Signal
Pulse Response
DS011297-30
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Inverting Large Signal
Pulse Response
DS011297-31
Non-Inverting Small
Signal Pulse Response
DS011297-32
Typical Performance Characteristics V
specified (Continued)
=
±
7.5V, T
S
=
25˚C, Unless otherwise
A
Non-Inverting Large
Signal Pulse Response
Stability vs Capacitive
=
Load R
1MΩ
L
DS011297-33
DS011297-36
Crosstalk Rejection
vs Frequency
Applications Hints
AMPLIFIER TOPOLOGY
The LMC6082 incorporates a novel op-amp design topology
that enables it to maintain rail to rail output swing even when
driving a large load. Instead of relying on a push-pull unity
gain output buffer stage, the output stage is taken directly
from the internal integrator, which provides both low output
impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability
over a wider range of operating conditions than traditional
micropower op-amps. These features make the LMC6082
both easier to design with, and provide higher speed than
products typically found in this ultra-low power class.
COMPENSATING FOR INPUT CAPACITANCE
It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the
LMC6082.
Although the LMC6082 is highly stable over a wide range of
operating conditions, certain precautions must be met to
achieve the desired pulse response when a large feedback
resistor is used. Large feedback resistors and even small
values of input capacitance, due to transducers, photodiodes, and circuit board parasitics, reduce phase margins.
When high input impedances are demanded, guarding of the
LMC6082 is suggested. Guarding input lines will not only re-
Stability vs Capacitive
Load, R
DS011297-34
=
600Ω
L
DS011297-35
duce leakage, but lowers stray input capacitance as well.
(See
Printed-Circuit-Board Layout for High Impedance
Work).
The effect of input capacitance can be compensated for by
adding a capacitor, C
Figure 1
) such that:
, around the feedback resistors (as in
f
or
≤ R2C
R
1CIN
f
Since it is often difficultto know the exact value of CIN,Cfcan
be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and LMC662 for a
more detailed discussion on compensating for input
capacitance.
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Applications Hints (Continued)
DS011297-4
FIGURE 1. Cancelling the Effect of Input Capacitance
CAPACITIVE LOAD TOLERANCE
All rail-to-rail output swing operational amplifiers have voltage gain in the output stage. A compensation capacitor is
normally included in this integrator stage. The frequency location of the dominant pole is affected by the resistive load
on the amplifier. Capacitive load driving capability can be optimized by using an appropriate resistive load in parallel with
the capacitive load (see typical curves).
Direct capacitive loading will reduce the phase margin of
many op-amps.A pole in the feedback loop is created by the
combination of the op-amp’s output impedance and the capacitive load. This pole induces phase lag at the unity-gain
crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in
Figure 2
.
amplifier with respect to the desired output swing. Open loop
gain of the amplifier can also be affected by the pull up resistor (see Electrical Characteristics).
DS011297-14
FIGURE 3. Compensating for Large Capacitive Loads
with a Pull Up Resistor
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6082, typically less
than 10 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6082’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs, as in
ure 4
. To have a significant effect, guard rings should be
Fig-
placed on both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
12
Ω, which is normally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 100 times degradation from the LMC6082’s
actual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current. See
Figure 5
11
Ω would
for typical connections of guard rings for standard op-amp
configurations.
DS011297-5
FIGURE 2. LMC6082 Noninverting Gain of 10 Amplifier,
Compensated to Handle Capacitive Loads
Figure 2
In the circuit of
, R1 and C1 serve to counteract the
loss of phase margin by feeding the high frequency component of the output signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback
loop.
Capacitive load driving capability is enhanced by using a
pull up resistor to V
+
Figure 3
. Typically a pull up resistor
conducting 500 µA or more will significantly improve capacitive load responses. The value of the pull up resistor must be
determined based on the current sinking capability of the
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DS011297-6
FIGURE 4. Example of Guard Ring in P.C. Board
Layout
Applications Hints (Continued)
Inverting Amplifier
Latchup
CMOS devices tend to be susceptible to latchup due to their
internal parasitic SCR effects. The (I/O) input and output pins
look similar to the gate of the SCR. There is a minimum current required to trigger the SCR gate lead. The LMC6062
and LMC6082 are designed to withstand 100 mA surge current on the I/O pins. Some resistive method should be used
to isolate any capacitance from supplying excess current to
the I/O pins. In addition, like an SCR, there is a minimum
holding current for any latchup mode. Limiting current to the
supply pins will also inhibit latchup susceptibility.
DS011297-7
DS011297-8
Non-Inverting Amplifier
DS011297-9
Follower
FIGURE 5. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air
Figure 6
wiring. See
.
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board).
DS011297-10
FIGURE 6. Air Wiring
Typical Single-Supply Applications
+
=
(V
The extremely high input impedance, and low power con-
sumption, of the LMC6082 make it ideal for applications that
require battery-powered instrumentation amplifiers. Examples of these types of applications are hand-held pH
probes, analytic medical instruments, magnetic field detectors, gas detectors, and silicon based pressure transducers.
Figure 7
high differential and common mode input resistance
>
(
1014Ω), 0.01%gain accuracy at A
CMRR with 1 kΩ imbalance in bridge source resistance. Input current is less than 100 fA and offset drift is less than
2.5 µV/˚C. R
over a wide range without degrading CMRR. R
trim used to maximize CMRR without using super precision
matched resistors. For good CMRR over temperature, low
drift resistors should be used.
)
5.0 V
DC
shows an instrumentation amplifier that features
=
1000, excellent
V
provides a simple means of adjusting gain
2
is an initial
7
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Typical Single-Supply Applications (Continued)
=
If R
∴
AV≈ 100 for circuit shown (R
=
R
1
5,R3
R
6
, and R
=
; then
R
4
7
=
9.822k).
2
FIGURE 7. Instrumentation Amplifier
Typical Single-Supply Applications (V
FIGURE 8. Low-Leakage Sample and Hold
DS011297-11
+
=
5.0 V
)
DC
DS011297-12
FIGURE 9. 1 Hz Square Wave Oscillator
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DS011297-13
Physical Dimensions inches (millimeters) unless otherwise noted
8-Pin Small Outline Package
Order Number LMC6082AIM or LMC6082IM
NS Package Number M08A
Order Number LMC6082AIN, LMC6082AMN or LMC6082IN
8-Pin Molded Dual-In-Line Package
NS Package Number N08E
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LMC6082 Precision CMOS Dual Operational Amplifier
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
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Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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