National Semiconductor LMC568 Technical data
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LMC568
Low Power Phase-Locked Loop
LMC568 Low Power Phase-Locked Loop
May 1999
General Description
The LMC568 is an amplitude-linear phase-locked loop consisting of a linear VCO, fully balanced phase detectors, and
a carrier detect output. LMCMOS
for high performance with low power consumption.
The VCO has a linearized control range of
modulation of FM and FSK signals. Carrier detect is indicated when the PLL is locked to an input signal greater than
26 mVrms. LMC568 applications include FM SCA and TV
second audio program decoders, FSK data demodulators,
and voice pagers.
™
technology is employed
±
30%to allow de-
Features
n Demodulates±15%deviation FM/FSK signals
n Carrier Detect Output with hysteresis
n Operation to 500 kHz input frequency
n Low THD—0.5%typ. for
n 2V to 9V supply voltage range
n Low supply current drain
Typical Application (100 kHz input frequency, refer to notes pg. 3)
±
10%deviation
DS009135-1
Order Number LMC568CM or LMC568CN
See NS Package Number M08A or N08E
LMCMOS™is a trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS009135 www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Input Voltage, Pin 3 2 V
Supply Voltage, Pin 4 10V
Output Voltage, Pin 8 13V
Voltage at All Other Pins V
Output Current, Pin 8 30 mA
Package Dissipation 500 mW
Operating Temperature Range (T
) −25˚C to +125˚C
A
Storage Temperature Range −55˚C to +150˚C
to Gnd
s
p–p
Soldering Information
Dual-In-Line Package
Soldering (10 seconds) 260˚C
Small Outline Package
Vapor Phase (60 seconds) 215˚C
Infrared (15 seconds) 220˚C
See AN-450 “Surface Mounting Methods and their Effect
on Product Reliability” for other methods of soldering
surface mount devices.
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage
to the device may occur. Operating Ratings indicate conditions for which the
device is functional, but do not guarantee specific performance limits.
Electrical Characteristics
Test Circuit, T
=
A
Symbol Parameter Conditions Min Typ Max Units
I4 Power Supply Current RtCt
V3 Input D.C. Bias 0 mVdc
R3 Input Resistance 40 kΩ
I8 Output Leakage 1 100 nAdc
f
0
∆f
V
∆V
Center Frequency F
÷
2
Center Frequency Shift
0
with Supply
Input Threshold Set Input Frequency Equal to f
in
Input Hysteresis Starting at Input Threshold, Decrease Input Level
in
V8 Output ″Sat″ Voltage Input Level
L.D.B.W. Largest Detection
Bandwidth
∆BW Bandwidth Skew
25˚C, V
=
S
#
5V, RtCt
2, Sw. 1 Pos. 0; and no input unless otherwise noted.
#
1, Quiescent or Activated VS= 2V 0.35
RtCt #2, Measure Oscillator
osc
Frequency and Divide by 2
Measured Above, Increase Input
Level until Pin 8 Goes Low.
until Pin 8 Goes High
>
Threshold Choose RL
for Specified I8
Measure F
and 2;
with Sw. 1 in Pos. 0, 1,
osc
= 5V 0.75 1.5
S
V
= 9V 1.2 2.4
S
V
=2V 98
S
= 5V 90 103 115
S
V
= 9V 105
S
1.0 2.0
= 2V 8 16 25
0
V
S
=5V 15 26 42
S
V
=9V 45
S
mAdcV
kHzV
%
/V
mVrmsV
1.5 mVrms
I8=2mA 0.06 0.15
I8=20mA 0.7
VS=2V
V
=5V
S
V
=9V
S
40 55
30
60
1
Vdc
%
±
%
5
V
THD Total Harmonic
Recovered Audio Typical Application Circuit
out
Input = 100 mVrms, F = 100 kHz
F
mod
Typical Application Circuit as Above, Measure V
Distortion
Distortion.
= 400 Hz,±10 kHz Dev.
Signal to Noise Ratio Typical Application Circuit
Remove Modulation, Measure V
(S + N)/N = 20 log (V
f
max
www.national.com 2
Highest Center Freq. RtCt #3, Measure Oscillator Frequency and Divide by
2
out/Vn
= 2V 170
V
S
= 5V 270
S
V
= 9V 400
S
out
n
).
0.5
65 dB
mVrmsV
%
700 kHz
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