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LM6118/LM6218
Fast Settling Dual Operational Amplifiers
LM6118/LM6218 Fast Settling Dual Operational Amplifiers
May 1999
General Description
The LM6118/LM6218 are monolithic fast-settling
unity-gain-compensated dual operational amplifiers with
mAoutputdrivecapability. The PNP input stage has a typical
bias current of 200 nA, and the operating supply voltage is
±
5V to±20V.
These dual op amps use slew enhancement with special
mirror circuitry to achieve fast response and high gain with
low total supply current.
The amplifiers are built on a junction-isolated VIP
cally Integrated PNP) process which produces fast PNP’s
that complement the standard NPN’s.
™
(Verti-
±
20
Features
j
Low offset voltage: 0.2 mV
j
0.01%settling time: 400 ns
j
Slew rate A
j
Slew rate A
j
Gain bandwidth: 17 MHz
j
Total supply current: 5.5 mA
j
Output drives 50Ω load (±1V)
Applications
n D/A converters
n Fast integrators
n Active filters
Connection Diagrams and Order Information
Small Outline Package (WM)
DS010254-3
Top View
Order Number LM6218WM
See NS Package Number M14B
=
−1: 140 V/µs
v
=
+1: 75 V/µs
v
Dual-In-Line Package (J or N)
DS010254-4
Top View
Order Number LM6118N,
LM6218AN or LM6218N
See NS Package Number N08E
Typical
VIP™is a trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS010254 www.national.com
Typical Applications
Single ended input to differential output
=
10, BW=3.2 MHz
A
V
Response=1.4 MHz
40 V
PP
=
±
15V
V
S
Wide-Band, Fast-Settling
40 V
Amplifier
PP
DS010254-1
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Total Supply Voltage 42V
Input Voltage (Note 2)
Differential Input Current (Note 3)
Output Current (Note 4) Internally Limited
Power Dissipation (Note 5) 500 mW
ESD Tolerance
(C=100 pF, R=1.5 kΩ)
±
10 mA
±
2kV
Junction Temperature 150˚C
Storage Temperature Range −65˚C to +150˚C
Lead Temperature
(Soldering, 10 sec.) 300˚C
Operating Temp. Range
LM6118 −55˚C to +125˚C
LM6218A −40˚C to +85˚C
LM6218 −40˚C to +85˚C
Electrical Characteristics
±
5V ≤ VS≤±20V, V
25˚C, and Bold Face Type are for Temperature Extremes.
=
0V, V
CM
Parameter Conditions 25˚C Limits Limits Limits Units
Input Offset Voltage V
Input Offset Voltage V− + 3V ≤ V
Input Offset Current V− + 3V ≤ V
Input Bias Current V− + 3V ≤ V
Input Common Mode V− + 3V ≤ V
Rejection Ratio V
Positive Power Supply V−=−15V 100 90 90 80 dB (min)
Rejection Ratio 5V ≤ V+ ≤ 20V 85 85 75
Negative Power Supply V+=15V 100 90 90 80 dB (min)
Rejection Ratio −20V ≤ V− ≤ −5V 85 85 75
Large Signal V
Voltage Gain V
V
Output Voltage Supply
O
Swing
Total Supply Current V
Output Current Limit V
Slew Rate, Av=−1 V
Slew Rate, Av=+1 V
Gain-Bandwidth Product V
0.01%Settling Time ∆V
=
A
−1 R
V
Input Capacitance Inverter 5 pF
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its rated operating conditions.
Note 2: Input voltage range is (V
+
OUT
=
0V, I
=
0A, unless otherwise specified. Limits with standard type face are for T
OUT
Typ LM6118 LM6218A LM6218
(Note 6) (Note 6) (Note 6)
=
±
15V 0.2 1 1 3 mV (max)
S
224
≤ V+ − 3.5V 0.3 1.5 1.5 3.5 mV (max)
CM
2.5 2.5 4.5
≤ V+ − 3.5V 20 50 50 100 nA (max)
CM
250 100 200
≤ V+ − 3.5V 200 350 350 500 nA (max)
CM
950 950 1250
≤ V+ − 3.5V 100 90 90 80 dB (min)
CM
=
±
20V 85 85 75
S
=
±
15V R
out
=
±
20V 100 100 70
S
=
±
V
10V R
out
=
±
V
15V (±20 mA) 30 30 25
S
=
±
20V R
=
±
15V 5.5 7 7 7 mA (max)
S
=
10k 500 150 150 100 V/mV (min)
L
=
500 200 50 50 40 V/mV (min)
L
=
10k 17.3
L
±
17
±
17
±
17 V (min)
7.5 7.5 7.5
=
±
15V, Pulsed 65 100 100 100 mA (max)
S
=
±
15V, V
S
=
R
R
S
f
=
±
15V, V
S
=
R
R
S
f
=
±
15V, f
S
=
out
=
R
S
f
=
±
10V 140 100 100 100 V/µs (min)
out
=
=
2k, C
10 pF 50 50 50
f
=
±
10V 75 50 50 50 V/µs (min)
out
=
=
2k, C
10 pF 30 30 30
f
=
200 kHz 17 14 14 13 MHz (min)
o
=
±
10V, V
=
2k, C
15V,
S
=
10 pF
f
400
Follower 3 pF
− 1V) to (V−).
=
J
ns
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Electrical Characteristics (Continued)
Note 3: The inputs are shunted with three series-connected diodes back-to-back for input differential clamping. Therefore differential input voltages greater than
about 1.8V will cause excessive current to flow unless limited to less than 10 mA.
Note 4: Current limiting protects the output from a short to ground or any voltage less than the supplies. With a continuous overload, the package dissipation must
be taken into account and heat sinking provided when necessary.
Note 5: Devices must be derated using a thermal resistance of 90˚C/W for the N and WM packages.
Note 6: Limits are guaranteed by testing or correlation.
Typical Performance Characteristics
Input Bias Current
Common Mode Rejection
Unity Gain Bandwidth
DS010254-25
DS010254-28
Input Noise Voltage
Power Supply Rejection
Unity Gain Bandwidth
vs Output Load
DS010254-26
DS010254-29
Common Mode Limits
DS010254-27
Frequency Response
High Frequency
DS010254-30
Large Signal Response
(Sine Wave)
DS010254-31
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DS010254-32
DS010254-33