National Semiconductor LM5071 Technical data

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November 2005

LM5071
Power Over Ethernet PD Controller with Auxiliary Power
Interface

General Description

The LM5071 power interface port and pulse width modula­tion (PWM) controller provides a complete integrated solu­tion for Powered Devices (PD) that connect into Power over
Ethernet (PoE) systems. The LM5071 is specifically de-

signed for the PD that must accept power from auxiliary
sources such as ac adapters. The auxiliary power inter-

face of the LM5071 activates the PWM controller when the
ac adapter is connected to power the PD when PoE network
power is unavailable. The LM5071 integrates an 80V,
400mA line connection switch and associated control for a
fully IEEE 802.3af compliant interface with a full featured
current mode pulse width modulator dc-dc converter. All
power sequencing requirements between the controller in­terface and switch mode power supply (SMPS) are inte­grated into the IC.

n Detection Resistor Disconnect Function
n Programmable Classification Current
n Programmable Under-voltage Lockout with

Programmable Hysteresis

n Thermal Shutdown Protection
n Auxiliary Power Enable Pin
n Current Mode Pulse Width Modulator
n Supports both Isolated and Non-Isolated Applications
n Error Amplifier and Reference for Non-Isolated

Applications

n Programmable Oscillator Frequency
n Programmable Soft-start
n 80% Maximum Duty Cycle Limiter, Slope Compensation

(-80 device)

n 50% Maximum Duty Cycle Limiter, No Slope

Compensation (-50 device)

LM5071 Power Over Ethernet PD Controller with Auxiliary Power Interface

Features

n Compatible with 12V ac adapters
n Fully Compliant 802.3af Power Interface Port
n 80V, 1Ω, 400 mA Internal MOSFET

Block Diagram

Packages

n TSSOP-16

20168401

© 2005 National Semiconductor Corporation DS201684 www.national.com

Block Diagram (Continued)

LM5071

20168402

FIGURE 1. Simplified Block Diagram

Connection Diagram

16 Lead TSSOP

20168403

Ordering Information

NSC Package Type /

Order Number Description

LM5071MT-50 50% Duty Cycle Limit TSSOP-16/MTC-16 92 units per rail

LM5071MTX-50 50% Duty Cycle Limit TSSOP-16/MTC-16 2500 units on tape and reel

LM5071MT-80 80% Duty Cycle Limit TSSOP-16/MTC-16 92 units per rail

LM5071MTX-80 80% Duty Cycle Limit TSSOP-16/MTC-16 2500 units on tape and reel

Drawing Supplied As

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Pin Descriptions

Pin Name Description Application Information

1 VIN System high potential input. The diode “OR” of several lines entering the PD, it is the more

positive input potential.

2 RSIG Signature resistor pin. Connect a resistor from V

resistor is in parallel with the UVLO resistors and should be valued
accordingly.

3 RCLASS Classification resistor pin. Connect the classification programming resistor from this pin to V

4 AUX Auxiliary input power startup pin. A resistor divider between the AUX voltage input to VEE programs

the startup levels with a 2.5V threshold. A high value (>300kΩ)
internal pull down resistor is present to pull the pin low if it is left
open. In practice, the divider voltage should be set well above 2.5V
by the programming resistors.

5 UVLO Line under-voltage lockout. An external resistor divider from V

shutdown levels with a 2.00V threshold at the UVLO pin. Hysteresis
is set by a switched internal 10uA current source that forces
additional current into the resistor divider.

6 UVLORTN Return for the external UVLO resistors. Connect the bottom resistor of the resistor divider between the

UVLO pin and this pin.

7 VEE System low potential input. Diode “OR’d” to the RJ45 connector and PSE’s –48V supply, it is

the more negative input potential.

8 RTN System return for the PWM converter. The drain of the internal current limiting power MOSFET which

connects V

to the return path of the dc-dc converter.

EE

9 OUT Output of the PWM controller. DC-DC converter gate driver output with 800mA peak sink current

capability.

10 V

Output of the internal high voltage

CC

series pass regulator. Regulated output
voltage is nominally 7.8V.

When the auxiliary transformer winding (if used) raises the voltage
on this pin above the regulation set point, the internal series pass
regulator will shutdown, reducing the controller power dissipation.

11 FB Feedback signal. Inverting input of the internal error amplifier. The non-inverting input

is internally connected to a 1.25V reference.

12 COMP The output of the error amplifier and

input to the Pulse Width Modulator.

COMP pull-up is provided by an internal 5K resistor which may be
used to bias an opto-coupler transistor.

13 CS Current sense input. Current sense input for current mode control and over-current

protection. Current limiting is accomplished using a dedicated
current sense comparator. If the CS pin voltage exceeds 0.5V the
OUT pin switches low for cycle-by-cycle current limiting. CS is held
low for 50ns after OUT switches high to blank leading edge current
spikes.

14 RT / SYNC Oscillator timing resistor pin and

synchronization input.

An external resistor connected from RT to ARTN sets the oscillator
frequency. This pin will also accept narrow ac-coupled
synchronization pulses from an external clock.

15 SS Soft-start input. An external capacitor and an internal 10uA current source set the

soft-start ramp rate.

16 ARTN Analog PWM supply return. RTN for sensitive analog circuitry including the SMPS current limit

amplifier.

to this pin for signature detection. The

IN

to UVLORTN programs the

IN

EE

LM5071

.

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

LM5071

please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

,RTN to V

V

IN

RSIG to V

AUX to V

UVLO -0.3V to 13V

RCLASS to V

ARTN to RTN -0.3V to 0.3V

V

, OUT to ARTN -0.3V to 16V

CC

EE

IN

EE

EE

-0.3V to 80V

-12V to 0V

-0.3V to 57V

-0.3V to 7V

ESD Rating

Human Body Model 2000V

Lead Temperature (Note 2)

Wave (4 seconds)
Infrared (10 seconds)
Vapor Phase (75 seconds)

Operating Ratings

VINvoltage 1.8V to 60V

External voltage applied to V

CC

8.1V to 15V

All other inputs to ARTN -0.3V to 7V

Electrical Characteristics (Note 3)

Specifications in standard type face are for TJ= +25˚C and those in boldface type apply over the full operating junction tem­perature range. Unless otherwise specified: V

Symbol Parameter Conditions Min Typ Max Units

Powered Interface

IOS Offset Current V

VCLSS(ON) Signature Resistor Disable /

Classification Current Turn On

VCLSS(OFF) Classification Current Turn Off VINwith respect to V

Classification Voltage With respect to V

ICLASS Supply Current During

Classification

IDC Supply Current During Normal

Operation

UVLO Pin Reference Voltage V

UVLO Hysteresis Current V

Softstart Release RTN falling with respect to V

Softstart Release Hysteresis RTN rising with respect to V

RDS(ON) PowerFET Resistance I = 350mA,

ILEAK SMPS Bias Current V

AUX Pin Threshold AUX pin rising with respect to

AUX Pin Threshold Hysteresis AUX pin falling with respect to

ZAUX AUX Pin Input Impedance AUX = 0.5V 350 kΩ

I

INRUSH

Inrush Current Limit VEE= 0V, RTN = 3.0V 70 100 130 mA

ILIM DC Current Limit V

ILIM DC Current Limit VEE= 0V, RTN = 3.0V,

Startup Regulator

VinMin Operational VIN Input Voltage AUX = 5V 9.5 V

VccReg V

Regulation Open ckt 7.5 7.8 8.1 V

CC

V

Current Limit (Note 4) 15 20 mA

CC

= 48V, VCC= 10V, RT = 30.3kΩ.

IN

<

10.0V 10 uA

IN

V

with respect to V

IN

V

=17V 0.5 1.5 mA

IN

EE

EE

EE

10.0 11.5 12.5 V

23.5 25.0 26.5 V

1.43 1.5 1.57 V

OUT floating 1 1.9 mA

>

27V 1.95 2.00 2.05 V

IN

>

UVLO 8.0 10 11.5 uA

IN

EE

EE

1.2 1.45 1.7 V

0.8 1.1 1.3 V

1 2.2 Ω

VIN= 48V

= 0V, VIN= RTN = 57V 100 uA

EE

2.4 2.5 2.65 V

V

EE

0.4 0.5 0.6 V

V

EE

= 0V, RTN = 3.0V,

EE

350 390 420 mA

Temp = 0˚C to 85˚C

325 390 420 mA

Temp = -40˚C to 125˚C

260˚C
240˚C
219˚C

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Electrical Characteristics (Note 3) (Continued)

Specifications in standard type face are for TJ= +25˚C and those in boldface type apply over the full operating junction tem­perature range. Unless otherwise specified: V

Symbol Parameter Conditions Min Typ Max Units

V

Supply

CC

V

UVLO (Rising) VccReg

CC

UVLO (Falling) 5.9 6.25 6.6 V

V

CC

Supply Current (Icc) Cload = 0 1.5 3 mA

Error Amplifier

GBW Gain Bandwidth 4 MHz

DC Gain 75 dB

Input Voltage FB = COMP 1.219

COMP Sink Capability FB=1.5V COMP=1V 5 20 mA

Current Limit

ILIM Delay to Output CS step from 0 to 0.6V, time to

Cycle by Cycle Current Limit
Threshold Voltage

Leading Edge Blanking Time 55 ns

CS Sink Impedance (clocked) 25 55 Ω

Softstart

Softstart Current Source 7 10 13 uA

Oscillator(Note 5)

Frequency1
(RT = 30.3K)

Frequency2
(RT = 10.5K)

Sync threshold 3.1 3.8 V

PWM Comparator

Delay to Output COMP set to 2V

Min Duty Cycle COMP=0V 0 %

Max Duty Cycle (-80 Device) 80 %

Max Duty Cycle (-50 Device) 50 %

COMP to PWM Comparator
Gain

COMP Open Circuit Voltage 4.5 5.4 6.3 V

COMP Short Circuit Current COMP= 0V 0.6 1.1 1.5 mA

Slope Compensation

Slope Comp Amplitude
(LM5071-80 Device Only)

Output Section

Output High Saturation I

Output Low Saturation I

Rise time Cload = 1nF 15 ns

Fall time Cload = 1nF 15 ns

= 48V, VCC= 10V, RT = 30.3kΩ.

IN

onset of OUT transition (90%)

CS stepped 0 to 0.4V, time to
onset of OUT transition low

Delta increase at PWM
Comparator to CS

= 50mA,

out

V

CC-VOUT

= 100mA 0.25 0.75 V

out

VccReg –

–

100mV

300mV

1.281

1.212

1.288

20 ns

0.44 0.5 0.56 V

175 200 225 KHz

505 580 665 KHz

25 ns

0.33

105 mV

0.25 0.75 V

V

LM5071

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Electrical Characteristics (Note 3) (Continued)

Specifications in standard type face are for TJ= +25˚C and those in boldface type apply over the full operating junction tem-

LM5071

perature range. Unless otherwise specified: V

Symbol Parameter Conditions Min Typ Max Units

Thermal Shutdown

Tsd Thermal Shutdown Temp. 165 ˚C

Thermal Shutdown
Hysteresis

Thermal Resistance

θ

JA

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics. The absolute maximum rating ofV
is derated to (-0.3V to 76V) at -40˚C.

Note 2: For detailed information on soldering the plastic TSSOP package, refer to the Packaging Databook available from National Semiconductor.

Note 3: Min and Max limits are 100% production tested at 25 ˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical

Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).

Note 4: Device thermal limitations may limit usable range.

Note 5: Specification applies to the oscillator frequency. The operational frequency of the LM5071-50 devices is divided by two.

Junction to Ambient MT Package 125 ˚C/W

= 48V, VCC= 10V, RT = 30.3kΩ.

IN

25 ˚C

IN

, RTN to V

EE

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