National Semiconductor LM4940 Technical data

LM4940
6W Stereo Audio Power Amplifier

LM4940 6W Stereo Audio Power Amplifier

October 2003

General Description

The LM4940 is a dual audio power amplifier primarily de­signed for demanding applications in flat panel monitors and
TV’s. It is capable of delivering 6 watts per channel to a 4Ω
load with less than 10% THD+N while operating on a

14.4V
Boomer audio power amplifiers were designed specifically to

provide high quality output power with a minimal amount of
external components. The LM4940 does not require boot­strap capacitors or snubber circuits. Therefore, it is ideally
suited for display applications requiring high power and mini­mal size.

The LM4940 features a low-power consumption active-low
shutdown mode. Additionally, the LM4940 features an inter­nal thermal shutdown protection mechanism along with short
circuit protection.

The LM4940 contains advanced pop & click circuitry that
eliminates noises which would otherwise occur during
turn-on and turn-off transitions.

The LM4940 is a unity-gain stable and can be configured by
external gain-setting resistors.

power supply.

DC

Typical Application

Key Specifications

j

Quiscent Power Supply Current 40mA (max)

j

P

(SE)

OUT

V

= 14.4V, RL=4Ω, 10% THD+N 6W (typ)

DD

j

Shutdown current 40µA (typ)

Features

n Pop & click circuitry eliminates noise during turn-on and

turn-off transitions

n Low current, active-low shutdown mode
n Low quiescent current
n Stereo 6W output, R
n Short circuit protection
n Unity-gain stable
n External gain configuration capability

L

=4Ω

Applications

n Flat Panel Monitors
n Flat Panel TV’s
n Computer Sound Cards

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FIGURE 1. Typical Stereo Audio Amplifier Application Circuit

Boomer®is a registered trademark of National Semiconductor Corporation.

© 2003 National Semiconductor Corporation DS200756 www.national.com

Connection Diagram

LM4940

Plastic Package, TO-263

Top View

U = Wafer Fab Code

Z = Assembly Plant Code

XY = Date Code

TT = Die Traceability

Order Number LM4940TS

See NS Package Number TS9A

200756E7

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LM4940

Absolute Maximum Ratings (Notes 1,

2)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Supply Voltage (pin 6, referenced
to GND, pins 4 and 5) 18.0V

ESD Susceptibility (Note 5) 200V

Junction Temperature 150˚C

Thermal Resistance

θ

(TS) 4˚C/W

JC

θ

(TS) (Note 3) 20˚C/W

JA

θ

(TA) 4˚C/W

JC

θ

(TA) (Note 3) 20˚C/W

JA

Storage Temperature −65˚C to +150˚C

Input Voltage

pins 3 and 7 −0.3V to V

DD

+ 0.3V

pins 1, 2, 8, and 9 −0.3V to 9.5V

Power Dissipation (Note 3) Internally limited

ESD Susceptibility (Note 4) 2000V

Operating Ratings

Temperature Range

T

≤ TA≤ T

MIN

MAX

Supply Voltage 10V ≤ V

−40˚C ≤ TA≤ 85˚C

DD

≤ 16V

Electrical Characteristics VDD= 12V (Notes 1, 2)

The following specifications apply for VDD= 12V, AV= 10, RL=4Ω, f = 1kHz unless otherwise specified. Limits apply for TA=
25˚C.

Symbol Parameter Conditions LM4940 Units

Typical

(Note 6)

I

DD

I

SD

V

SDIH

V

SDIL

Quiescent Power Supply Current VIN= 0V, IO= 0A, No Load 16 40 mA (max)

Shutdown Current V

SHUTDOWN

= GND (Note 9) 40 100 µA (max)

Shutdown Voltage Input High 2.0

Shutdown Voltage Input Low 0.4 V (max)

Limit

(Notes 7, 8)

V

DD

Single Channel

P

O

Output Power

THD+N Total Harmomic Distortion + Noise P

e

OS

X

TALK

Output Noise A-Weighted Filter, VIN= 0V,

Channel Separation PO=1W 70 dB

PSRR Power Supply Rejection Ratio V

Note 1: All voltages are measured with respect to the GND pin, unless otherwise specified.

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits. Electrical Characteristics state DC andAC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.

Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation is P
in Figure 1) with V
heatsink surface area.

Note 4: Human body model, 100pF discharged through a 1.5 kΩ resistor.

Note 5: Machine Model, 220pF– 240pF discharged through all pins.

Note 6: Typicals are measured at 25˚C and represent the parametric norm.

Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.

Note 9: Shutdown current is measured in a normal room environment. The Shutdown pin should be driven as close as possible to GND for minimum shutdown

current.

= 12V, RL=4Ω stereo operation the total power dissipation is 3.65W. θJA= 20˚C/W for both TO263 and TO220 packages mounted to 16in

DD

DMAX

=(T

)/θJAor the given inAbsolute Maximum Ratings, whichever is lower. For the LM4940 typical application (shown

JMAX−TA

THD+N = 1% 3.1 2.8

THD+N = 10% 4.2

V

= 14.4V, THD+N = 10% 6.0

DD

= 1Wrms, AV= 10, f = 1kHz 0.15 %

O

Input Referred

= 200mV

RIPPLE

1kHz

p-p,fRIPPLE

=

, θJA, and the ambient temperature, TA. The maximum

JMAX

10 µV

56 dB

(Limits)

V (min)

/2

V (max)

W (min)

2

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Typical Application

LM4940

FIGURE 2. Typical Stereo Audio Amplifier Application Circuit

External Components Description Refer to (Figure 1.)

Components Functional Description

This is the inverting input resistance that, along with RF, sets the closed-loop gain. Input

1. R

2. C

3. R

4. C

5. C

BYPASS

6. C

resistance R

IN

=1/(2πRINCIN).

This is the input coupling capacitor. It blocks DC voltage at the amplifier’s inverting input. CINand

IN

IN

create a highpass filter. The filter’s cutoff frequency is fC=1/(2πRINCIN). Refer to the

R
SELECTING EXTERNAL COMPONENTS section for an explanation of determining C

This is the feedback resistance that, along with Ri, sets closed-loop gain.

F

The supply bypass capacitor. Refer to the POWER SUPPLY BYPASSING section for information

S

about properly placing, and selecting the value of, this capacitor.

This capacitor filters the half-supply voltage present on the BYPASS pin. Refer to the Application
section, SELECTING EXTERNAL COMPONENTS, for information about properly placing, and
selecting the value of, this capacitor.

This is the output coupling capacitor. It blocks the nominal VDD/2 voltage present at the output

OUT

and prevents it from reaching the load. C
frequency is f
for an explanation of determining C

and input capacitance CINform a high pass filter. The filter’s cutoff frequency is f

IN

and RLform a high pass filter whose cutoff

OUT

=1/(2πRLC

C

). Refer to the SELECTING EXTERNAL COMPONENTS section

OUT

’s value.

OUT

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’s value.

IN

C

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Typical Performance Characteristics

THD+N vs Frequency THD+N vs Frequency

LM4940

VDD= 12V, RL=4Ω, SE operation,

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both channels driven and loaded (average shown),

= 1W, AV=1

P

OUT

THD+N vs Frequency THD+N vs Output Power

VDD= 12V, RL=8Ω, SE operation,

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both channels driven and loaded (average shown),

= 1W, AV=1

P

OUT

THD+N vs Output Power THD+N vs Output Power

VDD= 12V, RL=4Ω, SE operation,

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both channels driven and loaded (average shown),

= 2.5W, AV=1

P

OUT

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VDD= 14.4V, RL=4Ω, SE operation, AV=1

single channel driven/single channel measured,

= 1kHz

f

IN

VDD= 12V, RL=4Ω, SE operation, AV=1

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single channel driven/single channel measured,

= 1kHz

f

IN

VDD= 12V, RL=8Ω, SE operation, AV=1

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single channel driven/single channel measured,

= 1kHz

f

IN

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Typical Performance Characteristics (Continued)

LM4940

THD+N vs Output Power THD+N vs Output Power

VDD= 12V, RL=16Ω, SE operation, AV=1

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single channel driven/single channel measured,

= 1kHz

f

IN

THD+N vs Output Power THD+N vs Output Power

VDD= 12V, RL=4Ω, SE operation, AV=10

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single channel driven/single channel measured,

= 1kHz

f

IN

VDD= 12V, RL=8Ω, SE operation, AV=10

single channel driven/single channel measured,

= 1kHz

f

IN

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VDD= 12V, RL=16Ω, SE operation, AV=10

single channel driven/single channel measured,

= 1kHz

f

IN

Output Power vs Power Supply Voltage Output Power vs Power Supply Voltage

RL=4Ω, SE operation,

both channels driven and loaded (average shown),

at (from top to bottom at 12V): THD+N = 10%,

THD+N = 1%

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RL=8Ω, SE operation, fIN= 1kHz,

both channels driven and loaded (average shown),

at (from top to bottom at 12V): THD+N = 10%,

THD+N = 1%

20075666

200756E9

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Typical Performance Characteristics (Continued)

Output Power vs Power Supply Voltage Power Supply Rejection vs Frequency

LM4940

RL=8Ω, SE operation, fIN= 1kHz,

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both channels driven and loaded (average shown),

at (from top to bottom at 12V): THD+N = 10%,

THD+N = 1%

Power Supply Rejection vs Frequency Total Power Dissipation vs Load Dissipation

VDD= 12V, RL=8Ω, SE operation, V

= 10, at (from top to bottom at 60Hz):

A

V

C

BYPASS

= 1µF, C

BYPASS

= 4.7µF, C

RIPPLE

BYPASS

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= 200mV

= 10µF

Output Power vs Load Resistance Channel-to-Channel Crosstalk vs Frequency

p-p

VDD= 12V, RL=8Ω, SE operation,

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V

,

= 200mV

RIPPLE

C

BYPASS

= 1µF, C

VDD= 12V, SE operation, fIN= 1kHz,

at (from top to bottom at 1W):

, at (from top to bottom at 60Hz):

p-p

BYPASS

R

= 4.7µF, C

=4Ω,RL=8Ω

L

BYPASS

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= 10µF,

VDD= 12V, SE operation, fIN= 1kHz,

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both channels driven and loaded,

at (from top to bottom at 15Ω):

THD+N = 10%, THD+N = 1%

VDD= 12V, RL=4Ω,P

= 1W, SE operation,

OUT

at (from top to bottom at 1kHz): V

V

OUTA

measured; V

INA

driven, V

OUTB

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driven,

INB

measured

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Typical Performance Characteristics (Continued)

LM4940

Channel-to-Channel Crosstalk vs Frequency Power Supply Current vs Power Supply Voltage

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=50Ω

VDD= 12V, RL=8Ω,P

= 1W, SE operation,

OUT

at (from top to bottom at 1kHz): V

V

OUTA

measured; V

driven, V

INA

OUTB

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driven,

INB

measured

RL=4Ω, SE operation

= 0V, R

V

IN

SOURCE

Clipping Voltage vs Power Supply Voltage Clipping Voltage vs Power Supply Voltage

RL=4Ω, SE operation, fIN= 1kHz

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both channels driven and loaded,

at (from top to bottom at 13V):

negative signal swing, positive signal swing

Power Dissipation vs Ambient Temperature

VDD= 12V, RL=8Ω (SE), fIN= 1kHz,

(from top to bottom at 120˚C): 16in

heatsink area,

2

copper plane heatsink area

8in

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2

copper plane

RL=8Ω, SE operation, fIN= 1kHz

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both channels driven and loaded, at (from top to bottom

at 13V):

negative signal swing, positive signal swing

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Application Information

LM4940

FIGURE 3. Typical LM4940 Stereo Amplifier Application Circuit

HIGH VOLTAGE BOOMER WITH INCREASED OUTPUT POWER

®

Unlike previous 5V Boomer

amplifiers, the LM4940 is de­signed to operate over a power supply voltages range of 10V
to 15V. Operating on a 12V power supply, the LM4940 will
deliver 3.1W per channel into 4Ω loads with no more than
1% THD+N.

POWER DISSIPATION

Power dissipation is a major concern when designing a
successful single-ended amplifier. Equation (2) states the
maximum power dissipation point for a single-ended ampli­fier operating at a given supply voltage and driving a speci­fied output load.

P

DMAX-SE

=(VDD)2/ (2π2RL): Single Ended (1)

The LM4940’s dissipation is twice the value given by Equa­tion (2) when driving two SE loads. For a 12V supply and two
8Ω SE loads, the LM4940’s dissipation is 1.82W.

The maximum power dissipation point (twice the value given
by Equation (2)) must not exceed the power dissipation
given by Equation (4):

’=(T

P

DMAX

The LM4940’s T
LM4940’s θ

is 20˚C/W when the metal tab is soldered to a

JA

= 150˚C. In the TS package, the

JMAX

copper plane of at least 16in

JMAX-TA

2

) / θ

JA

(2)

. This plane can be split be-

tween the top and bottom layers of a two-sided PCB. Con-

20075672

nect the two layers together under the tab with a 5x5 array of
vias. For the TA package, use an external heatsink with a
thermal impedance that is less than 20˚C/W. At any given
ambient temperature T

, use Equation (4) to find the maxi-

A

mum internal power dissipation supported by the IC packag­ing. Rearranging Equation (4) and substituting P

’ results in Equation (5). This equation gives the maxi-

P

DMAX

DMAX

for

mum ambient temperature that still allows maximum stereo
power dissipation without violating the LM4940’s maximum
junction temperature.

T

A=TJMAX-PDMAX-SEθJA

(3)

For a typical application with a 12V power supply and two 4Ω
SE loads, the maximum ambient temperature that allows
maximum stereo power dissipation without exceeding the
maximum junction temperature is approximately 113˚C for
the TS package.

T

JMAX=PDMAX-SEθJA+TA

(4)

Equation (6) gives the maximum junction temperature

. If the result violates the LM4940’s 150˚C, reduce the

T

JMAX

maximum junction temperature by reducing the power sup­ply voltage or increasing the load resistance. Further allow­ance should be made for increased ambient temperatures.

The above examples assume that a device is operating
around the maximum power dissipation point. Since internal
power dissipation is a function of output power, higher am­bient temperatures are allowed as output power or duty
cycle decreases.

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Application Information (Continued)

If the result of Equation (3) is greater than that of Equation

LM4940

(4), then decrease the supply voltage, increase the load
impedance, or reduce the ambient temperature. Further,
ensure that speakers rated at a nominal 4Ω do not fall below
3Ω. If these measures are insufficient, a heat sink can be
added to reduce θ
additional copper area around the package, with connec­tions to the ground pins, supply pin and amplifier output pins.
Refer to the Typical Performance Characteristics curves
for power dissipation information at lower output power lev­els.

POWER SUPPLY VOLTAGE LIMITS

Continuous proper operation is ensured by never exceeding
the voltage applied to any pin, with respect to ground, as
listed in the Absolute Maximum Ratings section.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection. Applications that employ a voltage regulator typi­cally use a 10µF in parallel with a 0.1µF filter capacitors to
stabilize the regulator’s output, reduce noise on the supply
line, and improve the supply’s transient response. However,
their presence does not eliminate the need for a local 1.0µF
tantalum bypass capacitance connected between the
LM4940’s supply pins and ground. Do not substitute a ce­ramic capacitor for the tantalum. Doing so may cause oscil­lation. Keep the length of leads and traces that connect
capacitors between the LM4940’s power supply pin and
ground as short as possible. Connecting a 10µF capacitor,
C

, between the BYPASS pin and ground improves

BYPASS

the internal bias voltage’s stability and improves the amplifi­er’s PSRR. The PSRR improvements increase as the by­pass pin capacitor value increases. Too large, however,
increases turn-on time and can compromise the amplifier’s
click and pop performance. The selection of bypass capaci­tor values, especially C
requirements, click and pop performance (as explained in
the section, SELECTING EXTERNAL COMPONENTS),
system cost, and size constraints.

MICRO-POWER SHUTDOWN

The LM4940 features an active-low micro-power shutdown
mode. When active, the LM4940’s micro-power shutdown
feature turns off the amplifier’s bias circuitry, reducing the
supply current. The low 40µA typical shutdown current is
achieved by applying a voltage to the SHUTDOWN pin that
is as near to GND as possible. A voltage that is greater than
GND may increase the shutdown current.

There are a few methods to control the micro-power shut­down. These include using a single-pole, single-throw switch
(SPST), a microprocessor, or a microcontroller. When using
a switch, connect a 100kΩ pull-up resistor between the
SHUTDOWN pin and V
SHUTDOWN pin and GND. Select normal amplifier opera­tion by opening the switch. Closing the switch applies GND
to the SHUTDOWN pin, activating micro-power shutdown.
The switch and resistor guarantee that the SHUTDOWN pin
will not float. This prevents unwanted state changes. In a
system with a microprocessor or a microcontroller, use a
digital output to apply the active-state voltage to the SHUT­DOWN pin.

. The heat sink can be created using

JA

, depends on desired PSRR

BYPASS

and the SPST switch between the

DD

SELECTING EXTERNAL COMPONENTS

Input Capacitor Value Selection

Two quantities determine the value of the input coupling
capacitor: the lowest audio frequency that requires amplifi­cation and desired output transient suppression.

As shown in Figure 3, the input resistor (R
capacitor (C

) produce a high pass filter cutoff frequency

IN

) and the input

IN

that is found using Equation (7).

= 1/2πRiC

f

c

i

(5)

As an example when using a speaker with a low frequency
limit of 50Hz, C

shown in Figure 3allows the LM4940 to drive high

C

INA

, using Equation (7) is 0.159µF. The 0.39µF

i

efficiency, full range speaker whose response extends below
30Hz.

Output Coupling Capacitor Value Selection

The capacitors C

OUTA

and C

that block the VDD/2 out-

OUTB

put DC bias voltage and couple the output AC signal to the
amplifier loads also determine low frequency response.
These capacitors, combined with their respective loads cre­ate a highpass filter cutoff frequency. The frequency is also
given by Equation (6).

Using the same conditions as above, with a 4Ω speaker,

is 820µF (nearest common valve).

C

OUT

Bypass Capacitor Value

Besides minimizing the input capacitor size, careful consid­eration should be paid to value of C
connected to the BYPASS pin. Since C

BYPASS

BYPASS

, the capacitor

determines
how fast the LM4940 settles to quiescent operation, its value
is critical when minimizing turn-on pops. The slower the
LM4940’s outputs ramp to their quiescent DC voltage (nomi­nally V

/2), the smaller the turn-on pop. Choosing C

DD

BYPASS

equal to 10µF along with a small value of CIN(in the range of

0.1µF to 0.39µF), produces a click-less and pop-less shut­down function. As discussed above, choosing C

no larger

IN

than necessary for the desired bandwidth helps minimize
clicks and pops.

OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE

The LM4940 contains circuitry that eliminates turn-on and
shutdown transients ("clicks and pops"). For this discussion,
turn-on refers to either applying the power supply voltage or
when the micro-power shutdown mode is deactivated.

As the V

/2 voltage present at the BYPASS pin ramps to its

DD

final value, the LM4940’s internal amplifiers are configured
as unity gain buffers and are disconnected from the AMP
and AMPBpins. An internal current source charges the ca­pacitor connected between the BYPASS pin and GND in a
controlled manner. Ideally, the input and outputs track the
voltage applied to the BYPASS pin. The gain of the internal
amplifiers remains unity until the voltage applied to the BY­PASS pin.

The gain of the internal amplifiers remains unity until the
voltage on the bypass pin reaches V

/2. As soon as the

DD

voltage on the bypass pin is stable, the device becomes fully
operational and the amplifier outputs are reconnected to
their respective output pins. Although the BYPASS pin cur­rent cannot be modified, changing the size of C

BYPASS

alters
the device’s turn-on time. Here are some typical turn-on
times for various values of C

BYPASS

:

A

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Application Information (Continued)

CB(µF) TON(ms)

1.0 120

2.2 120

4.7 200

10 440

In order eliminate "clicks and pops", all capacitors must be
discharged before turn-on. Rapidly switching V
allow the capacitors to fully discharge, which may cause
"clicks and pops".

There is a relationship between the value of C
C

that ensures minimum output transient when power

BYPASS

is applied or the shutdown mode is deactivated. Best perfor­mance is achieved by setting the time constant created by

and Ri+Rfto a value less than the turn-on time for a

C

IN

given value of C

as shown in the table above.

BYPASS

AUDIO POWER AMPLIFIER DESIGN

Audio Amplifier Design: Driving 3W into a 4Ω load

The following are the desired operational parameters:

Power Output 3W

Load Impedance 4Ω

Input Level 0.3V

Input Impedance 20kΩ

Bandwidth 100Hz–20kHz

The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. One way to
find the minimum supply voltage is to use the Output Power

vs Power Supply Voltage curve in the Typical Performance
Characteristics section. Another way, using Equation (8), is

to calculate the peak output voltage necessary to achieve
the desired output power for a given load impedance. To
account for the amplifier’s dropout voltage, two additional
voltages, based on the Clipping Dropout Voltage vs Power

Supply Voltage in the Typical Performance Characteris-
tics curves, must be added to the result obtained by Equa-

tion (8). The result is Equation (9).

DD

RMS

±

may not

and

IN

RMS

(max)

0.25dB

(8)

Thus, a minimum gain of 11.6 allows the LM4940’s to reach
full output swing and maintain low noise and THD+N perfor­mance. For this example, let A
BTL gain is set using the input (RIN

= 12. The amplifier’s overall

V

) and feedback (R)

A

resistors of the first amplifier in the series BTL configuration.
Additionaly,A

and Rf. With the desired input impedance set at 20kΩ,

R

IN

is twice the gain set by the first amplifier’s

V-BTL

the feedback resistor is found using Equation (11).

/ RIN=A

R

f

V

(9)

The value of Rfis 240kΩ. The nominal output power is 3W.

The last step in this design example is setting the amplifier’s

±

-3dB frequency bandwidth. To achieve the desired

0.25dB
pass band magnitude variation limit, the low frequency re­sponse must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for

±

both response limits is 0.17dB, well within the

0.25dB-

desired limit. The results are an

= 100Hz/5=20Hz (10)

f

L

and an

= 20kHzx5=100kHz (11)

f

L

As mentioned in the SELECTING EXTERNAL COMPO-
NENTS section, R

INA

and C

, as well as C

INA

OUT

and RL,
create a highpass filter that sets the amplifier’s lower band­pass frequency limit. Find the coupling capacitor’s value
using Equation (14).

=1/ 2πRINf

C

IN

L

(12)

LM4940

(6)

V

DD=VOUTPEAK

+V

ODTOP+VODBOT

(7)

The Output Power vs. Power Supply Voltage graph for an 8Ω
load indicates a minimum supply voltage of 11.8V. The com­monly used 12V supply voltage easily meets this. The addi­tional voltage creates the benefit of headroom, allowing the
LM4940 to produce an output power of 3W without clipping
or other audible distortion. The choice of supply voltage must
also not create a situation that violates of maximum power
dissipation as explained above in the Power Dissipation
section. After satisfying the LM4940’s power dissipation re­quirements, the minimum differential gain needed to achieve
3W dissipation in a 4Ω BTL load is found using Equation
(10).

The result is

1 / (2πx20kΩx20Hz) = 0.398µF = C

IN

and

1 / (2πx4Ωx20Hz) = 1989µF = C

OUT

Use a 0.39µF capacitor for CINand a 2000µF capacitor for

, the closest standard values.

C

OUT

The product of the desired high frequency cutoff (100kHz in
this example) and the differential gain A
upper passband response limit. With A

, determines the

V

= 12 and fH=

V

100kHz, the closed-loop gain bandwidth product (GBWP) is

1.2mHz. This is less than the LM4940’s 3.5MHz GBWP. With
this margin, the amplifier can be used in designs that require
more differential gain while avoiding performance restricting
bandwidth limitations.

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Application Information (Continued)

RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT

LM4940

Figure 5 through Figure 7 show the recommended two-layer
PC board layout that is optimized for the TO263-packaged
LM4940 and associated external components. This circuit
board is designed for use with an external 12V supply and
4Ω(min) speakers.

Demonstration Board Layout

This circuit board is easy to use. Apply 12V and ground to
the board’s V
speaker between the board’s OUT

and GND pads, respectively. Connect a

DD

and OUTBoutputs and

A

their respective GND terminals.

FIGURE 4. Recommended TS PCB Layout:

Top Silkscreen

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20075664

FIGURE 5. Recommended TS PCB Layout:

Top Layer

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Demonstration Board Layout (Continued)

LM4940

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FIGURE 6. Recommended TS PCB Layout:

Bottom Layer

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Physical Dimensions inches (millimeters) unless otherwise noted

LM4940 6W Stereo Audio Power Amplifier

Plastic Package,

Order Number LM4940TS

NS Package Number TS9A

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.

BANNED SUBSTANCE COMPLIANCE

National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products
Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification
(CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2.

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.

LM4940 6W Stereo Audio Power Amplifier

National Semiconductor
Americas Customer
Support Center

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www.national.com

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

National Semiconductor
Europe Customer Support Center

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National Semiconductor
Asia Pacific Customer
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National Semiconductor
Japan Customer Support Center

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