National Semiconductor LM4549B Technical data

September 2006

LM4549B AC ’97 Rev 2.1 Multi-Channel Audio Codec with Sample Rate Conversion and National 3D Sound

LM4549B AC ’97 Rev 2.1 Multi-Channel Audio Codec with Sample Rate Conversion and National

3D Sound

General Description

The LM4549B is an audio codec for PC systems which is fully PC99 compliant and performs the analog intensive functions of the AC ’97 Rev 2.1 architecture. Using 18-bit Sigma-Delta ADCs and DACs, the LM4549B provides 90 dB of Dynamic Range.

The LM4549B was designed specifically to provide a high quality audio path and provide all analog functionality in a PC audio system. It features full duplex stereo ADCs and DACs and analog mixers with access to 4 stereo and 4 mono inputs. Each mixer input has separate gain, attenuation and mute control and the mixers drive 1 mono and 2 stereo outputs, each with attenuation and mute control. The LM4549B supports National’s 3D Sound stereo enhancement and a comprehensive sample rate conversion capability. The sample rate for the ADCs and DACs can be programmed separately with a resolution of 1 Hz to convert any rate in the range 4 kHz – 48 kHz. Sample timing from the ADCs and sample request timing for the DACs are completely deterministic to ease task scheduling and application software development. These features together with an extended temperature range also make the LM4549B suitable for non-PC codec applications.

The LM4549B features the ability to connect several codecs together using the Extended AC Link configuration of one dedicated serial data signal to the Controller per codec. LM4549B systems support up to 8 simultaneous channels of streaming data on Input Frames (Codec to Controller) while Output Frames (Controller to Codec) carry 2 streams to multiple codecs. The LM4549B may also be used in systems with the National LM4550B to support up to 6 simultaneous channels of streaming data on Output Frames.

The AC ’97 architecture separates the analog and digital functions of the PC audio system allowing both for system design flexibility and increased performance.

Key Specifications

n Analog Mixer Dynamic Range 97 dB (typ) n DAC Dynamic Range 89 dB (typ) n ADC Dynamic Range 90 dB (typ)

Features

n AC ’97 Rev 2.1 compliant n High quality Sample Rate Conversion from 4 kHz to 48

kHz in 1 Hz increments

n Multiple codec support n True Line Level Output with separate gain control n National’s 3D Sound stereo enhancement circuitry n Advanced power management support n External Amplifier Power Down (EAPD) control n PC-Beep passthrough to Line Out during Initialization or

Cold Reset

n Digital 3.3V and 5V supply options n Extended Temperature: −40˚C ≤ T

≤ 85˚C

Applications

n Desktop PC audio systems on PCI cards, AMR cards, or

with motherboard chips sets featuring AC Link

n Portable PC systems as on MDC cards, or with a

chipset or accelerator featuring AC Link

n General and Multi-channel audio frequency systems n Automotive Telematics

LM4549B

20123501

Block Diagram

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LM4549B

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Supply Voltage 6.0V

Soldering Information

LQFP Package

Vapor Phase (60 sec.) 215˚C

Infrared (15 sec.) 220˚C

(typ) – VBH48A 74˚C/W

Storage Temperature −65˚C to +150˚C

Input Voltage −0.3V to V

+0.3V

Operating Ratings

ESD Susceptibility (Note 2) 2000V

pin 3 750V

ESD Susceptibility (Note 3) 200V

pin 3 100V

Junction Temperature 150˚C

Electrical Characteristics (Notes 1, 5) The following specifications apply for AV

48 kHz, single codec configuration, (primary mode) unless otherwise noted. Limits apply for T

Temperature Range

MIN

≤ TA≤ T

(Note 4) −40˚C ≤ TA≤ 85˚C

MAX

Analog Supply Range 4.2V ≤ AV

Digital Supply Range 3.0V ≤ DV

= 5V, DVDD= 3.3V, Fs =

= 25˚C. The reference for 0 dB

≤ 5.5V

is 1 Vrms unless otherwise specified.

Units

(Limits)

Symbol Parameter Conditions

Analog Supply Range 4.2 V (min)

LM4549B

Typical

(Note 6)

Limit

(Note 7)

5.5 V (max)

Digital Supply Range 3.0 V (min)

5.5 V (max)

= 5 V 34 mA

DSD

ASD

IDD

REF

Digital Quiescent Power Supply Current

Analog Quiescent Power Supply Current

Digital Shutdown Current PR543210 = 111111 19 µA

Analog Shutdown Current PR543210 = 111111 70 µA

Reference Voltage No pullup resistor 2.16 V

= 3.3 V 19 mA

= 5.5 V 53 mA

PSRR Power Supply Rejection Ratio 40 dB

Analog Loopthrough Mode (Note 8)

Dynamic Range (Note 9)

THD Total Harmonic Distortion V

CD Input to Line Output, -60 dB Input THD+N

=-3dB,f=1kHz, RL=10kΩ 0.013 0.02 % (max)

97 90 dB (min)

Analog Input Section

Line Input Voltage

Mic Input with 20 dB Gain 0.1 Vrms

Mic Input with 0 dB Gain 1 Vrms

LINE_IN, AUX, CD, VIDEO, PC_BEEP, PHONE

1 Vrms

Xtalk Crosstalk CD Left to Right -95 dB

Input Impedance(Note 9) All Analog Inputs 40 10 kΩ (min)

Input Capacitance(Note 9) 3.7 7 pF

Interchannel Gain Mismatch CD Left to Right 0.1 dB

Record Gain Amplifier - ADC

Step Size 0 dB to 22.5 dB 1.5 dB

Mute Attenuation (Note 9) 86 dB

Mixer Section

Step Size +12 dB to -34.5 dB 1.5 dB

Mute Attenuation 86 dB

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Electrical Characteristics (Notes 1, 5) The following specifications apply for AV

48 kHz, single codec configuration, (primary mode) unless otherwise noted. Limits apply for T is 1 Vrms unless otherwise specified. (Continued)

LM4549B

= 5V, DVDD= 3.3V, Fs =

= 25˚C. The reference for 0 dB

Symbol Parameter Conditions

Analog to Digital Converters

Resolution 18 Bits

Dynamic Range (Note 9) -60 dB Input THD+N, A-Weighted 90 86 dB (min)

Frequency Response -1 dB Bandwidth 20 kHz

Digital to Analog Converters

Resolution 18 Bits

Dynamic Range (Note 9) -60 dB Input THD+N, A-Weighted 89 82 dB (min)

THD Total Harmonic Distortion V

=-3dB,f=1kHz, RL=10kΩ 0.01 %

Frequency Response 20 - 21 k Hz

Group Delay (Note 9) Sample Frequency = 48 kHz 0.36 1 ms (max)

Out of Band Energy (Note 10) -40 dB

Stop Band Rejection 70 dB

Discrete Tones -96 dB

Analog Output Section

OUT

Step Size 0 dB to -46.5 dB 1.5 dB

Mute Attenuation 86 dB

Output Impedance (Note 9) All Analog Outputs 220 Ω

Digital I/O (Note 9)

High level input voltage

Low level input voltage

High level output voltage IO= −2.5 mA.

Low level output voltage IO= 2.5 mA.

Input Leakage Current AC Link inputs

Tri state Leakage Current High impedance AC Link outputs

AC-Link I/O capacitance(Note 9) SDout, BitClk, SDin, Sync, Reset# only 4 7.5 pF (max)

Output drive current AC Link outputs 5 mA

Digital Timing Specifications (Note 9)

BCP

SYNC

DSETUP

DHOLD

SSETUP

BIT_CLK frequency 12.288 MHz

BIT_CLK period 81.4 ns

BIT_CLK high

Variation of BIT_CLK duty cycle from 50%

SYNC frequency 48 kHz

SYNC period 20.8 µs

SYNC high pulse width 1.3 µs

SYNC low pulse width 19.5 µs

Setup Time for codec data input SDATA_OUT to falling edge of BIT_CLK 3.5 10 ns (min)

Hold Time for codec data input(Note9)Hold time of SDATA_OUT from falling

edge of BIT_CLK

Setup Time for codec SYNC input(Note 9)

SYNC to falling edge of BIT_CLK 3.8 10 ns (min)

LM4549B

Typical

(Note 6)

Limit

(Note 7)

0.65 x DV

0.35 x DV

0.90 x DV

0.10 x DV

10 µA

20 % (max)

(Limits)

V (min)

V (max)

V (min)

V (max)

5.3 10 ns (min)

Units

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LM4549B

Electrical Characteristics (Notes 1, 5) The following specifications apply for AV

48 kHz, single codec configuration, (primary mode) unless otherwise noted. Limits apply for T

= 5V, DVDD= 3.3V, Fs =

= 25˚C. The reference for 0 dB

is 1 Vrms unless otherwise specified. (Continued)

Symbol Parameter Conditions

SHOLD

RISE

FALL

RST_LOW

RST2CLK

SYNC2CLK

S2_PDOWN

SUPPLY2RST

SU2RST

RST2HZ

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC andAC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance.

Note 2: Human body model, 100 pF discharged through a 1.5 kΩ resistor.

Note 3: Machine Model, 220 pF – 240 pF discharged through all pins.

Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T

allowable power dissipation is P The typical junction-to-ambient thermal resistance is 74˚C/W for package number VBH48A.

Note 5: All voltages are measured with respect to the ground pin, unless otherwise specified.

Note 6: Typicals are measured at 25˚C and represent the parametric norm.

Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 8: Loopthrough mode describes a path from an analog input through the analog mixer to an analog output

Note 9: These specifications are guaranteed by design and characterization; they are not production tested.

Note 10: Out of band energy is measured from 28.8 kHz to 100 kHz relative toa1VrmsDACoutput.

Hold Time for codec SYNC inpu(Note 9)t

Output Valid Delay

Rise Time(Note 9)

Fall Time(Note 9)

RESET# active low pulse width(Note

RESET# inactive to BIT_CLK start up

SYNC active high pulse width(Note

SYNC inactive to BIT_CLK start up For Warm Reset 162.8 ns (min)

AC Link Power Down Delay

Power On Reset

Setup to trailing edge of RESET#(Note 9)

Rising edge of RESET# to Hi-Z(Note 9)

DMAX

=(T

)/θJAor the number given in Absolute Maximum Ratings, whichever is lower. For the LM4549B, T

JMAX–TA

Hold time of SYNC from falling edge of BIT_CLK

Output Delay of SDATA_IN from rising edge of BIT_CLK

BIT_CLK, SYNC, SDATA_IN or SDATA_OUT

For Cold Reset 1.0 µs (min)

For Cold Reset 271 162.8 ns (min)

For Warm Reset 1.0 µs (min)

Delay from end of Slot 2 to BIT_CLK, SDATA_IN low

Time from minimum valid supply levels to end of Reset

For ATE Test Mode 15 ns (min)

For ATE Test Mode 25 ns (max)

, θJA, and the ambient temperature TA. The maximum

JMAX

LM4549B

Typical

(Note 6)

Limit

(Note 7)

(Limits)

10 ns (min)

5.2 15 ns (max)

6 ns (max)

1 µs (max)

1 µs (min)

= 150˚C.

JMAX

Units

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Timing Diagrams

LM4549B

Clocks Data Delay, Setup and Hold

20123510

20123511

Digital Rise and Fall Legend

20123530

20123512

Power On Reset

Cold Reset

Warm Reset

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20123529

20123513

20123514

Typical Application

LM4549B

20123503

FIGURE 1. LM4549B Typical Application Circuit, Single Codec, 1 Vrms inputs

APPLICATION HINTS

The LM4549B must be initialized by using RESET# to perform a Power On Reset as shown in the Power On Reset Timing

•

Diagram Don’t leave unused Analog inputs floating. Tie all unused inputs together and connect to Analog Ground through a capacitor

•

(e.g. 0.1 µF) Do not leave CD_GND floating when using the CD stereo input. CD_GND is the AC signal reference for the CD channels and

•

should be connected to the CD source ground (Analog Ground may also be acceptable) througha1µFcapacitor If using a non-standard AC Link controller take care to keep the SYNC and SDATA_IN signals low during Cold Reset to avoid

•

entering the ATE or Vendor test modes by mistake. The PC_Beep input should be muted if not used since it defaults to 0 dB gain on reset, unlike the mute default of the other

•

analog inputs

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LM4549B

20123525

Typical Application (Continued)

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FIGURE 2. LM4549B Reference Design, Typical Application, Single Codec, 1 Vrms and 2 Vrms inputs, EMC output filters

Connection Diagram

LM4549B

Pin Descriptions

Name Pin I / O

PC_BEEP 12 I

PHONE 13 I

Top View

20123502

Order Number LM4549BVH

See NS Package Number VBH48A

ANALOG I/O

Functional Description

Mono Input This line level (1 Vrms nominal) mono input is mixed equally into both channels of the Stereo Mix signal at MIX2 under the control of the PC_Beep Volume control register, 0Ah. The PC_BEEP level can be muted or adjusted from 0 dB to -45 dB in 3 dB steps. The Stereo Mix signal feeds both the Line Out and Line Level Out analog outputs and is also selectable at the Record Select Mux. During Initialization or Cold Reset, (reset pin held active low), PC_BEEP is switched directly to both channels of the Line Out stereo output, bypassing all volume controls. This allows signals such as PC power-on self-test tones to be heard through the PC’s audio system before the codec registers are configured.

Mono Input This line level (1 Vrms nominal) mono input is selectable at the Record Select Mux for conversion by either channel of the stereo ADC. It can also be mixed equally into both channels of the Stereo Mix signal at MIX2 under the control of the Phone Volume register, 0Ch. The PHONE level can be muted or adjusted from +12 dB to -34.5 dB in 1.5 dB steps. The Stereo Mix signal feeds both the Line Out and Line Level Out analog stereo outputs and is also selectable at the Record Select Mux.

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