National Semiconductor LM3502 Technical data

LM3502
Step-Up Converter for White LED Applications

LM3502 Step-Up Converter for White LED Applications

August 2006

General Description

The LM3502 is a white LED driver for lighting applications.
For dual display or large single white LED string backlighting
applications, the LM3502 provides a complete solution. The
LM3502 contains two internal white LED current bypass
FET(Field Effect Transitor) switches that are ideal for con­trolling dual display applications. The white LED current can
be adjusted with a PWM signal directly from a microcontrol­ler without the need of an RC filter network.

With no external compensation, cycle-by-cycle current limit,
over-voltage protection, and under-voltage protection, the
LM3502 offers superior performance over other application
specific standard product step-up white LED drivers.

Typical Application

Features

n Drive up to 4, 6, 8 or 10 white LEDs for Dual Display

Backlighting

>

n

80% efficiency

n Output Voltage Options: 16V , 25V , 35V, and 44V
n Input Under-Voltage Protection
n Internal Soft Start Eliminating Inrush Current
n 1 MHz Constant Switching Frequency
n Wide Input Voltage: 2.5V to 5.5V
n Small External Components
n Low Profile Packages:

-10 Bump MicroSMD

-16 Pin LLP

<

1 mm Height

Applications

n Dual Display Backlighting in Portable Devices
n Cellular Phones and PDAs

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FIGURE 1. Blacklight Configuration with 10 White LEDs

© 2006 National Semiconductor Corporation DS201317 www.national.com

Connection Diagrams

LM3502

10-Bump Thin MicroSMD

Package (TLP10)

16-Lead Thin Leadless Leadframe

Package (SQA16A)

TOP VIEW

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Pin Descriptions/Functions

Bump # Pin # Name Description

A1 9 Cntrl Shutdown Control Connection

B1 7 Fb Feedback Voltage Connection

TOP VIEW

C1 6 V

D1 4 V

OUT2

OUT1

D2 2 and 3 Sw Drain Connection of The Power NMOS Switch (Figure 2: N1)

D3 15 and 16 PGND Power Ground Connection

C3 14 AGND Analog Ground Connection

B3 13 V

A3 12 En2 NMOS FET Switch Control Connection

A2 10 En1 PMOS FET Switch Control Connection

1 NC No Connection

5 NC No Connection

8 NC No Connection

11 NC No Connection

DAP DAP Die Attach Pad (DAP), must be soldered to the printed circuit board’s ground plane for

Drain Connections of The NMOS and PMOS Field Effect Transistor (FET) Switches
(Figure 2: N2 and P1)

Over-Voltage Protection (OVP) and Source Connection of The PMOS FET Switch
(Figure 2: P1)

Supply or Input Voltage Connection

IN

enhanced thermal dissipation.

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Cntrl (Bump A1): Shutdown control pin. When V

1.4V, the LM3502 is enabled or ON. When V

Cntrl

is ≥

Cntrl

is ≤ 0.3V,
the LM3502 will enter into shutdown mode operation. The
LM3502 has an internal pull down resistor on the Cntrl pin,
thus the device is normally in the off state or shutdown mode
of operation.

Fb (Bump B1): Output voltage feedback connection. The
white LED string network current is set/programmed using a
resistor from this pin to ground.

(Bump C1): Drain connections of the internal PMOS

V

OUT2

and NMOS FET switches. (Figure 2: P1 and N2). It is rec­ommended to connect 100nF at V
and LM3502-44 versions if V

(Bump D1): Source connection of the internal PMOS

V

OUT1

OUT2

for the LM3502-35V

OUT2

is not used.

FET switch (Figure 2: P1) and OVP sensing node. The
output capacitor must be connected as close to the device

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as possible, between the V

pin and ground plane. Also

OUT1

connect the Schottky diode as close as possible to the

pin to minimize trace resistance and EMI radiation.

V

OUT1

Sw (Bump D2): Drain connection of the internal power
NMOS FET switch. (Figure 2: N1) Minimize the metal trace
length and maximize the metal trace width connected to this
pin to reduce EMI radiation and trace resistance.

PGND (Bump D3): Power ground pin. Connect directly to
the ground plane.

AGND (Bump C3): Analog ground pin. Connect the analog
ground pin directly to the PGND pin.

(Bump B3): Supply or input voltage connection pin. The

V

IN

capacitor should be as close to the device as possible,

C

IN

between the V

pin and ground plane.

IN

En2 (Bump A3): Enable pin for the internal NMOS FET
switch (Figure 2: N2) during device operation. When V

En2

is

Pin Descriptions/Functions

(Continued)

≤ 0.3V, the internal NMOS FET switch turns on and the SUB
display turns off. When V
FET switch turns off and the SUB display turns on. The En2
pin has an internal pull down resistor, thus the internal
NMOS FET switch is normally in the on state of operation
with the SUB display turned off.

and V

If V

En1

will enter a low I

are ≤ 0.3V and V

En2

shutdown mode of operation where all the

Q

internal FET switches are off. If V

is ≥ 1.4V, the internal NMOS

En2

is ≥ 1.4V, the LM3502

Cntrl

is not used, En2 must

OUT2

En1 (Bump A2): Enable pin for the internal PMOS FET
switch (Figure 2: P1) during device operation. When V
≤ 0.3V, the internal PMOS FET switch turns on and the MAIN
display is turned off. When V

is ≥ 1.4V, the internal PMOS

En1

FET switch turns off and the MAIN display is turned on. The
En1 pin has an internal pull down resistor, thus the internal
PMOS FET switch is normally in the on state of operation
with the MAIN display turned off. If V
and V

is ≥ 1.4V, the LM3502 will enter a low IQshutdown

Cntrl

En1

mode of operation where all the internal FET switches are
off. If V

is not used, En2 must be grounded and use En1

OUT2

a long with Cntrl, to enable the device.

be grounded or floating and use En1 along with Cntrl, to
enable the device.

Ordering Information

Voltage Option Order Number Package Marking Supplied As

16 LM3502ITL-16 SANB 250 units, Tape-and-Reel

16 LM3502ITLX-16 SANB 3000 units, Tape-and-Reel

16 LM3502SQ-16 L00048B 250 units, Tape-and-Reel

16 LM3502SQX-16 L00048B 3000 units, Tape-and-Reel

25 LM3502ITL-25 SAPB 250 units, Tape-and-Reel

25 LM3502ITLX-25 SAPB 3000 units, Tape-and-Reel

25 LM3502SQ-25 L00049B 250 units, Tape-and-Reel

25 LM3502SQX-25 L00049B 3000 units, Tape-and-Reel

35 LM3502ITL-35 SARB 250 units, Tape-and-Reel

35 LM3502ITLX-35 SARB 3000 units, Tape-and-Reel

35 LM3502SQ-35 L00044B 250 units, Tape-and-Reel

35 LM3502SQX-35 L00044B 3000 units, Tape-and-Reel

44 LM3502ITL-44 SDLB 250 units, Tape-and-Reel

44 LM3502ITLX-44 SDLB 3000 units, Tape-and-Reel

44 LM3502SQ-44 L00050B 250 units, Tape-and-Reel

44 LM3502SQX-44 L00050B 3000 units, Tape-and-Reel

and V

are ≤ 0.3V

En2

En1

LM3502

is

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Absolute Maximum Ratings (Notes 6, 1)

If Military/Aerospace specified devices are required,

LM3502

please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Pin −0.3V to +5.5V

V

IN

Sw Pin −0.3V to +48V

Fb Pin −0.3V to +5.5V

Cntrl Pin −0.3V to +5.5V

V

Pin −0.3V to +48V

OUT1

V

Pin −0.3V to V

OUT2

En1 −0.3V to +5.5V

En2 −0.3V to +5.5V

Continuous Power Dissipation Internally Limited

Maximum Junction Temperature

(T

J-MAX)

Storage Temperature Range −65˚C to +150˚C

OUT1

+150˚C

ESD Rating (Note 2)

Human Body Model:
Machine Model:

2kV

200V

Operating Conditions (Notes 1, 6)

Junction Temperature (T

Ambient Temperature (T

Input Voltage, V

IN

Cntrl, En1, and En2 Pins 0V to 5.5V

) Range −40˚C to +125˚C

J

) Range −40˚C to +85˚C

A

Pin 2.5V to 5.5V

Thermal Properties (Note 4)

Junction-to-Ambient Thermal Resistance (θ

Micro SMD Package 65˚C/W

Leadless Leadframe Package 49˚C/W

)

JA

Preliminary Electrical Characteristics (Notes 6, 7) Limits in standard typeface are for T

Limits in bold typeface apply over the full operating junction temperature range (−40˚C ≤ T
specified, V

= 2.5V.

IN

≤ +125˚C). Unless otherwise

J

= 25˚C.

J

Symbol Parameter Conditions Min Typ Max Units

V

IN

I

Q

V

Fb

I

CL

I

Fb

F

S

R

DS(ON)

Input Voltage 2.5 5.5 V

Non-Switching
Switching
Shutdown

Shutdown

Low I

Q

>

0.25V

Fb
Fb = 0V, Sw Is Floating
Cntrl = 0V
Cntrl = 1.5V, En1 = En2 = 0V

0.5

1.9

0.1
6

1
3
3

15

Feedback Voltage 0.18 0.25 0.3 V

NMOS Power Switch
Current Limit

Feedback Pin Bias
Current (Note 8)

−16, Fb = 0V

−25, Fb = 0V

−35, Fb = 0V

−44, Fb = 0V

Fb = 0.25V

250
400
450
450

400
600
750
750

650

800
1050
1050

64 500 nA

Switching Frequency 0.8 1 1.2 MHz

NMOS Power Switch
ON Resistance

= 500 mA

I

Sw

0.55 1.1 Ω

(Figure 2: N1)

R

PDS(ON)

PMOS ON Resistance
of V

OUT1/VOUT2

Switch

= 20 mA, En1 = 0V, En2 = 1.5V

I

PMOS

5 10 Ω

(Figure 2: N1)

R

NDS(ON)

NMOS ON Resistance

OUT2

/Fb Switch

of V

= 20 mA, En1 = 1.5V, En2 = 0V

I

NMOS

2.5 5 Ω

(Figure 2: N2)

D

I

I

I

MAX

Cntrl

Sw

V

OUT1

Maximum Duty Cycle Fb = 0V 90 95 %

Cntrl Pin Input Bias
Current (Note 3)

Sw Pin Leakage
Current (Note 3)

(OFF) V

OUT1

Current (Note 3)

Pin Leakage

Cntrl = 2.5V
Cntrl = 0V

Sw = 42V, Cntrl = 0V

V

= 14V, Cntrl = 0V (16)

OUT1

= 23V, Cntrl = 0V (25)

V

OUT1

= 32V, Cntrl = 0V (35)

V

OUT1

= 42V, Cntrl = 0V (44)

V

OUT1

7

0.1

0.01 5 µA

0.1

0.1

0.1

0.1

14

3
3
3
3

mA
mA

µA
µA

mA

µA

µA

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LM3502

Preliminary Electrical Characteristics (Notes 6, 7) Limits in standard typeface are for T

Limits in bold typeface apply over the full operating junction temperature range (−40˚C ≤ T
specified, V

= 2.5V. (Continued)

IN

≤ +125˚C). Unless otherwise

J

= 25˚C.

J

Symbol Parameter Conditions Min Typ Max Units

I

(ON) V

V

OUT1

I

V

OUT2

UVP Under-Voltage

OVP Over-Voltage

V

En1

Pin Bias

OUT1

Current (Note 3)

V

Pin Leakage

OUT2

Current (Note 3)

Protection

Protection (Note 5)

PMOS FET Switch
Enabling Threshold

V

= 14V, Cntrl = 1.5V (16)

OUT1

= 23V, Cntrl = 1.5V (25)

V

OUT1

= 32V, Cntrl = 1.5V (35)

V

OUT1

= 42V, Cntrl = 1.5V (44)

V

OUT1

Fb = 0V, Cntrl = 0V, V

OUT2

= 42V

On Threshold
Off Threshold 2.2

On Threshold (16)
Off Threshold (16)
On Threshold (25)
Off Threshold (25)
On Threshold (35)
Off Threshold (35)
On Threshold (44)
Off Threshold (44)

14.5

14.0

22.5

21.5

32.0

31.0

40.5

39.0

Off Threshold (Display Lighting)
On Threshold (Display Lighting) 1.4

40
50
50
85

80
100
100
140

0.1 3 µA

2.4

2.5

2.3

15.5
15
24
23
34
33
42
41

0.8

16.5

16.0

25.5

24.5

35.0

34.0

43.5

42.0

0.3

0.8

(Figure 2: P1)

V

En2

NMOS FET Switch
Enabling Threshold

Off Threshold (Display Lighting)
On Threshold (Display Lighting) 1.4

0.8

0.8

0.3

(Figure 2: N2)

V

T

I

En1

I

En2

Cntrl

SHDW

Device Enabling
Threshold

Shutdown Delay Time 8 12 16 ms

En1 Pin Input Bias
Current

En2 Pin Input Bias
Current

Off Threshold
OnThreshold 1.4

En1 = 2.5V
En1=0V

En2 = 2.5V
En2=0V

0.8

0.8

0.1

0.1

0.3

7

7

14

14

µA

V

V

V

V

V

µA

µA

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not apply when
operating the device outside of its rated operating conditions.

Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin.

Note 3: Current flows into the pin.

Note 4: The maximum allowable power dissipation is a function of the maximum junction temperature, T

and the ambient temperature, T
calculated using: P
on this topic, please refer to Application Note 1187: Leadless Leadframe Package (LLP) and Application Note 1112 (AN1112) for microSMD chip scale package.

Note 5: The on threshold indicates that the LM3502 is no longer switching or regulating LED current, while the off threshold indicates normal operation.

Note 6: All voltages are with respect to the potential at the GND pin.

Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.

Note 8: Current flows out of the pin.

(MAX) = (TJ(MAX) – TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature. For more information

D

. See Thermal Properties for the thermal resistance. The maximum allowable power dissipation at any ambient temperature is

A

(MAX), the junction-to-ambient thermal resistance, θJA,

J

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Block Diagram

LM3502

FIGURE 2. Block Diagram

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