National Semiconductor LM3150 Technical data

October 17, 2008

LM3150 SIMPLE SWITCHER® CONTROLLER, 42V Synchronous Step-Down

LM3150 SIMPLE SWITCHER

General Description

The LM3150 SIMPLE SWITCHER® Controller is an easy to use and simplified step down power controller capable of providing up to 12A of output current in a typical application. Operating with an input voltage range of 6V-42V, the LM3150 features an adjustable output voltage down to 0.6V. The switching frequency is adjustable up to 1 MHz and the synchronous architecture provides for highly efficient designs. The LM3150 controller employs a Constant On-Time (COT) architecture with a proprietary Emulated Ripple Mode (ERM) control that allows for the use of low ESR output capacitors, which reduces overall solution size and output voltage ripple. The Constant On-Time (COT) regulation architecture allows for fast transient response and requires no loop compensation, which reduces external component count and reduces design complexity.

Fault protection features such as thermal shutdown, undervoltage lockout, over-voltage protection, short-circuit protection, current limit, and output voltage pre-bias startup allow for a reliable and robust solution.

The LM3150 SIMPLE SWITCHER® concept provides for an easy to use complete design using a minimum number of external components and National’s WEBENCH® online design tool. WEBENCH® provides design support for every step of the design process and includes features such as external component calculation with a new MOSFET selector, electrical simulation, thermal simulation, and Build-It boards for prototyping.

Features

PowerWise® step-down controller

■

6V to 42V Wide input voltage range

■

Adjustable output voltage down to 0.6V

■

Programmable switching frequency up to 1 MHz

■

No loop compensation required

■

Fully WEBENCH® enabled

■

Low external component count

■

Constant On-Time control

■

Ultra-fast transient response

■

Stable with low ESR capacitors

■

Output voltage pre-bias startup

■

Valley current limit

■

Programmable soft-start

■

Typical Applications

Telecom

■

Networking Equipment

■

Routers

■

Security Surveillance

■

Power Modules

■

CONTROLLER, 42V Synchronous Step-Down

Typical Application

30053101

SIMPLE SWITCHER® is a registered trademark of National Semiconductor Corporation

Connection Diagram

LM3150

eTSSOP-14

30053102

Ordering Information

Order Number Package Type NSC Package Drawing Supplied As

LM3150MH

LM3150MHE 250 Units in Tape and Reel

LM3150MHX 2500 Units in Tape and Reel

eTSSOP-14 MXA14A

94 Units per Anti-Static Tube

Pin Descriptions

Pin Name Description Function

1 VCC

2 VIN Input Supply Voltage Supply pin to the device. Nominal input range is 6V to 42V.

3 EN Enable

4 FB Feedback

5,9 SGND Signal Ground

6 SS Soft-Start

7 RON On-time Control An external resistor from VIN to this pin sets the high-side switch on-time.

8 ILIM Current Limit

10 SW Switch Node

11 HG High-Side Gate Drive

12 BST

13 LG Low-Side Gate Drive

14 PGND Power Ground

EP EP Exposed Pad

Supply Voltage for FET Drivers

Connection for Bootstrap Capacitor

Nominally regulated to 5.95V. Connect a 1.0 µF to 2.2 µF decoupling capacitor from this pin to ground.

To enable the IC apply a logic high signal to this pin greater than 1.26V typical or leave floating. To disable the part, ground the EN pin.

Internally connected to the regulation, over-voltage, and short-circuit comparators. The regulation setting is 0.6V at this pin. Connect to feedback resistor divider between the output and ground to set the output voltage.

Ground for all internal bias and reference circuitry. Should be connected to PGND at a single point.

An internal 7.7 µA current source charges an external capacitor to provide the softstart function.

Monitors current through the low-side switch and triggers current limit operation if the inductor valley current exceeds a user defined value that is set by R current, I

Switch pin of controller and high-gate driver lower supply rail. A boost capacitor is also connected between this pin and BST pin

Gate drive signal to the high-side NMOS switch. The high-side gate driver voltage is supplied by the differential voltage between the BST pin and SW pin.

High-gate driver upper supply rail. Connect a 0.33 µF-0.47 µF capacitor from SW pin to this pin. An internal diode charges the capacitor during the high-side switch offtime. Do not connect to an external supply rail.

Gate drive signal to the low-side NMOS switch. The low-side gate driver voltage is supplied by VCC.

Synchronous rectifier MOSFET source connection. Tie to power ground plane. Should be tied to SGND at a single point.

Exposed die attach pad should be connected directly to SGND. Also used to help dissipate heat out of the IC.

, sourced out of this pin during operation.

LIM-TH

and the Sense

LIM

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LM3150

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/

All Other Inputs to GND -0.3V to 7V ESD Rating (Note 2) 2 kV Storage Temperature Range -65°C to +150°C

Distributors for availability and specifications.

VIN, RON to GND -0.3V to 47V SW to GND -3V to 47V BST to SW -0.3V to 7V BST to GND -0.3V to 52V

Electrical Characteristics Limits in standard type are for T

Operating Ratings (Note 1)

Junction Temperature Range (TJ)

EN 0V to 5V

= 25°C only; limits in boldface type apply over the

6V to 42V

−40°C to + 125°C

junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 18V.

Symbol Parameter Conditions Min Typ Max Units

Start-Up Regulator, VCC

VCC

VIN - VCC VIN - VCC Dropout Voltage

VCC

CC-UVLO-D

VCCL

UVLO

UVLO-HYS

IN-SD

VCC Current Limit (Note 3) VCC = 0V

VCC Under-Voltage Lockout Threshold (UVLO)

VCC UVLO Hysteresis VCC Decreasing 475 mV

VCC UVLO Filter Delay 3 µs

Input Operating Current

Input Operating Current, Device Shutdown

= 1 µF, 0 mA to 40 mA 5.65 5.95 6.25

VCC

= 2 mA, VIN = 5.5V 40

VCC

= 30 mA, VIN = 5.5V 330

VCC

65 100

VCC Increasing 4.75 5.1 5.40 V

No Switching, VFB = 1V

VEN = 0V

3.5 5 mA

32 55 µA

GATE Drive

Q-BST

DS-HG-Pull-Up

DS-HG-Pull-Down

DS-LG-Pull-Up

DS-LG-Pull-Down

Boost Pin Leakage V

– VSW = 6V

BST

HG Drive Pull–Up On-Resistance IHG Source = 200 mA

HG Drive Pull–Down On-Resistance IHG Sink = 200 mA

LG Drive Pull–Up On-Resistance ILG Source = 200 mA

LG Drive Pull–Down On-Resistance ILG Sink = 200 mA

2 nA

3.4

Soft-Start

SS-DIS

SS Pin Source Current VSS = 0V

SS Pin Discharge Current

5.9 7.7 9.5 µA

200 µA

Current Limit

LIM-TH

Current Limit Sense Pin Source Current

75 85 95 µA

ON/OFF Timer

ON-MIN

OFF

VIN = 10V, RON = 100 kΩ, VFB = 0.6V

ON Timer Pulse Width

VIN = 18V, RON = 100 kΩ, VFB = 0.6V

VIN = 42V, RON = 100 kΩ, VFB = 0.6V

ON Timer Minimum Pulse Width (Note 4) 200 ns

OFF Timer Minimum Pulse Width 370 525 ns

1.02

0.62

0.36

Enable Input

EN-HYS

EN Pin Input Threshold Trip Point VEN Rising

EN Pin Threshold Hysteresis VEN Falling

1.14 1.20 1.26 V

120 mV

Ω

µs

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Symbol Parameter Conditions Min Typ Max Units

Regulation and Over-Voltage Comparator

LM3150

FB-OV

In-Regulation Feedback Voltage VSS > 0.6V

Feedback Over-Voltage Threshold

Feedback Bias Current

0.588 0.600 0.612 V

0.690 0.720 0.748 V

20 nA

Boost Diode

Forward Voltage I

BST

= 2 mA

= 30 mA

0.7

Thermal Characteristics

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and conditions, see the Electrical Characteristics.

Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Test Method is per JESD-22-A114.

Note 3: VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.

Note 4: See Applications section for minimum on-time when using MOSFETs connected to gate drivers.

Thermal Shutdown Rising 165 °C

Thermal Shutdown Hysteresis Falling 15 °C

Junction to Ambient

4 Layer JEDEC Printed Circuit Board, 9 Vias, No Air Flow

2 Layer JEDEC Printed Circuit Board. No Air Flow

140

Junction to Case No Air Flow 4 °C/W

°C/W

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Simplified Block Diagram

LM3150

30053103

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Typical Performance Characteristics

LM3150

Boost Diode Forward Voltage vs. Temperature

30053140

Quiescent Current vs. Temperature

vs. Temperature

LIM-TH

Soft-Start Current vs. Temperature

30053141

30053142

tON vs. Temperature

30053144

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30053143

tON vs. Temperature

30053145

LM3150

tON vs. Temperature

VCC Dropout vs. Temperature

30053146

VCC Current Limit vs. Temperature

30053147

VCC vs. Temperature

30053148

30053149

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Theory of Operation

The LM3150 synchronous step-down SIMPLE SWITCHER

LM3150

Controller utilizes a Constant On-Time (COT) architecture which is a derivative of the hysteretic control scheme. COT relies on a fixed switch on-time to regulate the output. The ontime of the high-side switch can be set manually by adjusting the size of an external resistor (RON). To maintain a relatively constant switching frequency as VIN varies, the LM3150 automatically adjusts the on-time inversely with the input voltage. Assuming an ideal system and VIN is much greater than 1V, the following approximations can be made:

The on-time, tON:

Where constant K = 100 pC The RON resistance value can be calculated as follows:

(1)

Programming the Output Voltage

The output voltage is set by two external resistors (R

FB1,RFB2

lows:

). The regulated output voltage is calculated as fol-

(5)

Where R FB, and R and GND.

is the top resistor connected between VOUT and

FB2

is the bottom resistor connected between FB

FB1

Regulation Comparator

The feedback voltage at FB is compared to the internal reference voltage of 0.6V. In normal operation (the output voltage is regulated), an on-time period is initiated when the voltage at FB falls below 0.6V. The high-side switch stays on for the on-time, causing the FB voltage to rise above 0.6V. After the on-time period, the high-side switch stays off until the FB voltage falls below 0.6V.

(2)

Where fs is the desired switching frequency. Control is based on a comparator and the on-timer, with the

output voltage feedback (FB) compared with an internal reference of 0.6V. If the FB level is below the reference, the highside switch is turned on for a fixed time, tON, which is determined by the input voltage and the resistor RON. Following this on-time, the switch remains off for a minimum off-time, t

, as specified in the Electrical Characteristics table or until

OFF

the FB pin voltage is below the reference, then the switch turns on again for another on-time period. The switching will continue in this fashion to maintain regulation. During continuous conduction mode (CCM), the switching frequency ideally depends on duty-cycle and on-time only. In a practical application however, there is a small delay in the time that the HG goes low and the SW node goes low that also affects the switching frequency that is accounted for in the typical application curves. The duty-cycle and frequency can be approximated as:

(3)

(4)

Typical COT hysteretic controllers need a significant amount of output capacitor ESR to maintain a minimum amount of ripple at the FB pin in order to switch properly and maintain efficient regulation. The LM3150 however, utilizes a proprietary Emulated Ripple Mode control scheme (ERM) that allows the use of low ESR output capacitors. Not only does this reduce the need for high output capacitor ESR, but also significantly reduces the amount of output voltage ripple seen in a typical hysteretic control scheme. The output ripple voltage can become so low that it is comparable to voltage-mode and current-mode control schemes.

Over-Voltage Comparator

The over-voltage comparator is provided to protect the output from over-voltage conditions due to sudden input line voltage changes or output loading changes. The over-voltage comparator continuously monitors the voltage at the FB pin and compares it to a 0.72V internal reference. If the voltage at FB rises above 0.72V, the on-time pulse is immediately terminated. This condition can occur if the input or the output load changes suddenly. Once the over-voltage protection is activated, the HG and LG signals remain off until the voltage at FB pin falls below 0.72V.

Current Limit

Current limit detection occurs during the off-time by monitoring the current through the low-side switch using an external resistor, R switch exceeds the user defined current limit value, the next on-time cycle is immediately terminated. Current sensing is achieved by comparing the voltage across the low side FET with the voltage across the current limit set resistor R voltage across R are equal then the current limit comparator will terminate the next on-time cycle.

The R

Where I value, R the expected maximum FET junction temperature, and I

is an internal current supply of 85 µA typical.

Figure 1 illustrates the inductor current waveform. During normal operation, the output current ripple is dictated by the switching of the FETs. The current through the low-side switch, I and compared to the current limit, ICL, current. The valley current can be calculated as follows:

. If during the off-time the current in the low-side

LIM

and the voltage across the low-side FET

LIM

value can be approximated as follows:

LIM

is the user-defined average output current limit

OCL

DS(ON)max

valley

is the resistance value of the low-side FETat

, is sampled at the end of each switching cycle

LIM

. If the

(6)

(7)

LIM-

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(8)

Where I to-peak inductor ripple current.

is the average output current and ΔIL is the peak-

OUT

If an overload condition occurs, the current through the lowside switch will increase which will cause the current limit comparator to trigger the logic to skip the next on-time cycle. The IC will then try to recover by checking the valley current during each off-time. If the valley current is greater than or equal to ICL, then the IC will keep the low-side FET on and allow the inductor current to further decay.

Throughout the whole process, regardless of the load current, the on-time of the controller will stay constant and thereby the positive ripple current slope will remain constant. During each on-time the current ramps-up an amount equal to:

(9)

The valley current limit feature prevents current runaway conditions due to propagation delays or inductor saturation since the inductor current is forced to decay following any overload conditions.

Current sensing is achieved by either a low value sense resistor in series with the low-side FET or by utilizing the R is the preferred choice for a more simplified design and lower costs. The R coefficient and will increase in value as the FET’s temperature

of the low-side FET. The R

DS(ON)

value of a FET has a positive temperature

DS(ON)

sensing method

DS(ON)

increases. The LM3150 controller will maintain a more stable current limit that is closer to the original value that was set by the user, by positively adjusting the I temperature increases. This does not provide an exact tem-

value as the IC

LIM-TH

perature compensation but allows for a more tightly controlled current limit when compared to traditional R methods when the R from room to maximum temperature and cause other com-

value can change typically 140%

DS(ON)

sensing

ponents to be over-designed. The temperature compensated I

is shown below where TJ is the die temperature of the

LIM-TH

LM3150 in Celsius:

LIM-TH(TJ

To calculate the R substitute equation (10) into I

) = I

x [1 + 3.3 x 10-3 x (TJ - 27)] (10)

LIM-TH

value with temperature compensation,

LIM

in equation (7).

LIM-TH

Short-Circuit Protection

The LM3150 will sense a short-circuit on the output by monitoring the output voltage. When the feedback voltage has fallen below 60% of the reference voltage, V short-circuit mode of operation will start. During short-circuit

x 0.6 (≈ 0.36V),

ref

operation, the SS pin is discharged and the output voltage will fall to 0V. The SS pin voltage, VSS, is then ramped back up at the rate determined by the SS capacitor and ISS until V reaches 0.7V. During this re-ramp phase, if the short-circuit

fault is still present the output current will be equal to the set current limit. Once the soft-start voltage reaches 0.7V the output voltage is sensed again and if the VFB is still below V

x 0.6 then the SS pin is discharged again and the cycle

ref

repeats until the short-circuit fault is removed.

Soft-Start

The soft-start (SS) feature allows the regulator to gradually reach a steady-state operating point, which reduces start-up stresses and current surges. At turn-on, while VCC is below the under-voltage threshold, the SS pin is internally grounded and V ramp VFB from 0V to 0.6V. By changing the capacitor value, the duration of start-up can be changed accordingly. The start-up time can be calculated using the following equation:

Where tSS is measured in seconds, V soft-start pin source current, which is typically 7.7 µA (refer to electrical table).

An internal switch grounds the SS pin if VCC is below the under-voltage lockout threshold, if a thermal shutdown occurs, or if the EN pin is grounded. By using an externally controlled switch, the output voltage can be shut off by grounding the SS pin.

During startup the LM3150 will operate in diode emulation mode, where the low-side gate LG will turn off and remain off when the inductor current falls to zero. Diode emulation mode will allow start-up into a pre-biased output voltage. When softstart is greater than 0.7V, the LM3150 will remain in continuous conduction mode. During diode emulation mode at current limit the low-gate will remain off when the inductor current is off.

is held at 0V. The SS capacitor is used to slowly

OUT

= 0.6V and ISS is the

ref

(11)

LM3150

FIGURE 1. Inductor Current - Current Limit Operation

9 www.national.com

30053112

The soft-start time should be greater than the input voltage rise time and also satisfy the following equality to maintain a smooth transition of the output voltage to the programmed

LM3150

regulation voltage during startup.

tSS ≥ (V

OUT

x C

OUT

) / (I

OCL

- I

) (12)

OUT

Enable/Shutdown

The EN pin can be activated by either leaving the pin floating due to an internal pull up resistor to VIN or by applying a logic high signal to the EN pin of 1.26V or greater. The LM3150 can be remotely shut down by taking the EN pin below 1.02V. Low quiescent shutdown is achieved when VEN is less than 0.4V. During low quiescent shutdown the internal bias circuitry is turned off.

The LM3150 has certain fault conditions that can trigger shutdown, such as over-voltage protection, current limit, undervoltage lockout, or thermal shutdown. During shutdown, the soft-start capacitor is discharged. Once the fault condition is removed, the soft-start capacitor begins charging, allowing the part to start-up in a controlled fashion. In conditions where there may be an open drain connection to the EN pin, it may be necessary to add a 1 nF bypass capacitor to this pin. This will help decouple noise from the EN pin and prevent false disabling.

Thermal Protection

The LM3150 should be operated such that the junction temperature does not exceed the maximum operating junction temperature. An internal thermal shutdown circuit, which activates at 165°C (typical), takes the controller to a low-power reset state by disabling the buck switch and the on-timer, and grounding the SS pin. This feature helps prevent catastrophic failures from accidental device overheating. When the junction temperature falls back below 150°C the SS pin is released and device operation resumes.

Design Guide

The design guide provides the equations required to design with the LM3150 SIMPLE SWITCHER® Controller. WEBENCH® design tool can be used with or in place of this section for a more complete and simplified design process.

1. Define Power Supply Operating Conditions

a. Required Output Voltage b. Maximum and Minimum DC Input Voltage c. Maximum Expected Load Current during Normal Operation d. Soft-Start Time

2. Set Output Voltage With Feedback Resistors

(13)

where R

3. Determine RON and f

The available frequency range for a given input voltage range, is determined by the duty-cycle, D = V mum tON and t teristics table. The maximum frequency is thus, f t

ON-MIN

The off-time will need to be less than the minimum off-time t

OFF

turn off and turn on delays of the MOSFETs which can easily add another 200 ns. The minimum off-time will occur at maximum duty cycle D chosen will allow for the minimum desired input voltage. The requirement for minimum off-time is t

+ 200 ns). If t

MIN

necessary to choose a smaller switching frequency fS. Choose RON so that the switching frequency at your typical

input voltage matches your fS chosen above using the following formula:

RON = [(V

4. Determine Inductor Required Using Figure 2

To use the nomograph in Figure 2, calculate the inductor voltmicrosecond constant ET from the following formula:

is the bottom resistor and R

FB1

times as specified in the electrical charac-

OFF

. Where D

min=VOUT/VIN-MAX

, is the minimum duty-cycle.

is the top resistor.

FB2

, and the mini-

OUT/VIN

smax

= D

min

as specified in the electrical characteristics table plus any

and will determine if the frequency

max

= (1–D

does not meet this requirement it will be

OFF

x VIN) - V

OUT

= - [(VIN - 1) x (VIN x 16.5 + 100)] - 1000 (15)

OND

OUT

OFF

] / (VIN x K x fS) + R

max

OND

)/fs ≥ (t

OFF-

(14)

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(16)

Where fs is in kHz units. The intersection of the Load Current and the Volt-microseconds lines on the chart below will determine which inductors are capable for use in the design. The chart shows a sample of parts that can be used. The offline calculator tools and WEBENCH® will fully calculate the requirements for the components needed for the design.

LM3150

Inductor Designator Inductance

(µH)

L01 47 7-9

L02 33 7-9 SER2817H-333KL COILCRAFT

L03 22 7-9 SER2814H-223KL COILCRAFT

L04 15 7-9 7447709150 WURTH

L05 10 7-9 RLF12560T-100M7R5 TDK

L06 6.8 7-9 B82477-G4682-M EPCOS

L07 4.7 7-9 B82477-G4472-M EPCOS

L08 3.3 7-9 DR1050-3R3-R COOPER

L09 2.2 7-9 MSS1048-222 COILCRAFT

L10 1.5 7-9 SRU1048-1R5Y BOURNS

L11 1 7-9 DO3316P-102 COILCRAFT

L12 0.68 7-9 DO3316H-681 COILCRAFT

L13 33 9-12

L14 22 9-12 SER2918H-223 COILCRAFT

L15 15 9-12 SER2814H-153KL COILCRAFT

L16 10 9-12 7447709100 WURTH

L17 6.8 9-12 SPT50H-652 COILCRAFT

L18 4.7 9-12 SER1360-472 COILCRAFT

L19 3.3 9-12 MSS1260-332 COILCRAFT

L20 2.2 9-12 DR1050-2R2-R COOPER

FIGURE 2. Inductor Nomograph

TABLE 1. Inductor Selection Table

Current

(A)

30053152

Part Name Vendor

11 www.national.com

Inductor Designator Inductance

LM3150

L21 1.5 9-12 DR1050-1R5-R COOPER

L22 1 9-12 DO3316H-102 COILCRAFT

L23 0.68 9-12

L24 0.47 9-12

L25 22 12-15 SER2817H-223KL COILCRAFT

L26 15 12-15

L27 10 12-15 SER2814L-103KL COILCRAFT

L28 6.8 12-15 7447709006 WURTH

L29 4.7 12-15 7447709004 WURTH

L30 3.3 12-15

L31 2.2 12-15

L32 1.5 12-15 MLC1245-152 COILCRAFT

L33 1 12-15

L34 0.68 12-15 DO3316H-681 COILCRAFT

L35 0.47 12-15

L36 0.33 12-15 DR73-R33-R COOPER

L37 22 15-

L38 15 15- SER2817H-153KL COILCRAFT

L39 10 15- SER2814H-103KL COILCRAFT

L40 6.8 15-

L41 4.7 15- SER2013-472ML COILCRAFT

L42 3.3 15- SER2013-362L COILCRAFT

L43 2.2 15-

L44 1.5 15- HA3778–AL COILCRAFT

L45 1 15- B82477-G4102-M EPCOS

L46 0.68 15-

L47 0.47 15-

L48 0.33 15-

(µH)

Current

(A)

Part Name Vendor

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5. Determine Output Capacitance

Typical hysteretic COT converters similar to the LM3150 require a certain amount of ripple that is generated across the ESR of the output capacitor and fed back to the error comparator. Emulated Ripple Mode control built into the LM3150 will recreate a similar ripple signal and thus the requirement for output capacitor ESR will decrease compared to a typical Hysteretic COT converter. The emulated ripple is generated by sensing the voltage signal across the low-side FET and is then compared to the FB voltage at the error comparator input to determine when to initiate the next on-time period.

Omin

= 70 / (f

x L)

(17)

The maximum ESR allowed to prevent over-voltage protection during normal operation is:

ESR

is calculated using V

min

Af = V

/ 0.6 if there is no feed-forward capacitor used

OUT

= (80 mV x L x Af) / ET

max

IN-MIN

min

(18)

Af = 1 if there is a feed-forward capacitor used

The minimum ESR must meet both of the following criteria:

ESR

min

is calculated using V

max

≥ (15 mV x L x Af) / ET

min

≥ [ ET

/ (VIN - V

max

IN-MAX

max

) ] x (Af / CO) (20)

OUT

(19)

Any additional parallel capacitors should be chosen so that their effective impedance will not negatively attenuate the output ripple voltage.

6. Determine The Use of Feed-Forward Capacitor

Certain applications may require a feed-forward capacitor for improved stability and easier selection of available output capacitance. Use the following equation to calculate the value of Cff.

ZFB = (R

Cff = V

7. MOSFET and R

x R

FB1

/(V

OUT

Selection

LIM

)/(R

+ R

FB2

FB1

x fS x ZFB) (22)

IN-MIN

) (21)

FB2

The high-side and low-side FETs must have a drain to source (VDS) rating of at least 1.2 x VIN.

Use the following equations to calculate the desired target value of the low-side FET R

for current limit.

DS(ON)

(23)

LIM-TH(Tj

) = I

x [1 + 3.3 x 10-3 x (Tj - 27)] (24)

LIM-TH

The gate drive current from VCC must not exceed the minimum current limit of VCC. The drive current from VCC can be calculated with:

VCCdrive

Where, Q side and low-side FETs.

is the combined total gate charge of the high-

gtotal

= Q

gtotal

x f

(25)

The plateau voltage of the FET VGS vs Qg curve, as shown in Figure 3, must be less than VCC - 750 mV.

30053181

FIGURE 3. Typical MOSFET Gate Charge Curve

See following design example for estimated power dissipation calculation.

8. Calculate Input Capacitance

The main parameters for the input capacitor are the voltage rating, which must be greater than or equal to the maximum DC input voltage of the power supply, and its rms current rating. The maximum rms current is approximately 50% of the maximum load current.

(26)

Where, ΔV age. A good starting point for the input ripple voltage is 5% of

is the maximum allowable input ripple volt-

IN-MAX

VIN. When using low ESR ceramic capacitors on the input of the

LM3150 a resonant circuit can be formed with the impedance of the input power supply and parasitic impedance of long leads/PCB traces to the LM3150 input capacitors. It is recommended to use a damping capacitor under these circumstances, such as aluminum electrolytic that will prevent ringing on the input. The damping capacitor should be chosen to be approximately 5 times greater than the parallel ceramic capacitors combination. The total input capacitance should be greater than 10 times the input inductance of the power supply leads/pcb trace. The damping capacitor should also be chosen to handle its share of the rms input current which is shared proportionately with the parallel impedance of the ceramic capacitors and aluminum electrolytic at the LM3150 switching frequency.

The C The recommended value is 0.1 µF.

capacitor should be placed directly at the VIN pin.

BYP

9. Calculate Soft-Start Capacitor

(27)

Where tss is the soft-start time in seconds and V

10. C

C mended value of 1 µF to 2.2 µF. For input voltage ranges that

, C

BST

and C

VCC

should be placed directly at the VCC pin with a recom-

VCC

= 0.6V.

ref

include voltages below 8V a 1 µF capacitor must be used for C

. C

VCC

creates a voltage used to drive the gate of the

BST

LM3150

13 www.national.com

high-side FET. It is charged during the SW off-time. The recommended value for C

is 0.47 µF. The EN bypass capac-

BST

LM3150

Design Example

FIGURE 4. Design Example Schematic

itor, CEN, recommended value is 1000 pF when driving the EN pin from open drain type of signal.

30053161

1. Define Power Supply Operating Conditions

a. V

= 3.3V

OUT

b. V

IN-MIN

= 6V, V

IN-TYP

= 12V, V

IN-MAX

= 24V

c. Typical Load Current = 12A, Max Load Current = 15A

d. Soft-Start time tSS = 5 ms

2. Set Output Voltage with Feedback Resistors

= 22.455 kΩ

FB2

= 22.6 kΩ, nearest 1% standard value.

FB2

3. Determine RON and f

smax

OFF

should meet the following criteria:

OFF

= V

min

OUT/VIN-MAX

= 3.3V/24V = 0.137

min

= 3.3V / 6V = 0.55

max

= 0.137/ 200 ns = 687 kHz

= V

max

OUT/VIN-MIN

= (1-0.55)/687 kHz = 654 ns

OFF

> t

OFF

OFF-MIN

> 725 ns

+ 200 ns

At the maximum switching frequency of 687 kHz, which is limited by the minimum on-time, the off-time of 654 ns is less than 725 ns. Therefore the switching frequency should be reduced and meet the following criteria:

fs < (1 - D)/725 ns

fS < (1 - 0.55)/725 ns = 620 kHz

A switching frequency is arbitrarily chosen at 500 kHz which should allow for reasonable size components and satisfies the requirements above.

fS = 500 kHz Using fS = 500 kHz RON can be calculated as follows:

RON = [(V

OND

x VIN) - V

OUT

] / (VIN x K x fS) + R

OUT

= - [(VIN - 1) x (VIN x 16.5 + 100)] - 1000

= - [(12 - 1) x (12 x 16.5 + 100)] -1000

= -4.3 kΩ

OND

RON = [(3.3 x 12) - 3.3] / (12 x 100 pC x 500 kHz) - 4.3 kΩ

RON = 56.2 kΩ

4. Determine Inductor Required

a. ET = (24-3.3) x (3.3/24) x (1000/500) = 5.7 V µs

b. From the inductor nomograph a 12A load and 5.7 V µs calculation corresponds to a L44 type of inductor.

c. Using the inductor designator L44 in Table 1 the Coilcraft HA3778–AL 1.65 µH inductor is chosen.

5. Determine Output Capacitance

The voltage rating on the output capacitor should be greater than or equal to the output voltage. As a rule of thumb most capacitor manufacturers suggests not to exceed 90% of the capacitor rated voltage. In the case of multilayer ceramics the capacitance will tend to decrease dramatically as the applied voltage is increased towards the capacitor rated voltage. The capacitance can decrease by as much as 50% when the applied voltage is only 30% of the rated voltage. The chosen

www.national.com 14

LM3150

capacitor should also be able to handle the rms current which is equal to:

For this design the chosen ripple current ratio, r = 0.3, represents the ratio of inductor peak-to-peak current to load current I

. A good starting point for ripple ratio is 0.3 but it is ac-

OUT

ceptable to choose r between 0.25 to 0.5. The nomographs in this datasheet all use 0.3 as the ripple current ratio.

= 1A

rmsco

tON = (3.3V/12V)/500 kHz = 550 ns

Minimum output capacitance is:

= 70 / (f

Omin

= 70 / (500 kHz2 x 1.65 µH) = 169 µF

Omin

x L)

The maximum ESR allowed to prevent over-voltage protection during normal operation is:

ESR

= (80 mV x L x Af) / ET

max

Af = V

/ 0.6 without a feed-forward capacitor

OUT

Af = 1 with a feed-forward capacitor

For this design a feed-forward capacitor will be used to help minimize output ripple.

ESR

= (80 mV x 1.65 µH x 1) / 5.7 V µs

max

ESR

= 23 mΩ

max

The minimum ESR must meet both of the following criteria:

Let Cff = 270 pF, which is the closest next standard value.

7. MOSFET and R

Selection

LIM

The LM3150 is designed to drive N-channel MOSFETs. For a maximum input voltage of 24V we should choose N-channel MOSFETs with a maximum drain-source voltage, VDS, greater than 1.2 x 24V = 28.8V. FETs with maximum VDS of 30V will be the first option. The combined total gate charge Q

of the high-side and low-side FET should satisfy the

gtotal

following:

≤ I

gtotal

≤ 65 mA / 500 kHz

gtotal

Where I temperature range, specified in the electrical characteristics

is the minimum current limit of VCC, over the

VCCL

/ f

VCCL

≤ 130 nC

table. The MOSFET gate charge Qg is gathered from reading the VGS vs Qg curve of the MOSFET datasheet at the VGS = 5V for the high-side, M1, MOSFET and VGS = 6V for the lowside, M2, MOSFET.

The Renesas MOSFET RJK0305DPB has a gate charge of 10 nC at VGS = 5V, and 12 nC at VGS = 6V. This combined gate charge for a high-side, M1, and low-side, M2, MOSFET 12 nC + 10 nC = 22 nC is less than 130 nC calculated Q

gtotal

The calculated MOSFET power dissipation must be less than the max allowed power dissipation, Pdmax, as specified in the MOSFET datasheet. An approximate calculation of the FET power dissipated Pd, of the high-side and low-side FET is given by:

High-Side MOSFET

ESR

≥ (15 mV x L x Af) / ET

min

ESR

≥ [ ET / (VIN - V

min

ESR

≥ (15 mV x 1.65 µH x 1) / 5.7 V µs = 4.3 mΩ

min

ESR

≥ [5.7 V µs / (12 - 3.3) ] x (1 / 169 µF) = 3.9 mΩ

min

) ] x (Af / CO)

OUT

Based on the above criteria two 150 µF polymer aluminum capacitors with a ESR = 12 mΩ each for a effective ESR in parallel of 6 mΩ was chosen from Panasonic. The part number is EEF-UE0J101P.

6. Determine Use of Feed-Forward Capacitor

From step 5 the capacitor chosen in ESR is small enough that we should use a feed-forward capacitor. This is calculated from:

The max power dissipation of the RJK0305DPB is rated as 45W for a junction temperature that is 125°C higher than the case temperature and a thermal resistance from the FET junction to case, θJC, of 2.78°C/W. When the FET is mounted onto the PCB, the PCB will have some additional thermal resistance such that the total system thermal resistance of the FET package and the PCB, θJA, is typically in the range of 30° C/W for this type of FET package. The max power dissipation, Pdmax, with the FET mounted onto a PCB with a 125°C junction temperature rise above ambient temperature and θJA = 30°C/W, can be estimated by:

Pdmax = 125°C / 30°C/W = 4.1W

The system calculated Pdh of 0.674W is much less than the FET Pdmax of 4.1W and therefore the RJK0305DPB max allowable power dissipation criteria is met.

Low-Side MOSFET

Primary loss is conduction loss given by:

15 www.national.com

Pdl = Iout2 x R

Pdl is also less than the Pdmax specified on the RJK0305DPB

LM3150

MOSFET datasheet.

x (1-D) = 122 x 0.01 x (1-0.275) = 1W

DS(ON)

However, it is not always necessary to use the same MOSFET for both the high-side and low-side. For most applications it is necessary to choose the high-side MOSFET with the lowest gate charge and the low-side MOSFET is chosen for the lowest allowed R vs Qg curve must be less than VCC - 750 mV.

The current limit resistor, R R

of the low-side FET at the maximum junction temper-

DS(ON)

ature of 100°C. By choosing to go into current limit when the

. The plateau voltage of the FET V

DS(ON)

, is calculated by estimating the

LIM

average output load current is 20% higher than the output load current of 12A while the inductor ripple current ratio is 1/3 of the load current will make ICL= 10.4A. Then the following calculation of R

Let R

= 1.91 kΩ which is the next standard value.

LIM

is:

LIM

= (10.4 x 0.014) / (75 x 10-6) = 1.9 kΩ

LIM

8. Calculate Input Capacitance

The input capacitor should be chosen so that the voltage rating is greater than the maximum input voltage which for this example is 24V. Similar to the output capacitor, the voltage rating needed will depend on the type of capacitor chosen. The input capacitor should also be able to handle the input rms current, which is a maximum of approximately 0.5 x I

. For this example the rms input current is approximately

OUT

0.5 x 12A = 6A. The minimum capacitance with a maximum 5% input ripple

ΔV

= (0.05 x 12) = 0.6V:

IN-MAX

CIN = [12 x 0.275 x (1-0.275)] / [500 kHz x 0.6] = 8 µF

To handle the large input rms current 2 ceramic capacitors are chosen at 10 µF each with a voltage rating of 50V and case size of 1210. Each ceramic capacitor is capable of handling 3A of rms current. A aluminum electrolytic of 5 times the combined input capacitance, 5 x 20 µF = 100 µF, is chosen to provide input voltage filter damping because of the low ESR ceramic input capacitors.

= 0.1µF ceramic with a voltage rating greater than max-

BYP

imum V

9. Calculate Soft-Start Capacitor

The soft start-time should be greater than the input voltage rise time and also satisfy the following equality to maintain a smooth transition of the output voltage to the programmed regulation voltage during startup. The desired soft-start time, tss, of 5 ms also needs to satisfy the equality in equation 12, by using the chosen component values through the previous steps as shown below:

5 ms > (3.3V x 300 µF) / (1.2 x 12A - 12A)

10. C

, CEN, and C

VCC

= 1 µF ceramic with a voltage rating greater than 10V

VCC

BST

CEN = 1000 pF ceramic with a voltage rating greater than 10V

= 0.47 µF ceramic with a voltage rating greater than 10V

BST

5 ms > 0.412 ms

Since the desired soft-start time satisfies the equality in equation 12, the soft start capacitor is calculated as:

CSS = (7.7 µA x 5 ms) / 0.6V = 0.064 µF

Let CSS = 0.068 µF, which is the next closest standard value. This should be a ceramic cap with a voltage rating greater than 10V.

www.national.com 16

Bill of Materials

Designator Value Parameters Manufacturer Part Number

BST

BYP

, C

IN1

IN2

, C

OUT1

OUT2

VCC

L1 1.65 µH

M1, M2 30V

FB1

FB2

LIM

U1 LM3150 National Semiconductor LM3150MH

0.47 µF Ceramic, X7R, 16V, 10% TDK C2012X7R1C474K

0.1 µF Ceramic, X7R, 50V, 10% TDK C2012X7R1H104K

1000 pF Ceramic, X7R, 50V, 10% TDK C1608X7R1H102K

270 pF Ceramic, C0G, 50V, 5% Vishay-Bccomponents VJ0805A271JXACW1BC

10 µF Ceramic, X5R, 35V, 20% Taiyo Yuden GMK325BJ106KN-T

150 µF Polymer Aluminum, , 6.3V, 20% Panasonic EEF-UE0J151R

0.068 µF Ceramic, 0805, 25V, 10% Vishay VJ0805Y683KXXA

1 µF Ceramic, X7R, 16V, 10% Kemet C0805C105K4RACTU

Coilcraft HA3778–AL

Renesas RJK0305DPB

4.99 kΩ

22.6 kΩ

1.91 kΩ

56.2 kΩ

Shielded Drum Core, 2.53 mΩ

8 nC, R

@4.5V=10 mΩ

DS(ON)

1%, 0.125W Vishay-Dale CRCW08054k99FKEA

1%, 0.125W Vishay-Dale CRCW080522k6FKEA

1%, 0.125W Vishay-Dale CRCW08051K91FKEA

1%, 0.125W Vishay-Dale CRCW080556K2FKEA

LM3150

17 www.national.com

PCB Layout Considerations

It is good practice to layout the power components first, such

LM3150

as the input and output capacitors, FETs, and inductor. The first priority is to make the loop between the input capacitors and the source of the low-side FET to be very small and tie the grounds of the low-side FET and input capacitor directly to each other and then to the ground plane through vias. As shown in Figure 5 when the input capacitor ground is tied directly to the source of the low-side FET, parasitic inductance in the power path, along with noise coupled into the ground plane, are reduced.

The switch node is the next item of importance. The switch node should be made only as large as required to handle the load current. There are fast voltage transitions occurring in the switch node at a high frequency, and if the switch node is made too large it may act as an antennae and couple switching noise into other parts of the circuit. For high power designs, it is recommended to use a multi-layer board. The FETs are going to be the largest heat generating devices in the design, and as such, care should be taken to remove the heat. On multi-layer boards using exposed-pad packages for the FETs such as the power-pak SO-8, vias should be used under the FETs to the same plane on the interior layers to help dissipate the heat and cool the FETs. For the typical single FET Power-Pak type FETs, the high-side FET DAP is VIN. The VIN plane should be copied to the other interior layers to the bottom layer for maximum heat dissipation. Likewise, the DAP of the low-side FET is connected to the SW node and the SW node shape should be duplicated to the other PCB layers for maximum heat dissipation.

See the Evaluation Board application note AN-1900 for an example of a typical multi-layer board layout, and the Demonstration Board Reference Design Application Note for a typical 2 layer board layout. Each design allows for single sided component mounting.

30053158

FIGURE 5. Schematic of Parasitics

30053180

FIGURE 6. PCB Placement of Power Stage

www.national.com 18

Physical Dimensions inches (millimeters) unless otherwise noted

LM3150

14-Lead eTSSOP Package

NS Package Number MXA14A

19 www.national.com

Notes

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LM3150 SIMPLE SWITCHER

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National Semiconductor LM3150 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual

General Description

Features

Typical Applications

Typical Application

Connection Diagram

Ordering Information

Pin Descriptions

Absolute Maximum Ratings (Note 1)

Electrical Characteristics Limits in standard type are for T

Operating Ratings (Note 1)

Simplified Block Diagram

Typical Performance Characteristics

Theory of Operation

Programming the Output Voltage

Regulation Comparator

Over-Voltage Comparator

Current Limit

Short-Circuit Protection

Soft-Start

FIGURE 1. Inductor Current - Current Limit Operation

Enable/Shutdown

Thermal Protection

Design Guide

FIGURE 2. Inductor Nomograph

TABLE 1. Inductor Selection Table

FIGURE 3. Typical MOSFET Gate Charge Curve

Design Example

FIGURE 4. Design Example Schematic

Bill of Materials

PCB Layout Considerations

FIGURE 5. Schematic of Parasitics

FIGURE 6. PCB Placement of Power Stage

Physical Dimensions inches (millimeters) unless otherwise noted