National Semiconductor LM2854 Technical data

April 2, 2008

LM2854
4A 500 kHz / 1 MHz PowerWise® Synchronous SIMPLE
SWITCHER® Buck Regulator

LM2854 4A 500 kHz / 1 MHz PowerWise® Synchronous SIMPLE SWITCHER® Buck Regulator

General Description

The LM2854 PowerWise® SIMPLE SWITCHER® buck regu­lator is a 500 kHz or 1 MHz step-down switching voltage
regulator capable of driving up to a 4A load with exceptional
power conversion efficiency, line and load regulation, and
output accuracy. The LM2854 can accept an input voltage rail
between 2.95V and 5.5V and deliver an adjustable and highly
accurate output voltage as low as 0.8V. Externally estab­lished soft-start with a small capacitor facilitates controlled
start-up, and the LM2854 is capable of starting gracefully into
a pre-biased output voltage. Partial internal compensation re­duces the number of external passive components and PC
board space typically necessary in a voltage mode buck con­verter application, yet preserving flexibility to deal with ce­ramic and/or electrolytic based load capacitors. Lossless
cycle-by-cycle peak current limit is used to protect the load
from an overcurrent or short-circuit fault, and an enable com­parator simplifies sequencing applications. The LM2854 is
available in an exposed pad TSSOP-16 package that en­hances the thermal performance of the regulator.

Features

Input voltage range of 2.95V to 5.5V

■

Maximum load current of 4A

■

Wide bandwidth voltage mode control loop, partial internal

■

compensation
Fixed switching frequency of 500 kHz or 1 MHz

■

35 mΩ integrated MOSFET switches

■

Adjustable output voltage down to 0.8V

■

Optimized reference voltage initial accuracy and

■

temperature drift
External soft-start control with tracking capability

■

Enable pin with hysteresis

■

Low standby current of 230 µA

■

Pre-biased load startup capability

■

Integrated UVLO, OCP and thermal shutdown

■

100% duty cycle capability

■

eTSSOP-16 exposed pad package

■

Applications

Low Voltage POL Regulation from 5V or 3.3V Rail

■

Local Solution for FPGA/DSP/ASIC/µP Core or I/O Power

■

Broadband Networking and Communications

■

Infrastructure
Portable Computing

■

Typical Application Circuit

30052801

SIMPLE SWITCHER® is a Registered Trademark of National Semiconductor Corporation.

© 2008 National Semiconductor Corporation 300528 www.national.com

Connection Diagram

LM2854

Top View

16-Lead eTSSOP

30052802

Ordering Information

Order Number Frequency Package Type Package Drawing Supplied As

LM2854MH-500 500 kHz

LM2854MHX-500 2500 Units, Tape and Reel

LM2854MH-1000 1 MHz 92 Units, Rail

LM2854MHX-1000 2500 Units, Tape and Reel

TSSOP-16 exposed pad MXA16A

92 Units, Rail

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Pin Descriptions

Pin Number Name Description

1 NC Reserved for factory use, this pin should be connected to GND to ensure proper operation.

2,3,4 PGND Power ground pins for the internal power switches. These pins should be connected together locally

at the device and tied to the PC board ground plane.

5,6,7 PVIN Input voltage to the power switches inside the device. These pins should be connected together at the

device. A low ESR input capacitance should be located as close as possible to these pins.

8,9 NC Reserved for factory use, these pins should be connected to GND to ensure proper operation.

10 AVIN Analog input voltage supply that generates the internal bias. The UVLO circuit derives its input from

this pin also. Thus, if the voltage on AVIN falls below the UVLO threshold, both internal FETs are turned
off. It is recommended to connect PVIN to AVIN through a low pass RC filter to minimize the influence
of input rail ripple and noise on the analog control circuitry. The series resistor should be 1Ω and the
bypass capacitor should be a X7R ceramic type 0.1 µF to 1.0 µF.

11 EN Active high enable input for the device. Typically, turn-on threshold is 1.23V with 0.15V hysteresis. An

external resistor divider from PVIN can be used to effectively increase the UVLO turn-on threshold. If
not used, the EN pin should be connected to PVIN.

12,13 SW Switch node pins. This is the PWM output of the internal MOSFET power switches. These pins should

be tied together locally and connected to the filter inductor.

14 SS Soft-start control pin. An internal 2 µA current source charges an external capacitor connected between

this pin and AGND to set the output voltage ramp rate during startup. This pin can also be used to
configure the tracking feature.

15 AGND Quiet analog ground for the internal bias circuitry.

16 FB Feedback pin is connected to the inverting input of the voltage loop error amplifier. A 0.8V bandgap

reference is connected to the non-inverting input of the error amplifier.

EXP Exposed

Pad

Exposed metal pad on the underside of the package with a weak electrical connection to PGND. It is
recommended to connect this pad to the PC board ground plane in order to improve thermal
dissipation.

LM2854

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Absolute Maximum Ratings (Notes 1, 6)

If Military/Aerospace specified devices are required,

LM2854

please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

PVIN, AVIN, SW, EN, FB, SS to GND -0.3V to 6.0V
ESD Susceptibility (Note 2) ±2 kV
Power Dissipation Internally Limited
Junction Temperature 150°C
Storage Temperature Range −65°C to +150°C

Lead Temperature
Soldering (10 sec) 260°C
Vapor Phase (60 sec) 215°C
Infrared 220°C

Operating Ratings (Note 6)

PVIN to GND 2.95V to 5.5V
AVIN to GND 2.95V to 5.5V
Junction Temperature −40°C to +125°C

Electrical Characteristics Specifications with standard typeface are for T

= 25°C only; limits in bold face type

J

apply over the Operating Junction Temperature Range TJ range of -40°C to 125°C. Minimum and maximum limits are guaranteed
through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are
provided for reference purposes only. AVIN = PVIN = EN = 5.0V, unless otherwise indicated in the Conditions column.

Symbol Parameter Conditions Min

(Note 3)

Typ

(Note 4)

Max

(Note 3)

SYSTEM PARAMETERS

ΔV

ΔV

V

REF

REF

V

REF

/ΔAVIN

/ΔI

ON

Reference Voltage (Note 5) Measured at the FB pin 0.790 0.8 0.808 V

Line Regulation (Note 5)

Load Regulation Normal operation 0.25 mV/A

O

ΔAVIN = 2.95V to 5.50V

0.04 0.6 %

UVLO Threshold (AVIN) Rising 2.6 2.95 V

Falling hysteresis 25 170 375 mV

R

DS(ON)-P

R

DS(ON)-N

I

SS

I

CL

I

I

SD

Q

PFET On Resistance ISW = 4A 35 65

NFET On Resistance ISW = 4A 34 65

Soft-Start Current 2 µA

Peak Current Limit Threshold 4.5 6.0 6.7 A

Operating Current Non-switching 1.7 3 mA

Shut Down Quiescent Current EN = 0V 230 500 µA

PWM SECTION

f

SW

Switching Frequency 1 MHz option 800 1050 1160 kHz

500 kHz option 400 525 580 kHz

D

range

PWM Duty Cycle Range 0 100 %

ENABLE CONTROL

V

V

EN(HYS)

IH

EN Pin Rising Threshold 0.8 1.23 1.65 V

EN Pin Hysteresis 150 mV

THERMAL CONTROL

T

T

SD-HYS

SD

TJ for Thermal Shutdown 165 °C

Hysteresis for Thermal Shutdown 10 °C

THERMAL RESISTANCE

θ

JA

Junction to Ambient MXA16A 35 °C/W

Units

mΩ

mΩ

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.

Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Test method is per JESD22-AI14.

Note 3: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical

Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).

Note 4: Typical numbers are at 25°C and represent the most likely parametric norm.

Note 5: V

Note 6: PGND and AGND are electrically connected together on the PC board and the resultant net is termed GND.

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measured in a non-switching, closed-loop configuration.

REF

Typical Performance Characteristics Unless otherwise specified, the following conditions apply: VIN =

PVIN = AVIN = EN = 5.0V, CIN is 47 µF 10V X5R ceramic capacitor, LO is from TDK SPM6530T family; T
curves, bode plots and waveforms, and TJ = 25°C for all others.

= 25°C for efficiency

AMBIENT

LM2854

Feedback Voltage vs. Temperature

Soft Start Current vs Temperature

30052803

UVLO Threshold vs. Temperature

30052804

Enable Threshold vs. Temperature

30052805

Switching Frequency vs. Temperature

30052807

30052806

PMOS R

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vs. Temperature

DS(ON)

30052808

LM2854

NMOS R

vs. Temperature

DS(ON)

IQ (operating) vs. VIN and Temperature

30052809

Peak Current Limit vs. Temperature

30052811

IQ (disabled) vs. VIN and Temperature, EN = 0V

Feedback Voltage vs. V

Switching Frequency vs. V

30052810

IN

30052812

IN

30052813

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30052814

LM2854

LM2854 1 MHz Efficiency vs. I

V

= 0.8V, LO = 0.47 µH, 3.3 mΩ DCR

OUT

LM2854 1 MHz Efficiency vs. I

V

= 1.2V, LO = 0.68 µH, 4.9 mΩ DCR

OUT

OUT

OUT

30052815

LM2854 1 MHz Efficiency vs. I

V

= 2.5V, LO = 1.0 µH, 7.1 mΩ DCR

OUT

LM2854 1 MHz Efficiency vs. I

V

= 3.3V, LO = 1.0 µH, 7.1 mΩ DCR

OUT

OUT

30052816

OUT

LM2854 1 MHz Efficiency vs. I

V

= 1.8V, LO = 1.0 µH, 7.1 mΩ DCR

OUT

OUT

30052817

30052819

30052818

LM2854 500 kHz Efficiency vs. I

V

= 0.8V, LO = 1.0 µH, 7.1 mΩ DCR

OUT

OUT

30052820

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