LM2743
N-Channel FET Synchronous Buck Regulator Controller
for Conversion from 3.3V
LM2743 N-Channel FET Synchronous Buck Regulator Controller for Conversion from 3.3V
General Description
The LM2743 is a high-speed, N-Channel synchronous buck
regulator controller with a 2%, 0.6V feedback reference voltage intended to make down conversion from 3.3V to as low
as 0.6V easy. A fixed-frequency voltage-mode PWM control
architecture is used, that is adjustable from 50kHz to 2MHz
through an external resistor. This wide range of PWM frequencies gives the power supply designer the flexibility to
make tradeoffs among component size, cost, noise and
efficiency. The power MOSFETs can run on a separate 1V to
16V (Input Voltage, V
biased from a 3V to 6V (IC Input Voltage, V
power-good flag, precision shutdown threshold and soft start
features make power supply tracking and sequencing easy.
The LM2743 employs output under-voltage and over-voltage
flag, and current limit. Current limit is achieved by monitoring
the voltage drop across the on resistance of the low-side
MOSFET. The adaptive non-overlapping MOSFET gate drivers help avoid potential shoot-through problems while maintaining high efficiency. Both high-side and low-side MOSFETs are the lower cost N-Channel type, and the IC can
accept a bootstrap structure to saturate the high-side MOSFET for highest efficiency.
) (Note 2) rail while the regulator is
IN
), 2mA rail. A
CC
Typical Application
Features
n MOSFET input voltage (VIN) from 1V to 16V (Note 2)
n IC input voltage (V
n Output voltage adjustable down to 0.6V
n Power good flag and output enable
n Output over-voltage and under-voltage flag
n FB voltage: 2% over temperature
n Current limit without series sense resistor
n Adjustable soft start
n Tracking and sequencing with shutdown and soft start
pins
n Switching frequency from 50 kHz to 2 MHz
n TSSOP-14 package
) from 3V to 6V
CC
Applications
n 3.3V Buck Regulation
n Set-Top Boxes/ Home Gateways
n Core Logic Regulators
n High-Efficiency Buck Regulation
BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate
drive. The voltage should be at least one gate threshold
) above the regulator input voltage (VIN) to properly
(V
GS(th)
turn on the high-side FET.
LG (Pin 2) - Gate drive for the low-side N-channel MOSFET.
This signal is interlocked with HG (Pin 14) to avoid a shootthrough problem.
PGND (Pins 3, 13) - Ground for low-side FET drive circuitry.
Connect to system ground.
SGND (Pin 4) - Ground for signal level circuitry. Connect to
system ground.
(Pin 5) Supply rail for the controller.
V
CC
PWGD (Pin 6) - Power good pin. This is an open drain
output. The pin is pulled low when the chip is in undervoltage flag (UVF), over-voltage flag (OVF), or UVLO mode.
During normal operation, this pin is connected to V
other low voltage source through a pull-up resistor (R
).
UP
(Pin 7) - Current limit threshold setting. This sources a
I
SEN
fixed 40µA current. A resistor of appropriate value should be
connected between this pin and the drain of the low-side
FET.
EAO (Pin 8) - Output of the error amplifier. The voltage level
on this pin is compared with an internally generated ramp
signal to determine the duty cycle. This pin is necessary for
compensating the control loop.
CC
PULL-
= 155˚C/W
or
20095202
SS (Pin 9) - Soft start and track pin. A 10 µA current is
sourced from this pin. This pin is connected to the noninverting input of the error amplifier during soft start, or any
time the voltage is below the reference. To track power
supplies connect a resistor divider (smaller than 10kΩ for
better precision) from the output of the master supply directly
to the SS pin. To limit the inrush current of a single power
supply, place a capacitor to ground (see Application
Information/Start Up for appropriate capacitance value). This
pin should not be forced before SD or V
(above the
CC
UVLO).
FB (Pin 10) - This is the inverting input of the error amplifier,
which is used for sensing the output voltage and compensating the control loop. The FB current is negligible.
FREQ (Pin 11) - The switching frequency (F
connecting a resistor (R
) between this pin and ground.
FADJ
) is set by
OSC
SD (Pin 12) - IC shutdown pin. To assure proper IC start-up
the SD pin should not be left floating. When this pin is pulled
low the chip turns both, high and low, sides off. While this pin
is low, the IC will not start up. This pin features a precision
threshold for power supply sequencing, as well as a lower
threshold to ensure minimal quiescent current.
HG (Pin 14) - Gate drive for the high-side N-channel MOSFET. This signal is interlocked with LG (Pin 2) to avoid a
shoot-through problem.
www.national.com2
LM2743
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
CC
7V
+ 0.3V
V
CC
BOOT Voltage21V
All other pinsV
Junction Temperature150˚C
Storage Temperature−65˚C to 150˚C
Soldering Information
Lead Temperature
(soldering, 10sec)260˚C
Infrared or Convection (20sec)235˚C
ESD Rating (Note 3)2 kV
Operating Ratings
IC Input Voltage (VCC)3Vto6V
Junction Temperature Range−40˚C to +125˚C
Thermal Resistance (θ
)155˚C/W
JA
Electrical Characteristics
VCC= 3.3V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA=TJ= +25˚C. Limits appearing in
boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are guaranteed by design,
test, or statistical analysis.
SymbolParameterConditionsMinTypMaxUnits
= 3.3V0.6120.60.588
V
V
FB
V
ON
FB Pin Voltage
UVLO ThresholdsRising
Operating VCCCurrent
I
Q_VCC
Shutdown VCCCurrent
(Note 4)
t
PWGD1
t
PWGD2
I
SS-ON
I
SS-OC
PWGD Pin Response TimeFB Voltage Going Up6µs
PWGD Pin Response TimeFB Voltage Going Down6µs
SS Pin Source CurrentSS Voltage = 0V71014µA
SS Pin Sink Current During Over
Current
I
Pin Source Current Trip
I
SEN-TH
SEN
Point
ERROR AMPLIFIER
GBWError Amplifier Unity Gain
Bandwidth
GError Amplifier DC Gain106dB
SRError Amplifier Slew Rate3.2V/µs
I
EAO
EAO Pin Current Sourcing and
Sinking Capability
V
EA
Error Amplifier Maximum SwingMinimum
CC
V
=5V0.6120.60.588
CC
2.76
Falling
V
= 3.3V, SD = 3.3V
CC
Fsw = 600kHz
= 5V, SD = 3.3V
V
CC
Fsw = 600kHz
11.52.1
11.72.1
2.42
VCC= 3.3V, SD = 0V0110185µA
SS Voltage = 0V
90µA
254055µA
9MHz
V
= 1.5, FB = 0.55V
EAO
= 1.5, FB = 0.65V
V
EAO
2.6
9.2
0
Maximum
2
V
V
mA
mA
V
www.national.com3
Electrical Characteristics (Continued)
VCC= 3.3V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA=TJ= +25˚C. Limits appearing in
LM2743
boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are guaranteed by design,
test, or statistical analysis.
SymbolParameterConditionsMinTypMaxUnits
GATE DRIVE
I
Q-BOOT
R
DS1
R
DS2
R
DS3
R
DS4
OSCILLATOR
F
OSC
DMax Duty Cyclef
LOGIC INPUTS AND OUTPUTS
V
STBY-IH
V
STBY-IL
V
SD-IH
V
SD-IL
V
PWGD-TH-LO
V
PWGD-TH-HI
V
PWGD-HYS
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device
operates correctly. Opearting Ratings do not imply guaranteed performance limits.
Note 2: The power MOSFETs can run on a separate 1V to 16V rail (Input voltage, V
Note 3: The human body model is a 100pF capacitor discharged through a 1.5k resistor into each pin.
Note 4: Shutdown V
BOOT Pin Quiescent CurrentBOOTV = 12V, EN = 01890µA
Top FET Driver Pull-Up ON
resistance
Top FET Driver Pull-Down ON
resistance
Bottom FET Driver Pull-Up ON
BOOT-SW = 5V
@
350mA
resistance
Bottom FET Driver Pull-Down
ON resistance
R
= 813.2kΩ50
FADJ
= 117.6kΩ300
R
FADJ
PWM Frequency
R
= 54.4kΩ475600725
FADJ
R
= 18.8kΩ1400
FADJ
R
= 10.8kΩ2000
FADJ
= 300kHz
PWM
= 600kHz
f
PWM
Standby High Trip PointFB = 0.575V, BOOTV = 3.3V, EN =