The LM2738 regulator is a monolithic, high frequency, PWM
step-down DC/DC converter in an 8-pin LLP or 8-pin eMSOP
package. It provides all the active functions for local DC/DC
conversion with fast transient response and accurate regulation in the smallest possible PCB area.
With a minimum of external components, the LM2738 is easy
to use. The ability to drive 1.5A loads with an internal
250mΩ NMOS switch using state-of-the-art 0.5µm BiCMOS
technology results in the best power density available.
Switching frequency is internally set to 550kHz (LM2738Y) or
1.6MHz (LM2738X), allowing the use of extremely small surface mount inductors and chip capacitors. Even though the
operating frequencies are very high, efficiencies up to 90%
are easy to achieve. External enable is included, featuring an
ultra-low stand-by current of 400nA. The LM2738 utilizes current-mode control and internal compensation to provide highperformance regulation over a wide range of operating
conditions. Additional features include internal soft-start circuitry to reduce in-rush current, cycle-by-cycle current limit,
thermal shutdown, and output over-voltage protection.
SW Voltage-0.5V to 20V
Boost Voltage-0.5V to 25.5V
Boost to SW Voltage2.5V to 5.5V
Junction Temperature Range−40°C to +125°C
Thermal Resistance θJA for LLP/eMSOP(Note 3)
Thermal Shutdown (Note 3)165°C
3V to 20V
60°C/W
Storage Temp. Range-65°C to 150°C
Electrical Characteristics
Specifications with standard typeface are for TJ = 25°C, and those in boldface type apply over the full Operating Temperature
Range (TJ = -40°C to 125°C). VIN = 12V, V
are guaranteed by design, test, or statistical analysis.
SymbolParameterConditions
V
ΔVFB/ΔV
I
Feedback Voltage
FB
Feedback Voltage Line Regulation
IN
Feedback Input Bias Current
FB
Undervoltage Lockout
UVLO
Undervoltage Lockout
UVLO Hysteresis0.4
F
D
D
R
DS(ON)
MAX
I
I
Switching Frequency
SW
Maximum Duty Cycle
Minimum Duty Cycle
MIN
Switch ON Resistance
Switch Current Limit
CL
Quiescent Current
Q
Quiescent Current (shutdown)VEN = 0V
I
BOOST
V
EN_TH
I
EN
I
SW
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see Electrical Characteristics.
Note 2: Human body model, 1.5kΩ in series with 100pF.
Note 3: Typical thermal shutdown will occur if the junction temperature exceeds 165°C. The maximum power dissipation is a function of T
The maximum allowable power dissipation at any ambient temperature is PD = (T
3” PC board with 2 oz. copper on 4 layers in still air in accordance to JEDEC standards. Thermal resistance varies greatly with layout, copper thicknes, number
of layers in PCB, power distribution, number of thermal vias, board size, ambient temperature, and air flow.
Note 4: Guaranteed to National’s Average Outgoing Quality Level (AOQL).
Note 5: Typicals represent the most likely parametric norm.
– TA)/θJA . All numbers apply for packages soldered directly onto a 3” x
J(MAX)
J(MAX)
Units
V
MHz
%
%
mΩ
A
mA
V
3www.national.com
Typical Performance Characteristics All curves taken at V
unless specified otherwise.
LM2738
Efficiency vs Load Current - "X" V
OUT
= 5V
= 12V, V
IN
- VSW = 5V, and TA = 25°C,
BOOST
Efficiency vs Load Current - "Y" V
OUT
= 5V
Efficiency vs Load Current - "X" V
Efficiency vs Load Current - "X" V
OUT
OUT
30049197
= 3.3V
30049151
= 1.5V
Efficiency vs Load Current - "Y" V
Efficiency vs Load Current - "Y" V
OUT
OUT
30049198
= 3.3V
30049152
= 1.5V
30049199
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30049131
LM2738
Typical Performance Characteristics All curves taken at V
unless specified otherwise.
Oscillator Frequency vs Temperature - "X"
30049127
Current Limit vs Temperature
VIN = 5V
Oscillator Frequency vs Temperature - "Y"
IQ Non-Switching vs Temperature
= 12V, V
IN
- VSW = 5V, and TA = 25°C,
BOOST
30049128
VFB vs Temperature
30049129
30049133
30049147
R
vs Temperature
DSON
30049130
5www.national.com
Typical Performance Characteristics All curves taken at V
unless specified otherwise.
= 12V, V
IN
- VSW = 5V, and TA = 25°C,
BOOST
Line Regulation - "X" (V
Line Regulation - "X" (V
= 1.5V, I
OUT
= 3.3V, I
OUT
= 750mA)
OUT
= 750mA)
OUT
30049156
Line Regulation - "Y" (V
Line Regulation - "Y" (V
= 1.5V, I
OUT
= 3.3V, I
OUT
= 750mA)
OUT
= 750mA)
OUT
30049154
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Load Regulation - "X" (V
OUT
= 1.5V)
30049155
30049176
Load Regulation - "Y" (V
OUT
30049153
= 1.5V)
30049175
LM2738
Typical Performance Characteristics All curves taken at V
unless specified otherwise.
Load Regulation - "X" (V
IQ Switching vs Temperature
OUT
= 3.3V)
Load Regulation - "Y" (V
30049177
Load Transient - "X" (V
= 12V, V
IN
- VSW = 5V, and TA = 25°C,
BOOST
= 3.3V)
OUT
= 3.3V, VIN = 12V)
OUT
30049178
(V
= 3.3V, VIN = 12, I
OUT
Startup - "X"
=1.5A (Resistive Load))
OUT
30049146
30049190
30049194
In-Rush Current - "X"
(V
= 3.3V, VIN = 12V, I
OUT
7www.national.com
=1.5A (Resistive Load) )
OUT
30049191
Block Diagram
LM2738
30049106
FIGURE 1. Simplified Internal Block Diagram
Application Information
THEORY OF OPERATION
The LM2738 is a constant frequency PWM buck regulator IC
that delivers a 1.5A load current. The regulator has a preset
switching frequency of either 550kHz (LM2738Y) or 1.6MHz
(LM2738X). These high frequencies allow the LM2738 to operate with small surface mount capacitors and inductors,
resulting in DC/DC converters that require a minimum amount
of board space. The LM2738 is internally compensated, so it
is simple to use, and requires few external components. The
LM2738 uses current-mode control to regulate the output
voltage.
The following operating description of the LM2738 will refer
to the Simplified Block Diagram (Figure 1) and to the waveforms in Figure 2. The LM2738 supplies a regulated output
voltage by switching the internal NMOS control switch at constant frequency and variable duty cycle. A switching cycle
begins at the falling edge of the reset pulse generated by the
internal oscillator. When this pulse goes low, the output control logic turns on the internal NMOS control switch. During
this on-time, the SW pin voltage (VSW) swings up to approximately VIN, and the inductor current (IL) increases with a linear
slope. IL is measured by the current-sense amplifier, which
generates an output proportional to the switch current. The
sense signal is summed with the regulator’s corrective ramp
and compared to the error amplifier’s output, which is proportional to the difference between the feedback voltage and
V
. When the PWM comparator output goes high, the out-
REF
put switch turns off until the next switching cycle begins.
During the switch off-time, inductor current discharges
through Schottky diode D1, which forces the SW pin to swing
below ground by the forward voltage (VD) of the catch diode.
The regulator loop adjusts the duty cycle (D) to maintain a
constant output voltage.
30049107
FIGURE 2. LM2738 Waveforms of SW Pin Voltage and
Inductor Current
BOOST FUNCTION
Capacitor C
erate a voltage V
to the internal NMOS control switch. To properly drive the internal NMOS switch during its on-time, V
least 2.5V greater than VSW. It is recommended that V
be greater than 2.5V above VSW for best efficiency. V
VSW should not exceed the maximum operating limit of 5.5V.
and diode D2 in Figure 3 are used to gen-
BOOST
BOOST
. V
- VSW is the gate drive voltage
BOOST
needs to be at
BOOST
BOOST
BOOST
–
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LM2738
5.5V > V
– VSW > 2.5V for best performance.
BOOST
When the LM2738 starts up, internal circuitry from the
BOOST pin supplies a maximum of 20mA to C
current charges C
switch on. The BOOST pin will continue to source current to
C
until the voltage at the feedback pin is greater than
BOOST
0.76V.
There are various methods to derive V
1.
From the input voltage (3.0V < VIN < 5.5V)
2.
From the output voltage (2.5V < V
3.
From an external distributed voltage rail (2.5V < V
to a voltage sufficient to turn the
BOOST
:
BOOST
< 5.5V)
OUT
5.5V)
4.
From a shunt or series zener diode
BOOST
. This
<
EXT
In the Simplifed Block Diagram of Figure 1, capacitor
C
and diode D2 supply the gate-drive voltage for the
BOOST
NMOS switch. Capacitor C
VIN. During a normal switching cycle, when the internal NMOS
control switch is off (T
VIN minus the forward voltage of D2 (V
OFF
current in the inductor (L) forward biases the Schottky diode
D1 (V
). Therefore the voltage stored across C
FD1
V
- VSW = VIN - V
BOOST
is charged via diode D2 by
BOOST
) (refer to Figure 2), V
), during which the
FD2
+ V
FD2
FD1
BOOST
BOOST
equals
is
When the NMOS switch turns on (TON), the switch pin rises
to
forcing V
V
BOOST
VSW = VIN – (R
to rise thus reverse biasing D2. The voltage at
BOOST
is then
V
= 2VIN – (R
BOOST
DSON
x IL),
DSON
x IL) – V
FD2
+ V
FD1
which is approximately
2VIN - 0.4V
for many applications. Thus the gate-drive voltage of the
NMOS switch is approximately
VIN - 0.2V
An alternate method for charging C
the output as shown in Figure 3. The output voltage should
is to connect D2 to
BOOST
be between 2.5V and 5.5V, so that proper gate voltage will be
applied to the internal switch. In this circuit, C
a gate drive voltage that is slightly less than V
BOOST
OUT
provides
.
(V
– VD3) > 2.5V
INMIN
30049109
FIGURE 4. Zener Reduces Boost Voltage from V
IN
An alternative method is to place the zener diode D3 in a
shunt configuration as shown in Figure 5. A small 350mW to
500mW 5.1V zener in a SOT-23 or SOD package can be used
for this purpose. A small ceramic capacitor such as a 6.3V,
0.1µF capacitor (C4) should be placed in parallel with the
zener diode. When the internal NMOS switch turns on, a pulse
of current is drawn to charge the internal NMOS gate capacitance. The 0.1 µF parallel shunt capacitor ensures that the
V
voltage is maintained during this time.
BOOST
30049148
FIGURE 5. Boost Voltage Supplied from the Shunt Zener
on V
IN
30049108
FIGURE 3. V
In applications where both VIN and V
5.5V, or less than 3V, C
these voltages. If VIN and V
C
can be charged from VIN or V
BOOST
age by placing a zener diode D3 in series with D2, as shown
Charges C
OUT
cannot be charged directly from
BOOST
OUT
BOOST
are greater than
OUT
are greater than 5.5V,
minus a zener volt-
OUT
in Figure 4. When using a series zener diode from the input,
ensure that the regulation of the input supply doesn’t create
a voltage that falls outside the recommended V
(V
– VD3) < 5.5V
INMAX
BOOST
voltage.
Resistor R3 should be chosen to provide enough RMS current
to the zener diode (D3) and to the BOOST pin. A recommended choice for the zener current (I
current I
of the NMOS control switch and varies typically according to
into the BOOST pin supplies the gate current
BOOST
) is 1 mA. The
ZENER
the following formula for the X version:
I
= 0.56 x (D + 0.54) x (V
BOOST
I
can be calculated for the Y version using the following:
BOOST
I
= 0.22 x (D + 0.54) x (V
BOOST
where D is the duty cycle, V
I
is in milliamps. V
BOOST
anode of the boost diode (D2), and VD2 is the average forward
ZENER
and VD2 are in volts, and
ZENER
is the voltage applied to the
voltage across D2. Note that this formula for I
ical current. For the worst case I
by 40%. In that case, the worst case boost current will be
I
BOOST-MAX
BOOST
= 1.4 x I
– VD2) mA
ZENER
- VD2) µA
ZENER
gives typ-
BOOST
, increase the current
BOOST
R3 will then be given by
R3 = (VIN - V
9www.national.com
ZENER
) / (1.4 x I
BOOST
+ I
ZENER
)
For example, using the X-version let VIN = 10V, V
VD2 = 0.7V, I
LM2738
I
BOOST
= 1mA, and duty cycle D = 50%. Then
ZENER
= 0.56 x (0.5 + 0.54) x (5 - 0.7) mA = 2.5mA
R3 = (10V - 5V) / (1.4 x 2.5mA + 1mA) = 1.11kΩ
ENABLE PIN / SHUTDOWN MODE
The LM2738 has a shutdown mode that is controlled by the
enable pin (EN). When a logic low voltage is applied to EN,
the part is in shutdown mode and its quiescent current drops
to typically 400nA. The voltage at this pin should never exceed VIN + 0.3V.
SOFT-START
This function forces V
ing start up. During soft-start, the error amplifier’s reference
to increase at a controlled rate dur-
OUT
voltage ramps from 0V to its nominal value of 0.8V in approximately 600µs. This forces the regulator output to ramp up in
a more linear and controlled fashion, which helps reduce in
rush current.
OUTPUT OVERVOLTAGE PROTECTION
The overvoltage comparator compares the FB pin voltage to
a voltage that is 16% higher than the internal reference Vref.
Once the FB pin voltage goes 16% above the internal reference, the internal NMOS control switch is turned off, which
allows the output voltage to decrease toward regulation.
UNDERVOLTAGE LOCKOUT
Undervoltage lockout (UVLO) prevents the LM2738 from operating until the input voltage exceeds 2.7V (typ).
The UVLO threshold has approximately 400mV of hysteresis,
so the part will operate until VIN drops below 2.3V (typ). Hysteresis prevents the part from turning off during power up if
the VIN ramp-up is non-monotonic.
ZENER
= 5V,
VSW can be approximated by:
VSW = I
OUT
x R
DSON
The diode forward drop (VD) can range from 0.3V to 0.7V depending on the quality of the diode. The lower the VD, the
higher the operating efficiency of the converter. The inductor
value determines the output ripple current. Lower inductor
values decrease the size of the inductor, but increase the
output ripple current. An increase in the inductor value will
decrease the output ripple current.
One must ensure that the minimum current limit (2.0A) is not
exceeded, so the peak current in the inductor must be calculated. The peak current (I
) in the inductor is calculated by:
LPK
I
= I
OUT
+ Δi
L
LPK
30049180
FIGURE 6. Inductor Current
CURRENT LIMIT
The LM2738 uses cycle-by-cycle current limiting to protect
the output switch. During each switching cycle, a current limit
comparator detects if the output switch current exceeds 2.9A
(typ), and turns off the switch until the next switching cycle
begins.
THERMAL SHUTDOWN
Thermal shutdown limits total power dissipation by turning off
the output switch when the IC junction temperature exceeds
165°C. After thermal shutdown occurs, the output switch
doesn’t turn on until the junction temperature drops to approximately 150°C.
Design Guide
INDUCTOR SELECTION
The Duty Cycle (D) can be approximated quickly using the
ratio of output voltage (VO) to input voltage (VIN):
The catch diode (D1) forward voltage drop and the voltage
drop across the internal NMOS switch must be included to
calculate a more accurate duty cycle. Calculate D by using
the following formula:
In general,
ΔiL = 0.1 x (I
) → 0.2 x (I
OUT
OUT
)
If ΔiL = 33.3% of 1.50A, the peak current in the inductor will
be 2.0A. The minimum guaranteed current limit over all operating conditions is 2.0A. One can either reduce ΔiL, or make
the engineering judgment that zero margin will be safe
enough. The typical current limit is 2.9A.
The LM2738 operates at frequencies allowing the use of ceramic output capacitors without compromising transient response. Ceramic capacitors allow higher inductor ripple
without significantly increasing output ripple. See the output
capacitor section for more details on calculating output voltage ripple. Now that the ripple current is determined, the
inductance is calculated by:
Where
When selecting an inductor, make sure that it is capable of
supporting the peak output current without saturating. Inductor saturation will result in a sudden reduction in inductance
and prevent the regulator from operating correctly. Because
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LM2738
of the speed of the internal current limit, the peak current of
the inductor need only be specified for the required maximum
output current. For example, if the designed maximum output
current is 1.0A and the peak current is 1.25A, then the inductor should be specified with a saturation current limit of >
1.25A. There is no need to specify the saturation or peak current of the inductor at the 2.9A typical switch current limit.
Because of the operating frequency of the LM2738, ferrite
based inductors are preferred to minimize core losses. This
presents little restriction since the variety of ferrite-based inductors is huge. Lastly, inductors with lower series resistance
(R
) will provide better operating efficiency. For recom-
DCR
mended inductors see Example Circuits.
INPUT CAPACITOR
An input capacitor is necessary to ensure that VIN does not
drop excessively during switching transients. The primary
specifications of the input capacitor are capacitance, voltage,
RMS current rating, and ESL (Equivalent Series Inductance).
The recommended input capacitance is 10 µF.The input voltage rating is specifically stated by the capacitor manufacturer.
Make sure to check any recommended deratings and also
verify if there is any significant change in capacitance at the
operating input voltage and the operating temperature. The
input capacitor maximum RMS input current rating (I
must be greater than:
RMS-IN
ripple will be approximately sinusoidal and 90° phase shifted
from the switching action. Given the availability and quality of
MLCCs and the expected output voltage of designs using the
LM2738, there is really no need to review any other capacitor
technologies. Another benefit of ceramic capacitors is their
ability to bypass high frequency noise. A certain amount of
switching edge noise will couple through parasitic capacitances in the inductor to the output. A ceramic capacitor will
bypass this noise while a tantalum will not. Since the output
capacitor is one of the two external components that control
the stability of the regulator control loop, most applications will
require a minimum of 22 µF of output capacitance. Capacitance, in general, is often increased when operating at lower
duty cycles. Refer to the circuit examples at the end of the
datasheet for suggested output capacitances of common applications. Like the input capacitor, recommended multilayer
ceramic capacitors are X7R or X5R types.
CATCH DIODE
The catch diode (D1) conducts during the switch off-time. A
Schottky diode is recommended for its fast switching times
and low forward voltage drop. The catch diode should be
chosen so that its current rating is greater than:
)
The reverse breakdown rating of the diode must be at least
ID1 = I
OUT
x (1-D)
the maximum input voltage plus appropriate margin. To improve efficiency, choose a Schottky diode with a low forward
voltage drop.
Neglecting inductor ripple simplifies the above equation to:
It can be shown from the above equation that maximum RMS
capacitor current occurs when D = 0.5. Always calculate the
RMS at the point where the duty cycle D is closest to 0.5. The
ESL of an input capacitor is usually determined by the effective cross sectional area of the current path. A large leaded
capacitor will have high ESL and a 0805 ceramic chip capacitor will have very low ESL. At the operating frequencies of the
LM2738, leaded capacitors may have an ESL so large that
the resulting impedance (2πfL) will be higher than that required to provide stable operation. As a result, surface mount
capacitors are strongly recommended.
Sanyo POSCAP, Tantalum or Niobium, Panasonic SP, and
multilayer ceramic capacitors (MLCC) are all good choices for
both input and output capacitors and have very low ESL. For
MLCCs it is recommended to use X7R or X5R type capacitors
due to their tolerance and temperature characteristics. Consult capacitor manufacturer datasheets to see how rated
capacitance varies over operating conditions.
OUTPUT CAPACITOR
The output capacitor is selected based upon the desired output ripple and transient response. The initial current of a load
transient is provided mainly by the output capacitor. The output ripple of the converter is:
When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the output
OUTPUT VOLTAGE
The output voltage is set using the following equation where
R2 is connected between the FB pin and GND, and R1 is
connected between VO and the FB pin. A good value for R2
is 10k. When designing a unity gain converter (Vo = 0.8V), R1
should be between 0Ω and 100Ω, and R2 should not be loaded.
V
= 0.80V
REF
PCB LAYOUT CONSIDERATIONS
When planning layout there are a few things to consider when
trying to achieve a clean, regulated output. The most important consideration is the close coupling of the GND connections of the input capacitor and the catch diode D1. These
ground ends should be close to one another and be connected to the GND plane with at least two through-holes. Place
these components as close to the IC as possible. Next in importance is the location of the GND connection of the output
capacitor, which should be near the GND connections of
CIN and D1. There should be a continuous ground plane on
the bottom layer of a two-layer board except under the switching node island. The FB pin is a high impedance node and
care should be taken to make the FB trace short to avoid noise
pickup and inaccurate regulation. The feedback resistors
should be placed as close as possible to the IC, with the GND
of R1 placed as close as possible to the GND of the IC. The
V
trace to R2 should be routed away from the inductor and
OUT
any other traces that are switching. High AC currents flow
through the VIN, SW and V
short and wide as possible. However, making the traces wide
traces, so they should be as
OUT
increases radiated noise, so the designer must make this
trade-off. Radiated noise can be decreased by choosing a
11www.national.com
shielded inductor. The remaining components should also be
placed as close as possible to the IC. Please see Application
Note AN-1229 for further considerations and the LM2738 de-
LM2738
mo board as an example of a four-layer layout.
RECOMMENED OPERATING AREA DUE TO MINIMUM
ON TIME
The LM2738 operates over a wide range of conditions, which
is limited by the ON time of the device. A graph is provided to
show the recommended operating area for the "X" at the full
load (1.5A) and at 25°C ambient. The "Y" version of the
LM2738 operates at a lower frequency and therefore operates over the entire range of operating voltages.
30049187
FIGURE 7. LM2738X - 1.6MHz (25°C, LOAD=1.5A)
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LM2738
Calculating Efficiency, and Junction
Temperature
The complete LM2738 DC/DC converter efficiency can be
calculated in the following manner.
Or
Calculations for determining the most significant power losses are shown below. Other losses totaling less than 2% are
not discussed.
Power loss (P
the converter: switching and conduction. Conduction losses
usually dominate at higher output loads, whereas switching
losses remain relatively fixed and dominate at lower output
loads. The first step in determining the losses is to calculate
the duty cycle (D):
VSW is the voltage drop across the internal NFET when it is
on, and is equal to:
VD is the forward voltage drop across the Schottky catch
diode. It can be obtained from the diode manufactures Electrical Characteristics section. If the voltage drop across the
inductor (V
The conduction losses in the free-wheeling Schottky diode
are calculated as follows:
Often this is the single most significant power loss in the circuit. Care should be taken to choose a Schottky diode that
has a low forward voltage drop.
Another significant external power loss is the conduction loss
in the output inductor. The equation can be simplified to:
The LM2738 conduction loss is mainly associated with the
internal NFET switch:
) is the sum of two basic types of losses in
LOSS
VSW = I
) is accounted for, the equation becomes:
DCR
P
DIODE
P
IND
OUT
= VD x I
= I
OUT
x R
OUT
2
x R
DSON
x (1-D)
DCR
If the inductor ripple current is fairly small, the conduction
losses can be simplified to:
P
COND
= I
OUT
x R
DSON
x D
2
Switching losses are also associated with the internal NFET
switch. They occur during the switch on and off transition periods, where voltages and currents overlap resulting in power
loss. The simplest means to determine this loss is to empirically measure the rise and fall times (10% to 90%) of the
switch at the switch node.
Switching Power Loss is calculated as follows:
P
= 1/2(VIN x I
SWR
P
= 1/2(VIN x I
SWF
PSW = P
OUT
OUT
SWR
x FSW x T
x FSW x T
+ P
SWF
RISE
FALL
)
)
Another loss is the power required for operation of the internal
circuitry:
PQ = IQ x V
IN
IQ is the quiescent operating current, and is typically around
1.9mA for the 0.55MHz frequency option.
Typical Application power losses are:
Power Loss Tabulation
V
IN
V
OUT
I
OUT
V
D
F
SW
I
Q
T
RISE
T
FALL
R
DS(ON)
IND
DCR
D0.275P
η
ΣP
COND
ΣP
COND
12.0V
3.3VP
OUT
1.25A
0.34VP
DIODE
550kHz
1.9mAP
8nSP
8nSP
275mΩ
70mΩ
86.7%P
+ PSW + P
+ P
SWF
P
INTERNAL
DIODE
+ P
SWR
Q
SWR
SWF
P
COND
P
IND
LOSS
INTERNAL
+ P
IND
+ PQ = P
= 207mW
+ PQ = P
INTERNAL
4.125W
317mW
22.8mW
33mW
33mW
118mW
110mW
634mW
207mW
LOSS
Thermal Definitions
TJ = Chip junction temperature
TA = Ambient temperature
R
= Thermal resistance from chip junction to device case
θJC
R
= Thermal resistance from chip junction to ambient air
θJA
Heat in the LM2738 due to internal power dissipation is removed through conduction and/or convection.
Conduction: Heat transfer occurs through cross sectional areas of material. Depending on the material, the transfer of
heat can be considered to have poor to good thermal conductivity properties (insulator vs. conductor).
Heat Transfer goes as:
Silicon → package → lead frame → PCB
Convection: Heat transfer is by means of airflow. This could
be from a fan or natural convection. Natural convection occurs
when air currents rise from the hot device to cooler air.
13www.national.com
Thermal impedance is defined as:
LM2738
Thermal impedance from the silicon junction to the ambient
air is defined as:
The PCB size, weight of copper used to route traces and
ground plane, and number of layers within the PCB can greatly effect R
make a large difference in the thermal impedance. Thermal
vias are necessary in most applications. They conduct heat
from the surface of the PCB to the ground plane. Four to six
thermal vias should be placed under the exposed pad to the
ground plane if the LLP package is used.
Thermal impedance also depends on the thermal properties
due to the application's operating conditions (Vin, Vo, Io etc),
and the surrounding circuitry.
Silicon Junction Temperature Determination Method 1:
To accurately measure the silicon temperature for a given
application, two methods can be used. The first method requires the user to know the thermal impedance of the silicon
junction to top case temperature.
Some clarification needs to be made before we go any further.
R
is the thermal impedance from all six sides of an IC
θJC
package to silicon junction.
R
is the thermal impedance from top case to the silicon
ΦJC
junction.
In this data sheet we will use R
to measure top case temperature with a small thermocouple
attached to the top case.
R
is approximately 30°C/Watt for the 8-pin LLP package
ΦJC
with the exposed pad. Knowing the internal dissipation from
the efficiency calculation given previously, and the case temperature, which can be empirically measured on the bench
we have:
. The type and number of thermal vias can also
θJA
so that it allows the user
ΦJC
enters thermal shutdown. If the SW-pin is monitored, it will be
obvious when the internal NFET stops switching, indicating a
junction temperature of 165°C. Knowing the internal power
dissipation from the above methods, the junction temperature, and the ambient temperature R
can be determined.
θJA
Once this is determined, the maximum ambient temperature
allowed for a desired junction temperature can be found.
An example of calculating R
National Semiconductor LM2738 LLP demonstration board is
for an application using the
θJA
shown below.
The four layer PCB is constructed using FR4 with ½ oz copper
traces. The copper ground plane is on the bottom layer. The
ground plane is accessed by two vias. The board measures
3.0cm x 3.0cm. It was placed in an oven with no forced airflow.
The ambient temperature was raised to 144°C, and at that
temperature, the device went into thermal shutdown.
From the previous example:
P
INTERNAL
= 207mW
If the junction temperature was to be kept below 125°C, then
the ambient temperature could not go above 109°C
Tj - (R
θJA
x P
LOSS
) = T
A
125°C - (102°C/W x 207mW) = 104°C
LLP Package
Therefore:
Tj = (R
ΦJC
x P
LOSS
) + T
C
From the previous example:
Tj = (R
Tj = 30°C/W x 0.207W + T
ΦJC
x P
INTERNAL
) + T
C
C
The second method can give a very accurate silicon junction
temperature.
The first step is to determine R
LM2738 has over-temperature protection circuitry. When the
of the application. The
θJA
silicon temperature reaches 165°C, the device stops switching. The protection circuitry has a hysteresis of about 15°C.
Once the silicon temperature has decreased to approximately
150°C, the device will start to switch again. Knowing this, the
R
for any application can be characterized during the early
θJA
stages of the design one may calculate the R
the PCB circuit into a thermal chamber. Raise the ambient
by placing
θJA
temperature in the given working application until the circuit
www.national.com14
30049174
FIGURE 8. Internal LLP Connection
For certain high power applications, the PCB land may be
modified to a "dog bone" shape (see Figure 9). By increasing
the size of ground plane, and adding thermal vias, the R
for the application can be reduced.
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