National Semiconductor LM2662, LM2663 Technical data

LM2662/LM2663 Switched Capacitor Voltage Converter
LM2662/LM2663 Switched Capacitor Voltage Converter
January 1999

General Description

The LM2662/LM2663 CMOS charge-pump voltage con­verter inverts a positive voltage in the range of 1.5V to 5.5V to the corresponding negative voltage. The LM2662/LM2663 uses two low cost capacitors to provide 200 mA of output current without the cost, size, and EMI related to inductor based converters. With an operating current of only 300 µA and operating efficiency greater than 90% at most loads, the LM2662/LM2663 provides ideal performance for battery powered systems. The LM2662/LM2663 may also be used as a positive voltage doubler.
The oscillator frequency can be lowered by adding an exter­nal capacitor to the OSC pin. Also, the OSC pin may be used to drive the LM2662/LM2663 with an external clock. For LM2662, a frequency control (FC) pin selects the oscillator frequency of 20 kHz or 150 kHz. For LM2663, an external shutdown (SD) pin replaces the FC pin. The SD pin can be used to disable the device and reduce the quiescent current to 10 µA. The oscillator frequency for LM2663 is 150 kHz.

Basic Application Circuits

Voltage Inverter Positive Voltage Doubler

Features

n Inverts or doubles input supply voltage n Narrow SO-8 Package n 3.5typical output resistance n 86% typical conversion efficiency at 200 mA n (LM2662) selectable oscillator
frequency: 20 kHz/150 kHz
n (LM2663) low current shutdown mode

Applications

n Laptop computers n Cellular phones n Medical instruments n Operational amplifier power supplies n Interface power supplies n Handheld instruments
10000301
10000302
Splitting VINin Half
10000303
© 2004 National Semiconductor Corporation DS100003 www.national.com

Absolute Maximum Ratings (Note 1)

Power Dissipation (TA= 25˚C) (Note 3) 735
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (V+ to GND, or GND to OUT) 6V
LM2662/LM2663
LV (OUT − 0.3V) to (GND + 3V)
FC, OSC, SD The least negative of (OUT − 0.3V)
or (V+ − 6V) to (V+ + 0.3V)
V+ and OUT Continuous Output Current 250 mA
Output Short-Circuit Duration to GND (Note
Max (Note 3) 150˚C
T
J
θ
(Note 3) 170˚C/W
JA
Operating Junction Temperature
Range −40˚C to +85˚C
Storage Temperature Range −65˚C to +150˚C
Lead Temperature (Soldering, 10 seconds) 300˚C
ESD Rating 2 kV
2) 1 sec.

Electrical Characteristics

Limits in standard typeface are for TJ= 25˚C, and limits in boldface type apply over the full operating temperature range. Un­less otherwise specified: V+ = 5V, FC = Open, C
Symbol Parameter Condition Min Typ Max Units
V+ Supply Voltage R
I
Q
I
SD
Supply Current No Load FC = V+ (LM2662)
Shutdown Supply Current
= 1k Inverter, LV = Open 3.5 5.5
L
(LM2663)
V
SD
Shutdown Pin Input Voltage Shutdown Mode 2.0 (Note 5)
(LM2663) Normal Operation 0.3
I
R
f
f
I
L
OUT
OSC
SW
OSC
Output Current 200 mA
Output Resistance (Note 6) IL= 200 mA 3.5 7
Oscillator Frequency (Note 7) OSC = Open FC = Open 7 20
Switching Frequency (Note 8) OSC = Open FC = Open 3.5 10
OSC Input Current FC = Open
FC=V+
P
EFF
V
OEFF
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device beyond its rated operating conditions.
Note 2: OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be avoided. Also, for temperatures above 85˚C, OUT must not be shorted to GND or V+, or device may be damaged.
Note 3: The maximum allowable power dissipation is calculated by using P ambient temperature, and θ
Note 4: In the test circuit, capacitors C output voltage and efficiency.
Note 5: In doubling mode, when V
Note 6: Specified output resistance includes internal switch resistance and capacitor ESR.
Note 7: For LM2663, the oscillator frequency is 150 kHz.
Note 8: The output switches operate at one half of the oscillator frequency, f
Power Efficiency RL(500) between V+and OUT 90 96 %
I
= 200 mA to GND 86
L
Voltage Conversion Efficiency No Load 99 99.96 %
is the junction-to-ambient thermal resistance of the specified package.
JA
and C2are 47 µF, 0.2maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce
1
>
5V, minimum input high for shutdown equals V
out
= 47 µF.(Note 4)
1=C2
Inverter, LV = GND 1.5 5.5 V
Doubler, LV = OUT 2.5 5.5
1.3 4
FC = Open 0.3 0.8
10 µA
FC=V+ 55 150
FC=V+ 27.5 75
±
2
±
10
DMax
OSC
=(T
=2fSW.
JMax−TA
−3V.
out
)/θJA, where T
is the maximum junction temperature, TAis the
JMax
mW
mALV = Open SD = Ground (LM2663)
V
kHz
kHz
µA
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Test Circuits

10000304

FIGURE 1. LM2662 and LM2663 Test Circuits

Typical Performance Characteristics

(Circuit of Figure 1)
LM2662/LM2663
10000305
Supply Current vs
Supply Voltage
Output Source
Resistance vs Supply
Voltage
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Supply Current vs
Oscillator Frequency
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Output Source
Resistance vs
Temperature
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Typical Performance Characteristics (Circuit of Figure 1) (Continued)
Output Source
Resistance vs
Temperature
LM2662/LM2663
Efficiency vs Load
Current
Output Voltage Drop
vs Load Current
Output Voltage vs
Oscillator Frequency
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10000343
10000342
Efficiency vs
Oscillator Frequency
10000344
Oscillator Frequency
vs External
Capacitance
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Typical Performance Characteristics (Circuit of Figure 1) (Continued)
LM2662/LM2663
Oscillator Frequency
vs Supply Voltage
10000347
Oscillator Frequency
vs Supply Voltage
Oscillator Frequency
vs Temperature Oscillator Frequency
vs Temperature
10000348
Shutdown Supply
Current vs
Temperature
(LM2663 Only)
10000349
10000351
10000350
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Connection Diagrams

8-Lead SO (M)

LM2662/LM2663
10000320 10000321
Top View
Order Number LM2662M, LM2663M
See NS Package Number M08A

Pin Description

Pin Name Function
Voltage Inverter Voltage Doubler
1 FC Frequency control for internal oscillator: Same as inverter.
(LM2662) FC = open, f
FC = V+, f
FC has no effect when OSC pin is driven externally.
1SD
(LM2663)
Shutdown control pin, tie this pin to the ground in normal operation.
2 CAP+ Connect this pin to the positive terminal of
charge-pump capacitor.
3 GND Power supply ground input. Power supply positive voltage input.
4 CAP− Connect this pin to the negative terminal of
charge-pump capacitor.
5 OUT Negative voltage output. Power supply ground input.
6 LV Low-voltage operation input. Tie LV to GND
when input voltage is less than 3.5V. Above
3.5V, LV can be connected to GND or left open. When driving OSC with an external clock, LV must be connected to GND.
7 OSC Oscillator control input. OSC is connected to an
internal 15 pF capacitor. An external capacitor can be connected to slow the oscillator. Also, an external clock can be used to drive OSC.
8 V+ Power supply positive voltage input. Positive voltage output.
= 20 kHz (typ);
OSC
= 150 kHz (typ);
OSC
Same as inverter.
Same as inverter.
Same as inverter.
LV must be tied to OUT.
Same as inverter except that OSC cannot be driven by an external clock.

Circuit Description

The LM2662/LM2663 contains four large CMOS switches which are switched in a sequence to invert the input supply voltage. Energy transfer and storage are provided by exter­nal capacitors. Figure 2 illustrates the voltage conversion scheme. When S supply voltage V+. During this time interval switches S
are open. In the second time interval, S1and S3are open
S
4
and S4are closed, C1is charging C2. After a number
and S
2
of cycles, the voltage across C the anode of C cathode of C in the switches, and no ESR in the capacitors. In reality, the charge transfer efficiency depends on the switching fre­quency, the on-resistance of the switches, and the ESR of the capacitors.
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and S3are closed, C1charges to the
1
2
will be pumped to V+. Since
is connected to ground, the output at the
2
equals −(V+) assuming no load on C2, no loss
2
2
and
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FIGURE 2. Voltage Inverting Principle

Application Information

SIMPLE NEGATIVE VOLTAGE CONVERTER

The main application of LM2662/LM2663 is to generate a negative supply voltage. The voltage inverter circuit uses only two external capacitors as shown in the Basic Applica­tion Circuits. The range of the input supply voltage is 1.5V to
5.5V. For a supply voltage less than 3.5V, the LV pin must be connected to ground to bypass the internal regulator cir­cuitry. This gives the best performance in low voltage appli­cations. If the supply voltage is greater than 3.5V, LV may be connected to ground or left open. The choice of leaving LV open simplifies the direct substitution of the LM2662/ LM2663 for the LMC7660 Switched Capacitor Voltage Con­verter.
The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistor. The voltage source equals −(V+). The output resistance R function of the ON resistance of the internal MOS switches, the oscillator frequency, and the capacitance and ESR of C and C2. Since the switching current charging and discharg-
is approximately twice as the output current, the effect
ing C
1
of the ESR of the pumping capacitor C in the output resistance. The output capacitor C
is multiplied by four
1
2
and discharging at a current approximately equal to the output current, therefore, its ESR only counts once in the output resistance. A good approximation is:
where RSWis the sum of the ON resistance of the internal MOS switches shown in Figure 2.
High value, low ESR capacitors will reduce the output resis­tance. Instead of increasing the capacitance, the oscillator frequency can be increased to reduce the 2/(f Once this term is trivial compared with R
oscxC1
SW
further increasing in oscillator frequency and capacitance will become ineffective.
The peak-to-peak output voltage ripple is determined by the oscillator frequency, and the capacitance and ESR of the output capacitor C
:
2
Again, using a low ESR capacitor will result in lower ripple.
is a
out
is charging
) term.
and ESRs,
LM2662/LM2663
oscillator; also, it protects the device from turning-on its own parasitic diode and potentially latching-up. Therefore, the Schottky diode D capability to charge the output capacitor at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning-on. A Schottky diode like 1N5817 can be used for most applications. If the input voltage ramp is less than 10V/ms, a smaller Schottky diode like MBR0520LT1 can be used to reduce the circuit size.

SPLIT V+ IN HALF

Another interesting application shown in the Basic Applica­tion Circuits is using the LM2662/LM2663 as a precision voltage divider. Since the off-voltage across each switch equals V
/2, the input voltage can be raised to +11V.
IN

CHANGING OSCILLATOR FREQUENCY

1
open, the oscillator frequency is 20 kHz; when FC is con­nected to V+, the frequency increases to 150 kHz. A higher oscillator frequency allows smaller capacitors to be used for equivalent output resistance and ripple, but increases the typical supply current from 0.3 mA to 1.3 mA.
The oscillator frequency can be lowered by adding an exter­nal capacitor between OSC and GND (See typical perfor­mance characteristics). Also, in the inverter mode, an exter­nal clock that swings within 100 mV of V+ and GND can be used to drive OSC. Any CMOS logic gate is suitable for driving OSC. LV must be grounded when driving OSC. The maximum external clock frequency is limited to 150 kHz.
The switching frequency of the converter (also called the charge pump frequency) is half of the oscillator frequency.
Note: OSC cannot be driven by an external clock in the voltage-doubling
mode.

TABLE 1. LM2662 Oscillator Frequency Selection

FC OSC Oscillator
Open Open 20 kHz
V+ Open 150 kHz
Open or V+ External Capacitor See Typical
N/A External Clock External Clock
should have enough current carrying
1
Performance Characteristics
(inverter mode only) Frequency

POSITIVE VOLTAGE DOUBLER

The LM2662/LM2663 can operate as a positive voltage dou­bler (as shown in the Basic Application Circuits). The dou­bling function is achieved by reversing some of the connec­tions to the device. The input voltage is applied to the GND pin with an allowable voltage from 2.5V to 5.5V. The V+ pin is used as the output. The LV pin and OUT pin must be connected to ground. The OSC pin can not be driven by an external clock in this operation mode. The unloaded output voltage is twice of the input voltage and is not reduced by the diode D
The Schottky diode D
’s forward drop.
1
is only needed for start-up. The
1
internal oscillator circuit uses the V+ pin and the LV pin (connected to ground in the voltage doubler circuit) as its power rails. Voltage across V+ and LV must be larger than
1.5V to insure the operation of the oscillator. During start-up, is used to charge up the voltage at V+ pin to start the
D
1

TABLE 2. LM2663 Oscillator Frequency Selection

OSC Oscillator
Open 150 kHz
External Capacitor See Typical Performance
Characteristics
External Clock External Clock Frequency
(inverter mode only)

SHUTDOWN MODE

For the LM2663, a shutdown (SD) pin is available to disable the device and reduce the quiescent current to 10 µA. Ap­plying a voltage greater than 2V to the SD pin will bring the device into shutdown mode. While in normal operating mode, the SD pin is connected to ground.
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Application Information (Continued)

CAPACITOR SELECTION

As discussed in the Simple Negative Voltage Converter section, the output resistance and ripple voltage are depen­dent on the capacitance and ESR values of the external
LM2662/LM2663
capacitors. The output voltage drop is the load current times the output resistance, and the power efficiency is
Where IQ(V+) is the quiescent power loss of the IC device,
2
R
and I
L
switch on-resistance, the two external capacitors and their ESRs.
Low ESR capacitors (Table 3) are recommended for both capacitors to maximize efficiency, reduce the output voltage drop and voltage ripple. For convenience, C usually chosen to be the same.
is the conversion loss associated with the
OUT
and C2are
1
The output resistance varies with the oscillator frequency and the capacitors. In Figure 3, the output resistance vs. oscillator frequency curves are drawn for four difference capacitor values. At very low frequency range, capacitance plays the most important role in determining the output re­sistance. Once the frequency is increased to some point (such as 100 kHz for the 47 µF capacitors), the output resistance is dominated by the ON resistance of the internal switches and the ESRs of the external capacitors. A low value, smaller size capacitor usually has a higher ESR com­pared with a bigger size capacitor of the same type. Ceramic capacitors can be chosen for their lower ESR. As shown in Figure 3, in higher frequency range, the output resistance using the 10 µF ceramic capacitors is close to these using higher value tantalum capacitors.

FIGURE 3. Output Source Resistance vs Oscillator Frequency

TABLE 3. Low ESR Capacitor Manufacturers

Manufacturer Phone Capacitor Type
Nichicon Corp. (708)-843-7500 PL, PF series, through-hole aluminum electrolytic
AVX Corp. (803)-448-9411 TPS series, surface-mount tantalum
Sprague (207)-324-4140 593D, 594D, 595D series, surface-mount tantalum
Sanyo (619)-661-6835 OS-CON series, through-hole aluminum electrolytic
Murata (800)-831-9172 Ceramic chip capacitors
Taiyo Yuden (800)-348-2496 Ceramic chip capacitors
Tokin (408)-432-8020 Ceramic chip capacitors
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Other Applications

PARALLELING DEVICES

Any number of LM2662s (or LM2663s) can be paralleled to reduce the output resistance. Each device must have its own pumping capacitor C needed as shown in Figure 4. The composite output resis­tance is:
, while only one output capacitor C
1

FIGURE 4. Lowering Output Resistance by Paralleling Devices

out
LM2662/LM2663
is
10000324

CASCADING DEVICES

Cascading the LM2662s (or LM2663s) is an easy way to produce a greater negative voltage (as shown in Figure 5). If n is the integer representing the number of devices cas­caded, the unloaded output voltage V
is (−nVin). The
out
effective output resistance is equal to the weighted sum of each individual device:

FIGURE 5. Increasing Output Voltage by Cascading Devices

A three-stage cascade circuit shown in Figure 6 generates
, from Vin.
−3V
in
Cascading is also possible when devices are operating in doubling mode. In Figure 7, two devices are cascaded to generate 3V
.
in
An example of using the circuit in Figure 6 or Figure 7 is generating +15V or −15V from a +5V input.
Note that, the number of n is practically limited since the increasing of n significantly reduces the efficiency and in­creases the output resistance and output voltage ripple.
10000325
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Other Applications (Continued)
LM2662/LM2663
10000326
FIGURE 6. Generating −3Vinfrom +V
FIGURE 7. Generating +3Vinfrom +V
REGULATING V
out
It is possible to regulate the output of the LM2662/LM2663 by use of a low dropout regulator (such as LP2986). The whole converter is depicted in Figure 8. This converter can give a regulated output from −1.5V to −5.5V by choosing the proper resistor ratio:
in
10000327
in
where, V
ref
= 1.23V
The error flag on pin 7 of the LP2986 goes low when the regulated output at pin 5 drops by about 5% below nominal. The LP2986 can be shutdown by taking pin 8 low. The less than 1 µA quiescent current in the shutdown mode is favor­able for battery powered applications.
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Other Applications (Continued)

FIGURE 8. Combining LM2662/LM2663 with LP2986 to Make a Negative Adjustable Regulator

Also, as shown in Figure 9 by operating the LM2662/LM2663 in voltage doubling mode and adding a low dropout regulator (such as LP2986) at the output, we can get +5V output from an input as low as +3.3V.
LM2662/LM2663
10000328

FIGURE 9. Generating +5V from +3.3V Input Voltage

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Physical Dimensions inches (millimeters) unless otherwise noted

8-Lead SO (M)
Order Number LM2662M or LM2663M
NS Package Number M08A
LM2662/LM2663 Switched Capacitor Voltage Converter
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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