National Semiconductor LM26480 Technical data

January 15, 2008

LM26480 Externally Programmable Dual High-Current Step-Down DC/DC and Dual Linear Regulators

General Description

The LM26480 is a multi-functional Power Management Unit, optimized for low-power digital applications. This device integrates two highly efficient 1.5A step-down DC/DC converters and two 300 mA linear regulators. The LM26480 is offered in a tiny 4 x 4 x 0.8mm LLP-24 pin package.

Key Specifications

Step-Down DC/DC Converter (Buck)

1.5A output current

■

from:

OUT

Buck1 : 0.8V–2.0V @ 1.5A

—

Buck2 : 1.0V–3.3V @ 1.5A

—

Up to 96% efficiency ±3% FB voltage accuracy 2 MHz PWM switching frequency PWM - PFM automatic mode change under low loads Automatic soft start

Linear Regulators (LDO)

■

of 1.0V–3.5V

OUT

±3% FB voltage accuracy

300 mA output current 25 mV (typ) dropout

Features

Compatible with advanced applications processors and

■

FPGAs 2 LDOs for powering Internal processor functions and I/Os

■

Precision internal reference

■

Thermal overload protection

■

Current overload protection

■

24-lead 4 × 4 × 0.8mm LLP package

■

External Power-On-Reset function for Buck1 and Buck2

■

Undervoltage lock-out detector to monitor input supply

■

voltage

Applications

Core digital power

■

Applications processors

■

Peripheral I/O power

■

LM26480Externally Programmable Dual High-Current Step-Down DC/DC and Dual Linear

Regulators

Typical Application Circuit

30040401

LM26480

FIGURE 1. Application Circuit

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30040402

Connection Diagrams and Package Mark Information

30040403

FIGURE 2. 24-Lead LLP Package (top view)

LM26480

Note:

The physical placement of the package marking will vary from part to part.

(*) UZXYTT format: ‘U’ – wafer fab code; ‘Z’ – assembly code; ’XY’ 2 digit date code; ‘TT” – die run code. See http://www.national.com/quality/ marking_conventions.html for more information on marking information.

Part Number Spec Quantity

LM26480SQ-AA NOPB 1000 tape and reel

LM26480SQX-AA NOPB 4500 tape and reel

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Pin Descriptions

LM26480

LLP Pin No. Name I/O Type Description

1 VINLDO12 I PWR Analog Power for Internal Functions (VREF, BIAS, I2C, Logic)

2 SYNC I G/(D) Frequency Synchronization pin which allows the user to connect an

external clock signal to synchronize the PMIC internal oscillator. Default OFF and must be grounded when not used. Contact National Sales office to enable.

3 NPOR O D nPOR Power on reset pin for both Buck1 and Buck 2. Open drain logic

output 100K pullup resistor. nPOR is pulled to ground when the voltages on these supplies are not good. See nPOR section for more info.

4 GND_SW1 G G Buck1 NMOS Power Ground

5 SW1 O PWR Buck1 switcher output pin

6 VIN1 I PWR Power in from either DC source or Battery to Buck1

7 ENSW1 I D Enable Pin for Buck1 switcher, a logic HIGH enables Buck1. Pin cannot

be left floating.

8 FB1 I A Buck1 input feedback terminal

9 GND_C G G Non-switching core ground pin

10 AVDD I PWR Analog Power for Buck converters

11 FB2 I A Buck2 input feedback terminal

12 ENSW2 I D Enable Pin for Buck2 switcher, a logic HIGH enables Buck2. Pin cannot

be left floating.

13 VIN2 I PWR Power in from either DC source or Battery to Buck2

14 SW2 O PWR Buck2 switcher output pin

15 GND_SW2 G G Buck2 NMOS

16 ENLDO2 I D LDO2 enable pin, a logic HIGH enables LDO2. Pin cannot be left

floating.

17 ENLDO1 I D LDO1 enable pin, a logic HIGH enables LDO1. Pin cannot be left

floating.

18 GND_L G G LDO ground

19 VINLDO1 I PWR Power in from either DC source or battery to LDO1

20 LDO1 O PWR LDO1 Output

21 FBL1 I A LDO1 Feedback Terminal

22 FBL2 I A LDO2 Feedback Terminal

23 LDO2 O PWR LDO Output

24 VINLDO2 I PWR Power in from either DC source or battery to LDO2.

A: Analog Pin D: Digital Pin G: Ground Pin PWR: Power Pin I: Input Pin I/O: Input/Output Pin O: Output Pin

Power Block Operation Note

Power Block Input Enabled Disabled

VINLDO12 VIN+ VIN+ Always Powered

AVDD VIN+ VIN+ Always Powered

VIN1 VIN+ VIN+ or 0V

VIN2 VIN+ VIN+ or 0V VINLDO1 ≤ VIN+ ≤ VIN+ If Enabled, Min VIN is 1.74V VINLDO2 ≤ VIN+ ≤ VIN+ If Enabled, Min VIN is 1.74V

VIN+ is the largest potential voltage on the device.

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LM26480

Absolute Maximum Ratings (Notes 1, 2)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

VINLDO12, VIN1, AVDD, VIN2, VINLDO1, VINLDO2, ENSW1, FB1, FB2, ENSW2, ENLDO1,

Operating Ratings: Bucks (Notes 1, 2, 7)

Junction Temperature (TJ) Range –40°C to +125°C

Ambient Temperature (TA) Range (Note 6)

2.8V to 5.5V

0 to (VIN + 0.3V)

−40°C to +85°C

ENLDO2, SYNC, FBL1, FBL2 −0.3V to +6V GND to GND SLUG ±0.3V Power Dissipation (P

(TA=85°C, T

=125°C ) (Note 5)

MAX

Junction Temperature (T

D_MAX

)

J-MAX

1.17W

)

150°C

Thermal Properties (Notes 3, 5, 6)

Junction-to-Ambient Thermal Resistance (θJA) SQA024AG

34.1°C/W

Storage Temperature Range −65°C to +150°C Maximum Lead Temperature (Soldering) 260°C

ESD Ratings

Human Body Model (Note 4) 2 kV

General Electrical Characteristics (Notes 1, 2, 7, 13, 16)

Unless otherwise noted, VIN = 3.6V. Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in

boldface type apply over the entire junction temperature range for operation, −40°C to +125°C.

Symbol Parameter Conditions Min Typ Max Units

POR

SDH

UVLO Under Voltage Lock Out Rising 2.9 V

VINLDO12 Shutdown Current VIN = 3.6V

Power-On Reset Threshold VDD Falling Edge(Note 16)

Thermal Shutdown Threshold (Note 13)

Themal Shutdown Hysteresis (Note 13)

Failing 2.7 V

0.5 µA

1.9 V

160 °C

20 °C

Low Drop Out Regulators, LDO1 and LDO2

Unless otherwise noted, VIN = 3.6V, CIN = 1.0 µF, C TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40°C to +125°C. (Notes 2, 7, 8, 9)

Symbol Parameter Conditions Min Typ Max Units

ΔV

OUT

Operational Voltage Range VINLDO1 and VINLDO2 PMOS

FB Voltage Accuracy

Line Regulation VIN = (V

Load Regulation VIN = 3.6V,

VIN – V

OUT

Short Circuit Current Limit LDO1-2, V

Dropout Voltage Load Current = 50 mA

PSRR Power Supply Ripple Rejection F = 10 kHz, Load Current = I

θn

Supply Output Noise 10 Hz < F < 100 kHz

Quiescent Current “On” I

Quiescent Current “Off” EN is de-asserted 0.03 1 µA

Turn On Time Start up from shut-down

= 0.47 µF. Typical values and limits appearing in normal type apply for

OUT

pins (Note 15)

1.74 5.5 V

−3 3 %

+ 0.3V) to 5.0V

OUT

(Note 12) Load Current = 1 mA

Load Current = 1 mA to I

= 0V

OUT

MAX

(Note 10)

MAX

0.15 %/V

0.011 %/mA

500 mA

25 200 mV

45 dB

150 µVrms

OUT

= 0 mA

= 200

40 150 µA

60 200 µA

300 µsec

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Symbol Parameter Conditions Min Typ Max Units

OUT

LM26480

Output Capacitor Capacitance for stability

0°C ≤ TJ ≤ 125°C

−40°C ≤ TJ ≤ 125°C

ESR (Equivalent Series Resistance)

0.33 0.47 µF

0.68 1.0 µF

5 500

Buck Converters SW1, SW2

Unless otherwise noted, VIN = 3.6V, CIN = 10 µF, C apply for TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40°C to +125°C. ((Notes 2, 7, 8, 9, 11, 14)

Symbol Parameter Conditions Min Typ Max Units

VFB (Note 14) Feedback Voltage −3 +3 %

OUT

Line Regulation 2.8 < VIN < 5.5

Load Regulation 100 mA < IO < I

Eff Efficiency Load Current = 250 mA 96 %

SHDN

OSC

PEAK

Shutdown Supply Current EN is de-asserted 0.01 1 µA

Internal Oscillator Frequency 2.0 2.4 MHz

Buck1 Peak Switching Current Limit 2.0 2.4

Buck2 Peak Switching Current Limit 2.0 2.4

(P) Pin-Pin Resistance PFET 200 400

DSON

(N) Pin-Pin Resistance NFET 180 400

DSON

Quiescent Current “On” No load PFM Mode 33 µA

Turn On Time Start up from shut-down 500 µsec

Input Capacitor Capacitance for stability 10 µF

Output Capacitor Capacitance for stability 10 µF

= 10 µF, L

OUT

IO =10 mA

= 2.2 µH. Typical values and limits appearing in normal type

OUT

0.089 %/V

MAX

0.0013 %/mA

mΩ

I/O Electrical Characteristics

Unless otherwise noted: Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ = 0°C to +125°C.

Symbol Parameter Conditions

Input Low Level

Input High Level

0.7*VDD V

Limit

Min Max

0.4 V

Units

Power On Reset Threshold/Function (POR)

Symbol Parameter Conditions Min Typ Max Units

nPOR nPOR = Power on reset for Buck1 and

Buck2

nPOR Threshold

Percentage of Target voltage Buck1 or Buck2

Output Level Low Load = IOL = 500 µA 0.23 0.5 V

Default 60 msec

BUCK1

AND V

OR V

BUCK2

rising

falling

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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics.

Note 2: All voltages are with respect to the potential at the GND pin.

Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 160°C (typ.) and disengages at T

= 140°C (typ.)

Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. (MILSTD - 883 3015.7)

Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be

derated. Maximum ambient temperature (T dissipation of the device in the application (P following equation: T

A-MAX

= T

J-MAX-OP

− (θJA × P

) is dependent on the maximum operating junction temperature (T

A-MAX

), and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the

D-MAX

). See Applications section.

D-MAX

= 125°C), the maximum power

J-MAX-OP

Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design.

Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.

Note 8: CIN, C

: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.

OUT

Note 9: The device maintains a stable, regulated output voltage without a load.

Note 10: Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value.

Note 11: Quiescent current is defined here as the difference in current between the input voltage source and the load at V

OUT

Note 12: VIN minimum for line regulation values is 1.8V.

Note 13: This specification is guaranteed by design.

Note 14: VIN ≥ V

OUT

+ R

DSON

(P) (I

OUT

+ 1/2 I

). If these conditions are not met, voltage regulation will degrade as load increases.

RIPPLE

Note 15: Pins 24, 19 can operate from VIN min of 1.74V to a VIN max of 5.5V. This rating is only for the series pass PMOS power FET. It allows the system design to use a lower voltage rating if the input voltage comes from a buck output.

Note 16: VPOR is voltage at which the EPROM resets. This is different from the UVLO on VINLDO12, which is the voltage at which the regulators shut off; and is also different from the nPOR function, which signals if the regulators are in a specified range.

LM26480

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Typical Performance Characteristics — LDO

LM26480

Output Voltage Change vs Temperature (LDO1)

VIN = 3.6V, V

= 2.5V, 100 mA load

OUT

30040466

Load Transient

3.6 VIN, 2.5V

, 0 – 150 mA load

OUT

Output Voltage Change vs Temperature (LDO2)

VIN = 3.6V, V

= 1.8V, 100 mA load

OUT

30040455

Load Transient

3.6 VIN, 2.5V

, 150–300 mA load

OUT

30040437

Line Transient (LDO1)

3.6 - 4.2 VIN, 2.5 V

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, 100 mA load

OUT

30040439

Line Transient (LDO2)

3.6 – 4.2 VIN, 1.8V

, 150 mA load

OUT

30040438

30040440

LM26480

Enable Start-up time (LDO1)

0-3.6 VIN, 2.5 V

, 1 mA load

OUT

30040441

Enable Start-up time (LDO2)

0 – 3.6 VIN, 1.8V

, 1 mA load

OUT

30040442

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