National Semiconductor LM1042 Technical data
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LM1042 Fluid Level Detector
LM1042 Fluid Level Detector
February 1995
General Description
The LM1042 uses the thermal-resistive probe technique to
measure the level of non-flammable fluids. An output is provided proportional to fluid level and single shot or repeating
measurements may be made. All supervisory requirements
to control the thermal-resistive probe, including short and
open circuit probe detection, are incorporated within the device. A second linear input for alternative sensor signals
may also be selected.
Block Diagram
Features
Y
Selectable thermal-resistance or linear probe inputs
Y
Control circuitry for thermal-resistive probe
Y
Single-shot or repeating measurements
Y
Switch on reset and delay to avoid transients
Y
Output amplifier with 10 mA source and sink capability
Y
Short or open probe detection
Y
a
50V transient protection on supply and control input
Y
7.5V to 18V supply range
Y
Internally regulated supply
Y
b
40§Ctoa80§C operation
TL/H/8709– 1
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
TL/H/8709
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage V
CC
32V
Voltage at Pin 8 32V
Positive Peak Voltage (Pins 6, 8, 3) (Note 1)
10 ms 2A 50V
Output Current Pin 4, (I
)(sink) 10 mA
4
Output Current Pin 11 (source) 25 mA
Output Current Pin 16
Operating Temperature Range
Storage Temperature Range
b
g
b
10 mA
40§Ctoa80§C
55§Ctoa150§C
Lead Temperature (Soldering 10 sec.) 260§C
Package Power Dissipation
e
T
25§C (Note 8) 1.8W
A
Device Power Dissipation 0.9W
Electrical Characteristics
e
V
13V, TAwithin operating range except where stated otherwise. C
CC
Symbol Parameter Conditions
V
I
V
CC
S
REG
Supply Voltage 7.5 18 7.5 13 18 V
Supply Current 35 35 mA
Regulated Voltage Pins 15 and 11 connected 5.7 6.15 5.65 5.9 6.2 V
Stability Over VCCRange Referred to value at
e
13V (Note 4)
V
CC
V6–V3Probe Current
Reference Voltage
Probe Current Regulation (Note 4)
CC
Range
Figure 5
Over V
T
1
T2–T
T
4
T
STAB
Ramp Timing See
1
–T1Ramp Timing 1.4 2.1 1.4 1.75 2.1 s
Ramp Timing Stability Over VCCRange
RTRamp Resistor Range 3 15 3 15.0 kX
V
8
V
8
I
8
I
8
V
16
Start Input Logic High Level 1.7 1.7 V
Start Input Logic Low Level 0.5 0.5 V
Start Input Current V
Start Input Current V
Maximum Output Voltage R
Minimum Output Voltage
e
V
8
CC
e
0V 300 300 nA
8
e
600X from V
L
Pin 16 to V
REG
PROBE 1
G
OS
Probe 1 Gain Pin 1 80 mV to 520 mV 9.9 10.4 10.15
1
Non-linearity of G
Pin 1 Offset (Note 7)
1
1
(Notes 6, 7)
Pin180mVto520mV
(Note 7)
PROBE 2
G
OS
R
7
Probe 2 Gain Pin 7 240 mV to 1.562V 3.31 3.49 3.4
2
Non-linearity of G
Pin 7 Offset (Note 7)
7
2
(Note 7)
Pin 7 240 mV to 1.562V
(Note 7)
Input impedance 5MX
T
e
22 mF, R
e
12k
T
Tested Limits Design Limits
(Note 2) (Note 3)
Min Max Min Typ Max
g
0.5
g
0.5 %
2.15 2.35 2.10 2.25 2.40 V
g
0.5
g
0.8 %
20 37 15 31 42 ms
316ms
a
5
g
5%
100 100 nA
b
0.3 V
REG
b
0.3 V
REG
0.5 0.2 0.6 V
b
b
a
1
a
1
b
1
1
202%
g
5mV
b
2 0.2 2 %
g
5mV
Units
2
Electrical Characteristics
e
V
13V, TAwithin operating range except where stated otherwise. C
CC
Tested Limits Design Limits
Symbol Parameter Conditions
Min Max Min Typ Max
V
Probe 1 Input V
1
Voltage Range V
V
Probe 1 Open At Pin 5
5
Circuit Threshold
V
Probe 1 Short
5
Circuit Threshold
I
Pin 14 Input Pin 14e4V
14
Leakage Current
I
Pin 1 Input Pin 1e300 mV
1
Leakage Current
T
Repeat Period C
R
CRDischarge Time C
C
Memory Capacitor Value 0.47 mF
M
C
Input Capacitor Value 0.47 mF
1
Sensitivity fo Electrostatic DischargeÐ
Pins 7, 10, 13, and 14 will withstand greater than 1500V when tested using 100 pF and 1500X in accordance with National Semiconductor standard ESD test
procedures.
All other pins will withstand in excess of 2 kV.
Note 1: Test circuit for over voltage capability at pins 3, 6, 8.
e
9V to 18V 1 5 1 5 V
CC
e
CC
(V
REG
7.5V, I
e
6.0V)
k
2.5 mA 1 3.5 V
4
b
V
REG
0.5 0.7 0.35 0.6 0.85 V
b
2.0 2.0 2.0 nA
b
5.0 5.0 1.5 5.0 nA
e
22 mF (Note 5) 12 28 9.1 17 36 s
R
e
22 mF 70 135 ms
R
T
e
22 mF, R
e
12k (Continued)
T
(Note 2) (Note 3)
0.7 V
REG
b
0.5 V
REG
b
0.85 V
REG
b
0.6 V
REG
b
0.35 V
Units
Note 2: Guaranteed and 100% production tested at 25§C. These limits are used to calculate outgoing quality levels.
Note 3: Limits guardbanded to include parametric variations. T
figures.
Note 4: Variations over temperature range are not production tested.
Note 5: Time for first repeat period, see
Note 6: Probe 1 amplifier tests are measured with pin 12 ramp voltage held between the T
4.1V to simulate ramp action. See Figure 5.
Note 7: When measuring gain separate ground wire sensing is required at pin 2 to ensure sufficiently accurate results.
Linearity is defined as the difference between the predicted value of V
Note 8: Above T
e
25§C derate with i
A
Figure 6
e
jA
.
70§C/W.
eb
A
TL/H/8709– 15
40§Ctoa80§C and from V
and T4conditions (pin 12&1.1V) having previously been held above
3
*) and the measured value.
B(VB
For probe 1 and probe 2ÐGain (G)
Input offset
Linearity
V
*eV
B
e
7.5V to 18V. These limits are not used to calculate AOQL
CC
V
C
e
b
V
c
G
Ð
(
VB*
e
b
c
1
V
Ð
a
G(V
A
100%
(
B
b
Va)
b
3
TL/H/8709– 2
b
V
V
C
e
b
V
V
c
A
a
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