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DS90LV031A
3V LVDS Quad CMOS Differential Line Driver
DS90LV031A 3V LVDS Quad CMOS Differential Line Driver
July 1999
General Description
The DS90LV031Ais a quad CMOS differential line driver designed for applications requiring ultra low power dissipation
and high data rates. The device is designed to support data
rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage
Differential Signaling (LVDS) technology.
The DS90LV031Aaccepts low voltage TTL/CMOS input levels and translates them to low voltage (350 mV) differential
output signals. In addition the driver supports aTRI-STATE
function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an
ultra low idle power state of 13 mW typical.
The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to
all four drivers. The DS90LV031A and companion line receiver (DS90LV032A) provide a new alternative to high
power psuedo-ECL devices for high speed point-to-point interface applications.
Features
>
n
400 Mbps (200 MHz) switching rates
n 0.1 ns typical differential skew
n 0.4 ns maximum differential skew
n 2.0 ns maximum propagation delay
n 3.3V power supply design
±
n
350 mV differential signaling
n Low power dissipation (13mW at 3.3V static)
®
n Interoperable with existing 5V LVDS devices
n Compatible with IEEE 1596.3 SCI LVDS standard
n Compatible with TIA/EIA-644 LVDS standard
n Industrial and Military operating temperature range
n Available in SOIC, TSSOP and Cerpack surface mount
packaging
n Standard Microcircuit Drawing (SMD) 5962-9865201
Connection Diagram Functional Diagram
Dual-In-Line
DS100095-1
Order Number DS90LV031ATM
or DS90LV031ATMTC
See NS Package Number M16A or MTC16 or W16A
or DS90LV031AW
DS100095-2
Truth Table
DRIVER
Enables Input Outputs
EN EN
LHXZZ
All other combinations of
ENABLE inputs
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS100095 www.national.com
*
D
D
IN
OUT+DOUT−
LLH
HHL
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
Input Voltage (D
Enable Input Voltage (EN, EN
Output Voltage (D
Short Circuit Duration
(D
OUT+,DOUT−
Maximum Package Power Dissipation
M Package 1088 mW
MTC Package 866 mW
W Package 845 mW
Derate M Package 8.5 mW/˚C above +25˚C
) −0.3V to +4V
CC
) −0.3V to (VCC+ 0.3V)
IN
OUT+,DOUT−
*
) −0.3V to (VCC+ 0.3V)
) −0.3V to +3.9V
) Continuous
@
+25˚C
Storage Temperature Range −65˚C to +150˚C
Lead Temperature Range
Soldering (4 sec.) +260˚C
Maximum Junction Temperature +150˚C
ESD Rating (Note 10)
(HBM, 1.5 kΩ, 100 pF) ≥ 6kV
Recommended Operating
Conditions
Min Typ Max Units
Supply Voltage (V
Operating Free Air
Temperature (T
Industrial −40 +25 +85 ˚C
Military -55 +25 +125 ˚C
) +3.0 +3.3 +3.6 V
CC
)
A
Derate MTC Package 6.9 mW/˚C above +25˚C
Derate W Package 6.8 mW/˚C above +25˚C
Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 2, 3, 4)
Symbol Parameter Conditions Pin Min Typ Max Units
V
∆V
V
∆V
V
V
V
V
I
I
V
I
I
I
I
I
I
I
IH
IL
OS
OSD
OFF
OZ
CC
CCL
CCZ
OD1
OS
OH
OL
IH
IL
CL
Differential Output Voltage R
Change in Magnitude of V
OD1
for Complementary Output
OD1
States
Offset Voltage 1.125 1.25 1.375 V
Change in Magnitude of VOSfor
OS
Complementary Output States
Output Voltage High 1.38 1.6 V
Output Voltage Low 0.90 1.03 V
Input Voltage High DIN,
Input Voltage Low GND 0.8 V
Input Current V
Input Current V
Input Clamp Voltage I
Output Short Circuit Current ENABLED, (Note 11)
Differential Output Short Circuit
Current
Power-off Leakage V
Output TRI-STATE Current EN = 0.8V and EN* = 2.0V
No Load Supply Current Drivers
Enabled
Loaded Supply Current Drivers
Enabled
No Load Supply Current Drivers
Disabled
=
Figure 1
L
100Ω (
)D
D
250 350 450 mV
OUT−
OUT+
4 35 |mV|
5 25 |mV|
2.0 V
EN,
D
D
EN*
OUT−
OUT+
±
1 +10 µA
±
1 +10 µA
−6.0 −9.0 mA
−6.0 −9.0 mA
=
or 2.5V −10
V
IN
CC
=
GND or 0.4V −10
IN
=
−18 mA −1.5 −0.8 V
CL
OUT−
=0Vor
=0V
D
IN=VCC,DOUT+
= GND, D
D
IN
ENABLED, VOD=0V
(Note 11)
=
0V or 3.6V,
OUT
=
0V or Open
V
CC
=
0V or V
V
OUT
CC
DIN=VCCor GND V
RL= 100Ω All Channels, DIN=
or GND (all inputs)
V
CC
DIN=VCCor GND,
EN = GND, EN* = V
CC
−20
−10
CC
±
1 +20 µA
±
1 +10 µA
5.0 8.0 mA
23 30 mA
2.6 6.0 mA
CC
V
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Switching Characteristics - Industrial
=
+3.3V
±
V
CC
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
t
PLHD
t
SKD1
t
SKD2
t
SKD3
t
SKD4
t
TLH
t
THL
t
PHZ
t
PLZ
t
PZH
t
PZL
f
MAX
Differential Propagation Delay High to Low RL= 100Ω,CL=10pF
Differential Propagation Delay Low to High 0.8 1.25 2.0 ns
Differential Pulse Skew |t
(Note 5)
Channel-to-Channel Skew (Note 6) 0 0.1 0.5 ns
Differential Part to Part Skew (Note 7) 0 1.0 ns
Differential Part to Part Skew (Note 8) 0 1.2 ns
Rise Time 0.38 1.5 ns
Fall Time 0.40 1.5 ns
Disable Time High to Z RL= 100Ω,CL=10pF
Disable Time Low to Z 5ns
Enable Time Z to High 7ns
Enable Time Z to Low 7ns
Maximum Operating Frequency (Note 14) 200 250 MHz
10%,T
=
−40˚C to +85˚C (Notes 3, 9, 12)
A
PHLD−tPLHD
Figure 2
and
Figure 3
(
|
)
0 0.07 0.4 ns
5ns
Figure 4
and
Figure 5
0.8 1.18 2.0 ns
(
)
Switching Characteristics - Military
=
+3.3V
±
V
CC
Symbol Parameter Conditions Min Max Units
t
PHLD
t
PLHD
t
SKD1
t
SKD2
t
SKD3
t
SKD4
t
TLH
t
THL
t
PHZ
t
PLZ
t
PZH
t
PZL
f
MAX
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: V
∆V
OD1
Note 3: All typicals are given for: V
Note 4: The DS90LV031Ais a current mode device and only functions within datasheet specifications when a resistive load is applied to the driver outputs typical
range is (90Ω to 110Ω)
Note 5: t
same channel.
Note 6: t
Note 7: t
fication applies to devices at the same V
Note 8: t
operating temperature and voltage ranges, and across process distribution. t
Note 9: Generator waveform for all tests unless otherwise specified: f=1 MHz, Z
Note 10: ESD Ratings:
Note 11: Output short circuit current (I
Note 12: C
Note 13: All input voltages are for one channel unless otherwise specified. Other inputs are set to GND.
Note 14: f
switching.
Differential Propagation Delay High to Low RL= 100Ω,CL=10pF
Differential Propagation Delay Low to High 0.8 2.0 ns
Differential Pulse Skew |t
(Note 5)
Channel-to-Channel Skew (Note 6) 0 0.5 ns
Differential Part to Part Skew (Note 7) 0 1.0 ns
Differential Part to Part Skew (Note 8) 0 1.2 ns
Rise Time 1.5 ns
Fall Time 1.5 ns
Disable Time High to Z RL= 100Ω,CL=10pF
Disable Time Low to Z 5ns
Enable Time Z to High 7ns
Enable Time Z to Low 7ns
Maximum Operating Frequency (Note 14) 200 MHz
.
,|t
SKD1
PHLD−tPLHD
is the Differential Channel-to-Channel Skew of any event on the same device.
SKD2
, Differential Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This speci-
SKD3
, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over recommended
SKD4
HBM (1.5 kΩ, 100 pF) ≥ 6kV
includes probe and jig capacitance.
L
generator input conditions: t
MAX
=
10%,T
−55˚C to +125˚C (Notes 9, 12)
A
0.8 2.0 ns
Figure 2
and
Figure 3
Figure 5
)
0 0.4 ns
)
(
+25˚C.
|
Figure 4
=
50Ω,t
O
and
≤1 ns, and tf≤ 1 ns.
r
(
is defined as |Max − Min| differential propagation delay.
SKD4
PHLD−tPLHD
=
CC
| is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the
OS
=
+3.3V, T
A
and within 5˚C of each other within the operating temperature range.
CC
) is specified as magnitude only, minus sign indicates direction only.
=
<
1ns, (0%to 100%), 50%duty cycle, 0V to 3V.Output Criteria: duty cycle=45%/55%, VOD>250mV,all channels
t
r
f
5ns
and
OD1
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Parameter Measurement Information
FIGURE 1. Driver VODand VOSTest Circuit
FIGURE 2. Driver Propagation Delay and Transition Time Test Circuit
DS100095-3
DS100095-4
FIGURE 3. Driver Propagation Delay and Transition Time Waveforms
FIGURE 4. Driver TRI-STATE Delay Test Circuit
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DS100095-5
DS100095-6