National Semiconductor DS25CP102 Technical data

January 17, 2008

DS25CP102

3.125 Gbps 2X2 LVDS Crosspoint Switch with Transmit Pre-Emphasis and Receive Equalization

DS25CP102 3.125 Gbps 2X2 LVDS Crosspoint Switch with Pre-Emphasis and Equalization

General Description

The DS25CP102 is a 3.125 Gbps 2x2 LVDS crosspoint switch optimized for high-speed signal routing and switching over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity. The non-blocking architecture allows connections of any input to any output or outputs.

The DS25CP102 features two levels (Off and On) of transmit pre-emphasis (PE) and two levels (Off and On) of receive equalization (EQ).

Wide input common mode range allows the switch to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. Each differential input and output is internally terminated with a 100Ω resistor to lower device insertion and return losses, reduce component count and further minimize board space.

Typical Application

Features

DC - 3.125 Gbps low jitter, low skew, low power operation

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Pin configurable, fully differential, non-blocking

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architecture Pin selectable transmit pre-emphasis and receive

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equalization eliminate data dependant jitter Wide Input Common Mode Voltage Range allows DC-

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coupled interface to CML and LVPECL drivers On-chip 100Ω input and output termination minimizes

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insertion and return losses, reduces component count and minimizes board space

8 kV ESD on LVDS I/O pins protects adjoining

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components Small 4 mm x 4 mm LLP-16 space saving package

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Applications

High-speed channel select applications

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Clock and data buffering and muxing

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OC-48 / STM-16

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SD/HD/3GHD SDI Routers

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30008003

Ordering Code

NSID Function Available Equalization

DS25CP102

DS25CP102TSQ Crosspoint Switch Off / On Off / On

Block Diagram

30008001

Connection Diagram

Levels

Available Pre-Emphasis

Levels

30008002

Pin Descriptions

Pin Name Pin Number I/O, Type Pin Description

IN0+, IN0- , IN1+, IN1-

OUT0+, OUT0-, OUT1+, OUT1-

SEL0, SEL1 7, 8 I, LVCMOS Switch configuration pins. There is a 20k pulldown resistor on this pin.

EN0, EN1 14, 13 I, LVCMOS Output enable pins. There is a 20k pulldown resistor on this pin.

PE 15 I, LVCMOS Transmit Pre-Emphasis select pin. There is a 20k pulldown resistor on this pin.

EQ 6 I, LVCMOS Receive Equalizaton select pin. There is a 20k pulldown resistor on this pin.

VDD 16 Power Power supply pin.

GND 5, DAP Power Ground pin and Device Attach Pad (DAP) ground.

1, 2, 3, 4

12, 11, 10, 9

I, LVDS Inverting and non-inverting high speed LVDS input pins.

O, LVDS Inverting and non-inverting high speed LVDS output pins.

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Absolute Maximum Ratings (Note 4)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Supply Voltage −0.3V to +4V LVCMOS Input Voltage −0.3V to (VCC + 0.3V)

LVDS Input Voltage −0.3V to +4V LVDS Differential Input Voltage 0V to 1.0V LVDS Output Voltage −0.3V to (VCC + 0.3V)

LVDS Differential Output Voltage 0V to 1.0V LVDS Output Short Circuit Current

Duration Junction Temperature +150°C Storage Temperature Range −65°C to +150°C Lead Temperature Range Soldering (4 sec.) +260°C Maximum Package Power Dissipation at 25°C SQA Package 2.99W Derate SQA Package 23.9 mW/°C above +25°C

5 ms

Package Thermal Resistance

+41.8°C/W

+6.9°C/W

ESD Susceptibility HBM (Note 1)

MM (Note 2)

CDM (Note 3)

Note 1: Human Body Model, applicable std. JESD22-A114C

Note 2: Machine Model, applicable std. JESD22-A115-A

Note 3: Field Induced Charge Device Model, applicable std.

JESD22-C101-C

≥8 kV

≥250V

≥1250V

Recommended Operating Conditions

Min Typ Max Units

Supply Voltage (VCC) 3.0 3.3 3.6 V

Receiver Differential Input Voltage (VID)

Operating Free Air Temperature (TA)

0 1 V

−40 +25 +85 °C

DC Electrical Characteristics (Notes 5, 6, 7)

Over recommended operating supply and temperature ranges unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Units

LVCMOS DC SPECIFICATIONS

LVDS INPUT DC SPECIFICATIONS

CMR

High Level Input Voltage 2.0 V

Low Level Input Voltage GND 0.8 V

High Level Input Current VIN = 3.6V

40 175 250

VCC = 3.6V

Low Level Input Current VIN = GND

0 ±10

VCC = 3.6V

Input Clamp Voltage ICL = −18 mA, VCC = 0V −0.9 −1.5 V

Input Differential Voltage 0 1 V

Differential Input High Threshold

Differential Input Low Threshold

VCM = +0.05V or VCC-0.05V

0 +100 mV

−100 0 mV

Common Mode Voltage Range VID = 100 mV 0.05 VCC -

0.05

μA

Symbol Parameter Conditions Min Typ Max Units

LVDS OUTPUT DC SPECIFICATIONS

DS25CP102

ΔV

OUT

Differential Output Voltage

Change in Magnitude of VOD for Complimentary

Output States

Offset Voltage

Change in Magnitude of VOS for Complimentary

Output States

RL = 100Ω

250 350 450 mV

-35 35 mV

1.05 1.2 1.375 V

-35 35 mV

Output Short Circuit Current (Note 8) OUT to GND -35 -55 mA

OUT to V

Output Capacitance Any LVDS Output Pin to GND

Output Termination Resistor Between OUT+ and OUT-

7 55 mA

1.2 pF

100

SUPPLY CURRENT

CCZ

Supply Current PE = OFF, EQ = OFF 77 90 mA

Supply Current with Outputs Disabled EN0 = EN1 = 0 23 29 mA

Note 4: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions.

Note 5: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.

Note 6: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD and ΔVOD.

Note 7: Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed.

Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.

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AC Electrical Characteristics (Note 11)

Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 9, 10)

Symbol Parameter Conditions Min Typ Max Units

LVDS OUTPUT AC SPECIFICATIONS

PLHD

PHLD

SKD1

SKD2

SKD3

LHT

HLT

OFF

SEL

JITTER PERFORMANCE WITH EQ = Off, PE = Off (Figure 5)

RJ1

RJ2

DJ1

DJ2

TJ1

TJ2

JITTER PERFORMANCE WITH EQ = Off, PE = On (Figures 6, 9)

RJ1B

RJ2B

DJ1B

DJ2B

TJ1B

TJ2B

JITTER PERFORMANCE WITH EQ = On, PE = Off (Figures 7, 9)

RJ1D

RJ2D

DJ1D

DJ2D

TJ1D

TJ2D

Differential Propagation Delay Low to High

Differential Propagation Delay High to

RL = 100Ω

365 500 ps

345 500 ps

Low

Pulse Skew |t

PLHD

− t

| (Note 12) 20 55 ps

PHLD

Channel to Channel Skew (Note 13) 12 25 ps

Part to Part Skew , (Note 14) 50 150 ps

Rise Time

Fall Time 65 120 ps

Output Enable Time

Output Disable Time

Select Time

Random Jitter (RMS Value) No Test Channels (Note 15)

Deterministic Jitter (Peak to Peak) No Test Channels (Note 16)

Total Jitter (Peak to Peak) No Test Channels (Note 17)

Random Jitter (RMS Value) Test Channel B (Note 15)

Deterministic Jitter (Peak to Peak) Test Channel B (Note 16)

Total Jitter (Peak to Peak) Test Channel B (Note 17)

Random Jitter (RMS Value) Test Channel D (Note 15)

Deterministic Jitter (Peak to Peak) Test Channel D (Note 16)

Total Jitter (Peak to Peak) Test Channel D (Note 17)

RL = 100Ω

ENn = LH to output active

ENn = HL to output inactive

SELn LH or HL to output

VID = 350 mV VCM = 1.2V Clock (RZ)

VID = 350 mV VCM = 1.2V K28.5 (NRZ)

VID = 350 mV VCM = 1.2V PRBS-23 (NRZ)

VID = 350 mV VCM = 1.2V Clock (RZ)

VID = 350 mV VCM = 1.2V K28.5 (NRZ)

VID = 350 mV VCM = 1.2V PRBS-23 (NRZ)

VID = 350 mV VCM = 1.2V Clock (RZ)

VID = 350 mV VCM = 1.2V K28.5 (NRZ)

VID = 350 mV VCM = 1.2V PRBS-23 (NRZ)

2.5 Gbps 0.5 1 ps

3.125 Gbps 0.5 1 ps

2.5 Gbps 6 22 ps

3.125 Gbps 6 22 ps

2.5 Gbps 0.03 0.08

3.125 Gbps 0.05 0.11

2.5 Gbps 0.5 1 ps

3.125 Gbps 0.5 1 ps

2.5 Gbps 3 12 ps

3.125 Gbps 3 12 ps

2.5 Gbps 0.03 0.06

3.125 Gbps 0.04 0.09

2.5 Gbps 0.5 1 ps

3.125 Gbps 0.5 1 ps

2.5 Gbps 16 24 ps

3.125 Gbps 12 24 ps

2.5 Gbps 0.07 0.11

3.125 Gbps 0.07 0.11

65 120 ps

7 20

5 12 ns

3.5 12 ns

DS25CP102

μs

P-P

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