National Semiconductor CLC5665 Technical data

Features

■

0.1dB gain flatness to 20MHz (Av= +2)

■

90MHz bandwidth (Av = +1)

■

Large signal BW 25MHz

■

1800V/µs slew rate

■

0.05%/0.05° differential gain/phase

■

±5V, ±15V or single supplies

■

200ns disable to high-impedance output

■

Wide gain range

■

-89/-92dBc HD2/HD3 (RL= 500Ω)

■

Low cost

Applications

■

xDSL driver

■

Twisted pair driver

■

Cable driver

■

Video distribution

■

CCD clock driver

■

Multimedia systems

■

DAC output buffers

■

Imaging systems

Typical Application

Differential Line Driver for xDSL

Pinout

DIP & SOIC

General Description

The CLC5665 is a low-cost, wideband amplifier that provides very low 2nd and 3rd harmonic distortion at 1MHz (-89/-92dBc). The great slew rate of 1800V/µs, bandwidth of 90MHz (Av= +1) and fast disable make it an excellent choice for many high speed multiplexing applications. Like all current feedback op amps, the CLC5665 allows the frequency response to be optimized (or adjusted) by the selection of the feedback resistor. For demanding video applications, the 0.1dB bandwidth to 20MHz and differential gain/phase of 0.05%/0.05° make the CLC5665 the preferred component for broadcast quality NTSC and PAL video systems.

The large voltage swing (28Vpp), continuous output current (85mA) and slew rate (1800V/µs) provide high-fidelity signal conditioning for applications such as CCDs, transmission lines and low impedance circuits.

xDSL, video distribution, multimedia and general purpose applications will benefit from the CLC5665’s wide bandwidth and disable feature.Power is reduced and the output becomes a high impedance when disabled. The wide gain range of the CLC5665 makes this general purpose op amp an improved solution for circuits such as active filters, single-to-differential-ended dr ivers, DAC transimpedance amplifiers and MOSFET drivers.

CLC5665 Low Distortion Amplifier with Disable

June 1999

CLC5665

Low Distortion Amplifier with Disable

Printed in the U.S.A.

查询CLC5665供应商

Non-Inverting Frequency Response

Av = 1

= 698

Av = 2

= 604

Av = 1

Av = 10

Gain

Phase

Av = 50

Magnitude (1dB/div)

Av = 50

= 500

Av = 10

= 100

Av = 2

Phase (deg)

-45

-90

-135

-180

DIS

in (Vpp

CLC5665

604Ω

) Vo = 2V

1.2kΩ R

604Ω

CLC5665

DIS

1:n

Note: Supply and Bypassing not shown.

non-inv

-V

Frequency (MHz)

inv

3 4

100

DIS

out

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PARAMETERS CONDITIONS V

TYP MIN/MAX RATINGS UNITS NOTES

Ambient Temperature CLC5665 +25°C +25°C 0 to 70°C -40 to 85°C FREQUENCY DOMAIN RESPONSE

small-signal bandwidth (A

= +1) V

out

< 1.0V

±15 90 MHz

small-signal bandwidth V

out

< 1.0V

±15 70 MHz

out

< 1.0V

±5 50 MHz

0.1dB bandwidth V

out

< 1.0V

±15 20 MHz

out

< 1.0V

±5 15 MHz

large-signal bandwidth V

out

= 10V

25 MHz

gain flatness V

out

< 1.0V

peaking DC to 10MHz 0.03 dB

rolloff DC to 20MHz 0.1 dB linear phase deviation DC to 20MHz 0.7 deg differential gain 4.43MHz, R

= 150Ω ±15 0.05 %

4.43MHz, R

= 150Ω ±5 0.05 %

differential phase 4.43MHz, R

= 150Ω ±15 0.05 deg

4.43MHz, R

= 150Ω ±5 0.1 deg

TIME DOMAIN RESPONSE

rise and fall time 2V step 5 ns

10V step 10 ns settling time to 0.05% 2V step 35 ns overshoot 2V step 5 % slew rate 20V step 1800 V/µs

DISTORTION AND NOISE RESPONSE

2nd harmonic distortion 1Vpp,1MHz, RL = 500Ω -89 dBc 3rd harmonic distortion 1V

,1MHz, RL = 500Ω -92 dBc input voltage noise >1MHz 3.0 nV/√Hz non-inverting input current noise >1MHz 3.2 pA/√Hz inverting input current noise >1MHz 15 pA/√Hz

DC PERFORMANCE

input offset voltage ±15 1.0 7.5 9.0 10.0 mV A

average drift 25 – µV/°C

input bias current non-inverting ±15, ±5 3 20 20 20 µAA

average drift 10 – nA/°C

input bias current inverting ±15, ±5 3 20 20 20 µAA

average drift 10 – nA/°C power-supply rejection ratio DC 60 55 50 50 dB common-mode rejection ratio DC 60 55 50 50 dB supply current R

= ∞ ±15, ±5 11, 8.5 12 14 15 mA A

disabled R

= ∞ ±15, ±5 1.5 2.5 2.5 2.5 mA A

SWITCHING PERFORMANCE

turn on time 400 500 550 550 ns turn off time (Note 2) 200 800 800 800 ns off isolation 10MHz 59 56 56 56 dB high input voltage V

±15 11.8 12.5 12.7 V

±5 1.8 2.5 2.7 V

low input voltage V

±15 10.8 10.5 10.0 V

±5 0.8 0.6 0.1 V

MISCELLANEOUS PERFORMANCE

non-inverting input resistance 8.0 3.0 2.5 1.7 MΩ non-inverting input capacitance 0.5 1.0 1.0 1.0 pF input voltage range common mode ±15 ±12.5 ±12.3 ±12.1 ±11.8 V

common mode ±5 ±2.5 ±2.3 ±2.2 ±1.9 V

output voltage range R

= ∞ ±15 ±14 ±13.7 ±13.7 ±13.6 V

= ∞ ±5 ±4.0 ±3.9 ±3.8 ±3.7 V

output current ±85 ±60 ±50 ±45 mA

Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters.

CLC5665 Electrical Characteristics

(VCC= ±15V, Av= +2V/V; Rf= 604Ω,RL= 100Ω; unless specified)

Absolute Maximum Ratings

supply voltage

16V short circuit current (see note 1) common-mode input voltage

maximum junction temperature +150°C storage temperature range -65°C to +150°C lead temperature (soldering 10 sec) +300°C

Notes

A) J-level: spec is 100% tested at +25°C.

1) Output is shor t circuit protected to ground, however maximum reliability is obtained if output current does not exceed 125mA.

2) To >50dB attenuation @ 10MHz.

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CLC5665 T ypical Performance

(VCC= ±15V, Av= +2V/V; Rf= 604Ω,RL= 100Ω; unless specified)

Non-Inverting Frequency Response

Gain

Av = 10

= 100

Av = 2

= 604

Phase

Av = 50

Magnitude (1dB/div)

Av = 50

= 500

Av = 2

Frequency (MHz)

Open-Loop Transimpedance Gain (Zs)

130 120

Gain

110 100

Phase

80 70

Gain (20 log)

60 50 40 30

0.0001 0.001 0.01 1 10

0.1

Frequency (MHz)

Signal Pulse Response

Large Signal

Small Signal

Large Signal Output (2V/div)

Time (20ns/div)

Short Term Settling Time

0.2

0.15

2V output step

0.1

0.05

Short Term

-0.05

Settling Error (%)

-0.1

-0.15

-0.2

-1dBm Compression to Load

Time (10ns/div)

24 22 20 18 16 14 12

Compression Point (dBm)

698Ω

Load

50Ω

0 5 10 15 20 25 30 35 40 45 50

Frequency (MHz)

Av = 1

Av = 10

Av = 1

= 698

Phase (deg)

-45

-90

-135

-180

100

0 20

Phase (deg)

40 60 80 100 120 140 160

100

Small Signal Output (0.5V/div)

60 50 40 30 20

PSRR/CMRR (dB)

7.0

6.0

5.0

4.0

3.0

2.0

(mV)

1.0

-1.0

-2.0

-3.0

-10

-20

-30

-40

-50

-60

-70

-80

Distortion Level (dBc)

-90

-100

Inverting Frequency Response

Av = -1

= 500

Gain

Phase

Av = -50

Magnitude (1dB/div)

Av = -50

= 2.5k

Av = -10

= 500

Av = -2

= 500

Av = -10

Av = -2

Av = -1

Frequency (MHz)

Flatness Gain and Linear Phase

Gain

Phase

Magnitude (0.1dB/div)

0481216

Frequency (MHz)

PSRR, CMRR and Closed Loop R

CMRR

PSRR

20 log R

0.01 0.10 1 10

Frequency (MHz)

IBI, IBN. VOS vs. Temperature

-60 -20 20 60 100

Temperature (°C)

Harmonic Distortion vs. Frequency

RL = 100Ω V

= 2V

out

2nd

VCC = ±5V

2nd

VCC = ±15V

3rd

VCC = ±5V

3rd

VCC = ±15V

1 10 100

Frequency (MHz)

100

140

Phase (deg)

-45

-90

-135

-180

Phase (0.2°/div)

Noise Voltage (nV/√Hz)

30 20

0.08

20 log R

0.06

-10

0.04

Gain (%)

-20

0.02

-30

-40

5.0

4.5

4.0

3.5

, I

3.0

2.5

(µA)

2.0

1.5

Intercept (+dBm)

1.0

0.5 0

Distortion Level (dBc)

-100

Frequency Response vs. Load

Gain

RL = 50

Phase

Magnitude (1dB/div)

RL = 100

RL = 1k

RL = 50

RL = 100

Frequency (MHz)

Equivalent Input Noise

100

Inverting Current 14.8pA/√Hz

Non-Inverting Current 3.2pA/√Hz

Voltage 3.0nV/√Hz

0.1k 1k 10k 100k 1M

10M

Frequency (MHz)

Differential Gain and Phase (3.58MHz)

Gain Negative Sync

Phase Positive Sync

Phase Negative Sync

Gain Positive Sync

123

Number of 150Ω Loads

2-Tone, 3rd Order Intermodulation Intercept

50Ω

out

750Ω

50Ω

Frequency (MHz)

Harmonic Distortion vs. Frequency

RL = 500Ω

-10

= 2V

out

-20

-30

-40

-50

2nd

VCC = ±15V

2nd

VCC = ±5V

-60

-70

-80

-90

VCC = ±15V

3rd

VCC = ±5V

1 10 100

Frequency (MHz)

RL = 1k

Phase (deg)

-45

-90

-135

-180

100

Noise Current (pA/√Hz)

100M

0.30

0.24

Phase (deg)

0.18

0.12

0.06

0.03

3rd

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