ADC08231/ADC08234/ADC08238 8-Bit 2 ms Serial I/O
A/D Converters with MUX, Reference, and Track/Hold
General Description
The ADC08231/ADC08234/ADC08238 are 8-bit successive approximation A/D converters with serial I/O and configurable input multiplexers with up to 8 channels. The serial
I/O is configured to comply with the NSC MICROWIRE
serial data exchange standard for easy interface to the
TM
COPS
family of controllers, and can easily interface with
standard shift registers or microprocessors.
Designed for high-speed/low-power applications, the devices are capable of a fast 2 ms conversion when used with a
4 MHz clock.
All three devices provide a 2.5V band-gap derived reference
with guaranteed performance over temperature.
A track/hold function allows the analog voltage at the positive input to vary during the actual A/D conversion.
The analog inputs can be configured to operate in various
combinations of single-ended, differential, or pseudo-differential modes. In addition, input voltage spans as small as 1V
can be accommodated.
Applications
Y
High-speed data acquisition
Y
Digitizing automotive sensors
Y
Process control/monitoring
Y
Remote sensing in noisy environments
Y
Disk drives
Y
Portable instrumentation
Y
Test systems
Features
Y
Serial digital data link requires few I/O pins
Y
Analog input track/hold function
Y
4- or 8-channel input multiplexer options with address
TM
logic
Y
On-chip 2.5V band-gap reference (g2% over temperature guaranteed)
Y
No zero or full scale adjustment required
Y
TTL/CMOS input/output compatible
Y
0V to 5V analog input range with single 5V power
supply
Y
Pin compatible with Industry-Standards ADC0831/4/8
Key Specifications
Y
Resolution8 Bits
Y
Conversion time (f
Y
Power dissipation20 mW (Max)
Y
Single supply5 VDC(g5%)
Y
Total unadjusted error
Y
Linearity Error (V
Y
No missing codes (over temperature)
Y
On-board Reference
e
4 MHz)2 ms (Max)
C
g
(/2 LSB andg1 LSB
a
REF
e
2.5V)
December 1994
g
(/2 LSB
2.5Vg1.5% (Max)
ADC08231/ADC08234/ADC08238 8-Bit 2 ms Serial I/O A/D Converters
with MUX, Reference, and Track/Hold
ADC08238 Simplified Block Diagram
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
TM
COPS
microcontrollers and MICROWIRETMare trademarks of National Semiconductor Corporation.
C
1995 National Semiconductor CorporationRRD-B30M75/Printed in U. S. A.
TL/H/11015
TL/H/11015– 4
Ordering Information
Connection Diagrams
ADC08238
SO and DIP
b
(
40§CsT
Industrial
s
A
a
85§C)
Package
ADC08231BIN, ADC08231CINN08E, DIP
ADC08234BIN, ADC08234CINN14A, DIP
ADC08234CIMFMTB24, TSSOP
ADC08238BIN, ADC08238CINN20A, DIP
ADC08231BIWM, ADC08231CIWMM14B, SO
ADC08234BIWM, ADC08234CIWMM14B, SO
ADC08238BIWM, ADC08238CIWMM20B, SO
ADC08234
SO and DIP
TL/H/11015– 2
ADC08231
DIP
ADC08231
SO
TL/H/11015– 1
TL/H/11015– 3
TL/H/11015– 26
ADC08234
TSSOP
TL/H/11015– 27
2
Absolute Maximum Ratings (Notes1&3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V
Voltage at Inputs and Outputs
Input Current at Any Pin (Note 4)
Package Input Current (Note 4)
Power Dissipation at T
ESD Susceptibility (Note 6)1500V
Soldering Information
N Package (10 sec.)260
TSSOP and SO Package (Note 7):
Vapor Phase (60 sec.)215
Infrared (15 sec.)220
Storage Temperature
)6.5V
CC
e
25§C (Note 5)800 mW
A
b
0.3V to V
b
65§Ctoa150§C
CC
g
a
0.3V
g
5mA
20 mA
§
§
§
Operating Ratings (Notes2&3)
Temperature RangeT
ADC08231BIN, ADC08231CIN,
ADC08234BIN, ADC08234CIN,
ADC08238BIN, ADC08238CIN,
ADC08231BIWM, ADC08231CIWM,
ADC08234BIWM, ADC08238BIWM,
ADC08234CIWM, ADC08238CIWM,
ADC08234CIMF
Supply Voltage (V
C
C
C
)4.5 VDCto 6.3 V
CC
b
40§CsT
MIN
s
s
T
T
A
MAX
s
a
85§C
A
DC
Electrical Characteristics
The following specifications apply for V
specified. Boldface limits apply for T
CC
ea
5VDC,V
e
e
T
A
T
J
MIN
REF
to T
ea
MAX
2.5 VDCand f
; all other limits T
CLK
e
e
A
4 MHz, R
T
J
ADC08231,
ADC08234 and
ADC08238 with BIN,
SymbolParameterConditionsCIN, BIWM,
CIWM, or CIMF Suffixes
TypicalLimits
(Note 8)(Note 9)
CONVERTER AND MULTIPLEXER CHARACTERISTICS
Linearity ErrorV
BIN, BIWM
REF
ea
2.5 V
DC
CIN, CIMF, CIWM
Gain ErrorV
BIN, BIWM
REF
ea
2.5 V
DC
CIN, CIMF, CIWM
Zero ErrorV
BIN, BIWM
REF
ea
2.5 V
DC
CIN, CIMF, CIWM
Total Unadjusted ErrorV
BIN, BIWM(Note 10)
REF
ea
5V
DC
CIN, CIMF, CIWM
Differential LinearityV
R
REF
V
IN
Reference Input Resistance(Note 11)3.5kX
Analog Input Voltage(Note 12)(V
REF
ea
2.5 V
DC
e
50X unless otherwise
Source
e
25§C.
g
(/2LSB (max)
g
1LSB (max)
g
1LSB (max)
g
1LSB (max)
g
1LSB (max)
g
1LSB (max)
g
1LSB (max)
g
1LSB (max)
8Bits (min)
1.3kX (min)
6.0kX (max)
a
0.05)V (max)
CC
b
(GND
0.05)V (min)
Units
(Limits)
3
Electrical Characteristics (Continued)
The following specifications apply for V
specified. Boldface limits apply for T
CC
A
ea
e
T
J
5VDC,V
e
T
MIN
REF
to T
ea
MAX
2.5 VDCand f
; all other limits T
CLK
e
e
A
4 MHz, R
e
T
J
ADC08231,
ADC08234 and
ADC08238 with BIN,
SymbolParameterConditionsCIN, BIWM,
CIWM, or CIMF Suffixes
TypicalLimits
(Note 8)(Note 9)
CONVERTER AND MULTIPLEXER CHARACTERISTICS (Continued)
DC Common-Mode ErrorV
Power Supply SensitivityV
ea
ea
ea
2.5 V
DC
5Vg5%,
2.5 V
DC
REF
CC
V
REF
On Channel LeakageOn Channele5V,0.2
Current (Note 13)Off Channel
e
0V1
On Channele0V,
Off Channele5V
Off Channel LeakageOn Channele5V,
Current (Note 13)Off Channel
e
0V
On Channele0V,0.2
Off Channel
e
5V1
DYNAMIC CHARACTERISTICS (see Typical Converter Performance Characteristics)
S
NaD
Signal-to-V
a
(Noise
Distortion)Sample Ratee286 kHz
RatioV
ea
REF
IN
f
IN
f
IN
f
IN
5V
ea
5V
p-p
e
10 kHz48.35dB
e
50 kHz48.00dB
e
100 kHz47.40dB
DIGITAL AND DC CHARACTERISTICS
V
IN(1)
V
IN(0)
I
IN(1)
I
IN(0)
V
OUT(1)
V
OUT(0)
I
OUT
I
SOURCE
I
SINK
I
CC
Logical ‘‘1’’ Input VoltageV
Logical ‘‘0’’ Input VoltageV
Logical ‘‘1’’ Input CurrentV
Logical ‘‘0’’ Input CurrentV
Logical ‘‘1’’ Output VoltageV
Logical ‘‘0’’ Output VoltageV
TRI-STATEÉOutput CurrentV
Output Source CurrentV
Output Sink CurrentV
Supply CurrentCSeHIGH
ADC08234, ADC082383.0mA (max)
e
5.25V2.0V (min)
CC
e
4.75V0.8V (max)
CC
e
5.0V1mA (max)
IN
e
0V
IN
e
4.75V:
CC
eb
I
OUT
I
OUT
I
OUT
V
360 mA2.4V (min)
eb
10 mA4.5V (min)
e
4.75V0.4V (max)
CC
e
1.6 mA
e
0V
OUT
e
5V3.0mA (max)
OUT
e
0V
OUT
e
V
OUT
CC
ADC08231 (Note 16)6.0mA (max)
e
source
25§C.
g
g
b
b
b
b
b
b
3.0mA (max)
b
6.5mA (min)
8.0mA (min)
50X unless otherwise
Units
(Limits)
(/2LSB (max)
(/4LSB (max)
mA (max)
0.2
1
0.2
1
mA (max)
mA (max)
mA (max)
1mA (max)
4
Electrical Characteristics (Continued)
The following specifications apply for V
e
T
e
T
T
to T
A
J
MIN
; all other limits T
MAX
CC
ea
A
5VDCand f
e
e
T
J
25§C.
e
4 MHz unless otherwise specified. Boldface limits apply for
CLK
ADC08234 and
ADC08238 with BIN,
SymbolParameterConditionsCIN, BIWM,
CIWM, or CIMF Suffixes
TypicalLimits
(Note 8)(Note 9)
REFERENCE CHARACTERISTICS
V
OUTOutput VoltageBIN, BIJ,2.5
REF
BIWM
g
2%
CIN, CIJ,2.5
g
CIWM, CMJ
DV
/DTTemperature Coefficient40ppm/§C
REF
DV
REF
/DI
Load RegulationSourcing
L
(Note 17)(0sI
s
L
ADC08234,
a
4 mA)
ADC08238
3.5%
0.0030.1
Sourcing
s
s
(0
ADC082310.0030.1
a
I
2 mA)
L
Sinking
(b1sI
ADC08234,
ADC08238
s
0 mA)
L
0.20.5
Sinking
s
b
(
1sI
0 mA)
L
ADC082310.20.5
e
0V
e
0V
100 mF
CC
s
5.25V
0.56
825
20ms
Line Regulation4.75VsV
I
SC
Short Circuit CurrentV
REF
ADC08234,
ADC08238
V
REF
ADC08231825
T
SU
DV
/DtLong Term Stability200ppm/1 kHr
REF
Start-Up TimeVCC:0Vx5V
e
C
L
ADC08231,
2.5
2.5
g
g
Units
(Limits)
1.5%
V
3.0%
%/mA
(max)
mV
(max)
mA
(max)
5
Electrical Characteristics (Continued)
The following specifications apply for V
Boldface limits apply for T
SymbolParameterConditions
f
CLK
Clock Frequency10kHz (min)
e
T
A
ea
5VDC,V
CC
e
T
MIN
to T
MAX
J
ea
REF
; all other limits T
2.5 VDCand t
e
e
t
r
e
e
T
A
J
20 ns unless otherwise specified.
f
25§C.
TypicalLimitsUnits
(Note 8)(Note 9)(Limits)
4MHz (max)
Clock Duty Cycle40% (min)
(Note 14)60% (max)
T
C
t
CA
t
SELECT
t
SET-UP
t
HOLD
t
pd1,tpd0
Conversion Time (Not Includingf
MUX Addressing Time)2ms (max)
Acquisition Time1(/21/f
CLK High while CS is High50ns
CS Falling Edge or Data Input
Valid to CLK Rising Edge
Data Input Valid after CLK
Rising Edge
CLK Falling Edge to OutputC
Data Valid (Note 15)Data MSB First250ns (max)
e
4 MHz81/f
CLK
e
100 pF:
L
(max)
CLK
(max)
CLK
25ns (min)
20ns (min)
Data LSB First200ns (max)
t1H,t
C
IN
C
OUT
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed
specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance
characteristics may degrade when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to AGND
Note 4: When the input voltage (V
5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four
pins.
Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
with suffixes BIN, CIN, BIJ, CIJ, BIWM, and CIWM T
parts when board mounted follow: ADC08231 with BIN and CIN suffixes 120
167
§
ADC08238 with BIWM and CIWM suffixes 91
Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kX resistor.
Note 7: See AN450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ or
soldering surface mount devices.
Note 8: Typicals are at T
Note 9: Guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 10: Total unadjusted error includes zero, full-scale, linearity, and multiplexer error. Total unadjusted error with V
and ADC08238. See Note 16.
Note 11: Cannot be tested for the ADC08231.
Note 12: For V
for analog input voltages one diode drop below ground or one diode drop greater than V
inputs (e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures. This will cause errors for analog inputs near full-scale. The specification
allows 50 mV forward bias of either diode; this means that as long as the analog V
be correct. Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 V
range will therefore require a minimum supply voltage of 4.950 V
Note 13: Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following
two cases are considered: one, with the selected channel tied high (5 V
channels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured. The two
cases considered for determining on channel leakage current are the same except total current flow through the selected channel is measured.
Note 14: A 40% to 60% duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these
limits the minimum time the clock is high or low must be at least 120 ns. The maximum time the clock can be high or low is 100 m s.
Note 15: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to
allow for comparator response time.
Note 16: For the ADC08231 V
reference current (700 mA typical, 2 mA maximum).
Note 17: Load regulation test conditions and specifications for the ADC08231 differ from those of the ADC08234 and ADC08238 because the ADC08231 has the
on-board reference as a permanent load.
TRI-STATE Delay from Rising EdgeC
0H
of CS
to Data Output and SARS Hi-Z(see TRI-STATE Test Circuits)
Capacitance of Logic Inputs5pF
Capacitance of Logic Outputs5pF
C/W,
e
e
(T
D
J
MAX
e
J
MAX
) at any pin exceeds the power supplies (V
IN
C/W, ADC08238 with BIN and CIN suffixes 80§C/W. ADC08231 with BIWM and CIWM suffixes 140§C/W, ADC08234 with BIWM and CIWM suffixes 140§C/W,
e
25§C and represent the most likely parametric norm.
J
t
V
IN(b)
the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward-conduct
IN(a)
REF
§
IN is internally tied to the on chip 2.5V band-gap reference output; therefore, the supply current is larger because it includes the
e
10 pF, R
L
e
C
100 pF, R
L
DGNDe0VDC, unless otherwise specified.
b
TA)/iJAor the number given in the Absolute Maximum Ratings, whichever is lower. For devices
125§C. For devices with suffix CMJ, T
over temperature variations, initial tolerance and loading.
DC
) and the remaining off channels tied low (0 VDC), total current flow through the off
DC
e
10 kX
L
e
2kX180ns (max)
L
k
(AGND or DGND) or V
IN
J
MAX
J
C/W, ADC08234 with BIN and CIN suffixes 95§C/W, ADC08234 with CIMF suffix
§
does not exceed the supply voltage by more than 50 mV, the output code will
IN
MAX
Linear Data Book
supply. During testing at low VCClevels (e.g., 4.5V), high level analog
CC
50ns
l
AVCC,) the current at that pin should be limited to
IN
, iJAand the ambient temperature, TA. The maximum
e
150§C. The typical thermal resistances (iJA) of these
section ‘‘Surface Mount’’ for other methods of
ea
5V only applies to the ADC08234
REF
to5VDCinput voltage
DC
6
Typical Performance Characteristics
Linearity Error vs
Reference Voltage
Power Supply Current vs
Temperature (ADC08238,
ADC08234)
Note: For ADC08231 add I
Spectral Response with
10 kHz Sine Wave Input
Linearity Error vs
Temperature
Output Current vs
Temperature
(Note 16)TL/H/11015– 5
REF
Spectral Response with
50 kHz Sine Wave Input
Linearity Error vs
Clock Frequency
Power Supply Current
vs Clock Frequency
Spectral Response with
100 kHz Sine Wave Input
a
Signal-to-Noise
Distortion
Ratio vs Input Frequency
7
TL/H/11015– 6
Typical Reference Performance Characteristics
Line Regulation
Load Regulation(3 Typical Parts)
Available
Output Current
vs Supply Voltage
Output Drift
vs Temperature
(3 Typical Parts)
TL/H/11015– 7
8
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