National Semiconductor ADC08200 Technical data
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ADC08200
8-Bit, 20 MSPS to 200 MSPS, 1.05 mW/MSPS A/D
Converter
ADC08200 8-Bit, 20 MSPS to 200 MSPS, 1.05 mW/MSPS A/D Converter
November 2002
General Description
The ADC08200 is a low-power, 8-bit, monolithic analog-todigital converter with an on-chip track-and-hold circuit. Optimized for low cost, low power, small size and ease of use,
this product operates at conversion rates up to 230 MSPS
while consuming just 1.05 mW per MHz of clock frequency,
or 210 mW at 200 MSPS. Raising the PD pin puts the
ADC08200 into a Power Down mode where it consumes
1mW.
The unique architecture achieves 7.3 Effective Bits with
50 MHz input frequency. The ADC08200 is resistant to
latch-up and the outputs are short-circuit proof. The top and
bottom of the ADC08200’s reference ladder are available for
connections, enabling a wide range of input possibilities. The
digital outputs are TTL/CMOS compatible with a separate
output power supply pin to support interfacing with 3V or
2.5V logic. The digital inputs (CLK and PD) are TTL/CMOS
compatible.
The ADC08200 is offered in a 24-lead plastic package
(TSSOP) and is specified over the industrial temperature
range of −40˚C to +85˚C.
Features
n Single-ended input
n Internal sample-and-hold function
n Low voltage (single +3V) operation
n Small package
n Power-down feature
Key Specifications
j
Resolution: 8 bits
j
Maximum sampling frequency: 200 MSPS (min)
j
DNL:
j
ENOB (fIN= 50 MHz): 7.3 bits (typ)
j
THD (fIN= 50 MHz): −61 dB (typ)
j
No missing codes Guaranteed
j
Power Consumption
Operating 1.05 mW/MSPS (typ)
Power down 1 mW (typ)
±
0.4 LSB (typ)
Applications
n Flat panel displays
n Projection systems
n Set-top boxes
n Battery-powered instruments
n Communications
n Medical scan converters
n X-ray imaging
n High speed viterbi decoders
n Astronomy
Pin Configuration
20017901
© 2002 National Semiconductor Corporation DS200179 www.national.com
Ordering Information
ADC08200
Block Diagram
ADC08200CIMT TSSOP
ADC08200CIMTX TSSOP (tape and reel)
Pin Descriptions and Equivalent Circuits
Pin No. Symbol Equivalent Circuit Description
6V
3V
9V
10 V
IN
RT
RM
RB
Analog signal input. Conversion range is VRBto VRT.
Analog Input that is the high (top) side of the reference
ladder of the ADC. Nominal range is 0.5V to V
and VRBinputs define the VINconversion range.
on V
RT
Bypass well. See Section 2.0 for more information.
Mid-point of the reference ladder. This pin should be
bypassed to a quiet point in the analog ground plane with
a 0.1 µF capacitor.
Analog Input that is the low side (bottom) of the
reference ladder of the ADC. Nominal range is 0.0V to
– 0.5V). Voltage on VRTand VRBinputs define the
(V
RT
conversion range. Bypass well. See Section 2.0 for
V
IN
more information.
20017902
. Voltage
A
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Pin Descriptions and Equivalent Circuits (Continued)
Pin No. Symbol Equivalent Circuit Description
Power Down input. When this pin is high, the converter is
23 PD
in the Power Down mode and the data output pins hold
the last conversion result.
ADC08200
24 CLK
13 thru 16
and
D0–D7
19 thru 22
7V
IN
GND Reference ground for the single-ended analog input, VIN.
CMOS/TTL compatible digital clock Input. V
on the rising edge of CLK input.
Conversion data digital Output pins. D0 is the LSB, D7 is
the MSB. Valid data is output just after the rising edge of
the CLK input.
Positive analog supply pin. Connect to a quiet voltage
1, 4, 12 V
A
source of +3V. V
ceramic chip capacitor for each pin, plus one
should be bypassed with a 0.1 µF
A
10 µF capacitor. See Section 3.0 for more information.
18 V
DR
Power supply for the output drivers. If connected to VA,
decouple well from V
.
A
17 DR GND The ground return for the output driver supply.
2, 5, 8, 11 AGND The ground return for the analog supply.
is sampled
IN
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Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
ADC08200
Soldering Temperature, Infrared,
10 seconds (Note 6) 235˚C
Storage Temperature −65˚C to +150˚C
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
Driver Supply Voltage (V
Voltage on Any Input or Output Pin −0.3V to V
Reference Voltage (VRT,VRB)V
) 3.8V
A
)V
DR
A
to AGND
A
+0.3V
A
CLK, PD Voltage Range −0.05V to
+ 0.05V)
(V
A
Input Current at Any Pin (Note 3)
Package Input Current (Note 3)
Power Dissipation at T
= 25˚C See (Note 4)
A
±
25 mA
±
50 mA
Operating Ratings (Notes 1, 2)
Operating Temperature Range −40˚C ≤ T
Supply Voltage (V
Driver Supply Voltage (V
) +2.7V to +3.6V
A
) +2.4V to V
DR
Ground Difference |GND - DR GND| 0V to 300 mV
Upper Reference Voltage (V
Lower Reference Voltage (V
V
Voltage Range VRBto V
IN
) 0.5V to (VA−0.3V)
RT
) 0Vto(VRT−0.5V)
RB
A
ESD Susceptibility (Note 5)
Human Body Model
Machine Model
2500V
200V
Converter Electrical Characteristics
The following specifications apply for VA=VDR= +3.0VDC,VRT= +1.9V, VRB= 0.3V, CL= 5 pF, f
cycle. Boldface limits apply for T
A=TMIN
to T
Symbol Parameter Conditions
: all other limits TA= 25˚C (Notes 7, 8)
MAX
Typical
(Note 9)
DC ACCURACY
INL Integral Non-Linearity
DNL Differential Non-Linearity
+1.0
−0.3
±
0.4
Missing Codes 0 (max)
FSE Full Scale Error 36 50 mV (max)
V
OFF
Zero Scale Offset Error 46 60 mV (max)
ANALOG INPUT AND REFERENCE CHARACTERISTICS
V
IN
C
IN
R
IN
Input Voltage 1.6
VINInput Capacitance
RINInput Resistance
V
= 0.75V +0.5
IN
Vrms
(CLK LOW) 3 pF
(CLK HIGH) 4 pF
>
1MΩ
BW Full Power Bandwidth 500 MHz
V
RT
V
RB
R
REF
Top Reference Voltage 1.9
Bottom Reference Voltage 0.3
Reference Ladder Resistance VRTto V
RB
160
CLK, PD DIGITAL INPUT CHARACTERISTICS
V
IH
V
IL
I
IH
I
IL
C
IN
Logical High Input Voltage VDR=VA= 3.6V 2.0 V (min)
Logical Low Input Voltage VDR=VA= 2.7V 0.8 V (max)
Logical High Input Current VIH=VDR=VA= 3.6V 10 nA
Logical Low Input Current VIL= 0V, VDR=VA= 2.7V −50 nA
Logic Input Capacitance 3 pF
DIGITAL OUTPUT CHARACTERISTICS
V
OH
V
OL
High Level Output Voltage VA=VDR= 2.7V, IOH= −400 µA 2.6 2.4 V (min)
Low Level Output Voltage VA=VDR= 2.7V, IOL= 1.0 mA 0.4 0.5 V (max)
= 200 MHz at 50% duty
CLK
Limits
(Note 9)
+1.9
LSB (max)
−1.2
±
0.95 LSB (max)
V
RB
V
RT
V
A
0.5 V (min)
− 0.5 V (max)
V
RT
0 V (min)
120 Ω (min)
200 Ω (max)
≤ +85˚C
A
RT
Units
(Limits)
LSB (min)
V (min)
V (max)
V (max)
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Converter Electrical Characteristics (Continued)
The following specifications apply for VA=VDR= +3.0VDC,VRT= +1.9V, VRB= 0.3V, CL= 5 pF, f
cycle. Boldface limits apply for T
A=TMIN
to T
Symbol Parameter Conditions
: all other limits TA= 25˚C (Notes 7, 8)
MAX
Typical
(Note 9)
DYNAMIC PERFORMANCE
f
= 4 MHz, VIN= FS − 0.25 dB 7.5 Bits
IN
f
= 20 MHz, VIN= FS − 0.25 dB 7.4 Bits
IN
f
ENOB Effective Number of Bits
SINAD Signal-to-Noise & Distortion
SNR Signal-to-Noise Ratio
SFDR Spurious Free Dynamic Range
THD Total Harmonic Distortion
HD2 2nd Harmonic Distortion
HD3 3rd Harmonic Distortion
IMD Intermodulation Distortion
= 50 MHz, VIN= FS − 0.25 dB 7.3 6.9 Bits (min)
IN
f
= 70 MHz, VIN= FS − 0.25 dB 7.2 Bits
IN
f
= 100 MHz, VIN= FS − 0.25 dB 7.0 Bits
IN
f
= 4 MHz, VIN= FS − 0.25 dB 47 dB
IN
f
= 20 MHz, VIN= FS − 0.25 dB 46 dB
IN
f
= 50 MHz, VIN= FS − 0.25 dB 46 43.3 dB (min)
IN
f
= 70 MHz, VIN= FS − 0.25 dB 45 dB
IN
f
= 100 MHz, VIN= FS − 0.25 dB 44 dB
IN
f
= 4 MHz, VIN= FS − 0.25 dB 47 dB
IN
f
= 20 MHz, VIN= FS − 0.25 dB 46 dB
IN
f
= 50 MHz, VIN= FS − 0.25 dB 46 43.4 dB (min)
IN
f
= 70 MHz, VIN= FS − 0.25 dB 45 dB
IN
f
= 100 MHz, VIN= FS − 0.25 dB 44 dB
IN
f
= 4 MHz, VIN= FS − 0.25 dB 60 dBc
IN
f
= 20 MHz, VIN= FS − 0.25 dB 58 dBc
IN
f
= 50 MHz, VIN= FS − 0.25 dB 60 dBc
IN
f
= 70 MHz, VIN= FS − 0.25 dB 57 dBc
IN
f
= 100 MHz, VIN= FS − 0.25 dB 54 dBc
IN
f
= 4 MHz, VIN= FS − 0.25 dB −60 dBc
IN
f
= 20 MHz, VIN= FS − 0.25 dB −58 dBc
IN
f
= 50 MHz, VIN= FS − 0.25 dB −60 dBc
IN
f
= 70 MHz, VIN= FS − 0.25 dB -56 dBc
IN
f
= 100 MHz, VIN= FS − 0.25 dB −53 dBc
IN
f
= 4 MHz, VIN= FS − 0.25 dB −66 dBc
IN
f
= 20 MHz, VIN= FS − 0.25 dB -68 dBc
IN
f
= 50 MHz, VIN= FS − 0.25 dB −66 dBc
IN
f
= 70 MHz, VIN= FS − 0.25 dB -60 dBc
IN
f
= 100 MHz, VIN= FS − 0.25 dB −55 dBc
IN
f
= 4 MHz, VIN= FS − 0.25 dB −72 dBc
IN
f
= 20 MHz, VIN= FS − 0.25 dB −58 dBc
IN
f
= 50 MHz, VIN= FS − 0.25 dB −72 dBc
IN
f
= 70 MHz, VIN= FS − 0.25 dB -58 dBc
IN
f
= 100 MHz, VIN= FS − 0.25 dB −60 dBc
IN
f
= 11 MHz, VIN= FS − 6.25 dB
1
= 12 MHz, VIN= FS − 6.25 dB
f
2
-55 dBc
POWER SUPPLY CHARACTERISTICS
I
A
I
DR
I
A+IDR
Analog Supply Current
Output Driver Supply Current DC Input, PD = Low 0.25 0.6 mA (max)
Total Operating Current
DC Input 69.75 86 mA (max)
f
= 10 MHz, VIN=FS−3dB 69.75 mA (max)
IN
DC Input, PD = Low 70 86.6 mA (max)
CLK Low, PD = Hi 0.3 mA
PC Power Consumption DC Input, Excluding Reference 210 260 mW (max)
PSRR
Power Supply Rejection Ratio
1
FSE change with 2.7V to 3.3V change
in V
A
54 dB
= 200 MHz at 50% duty
CLK
Limits
(Note 9)
(Limits)
Units
ADC08200
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Converter Electrical Characteristics (Continued)
The following specifications apply for VA=VDR= +3.0VDC,VRT= +1.9V, VRB= 0.3V, CL= 5 pF, f
cycle. Boldface limits apply for T
ADC08200
A=TMIN
to T
Symbol Parameter Conditions
: all other limits TA= 25˚C (Notes 7, 8)
MAX
Typical
(Note 9)
AC ELECTRICAL CHARACTERISTICS
f
C1
f
C2
t
CL
t
CH
t
OH
t
OD
Maximum Conversion Rate 230 200 MHz (min)
Minimum Conversion Rate 10 MHz
Minimum Clock Low Time 0.87 1.0 ns (min)
Minimum Clock High Time 0.65 0.75 ns (min)
Output Hold Time CLK to Data Invalid 2.1 ns
Output Delay CLK to Data Transition 3.5
Pipeline Delay (Latency) 6 Clock Cycles
t
AD
t
AJ
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = AGND = DR GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, less thanAGND or DR GND, or greater than V
be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of
25 mA to two.
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (θ
TSSOP, θ
this device under normal operation will typically be about 245 mW (205 mW quiescent power + 16 mW reference ladder power + 24 mW to drive the output bus
capacitance). The values for maximum power dissipation listed above will be reached only when the ADC08200 is operated in a severe fault condition (e.g., when
input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through ZERO Ohms.
Note 6: See AN-450, “Surface Mounting Methods and Their Effect on Product Reliability”.
Note 7: The analog inputs are protected as shown below. Input voltage magnitudes up to V
However, errors in the A/D conversion can occur if the input goes above V
voltage must be ≤2.8V
Sampling (Aperture) Delay CLK Rise to Acquisition of Data 2.6 ns
Aperture Jitter 2 ps rms
max) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the
), and the ambient temperature (TA), and can be calculated using the formula PDMAX=(TJmax − TA)/θJA. In the 24-pin
is 92˚C/W, so PDMAX = 1,358 mW at 25˚C and 435 mW at the maximum operating ambient temperature of 85˚C. Note that the power consumption of
JA
to ensure accurate conversions.
DC
JA
J
+ 300 mV or to 300 mV below GND will not damage this device.
or below GND by more than 100 mV. For example, if VAis 2.7VDCthe full-scale input
DR
A
= 200 MHz at 50% duty
CLK
Limits
(Note 9)
2.5 ns (min)
5 ns (max)
or VDR), the current at that pin should
A
Units
(Limits)
20017907
Note 8: To guarantee accuracy, it is required that VAand VDRbe well bypassed. Each supply pin must be decoupled with separate bypass capacitors.
Note 9: Typical figures are at T
Level).
= 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality
J
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