National Semiconductor ADC081S051 Technical data

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ADC081S051
Single Channel, 500 kSPS, 8-Bit A/D Converter

ADC081S051 Single Channel, 500 kSPS, 8-Bit A/D Converter

April 2005

General Description

The ADC081S051 is a low-power, single channel CMOS
8-bit analog-to-digital converter with a high-speed serial in­terface. Unlike the conventional practice of specifying per­formance at a single sample rate only, the ADC081S051 is
fully specified over a sample rate range of 200 kSPS to 500
kSPS. The converter is based on a successive­approximation register architecture with an internal track­and-hold circuit.

The output serial data is straight binary, and is compatible
with several standards, such as SPI
MICROWIRE, and many common DSP serial interfaces.

The ADC081S051 operates with a single supply that can
range from +2.7V to +5.25V. Normal power consumption
using a +3V or +5V supply is 2.9 mW and 10.5 mW, respec­tively. The power-down feature reduces the power consump­tion to as low as 2.6 µW using a +5V supply.

The ADC081S051 is packaged in an 6-lead LLP package.
Operation over the industrial temperature range of −40˚C to
+85˚C is guaranteed.

™

, QSPI™,

Features

n Specified over a range of sample rates.
n 6-lead LLP package
n Variable power management
n Single power supply with 2.7V - 5.25V range

™

n SPI

/QSPI™/MICROWIRE/DSP compatible

Key Specifications

n DNL + 0.07 / −0.06 LSB (typ)
n INL + 0.06 / −0.07 LSB (typ)
n SNR 49.6 dB (typ)
n Power Consumption

— 3V Supply 2.9 mW (typ)
— 5V Supply 10.5 mW (typ)

Applications

n Portable Systems
n Remote Data Aquisitions
n Instrumentation and Control Systems

Pin-Compatible Alternatives by Resolution and Speed

All devices are fully pin and function compatible.

Resolution Specified for Sample Rate Range of:

50 to 200 kSPS 200 to 500 kSPS 500 kSPS to 1 MSPS

12-bit ADC121S021 ADC121S051 ADC121S101

10-bit ADC101S021 ADC101S051 ADC081S101

8-bit ADC081S021 ADC081S051 ADC081S101

Connection Diagram

20145505

Ordering Information

Order Code Temperature Range Description Top Mark

ADC081S051CISD −40˚C to +85˚C 6-Lead LLP Package X6C

ADC081S051CISDX −40˚C to +85˚C 6-Lead LLP Package, Tape & Reel X6C

TRI-STATE®is a trademark of National Semiconductor Corporation

™

QSPI

and SPI™are trademarks of Motorola, Inc.

© 2005 National Semiconductor Corporation DS201455 www.national.com

Block Diagram

ADC081S051

Pin Descriptions and Equivalent Circuits

Pin No. Symbol Description

ANALOG I/O

3V

DIGITAL I/O

4 SCLK Digital clock input. This clock directly controls the conversion and readout processes.

5 SDATA

6CS

POWER SUPPLY

1V

2 GND The ground return for the supply and signals.

IN

A

Analog inputs. This signal can range from 0V to VA.

Digital data output. The output samples are clocked out of this pin on falling edges of
the SCLK pin.

Chip select. On the falling edge of CS, a conversion process begins.

Positive supply pin. This pin should be connected to a quiet +2.7V to +5.25V source
and bypassed to GND witha1µFcapacitor and a 0.1 µF monolithic capacitor located
within 1 cm of the power pin.

20145507

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ADC081S051

Absolute Maximum Ratings (Notes 1, 2)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Analog Supply Voltage V

A

Voltage on Any Pin to GND −0.3V to V

Input Current at Any Pin (Note 3)

Package Input Current (Note 3)

Power Consumption at T

= 25˚C See (Note 4)

A

ESD Susceptibility (Note 5)

Human Body Model
Machine Model

Junction Temperature +150˚C

Storage Temperature −65˚C to +150˚C

−0.3V to 6.5V

+0.3V

A

±

10 mA

±

20 mA

3500V

300V

Operating Ratings (Notes 1, 2)

Operating Temperature Range −40˚C ≤ T

V

Supply Voltage +2.7V to +5.25V

A

Digital Input Pins Voltage Range −0.3V to V

Clock Frequency 4 MHz to 10 MHz

Sample Rate up to 500 kSPS

Analog Input Voltage 0V to V

Package Thermal Resistance

Package θ

6-lead LLP 78˚C / W

Soldering process must comply with National Semiconduc­tor’s Reflow Temperature Profile specifications. Refer to
www.national.com/packaging. (Note 6)

ADC081S051 Converter Electrical Characteristics (Note 9)

The following specifications apply for VA= +2.7V to 5.25V, GND = 0V, f
f

= 200 kSPS to 500 kSPS, unless otherwise noted. Boldface limits apply for TA=T

SAMPLE

25˚C.

Symbol Parameter Conditions Typical

STATIC CONVERTER CHARACTERISTICS

Resolution with No Missing Codes 8 Bits

INL Integral Non-Linearity

DNL Differential Non-Linearity

V

OFF

Offset Error +0.03

GE Gain Error

TUE Total Unadjusted Error

DYNAMIC CONVERTER CHARACTERISTICS

V

= +2.7 to 5.25V

SINAD Signal-to-Noise Plus Distortion Ratio

SNR Signal-to-Noise Ratio

THD Total Harmonic Distortion

SFDR Spurious-Free Dynamic Range

ENOB Effective Number of Bits

Intermodulation Distortion, Second

IMD

Order Terms

Intermodulation Distortion, Third
Order Terms

FPBW -3 dB Full Power Bandwidth

A

= 100 kHz, −0.02 dBFS

f

IN

V

= +2.7 to 5.25V

A

= 100 kHz, −0.02 dBFS

f

IN

V

= +2.7 to 5.25V

A

= 100 kHz, −0.02 dBFS

f

IN

V

= +2.7 to 5.25V

A

= 100 kHz, −0.02 dBFS

f

IN

V

= +2.7 to 5.25V

A

= 100 kHz, −0.02 dBFS

f

IN

V

= +5.25V

A

= 103.5 kHz, fb= 113.5 kHz

f

a

V

= +5.25V

A

= 103.5 kHz, fb= 113.5 kHz

f

a

V

= +5V 11 MHz

A

V

= +3V 8 MHz

A

= 4 MHz to 10 MHz,

SCLK

+0.06 +0.3 LSB (max)

−0.07 −0.3 LSB (min)

+0.07 +0.2 LSB (max)

−0.06 −0.2 LSB (min)

±

0.08

+0.8 +0.2 LSB (max)

−0.07 −0.3 LSB (min)

49.6 49 dB (min)

49.6 49 dB (min)

−70 −65 dB (max)

67 65 dB (min)

7.9 7.8 Bits (min)

−68 dB

−68 dB

MIN

JA

to T

: all other limits TA=

MAX

Limits

(Note 9)

±

0.2 LSB (max)

±

0.4 LSB (max)

≤ +85˚C

A

Units

A

A

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ADC081S051 Converter Electrical Characteristics (Note 9) (Continued)

The following specifications apply for VA= +2.7V to 5.25V, GND = 0V, f
f

= 200 kSPS to 500 kSPS, unless otherwise noted. Boldface limits apply for TA=T

SAMPLE

25˚C.

ADC081S051

Symbol Parameter Conditions Typical

ANALOG INPUT CHARACTERISTICS

V

IN

I

DCL

C

INA

DIGITAL INPUT CHARACTERISTICS

V

IH

V

IL

I

IN

C

IND

DIGITAL OUTPUT CHARACTERISTICS

V

OH

V

OL

I

OZH

I

OZL

C

OUT

POWER SUPPLY CHARACTERISTICS (C

V

A

I

A

P

D

AC ELECTRICAL CHARACTERISTICS

f

SCLK

f

S

t

CONV

DC SCLK Duty Cycle f

t

ACQ

Input Range 0 to V

DC Leakage Current

Input Capacitance

Track Mode 30 pF

Hold Mode 4 pF

Input High Voltage VA= +5.25V 2.4 V (min)

= +5.25V 0.8 V (max)

V

Input Low Voltage

Input Current VIN=0VorV

A

V

= +3.6V 0.4 V (max)

A

A

Digital Input Capacitance 2 4 pF (max)

Output High Voltage

Output Low Voltage

,

TRI-STATE®Leakage Current

I

SOURCE

I

SOURCE

I

SINK

I

SINK

= 200 µA VA− 0.03 VA− 0.2 V (min)

=1mA VA− 0.1 V

= 200 µA 0.03 0.4 V (max)

= 1 mA 0.1 V

TRI-STATE®Output Capacitance 2 4 pF (max)

Output Coding Straight (Natural) Binary

=10pF)

L

Supply Voltage

VA= +5.25V,
Supply Current, Normal Mode
(Operational, CS low)

Supply Current, Shutdown (CS high)

Power Consumption, Normal Mode
(Operational, CS low)

Power Consumption, Shutdown (CS
high)

f

V

f

f

f

V

f

VA= +5.25V 10.5 12.6 mW (max)

V

f

f

V

f

= 200 kSPS

SAMPLE

= +3.6V,

A

= 200 kSPS

SAMPLE

= 0 MHz, VA= +5.25V

SCLK

= 0 kSPS

SAMPLE

= +5.25V, f

A

= 0 kSPS

SAMPLE

= +3.6V 2.9 3.6 mW (max)

A

= 0 MHz, VA= +5.25V

SCLK

= 0 kSPS

SAMPLE

= +5.25V, f

A

= 0 kSPS

SAMPLE

SCLK

SCLK

= 10MHz,

= 10 MHz,

Clock Frequency (Note 8)

Sample Rate (Note 8)

Conversion Time 16 SCLK cycles

= 10 MHz 50

SCLK

Track/Hold Acquisition Time 400 ns (max)

Throughput Time Acquisition Time + Conversion Time 20 SCLK cycles

= 4 MHz to 10 MHz,

SCLK

±

±

2.0 2.4 mA (max)

0.8 1.0 mA (max)

0.5 µA

2.6 µW

0.12 mW

0.1

0.1

MIN

to T

A

: all other limits TA=

MAX

Limits

(Note 9)

±

1 µA (max)

±

1 µA (max)

±

10 µA (max)

Units

V

2.7 V (min)

5.25 V (max)

22 µA

4 MHz (min)

10 MHz (max)

50 200 kSPS (min)

500 kSPS (max)

40 % (min)

60 % (max)

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