National Semiconductor 74FCT273 Technical data

54FCT/74FCT273
Octal D Flip-Flop

54FCT/74FCT273 Octal D Flip-Flop

March 1993

General Description

The ’FCT273 has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered
Clock (CP) and Master Reset (MR
(clear) all flip-flops simultaneously.

The register is fully edge-triggered. The state of each D in­put, one setup time before the LOW-to-HIGH clock tran­sition, is transferred to the corresponding flip-flop’s Q out­put.

All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR
device is useful for applications where the true output only is
required and the Clock and Master Reset are common to all
storage elements.

) input load and reset

input. The

Features

Y

ICCreduced to 40.0 mA

Y

Ideal buffer for MOS microprocessor or memory

Y

Eight edge-triggered D flip-flops

Y

Buffered common clock

Y

Buffered, asynchronous master reset

Y

TTL input and output level compatible

Y

TTL levels accept CMOS levels

Y

e

I

48 mA (Com), 32 mA (Mil)

OL

Y

NSC 54/74FCT273 is pin and functionally equivalent to
IDT 54/74FCT273

Y

Military product compliant to MIL-STD-883 and
Standard Military Drawing

Ý

5962-87656

Logic Symbols Connection Diagrams

Pin Assignment

IEEE/IEC

TL/F/10146– 1

for DIP, Flatpak and SOIC

Pin Names Description

D0–D
MR

7

Data Inputs
Master Reset

TL/F/10146– 2

Pin Assignment

for LCC

TL/F/10146– 3

CP Clock Pulse Input
Q

0–Q7

FACTTMis a trademark of National Semiconductor Corporation.

C

1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Data Outputs

TL/F/10146– 4

TL/F/10146

Mode Select-Function Table

Operating Mode

MR CP D

Reset (Clear) L X X L

Load ‘1’ H L HH

Load ‘0’ H L LL

Inputs Outputs

n

Q

n

Logic Diagram

e

H

HIGH Voltage Level

e

LOW Voltage Level

L

e

Immaterial

X

e

LOW-to-HIGH Transition

L

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

TL/F/10146– 5

2

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Terminal Voltage with Respect to GND

(V

)

TERM

54FCT
74FCT

Temperature Under Bias (T

74FCT

BIAS

)

54FCT

Storage Temperature (T

74FCT

STG

)

54FCT

DC Output Current (I

Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom­mend operation of FACT

) 120 mA

OUT

TM

FCT circuits outside databook specifications.

b

0.5 toa7.0V

b

0.5 toa7.0V

b

55§Ctoa125§C

b

65§Ctoa135§C

b

55§Ctoa125§C

b

65§Ctoa150§C

Recommended Operating
Conditions

Supply Voltage (VCC)

54FCT 4.5V to 5.5V
74FCT 4.75 to 5.25V

Input Voltage 0V to V

Output Voltage 0V to V

Operating Temperature (TA)

54FCT
74FCT 0

b

55§Ctoa125§C

§

Junction Temperature (TJ)

CDIP 175
PDIP 140

Note: All commercial packaging is not recommended for applications requir­ing greater than 2000 temperature cycles from

b

40§Ctoa125§C.

CC

CC

Ctoa70§C

C

§

C

§

DC Characteristics for ’FCT Family Devices

Typical values are at V
specified for the appropriate device type: Com: V

a

to

125§C, V

Symbol Parameter

HC

e

e

5.0V, 25§C ambient and maximum loading. For test conditions shown as Max, use the value

CC

b

V

0.2V

CC

CC

e

5.0Vg5%, T

A

54FCT/74FCT

Min Typ Max

V

IH

V

IL

I

IH

I

IL

V

IK

I

OS

V

OH

Minimum High Level
Input Voltage

Maximum Low Level
Input Voltage

2.0 V

0.8 V

Input High Current 5.0

5.0 V

Input Low Current

Clamp Diode Voltage

Short Circuit Current

b

b

b

60

b

5.0

b

5.0 V

b

0.7

1.2 V V

120 mA V

Minimum High Level 2.8 3.0 V
Output Voltage I

V

2.4 4.3 V

HC

V

CC

2.4 4.3 I

e

0§Ctoa70§C; Mil: V

CC

e

5.0Vg10%, T

Units Conditions

e

V

Max V

mA

mA

V

CC

e

V

CC

e

CC

e

CC

e

CC

eb

OL

e

V

CC

e

IN

Max V

eb

Min; I

N

Max (Note 1); V

e

3V; V

32 mA

IN

0.2V or VHC;

Min I

VIHor V

IL

18 mA

O

OH

I

OH

OH

e

V

I

CC

e

2.7V (Note 2)

I

e

0.5V (Note 2)

I

e

GND

I

e

GND

eb
eb
eb

eb

55§C

A

300 mA
12 mA (Mil)
15 mA (Com)

3