National Semiconductor 54F153, 74F153 Technical data
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54F/74F153
Dual 4-Input Multiplexer
General Description
The ’F153 is a high-speed dual 4-input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of data from four sources. The
two buffered outputs present data in the true (non-inverted)
December 1994
form. In addition to multiplexer operation, the ’F153 can
generate any two functions of three variables.
Features
Y
Guaranteed 4000V minimum ESD protection
54F/74F153 Dual 4-Input Multiplexer
Commercial Military
74F153PC N16E 16-Lead (0.300×Wide) Molded Dual-In-Line
54F153DM (Note 2) J16A 16-Lead Ceramic Dual-In-Line
74F153SC (Note 1) M16A 16-Lead (0.150×Wide) Molded Small Outline, JEDEC
74F153SJ (Note 1) M16D 16-Lead (0.300×Wide) Molded Small Outline, EIAJ
54F153FM (Note 2) W16A 16-Lead Cerpack
54F153LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13×reel. Use suffixeSCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix
Package
Number
Package Description
e
DMQB, FMQB and LMQB.
Logic Symbols Connection Diagrams
Pin Assignment
for DIP, SOIC and Flatpak
TL/F/9482– 3
IEEE/IEC
TL/F/9482– 1
Pin Assignment
for LCC
TL/F/9482– 2
TL/F/9482– 5
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
TL/F/9482
Unit Loading/Fan Out
Pin Names Description
I0a–I
I
0b–I3b
S
0,S1
E
a
E
b
Z
a
Z
b
Side A Data Inputs 1.0/1.0 20 mA/b0.6 mA
3a
Side B Data Inputs 1.0/1.0 20 mA/b0.6 mA
Common Select Inputs 1.0/1.0 20 mA/b0.6 mA
Side A Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA
Side B Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA
Side A Output 50/33.3
Side B Output 50/33.3
54F/74F
U.L. Input I
HIGH/LOW Output IOH/I
b
1 mA/20 mA
b
1 mA/20 mA
IH/IIL
OL
Functional Description
e
The ’F153 is a dual 4-input multiplexer. It can select two bits
of data from up to four sources under the control of the
common Select inputs (S
circuits have individual active LOW Enables (E
can be used to strobe the outputs independently. When the
Enables (E
Z
) are forced LOW. The ’F153 is the logic implementation
b
of a 2-pole, 4-position switch, where the position of the
) are HIGH, the corresponding outputs (Za,
a,Eb
). The two 4-input multiplexer
0,S1
a,Eb
) which
switch is determined by the logic levels supplied to the two
Select inputs. The logic equations for the outputs are as
follows:
Z
E
#
a
a
I
e
Z
E
#
b
b
I
The ’F153 can be used to move data from a group of registers to a common output bus. The particular register from
which the data came would be determined by the state of
the Select inputs. A less obvious application is as a function
generator. The ’F153 can generate two functions of three
variables. This is useful for implementing highly irregular
random logic.
Truth Table
Select
Inputs
S
S
0
E I
1
XXHXXXX L
LLLLXXX L
LLLHXXX H
HLLXLXX L
HLLXHXX H
LHLXXLX L
LHLXXHX H
HHLXXXL L
HHLXXXH H
e
H
HIGH Voltage Level
e
LOW
L
e
Immaterial
X
Inputs (a or b) Output
I
0
I
1
I
2
3
(I
0a
2a
(I
0b
2b
a
S
S
#
S
#
1
S
#
S
#
1
I
#
1
0
1a
a
S
I
#
0
3a
a
S
I
#
1
0
1b
a
S
I
#
0
3b
a
S
S
#
#
1
0
S
S0)
#
#
1
a
S
S
#
#
1
0
S
S0)
#
#
1
Z
2
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
TL/F/9482– 4
3
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