查询54AC378供应商
54AC/74AC378
Parallel D Register with Enable
54AC/74AC378 Parallel D Register with Enable
March 1993
General Description
The ’AC378 is a 6-bit register with a buffered common Enable. This device is similar to the ’AC174, but with common
Enable rather than common Master Reset.
Features
Y
6-bit high-speed parallel register
Y
Positive edge-triggered D-type inputs
Y
Fully buffered common clock and enable inputs
Y
Input clamp diodes limit high-speed termination effects
Y
Standard Military Drawing (SMD)
Ð ’AC378: 5962-91605
Logic Symbols Connection Diagrams
IEEE/IEC
Pin Assignment for
DIP, SOIC and Flatpak
TL/F/10231– 1
TL/F/10231– 2
Pin Assignment
for LCC
TL/F/10231– 3
TL/F/10231– 4
Pin Names Description
E Enable Input (Active LOW)
D
0–D5
CP Clock Pulse Input (Active Rising Edge)
Q
0–Q5
FACTTMis a trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
Data Inputs
Outputs
TL/F/10231
Functional Description
The ’AC378 consists of six edge-triggered D-type flip-flops
with individual D inputs and Q inputs. The Clock (CP) and
Enable (E
) inputs are common to all flip-flops.
When the E input is LOW, new data is entered into the
register on the LOW-to-HIGH transition of the CP input.
When the E
input is HIGH the register will retain the present
data independent of the CP input.
Logic Diagram
Truth Table
Inputs Output
E CP D
n
H L X No Change
L L HH
LLLL
e
H
HIGH Voltage Level
e
LOW Voltage Level
L
e
Immaterial
X
e
LOW-to-HIGH Clock Transition
L
Q
n
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
TL/F/10231– 5
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
b
0.5V to V
b
0.5V to V
b
0.5V toa7.0V
b
a
a
CC
b
a
a
CC
20 mA
20 mA
0.5V
20 mA
20 mA
0.5V
Supply Voltage (V
DC Input Diode Current (IIK)
eb
V
0.5V
I
e
V
V
I
CC
)
CC
a
0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
eb
V
0.5V
O
e
V
a
V
CC
0.5V
O
DC Output Voltage (VO)
DC Output Source
or Sink Current (I
)
O
g
50 mA
DC VCCor Ground Current
per Output Pin (I
Storage Temperature (T
Junction Temperature (T
CDIP 175
CC
or I
GND
STG
J
)
)
b
)
PDIP 140
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recommend operation of FACT
TM
circuits outside databook specifications.
g
50 mA
65§Ctoa150§C
C
§
C
§
DC Characteristics for ’AC Family Devices
74AC 54AC 74AC
V
Symbol Parameter
V
IH
Minimum High Level 3.0 1.5 2.1 2.1 2.1 V
Input Voltage 4.5 2.25 3.15 3.15 3.15 V or V
(V)
CC
5.5 2.75 3.85 3.85 3.85
V
IL
Maximum Low Level 3.0 1.5 0.9 0.9 0.9 V
Input Voltage 4.5 2.25 1.35 1.35 1.35 V or V
5.5 2.75 1.65 1.65 1.65
V
OH
Minimum High Level 3.0 2.99 2.9 2.9 2.9 I
Output Voltage 4.5 4.49 4.4 4.4 4.4 V
5.5 5.49 5.4 5.4 5.4
3.0 2.56 2.4 2.46
4.5 3.86 3.7 3.76 V I
5.5 4.86 4.7 4.76
V
OL
Maximum Low Level 3.0 0.002 0.1 0.1 0.1 I
Output Voltage 4.5 0.001 0.1 0.1 0.1 V
5.5 0.001 0.1 0.1 0.1
3.0 0.36 0.5 0.44 12 mA
4.5 0.36 0.5 0.44 V I
5.5 0.36 0.5 0.44 24 mA
I
IN
*All outputs loaded; thresholds on input associated with output under test.
Maximum Input
Leakage Current
5.5
ea
T
25§C
A
b
55§Ctoa125§Cb40§Ctoa85§C
Typ Guaranteed Limits
g
0.1
Recommended Operating
Conditions
Supply Voltage (VCC)
’AC 2.0V to 6.0V
Input Voltage (V
Output Voltage (VO) 0VtoV
Operating Temperature (TA)
74AC
54AC
Minimum Input Edge Rate (DV/Dt)
’AC Devices
V
from 30% to 70% of V
IN
V
CC
e
T
A
g
1.0
) 0VtoV
I
b
40§Ctoa85§C
b
55§Ctoa125§C
@
3.3V, 4.5V, 5.5V 125 mV/ns
T
CC
e
A
g
1.0 mA
Units Conditions
e
OUT
b
CC
e
OUT
b
CC
eb
OUT
e
*V
IN
OH
e
OUT
e
*V
IN
OL
e
V
VCC, GND
I
0.1V
0.1V
0.1V
0.1V
50 mA
VILor V
b
12 mA
b
24 mA
b
24 mA
50 mA
VILor V
24 mA
CC
CC
IH
IH
3