National Instruments PXIe-1066DC User Manual
PXI Express
PXIe-1066DC User Manual
PXIe-1066DC User Manual
TM
August 2016
373547D-01
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1
.
the DoC
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1
for product installation requirements.
1
.
1
The Declaration of Conformity (DoC) contains important EMC compliance information and instructions
for the user or installer. To obtain the DoC for this product, visit
model number or product line, and click the appropriate link in the Certification column.
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Contents
About This Manual
Related Documentation .................................................................................................... 3
Chapter 1
Getting Started
Unpacking......................................................................................................................... 1-1
What You Need to Get Started ......................................................................................... 1-1
Key Features ..................................................................................................................... 1-1
Chassis Description .......................................................................................................... 1-3
Optional Equipment.......................................................................................................... 1-4
EMC Filler Panels .................................................................................................... 1-4
Rack Mount Kit ........................................................................................................ 1-4
Slot Blockers............................................................................................................. 1-4
PXIe-1066DC Chassis Backplane Overview ................................................................... 1-5
Interoperability with CompactPCI............................................................................ 1-5
System Controller Slot.............................................................................................. 1-5
Hybrid Peripheral Slots ............................................................................................ 1-6
PXI Peripheral Slots ................................................................................................. 1-6
PXI Express Peripheral Slots.................................................................................... 1-6
System Timing Slot .................................................................................................. 1-6
PXI Local Bus .......................................................................................................... 1-8
PXI Trigger Bus........................................................................................................ 1-9
System Reference Clock........................................................................................... 1-9
PXIe_SYNC_CTRL ................................................................................................. 1-12
Chapter 2
Installation and Configuration
Safety Information ............................................................................................................ 2-1
Chassis Cooling Considerations ....................................................................................... 2-2
Providing Adequate Clearance ................................................................................. 2-2
Chassis Ambient Temperature Definition ................................................................ 2-4
Setting Fan Speed ..................................................................................................... 2-5
Installing Filler Panels .............................................................................................. 2-5
Installing Slot Blockers ............................................................................................ 2-5
Fan Access Door Clearance.............................................................................................. 2-5
Rack Mounting ................................................................................................................. 2-6
Connecting to Safety Ground and Power Source............................................................. 2-6
Power-On Test .......................................................................................................... 2-7
Installing a PXI Express System Controller ..................................................................... 2-8
Installing Peripheral Modules........................................................................................... 2-9
© National Instruments | 1
Contents
Remote System Monitoring .............................................................................................. 2-11
Default Configuration Settings ................................................................................. 2-12
Chassis LED Indicators .................................................................................................... 2-12
Remote Inhibit and Fault Monitoring ............................................................................... 2-14
Inhibit Mode Switch ......................................................................................................... 2-15
PXI_CLK10 Connectors................................................................................................... 2-15
PXI Express System Configuration with MAX................................................................ 2-15
PXI-1 System Configuration .................................................................................... 2-16
Trigger Configuration in MAX................................................................................. 2-17
PXI Trigger Bus Routing .......................................................................................... 2-17
Using System Configuration and Initialization Files........................................................ 2-18
Chapter 3
Maintenance
Service Interval .................................................................................................................3-1
Preparation ........................................................................................................................ 3-1
Cleaning ............................................................................................................................ 3-1
Interior Cleaning ....................................................................................................... 3-1
Exterior Cleaning ...................................................................................................... 3-2
Replacing a Modular Power Supply ................................................................................. 3-2
Removal ....................................................................................................................3-2
Installation ................................................................................................................ 3-5
Replacing a Modular Fan Assembly................................................................................. 3-6
Removal ....................................................................................................................3-6
Installation ................................................................................................................ 3-8
Appendix A
Specifications
Appendix B
Pinouts
Appendix C
NI Services
Glossary
Index
2 | ni.com
About This Manual
The PXIe-1066DC User Manual describes the features of the PXIe-1066DC chassis and
contains information about configuring the chassis, installing the modules, and operating the
chassis.
Related Documentation
The following documents contain information that you might find helpful as you read this
manual:
• IEEE 1101.1-1991, IEEE Standard for Mechanical Core Specifications for
Microcomputers Using IEC 603-2 Connectors
• IEEE 1101.10, IEEE Standard for Additional Mechanical Specifications for
Microcomputers Using IEEE 1101.1 Equipment Practice
• PICMG EXP.0 R1.0 CompactPCI Express Specification, PCI Industrial Computers
Manufacturers Group
• PCI Express Base Specification, Revision 1.1, PCI Special Interest Group
• PXI-5 PXI Express Hardware Specification, Revision 2.0, PXI Systems Alliance
© National Instruments | 3
1
Getting Started
This chapter describes the key features of the PXIe-1066DC chassis and lists the kit contents and
optional equipment you can order from National Instruments.
Unpacking
Carefully inspect the shipping container and the chassis for damage. Check for visible damage
to the metal work. Check to make sure all handles, hardware, and switches are undamaged.
Inspect the inner chassis for any possible damage, debris, or detached components. If damage
appears to have been caused during shipment, file a claim with the carrier. Retain the packing
material for possible inspection and/or reshipment.
What You Need to Get Started
The PXIe-1066DC chassis kit contains the following items:
PXIe-1066DC chassis
Filler panels
DC power cable
PXIe-1066DC User Manual
Software media with PXI Platform Services 2.0 or higher
Read Me First: Safety and Electromagnetic Compatibility
Chassis number labels
Inhibit fault cable connector
Ferrite bead for use with redundant power supplies
Key Features
The PXIe-1066DC chassis combines a high-performance 18-slot PXI Express backplane with a
high-output power supply and a structural design that has been optimized for maximum usability
in a wide range of applications. The chassis’ modular design ensures a high level of
maintainability, resulting in a very low mean time to repair (MTTR). The chassis also features
© National Instruments | 1-1
Chapter 1 Getting Started
redundant power supplies and fans designed to maximize system availability. The
PXIe-1066DC chassis fully complies with the PXI-5 PXI Express Hardware Specification,
offering advanced timing and synchronization features.
The key features of the PXIe-1066DC chassis include the following:
High Performance for Instrumentation Requirements
• Up to 1 GB/s (single direction) per PXI Express slot dedicated bandwidth (x4 PCIe)
• 38 W per slot cooling meets increased PXI Express cooling requirements
• Low-jitter internal 10 MHz reference clock for PXI slots with ± 25 ppm stability
• Low-jitter internal 100 MHz reference clock for PXI Express slots with ± 25 ppm stability
• Quiet operation for 0 to 30 °C at 49.8 dBA
• Variable speed fan controller optimizes cooling and acoustic emissions
• Remote power-inhibit control
• Complies with PXI and CompactPCI Specifications
High Reliability
• 0 to 50 °C operating temperature range
• Power supply, temperature, and fan monitoring
• HALT tested for increased reliability
• Ethernet interface for remote monitoring
High Availability
• Dual redundant, hot-swappable power supplies
• Redundant, hot-swappable chassis fans
Multi-Chassis Support
• PXI Express System Timing Slot for tight synchronization across chassis
• Front CLK10 I/O connectors
• Switchless CLK10 routing
Optional Features
• Front and rear rack-mount kits
• Replacement power supply
• EMC filler panels
• Slot blockers for improved cooling performance
• Factory installation services
1-2 | ni.com
PXIe-1066DC User Manual
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Chassis Description
Figures 1-1 and 1-2 show the key features of the PXIe-1066DC chassis front and back panels.
Figure 1-1 shows the front view of the PXIe-1066DC. Figure 1-2 shows the rear view of the
PXIe-1066DC.
Figure 1-1. Front View of the PXIe-1066DC Chassis (with Optional Filler Panels)
1 Power Inhibit Switch
2LEDs
3 Inhibit/Fault Connector
4 Backplane Connectors
5 Clk10 Input
6 Clk10 Output
7 Earth (Ground) Termina
8 PXI Filler Panels (Optional)
9 Removable Feet
10 Fan Door Latch
11 PXI Peripheral Slots (9x)
12 PXI Express System Timing Slot
13 PXI Express Hybrid Peripheral
Slots (4x)
14 PXI Express Peripheral
Slots (3x)
15 PXI Express System
Controller Slot
16 DC Power Connector
17 Ethernet Port
18 Chassis Carry Handle
19 System Controller Expansion
Slots
© National Instruments | 1-3
Chapter 1 Getting Started
2
2
1
1
3
1
1
5
4
Figure 1-2. Rear View of the PXIe-1066DC Chassis
1 Power Supply Cooling Fan
2 Power Supply Handle
3 Chassis Ground Screw
4 Inhibit Mode Selector Switch
5 Fan Speed Selector Switch
Optional Equipment
Contact National Instruments to order the following options for the PXIe-1066DC chassis.
EMC Filler Panels
Optional EMC filler panel kits are available from National Instruments.
Rack Mount Kit
There are two optional kits for mounting the PXIe-1066DC chassis into a rack. The first option
is a pair of mounting brackets for use on the front of the chassis. The second option is a rear rack
mount kit. The rear rack mount kit differs from the front kit to allow for easier installation into
the rack. For more information, refer to Figure A-3, NI Chassis Rack Mount Kit Components.
Slot Blockers
Optional slot blocker kits are available from National Instruments for improved thermal
performance when all slots are not used.
1-4 | ni.com
PXIe-1066DC User Manual
PXIe-1066DC Chassis Backplane Overview
This section provides an overview of the backplane features for the PXIe-1066DC chassis.
Interoperability with CompactPCI
The design of the PXIe-1066DC provides you the flexibility to use the following devices in a
single PXI Express chassis:
• PXI Express compatible products
• CompactPCI Express compatible 4-Link system controller products
• CompactPCI Express compatible Type-2 peripheral products
• PXI peripheral products
• Standard CompactPCI peripheral products
System Controller Slot
The system controller slot is Slot 1 of the chassis and is a 4-Link configuration system slot as
defined by the CompactPCI Express and PXI Express specifications. It has three system
controller expansion slots for system controller modules that are wider than one slot. These slots
allow the system controller to expand to the left to prevent the system controller from using
peripheral slots.
The backplane routes a x4 PCI Express link from the system controller slot to slots 7 and 8, and
a x1 PCI Express link to a PCI Express to PCI Translation Bridge on the backplane. The
PCI Express to PCI Translation Bridge on the backplane provides a 32-bit/33MHz PCI bus to
slots 2 to 7.
The second PCI Translation Bridge provides PCI bus to slots 11, 12, 13, 15, 16, 17, and 18 (not
to slot 14).
A x4 link goes to the PXI Express switch and the PCI Express connectivity of slots 9 to 14 is
connected through the switch.
The system controller slot also has connectivity to some PXI features such as: PXI_CLK10,
PXI Star, PXI Trigger Bus and PXI Local Bus 6.
By default, the system controller will control the power supply with the PS_ON# signal. A logic
low on this line will turn the power supply on.
Note The Inhibit Mode switch on the rear of the chassis must be in the Default
position for the system controller to have control of the power supply. Refer to the
Inhibit Mode Switch section of Chapter 2, Installation and Configuration, for details
about the Inhibit Mode switch.
© National Instruments | 1-5
Chapter 1 Getting Started
Hybrid Peripheral Slots
The chassis provides four hybrid peripheral slots as defined by the PXI-5 PXI Express Hardware
Specification: slot 7 and slots 11 to 13. A hybrid peripheral slot can accept the following
peripheral modules:
• A PXI Express Peripheral with x4 or x1 PCI Express link to the system slot or through a
switch to the system slot.
• A CompactPCI Express Type-2 Peripheral with x4 or x1 PCI Express link to the system slot
or through a switch to the system slot.
• A hybrid-compatible PXI Peripheral module that has been modified by replacing the J2
connector with an XJ4 connector installed in the upper eight rows of J2. Refer to the
PXI Express Specification for details. The PXI Peripheral communicates through the
backplane’s 32-bit PCI bus.
• A CompactPCI 32-bit peripheral on the backplane’s 32-bit PCI bus.
The hybrid peripheral slots provide full PXI Express functionality and 32-bit PXI functionality except
for PXI Local Bus. The hybrid peripheral slot only connects to PXI Local Bus 6 left and right.
PXI Peripheral Slots
There are nine PXI peripheral slots which will accept PXI or CompactPCI peripherals: slots 2 to
6 and slots 15 to 18. These slots are on the backplane’s 32-bit PCI busses. These slots offer full
PXI functionality, but have no PXI Express features. The 64-bit PCI signals on the P2
connectors are not connected.
PXI Express Peripheral Slots
There are three PXI Express peripheral slots: slots 8 to 10. Slot 8 is directly connected to the
system slot with a x4 PCI Express link. Slots 9 and 10 are connected to the system slot through
a PCI Express switch. PXI Express peripheral slots can accept the following modules:
• A PXI Express Peripheral with x4 or x1 PCI Express link to the system slot or through a
switch to the system slot.
• A CompactPCI Express Type-2 Peripheral with x4 or x1 PCI Express link to the system slot
or through a switch to the system slot.
System Timing Slot
The System Timing Slot is slot 14. The system timing slot will accept the following peripheral
modules:
• A PXI Express System Timing Module with x4 or x1 PCI Express link to the system slot
through a PCIe switch.
• A PXI Express Peripheral with x4 or x1 PCI Express link to the system slot through a PCIe
switch.
• A CompactPCI Express Type-2 Peripheral with x4 or x1 PCI Express link to the system slot
through a PCIe switch.
1-6 | ni.com
P2
P1
XP4
XP3
TP2
TP1
P2
P1
P2
P1
P2
P1
P1
P1
P1
XP4
XP3
XP4
XP3
XP4
XP3
XP4
XP3
XP4
XP3
XP4
XP3
XP4
XP3
P2
P1
P2
P1
P2
P1
P2
P1
P2
P1
P1
XP4
XP3
XP2
XP1
PXIe_DSTAR 11
PXIe_DSTAR 8
PXIe_DSTAR 6
PXIe_DSTAR 5
PXIe_DSTAR 3
PXIe_DSTAR 2
PXIe_DSTAR 1
PXIe_DSTAR 1
PXIe_DSTAR 4
PXI STAR 3
PXI STAR 1
PXI STAR 2 PXI STAR 9
PXI STAR 7
PXI STAR 6
PXI STAR 5
PXI STAR 4
PXI STAR 8
PXI STAR 11
PXI DSTAR 10
PXI STAR 13
PXI STAR 12
PXI STAR 15
PXI STAR 14
PXI STAR 16
PXI STAR 0
1
8
9
10
7
H
11
HH12H
13
14 15
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3
2
16 17 18
PXIe-1066DC User Manual
The system timing slot has 3 dedicated differential pairs (PXIe_DSTAR) connected from the
TP1 and TP2 connectors to the XP3 connector for each PXI Express peripheral or hybrid
peripheral slot, as well as routed back to the XP3 connector of the system timing slot as shown
in Figure 1-3. The PXIe_DSTAR pairs can be used for high-speed triggering, synchronization
and clocking. Refer to the PXI Express Specification for details.
The system timing slot also has a single-ended (PXI Star) trigger connected to every slot. Refer
to Figure 1-3 for details.
The system timing slot has a pin (PXI_CLK10_IN) through which a system timing module may
source a 10MHz clock to which the backplane will phase-lock. Refer to the System Reference
Clock section for details.
The system timing slot has a pin (PXIe_SYNC_CTRL) through which a system timing module
can control the PXIe_SYNC100 timing. Refer to the PXI Express Specification and the
PXIe_SYNC_CTRL section of this chapter for details.
Figure 1-3. PXIe_DSTAR and PXI Star Connectivity Diagram
© National Instruments | 1-7
Chapter 1 Getting Started
P2
P1
XP4
XP3
TP2
TP1
P2
P1
P2
P1
P2
P1
P1
P1
P1
XP4
XP3
XP4
XP3
XP4
XP3
XP4
XP3
XP4
XP3
XP4
XP3
XP4
XP3
P2
P1
P2
P1
P2
P1
P2
P1
P2
P1
P1
XP4
XP3
XP2
XP1
PXI_LB6
PXI_LB6
PXI_LB6
PXI_LB6
PXI_LB6
PXI_LB6
PXI_LB6
PXI_LB6
PXI_LB6
PXI_LB6
PXI_LB (12:0)
PXI_LB (12:0)
PXI_LB (12:0)
PXI_LB (12:0)
PXI_LB (12:0)
PXI_LB (12:0)
PXI_LB (12:0)
PXI
Trigger Bus
Buffer Bridge
PXI
Trigger Bus
Buffer Bridge
PXI Trigger Bus Segment 1
PXI Trigger Bus Segment 2
PXI Trigger Bus Segment 3
1
8
9
10
7
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HH12H
13
14 15
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2
16 17 18
PXI Local Bus
The PXI backplane local bus is a daisy-chained bus that connects each peripheral slot with
adjacent peripheral slots to the left and right, as shown in Figure 1-4.
The backplane routes the full 13-line PXI Local Bus between adjacent PXI slots (slots 2 to 6 and
15 to 18) and PXI Local Bus 6 between all other slots. Refer to Figure 1-4 for details. The left
local bus 6 from slot 1 is not routed anywhere and the right local bus signals from slot 18 are not
routed anywhere.
Local bus signals may range from high-speed TTL signals to analog signals as high as 42 V.
Initialization software uses the configuration information specific to each adjacent peripheral
module to evaluate local bus compatibility.
Figure 1-4. PXI Trigger Bus and Local Bus Connectivity Diagram
1-8 | ni.com
PXIe-1066DC User Manual
PXI Trigger Bus
All slots on the same PXI bus segment share eight PXI trigger lines. You can use these trigger
lines in a variety of ways. For example, you can use triggers to synchronize the operation of
several different PXI peripheral modules. In other applications, one module located in the
system timing slot can control carefully timed sequences of operations performed on other
modules in the system. Modules can pass triggers to one another, allowing precisely timed
responses to asynchronous external events the system is monitoring or controlling.
The PXI trigger lines from adjacent PXI trigger bus segments can be routed in either direction
across the PXI trigger bridges through buffers. This allows you to send trigger signals to, and
receive trigger signals from, every slot in the chassis. Static trigger routing (user-specified line
and directional assignments) can be configured through Measurement & Automation Explorer
(MAX). Dynamic routing of triggers (automatic line assignments) is supported through certain
National Instruments drivers like NI-DAQmx.
Note Although any trigger line may be routed in either direction, it cannot be
routed in more than one direction at a time.
System Reference Clock
The PXIe-1066DC chassis supplies the PXI 10 MHz system clock signal (PXI_CLK10)
independently driven to each peripheral slot and PXIe_CLK100 and PXIe_SYNC100 to the
PXI Express slots, hybrid slots, and system timing slot.
An independent buffer (having a source impedance matched to the backplane and a skew of less
than 1 ns between slots) drives PXI_CLK10 to each peripheral slot. Refer to Figure 1-5 for the
routing configuration of PXI_CLK10. You can use this common reference clock signal to
synchronize multiple modules in a measurement or control system.
An independent buffer drives PXIe_CLK100 to the PXI Express peripheral slots, hybrid
peripheral slots, and system timing slot. Refer to Figure 1-5 for the routing configuration of
PXIe_CLK100. These clocks are matched in skew to less than 100 ps. The differential pair must
be terminated on the peripheral with LVPECL termination for the buffer to drive PXIe_CLK100
so that when there is no peripheral or a peripheral that does not connect to PXIe_CLK100, there
is no clock being driven on the pair to that slot.
© National Instruments | 1-9
Chapter 1 Getting Started
PXIe_CLK100
PXI_CLK10
PXIe_SYNC100
0123 45678 90123 45678 90123 45678 9
An independent buffer drives PXIe_SYNC100 to the PXI Express peripheral slots, hybrid
peripheral slots, and system timing slot. Refer to Figure 1-5 for the routing configuration of
PXIe_SYNC100. The differential pair must be terminated on the peripheral with LVPECL
termination for the buffer to drive PXIe_SYNC100 so that when there is no peripheral or a
peripheral that does not connect to PXIe_SYNC100, there is no SYNC100 signal being driven
on the pair to that slot.
Figure 1-5. Distribution of PXI_CLK10, PXIe_CLK100, and PXIe_SYNC100
PXIe_CLK100
PXIe_SYNC100
10 MHz
REF IN
REF OUT
PXI_CLK10
10 MHz
PXI_CLK10_IN
1
PXI_CLK10, PXIe_CLK100 and PXIe_SYNC100 have the default timing relationship
described in Figure 1-6.
1-10 | ni.com
XP4
XP4
XP3
XP2
XP1
XP4
XP4
XP3
P2
P2
P2
P2
P2
P1
P1
P1
P1
P1
2
3
4
65
XP3
8
P1
H
7
XP4
XP3
XP3
10
9
Figure 1-6. System Reference Clock Default Behavior
XP4
XP4
XP3
XP3
P1
P1
HH12H
11
XP4
XP4
XP3
XP3
TP2
TP1
P1
13
14 15
P2
P2
P1
P1
16 17 18
P2
P2
P1
P1
PXIe-1066DC User Manual
To synchronize the system to an external clock, you can drive PXI_CLK10 from an external
source through the PXI_CLK10_IN pin on the System Timing Slot. Refer to Table B-8, XP4
Connector Pinout for the System Timing Slot, for the pinout. When a 10 MHz clock is detected
on this pin, the backplane automatically phase-locks the PXI_CLK10, PXIe_CLK100, and
PXIe_SYNC100 signals to this external clock and distributes these signals to the slots (refer to
Figure 1-5 for the distribution of PXI_CLK10, PXIe_CLK100 and PXIe_SYNC100). Refer to
Appendix A, Specifications, for the specification information for an external clock provided on
the PXI_CLK10_IN pin of the system timing slot.
You also can drive a 10 MHz clock on the 10 MHz REF IN connector on the front of the chassis.
When a 10 MHz clock is detected on this connector, the backplane automatically phase-locks
the PXI_CLK10, PXIe_CLK100, and PXIe_SYNC100 signals to this external clock and
distributes these signals to the slots (refer to Figure 1-5 for the distribution of PXI_CLK10,
PXIe_CLK100 and PXIe_SYNC100). Refer to Appendix A, Specifications, for the specification
information for an external clock provided on the 10 MHz REF IN connector on the rear panel
of the chassis.
If the 10 MHz clock is present on both the PXI_CLK10_IN pin of the System Timing Slot and
the 10 MHz REF IN connector on the front of the chassis, the signal on the System Timing Slot
is selected. Refer to Table 1-1 which explains how the 10 MHz clocks are selected by the
backplane.
Table 1-1. Backplane External Clock Input Truth Table
System Timing Slot
PXI_CLK10_IN
Front Chassis Panel
10 MHz REF IN
Backplane PXI_CLK10,
PXIe_CLK100 and PXIe_SYNC100
No clock present No clock present Backplane generates its own clocks
No clock present 10 MHz clock present PXI_CLK10, PXIe_CLK100 and
PXIe_SYNC100 all phase-locked to
Rear Chassis Panel—10 MHz REF IN
10 MHz clock present No clock present PXI_CLK10, PXIe_CLK100 and
PXIe_SYNC100 all phase-locked to
System Timing Slot—PXI_CLK10_IN
10 MHz clock present 10 MHz clock present PXI_CLK10, PXIe_CLK100 and
PXIe_SYNC100 all phase-locked to
System Timing Slot—PXI_CLK10_IN
A copy of the backplane’s PXI_CLK10 is exported to the 10 MHz REF OUT connector on the
front of the chassis. This clock is driven by an independent buffer. Refer to Appendix A,
Specifications, for the specification information for the 10 MHz REF OUT signal on the front
panel of the chassis.
© National Instruments | 1-11
Chapter 1 Getting Started
PXIe_SYNC_CTRL
PXIe_SYNC100 is by default a 10 ns pulse synchronous to PXI_CLK10. The frequency
of PXIe_SYNC100 is 10/n MHz, where n is a positive integer. The default for n is 1, giving
PXIe_SYNC100 a 100 ns period. However, the backplane allows n to be programmed to other
integers. For instance, setting n = 3 gives a PXIe_SYNC100 with a 300 ns period while still
maintaining its phase relationship to PXI_CLK10. The value for n may be set to any positive
integer from 1 to 255.
The system timing slot has a control pin for PXIe_SYNC100 called PXIe_SYNC_CTRL for use
when n > 1. Refer to Table B-7, XP3 Connector Pinout for the System Timing Slot, for system
timing slot pinout. Refer to Appendix A, Specifications, for the PXIe_SYNC_CTRL input
specifications.
By default, a high-level detected by the backplane on the PXIe_SYNC_CTRL pin causes
a synchronous restart for the PXIe_SYNC100 signal. On the next PXI_CLK10 edge
the PXIe_SYNC100 signal will restart. This will allow several chassis to have their
PXIe_SYNC100 in phase with each other. Refer to Figure 1-7 for timing details with this
method.
Figure 1-7. PXIe_SYNC100 at 3.33 MHz Using PXIe_SYNC_CTRL as Restart
PXI_CLK10
PXIe_SYNC_CTRL
PXIe_SYNC100
SYNC100 Divider
Restarted Here
1-12 | ni.com
2
Installation and Configuration
This chapter describes how to prepare and operate the PXIe-1066DC chassis.
Before connecting the chassis to a power source, read this chapter and the Read Me First: Safety
and Electromagnetic Compatibility document included with your kit.
Safety Information
Caution Before undertaking any troubleshooting, maintenance, or exploratory
procedure, carefully read the following caution notices.
Protection equipment may be impaired if equipment is not used in the manner
specified.
This equipment contains voltage hazardous to human life and safety, and is capable of inflicting
personal injury.
• Chassis Grounding—The chassis requires a connection from the premise wire safety
ground to the chassis ground. The earth safety ground must be connected during use of this
equipment to minimize shock hazards. Refer to the Connecting to Safety Ground and
Power Source section for instructions on connecting safety ground.
• Live Circuits—Operating personnel and service personnel must not remove protective
covers when operating or servicing the chassis. Adjustments and service to internal
components must be undertaken by qualified service technicians. During service of this
product, the mains connector to the premise wiring must be disconnected. Dangerous
voltages may be present under certain conditions; use extreme caution.
• Explosive Atmosphere—Do not operate the chassis in conditions where flammable gases
are present. Under such conditions, this equipment is unsafe and may ignite the gases or gas
fumes.
• Part Replacement—Only service this equipment with parts that are exact replacements,
both electrically and mechanically. Contact National Instruments for replacement part
information. Installation of parts with those that are not direct replacements may cause
harm to personnel operating the chassis. Furthermore, damage or fire may occur if
replacement parts are unsuitable.
• Modification—Do not modify any part of the chassis from its original condition.
Unsuitable modifications may result in safety hazards.
© National Instruments | 2-1
Chapter 2 Installation and Configuration
Chassis Cooling Considerations
The PXIe-1066DC chassis is designed to operate on a bench or in an instrument rack. Regardless
of the configuration you must provide the cooling clearances as outlined in the following
sections.
Providing Adequate Clearance
Apertures in the top, bottom, and rear of the chassis facilitate power supply and module cooling.
Air for module cooling enters through a fan intake in the bottom of the chassis and exits through
the top of the chassis. Air for cooling the power supplies enters through the rear of the chassis
and exits through the top of the chassis. Adequate clearance between the chassis and surrounding
equipment or blockages must be maintained to ensure proper cooling of the chassis power
supply as well as the modules plugged into the chassis. These clearances are outlined in
Figure 2-1. The vent locations for the PXIe-1066DC chassis are shown in Figure 2-2. Failure to
provide these clearances may result in thermal-related failures in the chassis or modules.
2-2 | ni.com
Figure 2-1. PXIe-1066DC Cooling Clearances
Dimensions are in inches (millimeters)
PXIe-1066DC User Manual
1.75
(44.5)
1.75
(44.5)
3.0
(76.2)
© National Instruments | 2-3
Chapter 2 Installation and Configuration
3
2
1
4
Figure 2-2. PXIe-1066DC Vents
1 Ambient Temperature Sensor
2 Air Intake Vents
3 Air Exhaust Vent
4Airflow
Chassis Ambient Temperature Definition
The chassis fan control system uses the intake air temperature as the input for controlling fan
speeds when in Auto Fan Speed mode. Because of this, the chassis ambient temperature is
defined as the temperature of the air just outside of the fan intake vents on the bottom of the
chassis. Note that this temperature may be higher than ambient room temperature depending
on the surrounding equipment and/or blockages present. It is the user’s responsibility to ensure
2-4 | ni.com
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