National Instruments PCI-6221 User Manual

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Contents

Chapter 1
Getting Started

Safety Guidelines.............................................................................................................. 1-1

Safety Guidelines for Hazardous Voltages...............................................................1-2

Electromagnetic Compatibility Guidelines ......................................................................1-2

Hardware Symbol Definitions.................. ................................................. .......................1-3

Installation ........................................................................................................................ 1-3

Unpacking.........................................................................................................................1-3

Device Self-Calibration ....................................................................................................1-4

Getting Started with M Series PCI Express Devices and the Disk Drive Power

Connector ...................................................................................................................... 1-5

When to Use the Disk Drive Power Connector........................................................1-5

Disk Drive Power Connector Installation................................................................. 1-5

Getting Started with M Series USB Devices.................................................................... 1-6

Applying the Signal Label to USB Screw Terminal Devices ..................................1-6

USB Device Chassis Ground.................................................................................... 1-6

USB Device Panel/Wall Mounting........................................................................... 1-8

USB Device LEDs........................................................................................ ............1-8

USB Cable Strain Relief...........................................................................................1-8

USB Device Fuse Replacement ................................................................................ 1-9

USB Device Security Cable Slot..............................................................................1-12

Installing a Ferrite.....................................................................................................1-13

Pinouts .............................................................................................................................. 1-13

Specifications....................................................................................................................1-13

Accessories and Cables ....................... ............................................................................. 1-13

Chapter 2
DAQ System Overview

DAQ Hardware............................................. ............................................... .....................2-1

DAQ-STC2 and DAQ-6202.....................................................................................2-2

Calibration Circuitry.................................................................................................2-2

Cables and Accessories .................................................................................................... 2-3

68-Pin M Series Cables and Accessories ................................................................. 2-3

68-Pin Cables........ .............................................. .............................................. 2-5

68-Pin BNC Accessories ... ................................................. .............................. 2-6

68-Pin Screw Terminal Accessories................................................................. 2-6

RTSI Cables....... ............................................... ................................................ 2-6

SCC Carriers and Accessories.......................................................................... 2-6

SCXI.................................................................................................................2-7

68-Pin Custom Cabling and Connectivity........................................................ 2-7

USB Device Accessories, USB Cable, and Power Supply...............................2-8

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Contents

37-Pin M Series Cables and Accessories.......................................... ........................2-8

37-Pin Cables................................ ............................................... .....................2-9

37-Pin Screw Terminal Accessories .................................................... .............2-9

RTSI Cables.............................................................................. ........................2-9

37-Pin Custom Cabling.................................................... .................................2-9

Signal Conditioning..........................................................................................................2-10

Sensors and Transducers...........................................................................................2-10

Signal Conditioning Options ....................................................................................2-10

SCXI .................................................................................................................2-10

SCC...................................................................................................................2-11

Programming Devices in Software...................................................................................2-11

Chapter 3
Connector and LED Information

I/O Connector Signal Descriptions...................................................................................3-1

+5 V Power Source...........................................................................................................3-5

USER 1 and USER 2 ........................................................................................................3-5

RTSI Connector Pinout.....................................................................................................3-7

LED Patterns.....................................................................................................................3-7

Chapter 4
Analog Input

Analog Input Range..........................................................................................................4-2

Analog Input Lowpass Filter ............................................................................................4-3

Analog Input Ground-Reference Settings.........................................................................4-4

Configuring AI Ground-Reference Settings in Software .........................................4-6

Multichannel Scanning Considerations ............................................................................4-6

Analog Input Data Acquisition Methods..........................................................................4-9

Software-Timed Acquisitions ...................................................................................4-9

Hardware-Timed Acquisitions............................................. .....................................4-9

Analog Input Triggering...................................................................................................4-10

Connecting Analog Input Signals.....................................................................................4-11

Connecting Floating Signal Sources.................................................................................4-12

What Are Floating Signal Sources?..................................... .....................................4-12

When to Use Differential Connections with Floating Signal Sources......................4-12

When to Use Non-Referenced Single-Ended (NRSE) Connections with

Floating Signal Sources................ .........................................................................4-12

When to Use Referenced Single-Ended (RSE) Connections with Floating

Signal Sources .......................................................................................................4-13

Using Differential Connections for Floating Signal Sources...................................4-13

Using Non-Referenced Single-Ended (NRSE) Connections for

Floating Signal Sources................ .........................................................................4-16

Using Referenced Single-Ended (RSE) Connections for Floating

Signal Sources .......................................................................................................4-17

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M Series User Manual

Connecting Ground-Referenced Signal Sources..............................................................4-17

What Are Ground-Referenced Signal Sources? ....................................................... 4-17

When to Use Differential Connections with Ground-Referenced Signal

Sources .................................................................................................................. 4-18

When to Use Non-Referenced Single-Ended (NRSE) Connections with

Ground-Referenced Signal Sources ......................................................................4-18

When to Use Referenced Single-Ended (RSE) Connections with

Ground-Referenced Signal Sources ......................................................................4-19

Using Differential Connections for Ground-Referenced Signal Sources.................4-19

Using Non-Referenced Single-Ended (NRSE) Connections for

Ground-Referenced Signal Sources ......................................................................4-20

Field Wiring Considerations............................................................................................. 4-21

Analog Input Timing Signals ........................................................................................... 4-21

AI Sample Clock Signal ...........................................................................................4-23

Using an Internal Source ..................................................................................4-24

Using an External Source ................................................................................. 4-24

Routing AI Sample Clock Signal to an Output Terminal................................. 4-24

Other Timing Requirements ............................................................................. 4-24

AI Sample Clock Timebase Signal........................................................................... 4-25

AI Convert Clock Signal ..........................................................................................4-25

Using an Internal Source ..................................................................................4-26

Using an External Source ................................................................................. 4-26

Routing AI Convert Clock Signal to an Output Terminal................................4-26

Using a Delay from Sample Clock to Convert Clock ......................................4-27

Other Timing Requirements ............................................................................. 4-27

AI Convert Clock Timebase Signal..........................................................................4-29

AI Hold Complete Event Signal...............................................................................4-29

AI Start Trigger Signal .............................................................................................4-29

Using a Digital Source...................................................................................... 4-29

Using an Analog Source...................................................................................4-30

Routing AI Start Trigger to an Output Terminal..............................................4-30

AI Reference Trigger Signal............... ................................................. .....................4-30

Using a Digital Source...................................................................................... 4-31

Using an Analog Source...................................................................................4-31

Routing AI Reference Trigger Signal to an Output Terminal.......................... 4-31

AI Pause Trigger Signal ...........................................................................................4-31

Using a Digital Source...................................................................................... 4-32

Using an Analog Source...................................................................................4-32

Routing AI Pause Trigger Signal to an Output Terminal.................................4-32

Getting Started with AI Applications in Software........ ................................................... . 4-32

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Contents

Chapter 5
Analog Output

AO Offset and AO Reference Selection ...........................................................................5-2

Minimizing Glitches on the Output Signal......... ................................................. ... ..........5-3

Analog Output Data Generation Methods ........................................................................5-3

Software-Timed Generations....................................................................................5-3

Hardware-Timed Generations........ ................................................. ..........................5-4

Analog Output Triggering ................................................................................................5-5

Connecting Analog Output Signals ..................................................................................5-5

Analog Output Timing Signals.........................................................................................5-6

AO Start Trigger Signal.......................... ..................................................................5-6

Using a Digital Source......................................................................................5-6

Using an Analog Source ...................................................................................5-7

Routing AO Start Trigger Signal to an Output Terminal.................................5-7

AO Pause Trigger Signal ..........................................................................................5-7

Using a Digital Source......................................................................................5-8

Using an Analog Source ...................................................................................5-8

Routing AO Pause Trigger Signal to an Output Terminal................................5-8

AO Sample Clock Signal.......................... ................................................................5-8

Using an Internal Source...................................................................................5-8

Using an External Source .................................................................................5-8

Routing AO Sample Clock Signal to an Output Terminal...............................5-9

Other Timing Requirements .............................................................................5-9

AO Sample Clock Timebase Signal .........................................................................5-9

Getting Started with AO Applications in Software..........................................................5-10

Chapter 6
Digital I/O

Static DIO .........................................................................................................................6-2

Digital Waveform Triggering ...........................................................................................6-2

Digital Waveform Acquisition..........................................................................................6-3

DI Sample Clock Signal ...........................................................................................6-3

Using an Internal Source...................................................................................6-3

Using an External Source .................................................................................6-4

Routing DI Sample Clock to an Output Terminal............................................6-4

Digital Waveform Generation ..........................................................................................6-4

DO Sample Clock Signal.......................... ................................................................6-4

Using an Internal Source...................................................................................6-5

Using an External Source .................................................................................6-5

Routing DO Sample Clock to an Output Terminal............... .. ..........................6-5

I/O Protection................................................ ............................................... .. ...................6-5

Programmable Power-Up States.......................................................................................6-6

DI Change Detection ........................................................................................................6-7

DI Change Detection Applications...........................................................................6-8

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M Series User Manual

Connecting Digital I/O Signals............................................. ............................................ 6-8

Getting Started with DIO Applications in Software............................................. .. ..........6-9

Chapter 7
Counters

Counter Input Applications ................... ............................................... ............................ 7-1

Counting Edges........................................................................................................ . 7-2

Single Point (On-Demand) Edge Counting...................................................... 7-2

Buffered (Sample Clock) Edge Counting.........................................................7-3

Controlling the Direction of Counting.............................................................. 7-3

Pulse-Width Measurement .......................................................................................7-3

Single Pulse-Width Measurement .................................................................... 7-4

Buffered Pulse-Width Measurement ...................................... ..........................7-4

Period Measurement................................................................................................. 7-5

Single Period Measurement.............................................................................. 7-5

Buffered Period Measurement.......................................................................... 7-6

Semi-Period Measurement .......................................................................................7-7

Single Semi-Period Measurement .................................................................... 7-7

Buffered Semi-Period Measurement ................................................................7-7

Frequency Measurement............................................................. .............................. 7-8

Low Frequency with One Counter...................................................................7-8

Low Frequency with One Counter (Averaged)................................................7-9

High Frequency with Two Counters ................................................................7-9

Large Range of Frequencies with Two Counters............................................. 7-10

Choosing a Method for Measuring Frequency.................................................7-11

Position Measurement ..............................................................................................7-14

Measurements Using Quadrature Encoders ..................................................... 7-15

Measurements Using Two Pulse Encoders ...................................................... 7-16

Buffered (Sample Clock) Position Measurement........................ .. ...................7-17

Two-Signal Edge-Separation Measurement.......................... ................................... 7-17

Single Two-Signal Edge-Separation Measurement.......................................... 7-18

Buffered Two-Signal Edge-Separation Measurement......................................7-18

Counter Output Applications............................................................................. ...............7-19

Simple Pulse Generation ..........................................................................................7-19

Single Pulse Generation.................................................................................... 7-19

Single Pulse Generation with Start Trigger...................................................... 7-20

Retriggerable Single Pulse Generation............................................................. 7-20

Pulse Train Generation ............................................................................................. 7-21

Continuous Pulse Train Generation..................................................................7-21

Finite Pulse Train Generation........................................................................... 7-22

Frequency Generation........... .................................................................................... 7-22

Using the Frequency Generator........................................................................7-22

Frequency Division............... ................................................. ................................... 7-23

Pulse Generation for ETS.................................................................. .......................7-23

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Contents

Counter Timing Signals............................................................. .......................................7-24

Counter n Source Signal ...........................................................................................7-24

Routing a Signal to Counter n Source ..............................................................7-25

Routing Counter n Source to an Output Terminal............................................7-25

Counter n Gate Signal...............................................................................................7-25

Routing a Signal to Counter n Gate........................ ... .......................................7-26

Routing Counter n Gate to an Output Terminal ...............................................7-26

Counter n Aux Signal ...............................................................................................7-26

Routing a Signal to Counter n Aux...................................................................7 -26

Counter n A, Counter n B, and Counter n Z Signals................................................7-27

Routing Signals to A, B, and Z Counter Inputs................................................7-27

Routing Counter n Z Signal to an Output Terminal .........................................7-27

Counter n Up_Down Signal......................................................................................7-27

Counter n HW Arm Signal .......................................................................................7-27

Routing Signals to Counter n HW Arm Input ..................................................7-27

Counter n Internal Output and Counter n TC Signals ..............................................7-28

Routing Counter n Internal Output to an Output Terminal ..............................7-28

Frequency Output Signal .. .. ................................................. .. ...................................7-28

Routing Frequency Output to a Terminal.........................................................7-28

Default Counter/Timer Pinouts.........................................................................................7-28

Counter Triggering ....................... ............................................... .....................................7-29

Other Counter Features.....................................................................................................7-30

Cascading Counters ..................................................................................................7-30

Counter Filters ............................................................................ ..............................7-30

Prescaling..................................................................................................................7-32

Duplicate Count Prevention................................. ............................................... .. ....7-32

Example Application That Works Correctly (No Duplicate Counting)...........7-33

Example Application That Works Incorrectly (Duplicate Counting)...............7-33

Example Application That Prevents Duplicate Count......................................7-34

When To

Enabling Duplicate Count Prevention in NI-DAQmx......................................7-35

Synchronization Modes ............................................................................................7-35

80 MHz Source Mode.......................................................................................7-36

Other Internal Source Mode .............................................................................7-36

External Source Mode ............................. ................................................. ........7-36

Use Duplicate Count

Prevention.......................................................7-34

Chapter 8
PFI

Using PFI Terminals as Timing Input Signals..................................................................8-2

Exporting Timing Output Signals Using PFI Terminals..................................................8-2

Using PFI Terminals as Static Digital I/Os ......................................................................8-3

Connecting PFI Input Signals...................................................... .....................................8-3

PFI Filters ....................................................................... ..................................................8-4

I/O Protection................................................ ............................................... .. ...................8-5

Programmable Power-Up States.......................................................................................8-5

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M Series User Manual

Chapter 9
Digital Routing and Clock Generation

Clock Routing...................................................................................................................9-1

80 MHz Timebase .................................................................................................... 9-2

20 MHz Timebase .................................................................................................... 9-2

100 kHz Timebase......................... ........................................................................... 9-2

External Reference Clock.........................................................................................9-2

10 MHz Reference Clock ......................................................................................... 9-2

Synchronizing Multiple Devices ...................................................................................... 9-3

PXI/PXI Express Modules........................................................................................ 9-3

PCI/PCI Express Devices ......................................................................................... 9-3

USB Devices................. .............................................. .............................................. 9-3

Real-Time System Integration (RTSI) .................... .........................................................9-4

RTSI Connector Pinout ............................................................................................9-4

Using RTSI as Outputs.............................................................................................9-5

Using RTSI Terminals as Timing Input Signals ...................................................... 9-6

RTSI Filters ................................................................................ .............................. 9-6

PXI Clock and Trigger Signals ......................................................................................... 9-8

PXI_CLK10..............................................................................................................9-8

PXI Triggers ... ............................................... ...........................................................9-8

PXI_STAR Trigger................................................................................................... 9-8

PXI_STAR Filters ....................................................................................................9-8

Chapter 10
Bus Interface

Data Transfer Methods..................................................................................................... 10-1

PCI/PCI Express Device and PXI/PXI Express Module Data Transfer Methods.... 10-1

USB Device Data Transfer Methods............... .........................................................10-2

PXI Considerations.................................................................................... .......................10-3

PXI Clock and Trigger Signals ................................................................................. 10-3

PXI and PXI Express................................................................................................10-3

Using PXI with CompactPCI .................................................................... ...............10-4

Chapter 11
Triggering

Triggering with a Digital Source................ ................................................. .....................11-1

Triggering with an Analog Source ................................................................................... 11-2

APFI <0,1> Terminals..............................................................................................11-2

Analog Input Channels............................................................................................. 11-2

Analog Trigger Actions............................................................................................ 11-3

Routing Analog Comparison Event to an Output Terminal ..................................... 11-3

Analog Trigger Types.......................................................................................................11-3

Analog Trigger Accuracy .................................................................................................11-6

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Contents

Appendix A
Module/Device-Specific Information

NI 6220.............................................................................................................................A-2

NI 6221 (68-Pin)...............................................................................................................A-4

NI PCI-6221 (37-Pin) .......................................................................................................A-11

NI 6224.............................................................................................................................A-13

NI 6225.............................................................................................................................A-15

NI 6229.............................................................................................................................A-21

NI 6250.............................................................................................................................A-27

NI 6251.............................................................................................................................A-29

NI 6254.............................................................................................................................A-37

6255 .............................................................................................................................A-39

NI

NI 6259.............................................................................................................................A-45

NI 6280.............................................................................................................................A-53

NI 6281.............................................................................................................................A-55

NI 6284.............................................................................................................................A-61

NI 6289.............................................................................................................................A-63

Appendix B
Timing Diagrams

Appendix C
Troubleshooting

Appendix D
Upgrading from E Series to M Series

Appendix E
Where to Go from Here

Appendix F
NI Services

Index

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M Series User Manual

Figures

Figure A-1. PCI/PXI-6220 Pinout ............................................................................ A-2

Figure A-2. PCI/PXI-6221 Pinout ............................................................................ A-5

Figure A-3. USB-6221 Screw Terminal Pinout........................................................A-7

Figure A-4. USB-6221 BNC Top Panel and Pinout................................................. A-9

Figure A-5. PCI-6221 (37-Pin) Pinout...................................................................... A-11

Figure A-6. PCI/PXI-6224 Pinout ............................................................................ A-13

Figure A-7. PCI/PXI-6225 Pinout ............................................................................ A-15

Figure A-8. USB-6225 Screw Terminal Pinout........................................................A-17

Figure A-9. USB-6225 Mass Termination Pinout.................................................... A-19

Figure A-10. PCI/PXI-6229 Pinout ............................................................................ A-21

Figure A-11. USB-6229 Screw Terminal Pinout........................................................A-23

Figure A-12. USB-6229 BNC Top Panel and Pinout................................................. A-25

Figure A-13. PCI/PXI-6250 Pinout ............................................................................ A-27

Figure A-14. NI PCI/PCIe/PXI/PXIe-6251 Pinout..................................................... A-29

Figure A-15. USB-6251 Screw Terminal Pinout........................................................A-31

Figure A-16. USB-6251 BNC Top Panel and Pinout................................................. A-33

Figure A-17. USB-6251 Mass Termination Pinout.................................................... A-35

Figure A-18. PCI/PXI-6254 Pinout ............................................................................ A-37

Figure A-19. PCI/PXI-6255 Pinout ............................................................................ A-39

Figure A-20. USB-6255 Screw Terminal Pinout........................................................A-41

Figure A-21. USB-6255 Mass Termination Pinout.................................................... A-43

Figure A-22. NI PCI/PCIe/PXI/PXIe-6259 Pinout..................................................... A-45

Figure A-23. USB-6259 Screw Terminal Pinout........................................................A-47

Figure A-24. USB-6259 BNC Top Panel and Pinout................................................. A-49

t

Figure A-25. USB-6259 Mass Termination Pinou

Figure A-26. PCI/PXI-6280 Pinout ............................................................................ A-53

Figure A-27. PCI/PXI-6281 Pinout ............................................................................ A-55

Figure A-28. USB-6281 Screw Terminal Pinout........................................................A-57

Figure A-29. USB-6281 Mass Termination Pinout.................................................... A-59

Figure A-30. PCI/PXI-6284 Pinout ............................................................................ A-61

Figure A-31. PCI/PXI-6289 Pinout ............................................................................ A-63

Figure A-32. USB-6289 Screw Terminal Pinout........................................................A-65

Figure A-33. USB-6289 Mass Termination Pinout.................................................... A-67

.................................................... A-51

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1

Getting Started

The M Series User Manual contains information about using the National Instruments M Series
multifunction I/O data acquisition (DAQ) devices with NI-DAQmx 15.5 and later. M Series
devices feature up to 80 analog input (AI) channels, up to four analog output (AO) channels, up
to 48 lines of digital input/output (DIO), and two counters. This chapter provides basic
information you need to get started using your M Series device.

Safety Guidelines

Operate the NI 62xx M Series devices and modules only as described in this user manual.

Caution NI 62xx devices and modules are not certified for use in hazardous

locations.

Caution Never connect the +5 V power terminals to analog or digital ground or to

any other voltage source on the M Series device or any other device. Doing so can
damage the device and the computer. NI is not liable for damage resulting from such
a connection.

Caution The maximum input voltages rating of AI signals with respect to ground

(and for signal pairs in differential mode with respect to each other) are listed in the
specifications document for your device. Exceeding the maximum input voltage of
AI signals distorts the measurement results. Exceeding the maximum input voltage
rating also can damage the device and the computer . NI is not liable fo r any damage
resulting from such signal connections.

Caution Exceeding the maximum input voltage ratings, which are listed in the

specifications document for each M Series device, can damage the DAQ device and
the computer. NI is not liable for any damage resulting from such signal connections.

Caution Damage can result if these lines are dri ven by the sub-bus. NI is not liable

for any damage resulting from improper signal connections.

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Chapter 1 Getting Started

Safety Guidelines for Hazardous Voltages

If hazardous voltages are connected to the device/module, take the following precautions. A
hazardous voltage is a voltage greater than 42.4 V

Caution Ensure that hazardous voltage wiring is performed only by qualified

personnel adhering to local electrical standards.

Caution Do not mix hazardous voltage circuits and human-accessible circuits on

the same module.

Caution Make sure that chassis and circuits connected to the module are properly

insulated from human contact.

Caution NI 62xx devices and modules provide no isolation.

or 60 VDC to earth ground.

pk

Electromagnetic Compatibility Guidelines

This product was tested and complies with the regulatory requirements and limits for
electromagnetic compatibility (EMC) as stated in the product specifications. These requirements
and limits are designed to provide reasonable protection against harmful interference when the
product is operated in its intended operational electromagnetic environment.

This product is intended for use in industrial locations. There is no guarantee that harmful
interference will not occur in a particular installation, when the product is connected to a test
object, or if the product is used in residential areas. To minimize the potential for the product to
cause interference to radio and television reception or to experience unacceptable performance
degradation, install and use this product in strict accordance with the instructions in the product
documentation.

Furthermore, any changes or modifications to the product not expressly approved by National
Instruments could void your authority to operate it under your local regulatory rules.

Caution To ensure the specified EMC performance, product installation requires

either special considerations or user-installed, add-on devices. Refer to the product
installation instructions for further information.

Caution For compliance with Electromagnetic Comp ati b il ity (EMC)

requirements, this product must be operated with shielded cables and accessories. If
unshielded cables or accessories are used, the EMC specifications are no longer
guaranteed unless all unshielded cables and/or accessories are installe d in a shielde d
enclosure with properly designed and shielded input/output ports.

Caution This product may become more sensitive to electromagnetic disturbances

in the operational environment when test leads are attached or when connected to a
test object.

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M Series User Manual

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Ё೑ᅶ᠋

National Instruments

ヺড়Ё೑⬉ᄤֵᙃѻકЁ䰤ࠊՓ⫼ᶤѯ᳝ᆇ⠽䋼ᣛҸ

(RoHS)

DŽ݇Ѣ

National InstrumentsЁ೑RoHS

ড়㾘ᗻֵᙃˈ䇋ⱏᔩ

ni.com/

environment/rohs_china

DŽ

(For information about China RoHS compliance,

go to

ni.com/environment/rohs_china

.)

Hardware Symbol Definitions

The following symbols are marked on your device or module.

Caution When this symbol is marked on a product, refer to the Safety Guidelines

section for information about precautions to take.

EU Customers At the end of the product life cycle, all products must be sent to

a WEEE recycling center. For more information about WEEE recycling centers,
National Instruments WEEE initiatives, and compliance with WEEE Directive
2002/96/EC on Waste and Electronic Equipment, visit

weee.

ni.com/environment/

Installation

Before installing your multifunction I/O device, you must install the software you plan to use
with the device.

1. Installing application software—Refer to the installation instructions that accompany

your software.

2. Installing NI-DAQmx—The DAQ Getting Started Guide for PXI/PXI Express, DAQ

Getting Started Guide for PCI/PCI Express, or DAQ Getting Started Guide for Externally

Powered USB, packaged with your device or module, and also available on ni.com/

manuals, contain step-by-step instructions for installing software and hardware,

configuring channels and tasks, and getting started developing an application.

3. Installing the hardware—Unpack your M Series device as described in the Unpacking

section. Refer to the DAQ Getting Started Guide for PXI/PXI Express, DAQ Getting Started

Guide for PCI/PCI Express, or DAQ Getting Started Guide for Externally Powered USB

for information how to install your software and device or module. It also describes how to

confirm that your device or module is operating properly, configure your device or module,

run test panels, and take a measurement.

Unpacking

The M Series device ships in an antistatic package to prevent electrostatic discharge (ESD).
ESD can damage several components on the device.

Caution Never touch the exposed pins of connectors.

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© National Instruments | 1-3

Chapter 1 Getting Started

To avoid ESD damage in handling the device, take the following precautions:

• Ground yourself with a grounding strap or by touching a grounded object.

• T ouch the antistatic package to a metal part of your computer chassis before removing the
device from the package.

Remove the device from the package and inspect it for loose components or any other signs of
damage. Notify NI if the device appears damaged in any way. Do not install a damaged device
in your computer or chassis.

Store the device in the antistatic package when the device is not in use.

Device Self-Calibration

NI recommends that you self-calibrate your M Series device after installation and whenever the
ambient temperature changes. Self-calibration should be performed after the device has warmed
up for the recommended time period. Refer to the device specifications to find your device
warm-up time. This function measures the onboard reference voltage of the device and adjusts
the self-calibration constants to account for any errors caused by short-term fluctuations in the
environment. Disconnect all external signals when you self-calibrate a device.

Note (NI PCIe-6251/6259 Devices) Connecting or disconnecting the disk drive

power connector on M Series PCI Express devices can affect the analog performance
of your device. To compensate for this, NI recommends that you self-calibrate after
connecting or disconnecting the disk drive power connector, as described in the

Device Self-Calibration section.

You can initiate self-calibration using Measurement & Automation Explorer (MAX), by
completing the following steps.

1. Launch MAX.

2. Select My System»Devices and Interfaces»your device.

3. Initiate self-calibration using one of the following methods:

•Click Self-Calibrate in the upper right corner of MAX.

• Right-click the name of the device in the MAX configuration tree and select

Self-Calibrate from the drop-down menu.

Note You can also programmatically self-calibrate your device with NI-DAQmx,

as described in Device Calibration in the NI-DAQmx Help or the LabVIEW Help.

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M Series User Manual

1

2

Getting Started with M Series PCI Express
Devices and the Disk Drive Power Connector

(NI PCIe-6251/6259 Devices) The disk drive power connector is a four-pin hard drive

connector on PCI Express devices that, when connected, increases the current the device can
supply on the +5 V terminal.

When to Use the Disk Drive Power Connector

M Series PCI Express devices without the disk drive power connector installed perform
identically to other M Series devices for most applications and with most accessories. For most
applications, it is not necessary to install the disk drive power connector.

However, you should install the disk drive power connector in either of the following situations:

• You need more power than listed in the device specifications

• You are using an SCC accessory without an external power supply, such as the SC-2345

Refer to the specifications document for your device for more information about PCI Express
power requirements and power limits.

Disk Drive Power Connector Installation

Before installing the disk drive power connector, you must install and set up the M Series PCI
Express device as described in the DAQ Getting Started Guide for PCI/PCI Express. Complete
the following steps to install the disk drive power connector.

1. Power off and unplug the computer.

2. Remove the computer cover.

3. Attach the PC disk drive power connector to the disk drive power connector on the device,
as shown in Figure 1-1.

Note The power available on the disk drive power connectors in a computer can

vary. For example, consider using a disk driv e power connector that is not in the same
power chain as the hard drive.

Figure 1-1. Connecting to the Disk Drive Power Connector

1 Device Disk Drive Power Connector 2 PC Disk Drive Power Connector

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Chapter 1 Getting Started

4. Replace the computer cover, and plug in and power on the computer.

5. Self-calibrate the PCI Express DAQ device in MAX by following the instructions in the

Device Self-Calibration section.

Note Connecting or disconnecting the disk drive power connector can affect the

analog performance of your device. T o compensate for this, NI recommends that you
self-calibrate after connecting or disconnecting the disk drive power connector, as
described in the Device Self-Calibration section.

Getting Started with M Series USB Devices

The following sections contain information about M Series USB device features and best
practices.

Applying the Signal Label to USB Screw Terminal
Devices

(USB-622x/625x/628x Screw Terminal Devices) The supplied signal label can be adhered to

the inside cover of the USB-62xx Screw Terminal device with supplied velcro strips as shown
in Figure 1-2.

Figure 1-2. Applying the USB-62xx Screw Ter m inal Signal Label

USB Device Chassis Ground

(USB-622x/625x/628x Devices) For EMC compliance, the cha ssis of the USB M Series device

must be connected to earth ground through the chassis ground.

The wire should be A WG 16 or lar ger solid copper wire with a maximu m length of 1.5 m (5 ft).
Attach the wire to the earth ground of the facility’s power system. For more information about
earth ground connections, refer to the KnowledgeBase document, Earth Grounding for Test and
Measurement Devices, by going to

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ni.com/info and entering the Info Code earthground.

M Series User Manual

NI USB-62xx

Multifunction I/O with

Correlated Digital I/O for USB

ACTIVE
READY

ON OFF

NATIONAL
INSTRUMENTS

You can attach a wire to the ground lug screw of any USB-62xx device, as shown in Figure 1-3.

Figure 1-3. Grounding a USB-62xx Device through the Ground Lug Screw

(USB-6225/625x/628x Screw Terminal Devices) You can attach and solder a wire to the

chassis ground lug of certain USB-62xx Screw Terminal devices, as shown in Figure 1-4. The
wire should be as short as possible.

Figure 1-4. Grounding a USB-62xx Screw Terminal Device through the Chassis Ground

Lug

(USB-62xx BNC Devices) You can attach a wire to a CHS GND screw terminal of any

USB-62xx BNC device, as shown in Figure 1-5. Use as short a wire as possible. In addition, the
wires in the shielded cable that extend beyond the shield should be as short as possible.

Figure 1-5. Grounding a USB-62xx BNC Device through the CHS GND Screw Terminal

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Chapter 1 Getting Started

USB Device Panel/Wall Mounting

(USB-622x/625x/628x Devices) The Externally Powered USB M Series Panel Mounting Kit

(part number 780214-01, not included in your USB-62xx kit) is an accessory you can use to
mount the USB-62xx family of products to a panel or wall.

USB Device LEDs

(USB-622x/625x/628x Devices) Refer to the LED Patterns section of Chapter 3, Connector

and LED Information, for information about the M Series USB device LEDs.

USB Cable Strain Relief

(USB-622x/625x/628x Screw Terminal and USB-622x/625x/628x Mass Termination
Devices) Use the supplied strain relief hardware to provide strain relief for your USB cable.

Adhere the cable tie mount to the rear panel of the USB-62xx Screw Terminal or USB-62xx Mass
Termination device, as shown in Figure 1-6. Thread a zip tie through the cable tie mount and
tighten around the USB cable.

Figure 1-6. USB Cable Strain Relief on USB-62xx Screw Terminal and

USB-62xx Mass Termination Devices

(USB-622x/625x BNC Devices) Thread a zip tie through two of the strain relief holes on the

end cap to provide strain relief for your USB cable as shown in Figure 1-7. The strain relief holes
can also be used as cable management for signal wires to/from the screw terminals and BNC
connectors.

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Figure 1-7. USB Cable Strain Relief on USB-62xx BNC Devices

1 USB Cable Strain Relief
2 Security Cable Slot

M Series User Manual

3

1

2

3 Signal Wire Strain Relief

USB Device Fuse Replacement

M Series USB devices have a replaceable T 2A 250V (5 × 20 mm) fuse that protects the device
from overcurrent through the power connector.

(USB-6281/6289 Devices) USB-628x devices also have a replaceable Littelfuse 0453002

(F 2A 250V) fuse that protects the device from overcurrent through the +5 V terminal(s).

(USB-622x/625x/628x Screw Terminal Devices) To replace a broken fuse in the USB-62xx

Screw T e rminal, complete the following steps.

1. Power down and unplug the device.

2. Remove the USB cable and all signal wires from the device.

3. Loosen the four Phillips screws that attach the back lid to th e enclosure and re move the lid.

4. Replace the broken fuse while referring to Figure 1-8 for the fuse locations.

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Chapter 1 Getting Started

2

1

Figure 1-8. USB-62xx Screw Terminal Fuse Locations

1 T 2A 250V (5 × 20 mm) Fuse 2 Littelfuse 0453002 Fuse on USB-628x Devices

5. Replace the lid and screws.

(USB-622x/625x BNC Devices) T o replace a broken fuse in the USB-62xx BNC, complete the

following steps.

1. Power down and unplug the device.

Note Take proper ESD precautions when handling the device.

2. Remove the USB cable and all BNC cables and signal wires from the device.

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M Series User Manual

1

Figure 1-9. USB-62xx BNC Fuse Location

1 T 2A 250V (5 × 20 mm) Fuse

3. Remove both end pieces by unscrewing the four sockethead cap screws with a 7/64 in. hex
wrench.

Note The end pieces are attached using self-threading screws. Repeated screwing

and unscrewing of self-threading screws will produce a compromised connection.

4. With a Phillips #2 screwdriver, remove the Phillips 4-40 screw adjacent to the USB
connector.

5. Remove the nut from the power connector.

6. Remove the four Phillips 4-40 screws that attach the top panel to the enclosure and remove
the panel and connector unit.

7. Replace the broken fuse while referring to Figure 1-9 for the fuse location.

8. Replace the top panel, screws, nut, and end pieces.

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Chapter 1 Getting Started

1

2

(USB-622x/625x/628x Mass Termination Devices) T o replace a broken fuse in th e USB-62xx

Mass T erm ina tion, com plete the following steps.

1. Power down and unplug the device.

2. Remove the USB cable and signal cable(s) from the device.

3. Loosen the four Phillips screws that attach the lid to the enclosure and remove the lid.

4. Replace the broken fuse while referring to Figure 1-10 for the fuse locations.

Figure 1-10. USB-62xx Mass Termination Fuse Locations

1 T 2A 250V (5 × 20 mm) Fuse
2 Littelfuse 0453002 Fuse on USB-628x Devices

5. Replace the lid and screws.

USB Device Security Cable Slot

(USB-622x/625x BNC Devices) The security cable slot, shown in Figure 1-7, allows you to

attach an optional antitheft device to your USB device.

Note The security cable is designed to ac t as a deterrent, but may not prevent the

device from being mishandled or stolen. For more information, refer to the
documentation that accompanied the security cable.

Note The security cable slot on th e USB-62xx BNC may not be compatible with all

antitheft cables.

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M Series User Manual

Installing a Ferrite

(USB-62221/6229 BNC Devices) To ensure EMC compliance, you must install the ferrite

shipped with the USB-6221/6229 BNC.

Loop the power cabling through the ferrite at least five times. Install the ferrite as close as
possible to the end of the power cable, as shown in Figure 1-11.

Figure 1-11. Installing the Ferrite on the Power Cable

3

2

1

1 Power Cable
2 Ferrite

3 NI USB-6221/6229 BNC Device

Pinouts

Refer to Appendix A, Module/Device-Specific Information, for M Series device pinouts.

Specifications

Refer to the device specifications document for your device. M Series device documentation is
available on ni.com/manuals.

Accessories and Cables

NI offers a variety of accessories and cables to use with your multifunction I/O DAQ module
device. Refer to the Cables and Accessories section of Chapter 2, DAQ System Overview, for
more information.

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2

Analog Output

Digital I/O

Analog Input

Counters

PFI

Digital

Routing

and Clock

Generation

Bus

Interface

Bus

I/O Connector

RTSI

DAQ System Overview

Figure 2-1 shows a typical DAQ system, which includes sensors, transducers, signal
conditioning devices, cables that connect the various devices to the accessories, the M Series
device, programming software, and PC. The following sections cover the components of a
typical DAQ system.

Figure 2-1. Components of a Typical DAQ System

Sensors and

Transducers

Signal
Conditioning

Cables and

Accessories

DAQ

Hardware

DAQ

Software

Personal Computer

or

PXI/PXI Express

Chassis

DAQ Hardware

DAQ hardware digitizes signals, performs D/A conversions to generate analog output signals,
and measures and controls digital I/O signals. Figure 2-2 features components common to all
M Series devices.

Figure 2-2. General M Series Block Diagram

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Chapter 2 DAQ System Overview

DAQ-STC2 and DAQ-6202

The DAQ-STC2 and DAQ-6202 implement a high-performance digital engine for M Series data
acquisition hardware. Some key features of this engine include the following:

• Flexible AI and AO sample and convert timing

• Many triggering modes

• Independent AI, AO, DI, and DO FIFOs

• Generation and routing of RTSI signals for multi-device synchronization

• Generation and routing of internal and external timing signals

• T wo flexible 32-bit counter/timer modules with hardware gating

• Digital waveform acquisition and generation

• Static DIO signals

• True 5 V high current drive DO

• DI change detection

• PLL for clock synchronization

• Seamless interface to signal conditioning accessories

• PCI/PXI interface

• Independent scatter-gather DMA controllers for all acquisition and generation functions

Calibration Circuitry

The M Series analog inputs and outputs have calibration circuitry to correct gain and offset
errors. You can calibrate the device to minimize AI and AO errors caused by time and
temperature drift at run time. No external circuitry is necessary; an internal reference ensures
high accuracy and stability over time and temperature changes.

Factory-calibration constants are permanently stored in an onboard EEPROM and cannot be
modified. When you self-calibrate the device, as described in the Device Self-Calibration
section of Chapter 1, Getting Started, software stores new constants in a user-modifiable section
of the EEPROM. To return a device to its initi al factory calibration settings, software can copy
the factory-calibration constants to the user-modifiable sec tion of the EEPROM. Refer to the
NI-DAQmx Help or the LabVIEW Help for more information about using calibration constants.

For a detailed calibration procedure for M Series devices, refer to the B/E/M/S/X Series
Calibration Procedure available at

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M Series User Manual

Cables and Accessories

NI offers a variety of products to use with M Series PCI, PCI Express, PXI, PXI Express, USB
devices, including cables, connector blocks, and other accessories, as follows:

• Shielded cables and cable assemblies, and unshielded ribbon cables and cable assemblies

• Screw terminal connector blocks, shielded and unshielded

• RTSI bus cables

• SCXI modules and accessories for isolating, amplifying, exciting, and multiplexing
signals; with SCXI you can condition and acquire up to 3,072 channels

• Low-channel-count signal conditioning modules, devices, and accessories, including
conditioning for strain gauges and RTDs, simultaneous sample and hold circuitry, and
relays

Refer to the appropriate section for your device connector type—68-Pin M Series Cables and

Accessories or 37-Pin M Series Cables and Accessories. For more specific information about

these products, refer to

Note For compliance with Electromagnetic Compatibility (EMC) requirements,

this product must be operated with shielded cables and accessories. If unshielded
cables or accessories are used, the EMC specifications are no longer guaranteed
unless all unshielded cables and/or accessories are installed in a shie lded enclosure
with properly designed and shielded input/output ports.

ni.com.

Refer to the 68-Pin Custom Cabling and Connectivity or 37-Pin Custom Cabling section of this
chapter and the Field Wiring Considerations section of Chapter 4, Analog Input, for information
about how to select accessories for your M Series device.

68-Pin M Series Cables and Accessories

This section describes some cable and accessory options for M Series devices with one or two
68-pin connectors. Refer to the following sections for descriptions of these cables and
accessories. Refer to

ni.com for other accessory options.

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Chapter 2 DAQ System Overview

Table 2-1. 68-Pin M Series Device/Module Cables and Accessories

PCI, PCI Express,

PXI, PXI Express

Devices and Modules

622x/625x/

628x

Connector 0

6224/6229/

Cables and Accessories

Cables

Accessories

* Can only be attached directly to PXI modules front connector only, and does not require a cable.

Type

Shielded SHC68-68-EPM SHC68-68 SC68-68-EPM SHC68-68

Unshielded RC68-68 RC68-68 RC68-68 RC68-68

Screw
Terminal
Block

BNC Terminal
Block

Shielded

SCC SC-2345

Screw
Terminal
Block

Unshielded

Custom Connectivity CA-1000 CA-1000 CA-1000 CA-1000

6254/6259/

6284/6289

Connector 1

SCB-68A
SCB-68
TB-2706*

BNC-2110
BNC-2111
BNC-2120
BNC-2090A
BNC-2090

SC-2350
SCC-68

CB-68LP
CB-68LPR
TBX-68

6225/6255

Connector 1

SCB-68A
SCB-68

BNC-2115 BNC-2110

N/A SC-2345

CB-68LP
CB-68LPR
TBX-68

USB Mass Termination Devices

622x/625x/

628x

Connector 0

6229/6259/

6289

Connector 1

SCB-68A
SCB-68

BNC-2111
BNC-2120
BNC-2090A
BNC-2090

SC-2350
SCC-68

CB-68LP
CB-68LPR
TBX-68

6225/6255

Connector 1

SCB-68A
SCB-68

BNC-2115

N/A

CB-68LP
CB-68LPR
TBX-68

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M Series User Manual

68-Pin Cables

Cabling options differ between the 68-pin PCI/PCI Express/PXI/PXI Express devices and
modules and USB Mass Termination devices.

PCI/PCI Express/PXI/PXI Express Device/Module 68-Pin Cables

You can use the following cables with PCI, PCI Express, PXI, and PXI Express M Series devices
and modules:

• SHC68-68-EPM
M/X Series devices. It has individual bundles separating analog and digital signals. Each
differential analog input channel is routed on an individually shielded twisted pair of wires.
Analog outputs are also individually shielded.

• SHC68-68—(Recommended) Lower-cost shielded cable with 34 twisted pairs of wire. The
cable is recommended for PCI/PXI-6225/6255 Connector 1.

Note You must use the SHC68-68 cable on Connector 1 of PCI/PXI-6225/6255

devices and modules. The SHC68-68-EPM cable can be used on Connector 0 of all
M Series PCI, PCI Express, PXI, and PXI Express devices and modules, and on
Connector 1 of NI PCI/PCIe/PXI/PXI-6224/6229/6254/6259/6284/6289 devices and
modules.

• RC68-68—Highly-flexible unshielded ribbon cable.

USB Mass Termination Device 68-Pin Cables

You can use the following cables with USB devices with mass termination connectors:

• SH68-68-EPM2—(Recommended) High-performance cable with individual bundles
separating analog and digital signals. Each differential analog input channel is routed on an
individually shielded twisted pair of wires. Analog outputs are also individually shielded.

• SH68-68-S—(Recommended) Shielded cable with 34 twisted pairs of wire. Each
differential analog input channel on Connector 1 is routed on a twisted pair on the
SH68-68-S cable. The cable is recommended for USB-6225/6255 Mass Termination
Connector 1.

1

—(Recommended) High-performance shielded cable designed for

Note You must use the SH68-68-S cable on Connector 1 of USB-6225/6255

Mass Termination devices. The SH68-68-EPM cable can be used on Connector 0 of
all M Series USB Mass Termination devices, and on Connector 1 of
USB-6229/6259/6289 devices and modules.

• R68-68—Highly-flexible unshielded ribbon cable.

1

NI recommends that you use the SHC68-68-EPM cable; however, an SHC68-68-EP cable works with
PCI/PCI Express/PXI/PXI Express devices and mo du les.

2

NI recommends that you use the SH68-68-EPM cable; however, an SH68-68-EP cable will work with
USB Mass Termination devices.

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Chapter 2 DAQ System Overview

68-Pin BNC Accessories

You can use your 68-pin cable to connect your DAQ device to the following BNC accessories:

• BNC-2110—Provides BNC connectivity to all analog signals, some digital signals, and
spring terminals for other digital signals

• BNC-2111—Provides BNC connectivity to 16 single-ended analog input signals,
two analog output signals, five DIO/PFI signals, and the external reference voltage for
analog output

• BNC-2120—Similar to the BNC-2110, and also has a built-in function generator,
quadrature encoder, temperature reference, and thermocouple connector

• BNC-2090A, BNC-2090—Desktop/rack-mountable device with 22 BNCs for connecting
analog, digital, and timing signals

• BNC-2115—

(NI 6225/6255 Devices) Provides BNC connectivity to 24 of the differential

(48 single ended) analog input signals on Connector 1 of NI 6225/6255 devices

68-Pin Screw Terminal Accessories

You can use your 68-pin cable to connect your DAQ device to the following screw terminal
accessories:

• SCB-68A, SCB-68—Shielded connector block with temperature sensor

• TB-2706

• SCC-68—I/O connector block with screw terminals, general breadboard area, bus
terminals, and four expansion slots for SCC signal conditioning modules.

• TBX-68—DIN rail-mountable connector block

• CB-68LP, CB-68LPR—Unshielded connector blocks

1

—Front panel mounted terminal block for PXI/PXI Express M Series devices

RTSI Ca bles

Use RTSI bus cables to connect timing and synchronization signals among PCI/PCI Express
devices, such as X Series, E Series, CAN, and other measurement, vision, and motion devices.
Since PXI devices use PXI backplane signals for timing and synchronization, no cables are
required.

SCC Carriers and Accessories

SCC provides portable, modular signal conditioning to your DAQ system. Use your 68-pin cable
to connect your device/module to an SCC module carrier, such as the following:

• SCC-68—68-pin terminal block with SCC expansion slots

• SC-2345—Shielded carrier for up to 20 SCC modules

• SC-2350—Shielded SCC carrier for TEDS sensors

1

TB-2706 uses Connector 0 of your PXI/PXI Express module, therefore does not require a cable. After a
TB-2706 is installed, Connector 1 cannot be used.

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M Series User Manual

You can use either connector on M Series devices to control an SCC module carrier.

Note (NI 6225/6255 Devices) SCC is supported only on Connector 0.

Note PCI Express users should consider the power limits on certain SCC modules

without an external power supply. Refer to the device specifications, and the When to

Use the Disk Drive Power Connector section of Chapter1, Getting Started, for

information about power limits and increasing the current the device can supply on
the +5 V terminal.

SCXI

SCXI is a programmable signal conditioning system designed for measurement and automation
applications. To connect your M Series device or module to an SCXI chassis, use the SCXI-1349
adapter and your 68-pin cable.

Use Connector 0 of your M Series device to control SCXI in parallel and multiplexed mode. Use
Connector 1 of your M Series device to control SC XI in parallel mode.

Note (NI 6225/6255 Devices) SCXI is supported only on Connector 0.

Note When using Connector 1 in parallel mode with SCXI modules that support

track and hold, you must programmatically disable track and hold.

You also can use an M Series PXI module to control the SCXI section of a PXI/SCXI
combination chassis, such as the PXI-1010 or PXI-1011. The M Series device in the rightmost
PXI slot controls the SCXI devices. No cables or adapters are necessary.

Refer to the documentation for your SCXI chassis and modules for detailed information about
using SCXI with a DAQ device.

68-Pin Custom Cabling and Connectivity

The CA-1000 is a configurable enclosure that gives user-defined connectivity and flexibility
through customized panelettes. Visit ni.com for more information about the CA-1000.

NI offers cables and accessories for many applications. However, if you want to develop your
own cable, adhere to the following guidelines for best results:

• For AI signals, use shielded, twisted-pair wires for each AI pair of differential inputs.
Connect the shield for each signal pair to the ground reference at the source.

• Route the analog lines separately from the digital lines.

• When using a cable shield, use separate shields for the analog and digital sections of the
cable. To prevent noise when using a cable shield, use separate shields for the analog and
digital sections of the cable.

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Chapter 2 DAQ System Overview

For more information on the connectors used for DAQ devices, refer to the NI DAQ Device
Custom Cables, Replacement Connectors, and Screws document by going to

ni.com/info

and entering the Info Code rdspmb.

USB Device Accessories, USB Cable, and Power Supply

USB Screw Terminal and USB Mass Termination devices feature connectivity directly on the
device and do not require an accessory for interfacing to signals. However, NI offers a variety
of products to use with the USB M Series devices, as shown in Table 2-2.

Table 2-2. USB Device Cabling, Accessories, and Power Supply

Description Part Number

NI USB DAQ Power Supply 780046-01
Externally Powered USB M Series Panel

Mounting Kit

*

780214-01

USB cable with locking screw, 2 m 780534-01
BNC Male (Plug) to BNC Male (Plug) Cable 779697-02

* Not for use with NI USB BNC devices.

37-Pin M Series Cables and Accessories

This section describes some cable and accessory options for the PCI-6221 (37-pin) device. Refer
to the following sections for descriptions of these cables and accessories. Refer to
other accessory options.

Table 2-3. PCI-6221 (37-Pin) Cables and Accessories

Supported Models for

Cables and Accessories Type

Cables Shielded SH37F-37M

Unshielded R37F-37M

Accessories Unshielded Screw Terminal Block CB-37F-HVD

Custom Connectivity TB-37F-37SC

PCI-6221 (37-Pin) Device

SH37F-P-4

CB-37FV
CB-37FH
CB-37F-LP

TB-37F-37CP

ni.com for

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M Series User Manual

37-Pin Cables

In most applications, you can use the following cables:

• SH37F-37M—(Recommended) 37-pin female-to-male shielded I/O cable,
(1 m and 2 m lengths)

• SH37F-P-4—37-pin female-to-pigtails shielded I/O cable

• R37F-37M—37-pin female-to-male ribbon I/O cable

37-Pin Screw Terminal Accessories

National Instruments offers several styles of screw terminal connector blocks. Use your 37-pin
cable to connect a PCI-6221 (37-pin) device to one of the following connector blocks:

• CB-37F-HVD—37-pin DIN rail screw terminal block

• CB-37FV—Vertical DIN rail-mountable terminal block with 37 screw terminals

• CB-37FH—Horizontal DIN rail-mountable connector block with 37 screw terminals

• CB-37F-LP—Low profile connector block with 37 screw terminals

RTSI Ca bles

Use RTSI bus cables to connect timing and synchronization signals among PCI/PCI Express
devices, such as X Series, E Series, CAN, and other measurement, vision, and motion devices.
Since PXI devices use PXI backplane signals for timing and synchronization, no cables are
required.

37-Pin Custom Cabling

NI offers cables and accessories for many applications. However, if you want to develop your
own cable, the following kits can assist you:

• TB-37F-37SC—37-pin solder cup terminals, shell with strain relief

• TB-37F-37CP—37-pin crimp & poke terminals, shell with strain relief

Adhere to the following guidelines for best results:

• For AI signals, use shielded, twisted-pair wires for each AI pair of differential inputs.
Connect the shield for each signal pair to the ground reference at the source.

• Route the analog lines separately from the digital lines.

• When using a cable shield, use separate shields for the analog and digital sections of the
cable. Failure to do so results in noise coupling into the analog signals from transient digital
signals.

For more information on the connectors used for DAQ devices, refer to the NI DAQ Device
Custom Cables, Replacement Connectors, and Screws document by going to
and entering the Info Code

rdspmb.

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Chapter 2 DAQ System Overview

Signal Conditioning

Many sensors and transducers require signal conditioning before a measurement system can
effectively and accurately acquire the signal. The front-end signal conditioning system can
include functions such as signal amplification, attenuation, filtering, electrical isolation,
simultaneous sampling, and multiplexing. In addition, many transducers require excitation
currents or voltages, bridge completion, linearization, or high amplification for proper and
accurate operation. Therefore, most computer-based measurement systems include some form
of signal conditioning in addition to plug-in data acquisition DAQ devices.

Sensors and Transducers

Sensors can generate electrical signals to measure physical phenomena, such as temperature,
force, sound, or light. Some commonly used sensors are strain gauges, thermocouples,
thermistors, angular encoders, linear encoders, and resistance temperature detectors (RTDs).

To measure signals from these various transducers, you must convert them into a form that a
DAQ device can accept. For example, the output voltage of most thermocouples is very small
and susceptible to noise. Therefore, you may need to amplify or filter the thermocouple output
before digitizing it. The manipulation of signals to prepare them for digitizing is called signal
conditioning.

For more information about sensors, refer to the following documents:

• For general information about sensors, visit

• If you are using LabVIEW, refer to the LabVIEW Help by selecting Help»Search the
LabVIEW Help in LabVIEW and then navigate to the Taking Measurements book on
the Contents tab.

• If you are using other application software, refer to Common Sensors in the NI-DAQmx
Help or the LabVIEW Help.

ni.com/sensors.

Signal Conditioning Options

For more information about SCXI and SCC products, refer to ni.com/

signalconditioning

SCXI

SCXI is a front-end signal conditioning and switching system for various measurement devices,
including M Series devices. An SCXI system consists of a rugged chassis that houses shielded
signal conditioning modules that amplify, filter, isolate, and multiplex analog signals from
thermocouples or other transducers. SCXI is designed for large measurement systems or systems
requiring high-speed acquisition.

System features include the following:

• Modular architecture—Choose your measurement technology

• Expandability—Expand your system to 3,072 channels

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M Series User Manual

• Integration—Combine analog input, analog output, digital I/O, and switching into a
single, unified platform

• High bandwidth—Acquire signals at high rates

• Connectivity—Select from SCXI modules with thermocouple connectors or terminal
blocks

Note SCXI is not supported on the PCI-6221 (37-pin), USB-622x/625x/628x

Screw Terminal, or USB-622x/625x BNC devices.

SCC

SCC is a front-end signal conditioning system for M Series plug-in data acquisition devices. An
SCC system consists of a shielded carrier that holds up to 20 single- or dual-channel SCC
modules for conditioning thermocouples and other transducers. SCC is designed for small
measurement systems where you need only a few channels of each signal type, or for portable
applications. SCC systems also offer the most comprehensive and flexible signal connectivity
options.

System features include the following:

• Modular architecture—Select your measurement technology on a per-channel basis

• Small-channel systems—Condition up to 16 analog input and eight digital I/O lines

• Low-profile/portable—Integrates well with other laptop computer measurement
technologies

• High bandwidth—Acquire signals at rates up to 1.25 MHz

• Connectivity—Incorporates panelette technology to offer custom connectivity to
thermocouple, BNC, LEMO™ (B Series), and MIL-Spec connectors

Note PCI Express users should consider the power limits on certain SCC modules

without an external power supply. Refer to the device specifications, and the When to

Use the Disk Drive Power Connector section of Chapter1, Getting Started, for

information about power limits and increasing the current the device can supply on
the +5 V terminal.

Note SCC is not supported on the PCI-6221 (37-pin) , USB-622x/625x/628x Screw

Te rminal, or USB-622x/625x BNC devices.

Programming Devices in Software

National Instruments measurement devices are packaged with NI-DAQmx driver software, an
extensive library of functions and VIs you can call from your application software, such as
LabVIEW or LabWindows™/CVI™, to program all the features of your NI measurement
devices. Driver software has an application programming interface (API), which is a library of
VIs, functions, classes, attributes, and properties for creating applications for your device.

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Chapter 2 DAQ System Overview

M Series devices use the NI-DAQmx driver. NI-DAQmx includes a collection of programming
examples to help you get started developing an application. You can modify example code and
save it in an application. You can use examples to develop a new application or add example
code to an existing application.

To locate LabVIEW, LabWindows/CVI, Measurement Studio, Visual Basic, and ANSI C
examples, refer to the KnowledgeBase document, Where Can I Find NI-DAQmx Examples?, by
going to

ni.com/info and entering the Info Code daqmxexp.

For additional examples, refer to

ni.com/examples.

Ta ble2-4 lists the earliest NI-DAQmx support version for each M Series device.

Table 2-4. M Series NI-DAQmx Software Support

NI-DAQmx Earliest

Device

Version Support

NI PCI/PXI-6220/6221/6224/6229 NI-DAQmx 7.4
NI PCI-6221 (37-pin) NI-DAQmx 7.5
NI USB-6221/6229 Screw Terminal NI-DAQmx 8.3
NI USB-6221/6229 BNC NI-DAQmx 8.6.1
NI PCI/PXI-6225 NI-DAQmx 7.4
NI USB-6225 Screw Terminal/Mass Termination NI-DAQmx 8.6.1
NI PCI/PXI-6250/6251/6254/6259 NI-DAQmx 7.4
NI PCIe-6251/6259 NI-DAQmx 8.0.1
NI PXIe-6251/6259 NI-DAQmx 8.3
NI USB-6251/6259 Screw Terminal/Mass Termination NI-DAQmx 8.1
NI USB-6251/6259 BNC NI-DAQmx 8.6.1
NI PCI/PXI-6255 NI-DAQmx 8.1
NI USB-6255 Screw Terminal/Mass Termination NI-DAQmx 8.6.1
NI PCI/PXI-6280/6281/6284/6289 NI-DAQmx 7.4
NI USB-6281/6289 Screw Terminal/Mass Termination NI-DAQmx 8.7.1

Note NI recommends using the latest version of NI-DAQmx supported for your

OS. Refer to the NI-DAQmx download page by going to ni.com/info and
entering the Info Code nidaqmxdownloads.

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3

Connector and LED
Information

The I/O Connector Signal Descriptions, +5 V Power Source, and USER 1 and USER 2 sections
contain information about M Series connector signals, power, and user-defined terminals. The

LED Patterns section contains information about M Series USB device LEDs.

Note Refer to Appendix A, Module/Device-Specific Information, for device I/O

connector pinouts.

I/O Connector Signal Descriptions

Table 3-1 describes the signals found on the I/O connectors. Not all signals are available on all
devices.

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Chapter 3 Connector and LED Information

Table 3-1. I/O Connector Signals

Signal Name Reference Direction Description

AI GND — — Analog Input Ground—These terminals are the

reference point for single-ended AI measurements
in RSE mode and the bias current return point for
DIFF measurements. All three ground
references—AI GND, AO GND, and
D GND—are connected on the device. Refer to
the Connecting Analog Input Signals section of
Chapter 4, Analog Input.

AI <0..79> Varies Input Analog Input Channels—For single-ended

measurements, each signal is an analog input
voltage channel. In RSE mode, AI GND is the
reference for these signals. In NRSE mode, the
reference for each AI <0..15> signal is
AI SENSE; the reference for each AI <16..63>
and AI <64..79> signal is AI SENSE 2

*

.

For differential measurements, AI 0 and AI 8 are
the positive and negative inputs of differential
analog input channel 0. Similarly, the following
signal pairs also form differential input channels:
<AI 1, AI 9>, <AI 2, AI 10>, <AI 3, AI 11>, and
so on.

Refer to the Connecting Analog Input Signals
section of Chapter 4, Analog Input.

AI SENSE,
AI SENSE 2

— Input Analog Input Sense—In NRSE mode, the

reference for each AI <0..15> signal is
AI SENSE; the reference for each AI <16..63>
and AI <64..79> signal is AI SENSE 2

*

. Refer to
the Connecting Analog Input Signals section of
Chapter 4, Analog Input.

AO <0..3> AO GND Output Analog Output Channels—These terminals

supply the voltage output. Refer to the Connecting

Analog Output Signals section of Chapter 5,
Analog Output.

AO GND — — Analog Output Ground—AO GND is the

reference for AO <0..3>. All three ground
references—AI GND, AO GND, and
D GND—are connected on the device. Refer to
the Connecting Analog Output Signals section of
Chapter 5, Analog Output.

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M Series User Manual

Table 3-1. I/O Connector Signals (Continued)

Signal Name Reference Direction Description

D GND — — Digital Ground—D GND supplies the reference

for P0.<0..31>, PFI <0..15>/P1/P2, and +5 V. All
three ground references—AI GND, AO GND,
and D GND—are connected on the device. Refer
to the Connecting Digital I/O Signals section of
Chapter 6, Digital I/O.

P0.<0..31> D GND Input or

Output

Port 0 Digital I/O Channels—You can
individually configure each signal as an input or
output. Refer to the Connecting Digital I/O

Signals section of Chapter 6, Digital I/O.

APFI <0,1> AO GND

or AI GND

Input Analog Programmable Function Interface

Channels—Each APFI signal can be used as
AO external reference inputs for AO <0..3>,
AO external offset input, or as an analog trigger
input. APFI <0,1> are referenced to AI GND
when they are used as analog trigger inputs.
APFI <0,1> are referenced to AO GND when they
are used as AO external offset or reference inputs.
These functions are not available on all devices;
refer to the specifications for your device. Refer to
the APFI <0,1> Terminals section of Chapter 11,

Triggering.

+5 V D GND Output +5 V Power Source—These terminals provide a

fused +5 V power source. Refer to the +5 V Power

Source section for more information.

PFI <0..7>/
P1.<0..7>

D GND Input or

Output

Programmable Function Interface or Port 1
Digital I/O Channels—Each of these terminals

can be individually configured as a PFI terminal or
a digital I/O terminal.

As an input, each PFI terminal can be used to
supply an external source for AI, AO, DI, and
DO timing signals or counter/timer inputs.

As a PFI output, you can route many different
internal AI, AO, DI, or DO timing signals to each
PFI terminal. Y ou also can route the counter/timer
outputs to each PFI terminal.

As a Port 1 digital I/O signal, you can individually
configure each signal as an input or output.

Refer to the Connecting Digital I/O Signals
section of Chapter 6, Digital I/O, or to Chapter 8,

PFI.

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Chapter 3 Connector and LED Information

Table 3-1. I/O Connector Signals (Continued)

Signal Name Reference Direction Description

PFI <8..15>/
P2.<0..7>

D GND Input or

Output

Programmable Function Interface or Port 2
Digital I/O Channels—Each of these terminals

can be individually configured as a PFI terminal or
a digital I/O terminal.

As an input, each PFI terminal can be used to
supply an external source for AI, AO, DI, and
DO timing signals or counter/timer inputs.

As a PFI output, you can route many different
internal AI, AO, DI, or DO timing signals to each
PFI terminal. Y ou also can route the counter/timer
outputs to each PFI terminal.

As a Port 2 digital I/O signal, you can individually
configure each signal as an input or output.

Refer to the Connecting Digital I/O Signals
section of Chapter 6, Digital I/O, or to Chapter 8,

PFI. Refer to Table 7-6, 68-Pin Device Default
NI-DAQmx Counter/Timer Pins, to find the

default NI-DAQmx counter/timer pins for most
M Series devices.

USER <1,2> — — User-Defined Channels—On USB-62xx BNC

devices, the USER <1,2> BNC connectors allow
you to use a BNC connector for a digital or timing
I/O signal of your choice. The USER <1,2> BNC
connectors are internally routed to the USER
<1,2> screw terminals. Refer to the USER 1 and

USER 2 section for more information.

CHS GND — — Chassis Ground†—This terminal connects to the

USB-62xx BNC device metal enclosure. You can
connect your cable’s shield wire to CHS GND for
a ground connection. Refer to the USB Device

Chassis Ground section of Chapter 1, Getting
Started.

NC — — No connect—Do not connect signals to these

terminals.

*

On NI 6225 devices, the reference for each AI <16..63> signal is AI SENSE 2, and each AI <64..79>

signal is AI SENSE in NRSE mode.

†

USB-62xx Screw Terminal users can connect the shield of a shielded cable to the chassis ground lug

for a ground connection. The chassis ground lug is not available on all device versions.

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M Series User Manual

+5 V Power Source

The +5 V terminals on the I/O connector supply +5 V referenced to D GND. Use these terminals
to power external circuitry.

Newer revision M Series devices have a traditional fuse to protect the supply from overcurrent
conditions. This fuse is not customer-replaceable; if the fuse permanently opens, return the
device to NI for repair.

Older revision M Series devices have a self-resetting fuse to protect the supply from overcurrent
conditions. This fuse resets automatically within a few seconds after the overcurrent condition
is removed. For more information about the self-resetting fuse and precautions to take to avoid
improper connection of +5 V and ground terminals, refer to the KnowledgeBase document,
Self-Resetting Fuse Additional Information, by going to

pptc.

Code

(USB-6281/6289 Devices) All USB-628x devices have a user-replaceable sock eted fuse to

protect the supply from overcurrent conditions. When an overcurrent condition occurs, check
your cabling to the +5 V terminals and replace the fuse as described in the USB Device Fuse

Replacement section of Chapter 1, Getting Started.

Caution Never connect the +5 V power terminals to analog or digital ground or to

any other voltage source on the M Series device or any other device. Doing so can
damage the device and the computer . NI is not liable for damage resulting from such
a connection.

ni.com/info and entering the Info

The power rating on most devices is +4.75 to +5.25 VDC at 1 A.

Refer to the specifications document for your device to obtain the device power rating.

Note (NI PCIe-6251/6259 Devices) M Series PCI Express devices supply less

than 1 A of +5 V power unless you use the disk drive power connector. Refer to the

Getting Started with M Series PCI Express Devices and the Disk Drive Power
Connector section of Chapter 1, Getting Started, for more information.

Note The NI 6221 (37-pin) device does not have a +5 V terminal.

USER 1 and USER 2

(NI USB-622x/625x BNC Devices) The USER connectors allow you to use a BNC connector

for a digital or timing I/O signal of your choice. The USER 1 and USER 2 BNC connectors are
routed (internal to the USB BNC device) to the USER 1 and USER 2 screw terminals, as shown
in Figure 3-1.

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Chapter 3 Connector and LED Information

USER 2 BNC

D GND

USER 1

P0.6

P0.5

P0.4

D GND

P0.3

P0.2

P0.1

P0.0

D GND

+5 V

D GND

USER 2

PFI 8/P2.0

P0.7

D GND

Internal Connection

USER 1 BNC

D GND

Screw
Terminal
Block

BNC Cable

PFI 8

Signal

USER 1

P0.6

P0.5

P0.4

D GND

P0.3

P0.2

P0.1

P0.0

D GND

+5 V

D GND

USER 2

PFI 8/P2.0

P0.7

D GND

USER 1 BNC

D GND

Screw
Terminal
Block

Internal
Connection

Wire

Figure 3-1. USER 1 and USER 2 BNC Connections

Figure 3-2 shows an example of how to use the USER 1 and USER 2 BNCs. To access the PFI 8
signal from a BNC, connect USER 1 on the screw terminal block to PFI 8 with a wire.

Figure 3-2. Connecting PFI 8 to USER 1 BNC

The designated space below each USER BNC is for marking or labeling signal names.

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M Series User Manual

RTSI Connector Pinout

(PCI/PCIe-622x/625x/628x Devices) Refer to the RTSI Connector Pinout section of

Chapter 9, Digital Routing and Clock Generation, for information about the RTSI connector.

LED Patterns

(USB-622x/625x/628x Devices) All variants of M Series USB devices have LEDs labeled

ACTIVE and READY. The ACTIVE LED indicates activity over the bus. The READY LED
indicates whether or not the device is configured. Table 3-2 shows the behavior of the LEDs.

Note USB-62xx BNC devices also have a POWER (+5 V) LED on the top panel.

The POWER (+5 V) LED indicates device power.

Table 3-2. LED Patterns

POWER

(+5 V) LED

Off Off Off The device is not powered.

On Off Off (USB-62xx Screw Terminal/Mass Termination

On Off On The device is configured, but there is no activity over

On On On The device is configured and there is activity over the
On Blinking On

*

USB-625x/628x BNC devices only.

*

ACTIVE

LED

READY

LED USB Device State

Devices) The device is not powered.
(USB-62xx BNC Devices) The device is powered

but not connected to the host computer.

the bus.

bus.

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Analog Input

Figure 4-1 shows the analog input circuitry of M Series devices.

Figure 4-1. M Series Analog Input Circuitry

4

AI <0..207>

AI SENSE

I/O Connector

The main blocks featured in the M Series analog input circuitry are as follows:

• I/O Connector—Y ou can conn ect analog input signals to the M Series device through the
I/O connector. The proper way to connect analog input signals depends on the analog input
ground-reference settings, described in the Analog Input Ground-Reference Settings
section. Also refer to Appendix A, Module/Device-Specific Information, for device I/O
connector pinouts.

• Mux—Each M Series device has one analog-to-digital converter (ADC). The multiplexers
(mux) route one AI channel at a time to the ADC through the NI-PGIA.

• Ground-Reference Settings—The analog input ground-reference settings circuitry selects
between differential, referenced single-ended, and non-referenced single-ended input
modes. Each AI channel can use a different mode.

• Instrumentation Amplifier (NI-PGIA)—The NI programmable gain instrumentation
amplifier (NI-PGIA) is a measurement and instrument class amplifier that minimiz es
settling times for all input ranges. The NI-PGIA can amplify or attenuate an AI signal to
ensure that you use the maximum resolution of the ADC.

M Series devices use the NI-PGIA to deliver high accuracy even when sampling multiple
channels with small input ranges at fast rates. M Series devices can sample channels in any
order at the maximum conversion rate, and you can individually program each channel in
a sample with a different input range.

AI GND

Mux

DIFF, RSE,

or NRSE

AI T erminal

Configuration

Selection

NI-PGIA

Input Range

Selection

ADC

AI FIFO

AI Data

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Chapter 4 Analog Input

10V 10V–()–

2

16

---------------------------------- - 305μV=

• A/D Converter—The analog-to-digital converter (ADC) digitizes the AI signal by
converting the analog voltage into a digital number.

• AI FIFO—M Series devices can perform both single and multiple A/D conversions of a
fixed or infinite number of samples. A large first-in-first-out (FIF O) buffer holds data
during AI acquisitions to ensure that no data is lost. M Series devices can handle multiple
A/D conversion operations with DMA, interrupts, or programmed I/O.

Analog Input Range

Input range refers to the set of input voltages that an analog input channel can digitize with the
specified accuracy. The NI-PGIA amplifies or attenuates the AI signal depending on the input
range. You can individually program the input range of each AI channel on your M Series
device.

The input range affects the resolution of the M Series device for an AI channel. Resolution refers
to the voltage of one ADC code. For example, a 16-bit ADC co nverts analog inputs into on e o f
65,536 (= 2
fairly evenly across the input range. So, for an in put range of -10V to 10 V , the voltage of each
code of a 16-bit ADC is:

M Series devices use a calibration method that requires some codes (typically about 5% of the
codes) to lie outside of the specified range. This calibration method improves absolute accuracy ,
but it increases the nominal resolution of input ranges by about 5% over what the formula shown
above would indicate.

16

) codes—that is, one of 65,536 possible digital values. These values are spread

Choose an input range that matches the expected input range of your signal. A large input range
can accommodate a large signal variation, but reduces the voltage resolution. Choosing a smaller
input range improves the voltage resolution, but may result in the input signal going out of range.

For more information about setting ranges, refer to the NI-DAQmx Help or the LabVIEW Help.

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M Series User Manual

Ta ble4-1 shows the input ranges and resolutions supported by each M Series device family.

Table 4-1. M Series Input Range and Nominal Resolution

Nominal Resolution Assuming

M Series Devices Input Range

5% Over Range

NI 622x -10 V to 10 V 320 µV

-5 V to 5 V 160 µV

-1 V to 1 V 32 µV

-200 mV to 200 mV 6.4 µV

NI 625x -10 V to 10 V 320 µV

-5 V to 5 V 160 µV

-2 V to 2 V 64 µV

-1 V to 1 V 32 µV

-500 mV to 500 mV 16 µV

-200 mV to 200 mV 6.4 µV

-100 mV to 100 mV 3.2 µV

NI 628x -10 V to 10 V 80.1 µV

-5 V to 5 V 40.1 µV

-2 V to 2 V 16.0 µV

-1 V to 1 V 8.01 µV

-500 mV to 500 mV 4.01 µV

-200 mV to 200 mV 1.60 µV

-100 mV to 100 mV 0.80 µV

Analog Input Lowpass Filter

A lowpass filter attenuates signals with frequencies above the cutoff frequency while passing,
with minimal attenuation, signals below the cuto ff frequency. The cutoff frequency is defined as
the frequency at which the output amplitude has decreased by 3 dB. Lowpass filters attenuate
noise and reduce aliasing of signals beyond the Nyquist frequency. For example, if the signal of
interest does not have frequency components beyond 40 kHz, then using a filter with a cutoff
frequency at 40 kHz attenuates noise beyond the cutoff that is not of interest. The cutoff

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Chapter 4 Analog Input

frequency of the lowpass filter is also called the small signal bandwidth. The specifications
document for your DAQ device lists the small signal bandwidth.

On some devices, the filter cutoff is fixed. On other devices, this filter is programmable and can
be enabled for a lower frequency . For exa mple, the NI 628x devices have a programmable filter
with a cutoff frequency of 40 kHz that can be enabled. If the programmable filter is not ena bled,
the cutoff frequency is fixed at 750 kHz. If the cutoff is programmable, choose the lower cutof f
to reduce measurement noise. However, a filter with a lower cutoff frequency increases the
settling time of your device, as shown in the specifications, which reduces its maximum
conversion rate. Therefore, you may have to reduce the rate of your AI Convert and AI Sample
Clocks. If that reduced sample rate is too slow for your application, select the higher cutoff
frequency.

Add additional filters to AI signals using external accessories, as described in the Programming

Devices in Software section of Chapter 2, DAQ System Overview.

Analog Input Ground-Reference Settings

M Series devices support the analog input ground-reference settings:

• Differential mode—In DIFF mode, the M Series device measures the difference in voltage
between two AI signals.

• Referenced single-ended mode—In RSE mode, the M Series device measures the voltage
of an AI signal relative to AI GND.

• Non-referenced single-ended mode—In NRSE mode, the M Series device measures the
voltage of an AI signal relative to one of the AI SENSE or AI SENSE 2 inputs.

The AI ground-reference setting determines how you should connect your AI signals to the
M Series device. Refer to the Connecting Analog Input Signals section for more information.

Ground-reference settings are programmed on a per-channel basis. For example, you might
configure the device to scan 12 channels—four differentially-configured channels and
eight single-ended channels.

M Series devices implement the different analog input ground-reference settings by routing
different signals to the NI-PGIA. The NI-PGIA is a differential amplifier. That is, the NI-PGIA
amplifies (or attenuates) the difference in voltage between its two inputs. The NI-PGIA drives
the ADC with this amplified voltage. The amount of amplification (the gain), is determined by
the analog input range, as shown in Figure 4-2.

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M Series User Manual

Figure 4-2. NI-PGIA

Instrumentation

Amplifier

V

in+

V

m

] × Gain

+

Measured

Voltage

–

PGIA

V

in–

Vm = [V

in+

– V

in–

Table4-2 shows how signals are routed to the NI-PGIA.

Table 4-2. Signals Routed to the NI-PGIA

AI

Ground-Reference

Settings

Signals Routed to the

Positive Input of the

NI-PGIA (V

in+

)

Signals Routed to the

Negative Input of the

NI-PGIA (V

)

in-

RSE AI <0..79> AI GND

NRSE AI <0..15> AI SENSE

AI <16..79> AI SENSE 2

*

DIFF AI <0..7> AI <8..15>

AI <16..23> AI <24..31>
AI <32..39> AI <40..47>
AI <48..55> AI <56..63>
AI <64..71> AI <72..79>

*

On NI 6225 devices, the reference for each AI <16..63> signal is AI SENSE 2, and each AI <64..79>

signal is AI SENSE in NRSE mode.

For differential measurements, AI 0 and AI 8 are the positive and negative inputs of differential
analog input channel 0. For a complete list of signal pairs that form differential input channels,
refer to the pinout diagram for your device in Appendix A, Module/Device-Specific Information.

Caution The maximum input voltages rating of AI signals with respect to ground

(and for signal pairs in differential mode with respect to each other) are listed in the
specifications document for your device. Exceeding the maximum input voltage of
AI signals distorts the measurement results. Exceeding the maximum input voltage
rating also can damage the device and the computer. NI is not liable for any damage
resulting from such signal connections.

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Chapter 4 Analog Input

AI ground-reference setting is sometimes referred to as AI terminal configuration.

Configuring AI Ground-Reference Settings in Software

You can program channels on an M Series device to acquire with different ground references.

To enable multimode scanning in LabVIEW, use the NI-DAQmx Create Virtual Channel VI of
the NI-DAQmx API. Y ou must use a new VI for each channel or group of channels configured
in a different input mode. In Figure 4-3, channel 0 is configured in differential mode, and
channel 1 is configured in referenced single-ended mode.

Figure 4-3. Enabling Multimode Scanning in LabVIEW

To con figure the input mode of your voltage measurement using the DAQ Assistant, use the
Terminal Configuration drop-down list. Refer to the DAQ Assistant Help for more information
about the DAQ Assistant.

To configur e the input mode of your voltage measurement using the NI-DAQmx C API, set the
terminalConfig property. Refer to the NI-DAQmx C Reference Help for more information.

Multichannel Scanning Considerations

M Series devices can scan multiple channels at high rates and digitize the signals accurately.
However, you should consider several issues when designing your measurement system to
ensure the high accuracy of your measurements.

In multichannel scanning applications, accuracy is affected by settling time. When your
M Series device switches from one AI channel to another AI channel, the device configures the
NI-PGIA with the input range of the new channel. The NI-PGIA then amplifies the input signal
with the gain for the new input range. Settling time refers to the time it takes the NI-PGIA to
amplify the input signal to the desired accuracy before it is sampled by the ADC. The
specifications document for your DAQ device lists its settling time.

M Series devices are designed to have fast settling times. However , severa l factors ca n increase
the settling time which decreases the accuracy of your measurements. To ensure fast settling
times, you should do the following (in order of importance):

1. Use Low Impedance Sources—To ensure fast settling times, your signal sources should
have an impedance of <1 kΩ. Large source impedances increase the settling time of the
NI-PGIA, and so decrease the accuracy at fast scanning rates.

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M Series User Manual

Settling times increase when scanning high-impedance signals due to a phenomenon called
charge injection. Multiplexers contain switches, usually made of switched capacitors.
When one of the channels, for example channel 0, is selected in a multiplexer, those
capacitors accumulate charge. When the next channel, for example channel 1, is selected,
the accumulated charge leaks backward through channel 1. If the output impedance of the
source connected to channel 1 is high enough, the resulting reading of channel 1 can be
partially affected by the voltage on channel 0. This effect is referred to as ghosting.

If your source impedance is high, you can decrease the scan rate to allow the NI-PGIA more
time to settle. Another option is to use a voltage follower circuit external to your DAQ
device to decrease the impedance seen by the DAQ device. Refer to the KnowledgeBase
document, Decreasing the Source Impedance of an Analog Input Signal, by going to

ni.com/info and entering the Info Code rdbbis.

2. Use Short High-Quality Cabling—Using short high-quality cables can minimize several
effects that degrade accuracy including crosstalk, transmission line effects, and noise. The
capacitance of the cable also can increase the settling time.

National Instruments recommends using individually shielded, twisted-pair wires that are
2 m or less to connect AI signals to the device. Refer to the Connecting Analog Input

Signals section for more information.

3. Carefully Choose the Channel Scanning Order
– Avoid Switching from a Large to a Small Input Range—Switching from a channel

with a large input range to a channel with a small input range can greatly increase the
settling time.

Suppose a 4 V signal is connected to channel 0 and a 1 mV signal is connected to
channel 1. The input range for channel 0 is -10 V to 10 V and the input range of
channel 1 is -200 mV to 200 mV.

When the multiplexer switches from channel 0 to channel 1, the input to the NI-PGIA
switches from 4 V to 1 mV. The approximately 4 V step from 4 V to 1 mV is 1,000%
of the new full-scale range. For a 16-bit device to settle within 0.0015% (15 ppm or
1 LSB) of the ±200 mV full-scale range on channel 1, the input circuitry must settle
to within 0.000031% (0.31 ppm or 1/50 LSB) of the ±10 V range. Some devices can
take many microseconds for the circuitry to settle this much.

To avoid this effect, you should arrange your channel scanning order so that transitions
from large to small input ranges are infrequent.

In general, you do not need this extra settling time when the NI-PGIA is switching
from a small input range to a larger input range.

– Insert Grounded Channel between Signal Channels—Another technique to improve

settling time is to connect an input channel to ground. Then insert this channel in the
scan list between two of your signal channels. The input range of the grounded channel
should match the input range of the signal after the grounded channel in the scan list.

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Chapter 4 Analog Input

Consider again the example above where a 4 V signal is connected to channel 0 and a
1 mV signal is connected to channel 1. Suppose the input range for channel 0 is -10 V
to 10 V and the input range of channel 1 is -200 mV to 200 mV.

You can connect channel 2 to AI GND (or you can use the internal ground; refer to
Internal Channels in the NI-DAQmx Help). Set the input range of channel 2 to

-200 mV to 200 mV to match channel 1. Then scan channels in the order: 0, 2, 1.
Inserting a grounded channel between signal channels improves settling time because

the NI-PGIA adjusts to the new input range setting faster when the input is grounded.

– Minimize Voltage Step between Adjacent Channels—When scanning between

channels that have the same input range, the settling time increases with the voltage
step between the channels. If you know the expected input range of your signals, you
can group signals with similar expected ranges together in your scan list.

For example, suppose all channels in a system use a -5 to 5 V input range. The signals
on channels 0, 2, and 4 vary between 4.3 V and 5 V. The signals on channels 1, 3, and
5 vary between -4 V and 0 V. Scanning channels in the order 0, 2, 4, 1, 3, 5 produces
more accurate results than scanning channels in the order 0, 1, 2, 3, 4, 5.

4. Avoid Scanning Faster Than Necessary—Designing your system to scan at slower
speeds gives the NI-PGIA more time to settle to a more accurate level. Here are two
examples to consider:

– Example 1—Averaging many AI samples can increase the accuracy of the reading by

decreasing noise effects. In general, the more points you average, the more accurate
the final result. However, you may choose to decrease the number of points you
average and slow down the scanning rate.

Suppose you want to sample 10 channels over a period of 20 ms and average the
results. You could acquire 500 points from each channel at a scan rate of 250 kS/s.
Another method would be to acquire 1,000 points from each channel at a scan rate of
500 kS/s. Both methods take the same amount of time. Doubling the number of
samples averaged (from 500 to 1,000) decreases the effect of noise by a factor of

1.4 (the square root of 2). However, doubling the number of samples (in th is example)
decreases the time the NI-PGIA has to settle from 4μs to 2 μs. In some cases, the
slower scan rate system returns more accurate results.

– Example 2—If the time relationship between ch an nels is not c rit ical, you c an sam ple

from the same channel multiple times and scan less frequen tly. For example, suppose
an application requires averaging 100 points from channel 0 and averaging 100 points
from channel 1. Y ou could alternate reading between channe ls—that is, read one point
from channel 0, then one point from channel 1, and so on. You also could read all
100 points from channel 0 then read 100 points from channel 1. The second method
switches between channels much less often and is affected much le ss by settling time.

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M Series User Manual

Analog Input Data Acquisition Methods

When performing analog input measurements, you either can perform software-timed or
hardware-timed acquisitions.

Software-Timed Acquisitions

With a software-timed acquisition, software controls the rate of the acquisition. Software sends
a separate command to the hardware to initiate each ADC conversion. In NI-DAQmx,
software-timed acquisitions are referred to as having on-demand timing. Software-timed
acquisitions are also referred to as immediate or static acquisitions and are typically used for
reading a single sample of data.

Hardware-Timed Acquisitions

With hardware-timed acquisitions, a digital hardware signal (AI Sample Clock) controls the rate
of the acquisition. This signal can be generated internally on your device or provided externally.

Hardware-timed acquisitions have several advantages over software-timed acquisitions:

• The time between samples can be much shorter.

• The timing between samples is deterministic.

• Hardware-timed acquisitions can use hardware triggering.

Hardware-timed operations can be buffered or non-buffered. A buffer is a temporary storage in
computer memory for to-be-generated samples.

• Buffered—In a buffered acquisition, data is moved from the DAQ device’ s onboard FIFO
memory to a PC buffer using DMA or interrupts before it is transferred to application
memory. Buffered acquisitions typically allow for much faster transfer rates tha n
non-buffered acquisitions because data is moved in large blocks, rather than one point at a
time.

One property of buffered I/O operations is the sample mode. The sample mode can be either
finite or continuous.

– Finite sample mode acquisition refers to the acquisition of a specific, predetermined

number of data samples. Once the specified number of samples has been read in, the
acquisition stops. If you use a reference trigger, you must use finite sample mode.

– Continuous acquisition refers to the acquisition of an unspecified number of samples.

Instead of acquiring a set number of data samples and stopping, a continuous
acquisition continues until you stop the operation. Continuous acquisition is also
referred to as double-buffered or circular-buffered acquisition.

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Chapter 4 Analog Input

If data cannot be transferred across the bus fast enough, the FIFO becomes full. New
acquisitions overwrite data in the FIFO before it can be transferred to host memory.
The device generates an error in this case. With continuous operations, if the user
program does not read data out of the PC buffer fast enough to keep up with the data
transfer, the buffer could reach an overflow condition, causing an error to be
generated.

• Non-buffered—In non-buffered acquisitions, data is read directly from the FIFO on the
device. Typically, hardware-timed, non-buffered operations are used to read single samples
with known time increments between them.

Note (NI USB-62xx Devices) USB M Series devices do not support non-buffered

hardware-timed operations.

Analog Input Triggering

Analog input supports three different triggering actions:

• Start trigger

• Reference trigger

• Pause trigger

Refer to the AI Start Trigger Signal, AI Reference Trigger Signal, and AI Pause Trigger Signal
sections for information about these triggers.

An analog or digital trigger can initiate these actions. All M Series devices support digital
triggering, but some do not support analog triggering. To find your device triggering options,
refer to the specifications document for your device.

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M Series User Manual

+
–

+

–

AI+

AI–

AI GND

Signal Source DAQ Device

+
–

+

–

AI

AI SENSE

AI GND

Signal Source DAQ Device

+
–

+

–

AI

AI SENSE
AI GND

Signal Source DAQ Device

Connecting Analog Input Signals

Table 4-3 summarizes the recommended input configuration for both types of signal sources.

Table 4-3. Analog Input Configuration

Floating Signal Sources

AI

Ground-Reference

Setting

*

Differential (DIFF)

Non-Referenced
Single-Ended
(NRSE)

(Not Connected to

Building Ground)

Examples:

• Ungrounded thermocouples

• Signal conditioning with isolated
outputs

• Battery devices

Signal Source DAQ Device

+
–

AI+

AI–

+

–

AI GND

Ground-Referenced

Signal Sources

†

Example:

• Plug-in instruments with
non-isolated outputs

Referenced
Single-Ended (RSE)

*

Refer to the Analog Input Ground-Reference Settings section for descriptions of the RSE, NRSE, and

DIFF modes and software considerations.

†

Refer to the Connecting Ground-Referenced Signal Sources section for more information.

Signal Source DAQ Device

AI
+
–

+

–

AI GND

NOT RECOMMENDED

Signal Source DAQ Device

AI

+
–

V

A

Ground-loop potential (VA – VB) are added

to measured signal.

+

–

V

B

AI GND

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Chapter 4 Analog Input

Connecting Floating Signal Sources

What Are Floating Signal Sources?

A floating signal source is not connected to the building ground system, but has an isolated
ground-reference point. Some examples of floating signal sources are outputs of transformers,
thermocouples, battery-powered devices, optical isolators, and isolation amplifiers. An
instrument or device that has an isolated output is a floating signal source.

When to Use Differential Connections with Floating
Signal Sources

Use DIFF input connections for any channel that meets any of the following conditions:

• The input signal is low level (less than 1 V).

• The leads connecting the signal to the device are greater than 3 m (10 ft).

• The input signal requires a separate ground-reference point or return signal.

• The signal leads travel through noisy environments.

• Two analog input channels, AI+ and AI-, are available for the signal.

DIFF signal connections reduce noise pickup and increase common-mode noise rejection. DIFF
signal connections also allow input signals to float within the common-mode limits of the
NI-PGIA.

Refer to the Using Differential Connections for Floating Signal Sources section for more
information about differential connections.

When to Use Non-Referenced Single-Ended (NRSE)
Connections with Floating Signal Sources

Only use NRSE input connections if the input signal meets the following conditions:

• The input signal is high-level (greater than 1 V).

• The leads connecting the signal to the device are less than 3 m (10 ft).

DIFF input connections are recommended for greater signal integrity for any input signal that
does not meet the preceding conditions.

In the single-ended modes, more electrostatic and magnetic noise couples into the signal
connections than in DIFF configurations. The coupling is the result of differences in the signal
path. Magnetic coupling is proportional to the area between the two signal conductors. Electrical
coupling is a function of how much the electric field differs between the two conductors.

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With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and
the ground potential difference between the signal source and the device ground.

Refer to the Using Non-Referenced Single-Ended (NRSE) Connections for Floating Signal

Sources section for more information about NRSE connections.

When to Use Referenced Single-Ended (RSE)
Connections with Floating Signal Sources

Only use RSE input connections if the input signal meets the following conditions:

• The input signal can share a common reference point, AI GND, with other signals that
use RSE.

• The input signal is high-level (greater than 1 V).

• The leads connecting the signal to the device are less than 3 m (10 ft).

DIFF input connections are recommended for greater signal integrity for any input signal that
does not meet the preceding conditions.

In the single-ended modes, more electrostatic and magnetic noise couples into the signal
connections than in DIFF configurations. The coupling is the result of differences in the signal
path. Magnetic coupling is proportional to the area between the two signal conductors. Electrical
coupling is a function of how much the electric field differs between the two conductors.

With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and
the ground potential difference between the signal source and the device ground.

Refer to the Using Referenced Single-Ended (RSE) Connections for Floating Signal Sources
section for more information about RSE connections.

Using Differential Connections for Floating Signal
Sources

It is important to connect the negative lead of a floating source to AI GND (either directly or
through a bias resistor). Otherwise, the source may float out of the maximum working voltage
range of the NI-PGIA and the DAQ device returns erroneous data.

The easiest way to reference the source to AI GND is to connect the positive side of the signal
to AI+ and connect the negative side of the signal to AI GND as well as to AI- without using
resistors. This connection works well for DC-coupled sources with low source impedance (less
than 100 Ω).

Note (NI USB-62xx BNC Devices) To measure a floating signal source on USB

BNC devices, move the switch under the BNC connector to the FS position.

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Chapter 4 Analog Input

–

+

Impedance
<100 Ω

AI GND

AI+

AI–
AI SENSE

V

s

Floating
Signal
Source

M Series Device

–

+

R is about

100 times

source

impedance

of sensor

AI GND

R

V

s

Floating

Signal

Source

AI+

AI–
AI SENSE

M Series Device

Figure 4-4. Differential Connections for Floating Signal Sources

without Bias Resistors

However, for larger source impedances, this conne ction leaves the DIFF signal path significantly
off balance. Noise that couples electrostatically onto the positive line does not couple onto the
negative line because it is connected to ground. This noise appears as a DIFF-mode signal
instead of a common-mode signal, and thus appears in your data. In this case, instead of directly
connecting the negative line to AI GND, connect the negative line to AI GND through a resistor
that is about 100 times the equivalent source impedance. The resistor puts the signal path nearly
in balance, so that about the same amount of noise couples onto both connections, yielding better
rejection of electrostatically coupled noise. This configuration does not load down the source
(other than the very high input impedance of the NI-PGIA).

Figure 4-5. Differential Connections for Floating Signal Sources

with Single Bias Resistor

You can fully balance the signal path by connecting another resistor of the same value between
the positive input and AI GND, as shown in Figure 4-6. This fully balanced configuration of fers
slightly better noise rejection, but has the disadvantage of loading the source down with the
series combination (sum) of the two resistors. If, for example, the source impedance is 2 kΩ and
each of the two resistors is 100 kΩ, the resistors load down the source with 200 kΩ and produce
a -1% gain error.

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Floating

Signal

Source

Figure 4-6. Differential Connections for Floating Signal Sources with

Balanced Bias Resistors

AI+

Bias
Resistors
(see text)

V

Bias

Current

Return

Paths

+

s

–

AI–

Input Multiplexers

AI SENSE

AI GND

Instrumentation

Amplifier

+

PGIA

–

M Series User Manual

+

Measured

V

m

Voltage

–

I/O Connector

M Series Module/Device Configured in Differential Mode

Both inputs of the NI-PGIA require a DC path to ground in order for the NI-PGIA to work. If
the source is AC coupled (capacitively coupled), the NI-PGIA needs a resistor between the
positive input and AI GND. If the source has low-impedance, choose a resistor that is large
enough not to significantly load the source but small enough not to produce significant input
offset voltage as a result of input bias current (typically 100 kΩ to 1 MΩ). In this case, connect
the negative input directly to AI GND. If the source has high output impedance, balance the
signal path as previously described using the same value resistor on both the positive and
negative inputs; be aware that there is some gain error from loading down the source, as shown
in Figure 4-7.

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Chapter 4 Analog Input

–

+

AI GND

V

s

AC Coupled

Floating

Signal

Source

AI+

AI–
AI SENSE

AC Coupling

M Series Device

–

+

AI GND

R

AI SENSE

AI

V

s

Floating

Signal

Source

M Series Device

Figure 4-7. Differential Connections for AC Coupled Floating Sources with

Balanced Bias Resistors

Using Non-Referenced Single-Ended (NRSE)
Connections for Floating Signal Sources

It is important to connect the negative lead of a floating signals source to AI GND (either directly
or through a resistor). Otherwise the source may float out of the valid input range of the NI-PGIA
and the DAQ device returns erroneous data.

Note (NI USB-62xx BNC Devices) To measure a floating signal source on USB

BNC devices, move the switch under the BNC connector to the FS position.

Figure 4-8 shows a floating source connected to the DAQ device in NRSE mode.

Figure 4-8. NRSE Connections for Floating Signal Sources

All of the bias resistor configurations discussed in the Using Differential Connections for

Floating Signal Sources section apply to the NRSE bias resistors as well. Replace AI- with

AI SENSE in Figures 4-4, 4-5, 4-6, and 4-7 for configurations with zero to two bias resistors.
The noise rejection of NRSE mode is better than RSE mode because the AI SENSE connection
is made remotely near the source. However, the noise rejection of NRSE mode is worse than
DIFF mode because the AI SENSE connection is shared with all channels rather than being
cabled in a twisted pair with the AI+ signal.

Using the DAQ Assistant, you can configure the channels for RSE or NRSE input modes. Refer
to the Configuring AI Ground-Reference Settings in Software section for more information about
the DAQ Assistant.

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M Series User Manual

Using Referenced Single-Ended (RSE) Connections f or
Floating Signal Sources

Figure 4-9 shows how to connect a floating signal source to the M Series device configured for
RSE mode.

Figure 4-9. RSE Connections for Floating Signal Sources

AI <0..n>

Programmable Gain

Floating

Signal

Source

+

V

s

–

I/O Connector

Input Multiplexers

AI SENSE

AI GND

Selected Channel in RSE Configuration

Note (NI USB-62xx BNC Devices) To measure a floating signal source on USB

BNC devices, move the switch under the BNC connector to the FS position.

Using the DAQ Assistant, you can configure the channels for RSE or NRSE input modes. Refer
to the Configuring AI Ground-Reference Settings in Software section for more information about
the DAQ Assistant.

Instrumentation

+

PGIA

–

Amplifier

V

m

+

Measured

Voltage

–

Connecting Ground-Referenced Signal Sources

What Are Ground-Referenced Signal Sources?

A ground-referenced signal source is a signal source connected to the building system ground.
It is already connected to a common ground point with respect to the device, assuming that the
computer is plugged into the same power system as the source. Non-isolated outputs of
instruments and devices that plug into the building power system fall into this category.

The difference in ground potential between two instruments connected to the same building
power system is typically between 1 and 100 mV, but the difference can be much higher if power
distribution circuits are improperly connected. If a grounded signal source is incorrectly
measured, this difference can appear as measurement error. Follow the connection instructions
for grounded signal sources to eliminate this ground potential difference from the measured
signal.

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Chapter 4 Analog Input

When to Use Differential Connections with
Ground-Referenced Signal Sources

Use DIFF input connections for any channel that meets any of the following conditions:

• The input signal is low level (less than 1 V).

• The leads connecting the signal to the device are greater than 3 m (10 ft).

• The input signal requires a separate ground-reference point or return signal.

• The signal leads travel through noisy environments.

• T wo analog input channels, AI+ and AI-, are available.

DIFF signal connections reduce noise pickup and increase common-mode noise rejection. DIFF
signal connections also allow input signals to float within the common-mode limits of the
NI-PGIA.

Refer to the Using Differential Connections for Ground-Referenced Signal Sources section for
more information about differential connections.

When to Use Non-Referenced Single-Ended (NRSE)
Connections with Ground-Referenced Signal Sources

Only use non-referenced single-ended input connections if the input signal meets the following
conditions:

• The input signal is high-level (greater than 1 V).

• The leads connecting the signal to the device are less than 3 m (10 ft).

• The input signal can share a common reference point with other signals.

DIFF input connections are recommended for greater signal integrity for any input signal that
does not meet the preceding conditions.

In the single-ended modes, more electrostatic and magnetic noise couples into the signal
connections than in DIFF configurations. The coupling is the result of differences in the signal
path. Magnetic coupling is proportional to the area between the two signal conductors. Electrical
coupling is a function of how much the electric field differs between the two conductors.

With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and
the ground potential difference between the signal source and the device ground.

Refer to the Using Non-Referenced Single-Ended (NRSE) Connections for Ground-Referenced

Signal Sources section for more information about NRSE connections.

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M Series User Manual

When to Use Referenced Single-Ended (RSE)
Connections with Ground-Referenced Signal Sources

Do not use RSE connections with ground-referenced signal sources. Use NRSE or DIFF
connections instead.

As shown in the bottom-rightmost cell of Table 4-3, there can be a potential difference between
AI GND and the ground of the sensor. In RSE mode, this ground loop causes measurement
errors.

Using Differential Connections for Ground-Referenced
Signal Sources

Figure 4-10 shows how to connect a ground-referenced signal source to the M Series device
configured in DIFF mode.

Figure 4-10. Differential Connections for Ground-Referenced Signal Sources

AI+

Ground-

Referenced

Signal

Source

Common-

Mode

Noise and

Ground

Potential

I/O Connector

+

V

s

–

AI–

+

V

cm

–

Input Multiplexers

AI SENSE

AI GND

M Series Device Configured in DIFF Mode

Instrumentation

Amplifier

+

PGIA

–

V

m

+

Measured

Voltage

–

Note (NI USB-62xx BNC Devices) T o measure a ground-referenced signal source

on USB BNC devices, move the switch under the BNC connector to the GS position.

With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and
the ground potential difference between the signal source and the device ground, shown as Vcm
in the figure.

AI+ and AI- must both remain within ±11 V of AI GND.

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Chapter 4 Analog Input

Using Non-Referenced Single-Ended (NRSE)
Connections for Ground-Referenced Signal Sources

Figure 4-11 shows how to connect ground-reference signal sources in NRSE mode.

Figure 4-11. Single-Ended Connections for Ground-Referenced

Signal Sources (NRSE Configuration)

I/O Connector

Ground-

Referenced

Signal

Source

Common-

Mode

Noise

and Ground

Potential

+

V

s

–

+

V

cm

–

AI <0..15>

or AI <16..n>

Instrumentation

Amplifier

+

PGIA

Input Multiplexers

AI GND

M Series Device Configured in NRSE Mode

AI SENSE

or AI SENSE 2

–

V

m

+

Measured

Voltage

–

Note (NI USB-62xx BNC Devices) T o measure a ground-referenced signal source

on USB BNC devices, move the switch under the BNC connector to the GS position.

AI+ and AI- must both remain within ±11 V of AI GND.

To measure a single-ended, ground-referenced signal source, you must use the NRSE
ground-reference setting. Connect the signal to an AI terminal and connect the signal local
ground reference to its AI SENSE. AI SENSE and AI SENSE 2 are internally connected to the
negative input of the NI-PGIA. Therefore, the ground point of the signal connects to the negative
input of the NI-PGIA.

Any potential difference between the device ground and the signal ground appears as a
common-mode signal at both the positive and negative inputs of the NI-PGIA, and this
difference is rejected by the amplifier. If the input circuitry of a devi ce were referenced to
ground, as it is in the RSE ground-reference setting, this difference in ground potentials would
appear as an error in the measured voltage.

Using the DAQ Assistant, you can configure the channels for RSE or NRSE input modes. Refer
to the Configuring AI Ground-Reference Settings in Software section for more information about
the DAQ Assistant.

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M Series User Manual

PFI, RTSI

PXI_STAR

Analog Comparison

Event

20 MHz Timebase

100 kHz Timebase

PXI_CLK10

Programmable

Clock

Divider

Programmable

Clock

Divider

AI Sample Clock

Timebase

AI Convert Clock

Timebase

PFI, RTSI

PXI_STAR

Analog Comparison Event

Ctr n Internal Output

SW Pulse

PFI, RTSI

PXI_STAR

Analog Comparison Event

Ctr n Internal Output

AI Convert Clock

AI Sample Clock

Field Wiring Considerations

Environmental noise can seriously affect the measurement accuracy of the device if you do not
take proper care when running signal wires between signal sources and the device. The
following recommendations apply mainly to AI signal routing to the device, although they also
apply to signal routing in general.

Minimize noise pickup and maximize measurement accuracy by taking the following
precautions:

• Use DIFF AI connections to reject common-mode noise.

• Use individually shielded, twisted-pair wires to connect AI signals to the device. W ith this
type of wire, the signals attached to the positive and negative input channels are twisted
together and then covered with a shield. You then connect this shield only at one point to
the signal source ground. This kind of connection is required for signals traveling through
areas with large magnetic fields or high electromagnetic interference.

Refer to the Field Wiring and Noise Considerations for Analog Signals document for more
information. To access this document, go to

ni.com/info and enter the Info Code rdfwn3.

Analog Input Timing Signals

In order to provide all of the timing functionality described throughout this section, M Series
devices have a flexible timing engine. Figure 4-12 summarizes all of the timing options provided
by the analog input timing engine. Also refer to the Clock Routing section of Chapter 9, Digital

Routing and Clock Generation.

Figure 4-12. Analog Input Timing Options

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Chapter 4 Analog Input

0243 1

AI Start Trigger

AI Sample Clock

AI Convert Clock

Sample Counter

4

M Series devices use AI Sample Clock (ai/SampleClock) and AI Convert Clock
(ai/ConvertClock) to perform interval sampling. As Figure 4-13 shows, AI Sample Clock
(ai/SampleClock) controls the sample period, which is determined by the following equation:

1/Sample Period = Sample Rate

Figure 4-13. Interval Sampling

Channel 0

Channel 1

Convert Period

Sample Period

AI Convert Clock controls the Convert Period, which is determined by the following equation:

1/Convert Period = Convert Rate

Typi cally, this rate is the sampling rate for the task multiplied by the number of channels in the
task.

Note The sampling rate is the fastest you can acquire data on the device and still

achieve accurate results. For example, if an M Series device has a sampling rate of
250 kS/s, this sampling rate is aggregate—one channel at 250 kS/s or two channels
at 125 kS/s per channel illustrates the relationship.

Posttriggered data acquisition allows you to view only data that is acquired after a trigger event
is received. A typical posttriggered DAQ sequence is shown in Figure 4-14. The sample counter
is loaded with the specified number of posttrigger samples, in this example, five. The value
decrements with each pulse on AI Sample Clock, until all desired samples have been acquired.

Figure 4-14. Posttriggered Data Acquisition Example

Pretriggered data acquisition allows you to view data that is acquired before the trigger of
interest, in addition to data acquired after the trigger. Figure 4-15 shows a typical pretriggered
DAQ sequence. AI Start Trigger (ai/StartT rigger) can be either a hardware or software signal. If

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M Series User Manual

n/a

0123 10222

AI Start Trigger

AI Reference Trigger

AI Sample Clock

AI Convert Clock

Scan Counter

AI Start Trigger is set up to be a software start trigger , an output pulse appears on the
ai/StartTr igger line when the acquisition begins. When the AI Start Trigger pulse occurs, the
sample counter is loaded with the number of pretriggered samples, in this example, four. The
value decrements with each pulse on AI Sample Clock. The sample co unter is then loaded wit h
the number of posttriggered samples, in this example, three.

Figure 4-15. Pretriggered Data Acquisition Example

If an AI Reference Trigger (ai/ReferenceTrigger) pulse occurs before the specified number of
pretrigger samples are acquired, the trigger pulse is ignored. Otherwise, when the AI Reference
Trigger pulse occurs, the sample counter value decrements until the specified number of
posttrigger samples have been acquired.

M Series devices feature the following analog input timing signals:

• AI Sample Clock Signal

• AI Sample Clock Timebase Signal

• AI Convert Clock Signal

• AI Convert Clock Timebase Signal

• AI Hold Complete Event Signal

• AI Start Trigger Signal

• AI Reference Trigger Signal

• AI Pause Trigger Signal

AI Sample Clock Signal

Use the AI Sample Clock (ai/SampleClock) signal to initiate a set of measurements. Your
M Series device samples the AI signals of every channel in the task once for every AI Sample
Clock. A measurement acquisition consists of one or more samples.

You can specify an internal or external source for AI Sample Clock. You also can specify
whether the measurement sample begins on the rising edge or falling edge of AI Sample Clock.

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Chapter 4 Analog Input

Using an Internal Source

One of the following internal signals can drive AI Sample Clock:

• Counter n Internal Output

• AI Sample Clock Timebase (divided down)

• A pulse initiated by host software

A programmable internal counter divides down the sample clock timebase.

Several other internal signals can be routed to AI Sample Clock through RTSI. Refer to Device
Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.

Using an External Source

Use one of the following external signals as the source of AI Sample Clock:

• PFI <0..15>

•RTSI <0..7>

• PXI_STAR

• Analog Comparison Event (an analog trigger)

Routing AI Sample Clock Signal to an Output Terminal

You can route AI Sample Clock out to any PFI <0..15> or RTSI <0..7> terminal. This pulse is
always active high.

You can specify the output to have one of two behaviors. With the pulse behavior, your DAQ
device briefly pulses the PFI terminal once for every occurrence of AI Sample Clock.

With level behavior, your DAQ device drives the PFI terminal high during the entire sample.
All PFI terminals are configured as inputs by default.

Other Timing Requirements

Your DAQ device only acquires data during an acquisition. The device ignores AI Sample Clock
when a measurement acquisition is not in progress. During a measurement acquisition, you can
cause your DAQ device to ignore AI Sample Clock using the AI Pause Trigger signal.

A counter on your device internally generates AI Sample Clock unless you select some external
source. AI Start Trigger starts this counter and either software or hardware can stop it once a
finite acquisition completes. When using an internally generated AI Sample Clock, you also can
specify a configurable delay from AI Start Trigger to the first AI Sample Clock pulse. By default,
this delay is set to two ticks of the AI Sample Clock Timebase signal. When using an externa lly
generated AI Sample Clock, you must ensure the clock signal is consistent with respect to the
timing requirements of AI Convert Clock. Failure to do so may result in AI Sample Clock pulses
that are masked off and acquisitions with erra tic sampling int ervals. Refer to AI Convert Clock
Signal for more information about the timing requirements between AI Convert Clock and AI
Sample Clock.

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M Series User Manual

AI Sample Clock Timebase

AI Start Trigger

AI Sample Clock

Delay
From

Start

Trigger

Figure 4-16 shows the relationship of AI Sample Clock to AI Start Trigger.

Figure 4-16. AI Sample Clock and AI Start Trigger

AI Sample Clock Timebase Signal

You can route any of the following signals to be the AI Sample Clock Timebase
(ai/SampleClockTimebase) signal:

• 20 MHz Timebase

• 100 kHz Timebase

• PXI_CLK10

•RTSI <0..7>

• PFI <0..15>

• PXI_STAR

• Analog Comparison Event (an analog trigger)

AI Sample Clock Timebase is not available as an output on th e I/O connector. AI Sample Clock
Timebase is divided down to provide one of the possible sources for AI Sample Clock. You can
configure the polarity selection for AI Sample Clock Timebase as either rising or falling edge.

AI Convert Clock Signal

Use the AI Convert Clock (ai/ConvertClock) signal to initiate a single A/D conversion on a
single channel. A sample (controlled by the AI Sample Clock) consists of one or more
conversions.

Y ou can specify either an internal or external signal as the source of AI Convert Clock. You also
can specify whether the measurement sample begins on the rising edge or falling edge of AI
Convert Clock.

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Chapter 4 Analog Input

NI-DAQmx chooses the fastest conversion rate possible based on the speed of the A/D converter
and adds 10 μs of padding between each channel to allow for adequate settling time . T his
scheme enables the channels to approximate simultaneous sampling a nd still allow for adequate
settling time. If the AI Sample Clock rate is too fast to allow for this 10 μs of padding,
NI-DAQmx chooses the conversion rate so that the AI Convert Clock pulses are evenly spaced
throughout the sample.

To explicitly specify the conversion rate, use AI Convert Clock Rate DAQmx Timing property
node or function.

Note Setting the conversion rate higher than the maximum rate specified for your

device will result in errors.

Using an Internal Source

One of the following internal signals can drive AI Convert Clock:

• AI Convert Clock Timebase (divided down)

• Counter n Internal Output

A programmable internal counter divides down the AI Convert Clock Timeb ase to generate AI
Convert Clock. The counter is started by AI Sample Clock and continues to count down to zero,
produces an AI Convert Clock, reloads itself, and repeats the process until the sample is finished.
It then reloads itself in preparation for the next AI Sample Clock pulse.

Using an External Source

Use one of the following external signals as the source of AI Convert Clock:

• PFI <0..15>

•RTSI <0..7>

• PXI_STAR

• Analog Comparison Event (an analog trigger)

Routing AI Convert Clock Signal to an Output Terminal

You can route AI Convert Clock (as an active low signal) out to any PFI <0..15> or RTSI <0..7>
terminal.

All PFI terminals are configured as inputs by default.

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M Series User Manual

Using a Delay from Sample Clock to Convert Clock

When using an internally generated AI Convert Clock, you also can specify a configurable delay
from AI Sample Clock to the first AI Convert Clock pulse within the sample. By default, this
delay is three ticks of AI Convert Clock Timebase.

Figure 4-17 shows the relationship of AI Sample Clock to AI Convert Clock.

Figure 4-17. AI Sample Clock and AI Convert Clock

AI Convert Clock Timebase

AI Sample Clock

AI Convert Clock

Delay from

Sample

Clock

Convert

Period

Other Timing Requirements

The sample and conversion level timing of M Series devices work such that clock signals are
gated off unless the proper timing requirements are met. For example, the device ignores both
AI Sample Clock and AI Convert Clock until it receives a valid AI Start Trigger signal. Once
the device recognizes an AI Sample Clock pulse, it ignores subsequent AI Sample Clock pulses
until it receives the correct number of AI Convert Clock pulses.

Similarly, the device ignores all AI Convert Clock pulses until it recognizes an AI Sample Clock
pulse. Once the device receives the correct number of AI Convert Clock pulses, it ignores
subsequent AI Convert Clock pulses until it receives another AI Sample Clock. Figures 4-18,

4-19, 4-20, and 4-21 show timing sequences for a four-channel acquisiti on ( using AIchannels
0, 1, 2, and 3) and demonstrate proper and improper sequencing of AI Sample Clock and AI
Convert Clock.

Figure 4-18. AI Sample Clock Pulses Are Gated Off;

AI Sample Clock Too Fast For Convert Clock

AI Sample Clock

AI Convert Clock

Channel Measured 1 2 30

Sample #1 Sample #2 Sample #3

12301230

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Chapter 4 Analog Input

AI Sample Clock

AI Convert Clock

Sample #1 Sample #2 Sample #3

1230

12301230

Channel Measured

AI Sample Clock

AI Convert Clock

Sample #1 Sample #2 Sample #3

1230

0

Channel Measured

1230

AI Sample Clock

AI Convert Clock

Sample #1 Sample #2 Sample #3

Channel Measured 1 2 30

12301230

Figure 4-19. AI Convert Clock T oo Fast F or AI Sample Clock; AI Convert Clock Pulses Are

Gated Off

Figure 4-20. AI Sample Clock and AI Convert Clock Improperly Matched;

Leads to Aperiodic Sampling

Figure 4-21. AI Sample Clock and AI Convert Clock Properly Matched

It is also possible to use a single external signal to drive both AI Sample Clock and AI Convert
Clock at the same time. In this mode, each tick of the external clock causes a conversion on the
ADC. Figure 4-22 shows this timing relationship.

Figure 4-22. One External Signal Driving Both Clocks Simultaneously

AI Sample Clock

AI Convert Clock

Channel Measured

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1230

Sample #1 Sample #2 Sample #3

12301…0

M Series User Manual

AI Convert Clock Timebase Signal

The AI Convert Clock Timebase (ai/ConvertClockTimebase) signal is divided down to provide
one of the possible sources for AI Convert Clock. Use one of the following signals as the source
of AI Convert Clock Timebase:

• AI Sample Clock Timebase

• 20 MHz Timebase

AI Convert Clock Timebase is not available as an output on the I/O connector.

AI Hold Complete Event Signal

The AI Hold Complete Event (ai/HoldCompleteEvent) signal generatesa pulse after each A/D
conversion begins. You can route AI Hold Complete Event out to any PFI <0..15> or
RTSI <0..7> terminal.

The polarity of AI Hold Complete Event is software-selectable, but is typically configured so
that a low-to-high leading edge can clock external AI multiplexers indicating when the input
signal has been sampled and can be removed.

AI Start Trigger Signal

Use the AI Start Trigger (ai/StartTrigger) signal to begin a measurement acquisition. A
measurement acquisition consists of one or more samples. If you do not use triggers, begin a
measurement with a software command. On ce the acquisition begins, conf igure the acquisition
to stop:

• When a certain number of points are sampled (in finite mode)

• After a hardware reference trigger (in finite mode)

• With a software command (in continuous mode)

An acquisition that uses a start trigger (but not a reference tri gger) is som etimes refe rred to as a
posttriggered acquisition.

Using a Digital Source

To use AI Start Trigger with a digital source, specify a source and an edge. The source can be
any of the following signals:

• PFI <0..15>

•RTSI <0..7>

• Counter n Internal Output

• PXI_STAR

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Chapter 4 Analog Input

The source also can be one of several other internal signals on your DAQ device. Refer to Device
Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.

You also can specify whether the measurement acquisition begins on the rising edge or falling
edge of AI Start Trigger.

Using an Analog Source

When you use an analog trigger source, the acquisition begins on the first rising edge of the
Analog Comparison Event signal.

Routing AI Start Trigger to an Output Terminal

You can route AI Start Trigger out to any PFI <0..15> or RTSI <0..7> terminal. The output is an
active high pulse. All PFI terminals are configured as inputs by default.

The device also uses AI Start Trigger to initiate pretriggered DAQ operations. In most
pretriggered applications, a software trigger generates AI Start T rigger . Refer to the AI Reference

Trigger Signal section for a complete description of the use of AI St art Trigger and AI Reference

Trigger in a pretriggered DAQ operation.

AI Reference Trigger Signal

Use AI Reference Trigger (ai/ReferenceTrigger) signal to stop a measurement acquisition. To
use a reference trigger, specify a buffer of finite size and a number of pretrigger samples
(samples that occur before the reference trigger). The number of posttrigger samples (samples
that occur after the reference trigger) desired is the buffer size minus the number of pretrigger
samples.

Once the acquisition begins, the DAQ device writes samples to the buffer. After the DAQ device
captures the specified number of pretrigger samples, the DAQ device begins to look for the
reference trigger condition. If the reference trigger condition occurs before the DAQ device
captures the specified number of pretrigger samples, the DAQ device ignores the condition.

If the buffer becomes full, the DAQ device continuously discards the oldest samples in the buffer
to make space for the next sample. This data can be accessed (with some limita tions) befo re the
DAQ device discards it. Refer to the KnowledgeBase document, Can a Pretriggered Acquisition
be Continuous?, for more information. T o access this KnowledgeBase, go to
and enter the Info Code rdcanq.

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M Series User Manual

When the reference trigger occurs, the DAQ device continues to write samples to the buffer until
the buffer contains the number of posttrigger samples desired. Figure 4-23 shows the final
buffer.

Figure 4-23. Reference Trigger Final Buffer

Reference Trigger

Pretrigger Samples

Complete Buffer

Posttrigger Samples

Using a Digital Source

To use AI Reference Trigger with a digital source, specify a source and an edge. The source can
be any of the following signals:

• PFI <0..15>

•RTSI <0..7>

• PXI_STAR

The source also can be one of several internal signals on your DAQ device. Refer to Device
Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.

You also can specify whether the measurement acquisition stops on the rising edge or falling
edge of AI Reference Trigger.

Using an Analog Source

When you use an analog trigger source, the acquisition stops on the first rising edge of the
Analog Comparison Event signal.

Routing AI Reference Trigger Signal to an Output Terminal

You can route AI Reference Trigger out to any PFI <0..15> or RTSI <0..7> terminal.

All PFI terminals are configured as inputs by default.

AI Pause Trigger Signal

Use the AI Pause Trigger (ai/PauseTrigger) signal to pause and resume a measurement
acquisition. The internal sample clock pauses while the external trigge r signal is active and
resumes when the signal is inactive. You can program the active level of the pause trigger to be
high or low.

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Chapter 4 Analog Input

Using a Digital Source

To use AI Pause Trigger, specify a source and a polarity. The source can be any of the following
signals:

• PFI <0..15>

•RTSI <0..7>

• PXI_STAR

The source also can be one of several other internal signals on your DAQ device. Refer to Device
Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.

Using an Analog Source

When you use an analog trigger source, the internal sample clock pauses when the Analog
Comparison Event signal is low and resumes when the signal goes high (or vice versa).

Routing AI Pause Trigger Signal to an Output Terminal

You can route AI Pause Trigger out to RTSI <0..7>.

Note Pause triggers are only sensitive to the level of the source, not the edge.

Getting Star ted with AI Applications in Software

You can use the M Series device in the following analog input applications:

• Single-point analog input

• Finite analog input

• Continuous analog input

You can perform these applications through DMA, interrupt, or programmed I/O data transfer
mechanisms. Some of the applications also use start, reference, and pause triggers.

Note For more information about programming analog input applications and

triggers in software, refer to the NI-DAQmx Help or the LabVIEW Help.

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5

AO 2

AO 3

DAC2

DAC3

AO Data

AO FIFO

AO Sample Clock
AO Offset Select
AO Reference Select

AO 0

AO 1

DAC0

DAC1

Analog Output

Many M Series devices have analog output functionality. M Series devices that support analog
output have either two or four AO channels that are controlled by a single clock and are capable
of waveform generation. Refer to the specifications document for your device for information
about the capabilities of your device.

Figure 5-1 shows the analog output circuitry of M Series devices.

Figure 5-1. M Series Analog Output Circuitry

The main blocks featured in the M Series analog output circuitry are as follows:

• DACs—Digital-to-analog converters (DACs) convert digital codes to analog voltages.

• AO FIFO—The AO FIFO enables analog output waveform generation. It is a

first-in-first-out (FIFO) memory buffer between the computer and the DACs. It allows you
to download the points of a waveform to your M Series device without host computer
interaction.

• AO Sample Clock—The AO Sample Clock signal reads a sample from the DAC FIFO and

generates the AO voltage.

• AO Offset and AO Reference Selection—AO offset and AO reference selection signals

allow you to change the range of the analog outputs.

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Chapter 5 Analog Output

AO Offset and AO Reference Selection

AO offset and AO reference selection allow you to set the AO range. The AO range describes
the set of voltages the device can generate. The digital codes of the DAC are spread evenly
across the AO range. So, if the range is smaller, the AO has better re solution; that is, th e voltage
output difference between two consecutive codes is smaller. Therefore, the AO is more accurate.

The AO range of a device is all of the voltages between:

(AO Offset - AO Reference) and (AO Offset + AO Reference)

The possible settings for AO reference depend on the device model. For models not described
below, refer to the specifications for your device.

(NI 622x Devices) On NI 622x devices, the AO offset is always 0 V (AO GND). The

•
AO reference is always 10 V. So, for NI 622x devices, the AO range = ±10 V.

•

(NI 625x Devices) On NI 625x devices, the AO offset is always 0 V (AO GND). The

AO reference of each analog output (AO <0..3>) can be individually set to one of the
following:

– ±10 V
–±5V
– ±APFI <0,1>
You can connect an external signal to APFI <0,1> to provide the AO reference. The

AO reference can be a positive or negative voltage. If AO reference is a negative voltage,
the polarity of the AO output is inverted. The valid ranges of APFI <0,1> are listed in the
device specifications.

Y ou can use one of the AO<0..3> signals to be the AO reference for a different AO signal.
However, you must externally connect this channel to APFI 0 or APFI 1.

•

(NI 628x Devices) On NI 628x devices, the AO offset of each analog output can be

individually set to one of the following:
– 0 V (AO GND)
–5V
– APFI <0,1>
– AO <0..3>
You can connect an external signal to APFI <0,1> to provide the AO offset.
Y ou can route the output of one of the AO <0..3> signals to be the AO offset for a different

AO <0..3> signal. For example, AO 0 can be routed to be the AO offset of AO 1. This route
is done on the device; no external connections are required.

You cannot route an AO channel to be its own offset.

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M Series User Manual

On NI 628x devices, the AO reference of each analog output can be individually set to one
of the following:

– ±10 V
–±5V
– ±APFI <0,1>
– ±AO <0..3>
You can connect an external signal to APFI <0,1> to provide the AO reference.
You can route the output of one of the AO <0..3> signals to be the AO reference for a

different AO <0..3> signal. For example, AO 0 can be routed to be the AO reference of
AO 1. This route is done on the device; no external connections are required.

You cannot route an AO channel to be its own reference.
The AO reference can be a positive or negative voltage. If AO reference is a negative

voltage, the polarity of the AO output is inverted.

Note When using an external reference, the output signal is not calibrated in

software. You can generate a value and measure the voltage offset to calibrate your
output in software.

Minimizing Glitches on the Output Signal

When you use a DAC to generate a waveform, you may observe glitches on the output signal.
These glitches are normal; when a DAC switches from one voltage to another, it produces
glitches due to released charges. The larg est glitches occur when the most significant bit of the
DAC code changes. You can build a lowpass deglitching filter to remove some of these glitches,
depending on the frequency and nature of the output signal. Visit
information about minimizing glitches.

ni.com/support for more

Analog Output Data Generation Methods

When performing an analog output operation, you either can perform software-timed or
hardware-timed generations.

Software-Timed Generations

With a software-timed generation, software controls the rate at which data is generated. Software
sends a separate command to the hardware to initiate each DAC conversion. In NI-DAQmx,
software-timed generations are referred to as on-demand timing. Software-timed generations are
also referred to as immediate or static operations. They are typically used for writing a single
value out, such as a constant DC voltage.

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Chapter 5 Analog Output

Hardware-Timed Generations

With a hardware-timed generation, a digital hardware signal controls the rate of the generation.
This signal can be generated internally on your device or provided externally.

Hardware-timed generations have several advantages over software-timed acquisitions:

• The time between samples can be much shorter.

• The timing between samples can be deterministic.

• Hardware-timed generations can use hardware triggering.

Hardware-timed operations can be buffered or non-buffered. A buffer is a temporary storage in
computer memory for to-be-generated samples.

• Buffered—In a buffered acquisition, data is moved from a PC buffer to the DAQ device’s
onboard FIFO using DMA or interrupts for NI PCI/PCIe/PXI/PXIe devices or USB Signal
Streams for USB devices before it is written to the DACs one sample at a time. Buffered
acquisitions typically allow for much faster transfer rates than non-buffered acquisitions
because data is moved in large blocks, rather than one point at a time.

One property of buffered I/O operations is the sample mode. The sample mode can be either
finite or continuous:

– Finite sample mode generation refers to the generation of a specific, predetermined

number of data samples. Once the specified number of samples has been written out,
the generation stops.

– Continuous generation refers to the generation of an unspecified number of samples.

Instead of generating a set number of data samples and stopping, a continuous
generation continues until you stop the operation. There are several different methods
of continuous generation that control what data is written. These methods are
regeneration, FIFO regeneration and non-regeneration modes:

• Regeneration is the repetition of the data that is already in the buffer. S tandard
regeneration is when data from the PC buffer is continually down loaded to the
FIFO to be written out. New data can be written to the PC buffer at any time
without disrupting the output.

• With FIFO regeneration, the entire buffer is downloaded to the FIFO and
regenerated from there. Once the data is downloaded, new data cannot be written
to the FIFO. T o use FIFO regeneration, the entire buffer must fit within the FIFO
size. The advantage of using FIFO regeneration is that it does not require
communication with the main host memory once the operation is started, thereby
preventing any problems that may occur due to excessive bus traffic.

• With non-regeneration, old data is not repeated. New data must be continually
written to the buffer . If the program does not write new data to the buffer at a fast
enough rate to keep up with the generation, the buffer underflows and causes an
error.

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M Series User Manual

Load

Load

V OUT

V OUT

+

–

+

–

AO GND

AO 3

Analog Output Channels

AO 2

Channel 3

Connector 1 (AI 16–31)

Channel 2

M Series Device

Load

Load

V OUT

V OUT

+

–

+

–

AO GND

AO 1

Analog Output Channels

M Series Device

AO 0

Channel 1

Channel 0

Connector 0 (AI 0 –15)

• Non-buffered—In non-buffered acquisitions, data is written directly to the DACs on the
device. Typically, hardware-timed, non-buffered operations are used to write single
samples with good latency and known time increments between them.

Note (NI USB-62xx Devices) USB M Series devices do not support non-buffered

hardware-timed operations.

Analog Output Triggering

Analog output supports two different triggering actions:

• Start trigger

• Pause trigger

An analog or digital trigger can initiate these actions. All M Series devices support digital
triggering, but some do not support analog triggering. To find your device’s triggering options,
refer to the specifications document for your device. Refer to the AO Start Trigger Signal and

AO Pause Trigger Signal sections for more information about these triggering actions.

Connecting Analog Output Signals

AO <0..3> are the voltage output signals for AO channels 0, 1, 2, and 3. AO GND is the ground
reference for AO <0..3>.

Figure 5-2 shows how to make AO connections to the device.

Figure 5-2. Analog Output Connections

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Chapter 5 Analog Output

PFI, RTSI

PXI_STAR

Analog Comparison

Event

20 MHz Timebase

100 kHz Timebase

PXI_CLK10

Programmable

Clock

Divider

AO Sample Clock

Timebase

PFI, RTSI

PXI_STAR

Analog Comparison Event

Ctr n Internal Output

AO Sample Clock

Analog Output Timing Signals

Figure 5-3 summarizes all of the timing options provided by the analog output timing engine.

Figure 5-3. Analog Output Timing Options

M Series devices feature the following AO (waveform generation) timing signals:

• AO Start Trigger Signal

• AO Pause Trigger Signal

• AO Sample Clock Signal

• AO Sample Clock Timebase Signal

AO Start Trigger Signal

Use the AO Start Trigger (ao/StartTrigger) signal to initiate a waveform generation. If you do
not use triggers, you can begin a generation with a software command.

Using a Digital Source

To use AO Start Trigger, specify a source and an edge. The source can be one of the following
signals:

• A pulse initiated by host software

• PFI <0..15>

• RTSI<0..7>

• AI Reference Trigger (ai/ReferenceTrigger)

• AI Start Trigger (ai/St artTrigger)

• PXI_STAR

The source also can be one of several internal signals on your DAQ device. Refer to Device
Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.

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M Series User Manual

Pause Trigger

Sample Clock

Y ou also can specify whether the waveform generation begins on the rising edge or falling edge
of AO Start Trigger.

Using an Analog Source

When you use an analog trigger source, the waveform generation begins on the first rising edge
of the Analog Comparison Event signal. Refer to the Triggering with an Analog Source section
of Chapter 11, Triggering, for more information.

Routing AO Start Trigger Signal to an Output Terminal

You can route AO Start Trigger out to any PFI <0..15> or RTSI <0..7> terminal.

The output is an active high pulse. PFI terminals are configured as inputs by default.

AO Pause Trigger Signal

Use the AO Pause Trigger (ao/PauseTrigger) signal to mask off samples in a DAQ sequence.
That is, when AO Pause Trigger is active, no samples occur.

AO Pause Trigger does not stop a sample that is in progress. The pause does not take effect until
the beginning of the next sample.

When you generate analog output signals, the generation pauses as soon as the pause trigger is
asserted. If the source of your sample clock is the onboard clock, the generation resumes as soon
as the pause trigger is deasserted, as shown in Figure 5-4.

Figure 5-4. AO Pause Trigger with the Onboard Clock Source

Pause Trigger

Sample Clock

If you are using any signal other than the onboard clock as the source of your sample clock, the
generation resumes as soon as the pause trigger is deasserted and another edge of the sample
clock is received, as shown in Figure 5-5.

Figure 5-5. AO PauseTrigger with Other Signal Source

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Chapter 5 Analog Output

Using a Digital Source

To use AO Pause Trigger, specify a source and a polarity. The source can be one of the following
signals:

• PFI <0..15>

• RTSI<0..7>

• PXI_STAR

The source also can be one of several other internal signals on your DAQ device. Refer to Device
Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.

You also can specify whether the samples are paused when AO Pause Trigger is at a logic high
or low level.

Using an Analog Source

When you use an analog trigger source, the samples are paused when the Analog Comparison
Event signal is at a high level. Refer to the Triggering with an Analog Source section of
Chapter 11, Triggering, for more information.

Routing AO Pause Trigger Signal to an Output Terminal

You can route AO Pause Trigger out to RTSI <0..7>.

AO Sample Clock Signal

Use the AO Sample Clock (ao/SampleClock) signal to initiate AO samples. Each sample
updates the outputs of all of the DACs. You can specify an internal or external source for AO
Sample Clock. You also can specify whether the DAC update begins on the rising edge or falling
edge of AO Sample Clock.

Using an Internal Source

One of the following internal signals can drive AO Sample Clock:

• AO Sample Clock Timebase (divided down)

• Counter n Internal Output

A programmable internal counter divides down the AO Sample Clock Timebase signal.

Using an External Source

Use one of the following external signals as the source of AO Sample Clock:

• PFI <0..15>

• RTSI<0..7>

• PXI_STAR

• Analog Comparison Event (an analog trigger)

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M Series User Manual

Routing AO Sample Clock Signal to an Output Terminal

You can route AO Sample Clock (as an active low signal) out to any PFI <0..15> or RTSI <0..7>
terminal.

Other Timing Requirements

A counter on your device internally generates AO Sample Clock unless you select some external
source. AO Start Trigger starts the counter and either the software or hardware can stop it once
a finite generation completes. When using an internally generated AO Sample Clock, you also
can specify a configurable delay from AO Start Trigger to the first AO Sample Clock pulse. By
default, this delay is two ticks of AO Sample Clock Timebase.

Figure 5-6 shows the relationship of AO Sample Clock to AO Start Trigger.

Figure 5-6. AO Sample Clock and AO Start T rigger

AO Sample Clock Timebase

AO Start Trigger

AO Sample Clock

Delay
From

Start

Trigger

AO Sample Clock Timebase Signal

The AO Sample Clock Timebase (ao/SampleClockTimebase) signal is divided down to provide
a source for AO Sample Clock.

You can route any of the following signals to be the AO Sample Clock Timebase signal:

•20MHzTimebase

• 100 kHz Timebase

• PXI_CLK10

• PFI <0..15>

• RTSI<0..7>

• PXI_STAR

• Analog Comparison Event (an analog trigger)

AO Sample Clock Timebase is not available as an output on the I/O connector.

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Chapter 5 Analog Output

You might use AO Sample Clock Timebase if you want to use an external sample clock signal,
but need to divide the signal down. If you want to use an external sample clock signal, but do
not need to divide the signal, then you should use AO Sample Clock rather than AO Sample
Clock Timebase.

Getting Started with AO Applications in Software

You can use an M Series device in the following analog output applications:

• Single-point (on-demand) generation

• Finite generation

• Continuous generation

• Waveform generation

You can perform these generations through programmed I/O, interrupt, or DMA data transfer
mechanisms. Some of the applications also use start triggers and pause triggers.

Note For more information about programming analog output applications and

triggers in software, refer to the NI-DAQmx Help or the LabVIEW Help.

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6

x

Digital I/O

M Series devices contain up to 32 lines of bidirectional DIO signals on Port 0. In addition,
M Series devices have up to 16 PFI signals that can function as static DIO signals.

M Series devices support the following DIO features on Port 0:

• Up to 32 lines of DIO

• Direction and function of each terminal individually controllable

• Static digital input and output

• High-speed digital waveform generation

• High-speed digital waveform acquisition

• DI change detection trigger/interrupt

Figure 6-1 shows the circuitry of one DIO line. Each DIO line is similar . The following sections
provide information about the various parts of the DIO circuit.

Figure 6-1. M Series Digital I/O Circuitry

DO Waveform

Generation FIFO

DO Sample Clock

Static DO

Buffer

DO.x Direction Control

Static DI

DI Waveform

Measurement

FIFO

DI Sample Clock

DI Change

Detection

The DIO terminals are named P0.<0..31> on the M Series device I/O connector.

I/O Protection

Weak Pull-Down

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P0.

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Chapter 6 Digital I/O

The voltage input and output levels and the current drive levels of the DIO lines are listed in the
specifications of your device.

Static DIO

Each of the M Series DIO lines can be used as a static DI or DO line. You can use static DIO
lines to monitor or control digital signals. Each DIO can be individually configured as a digital
input (DI) or digital output (DO).

All samples of static DI lines and updates of DO lines are software-timed.

P0.6 and P0.7 on 68-pin M Series devices also can control the up/down input of general-purpose
counters 0 and 1, respectively. However, it is recommended that you use PFI signals to control
the up/down input of the counters. The up/down control signals, Counter 0 Up_Down and
Counter 1 Up_Down, are input-only and do not affect the operation of the DIO lines.

Digital Waveform Triggering

M Series devices do not have an independent DI or DO Start Trigger for digital waveform
acquisition or generation. To trigger a DI or DO operation, first select a signal to be the source
of DI Sample Clock or DO Sample Clock. Then, generate a trigger that initiates pulses on the
source signal. The method for generating this trigger depends on which signal is the source of
DI Sample Clock or DO Sample Clock.

For example, consider the case where you are using AI Sample Clock as the source of DI Sample
Clock. To initiate pulses on AI Sample Clock (and therefore on DI Sample Clock), you use
AI Start T rigger to trigger the start of an AI operation. The AI Start T rigger causes the M Series
device to begin generating AI Sample clock pulses, which in turn generates DI Sample clock
pulses, as shown in Figure 6-2.

Figure 6-2. Digital Waveform Triggering

(AI Start Trigger)

PFI 1

AI Start Trigger initiates
AI Sample Clock and DI Sample Clock.

AI Sample Clock

DI Sample Clock

Similarly, if you are using AO Sample Clock as the source of DI Sample Clock, then AO Start
Trigger initiates both AO and DI operations.

If you are using a Counter output as the source of DI Sample Clock, the counter’s start trigger,
enables the counter which drives DI Sample Clock.

If you are using an external signal (such as PFI x) as the source for DI Sample Clock or DO
Sample Clock, you must trigger that external signal.

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M Series User Manual

Digital Waveform Acquisition

You can acquire digital waveforms on the Port 0 DIO lines. The DI waveform acquisition FIFO
stores the digital samples. M Series devices have a DMA controller dedicated to moving data
from the DI waveform acquisition FIFO to system memory. The DAQ device samples the DIO
lines on each rising or falling edge of a clock signal, DI Sample Clock.

Y ou can configure each DIO line to be an output, a static input, or a digital waveform acquisition
input.

M Series devices feature the DI Sample Clock Signal digital input timing signal.

DI Sample Clock Signal

Use the DI Sample Clock (di/SampleClock) signal to sample the P0.< 0..31> terminals and store
the result in the DI waveform acquisition FIFO. M Series devices do not have the ability to
divide down a timebase to produce an internal DI Sample Clock for digital waveform
acquisition. Therefore, you must route an external signal or one of many internal signals from
another subsystem to be the DI Sample Clock. For example, you can correlate digital and analog
samples in time by sharing your AI Sample Clock or AO Sample Clock as the source of your DI
Sample Clock. To sample a digital signal independent of an AI, AO, or DO operation, you can
configure a counter to generate the desired DI Sample Clock or use an external signa l as the
source of the clock.

If the DAQ device receives a DI Sample Clock when the FIFO is full, it reports an overflow error
to the host software.

Using an Internal Source

To use DI Sample Clock with an internal source, specify the signal source and the polarity of the
signal. The source can be any of the following signals:

• AI Sample Clock (ai/SampleClock)

• AI Convert Clock (ai/ConvertClock)

• AO Sample Clock (ao/SampleClock)

• Counter n Internal Output

• Frequency Output

• DI Change Detection Output

Several other internal signals can be routed to DI Sample Clock through RTSI. Refer to Device
Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.

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Chapter 6 Digital I/O

Using an External Source

You can route any of the following signals as DI Sample Clock:

• PFI <0..15>

•RTSI <0..7>

• PXI_STAR

• Analog Comparison Event (an analog trigger)

You can sample data on the rising or falling edge of DI Sample Clock.

Routing DI Sample Clock to an Output Terminal

You can route DI Sample Clock out to any PFI terminal. The PFI circuitry inverts the polarity
of DI Sample Clock before driving the PFI terminal.

Digital Waveform Generation

You can generate digital waveforms on the Port 0 DIO lines. The DO waveform generation
FIFO stores the digital samples. M Series devices have a DMA controller dedicated to moving
data from the system memory to the DO waveform generation FIFO. The DAQ device moves
samples from the FIFO to the DIO terminals on each rising or falling edge of a clock signal, DO
Sample Clock. You can configure each DIO signal to be an input, a static output, or a digital
waveform generation output.

The FIFO supports a retransmit mode. In the retransmit mode, after all the samples in the FIFO
have been clocked out, the FIFO begins outputting all of the samples again in the same order.
For example, if the FIFO contains five sample s, the pattern generated consists of sample #1, #2,
#3, #4, #5, #1, #2, #3, #4, #5, #1, and so on.

M Series devices feature the DO Sample Clock Signal digital output timing signal.

DO Sample Clock Signal

Use the DO Sample Clock (do/SampleClock) signal to update the DO terminals with the next
sample from the DO waveform generation FIFO. M Series devices do not have the ability to
divide down a timebase to produce an internal DO Sample Clock for digital waveform
generation. Therefore, you must route an external signal or one of many internal signals from
another subsystem to be the DO Sample Clock. For example, you can correlate digital and
analog samples in time by sharing your AI Sample Clock or AO Sample Clock as the source of
your DO Sample Clock. To generate digital data independent of an AI, AO, or DI operation, you
can configure a counter to generate the desired DO Sample Clock or use an external signal as
the source of the clock.

If the DAQ device receives a DO Sample Clock when the FIFO is empty, the DAQ device
reports an underflow error to the host software.

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M Series User Manual

Using an Internal Source

To use DO Sample Clock with an internal source, sp ecify the signal source and the polarity of
the signal. The source can be any of the following signals:

• AI Sample Clock (ai/SampleClock)

• AI Convert Clock (ai/ConvertClock)

• AO Sample Clock (ao/SampleClock)

• Counter n Internal Output

• Frequency Output

• DI Change Detection Output

Several other internal signals can be routed to DO Sample Clock through R TSI. Refer to Device
Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.

Using an External Source

You can route any of the following signals as DO Sample Clock:

• PFI <0..15>

•RTSI <0..7>

• PXI_STAR

• Analog Comparison Event (an analog trigger)

You can generate samples on the rising or falling edge of DO Sample Clock.

Y ou must ensure that the time between two a ctive edges of DO Sample Clock is not too short. If
the time is too short, the DO waveform generation FIFO is not able to read the next sample fast
enough. The DAQ device reports an overrun error to the host software.

Routing DO Sample Clock to an Output Terminal

You can route DO Sample Clock out to any PFI terminal. The PFI circuitry inverts the polarity
of DO Sample Clock before driving the PFI terminal.

I/O Protection

Each DIO and PFI signal is protected against overvoltage, undervoltage, and overcurrent
conditions as well as ESD events. However, you should avoid these fault conditions by
following these guidelines:

• If you configure a PFI or DIO line as an output, do not connect it to any external signal
source, ground, or power supply.

• If you configure a PFI or DIO line as an output, understand the current requirements of the
load connected to these signals. Do not exceed the specified current output limits of the
DAQ device. NI has several signal conditioning solutions for digital applications requiring
high current drive.

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Chapter 6 Digital I/O

• If you configure a PFI or DIO line as an input, do not drive the line with voltages outside
of its normal operating range. The PFI or DIO lines have a smaller operating range than the
AI signals.

• Treat the DAQ device as you would treat any static sensitive device. Always properly
ground yourself and the equipment when handling the DAQ device or connecting to it.

Programmable Power-Up States

At system startup and reset, the hardware sets all PFI and DIO lines to high-impedance inputs
by default. The DAQ device does not drive the signal high or low. Each line has a weak
pull-down resistor connected to it, as described in the specifications document for your device.

NI-DAQmx supports programmable power-up states for PFI and DIO lines. Software can
program any value at power up to the P0, P1, or P2 lines. The PFI and DIO lines can be set as:

• A high-impedance input with a weak pull-down resistor (default)

• An output driving a 0

• An output driving a 1

Refer to the NI-DAQmx Help or the LabVIEW Help for more information about setting power -up
states in NI-DAQmx or MAX.

Note When using your M Series device to control an SCXI chassis, DIO lines 0, 1,

2, and 4 are used as communication lines and must be left to power-up in the default
high-impedance state to avoid potential damage to these signals.

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M Series User Manual

DI Change Detection

You can configure the DAQ device to detect changes in the DIO signals. Figure 6-3 shows a
block diagram of the DIO change detection circuitry.

Figure 6-3. DI Change Detection

P0.0

P0.31

Synch

Synch

Enable

Enable

Change Detection Event

Enable

Enable

Note DI change detection is supported in NI-DAQmx 8.0 and later.

Y ou can enable the DIO chang e detection circuitry to detect rising edges, falling edges, or either
edge individually on each DIO line. The DAQ devices synchronize each DI signal to
80MHzTimebase, and then sends the signal to the change detectors. The circuitry ORs the output
of all enabled change detectors from every DI signal. The result of this OR is the Change
Detection Event signal.

The Change Detection Event signal can do the following:

• Drive any RTSI <0..7>, PFI <0..15>, or PXI_STAR signal

• Drive the DO Sample Clock or DI Sample Clock

• Generate an interrupt

The Change Detection Event signal also can be used to detect changes on digital output events.

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Chapter 6 Digital I/O

+5 V

LED

TTL Signal

+5 V

Switch

I/O Connector

D GND

M Series Device

P1.<0..3>

P1.<4..7>

DI Change Detection Applications

The DIO change detection circuitry can interrupt a user program when one of several DIO
signals changes state.

You also can use the output of the DIO change detection circuitry to trigger a DI or counter
acquisition on the logical OR of several digital signals. T o trigger on a single digital signal, refer
to the Triggering with a Digital Source section of Chapter 11 , Triggering. By routing the Change
Detection Event signal to a counter, you also can capture the relative time between samples.

You also can use the Change Detection Event signal to trigger DO or counter generations.

Connecting Digital I/O Signals

The DIO signals, P0.<0..31>, P1.<0..7>, and P2.<0..7> are referenced to D GND. You can
individually program each line as an input or output. Figure 6-4 shows P1.<0..3> configured for
digital input and P1.<4..7> configured for digital output. Digital input applications include
receiving TTL signals and sensing external device states, such as the stat e of the switch shown
in the figure. Digital output applications include sending TTL signals and driving external
devices, such as the LED shown in the figure.

Figure 6-4. Digital I/O Connections

Caution Exceeding the maximum input voltage ratin gs, which are listed in the

specifications document for each M Series device, can damage the DAQ device and
the computer. NI is not liable for any damage resulting from such sig nal connections.

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M Series User Manual

Getting Started with DIO Applications in
Software

You can use the M Series device in the following digital I/O applications:

• Static digital input

• Static digital output

• Digital waveform generation

• Digital waveform acquisition

• DI change detection

Note For more information about programming digital I/O applications and

triggers in software, refer to the NI-DAQmx Help or the LabVIEW Help.

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7

Counters

M Series devices have two general-purpose 32-bit counter/timers and one frequency generator,
as shown in Figure 7-1. The general-purpose counter/timers can be used for many measurement
and pulse generation applications.

Figure 7-1. M Series Counter0 and Frequency Generator

Input Selection Muxes

Counter 0 Source (Counter 0 Timebase)

Counter 0

Counter 0 Gate

Counter 0 Aux

Counter 0 HW Arm

Counter 0 A

Counter 0 B (Counter 0 Up_Down)

Counter 0 Z

Counter 0 Sample Clock

Input Selection Muxes

Frequency Output TimebaseFreq Out

The counters have seven input signals, although in most applications only a few inputs are used.

For information about connecting counter signals, refer to the Default Counter/Timer Pinouts
section.

Frequency Generator

Counter 0 Internal Output

Counter 0 TC

Counter Input Applications

The following sections list the various counter input applications available on M Series devices:

• Counting Edges

• Pulse-Width Measurement

• Period Measurement

• Semi-Period Measurement

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Chapter 7 Counters

Counter Armed

SOURCE

Counter Value105432

Counter Armed

SOURCE

Pause Trigger

(Pause When Low)

Counter Value

100 5432

• Frequency Measurement

• Position Measurement

• Two-Signal Edge-Separation Measurement

Counting Edges

In edge counting applications, the counter counts edges on its Source after the counter is armed.
You can configure the counter to count rising or falling edges on its Source input. You also can
control the direction of counting (up or down) as described in the Controlling the Direction of

Counting section.

Us the following edge counting options to read the counter values on your M Series device:

• Single Point (On-Demand) Edge Counting

• Buffered (Sample Clock) Edge Counting

Single Point (On-Demand) Edge Counting

With single point (on-demand) edge counting, the counter counts the number of edges on the
Source input after the counter is armed. On-demand refers to the fact that software can read the
counter contents at any time without disturbing the counting process. Figure 7-2 shows an
example of single point edge counting.

Figure 7-2. Single Point (On-Demand) Edge Counting

Y ou also can use a pause trigger to pause (or gate) the counter. When the pause trigger is active,
the counter ignores edges on its Source input. When the pause trigger is inactive, the counter
counts edges normally.

You can route the pause trigger to the Gate input of the counter. You can configure the counter
to pause counting when the pause trigger is high or when it is low . Figure 7-3 shows an example
of on-demand edge counting with a pause trigger.

Figure 7-3. Single Point (On-Demand) Edge Counting with Pause Trigger

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M Series User Manual

Buffered (Sample Clock) Edge Counting

With buffered edge counting (edge counting using a sample clock), the counter counts the
number of edges on the Source input after the counter is armed. The value of the counter is
sampled on each active edge of a sample clock. A DMA contro ller transfers the sampled value s
to host memory.

The count values returned are the cumulative counts since the counter armed event. That is, the
sample clock does not reset the counter.

You can route the counter sample clock to the Gate input of the counter. Y ou can configure the
counter to sample on the rising or falling edge of the sample clock.

Figure 7-4 shows an example of buffered edge counting. Notice that counting begins when the
counter is armed, which occurs before the first active edge on Gate.

Figure 7-4. Buffered (Sample Clock) Edge Counting

Counter Armed

(Sample on Rising Edge)

Sample Clock

SOURCE

Counter Value

Buffer

10763 452

3

3
6

Controlling the Direction of Counting

In edge counting applications, the counter can count up or down. You can configure the counter
to do the following:

• Always count up

• Always count down

• Count up when the Counter n B input is high; count down when it is low

For information about connecting counter signals, refer to the Default Counter/Timer Pinouts
section.

Pulse-Width Measurement

In pulse-width measurements, the counter measures the width of a pulse on its Gate input signal.
You can configure the counter to measure the width of high pulses or low pulses on the Gate
signal.

You can route an internal or external periodic clock signal (with a known period) to the Source
input of the counter. The counter counts the number of rising (or falling) edges on the Source
signal while the pulse on the Gate signal is active.

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