National Instruments NI PXI-6682, NI PXI-6682H User Manual

Download

Page 1

PXI

NI PXI-6682 Series User Manual

NI PXI-6682 and NI PXI-6682H Timing and Synchronization Modules for PXI

NI PXI-6682 Series User Manual

March 2009 372292B-01

Page 2

Support

Worldwide Technical Support and Product Information

ni.com

National Instruments Corporate Headquarters

11500 North Mopac Expressway Austin, Texas 78759-3504 USA Tel: 512 683 0100

Worldwide Offices

Australia 1800 300 800, Austria 43 662 457990-0, Belgium 32 (0) 2 757 0020, Brazil 55 11 3262 3599, Canada 800 433 3488, China 86 21 5050 9800, Czech Republic 420 224 235 774, Denmark 45 45 76 26 00, Finland 358 (0) 9 725 72511, France 01 57 66 24 24, Germany 49 89 7413130, India 91 80 41190000, Israel 972 3 6393737, Italy 39 02 41309277, Japan 0120-527196, Korea 82 02 3451 3400, Lebanon 961 (0) 1 33 28 28, Malaysia 1800 887710, Mexico 01 800 010 0793, Netherlands 31 (0) 348 433 466, New Zealand 0800 553 322, Norway 47 (0) 66 90 76 60, Poland 48 22 328 90 10, Portugal 351 210 311 210, Russia 7 495 783 6851, Singapore 1800 226 5886, Slovenia 386 3 425 42 00, South Africa 27 0 11 805 8197, Spain 34 91 640 0085, Sweden 46 (0) 8 587 895 00, Switzerland 41 56 2005151, Taiwan 886 02 2377 2222, Thailand 662 278 6777, Turkey 90 212 279 3031, United Kingdom 44 (0) 1635 523545

For further support information, refer to the Technical Support and Professional Services appendix. To comment on National Instruments documentation, refer to the National Instruments Web site at the info code

feedback.

ni.com/info and enter

Page 3

Important Information

Warranty

The NI PXI-6682 and NI PXI-6682H are warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.

The media on which you receive National Instruments software are warranted not to fail to execute programming instructions, due to defects in materials and workmanship, for a period of 90 days from date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace software media that do not execute programming instruc tions if National Instruments receives notice of such defects during the warranty period. National Instruments does not warrant that the operation of the software shall be uninterrupted or error free.

A Return Material Authorization (RMA) number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work. National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty.

National Instruments believes that the information in this document is accurate. The document has been carefully reviewed for technical accuracy. In the event that technical or typographical errors exist, National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition. The reader should consult National Instruments if errors are suspected. In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it.

XCEPT AS SPECIFIED HEREIN, NATIONAL INSTRUMENTS MAKES NO WARRANTIES, EXPRESS OR IMPLIED, AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF

MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. CUSTOMER’S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL

NSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER. NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING

FROM LOSS OF DATA, PROFITS, USE OF PRODUCTS, OR INCIDENTAL OR CONSEQUENTIAL DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY THEREOF. This limitation of

the liability of National Instruments will apply regardless of the form of action, whether in contract or tort, including negligence. Any action against National Instruments must be brought within one year after the cause of action accrues. National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control. The warranty provided herein does not cover damages, defects, malfunctions, or service failures caused by owner’s failure to follow the National Instruments installation, operation, or maintenance instructions; owner’s modification of the product; owner’s abuse, misuse, or negligent acts; and power failure or surges, fire, flood, accident, actions of third parties, or other events outside reasonable control.

Copyright

Under the copyright laws, this publication may not be reproduced or transmitted in any form, electronic or mechanical, including photocopying, recording, storing in an information retrieval system, or translating, in whole or in part, without the prior written consent of National Instruments Corporation.

National Instruments respects the intellectual property of others, and we ask our users to do the same. NI software is protected by copyright and other intellectual property laws. Where NI software may be used to reproduce software or other materials belonging to others, you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction.

Trademarks

National Instruments, NI, ni.com, and LabVIEW are trademarks of National Instruments Corporation. Refer to the Terms of Use section

ni.com/legal for more information about National Instruments trademarks.

Other product and company names mentioned herein are trademarks or trade names of their respective companies.

Members of the National Instruments Alliance Partner Program are business entities independent from National Instruments and have no agency, partnership, or joint-venture relationship with National Instruments.

Patents

For patents covering National Instruments products/technology, refer to the appropriate location: Help»Patents in your software, the patents.txt file on your media, or the National Instruments Patent Notice at ni.com/patents.

WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS

(1) NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN.

(2) IN ANY APPLICATION, INCLUDING THE ABOVE, RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS, INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY, COMPUTER HARDWARE MALFUNCTIONS, COMPUTER OPERATING SYSTEM SOFTWARE FITNESS, FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION, INSTALLATION ERRORS, SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS, MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES, TRANSIENT FAILURES OF ELECTRONIC SYSTEMS (HARDWARE AND/OR SOFTWARE), UNANTICIPATED USES OR MISUSES, OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER (ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTIVELY TERMED “SYSTEM FAILURES”). ANY APPLICATION WHERE A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS (INCLUDING THE RISK OF BODILY INJURY AND DEATH) SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM FAILURE. TO AVOID DAMAGE, INJURY, OR DEATH, THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES, INCLUDING BUT NOT LIMITED TO BACK-UP OR SHUT DOWN MECHANISMS. BECAUSE EACH END-USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS' TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS, THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION, INCLUDING, WITHOUT LIMITATION, THE APPROPRIATE DESIGN, PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION.

Page 4

About This Manual

Conventions ...................................................................................................................vii

National Instruments Documentation ............................................................................viii

Related Documentation..................................................................................................viii

Chapter 1 Introduction

What You Need to Get Started ......................................................................................1-1

Unpacking......................................................................................................................1-2

Software Programming Choices ....................................................................................1-2

Safety Information .........................................................................................................1-3

Chapter 2 Installing and Configuring

Installing the Software ...................................................................................................2-1

Installing the Hardware..................................................................................................2-1

Configuring the Module.................................................................................................2-2

Chapter 3 Hardware Overview

NI PXI-6682 Series Front Panel ....................................................................................3-3

GPS LED.........................................................................................................3-4

1588 LED ........................................................................................................3-4

Speed LED.......................................................................................................3-5

ACT/LINK LED..............................................................................................3-5

Connectors.......................................................................................................3-5

Hardware Features .........................................................................................................3-6

Clock and Event Generation ..........................................................................................3-8

PXI_CLK10 and TCXO ..................................................................................3-8

Time-Synchronized Clock and Event Generation...........................................3-9

Routing Signals..............................................................................................................3-9

Determining Sources and Destinations ...........................................................3-10

I/O Considerations .........................................................................................................3-11

Using the Ethernet Port ...................................................................................3-11

Using Front Panel PFI Terminals as Outputs ..................................................3-12

Using Front Panel PFI Terminals as Inputs.....................................................3-12

Note Regarding PFI0.......................................................................................3-13

Page 5

Contents

Brief Overview of PXI Synchronization Features .......................................... 3-13

Using the PXI Triggers ................................................................................... 3-15

Using the PXI Star Triggers (NI PXI-6682 only) ........................................... 3-16

Choosing the Type of Routing ........................................................................ 3-16

Chapter 4 Synchronization

GPS................................................................................................................................ 4-1

IRIG-B........................................................................................................................... 4-1

IEEE 1588 ..................................................................................................................... 4-3

PPS ................................................................................................................................ 4-3

Synchronization Best Practices ..................................................................................... 4-3

Operating Environment................................................................................... 4-4

IEEE 1588 Synchronization Best Practices .................................................... 4-4

GPS Synchronization Best Practices............................................................... 4-5

Appendix A

Asynchronous Routing ..................................................................... 3-16

Synchronous Routing ....................................................................... 3-18

Timing System Performance ............................................................ 4-4

Network Topology............................................................................ 4-4

Specifications

Appendix B IRIG Protocol Overview

Appendix C Technical Support and Professional Services

Glossary

Index

NI PXI-6682 Series User Manual vi ni.com

Page 6

About This Manual

This manual describes the electrical and mechanical aspects of the NI PXI-6682 and NI PXI-6682H, and contains information concerning its operation and programming.

Conventions

The following conventions appear in this manual:

<> Angle brackets that contain numbers separated by an ellipsis represent

a range of values associated with a bit or signal name—for example, AO<3..0>.

» The » symbol leads you through nested menu items and dialog box options

to a final action. The sequence File»Page Setup»Options directs you to pull down the File menu, select the Page Setup item, and select Options from the last dialog box.

This icon denotes a tip, which alerts you to advisory information.

This icon denotes a note, which alerts you to important information.

This icon denotes a caution, which advises you of precautions to take to avoid injury, data loss, or a system crash. When this symbol is marked on the product, refer to the Safety Information section of Chapter 1,

Introduction, for precautions to take.

bold Bold text denotes items that you must select or click in the software, such

as menu items and dialog box options. Bold text also denotes parameter names.

italic Italic text denotes variables, emphasis, a cross-reference, or an introduction

to a key concept. Italic text also denotes text that is a placeholder for a word or value that you must supply.

monospace Text in this font denotes text or characters that you should enter from the

keyboard, sections of code, programming examples, and syntax examples. This font is also used for the proper names of disk drives, paths, directories, programs, subprograms, subroutines, device names, functions, operations, variables, filenames, and extensions.

Page 7

About This Manual

Platform Text in this font denotes a specific platform and indicates that the text

following it applies only to that platform.

NI PXI-6682 Series This term is used when the content would apply to either the NI PXI-6682

or the NI PXI-6682H.

National Instruments Documentation

The NI PXI-6682 Series User Manual is one piece of the documentation set for your measurement system. You could have any of several other documents describing your hardware and software. Use the documentation you have as follows:

• Measurement hardware documentation—This documentation contains detailed information about the measurement hardware that plugs into or is connected to the computer. Use this documentation for hardware installation and configuration instructions, specifications about the measurement hardware, and application hints.

• Software documentation—Refer to the NI-Sync User Manual, available at

ni.com/manuals.

You can download NI documentation from

What You Need to Get Started

To set up and use the NI PXI-6682 Series, you need the following items:

❑ NI PXI-6682 Series Timing and Triggering Module

❑ NI PXI-6682 Series User Manual

❑ NI-Sync CD

❑ One of the following software packages and documentation:

–LabVIEW

™

– LabWindows

– Microsoft Visual C++ (MSVC)

❑ PXI chassis (the NI PXI-6682H can be installed in a hybrid slot of a

PXI Express chassis)

❑ PXI/PXI Express (PXIe) embedded controller or a desktop computer

connected to the PXI/PXIe chassis using MXI hardware

If you are using the NI PXI-6682 Series in a system to synchronize NI PXI-4472, NI PXI-5112, NI PXI-5411, NI PXI-6115, or E Series DAQ modules, you can refer to the NI-Sync User Manual, which you can find on the NI-Sync CD or download from

/CVI

™

ni.com/manuals.

Page 9

Chapter 1 Introduction

Unpacking

Caution Never touch the exposed pins of connectors.

The NI PXI-6682 Series is shipped in an antistatic package to prevent electrostatic damage to the module. Electrostatic discharge (ESD) can damage several components on the module.

To avoid such damage in handling the module, take the following precautions:

• Ground yourself using a grounding strap or by touching a grounded object.

• Touch the antistatic package to a metal part of the computer chassis before removing the module from the package.

Remove the module from the package and inspect the module for loose components or any sign of damage. Notify NI if the module appears damaged in any way. Do not install a damaged module into the computer.

Store the NI PXI-6682 Series in the antistatic envelope when not in use.

Software Programming Choices

The NI PXI-6682 Series uses NI Sync software as its driver.

When programming the NI PXI-6682 Series, you can use NI application development environment (ADE) software such as LabVIEW or LabWindows/CVI, or you can use other ADEs such as Visual C/C++ to interface with the NI Sync software.

LabVIEW features interactive graphics, a state-of-the-art interface, and a powerful graphical programming language. The LabVIEW Data Acquisition VI Library, a series of virtual instruments for using LabVIEW with National Instruments DAQ hardware, is included with LabVIEW.

LabWindows/CVI is a complete ANSI C ADE that features an interactive user interface, code generation tools, and the LabWindows/CVI Data Acquisition and Easy I/O libraries.

NI PXI-6682 Series User Manual 1-2 ni.com

Page 10

Safety Information

The following section contains important safety information that you must follow when installing and using the product.

Do not operate the product in a manner not specified in this document. Misuse of the product can result in a hazard. You can compromise the safety protection built into the product if the product is damaged in any way. If the product is damaged, return it to National Instruments for repair.

Do not substitute parts or modify the product except as described in this document. Use the product only with the chassis, modules, accessories, and cables specified in the installation instructions. You must have all covers and filler panels installed during operation of the product.

Do not operate the product in an explosive atmosphere or where there may be flammable gases or fumes. If you must operate the product in such an environment, it must be in a suitably rated enclosure.

If you need to clean the product, use a soft, nonmetallic brush. The product must be completely dry and free from contaminants before you return it to service.

Chapter 1 Introduction

Operate the product only at or below Pollution Degree 2. Pollution is foreign matter in a solid, liquid, or gaseous state that can reduce dielectric strength or surface resistivity. The following is a description of pollution degrees:

• Pollution Degree 1 means no pollution or only dry, nonconductive pollution occurs. The pollution has no influence.

• Pollution Degree 2 means that only nonconductive pollution occurs in most cases. Occasionally, however, a temporary conductivity caused by condensation must be expected.

• Pollution Degree 3 means that conductive pollution occurs, or dry, nonconductive pollution occurs that becomes conductive due to condensation.

You must insulate signal connections for the maximum voltage for which the product is rated. Do not exceed the maximum ratings for the product. Do not install wiring while the product is live with electrical signals. Do not remove or add connector blocks when power is connected to the system. Avoid contact between your body and the connector block signal when hot swapping modules. Remove power from signal lines before connecting them to or disconnecting them from the product.

Page 11

Chapter 1 Introduction

Operate the product at or below the installation category1 marked on the hardware label. Measurement circuits are subjected to working voltages

and transient stresses (overvoltage) from the circuit to which they are connected during measurement or test. Installation categories establish standard impulse withstand voltage levels that commonly occur in electrical distribution systems. The following is a description of installation categories:

• Installation Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as

MAINS

voltage. This category is for measurements of voltages from specially protected secondary circuits. Such voltage measurements include signal levels, special equipment, limited-energy parts of equipment, circuits powered by regulated low-voltage sources, and electronics.

• Installation Category II is for measurements performed on circuits directly connected to the electrical distribution system. This category refers to local-level electrical distribution, such as that provided by a standard wall outlet (for example, 115 V for U.S. or 230 V for Europe). Examples of Installation Category II are measurements performed on household appliances, portable tools, and similar products.

• Installation Category III is for measurements performed in the building installation at the distribution level. This category refers to measurements on hard-wired equipment such as equipment in fixed installations, distribution boards, and circuit breakers. Other examples are wiring, including cables, bus-bars, junction boxes, switches, socket-outlets in the fixed installation, and stationary motors with permanent connections to fixed installations.

• Installation Category IV is for measurements performed at the primary electrical supply installation (<1,000 V). Examples include electricity meters and measurements on primary overcurrent protection devices and on ripple control units.

Installation categories, also referred to as measurement categories, are defined in electrical safety standard IEC 61010-1.

Working voltage is the highest rms value of an AC or DC voltage that can occur across any particular insulation.

MAINS is defined as a hazardous live electrical supply system that powers equipment. Suitably rated measuring circuits may be connected to the MAINS for measuring purposes.

NI PXI-6682 Series User Manual 1-4 ni.com

Page 12

Installing and Configuring

This chapter describes how to install the NI PXI-6682 Series hardware and software and how to configure the device.

Installing the Software

Refer to the readme.htm file that accompanies the NI-Sync CD for software installation directions.

Note Be sure to install the driver software before installing the NI PXI-6682 Series

module.

Installing the Hardware

The following are general installation instructions. Consult the chassis user manual or technical reference manual for specific instructions and warnings about installing new modules.

1. Power off and unplug the chassis.

Caution Do not install the NI PXI-6682 Series module in the system controller slot (slot 1)

of a chassis.

2. Choose an available slot in the chassis.

NI PXI-6682: Install the NI PXI-6682 in an available PXI slot.

The NI PXI-6682 is a star trigger controller for PXI. It can replace PXI_CLK10 and control the PXI_STAR triggers. This functionality is only available when the NI PXI-6682 is installed in Slot 2 of a PXI chassis. The PXI triggers are accessible from any PXI slot.

NI PXI-6682H: Install the NI PXI-6682H in an available PXI slot. If you

are using a PXI Express (PXIe) system, install the NI PXI-6682H in an available PXI or PXIe/hybrid slot.

The PXI-6682H is a special version of the PXI-6682, designed to also fit in hybrid slots on PXIe chassis. It does not have the ability to replace PXI_CLK10 or drive the PXI_STAR triggers.

Page 13

Chapter 2 Installing and Configuring

3. Remove the filler panel for the PXI or PXIe hybrid slot you chose in step 2.

4. Ground yourself using a grounding strap or by touching a grounded object. Follow the ESD protection precautions described in the

Unpacking section of Chapter 1, Introduction.

5. Remove any packing material from the front panel screws and backplane connectors.

6. Insert the NI PXI-6682 Series module into the PXI/PXIe hybrid slot. Use the injector/ejector handle to fully insert the module into the chassis.

7. Screw the front panel of the module to the front panel mounting rail of the chassis.

8. Visually verify the installation. Make sure the module is not touching other modules or components and is fully inserted into the slot.

9. Plug in and power on the chassis.

The NI PXI-6682 Series module is now installed.

Configuring the Module

The NI PXI-6682 Series is completely software configurable. The system software automatically allocates all module resources.

The two LEDs on the front panel provide information about module status. The front panel description sections of Chapter 3, Hardware Overview, describe the LEDs in greater detail.

NI PXI-6682 Series User Manual 2-2 ni.com

Page 14

Hardware Overview

This chapter presents an overview of the hardware functions of the NI PXI-6682 Series, shown in Figure 3-1.

NI PXI-6682

Timing Module

NI PXI-6682H

Timing Module

1 NI PXI-6682 2 NI PXI-6682H

Figure 3-1. Isometric View of the NI PXI-6682 Series

Page 15

Chapter 3 Hardware Overview

Synchronization

Clock Generation

and

Routing

Circuitry

PCI Interface

PXIPCI

PXI_STAR<0..12>

PXI_TRIG<0..7>

PXI_CLK10_IN

CLKIN

AC Coupled

Clock Detector

PXI_CLK10

PFI 0

IRIG-B

Receiver

PFI 1

PFI 2

TCXO

CLKOUT

AC Coupling

From GPS

Antenna

GPS RF Detector

PFI0 Digital

Ethernet

Controller

Ethernet

Por t

Not in PXI-6682H

Figure 3-2 provides a functional overview of the NI PXI-6682 Series.

NI PXI-6682 Series User Manual 3-2 ni.com

Note

The NI PXI-6682H does not have PXI_STAR trigger lines, shown as

PXI_STAR<0..12> in Figure 3-2. The NI PXI-6682H does not have the CLKIN circuitry,

Figure 3-2. Functional Overview of the NI PXI-6682

or the ability to drive PXI_CLK10_IN.

Page 16

NI PXI-6682 Series Front Panel

NI PXI-6682

Timing Module

GPS 1588

CLK

OUT

CLK

PFI1

PFI2

PFI0/

IRIG-B

10/100 ACT/LINK

GPS ANT

Figure 3-3 shows the connectors and LEDs on the front panel of the NI PXI-6682 Series.

Chapter 3 Hardware Overview

Note

Figure 3-3.

1 GPS LED 2 1588 LED 3 GPS Antenna Connector 4 CLKOUT Connector 5 CLKIN Connector

6 PFI0/IRIG-B Input Connector 7 PFI<1..2> Connectors 8 Ethernet Speed LED 9 Ethernet ACT/LINK LED 10 RJ-45 Ethernet Connector

Figure 3-3. NI PXI-6682 Front Panel

The NI PXI-6682H does not have the CLKIN connector, shown as item 5 in

Page 17

Chapter 3 Hardware Overview

GPS LED

The GPS LED indicates the status of the GPS hardware. Refer to Figure 3-3 for the GPS LED location.

Table 3-1 summarizes what the GPS LED indicates.

Table 3-1. GPS LED Color Description

Color Status

Off Not using GPS*

Amber Attempting to start self survey

Blinking Amber Self survey in progress

Blinking Green Self survey complete (normal operation)

Red Error

* The GPS LED is turned off if GPS is not set as the time reference.

†

An error is generated when the antenna is disconnected, when there is an antenna

malfunction, or when there is a hardware malfunction.

†

1588 LED

The 1588 LED indicates the status of the IEEE 1588 synchronization protocol. Refer to Figure 3-3 for the 1588 LED location.

Table 3-2 summarizes what the 1588 LED indicates.

Table 3-2. 1588 LED Color Description

Color Status

Off Not using 1588*

Amber Initializing

Blinking Amber (2 seconds) Listening or Passive

Green Uncalibrated or Slave

Blinking Green (2 seconds) Master or Premaster

Red Faulty

* 1588 has been disabled or stopped.

NI PXI-6682 Series User Manual 3-4 ni.com

Page 18

Speed LED

Note When there is no Ethernet link the Speed LED is off.

ACT/LINK LED

Chapter 3 Hardware Overview

The Speed LED indicates the NI PXI-6682 Series Ethernet link speed. Refer to Figure 3-3 for the Speed LED location.

Table 3-3 summarizes what the Speed LED indicates.

Table 3-3. Speed LED Description

Color Status

Off 10 Mbps

Green 100 Mbps

The ACT/LINK LED indicates the NI PXI-6682 Series Ethernet link condition. Refer to Figure 3-3 for the ACT/LINK LED location.

Table 3-4 summarizes what the ACT/LINK LED indicates.

Table 3-4. ACT/LINK LED Color Description

Color Status

Off No Ethernet link

Green Ethernet link established

Blink Ethernet activity occurring

Connectors

This section describes the connectors on the front panel of the NI PXI-6682 Series. Refer to Figure 3-3 for the location of the connectors.

• GPS ANT—GPS antenna RF input and DC power output for active

GPS antenna. This connector provides 5 VDC for an active antenna. This connector also serves as the input for the RF signal coming in from the GPS antenna.

• CLKOUT—Clock Output. This connector is used to source a

10 MHz clock that can be routed programmatically from the temperature-compensated crystal oscillator (TCXO) or backplane clock (PXI_CLK10).

Page 19

Chapter 3 Hardware Overview

Note The NI PXI-6682H does not have the CLKIN connector.

Caution Do not connect an AM signal to PFI0 when the PFI line is configured for

digital operations. This could cause damage to the digital circuitry, the device driving the AM signal, or both. Always ensure the line is configured for IRIG-B AM operation before connecting an IRIG-B AM signal.

Caution Connections that exceed any of the maximum ratings of input or output signals

on the NI PXI-6682 Series can damage the module, the computer, or other devices connected to the NI PXI-6682 Series. NI is not liable for any damage resulting from such signal connections.

• CLKIN—Clock Input. This connector supplies the module with a clock that can be programmatically routed to the PXI backplane (PXI_CLK10_IN) for distribution to the other modules in the chassis when the NI PXI-6682 is installed in PXI slot 2.

• PFI<0..2>—Programmable Function Interface <0..2>. These connectors can be used for either input or output. You can program the behavior of these PFI connections individually.

Additionally, PFI0 can function as an input for IRIG-B DC or AM.

• RJ-45 Ethernet—10/100 Mbit Ethernet connection. This connector allows the module to communicate via standard Ethernet cabling.

Hardware Features

The NI PXI-6682 Series performs the following functions:

• Synchronization using GPS, IRIG-B, PPS, or IEEE 1588.

• Generation of future time events and clock signals.

• Timestamping incoming signals with the synchronized time.

• Routing internally or externally generated signals from one location to another.

Table 3-5 outlines the function and direction of the signals discussed in detail in the remainder of this chapter. These signals are also identified in Figure 3-2.

NI PXI-6682 Series User Manual 3-6 ni.com

Page 20

Chapter 3 Hardware Overview

Table 3-5. NI PXI-6682 Series I/O Terminals

Signal Name Direction Description

PXI_CLK10_IN (Not in NI PXI-6682H)

Out This is a signal that can replace the native 10 MHz

oscillator on the PXI backplane. PXI_CLK10_IN may originate from the onboard TCXO or from an external source connected to CLKIN.

PXI_CLK10 In This signal is the PXI 10 MHz backplane clock. By

default, this signal is the output of the native 10 MHz oscillator in the chassis. An NI PXI-6682 Series in Slot 2 can replace this signal with PXI_CLK10_IN.

Oscillator N/A This is the output of the 10 MHz TCXO. It is used by

the FPGA for synchronization, and can be routed to CLKOUT or PXI_CLK10_IN. The TCXO is a very stable and accurate frequency source.

CLKIN (Not in NI PXI-6682H)

In CLKIN is a signal connected to the SMB input pin of

the same name. CLKIN can be routed to PXI_CLK10_IN.

CLKOUT Out CLKOUT is the signal on the SMB output pin of the

same name. Either the TCXO clock or PXI_CLK10 may be routed to this location.

PXI_STAR<0..12> (Not in NI PXI-6682H)

In/Out The PXI star trigger bus connects Slot 2 to

Slot <3..15> in a star configuration. The electrical paths of each star line are closely matched to minimize intermodule skew. An NI PXI-6682 in Slot 2 can route signals to Slots <3..15> using the star trigger bus.

PFI<0..2> In/Out The Programmable Function Interface pins on the

NI PXI-6682 Series route timing and triggering signals between multiple PXI chassis. A wide variety of input and output signals can be routed to or from the PFI lines.

PFI<0> also can function as an input for IRIG-B DC or AM.

PXI_TRIG<0..7> In/Out The PXI trigger bus consists of eight digital lines

shared among all slots in the PXI chassis. The NI PXI-6682 Series can route a wide variety of signals to and from these lines.

Page 21

Chapter 3 Hardware Overview

The remainder of this chapter describes how these signals are used, acquired, and generated by the NI PXI-6682 Series hardware, and explains how you can use the signals between various locations to synchronize events in your system.

Clock and Event Generation

The NI PXI-6682 Series can generate two types of clock signals. The first type is generated with a precise 10 MHz oscillator, and the second is generated with the synchronized timebase. The following sections describe the two types of clock generation and explain the considerations for choosing either type. In addition to time-synchronized clock signals, the NI PXI-6682 Series is also capable of generating arbitrary digital events, to be used as triggers.

PXI_CLK10 and TCXO

The NI PXI-6682 Series features a precision 10 MHz TCXO. The frequency accuracy and stability of this clock is greater than the frequency accuracy and stability of the native 10 MHz PXI backplane clock (PXI_CLK10).

The main source of error in most frequency reference oscillators is temperature variation. The TCXO contains circuitry to measure the temperature of the oscillator. It uses the temperature to adjust its frequency output according to the crystal’s known frequency variation across its operating temperature range.

An NI PXI-6682 module in Slot 2 of a PXI chassis can replace the native PXI 10 MHz backplane frequency reference clock (PXI_CLK10) with the more stable and accurate output of the TCXO. All other PXI modules in the chassis that reference the 10 MHz backplane clock benefit from this improved reference. The TCXO does not automatically replace the native 10 MHz clock; this feature must be explicitly enabled in software. The TCXO output also can be routed out to the CLKOUT connector.

Note The 10 MHz TCXO signal is freerunning. It is not disciplined to the board’s time

reference.

NI PXI-6682 Series User Manual 3-8 ni.com

Page 22

Time-Synchronized Clock and Event Generation

The NI PXI-6682 Series is capable of generating clock signals and triggers based on the synchronized time base. The NI PXI-6682 Series keeps an internal time base with 10 ns resolution that can be synchronized to GPS, IRIG-B, PPS, IEEE 1588, or freerunning. The NI Sync API allows you to schedule triggers to occur at an arbitrary future time (future time events), or clocks of arbitrary frequencies (with high and low times in multiples of 10ns). It is also possible to program the start and ending time of a clock generated in this way.

Refer to Table 3-6 for a list of destinations for synchronized time clocks and future-time events.

Routing Signals

The NI PXI-6682 Series has versatile trigger routing capabilities. It can route signals to and from the front panel, the PXI star triggers, and the PXI triggers. In addition, the polarity of the destination signal can be inverted, which is useful when handling active-low digital signals.

Chapter 3 Hardware Overview

The NI PXI-6682 also can route a 10 MHz clock from CLKIN to the PXI 10 MHz reference clock (the NI PXI-6682H does not have a CLKIN connector). The NI PXI-6682 Series can route the TCXO, or PXI 10 MHz reference clock to CLKOUT.

Figure 3-4 summarizes the routing features of the NI PXI-6682 Series. The remainder of this chapter details the capabilities and constraints of the routing architecture.

Page 23

Chapter 3 Hardware Overview

Not in PXI-6682H

ClkIn

ClkOut

PFI 0

PFI 2

PFI 0

PFI 2

PXI_Trig 0

PXI_Trig 7

PXI_Star 0

PXI_Star 12

PXI_Clk10

GND

TCXO

Router for each I/O

Synchronizer

Clk10

PXI_Clk10_In

PXI_Clk10

PXI_Trig 0

PXI_Trig 7

Not in PXI-6682H

PXI_Star 0

PXI_Star 12

Figure 3-4. High-Level Schematic of NI PXI-6682 Signal Routing Architecture

Note

The NI PXI-6682H architecture is identical to the architecture described in Figure 3-4, except that it doesn’t have the PXI_STAR trigger lines, CLKIN, or PXI_CLK10_IN.

Determining Sources and Destinations

All signal routing operations can be characterized by a source (input) and a destination. In addition, synchronous routing operations must also define a third signal known as the synchronization clock. Refer to the Choosing

the Type of Routing section for more information on synchronous versus

asynchronous routing.

Table 3-6 summarizes the sources and destinations of the NI PXI-6682 Series. The destinations are listed in the horizontal heading row, and the sources are listed in the column at the far left. A  in a cell

NI PXI-6682 Series User Manual 3-10 ni.com

Page 24

Chapter 3 Hardware Overview

indicates that the source and destination combination defined by that cell is a valid routing combination.

Table 3-6. Sources and Destinations for NI PXI-6682 Series Signal Routing Operations

Destinations

Front Panel Backplane

Front Panel

CLKIN

PFI<0..2>

CLKOUT PFI<0..2> PXI_

CLK10_IN

†



†



PXI_Star

Trigger

<0..12>

†



‡



PXI TRIG

<0..7>

†



PXI_ CLK10

Sources

The NI PXI-6682H does not have a CLKIN connector, PXI_CLK10_IN, or PXI-STAR trigger lines.

†

Can be accomplished in two stages by routing source to PXI_CLK10_IN, replacing PXI_CLK10 with PXI_CLK10_IN

(occurs automatically in most chassis), and then routing PXI_CLK10 to the destination. The source must be 10 MHz.

‡

Asynchronous routes between a single source and multiple destinations are very low skew. See Appendix A, Specifications,

for details.

PXI_STAR

<0..12>

Backplane

PXI TRIG<0..7>

TCXO

Time-synchronized

Onboard

events and clocks

   

‡



 

  

†



†



  

I/O Considerations

Using the Ethernet Port

The NI PXI-6682 Series provides one standard RJ-45 connection for Ethernet communication. This port auto negotiates to the best possible speed—10 Mbps or 100 Mbps. The Ethernet port is auto-MDI capable, which means crossover cabling is not necessary when connecting the NI PXI-6682 Series to another network card. The NI PXI-6682 Series senses whether a crossed connection is needed and performs the action internally. The Ethernet port also allows for full duplex operation, so traffic can be sent and received at the same time.

†

Page 25

Chapter 3 Hardware Overview

Using Front Panel PFI Terminals as Outputs

The front panel PFI output signals use +3.3 V signaling for high-impedance loads. You can use the PFI terminals to generate future time events and clock signals up to 1.5 MHz. PFI output signals are suitable for driving most LEDs. To ensure proper signaling for fast edge rate signals, ensure that the system terminates to 50 Ω on the receiving end. Cabling should also be 50 Ω will output less than +3.3 V in the high state. Refer to Appendix A,

Specifications, for more information. Refer to the NI-Sync User Manual

for information on how to set up the PFI lines for output.

Caution Do not attempt to drive signals into PFI terminals set up as outputs. Doing so can

damage the NI PXI-6682 Series or the device driving the PFI terminal.

The signal source for each PFI trigger line configured as an output can be independently selected from one of the following options:

• Another PFI<0..2>

• PXI_TRIG<0..7>

• PXI_STAR<0..12> (NI PXI-6682 only)

• Future time events

•PXI_CLK10

• Ground

impedance. In a 50 Ω environment, the PFI terminals

The PFI trigger outputs may be synchronized to CLK10 except when routing future time events. Refer to the Choosing the Type of Routing section for more information about the synchronization clock.

Using Front Panel PFI Terminals as Inputs

The front panel PFI terminals can be configured by software to accept input signals. Refer to the NI-Sync User Manual for information on how to set up the PFI terminals to accept input signals. You can use these terminals to timestamp triggers with the synchronized system time or to route signals to other destinations (refer to Table 3-6). The input terminals accept native +3.3 V signaling, but are +5 V tolerant. Use 50 Ω source termination when driving signals into PFI terminals.

The voltage thresholds for the front-panel PFI input signals are fixed. Refer to Appendix A, Specifications, for the actual voltage thresholds. The front-panel PFI input signals can be timestamped on rising, falling, or both edges of an input signal.

NI PXI-6682 Series User Manual 3-12 ni.com

Page 26

Note Regarding PFI0

Since PFI0 is a dual-purpose terminal capable of performing digital I/O like the other PFI lines while also being capable of receiving IRIG-B AM and DC inputs, care is taken to protect the digital circuitry when PFI0 is being used as an IRIG-B AM input. This is achieved with a normally-open solid-state relay (SSR), which is closed only when digital operations for the line are enabled through the API. Digital operations include setting up routes in which PFI0 is the source or the destination, enabling timestamping for PFI0, and scheduling future time events or clocks for PFI0.

The SSR has a 5 ms open and close time. Therefore, care must be taken when using PFI0 to ensure correct operation when the SSR is switching.

To avoid issues due to the SSR switching, follow these guidelines:

• Whenever timestamping begins on PFI0, either ensure the input will

• When setting up PFI0 as an output (future time events or clocks),

• Before disabling PFI0 set up as an output, drive the output low to avoid

• Any time a route is set up or changed where PFI0 is the source or the

Chapter 3 Hardware Overview

remain at a logic low state for at least 5 ms or disregard timestamps for at least 5 ms.

ensure that PFI0 is driven low for at least 5 ms after the line is set up. Alternately, ensure that the external receiver can tolerate a slow rising edge.

a very slow ramp down.

destination, allow for a 5 ms settling time.

For more information, refer to KnowledgeBase 4E9BT88P at

support.

ni.com/

Brief Overview of PXI Synchronization Features

PCI eXtensions for Instrumentation (PXI) is a rugged PC-based platform that offers a high-performance, low-cost deployment solution for measurement and automation systems. PXI combines the Peripheral Component Interconnect (PCI) electrical bus with the rugged, modular Eurocard mechanical packaging of CompactPCI and adds specialized synchronization buses and key software features.

Page 27

Chapter 3 Hardware Overview

Figure 3-5 provides an overview of the PXI synchronization architecture.

Star Trigger Bus

10 MHZ

Clock

System

Conrtroller

Star Trigger

Controller (Slot 2)

132 Mbytes/s, 33 MHz, 32-bit PCI Bus

PXI Trigger Bus (8 lines)

Module

Figure 3-5. PXI Synchronization Architecture

The PXI trigger Bus, PXI star triggers, and PXI_CLK10 are PXI features that enhance synchronization. The PXI trigger bus is a multi-drop 8-line bus that goes to every slot. The PXI star trigger bus is a set of up to 13 point-to-point matched-length connections between Slot 2 (timing slot) and every slot starting with slot 3 and up to slot 15. The propagation delay between Slot 2 and each destination slot is matched to within 1ns to achieve low-skew triggering. PXI_CLK10 is a high quality 10 MHz clock that is distributed with low skew to each PXI slot. This 10 MHz signal can be sourced from the native PXI backplane oscillator or from a Slot 2 Controller Module installed in Slot 2 (such as the NI PXI-6682).

The following sections describe in more detail the use of PXI triggers and PXI star triggers with the NI PXI-6682 series.

NI PXI-6682 Series User Manual 3-14 ni.com

Page 28

Using the PXI Triggers

The PXI trigger bus is a set of 8 electrical lines that go to every slot in a segment of a PXI chassis (multi-drop up to 8 slots). Only one PXI module should drive a particular PXI_Trigger line at a given time. The signal is then received by modules in all other PXI slots. This feature makes the PXI triggers convenient in situations where you want, for instance, to trigger several devices at the same time, because all modules will receive the same trigger.

Given the architecture of the PXI trigger bus, triggering signals do not reach each slot at precisely the same time. A difference of several nanoseconds can occur between slots, especially in larger PXI chassis (which can have buffers between segments). This delay is not a problem for many applications. However, if your application requires tighter synchronization, use the PXI_STAR triggers (see next section), or use the PXI trigger bus synchronous to PXI_CLK10.

The multi-drop nature of the PXI trigger bus can introduce signal integrity issues. Therefore, National Instruments does not recommend the use of PXI_Trigger lines for clock distribution, especially for clocks above 20 MHz. The preferred method for clock distribution is the use of the PXI_STAR triggers. However, the NI PXI-6682 Series does support routing of clocks to the PXI_Trigger lines, in case you must use them.

Chapter 3 Hardware Overview

For each PXI_Trigger line configured as an output in the NI PXI-6682 Series, the signal source can be independently selected from the following options:

•PFI<0..2>

• Another PXI trigger line (PXI_TRIG<0..7>)

• PXI_STAR<0..12>

• Future time events

•PXI_CLK10

• Ground

The PXI trigger outputs may be synchronized to CLK10 except when routing future time events. Refer to the Choosing the Type of Routing section for more information about the synchronization clock.

Page 29

Chapter 3 Hardware Overview

Using the PXI Star Triggers (NI PXI-6682 only)

There are up to 13 PXI star triggers per chassis. Each trigger line is a dedicated connection between Slot 2 and one other slot. The PXI Specification, Revision 2.1, requires that the propagation delay along each star trigger line be matched to within 1 ns. A typical upper limit for the skew in most NI PXI chassis is 500 ps. The low skew of the PXI star trigger bus is useful for applications that require triggers to arrive at several modules nearly simultaneously. The NI PXI-6682 is able to route low skew triggers to the PXI_Star lines from any PFI line.

The star trigger lines are bidirectional, so signals can be sent to Slot 2 from a module in another slot or from Slot 2 to the other module.

The signal source for each PXI star trigger line configured as an output can be independently selected from one of the following options:

• PFI<0..2> (low skew)

• PXI_TRIG<0..7>

• Another PXI star trigger line (PXI_STAR<0..12>)

• Synchronized time event

•PXI_CLK10

• Ground

The PXI star trigger outputs may be synchronized to CLK10 except when routing future time events. Refer to the Choosing the Type of Routing section for more information about the synchronization clock.

Choosing the Type of Routing

The NI PXI-6682 Series routes signals in one of two ways: asynchronously or synchronously. The following sections describe the two routing types and the considerations for choosing each type.

Asynchronous Routing

Asynchronous routing is the most straightforward method of routing signals. Any asynchronous route can be defined in terms of two signal locations: a source and a destination. A digital pulse or train comes in on the source and is propagated to the destination. When the source signal goes from low to high, this rising edge is transferred to the destination after a propagation delay through the module. Figure 3-6 illustrates an asynchronous routing operation.

NI PXI-6682 Series User Manual 3-16 ni.com

Page 30

Chapter 3 Hardware Overview

Trigger Input

Trigger Output

Propagation Delay

Figure 3-6. Asynchronous Routing Operation

Some delay is always associated with an asynchronous route, and this delay varies among NI PXI-6682 Series modules, depending on variations in temperature and chassis voltage. Typical delay times in the NI PXI-6682 Series for asynchronous routes between various sources and destinations are given in Appendix A, Specifications.

Asynchronous routing works well if the total system delays are not too long for the application. Propagation delay could be caused by the following reasons:

• Output delay on the source

• Propagation delay of the signal across the backplane(s) and cable(s)

• Propagation delay of the signal through the NI PXI-6682 Series

• Time for the receiver to recognize the signal

The source of an asynchronous routing operation on the NI PXI-6682 Series can be any of the following lines:

• Any front panel PFI pin (PFI<0..2>)

• Any PXI Star trigger line (PXI_STAR<0..12>) (NI PXI-6682 only)

• Any PXI Trigger line (PXI_TRIG<0..7>)

• Synchronized time events

•PXI_CLK10

• Ground

The destination of an asynchronous routing operation on the NI PXI-6682 Series can be any of the following lines:

• Any front panel PFI pin (PFI<0..2>)

• Any PXI star trigger line (PXI_STAR<0..12>) (NI PXI-6682 only)

• Any PXI Trigger line (PXI_TRIG<0..7>)

Page 31

Chapter 3 Hardware Overview

Synchronous Routing

A synchronous routing operation is defined in terms of three signals: a source, a destination, and a synchronization clock. A digital signal comes in on the source and is propagated to the destination after the edge has been realigned with the synchronization clock.

Unlike asynchronous routing, the output of a synchronous routing operation does not directly follow the input after a propagation delay. Instead, the output waits for the next rising edge of the clock before it follows the input. Thus, the output is said to be “synchronous” with this clock.

Synchronous routing can send triggers to several places in the same clock cycle or send the trigger to those same places after a deterministic skew of a known number of clock cycles. If a signal arrives at two chassis within the same clock cycle, each NI PXI-6682 Series module realigns the signal with the synchronization clock and distributes it to the modules in each chassis at the same time. Synchronous routing can thus remove uncertainty about when triggers are received. If the delays through the system are such that an asynchronous trigger might arrive near the edge of the receiver clock, the receiver might see the signal in the first clock cycle, or it might see it in the second clock cycle. However, by synchronizing the signal, you can eliminate the ambiguity, and the signal will always be seen in the second clock cycle.

NI PXI-6682 Series User Manual 3-18 ni.com

Page 32

Chapter 3 Hardware Overview

Figure 3-7 shows a timing diagram that illustrates synchronous routing.

Setup

Hold

Time

setup

hold

Trigger Input

Synchronization

Trigger Output

Clock

Clock to Output Time, t

CtoQ

Figure 3-7. Synchronous Routing Operation

Possible sources and destinations for synchronous routing include the following:

• Any front panel PFI pin (PFI<0..2>)

• Any PXI star trigger line (PXI_STAR<0..12>) (NI PXI-6682 only)

• Any PXI Trigger line (PXI_TRIG<0..7>)

In the NI PXI-6682 Series, the synchronization clock for synchronous routes is always PXI_CLK10.

Note The possible destinations for a synchronous route are identical to those for an

asynchronous route. The destinations include any front panel PFI pin, any PXI star trigger line, or any PXI Trigger line.

Page 33

Synchronization

The NI PXI-6682 Series is capable of achieving tight synchronization with various other devices using GPS, IRIG-B, PPS, or IEEE 1588. When GPS or IRIG-B are selected as the synchronization source, the NI PXI-6682 Series module can also serve as an IEEE 1588 grandmaster. The following sections describe the synchronization capabilities of the NI PXI-6682 Series.

GPS

GPS stands for Global Positioning System, and it is a system of over 2 dozen satellites in medium Earth orbit that are constantly transmitting signals down to Earth. GPS receivers are able to detect these signals and determine location, speed, direction and time very precisely. GPS satellites are fitted with atomic clocks, and the signals they transmit to Earth contain timing information. This makes the GPS system a precise timing and synchronization source.

The NI PXI-6682 Series has a GPS receiver which powers an active GPS antenna and receives and processes the RF signals (1.575 GHz) from the satellites. The GPS receiver then generates a very precise pulse-per-second (PPS) that the NI PXI-6682 Series uses to achieve sub-microsecond synchronization.

GPS enables the NI PXI-6682 Series to synchronize PXI systems located far away from each other, as long as GPS satellites are visible to the antenna from each location. Furthermore, once the NI PXI-6682 Series is synchronized to GPS, it can function as an IEEE 1588 grandmaster to enable synchronization of external 1588 devices.

IRIG-B

IRIG is a standard used to transmit precise timing information between instruments to achieve synchronization. IRIG-B is a particular application of the IRIG standard, in which 100 bits of data are sent every second. Embedded in the data is a seconds’ boundary marker that the receiving

Page 34

Chapter 4 Synchronization

Caution Do not connect an AM signal to PFI0 when the PFI line is configured for digital

operations. This could cause damage to the digital circuitry, the device driving the AM signal, or both. Always ensure the line is configured for IRIG-B AM operation before connecting an IRIG-B AM signal.

instrument uses to synchronize its timebase to the IRIG source. The rest of the data contains information such as the time of day, days since the beginning of the year, and optionally, control functions and the number of seconds since the start of the day, encoded as a straight binary number.

Refer to Appendix B, IRIG Protocol Overview, for more information about the IRIG standard.

The NI PXI-6682 Series can function as an IRIG-B receiver, supporting synchronization to sources outputting IRIG-B 12X (AM) and IRIG-B 00X (DC).

When configured to synchronize to an IRIG-B AM source, the NI PXI-6682 Series will be able to accept a 1 kHz AM modulated IRIG-B 12X signal on its PFI0 input. When configured to synchronize to an IRIG-B DC source, the NI PXI-6682 Series will be able to accept an IRIG-B 00X DC encoded signal on its PFI0 input.

Furthermore, once the NI PXI-6682 Series is synchronized to IRIG-B, it can function as an IEEE 1588 grandmaster to synchronize of external 1588 devices.

The following assumptions are made regarding the received IRIG-B signal. All conditions must be met for the NI PXI-6682 Series to be able to synchronize accurately:

• Seconds begin every minute at 0, increment to 59, and then roll-over to 0.

• Minutes begin every hour at 0, increment to 59, and then roll-over to 0.

• Hours begin every day at 0, increment to 23, and then roll-over to 0.

• Days begin every year at 1. Days increment to 365 in non-leap years, or to 366 in leap years, and then roll-over to 1. Leap years must be supported. Valid values for year are 01–99, inclusive. Years are assumed to be in the XXI Century. For instance, year 09 represents

2009. If the year is not supplied (sent as 00), the OS system time is read and the year is derived from it.

NI PXI-6682 Series User Manual 4-2 ni.com

Page 35

IEEE 1588

PPS

Chapter 4 Synchronization

To achieve proper synchronization of the NI PXI-6682 Series, ensure that the IRIG-B source used conforms to the requirements listed above. Note that most IRIG-B sources conform to these requirements.

The NI PXI-6682 Series is capable of performing synchronization over Ethernet using IEEE 1588. It is possible to configure the NI PXI-6682 Series to synchronize to GPS or IRIG-B and then function as an IEEE 1588 grandmaster. It is also possible to configure the NI PXI-6682 Series to synchronize to IEEE 1588, in which case, the standard defines how the master will be selected. If the NI PXI-6682 Series is selected as IEEE 1588 master, and it is not configured to synchronize to GPS or IRIG-B, it will use its internal free-running timebase, which will be updated to the host computer’s system time during power up.

The NI PXI-6682 Series is capable of using a PPS (pulse per second) signal for synchronization. Any PFI, PXI_Trigger or PXI_Star line can be configured as the PPS input terminal. When synchronizing based on a PPS, the first pulse received will set the NI PXI-6682 Series internal timebase to either an arbitrary time supplied by the user, or the host computer’s system time. Each subsequent pulse received will be interpreted as a second’s boundary (the pulse occurring exactly 1 second after the previous pulse). As each pulse is received, the NI PXI-6682 Series will adjust its internal timebase to match the frequency of the PPS source.

For best results when using PPS Time Reference, ensure that the device supplying the PPS signal is capable of providing a stable, consistent 1Hz signal. Error can be induced into the system if the reference signal contains significant jitter, or if the reference frequency strays from 1 Hz.

Synchronization Best Practices

The NI PXI-6682 Series can achieve sub-microsecond synchronization. The following section describes some guidelines for achieving the best possible performance from your NI PXI-6682 Series module. While the NI PXI-6682 Series will function properly if you follow the specifications, the following guidelines may increase the synchronization performance.

Page 36

Chapter 4 Synchronization

Operating Environment

For best synchronization performance, follow these operating environment guidelines, while taking care to remain within the specified operating temperature limits:

• Ensure the PXI filler panels are properly installed for unused PXI slots.

• Perform the same steps as above to ensure that all other

Timing System Performance

The NI PXI-6682 Series can generate or receive a 1 Hz pulse per second signal on any PFI or PXI Trigger terminal. You can set up this signal to transition on the seconds boundary of the synchronized system time. You can then use this signal to analyze system performance by connecting two or more pulse per second signals to an oscilloscope and measuring the latency between them. Adjustments can be made to account for deterministic latency. Refer to the NI-Sync API Reference Help for more information. The NI PXI-6682 Series can also timestamp an incoming pulse per second signal. The NI PXI-6682 Series will timestamp the externally generated pulse per second with its internal timebase. By comparing this timestamp with the nearest seconds boundary, you can quickly determine the synchronization performance.

Airflow can degrade the NI PXI-6682 Series performance because it tends to cause rapid changes in temperature. The NI PXI-6682 Series has precision thermally compensated components, but limiting direct airflow helps achieve the best performance. Consider placing the PXI chassis containing the NI PXI-6682 Series in an environment free of rapid temperature transitions.

synchronization partners also have a thermally stable environment.

IEEE 1588 Synchronization Best Practices

Network Topology

To obtain the best NI PXI-6682 Series performance, follow these guidelines to set up the Ethernet network topology:

• Use short cabling when possible. Ethernet cabling is inherently asymmetric; the longer the cabling, the higher the asymmetry. This impacts synchronization performance, because the IEEE 1588 protocol assumes a symmetric network path.

• Use hubs when connecting to multiple IEEE 1588-capable devices. Hubs offer low latency and close to deterministic performance for transporting Ethernet traffic. This latency is on the order of hundreds of nanoseconds. Using switches degrades performance due to

NI PXI-6682 Series User Manual 4-4 ni.com

Page 37

increased latency and indeterminate performance from the onboard buffers. Synchronization performance across switches can be in the tens of microseconds. If a switch must be used, obtain a 1588 boundary clock or transparent switch to achieve the best performance. These devices allow traffic to cross Ethernet collision domains without the inherent loss in performance from a switch.

• Ensure that the network is running at 100 Mbps by noting the Speed LED status. Synchronization performance is degraded when running at 10 Mbps.

Note If it is impossible to use a 100 Mbps network and you must run IEEE 1588

synchronization using a 10 Mbps network, ensure the network interface of the NI PXI-6682 Series is explicitly configured for 10 Mbps Full Duplex operation using the Windows configuration panels.

GPS Synchronization Best Practices

The embedded GPS receiver in the NI PXI-6682 Series requires signals from several satellites to be able to compute precise timing and location. The more satellites available to the receiver, the more precisely it can determine time and location. Therefore, the location of the antenna should be such that it will receive signals from the greatest number of satellites possible. As the number of satellites visible to the antenna decreases, the synchronization performance may also decrease. The antenna location should be chosen so that the antenna has a clear view of the sky. There is no strict definition for clear view of the sky, but a suitable guideline is that the GPS antenna should have a straight line of sight to the sky in all directions (360°) down to an imaginary line making a 30° angle with the ground. Locations far from trees and tall buildings which could reflect GPS satellite signals are best.

Chapter 4 Synchronization

Page 38

Specifications

CLKOUT Characteristics

Output frequency....................................10 MHz

Duty cycle .............................................. 45 to 55%

Output impedance .................................. 50 Ω , nominal

Output coupling......................................AC

Load Square Wave

Open Load 5V

50 Ω Load 2.5 V

Square wave rise/fall time

(10 to 90%)............................................. 0.5 ns min,

2.5 ns max

, typical

p-p

, typical

p-p

CLKIN Characteristics (NI PXI-6682 only)

CLKIN fundamental frequency ............. 10 MHz, sine or square wave

Input impedance..................................... 50 Ω , nominal

Input coupling ........................................AC

p-p

, max

to 5 V

p-p

Voltage range ......................................... 400 mV

Absolute maximum input voltage1......... 6 V

CLKIN to PXI_CLK10_IN delay .......... 13 ns, typical

±1.0 ns, max

Stresses beyond those listed can cause permanent damage to the device. Exposure to absolute maximum rated conditions for extended periods of time can affect device reliability. Functional operation of the device outside the conditions indicated in the operational parts of the specification is not implied.

Page 39

Appendix A Specifications

CLKIN frequency accuracy requirement

For replacing PXI_CLK10 ..............±100 ppm

PFI<0..2>

Jitter added to CLKIN ............................1.3 ps

, 10 Hz to 100 kHz,

rms

typical

Duty cycle distortion of CLKIN

to PXI_CLK10_IN .................................±1%, max

Required input duty cycle.......................45 to 55%

Output Characteristics

Frequency range .....................................DC to 30 MHz

Output impedance...................................50 Ω, nominal

Output coupling ......................................DC

Output voltage levels

Output high......................................1.1 V min, 1.6 V typical for

load;

50 Ω

2.4 V min, 3.3 V typical for

load

1MΩ

Output low.......................................0.3 V max, 0 V typical for

load;

50 Ω

0.7 V max, 0 V typical for

load

1MΩ

Absolute maximum applied voltage

......0 to 5 V

Output-to-output skew, asynchronous ....<1.5 ns, typical

Output-to-output skew, synchronous......<2 ns, typical

This is a requirement of the PXI specification.

NI PXI-6682 Series User Manual A-2 ni.com

Page 40

Appendix A Specifications

Synchronized trigger clock to out time, t

......................................... 10 ns, typical (relative to

CLKOUT when set up to route PXI_CLK10)

Output current ........................................±48 mA, max

Square wave rise/fall time (10 to 90%) for 50 Ω

load..................... 0.5 ns min,

2.5 ns max

Input Characteristics

Frequency range..................................... DC to 30 MHz

Input impedance..................................... 1 kΩ , nominal

Input coupling ........................................DC

Voltage level ..........................................0 to +3.3 V, +5 V tolerant

Absolute maximum input voltage

......... –0.5 V to 6.0 V

Input threshold

Voltage threshold high.................... +2.3 V

Voltage threshold low..................... +0.8 V

Asynchronous delay, t

PFI<0..2> to

PXI_TRIG<0..7> output................. 20 to 31 ns, typical

PFI<0..2> to

PXI_STAR<0..12> output

............. 10 ns, typical

Synchronized trigger input setup time, t

.............................19 ns, typical (relative to

setup

CLKOUT when set up to route PXI_CLK10)

For PFI 0 these characteristics apply when the line is configured as a digital input. They do not apply when configured as an IRIG-B AM input.

The NI PXI-6682H does not have star trigger lines.

Page 41

Appendix A Specifications

Caution Do not connect an IRIG-B AM signal to PFI 0 when the input is configured for

digital operation, as this can result in damage of the digital input circuitry.

Synchronized trigger input hold time, t

................................0 ns (relative to CLKOUT when

hold

set up to route PXI_CLK10)

IRIG-B Input Characteristics (PFI0)

IRIG-B AM compatibility ......................IRIG-B 12X

Maximum Input voltage range ..............–5 V to +5 V

Decode Input voltage range ...................1.5 V to 10 V peak-peak mark

(3:1 ratio mark:space)

Input carrier frequency ...........................1 kHz

IRIG-B DC compatibility .......................IRIG-B 00X

Input characteristics for IRIG-B DC.......same as PFI digital input

characteristics listed above

The following assumptions are made regarding the received IRIG-B signal. All conditions must be met for the NI PXI-6682 Series to be able to synchronize accurately:

• Seconds begin every minute at 0, increment to 59, and then roll-over to 0.

• Minutes begin every hour at 0, increment to 59, and then roll-over to 0.

• Hours begin every day at 0, increment to 23, and then roll-over to 0.

2009. If the year is not supplied (sent as 00), the OS system time is read and the year is derived from it.

To achieve proper synchronization of the NI PXI-6682 Series ensure that the IRIG-B source used conforms to the requirements listed above. Note that most IRIG-B sources conform to these requirements.

NI PXI-6682 Series User Manual A-4 ni.com

Page 42

PXI_STAR Trigger Characteristics (NI PXI-6682 only)

PXI_STAR<0..12> to PXI_STAR<0..12> output skew

at NI PXI-6682 backplane connector..... <400 ps

Appendix A Specifications

Asynchronous delays, t

PXI_STAR<0..12> to

PFI<0..2> output............................. 11 ns, typical

PXI_STAR<0..12> to

PXI_TRIG<0..7> output................. 22 to 36 ns, typical

PXI Trigger Characteristics

PXI_TRIG<0..7> to PXI_TRIG<0..7> output skew

at NI PXI-6682 backplane connector..... <5 ns, typical

Asynchronous delay, t

PXI_TRIG<0..7> to

PFI<0..2> output............................. 18 to 34 ns, typical

Timestamping and Time-Synchronized Clock Generation

Time-sychronized

clock frequency range ............................ DC to 1.5 MHz

Duty cycle .............................................. Programmable

Note Clock signals generated on PFI, PXI_STAR (NI PXI-6682 only), or PXI Trigger

lines must have a period and duty cycle that is a multiple of 10 ns.

Minimum pulse width

for timestamping .................................... 36 ns

TCXO Characteristics

Frequency............................................... 10 MHz

Initial accuracy....................................... ±1 ppm

This specification applies to all asynchronous routes from the PFI inputs to the PXI_STAR lines.

Page 43

Appendix A Specifications

GPS

Temperature stability (0 to 55 °C)..........±1 ppm

Aging per year ........................................±1 ppm

Recommended GPS antenna ..................Trimble Bullet III

DC voltage output for antenna................5 V

RF GPS signal frequency .......................1575.42 MHz ±1.023 MHz

Input impedance .....................................50 Ω, nominal

Accuracy

PPS ..................................................Within 15 ns to GPS/UTC

(1 Sigma)

Horizontal position ..........................<6 m (50%)

<9 m (90%)

Altitude position ..............................<11 m (50%)

<18 m (90%)

Velocity ...........................................0.06 m/s

Trimble Bullet III

Gain at 1575.42 MHz .............................35 dB ±3 dB

Current requirement (5 V) ......................30 mA maximum

VSWR.....................................................2.0 maximum

Polarization.............................................Right-hand circular

polarization (RHCP)

Signal strength required

at PXI-6682.............................................18 dB

Maximum allowable cable

signal loss at 1575.42 MHz ....................17 dB

Note The GPS antenna kit offered by National Instruments comes with a 30 m cable

which has a loss of 15 dB/100 ft, making the total loss in the cable approximately 14.8 dB. If your GPS antenna installation requires a longer cable, ensure that the loss per unit of distance is lower, such that the total signal loss is under 17 dB.

NI PXI-6682 Series User Manual A-6 ni.com

Page 44

Physical

Appendix A Specifications

Chassis requirement

NI PXI-6682 ................................... One 3U CompactPCI or PXI slot

(PXI Slot 2 for full functionality)

NI PXI-6682H................................. One 3U CompactPCI, PXI, or

PXIe hybrid slot

Weight

NI PXI-6682 ................................... 235 g

NI PXI-6682H................................. 220 g

Front panel connectors

NI PXI-6682 ................................... Six SMB male, 50 Ω; one

standard RJ-45 Ethernet connector

NI PXI-6682H................................. Five SMB male, 50 Ω; one

standard RJ-45 Ethernet connector

Front panel indicators............................. Two tricolor LEDs

(green, red, and amber) for GPS and IEEE 1588 status, and two green LEDs for Ethernet link status and speed

Recommended maximum cable lengths

PFI, DC to 1.5 MHz........................ 200 m

CLKOUT to CLKIN

...................... 200 m

Ethernet CAT5................................ 100 m

The NI PXI-6682H does not have a CLKIN connector.

Page 45

Appendix A Specifications

Power Requirements

Voltage (V) Ty pical Maximum

+3.3 V 450 mA 700 mA

+5 V 170 mA 235 mA

+12 V 135 mA 180 mA

–12 V 0 A 0 A

Synchronization Accuracy

Tes t

GPS

IEEE 1588 3 m Ethernet direct connection

IEEE 1588 through a hub

IEEE 1588 through a switch

3,4

3,5

IRIG-B DC ±55 ns, <13 ns standard deviation

IRIG-B AM matching

IRIG-B AM to source

6,7

PPS ±47 ns, <10 ns standard deviation

All synchronization measurements were done by recording the offset between PPS signals generated by two PXI-6682 Series boards inside closed PXI-1031 chassis, at ambient room temperature conditions. Synchronization was performed for 15 minutes before testing began. All test durations were 12 hours.

For the GPS test, two PXI-6682 Series boards were independently synchronizing to GPS and configured to generate a PPS. The specification above represents empirical results. Please note that GPS satellites are only guaranteed to be within 100 ns of UTC. Therefore, the offset between any two devices synchronizing can be as high as 200 ns plus the offset of that device to GPS.

Sync interval of 1 second was used for IEEE 1588 tests, and all Ethernet connections were 100 Mbps.

Netgear DS104 Hub used.

Airlink 101 Gigabit over copper switch used. For this test, a moderate amount of non-1588 Ethernet traffic was present on the switch.

IRIG-B AM matching specification was obtained by setting two PXI-6682 Series boards to synchronize independently to the same IRIG-B AM source and generate a PPS. The offset between their PPS signals was then measured over a 12 hour period.

IRIG-B performance depends on IRIG-B source stability and quality.

±100 ns, <13 ns standard deviation

±47 ns, <10 ns standard deviation

±210 ns, <35 ns standard deviation

±25 μs, <150 ns standard deviation

±1 μs, <220 ns standard deviation

±5 μs, <500 ns standard deviation

Specification

NI PXI-6682 Series User Manual A-8 ni.com

Page 46

Environmental

Appendix A Specifications

Operating Environment

Ambient temperature range.................... 0 to 55 °C

(Tested in accordance with IEC-60068-2-1 and IEC-60068-2-2.)

Relative humidity range ......................... 10% to 90%, noncondensing

(Tested in accordance with IEC-60068-2-56.)

Maximum altitude .................................. 2,000 m (at 25 °C ambient

temperature)

Pollution Degree .................................... 2

Indoor use only.

Storage Environment

Ambient temperature range.................... –20 to 70 °C

(Tested in accordance with IEC-60068-2-1 and IEC-60068-2-2.)

Relative humidity range ......................... 5% to 95% noncondensing

(Tested in accordance with IEC-60068-2-56.)

Shock and Vibration

Operational Shock..................................30 g peak, half-sine, 11 ms pulse

(Tested in accordance with IEC-60068-2-27. Test profile developed in accordance with MIL-PRF-28800F.)

Page 47

Appendix A Specifications

Note Specifications are subject to change without notice.

Safety

Note For UL and other safety certifications, refer to the product label or the Online

Product Certification section.

Random Vibration

Operating .........................................5 to 500 Hz, 0.3 g

Nonoperating ...................................5 to 500 Hz, 2.4 g

rms

(Tested in accordance with IEC-60068-2-64. Nonoperating test profile exceeds the requirements of MIL-PRF-28800F, Class 3.)

This product is designed to meet the requirements of the following standards of safety for electrical equipment for measurement, control, and laboratory use:

• IEC 61010-1, EN 61010-1

• UL 61010-1, CSA 61010-1

Electromagnetic Compatibility

This product is designed to meet the requirements of the following standards of EMC for electrical equipment for measurement, control, and laboratory use:

• EN 61326 (IEC 61326): Class A emissions; Basic immunity

• EN 55011 (CISPR 11): Group 1, Class A emissions

• AS/NZS CISPR 11: Group 1, Class A emissions

• FCC 47 CFR Part 15B: Class A emissions

• ICES-001: Class A emissions

Note For the standards applied to assess the EMC of this product, refer to the Online

Product Certification section.

Note For EMC compliance, operate this device with shielded cabling.

NI PXI-6682 Series User Manual A-10 ni.com

Page 48

CE Compliance

⬉ᄤֵᙃѻક∵ᶧ᥻ࠊㅵ⧚ࡲ⊩ ˄Ё೑

RoHS

Ё೑ᅶ᠋

National Instruments

ヺড়Ё೑⬉ᄤֵᙃѻકЁ䰤ࠊՓ⫼ᶤѯ᳝ᆇ⠽䋼ᣛҸ

(RoHS)

݇Ѣ

National Instruments

Ё೑

RoHS

ড়㾘ᗻֵᙃˈ䇋ⱏᔩ

ni.com/environment/rohs_china

(For information about China RoHS compliance, go to

ni.com/environment/rohs_china

This product meets the essential requirements of applicable European Directives as follows:

• 2006/95/EC; Low-Voltage Directive (safety)

• 2004/108/EC; Electromagnetic Compatibility Directive (EMC)

Online Product Certification

Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for this product, visit number or product line, and click the appropriate link in the Certification column.

Environmental Management

National Instruments is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial not only to the environment but also to NI customers.

Appendix A Specifications

ni.com/certification, search by model

For additional environmental information, refer to the NI and the Environment Web page at

ni.com/environment. This page contains the

environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

Waste Electrical and Electronic Equipment (WEEE)

EU Customers At the end of their life cycle, all products must be sent to a WEEE recycling

center. For more information about WEEE recycling centers and National Instruments WEEE initiatives, visit

ni.com/environment/weee.htm.

Page 49

IRIG Protocol Overview

IRIG (Inter Range Instrumentation Group) is a standard used to transmit precise timing information between instruments to achieve synchronization. There are 6 different IRIG standards defined (A,B,D,E,G and H). The main difference between the standards is the rate with which the synchronization pulses and the information bits are sent. The standards also differ slightly in the content of the information transmitted. Table B-1 summarizes the characteristics of each IRIG standard

Table B-1. IRIG Standard Definitions

Bit rate

IRIG Standard

IRIG-A 1 Kbps (1 ms) 10 fps (100 ms) TOY & Y (BCD)

IRIG-B 100 bps (10 ms) 1 fps (1 s) TOY & Y (BCD)

IRIG-D 1 bpm (60 s) 1 fph (1 hour) TOY (BCD)

IRIG-E 10 bps (100 ms) 6 fpm (10s ) TOY & Y (BCD)

IRIG-G 10 kbps (0.1 ms) 100 fps (10 ms) TOY & Y (BCD)

IRIG-H 1 bps (1 s) 1 fpm (60 s) TOY (BCD)

(bit duration)

bpm—bits per minute bps—bits per second fph—frames per hour fpm—frames per minute fps—frames per second

Frame rate

(frame duration)

BCD—binary-coded decimal SBS—straight binary seconds SOD—seconds of day TOY—time of year Y—year

Information sent

SOD (SBS)

days and hours only

Includes fractions of seconds

Days, hours and minutes only

In addition to the characteristics of each standard described in the table above, each of those is subdivided further depending on the electrical characteristics of the signal used to transmit the data, and the actual data

Page 50

Appendix B IRIG Protocol Overview

transmitted. This is usually specified by 3 digits that follow the IRIG standard name (for instance, IRIG-B 120). Table B-2 details the different characteristics of each IRIG option.

Table B-2. IRIG Option Characteristics

Modulation

type

Carrier Signal

Frequency

Information sent

0 Pulse width modulated 0 DC 0 TOY (BCD), CB, SBS

1 Amplitude modulated

1 100 Hz 1 TOY (BCD), CB

(sine wave)

2 Manchester modulated 2 1 kHz 2 TOY (BCD)

3 10 kHz 3 TOY (BCD), SBS

4 100 kHz 4 TOY (BCD), Year (BCD),

CB, SBS

5 1 MHz 5 TOY (BCD), Year (BCD), CB

6 TOY (BCD), Year (BCD)

7 TOY (BCD), Year (BCD),

SBS

CB = control bits

For example, IRIG-B 120 indicates that the information is sent once per second, 100 bits per second, on a 1kHz amplitude modulated sine wave, and that the information sent is the time of year in BCD, control bits, and the seconds of day in straight binary seconds.

There are 3 types of “bits” sent in the IRIG standard: binary zeroes, binary ones and position identifiers. To transmit a binary zero, the source must keep the signal at mark for 20% of the bit duration and at space for the remaining 80%; to transmit a binary one the source must keep the signal at mark for 50% of the bit duration and at space for the remaining 50%; to transmit a position identifier, the source must keep the signal at mark for 80% of the bit duration, and at space for the remaining 20%. Binary bits are used to transmit information such as time of year, straight binary seconds, and so on, and position identifiers are used to separate the different pieces of data transmitted. The second’s boundary is embedded into the transmission by sending two consecutive position identifiers; the beginning of the second position identifier is the second’s boundary.

NI PXI-6682 Series User Manual B-2 ni.com

Page 51

Appendix B IRIG Protocol Overview

For pulse width modulated systems, conventional digital binary signaling is used, and mark is defined as the logic high state, while space is defined as the logic low state.

For amplitude modulated systems, the source must generate sinusoidal signaling modulating the amplitude such that it has a 10:3 mark:space amplitude ratio (the range of allowable mark to space ratios is 3:1 to 6:1). The source must phase align the generated sine wave such that the leading edges of bits are coincident with zero crossings of the sine wave.

Figure B-1 shows an example of transmission of a binary one, a binary zero, and two position identifiers (with the second’s boundary at the leading edge of the second position identifier). The figure shows the information transmitted using an amplitude modulated signal, and a pulse width modulated signal.

Figure B-1. IRIG-B AM and DC Transmission Example

Page 52

Appendix B IRIG Protocol Overview

IRIG-B is one of the most common IRIG standards used. The following table describes how the information is transmitted when using IRIG-B each second.

0 Position identifier PR (seconds’ boundary marker)

1–4 Units of seconds

6–8 Tens of seconds

Bit

position

Table B-3. IRIG-B Bit Assignments

Information transmitted

9 Position identifier P

10–13 Units of minutes

15–17 Tens of minutes

19 Position identifier P

20–23 Units of hours

25–26 Tens of hours

29 Position identifier P

30–33 Units of days

35–38 Tens of days

39 Position identifier P

40–41 Hundreds of days

49 Position identifier P

50–53 Units of year or control function bits

55–58 Tens of year or control function bits

59 Position identifier P

60–68 Control function bits

69 Position identifier P

70–78 Control function bits

79 Position identifier P

NI PXI-6682 Series User Manual B-4 ni.com

Page 53

Bit

position

Appendix B IRIG Protocol Overview

Table B-3. IRIG-B Bit Assignments (Continued)

Information transmitted

80–88 Nine lowest significant bits of time of day in straight

binary seconds (bit 80 –> 2

89 Position Identifier P

… bit 88 –> 28)

90–97 Eight most significant bits of time of day in straight

binary seconds (bit 90 –> 2

99 Position identifier P

Note: Bits not listed are index markers, and are sent as binary zeroes.

… bit 97 –> 216)

The NI PXI-6682 Series uses the time of day information transmitted as BCD to synchronize its internal timebase. If the IRIG-B signal includes the year, then it also uses that information to synchronize its clock. Otherwise, it gets the year from the host computer. The NI PXI-6682 Series disregards the rest of the information contained in the IRIG-B signal. Therefore, when configured to synchronize to IRIG-B AM, the NI PXI-6682 Series supports IRIG-B 12X, and when configured to synchronize to IRIG-B DC, it supports IRIG-B 00X.

The following assumptions are made regarding the received IRIG-B signal. All conditions must be met for the NI PXI-6682 Series to be able to synchronize accurately:

• Seconds begin every minute at 0, increment to 59, and then roll-over to 0.

• Minutes begin every hour at 0, increment to 59, and then roll-over to 0.

• Hours begin every day at 0, increment to 23, and then roll-over to 0.

2009. If the year is not supplied (sent as 00), the OS system time is read and the year is derived from it.

To achieve proper synchronization of the NI PXI-6682 Series ensure that the IRIG-B source used conforms to the requirements listed above. Note that most IRIG-B sources conform to these requirements.

Page 54

Technical Support and Professional Services

Visit the following sections of the award-winning National Instruments Web site at

• Support—Technical support at

• Training and Certification—Visit

• System Integration—If you have time constraints, limited in-house

ni.com for technical support and professional services:

following resources:

– Self-Help Technical Resources—For answers and solutions,

visit

ni.com/support for software drivers and updates,

a searchable KnowledgeBase, product manuals, step-by-step troubleshooting wizards, thousands of example programs, tutorials, application notes, instrument drivers, and so on. Registered users also receive access to the NI Discussion Forums

ni.com/forums. NI Applications Engineers make sure every

at question submitted online receives an answer.

– Standard Service Program Membership—This program

entitles members to direct access to NI Applications Engineers via phone and email for one-to-one technical support as well as exclusive access to on demand training modules via the Services Resource Center. NI offers complementary membership for a full year after purchase, after which you may renew to continue your benefits.

For information about other technical support options in your area, visit

ni.com/contact.

self-paced training, eLearning virtual classrooms, interactive CDs, and Certification program information. You also can register for instructor-led, hands-on courses at locations around the world.

technical resources, or other project challenges, National Instruments Alliance Partner members can help. To learn more, call your local NI office or visit

ni.com/services, or contact your local office at

ni.com/alliance.

ni.com/support includes the

ni.com/training for

Page 55

Appendix C Technical Support and Professional Services

• Declaration of Conformity (DoC)—A DoC is our claim of

compliance with the Council of the European Communities using the manufacturer’s declaration of conformity. This system affords the user protection for electromagnetic compatibility (EMC) and product safety. You can obtain the DoC for your product by visiting

ni.com/certification.

• Calibration Certificate—If your product supports calibration,

you can obtain the calibration certificate for your product at

ni.com/calibration.

If you searched

ni.com and could not find the answers you need, contact

your local office or NI corporate headquarters. Phone numbers for our worldwide offices are listed at the front of this manual. You also can visit the Worldwide Offices section of

ni.com/niglobal to access the branch

office Web sites, which provide up-to-date contact information, support phone numbers, email addresses, and current events.

NI PXI-6682 Series User Manual C-2 ni.com

Page 56

Glossary

Symbol Prefix Value

ppico10

nnano10

µ micro 10

m milli 10

k kilo 10

Mmega10

Symbols

% percent

± plus or minus

+ positive of, or plus

–12

–9

–6

–3

– negative of, or minus

/per

°degree

Ω ohm

AC alternating current

ADE application development environment

asynchronous a property of an event that occurs at an arbitrary time, without

synchronization to a reference clock

Page 57

Glossary

backplane an assembly, typically a printed circuit board (PCB), with 96-pin

connectors and signal paths that bus the connector pins. PXI systems have two connectors, called the J1 and J2 connectors.

bus the group of conductors that interconnect individual circuitry in a computer.

Typically, a bus is the expansion vehicle to which I/O or other devices are connected. An example of a PC bus is the PCI bus.

CCelsius

CLKIN CLKIN is a signal connected to the SMB input pin of the same name.

CLKIN also can serve as PXI_CLK10_IN.

CLKOUT CLKOUT is the signal on the SMB output pin of the same name.

PXI_CLK10 can be routed to CLKOUT.

clock hardware component that controls timing for reading from or writing to

groups

CompactPCI An adaptation of the Peripheral Component Interconnect (PCI)

Specification 2.1 or later for industrial and/or embedded applications requiring a more robust mechanical form factor than desktop PCI. It uses industry standard mechanical components and high-performance connector technologies to provide an optimized system intended for rugged applications. It is electrically compatible with the PCI Specification, which enables low-cost PCI components to be utilized in a mechanical form factor suited for rugged environments.

NI PXI-6682 Series User Manual G-2 ni.com

Page 58

Glossary

DAQ data acquisition—(1) collecting and measuring electrical signals from

sensors, transducers, and test probes or fixtures and inputting them to a computer for processing; (2) collecting and measuring the same kinds of electrical signals with A/D and/or DIO devices plugged into a computer, and possibly generating control signals with D/A and/or DIO devices in the same computer

DC direct current

ESD electrostatic discharge

frequency the basic unit of rate, measured in events or oscillations per second using a

frequency counter or spectrum analyzer. Frequency is the reciprocal of the period of a signal.

front panel the physical front panel of an instrument or other hardware

GPS Global Positioning System; worldwide system that allows you to receive

precise location and timing information.

Page 59

Glossary

Hz hertz—the number of scans read or updates written per second

IEEE Institute of Electrical and Electronics Engineers

IEEE 1588 an IEEE standard used to synchronize separate devices

in. inch or inches

IRIG Inter Range Instrumentation Group

IRIG-B a standard used to transmit precise timing information

jitter the rapid variation of a clock or sampling frequency from an ideal constant

frequency

LabVIEW a graphical programming language

LED light-emitting diode—a semiconductor light source

master the requesting or controlling device in a master/slave configuration

Measurement & Automation Explorer (MAX)

NI PXI-6682 Series User Manual G-4 ni.com

a controlled centralized configuration environment that allows you to configure all of your National Instruments DAQ, GPIB, IMAQ, IVI, Motion, VISA, and VXI devices

Page 60

Glossary

oscillator a device that generates a fixed frequency signal. An oscillator most often

generates signals by using oscillating crystals, but also may use tuned networks, lasers, or atomic clock sources. The most important specifications on oscillators are frequency accuracy, frequency stability, and phase noise.

output impedance the measured resistance and capacitance between the output terminals of

a circuit

PCI Peripheral Component Interconnect—a high-performance expansion bus

architecture originally developed by Intel to replace ISA and EISA. It is achieving widespread acceptance as a standard for PCs and work-stations; it offers a theoretical maximum transfer rate of 132 Mbytes/s.

PFI Programmable Function Interface

PPS Pulse Per Second

precision the measure of the stability of an instrument and its capability to give the

same measurement over and over again for the same input signal

propagation delay the amount of time required for a signal to pass through a circuit

PXI a rugged, open system for modular instrumentation based on CompactPCI,

with special mechanical, electrical, and software features. The PXIbus standard was originally developed by National Instruments in 1997, and is now managed by the PXIbus Systems Alliance.

PXI star a special set of trigger lines in the PXI backplane for high-accuracy device

synchronization with minimal latencies on each PXI slot

PXI_Trig/PXI_Star synchronization clock

PXI Trigger the PXI timing bus that connects PXI devices directly, by means of

the clock signal that is used to synchronize the PXI Triggers or PXI_STAR triggers on an NI PXI-6682

connectors on top of the devices, for precise synchronization of functions

Page 61

Glossary

s seconds

skew the actual time difference between two events that would ideally occur

simultaneously. Inter-channel skew is an example of the time differences introduced by different characteristics of multiple channels. Skew can occur between channels on one module, or between channels on separate modules (intermodule skew).

slave a computer or peripheral device controlled by another computer

slot the place in the computer or chassis in which a card or module can be

installed

Slot 2 the second slot in a PXI system which can house a master timing unit

SMB sub miniature type B—a small coaxial signal connector that features a snap

coupling for fast connection

synchronous a property of an event that is synchronized to a reference clock

CtoQ

hold

TRIG trigger signal

trigger a digital signal that starts or times a hardware event (for example, starting

setup

clock to output time

hold time

propagation delay time

a data acquisition operation)

setup time

Vvolts

VI virtual instrument

NI PXI-6682 Series User Manual G-6 ni.com

Page 62

Index

Numerics

1588 LED

color explanation (table), 3-4 overview, 3-4

ACT/LINK LED

color explanation (table), 3-5 overview, 3-5

asynchronous routing

overview, 3-16 sources and destinations, 3-17 timing diagram, 3-17

best practices for synchronization, 4-3 block diagram

NI PXI-6682 Series functional

overview, 3-2

routing architecture, 3-10

calibration certificate (NI resources), C-2 CE compliance, specifications, A-11 CLKIN connector

description, 3-6 specifications, A-1

CLKOUT connector, 3-6

description, 3-5 signal description (table), 3-7 specifications, A-1

clock and event generation

overview, 3-8

clock generation

PXI_CLK10 and TCXO, 3-8

color

Link LED color explanation (table), 3-5 Speed LED color explanation (table), 3-5

configuring the device

overview, 2-2 Speed LED, 3-5

conventions used in the manual, vii

Declaration of Conformity (NI resources), C-2 destinations, possible destinations (table), 3-11 diagnostic tools (NI resources), C-1 documentation

conventions used in manual, vii NI resources, C-1 related documentation, viii

drivers (NI resources), C-1

electromagnetic compatibility, A-10 environmental management,

specifications, A-11

WEEE information, A-11 environmental specifications, A-9 equipment, getting started, 1-1 Ethernet port, using, 3-11 examples (NI resources), C-1

front panel