National Instruments 6320, 6321, 6341, 6323, 6343 User Manual

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DAQ X Series
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X Series User Manual

NI 632x/634x/635x/636x/637x/638x/639x Devices
X Series User Manual
May 2019 370784K-01
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Contents

Chapter 1 Getting Started
Safety Guidelines.............................................................................................................. 1-1
Electromagnetic Compatibility Guidelines ...................................................................... 1-2
Hardware Symbol Definitions .......................................................................................... 1-2
Installation ........................................................................................................................ 1-3
Unpacking......................................................................................................................... 1-3
Device Self-Calibration .................................................................................................... 1-4
Getting Started with X Series USB Devices .................................................................... 1-5
USB Device Chassis Ground.................................................................................... 1-5
Ferrite Installation..................................................................................................... 1-6
Mounting NI USB X Series Devices........................................................................ 1-7
Panel/Wall Mounting........................................................................................ 1-7
DIN Rail Mounting........................................................................................... 1-8
USB Device LEDs.................................................................................................... 1-9
USB Cable Strain Relief........................................................................................... 1-9
USB Device Security Cable Slot .............................................................................. 1-10
Device Pinouts..................................................................................................................1-10
Device Specifications ....................................................................................................... 1-10
Device Accessories and Cables ........................................................................................ 1-10
Chapter 2 DAQ System Overview
DAQ Hardware................................................................................................................. 2-2
DAQ-STC3............................................................................................................... 2-2
Calibration Circuitry................................................................................................. 2-3
Cables and Accessories .................................................................................................... 2-3
PCI Express, PXI Express, and USB Mass Termination Device Cables
and Accessories ..................................................................................................... 2-4
SCXI Accessories ............................................................................................. 2-4
SCC Accessories............................................................................................... 2-4
BNC Accessories .............................................................................................. 2-5
Screw Terminal Accessories ............................................................................ 2-6
RTSI Cables...................................................................................................... 2-6
Cables ............................................................................................................... 2-6
Custom Cabling and Connectivity.................................................................... 2-7
USB Device Accessories, USB Cable, Power Supply, and Ferrite.................. 2-7
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Signal Conditioning ..........................................................................................................2-8
Sensors and Transducers...........................................................................................2-8
Signal Conditioning Options .................................................................................... 2-9
SCXI ................................................................................................................. 2-9
SCC...................................................................................................................2-9
Programming Devices in Software ................................................................................... 2-10
Chapter 3 Connector and LED Information
I/O Connector Signal Descriptions ................................................................................... 3-2
+5 V Power Source ...........................................................................................................3-5
USER 1 and USER 2 ........................................................................................................ 3-5
PCI Express Device Disk Drive Power Connector ........................................................... 3-6
When to Use the Disk Drive Power Connector ........................................................3-6
Disk Drive Power Connector Installation.................................................................3-6
RTSI Connector Pinout.....................................................................................................3-7
USB Device LED Patterns................................................................................................3-7
Chapter 4 Analog Input
Analog Input on MIO X Series Devices........................................................................... 4-1
Analog Input Range .................................................................................................. 4-2
Working Voltage Range ...........................................................................................4-3
Analog Input Ground-Reference Settings................................................................. 4-4
Configuring AI Ground-Reference Settings in Software .................................4-6
Multichannel Scanning Considerations .................................................................... 4-6
Analog Input Data Acquisition Methods .................................................................. 4-9
Software-Timed Acquisitions ........................................................................... 4-9
Hardware-Timed Acquisitions.......................................................................... 4-9
Analog Input Triggering ...........................................................................................4-10
Connecting Analog Input Signals ............................................................................. 4-10
Connecting Floating Signal Sources .........................................................................4-12
What Are Floating Signal Sources?.................................................................. 4-12
When to Use Differential Connections with Floating Signal Sources.............. 4-12
When to Use Non-Referenced Single-Ended (NRSE) Connections
with Floating Signal Sources .........................................................................4-12
When to Use Referenced Single-Ended (RSE) Connections
with Floating Signal Sources .........................................................................4-13
Using Differential Connections for Floating Signal Sources ........................... 4-13
Using Non-Referenced Single-Ended (NRSE) Connections
for Floating Signal Sources ...........................................................................4-16
Using Referenced Single-Ended (RSE) Connections
for Floating Signal Sources ...........................................................................4-17
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Connecting Ground-Referenced Signal Sources ...................................................... 4-17
What Are Ground-Referenced Signal Sources? ............................................... 4-17
When to Use Differential Connections with Ground-Referenced
Signal Sources ............................................................................................... 4-18
When to Use Non-Referenced Single-Ended (NRSE) Connections with
Ground-Referenced Signal Sources .............................................................. 4-18
When to Use Referenced Single-Ended (RSE) Connections with
Ground-Referenced Signal Sources .............................................................. 4-19
Using Differential Connections for Ground-Referenced Signal Sources......... 4-19
Using Non-Referenced Single-Ended (NRSE) Connections for
Ground-Referenced Signal Sources .............................................................. 4-20
Field Wiring Considerations..................................................................................... 4-21
Analog Input Timing Signals ................................................................................... 4-22
Aggregate versus Single Channel Sample Rates.............................................. 4-24
AI Sample Clock Signal ................................................................................... 4-24
AI Sample Clock Timebase Signal................................................................... 4-26
AI Convert Clock Signal .................................................................................. 4-27
AI Convert Clock Timebase Signal.................................................................. 4-30
AI Hold Complete Event Signal ....................................................................... 4-30
AI Start Trigger Signal ..................................................................................... 4-30
AI Reference Trigger Signal............................................................................. 4-32
AI Pause Trigger Signal ................................................................................... 4-34
Getting Started with AI Applications in Software.................................................... 4-35
Analog Input on Simultaneous MIO X Series Devices .................................................... 4-36
Analog Input Terminal Configuration...................................................................... 4-37
Analog Input Range.................................................................................................. 4-37
Working Voltage Range ........................................................................................... 4-38
Analog Input Data Acquisition Methods.................................................................. 4-38
Analog Input Triggering........................................................................................... 4-40
Connecting Analog Input Signals............................................................................. 4-41
Types of Signal Sources ................................................................................... 4-41
Differential Connections for Ground-Referenced Signal Sources ................... 4-42
Differential Connections for Floating Signal Sources...................................... 4-43
Unused Channels ...................................................................................................... 4-44
Field Wiring Considerations..................................................................................... 4-44
Minimizing Drift in Differential Mode ............................................................ 4-45
Analog Input Timing Signals ................................................................................... 4-45
Aggregate versus Single Channel Sample Rates.............................................. 4-47
AI Sample Clock Signal ................................................................................... 4-48
AI Sample Clock Timebase Signal................................................................... 4-49
AI Hold Complete Event Signal ....................................................................... 4-50
AI Start Trigger Signal ..................................................................................... 4-50
AI Reference Trigger Signal............................................................................. 4-53
AI Pause Trigger Signal ................................................................................... 4-54
Getting Started with AI Applications in Software.................................................... 4-56
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Chapter 5 Analog Output
AO Reference Selection.................................................................................................... 5-2
Minimizing Glitches on the Output Signal .......................................................................5-2
Analog Output Data Generation Methods ........................................................................5-3
Software-Timed Generations .................................................................................... 5-3
Hardware-Timed Generations................................................................................... 5-3
Analog Output Triggering ................................................................................................ 5-4
Connecting Analog Output Signals .................................................................................. 5-5
Analog Output Timing Signals ......................................................................................... 5-5
AO Start Trigger Signal ............................................................................................ 5-6
Retriggerable Analog Output............................................................................ 5-6
Using a Digital Source ...................................................................................... 5-6
Using an Analog Source ...................................................................................5-7
Routing AO Start Trigger Signal to an Output Terminal ................................. 5-7
AO Pause Trigger Signal ..........................................................................................5-7
Using a Digital Source ...................................................................................... 5-8
Using an Analog Source ...................................................................................5-8
Routing AO Pause Trigger Signal to an Output Terminal................................ 5-8
AO Sample Clock Signal .......................................................................................... 5-8
Using an Internal Source................................................................................... 5-8
Using an External Source ................................................................................. 5-9
Routing AO Sample Clock Signal to an Output Terminal ...............................5-9
Other Timing Requirements .............................................................................5-9
AO Sample Clock Timebase Signal .........................................................................5-10
Getting Started with AO Applications in Software ..........................................................5-11
Chapter 6 Digital I/O
Digital Input Data Acquisition Methods...........................................................................6-2
Software-Timed Acquisitions ................................................................................... 6-2
Hardware-Timed Acquisitions..................................................................................6-2
Digital Input Triggering....................................................................................................6-3
Digital Waveform Acquisition..........................................................................................6-4
DI Sample Clock Signal ........................................................................................... 6-4
Using an Internal Source................................................................................... 6-5
Using an External Source ................................................................................. 6-5
Routing DI Sample Clock to an Output Terminal ............................................ 6-5
Other Timing Requirements .............................................................................6-5
DI Sample Clock Timebase Signal ........................................................................... 6-6
DI Start Trigger Signal ............................................................................................. 6-7
Retriggerable DI ............................................................................................... 6-7
Using a Digital Source ...................................................................................... 6-7
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Using an Analog Source ................................................................................... 6-8
Routing DI Start Trigger to an Output Terminal .............................................. 6-8
DI Reference Trigger Signal..................................................................................... 6-8
Using a Digital Source...................................................................................... 6-9
Using an Analog Source ................................................................................... 6-9
Routing DI Reference Trigger Signal to an Output Terminal .......................... 6-9
DI Pause Trigger Signal ........................................................................................... 6-10
Using a Digital Source...................................................................................... 6-10
Using an Analog Source ................................................................................... 6-10
Routing DI Pause Trigger Signal to an Output Terminal................................. 6-11
Digital Output Data Generation Methods ......................................................................... 6-11
Software-Timed Generations.................................................................................... 6-11
Hardware-Timed Generations .................................................................................. 6-11
Digital Output Triggering ................................................................................................. 6-12
Digital Waveform Generation .......................................................................................... 6-13
DO Sample Clock Signal.......................................................................................... 6-13
Using an Internal Source .................................................................................. 6-13
Using an External Source ................................................................................. 6-14
Routing DO Sample Clock to an Output Terminal .......................................... 6-14
Other Timing Requirements ............................................................................. 6-14
DO Sample Clock Timebase Signal ......................................................................... 6-15
DO Start Trigger Signal............................................................................................ 6-15
Retriggerable DO.............................................................................................. 6-15
Using a Digital Source...................................................................................... 6-16
Using an Analog Source ................................................................................... 6-16
Routing DO Start Trigger Signal to an Output Terminal ................................. 6-16
DO Pause Trigger Signal .......................................................................................... 6-16
Using a Digital Source...................................................................................... 6-17
Using an Analog Source ................................................................................... 6-18
Routing DO Pause Trigger Signal to an Output Terminal ............................... 6-18
I/O Protection ................................................................................................................... 6-18
Programmable Power-Up States....................................................................................... 6-18
DI Change Detection ........................................................................................................ 6-19
DI Change Detection Applications ........................................................................... 6-20
Digital Filtering ................................................................................................................ 6-20
Watchdog Timer ....................................................................................................... 6-23
Connecting Digital I/O Signals......................................................................................... 6-24
Getting Started with DIO Applications in Software......................................................... 6-25
© National Instruments | ix
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Chapter 7 Counters
Counter Timing Engine .................................................................................................... 7-2
Counter Input Applications............................................................................................... 7-3
Counting Edges......................................................................................................... 7-3
Single Point (On-Demand) Edge Counting ......................................................7-4
Buffered (Sample Clock) Edge Counting ......................................................... 7-4
Controlling the Direction of Counting..............................................................7-5
Pulse-Width Measurement........................................................................................7-5
Single Pulse-Width Measurement ....................................................................7-6
Implicit Buffered Pulse-Width Measurement ................................................... 7-6
Sample Clocked Buffered Pulse-Width Measurement ..................................... 7-7
Hardware-Timed Single Point Pulse-Width Measurement ..............................7-7
Pulse Measurement ...................................................................................................7-8
Single Pulse Measurement ................................................................................ 7-8
Implicit Buffered Pulse Measurement ..............................................................7-8
Sample Clocked Buffered Pulse Measurement ................................................ 7-9
Hardware-Timed Single Point Pulse Measurement .......................................... 7-9
Pulse versus Semi-Period Measurements ......................................................... 7-10
Semi-Period Measurement........................................................................................7-10
Single Semi-Period Measurement ....................................................................7-11
Implicit Buffered Semi-Period Measurement ................................................... 7-11
Frequency Measurement...........................................................................................7-11
Low Frequency with One Counter.................................................................... 7-12
High Frequency with Two Counters................................................................. 7-12
Large Range of Frequencies with Two Counters .............................................7-13
Sample Clocked Buffered Frequency Measurement ........................................7-14
Hardware-Timed Single Point Frequency Measurement.................................. 7-16
Choosing a Method for Measuring Frequency ................................................. 7-16
Period Measurement ................................................................................................. 7-20
Position Measurement...............................................................................................7-21
Measurements Using Quadrature Encoders...................................................... 7-21
Measurements Using Two Pulse Encoders....................................................... 7-23
Buffered (Sample Clock) Position Measurement ............................................. 7-23
Hardware-Timed Single Point Position Measurement .....................................7-24
Two-Signal Edge-Separation Measurement .............................................................7-24
Single Two-Signal Edge-Separation Measurement .......................................... 7-24
Implicit Buffered Two-Signal Edge-Separation Measurement ........................7-25
Sample Clocked Buffered Two-Signal Separation Measurement .................... 7-25
Hardware-Timed Single Point Two-Signal Separation Measurement .............7-26
Counter Output Applications ............................................................................................7-26
Simple Pulse Generation...........................................................................................7-27
Single Pulse Generation ....................................................................................7-27
Single Pulse Generation with Start Trigger ...................................................... 7-27
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Pulse Train Generation ............................................................................................. 7-28
Finite Pulse Train Generation ........................................................................... 7-28
Retriggerable Pulse or Pulse Train Generation ................................................ 7-29
Continuous Pulse Train Generation.................................................................. 7-30
Buffered Pulse Train Generation ...................................................................... 7-31
Finite Implicit Buffered Pulse Train Generation .............................................. 7-31
Continuous Buffered Implicit Pulse Train Generation..................................... 7-32
Finite Buffered Sample Clocked Pulse Train Generation ................................ 7-32
Continuous Buffered Sample Clocked Pulse Train Generation ....................... 7-33
Frequency Generation............................................................................................... 7-34
Using the Frequency Generator ........................................................................ 7-34
Frequency Division................................................................................................... 7-35
Pulse Generation for ETS ......................................................................................... 7-35
Counter Timing Signals.................................................................................................... 7-36
Counter n Source Signal ........................................................................................... 7-36
Routing a Signal to Counter n Source .............................................................. 7-37
Routing Counter n Source to an Output Terminal............................................ 7-37
Counter n Gate Signal............................................................................................... 7-37
Routing a Signal to Counter n Gate.................................................................. 7-38
Routing Counter n Gate to an Output Terminal ............................................... 7-38
Counter n Aux Signal ............................................................................................... 7-38
Routing a Signal to Counter n Aux .................................................................. 7-38
Counter n A, Counter n B, and Counter n Z Signals ................................................ 7-39
Routing Signals to A, B, and Z Counter Inputs................................................ 7-39
Routing Counter n Z Signal to an Output Terminal ......................................... 7-39
Counter n Up_Down Signal ..................................................................................... 7-39
Counter n HW Arm Signal ....................................................................................... 7-39
Routing Signals to Counter n HW Arm Input .................................................. 7-40
Counter n Sample Clock Signal................................................................................ 7-40
Using an Internal Source .................................................................................. 7-40
Using an External Source ................................................................................. 7-41
Routing Counter n Sample Clock to an Output Terminal ................................ 7-41
Counter n Internal Output and Counter n TC Signals .............................................. 7-41
Routing Counter n Internal Output to an Output Terminal .............................. 7-41
Frequency Output Signal .......................................................................................... 7-41
Routing Frequency Output to a Terminal ......................................................... 7-41
Default Counter/Timer Pins.............................................................................................. 7-42
Counter Triggering ........................................................................................................... 7-45
Other Counter Features..................................................................................................... 7-45
Cascading Counters .................................................................................................. 7-45
Prescaling.................................................................................................................. 7-46
Synchronization Modes ............................................................................................ 7-46
100 MHz Source Mode..................................................................................... 7-47
External Source Greater than 25 MHz ............................................................. 7-47
External or Internal Source Less than 25 MHz ................................................ 7-47
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Chapter 8 PFI
Using PFI Terminals as Timing Input Signals.................................................................. 8-2
Exporting Timing Output Signals Using PFI Terminals .................................................. 8-2
Using PFI Terminals as Static Digital I/Os ...................................................................... 8-3
Using PFI Terminals to Digital Detection Events ............................................................8-4
Connecting PFI Input Signals ...........................................................................................8-4
PFI Filters .........................................................................................................................8-4
I/O Protection.................................................................................................................... 8-6
Programmable Power-Up States ....................................................................................... 8-6
Chapter 9 Digital Routing and Clock Generation
Clock Routing ...................................................................................................................9-1
100 MHz Timebase................................................................................................... 9-2
20 MHz Timebase..................................................................................................... 9-2
100 kHz Timebase ....................................................................................................9-2
External Reference Clock ......................................................................................... 9-2
10 MHz Reference Clock ......................................................................................... 9-3
Synchronizing Multiple Devices ...................................................................................... 9-3
PXI Express Devices ................................................................................................ 9-3
PCI Express Devices.................................................................................................9-3
USB Devices............................................................................................................. 9-4
Real-Time System Integration (RTSI).............................................................................. 9-4
RTSI Connector Pinout............................................................................................. 9-5
Using RTSI as Outputs .............................................................................................9-6
Using RTSI Terminals as Timing Input Signals....................................................... 9-6
RTSI Filters............................................................................................................... 9-7
PXI and PXI Express Clock and Trigger Signals ............................................................. 9-7
PXIe_CLK100 .......................................................................................................... 9-7
PXIe_SYNC100........................................................................................................9-7
PXI_CLK10 ..............................................................................................................9-8
PXI Triggers .............................................................................................................9-8
PXI_STAR Trigger................................................................................................... 9-8
PXI_STAR Filters.....................................................................................................9-8
PXIe_DSTAR<A..C> ...............................................................................................9-9
Chapter 10 Bus Interface
Data Transfer Methods ..................................................................................................... 10-1
PCI Express/PXI Express Device Data Transfer Methods ....................................... 10-1
USB Device Data Transfer Methods ........................................................................ 10-2
PXI Express Considerations .............................................................................................10-3
PXI and PXI Express Clock and Trigger Signals ..................................................... 10-3
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PXI Express .............................................................................................................. 10-3
PXIe DAQ Bandwidth Considerations ..................................................................... 10-3
USB DAQ Bandwidth Considerations ............................................................................. 10-3
Data Throughput....................................................................................................... 10-4
Chapter 11 Triggering
Triggering with a Digital Source ...................................................................................... 11-1
Triggering with an Analog Source ................................................................................... 11-2
APFI <0,1> Terminals .............................................................................................. 11-2
Analog Input Channels ............................................................................................. 11-3
Analog Input Channels on MIO X Series Devices........................................... 11-3
Analog Input Channels on Simultaneous MIO X Series Devices .................... 11-3
Analog Trigger Actions ............................................................................................ 11-3
Routing Analog Comparison Event to an Output Terminal ..................................... 11-4
Analog Trigger Types....................................................................................................... 11-4
Analog Trigger Accuracy ................................................................................................. 11-6
Appendix A Device-Specific Information
Appendix B Where to Go from Here
Appendix C Troubleshooting
Appendix D NI Services
Index
List of Figures
Figure A-1. NI PCIe-6320 Pinout ............................................................................. A-2
Figure A-2. NI PCIe-6321 and NI PCIe/PXIe-6341 Pinout ..................................... A-4
Figure A-3. NI USB-6341 Screw Terminal Pinout................................................... A-5
Figure A-4. NI USB-6341 BNC Pinout.................................................................... A-6
Figure A-5. NI PCIe-6323/6343 Pinout.................................................................... A-8
Figure A-6. NI USB-6343 Screw Terminal Pinout .................................................. A-9
Figure A-7. NI USB-6343 BNC Pinout.................................................................... A-10
Figure A-8. NI PXIe-6345/6355 Pinout.................................................................... A-12
Figure A-9. NI PCIe-6346 Pinout ............................................................................. A-14
Figure A-10. NI USB 6346 Screw Terminal Pinout................................................... A-15
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Figure A-11. NI USB 6346 BNC Pinout..................................................................... A-16
Figure A-12. NI PXIe-6349 Pinout ............................................................................. A-18
Figure A-13. NI USB-6349 Screw Terminal Pinout...................................................A-19
Figure A-14. NI PCIe-6351 and NI PCIe/PXIe-6361 Pinout...................................... A-21
Figure A-15. NI USB-6351/6361 Screw Terminal Pinout.......................................... A-22
Figure A-16. NI USB-6361 Mass Termination Pinout ...............................................A-23
Figure A-17. NI USB-6361 BNC Pinout ....................................................................A-25
Figure A-18. NI PCIe-6353 and NI PCIe/PXIe-6363 Pinout...................................... A-27
Figure A-19. NI USB-6363 Mass Termination Pinout ...............................................A-28
Figure A-20. NI USB-6353/6363 Screw Terminal Pinout.......................................... A-30
Figure A-21. NI USB-6363 Pinout ............................................................................. A-31
Figure A-22. NI PXIe-PXIe-6356/6366/6386/6396 and PCIe/PXIe-6376 Pinout...... A-33
Figure A-23. NI USB-6366 Mass Termination Pinout ...............................................A-35
Figure A-24. NI USB-6356/6366 Screw Terminal Pinout.......................................... A-36
Figure A-25. NI USB-6356/6366 BNC Pinout ........................................................... A-37
Figure A-26. NI PXIe-6358/6368/6378 Pinout...........................................................A-39
Figure A-27. NI PXIe-6365 Connector 2 Pinout ........................................................A-41
Figure A-28. NI PXIe-6365 Connector 0 and Connector 1 Pinout ............................. A-42
Figure A-29. NI PCIe-6374 Pinout .............................................................................A-44
Figure A-30. NI PXIe-6375 Connector 2 and Connector 3 Pinout ............................. A-46
Figure A-31. NI PXIe-6375 Connector 0 and Connector 1 Pinout ............................. A-47
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1
Getting Started
The X Series User Manual contains information about using the National Instruments X Series data acquisition (DAQ) devices with NI-DAQmx 19.0 and later. X Series devices feature up to 208 analog input (AI) channels, up to four analog output (AO) channels, up to 48 lines of digital input/output (DIO), and four counters. This chapter provides basic information you need to get started using your X Series device.

Safety Guidelines

Operate the NI 63xx X Series devices and modules only as described in this user manual.
Caution NI 63xx devices and modules are not certified for use in hazardous
locations.
Caution Never connect the +5 V power terminals to analog or digital ground or to
any other voltage source on the X series device or any other device. Doing so can damage the device and the computer. NI is not liable for damage resulting from such a connection.
Caution The maximum input voltages rating of AI signals with respect to ground
(and for signal pairs in differential mode with respect to each other) are listed in the specifications document for your device. Exceeding the maximum input voltage of AI signals distorts the measurement results. Exceeding the maximum input voltage rating also can damage the device and the computer. NI is not liable for any damage resulting from such signal connections.
Caution Exceeding the maximum input voltage ratings, which are listed in the
specifications document for each X Series device, can damage the DAQ device and the computer. NI is not liable for any damage resulting from such signal connections.
© National Instruments | 1-1
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Chapter 1 Getting Started

Electromagnetic Compatibility Guidelines

This product was tested and complies with the regulatory requirements and limits for electromagnetic compatibility (EMC) as stated in the product specifications. These requirements and limits are designed to provide reasonable protection against harmful interference when the product is operated in its intended operational electromagnetic environment.
This product is intended for use in industrial locations. There is no guarantee that harmful interference will not occur in a particular installation, when the product is connected to a test object, or if the product is used in residential areas. To minimize the potential for the product to cause interference to radio and television reception or to experience unacceptable performance degradation, install and use this product in strict accordance with the instructions in the product documentation.
Furthermore, any changes or modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules.
Notice To ensure the specified EMC performance, product installation requires
either special considerations or user-installed, add-on devices. Refer to the product installation instructions for further information.
Notice For compliance with Electromagnetic Compatibility (EMC) requirements,
this product must be operated with shielded cables and accessories. If unshielded cables or accessories are used, the EMC specifications are no longer guaranteed unless all unshielded cables and/or accessories are installed in a shielded enclosure with properly designed and shielded input/output ports.
Notice This product may become more sensitive to electromagnetic disturbances
in the operational environment when test leads are attached or when connected to a test object.

Hardware Symbol Definitions

The following symbols are marked on your device or module.
Caution When this symbol is marked on a product, refer to the Safety Guidelines
section for information about precautions to take.
EU Customers At the end of the product life cycle, all products must be sent to
a WEEE recycling center. For more information about WEEE recycling centers, National Instruments WEEE initiatives, and compliance with WEEE Directive 2002/96/EC on Waste and Electronic Equipment, visit
.
weee
1-2 | ni.com
ni.com/environment/
Page 17
X Series User Manual
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Ё೑ᅶ᠋
National Instruments
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(RoHS)
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ni.com/
environment/rohs_china
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(For information about China RoHS compliance,
go to
ni.com/environment/rohs_china
.)

Installation

Before installing your DAQ device, you must install the software you plan to use with the device.
1. Installing application software—Refer to the installation instructions that accompany your software.
2. Installing NI-DAQmx—The DAQ Getting Started guides, packaged with NI-DAQmx and also on
ni.com/manuals, contain step-by-step instructions for installing software and
hardware, configuring channels and tasks, and getting started developing an application.
3. Installing the hardware—Unpack your X Series device as described in the Unpacking section. The DAQ Getting Started guides describe how to install PCI Express, PXI Express, and USB devices, as well as accessories and cables.

Unpacking

The X Series device ships in an antistatic package to prevent electrostatic discharge (ESD). ESD can damage several components on the device.
Caution Never touch the exposed pins of connectors.
To avoid ESD damage in handling the device, take the following precautions:
Ground yourself with a grounding strap or by touching a grounded object.
Touch the antistatic package to a metal part of your computer chassis before removing the device from the package.
Remove the device from the package and inspect it for loose components or any other signs of damage. Notify NI if the device appears damaged in any way. Do not install a damaged device in your computer or chassis.
Store the device in the antistatic package when the device is not in use.
© National Instruments | 1-3
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Chapter 1 Getting Started

Device Self-Calibration

NI recommends that you self-calibrate your X Series device after installation and whenever the ambient temperature changes. Self-calibration should be performed after the device has warmed up for the recommended time period. Refer to the device specifications to find your device warm-up time. This function measures the onboard reference voltage of the device and adjusts the self-calibration constants to account for any errors caused by short-term fluctuations in the environment.
You can initiate self-calibration using Measurement & Automation Explorer (MAX), by completing the following steps.
Note Disconnect all external signals before beginning self-calibration.
1. Launch MAX.
2. Select My System»Devices and Interfaces»your device.
3. Initiate self-calibration using one of the following methods:
•Click Self-Calibrate in the upper right corner of MAX.
Right-click the name of the device in the MAX configuration tree and select Self-Calibrate from the drop-down menu.
Note You can also programmatically self-calibrate your device with NI-DAQmx,
as described in Device Calibration in the NI-DAQmx Help or the LabVIEW Help.
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X Series User Manual

Getting Started with X Series USB Devices

The following sections contain information about X Series USB device best practices and features.

USB Device Chassis Ground

(NI USB-63xx Screw Terminal Devices) For EMC compliance, the chassis of the USB Screw
Terminal X Series device must be connected to earth ground through the chassis ground.
The wire should be AWG 16 or larger solid copper wire with a maximum length of 1.5 m (5 ft). Attach the wire to the earth ground of the facility’s power system. For more information about earth ground connections, refer to the document, Grounding for Test and Measurement Devices, by going to
You can attach and solder a wire to the chassis ground lug of the USB X Series device, as shown in Figure 1-1. The wire should be as short as possible.
ni.com/info and entering the Info Code emcground.
Figure 1-1. Grounding an NI Screw Terminal USB-63xx Device through
the Chassis Ground Lug
(NI USB-63xx BNC Devices) You can attach a wire to a CHS GND screw terminal of any
NI BNC USB-63xx device. Use as short a wire as possible. In addition, the wires in the shielded cable that extend beyond the shield should be as short as possible.
Note (NI USB-636x Mass Termination Devices) USB Mass Termination
X Series devices have chassis ground connection through the I/O connector.
© National Instruments | 1-5
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Chapter 1 Getting Started
x1
3
2
1

Ferrite Installation

(NI USB-63xx Mass Termination and BNC Devices) To ensure the specified EMC
performance for radiated RF emissions of the NI USB-63xx Mass Termination and BNC device, install the included snap-on ferrite bead onto the power cable, as shown in Figure 1-2.
Ensure that the ferrite bead is as close to the end of the power cable as practical. Install the snap-on ferrite bead by opening the housing and looping the power cable once through the center of the ferrite. Close the ferrite bead until the locking tabs engage securely.
You can order additional EMI suppression ferrites, 10.2 mm length (part number 781233-02) from NI.
Figure 1-2. Installing a Ferrite on an NI USB-63xx Mass Termination/BNC Device
1 Power Cable 2Ferrite 3 NI USB X Series Device
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X Series User Manual

Mounting NI USB X Series Devices

(NI USB-63xx Screw Terminal/Mass Termination Devices) You can use your NI USB
X Series device on a desktop, mount it to a wall or panel as described in the Panel/Wall
Mounting section, or mount it to a standard DIN rail as described in the DIN Rail Mounting
section.
Panel/Wall Mounting
Complete the following steps to mount your NI USB X Series device to a wall or panel using the USB X Series mounting kit (part number 781514-01 not included in your USB X Series device kit). Refer to Figure 1-3.
1. Use three #8-32 flathead screws to attach the backpanel wall mount to the panel/wall. Tighten the screws with a #2 Phillips screwdriver to a torque of 1.1 N · m (10 lb · in.).
Figure 1-3. Using the USB X Series Mounting Kit on a Wall or Panel
2. Place the USB X Series device on the backpanel wall mount with the signal wires facing down and the device bottom sitting on the backpanel wall mount lip.
3. While holding the USB X Series device in place, attach the front bracket to the backpanel wall mount by tightening the two thumbscrews.
© National Instruments | 1-7
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Chapter 1 Getting Started
DIN Rail Mounting
Complete the following steps to mount your USB X Series device to a DIN rail using the USB X Series mounting kit with DIN rail clip (part number 781515-01 not included in your USB X Series device kit).
1. Fasten the DIN rail clip to the back of the backpanel wall mount using a #1 Phillips screwdriver and four machine screws (part number 740981-01), included in the kit as shown in Figure 1-4. Tighten the screws to a torque of 0.4 N · m (3.6 lb · in.).
Figure 1-4. Attaching the DIN Rail Clip to the Backpanel Wall Mount
2. Clip the bracket onto the DIN rail as shown in Figure 1-5.
Figure 1-5. DIN Rail Clip Parts Locator Diagram
1
2
3
1 DIN Rail Clip 2 DIN Rail Spring 3 DIN Rail
3. Place the USB X Series device on the backpanel wall mount with the signal wires facing down and the device bottom sitting on the backpanel wall mount lip.
4. While holding the USB X Series device in place, attach the front bracket to the backpanel wall mount by tightening the two thumbscrews.
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X Series User Manual

USB Device LEDs

(NI USB-63xx Devices) Refer to the USB Device LED Patterns section of Chapter 3, Connector
and LED Information, for information about the USB X Series device READY and ACTIVE
LEDs.

USB Cable Strain Relief

(NI USB-63xx Devices) You can provide strain relief for the USB cable by using the jackscrew
on the locking USB cable (included in the USB X Series device kit) to securely attach the cable to the device, as shown in Figure 1-6.
Figure 1-6. USB Cable Strain Relief on USB X Series Devices
2
1
1 Locking USB Cable Jackscrew 2 Jackscrew Hole 3 Security Cable Slot
3
© National Instruments | 1-9
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Chapter 1 Getting Started

USB Device Security Cable Slot

(NI USB-63xx Devices) The security cable slot, shown in Figure 1-6, allows you to attach an
optional laptop lock to your USB X Series device.
Note The security cable is designed to act as a deterrent, but might not prevent the
device from being mishandled or stolen. For more information, refer to the documentation that accompanied the security cable.
Note The security cable slot on the USB device might not be compatible with all
laptop lock cables.

Device Pinouts

Refer to Appendix A, Device-Specific Information, for X Series device pinouts.

Device Specifications

Refer to the device specifications document for your device. X Series device documentation is available on ni.com/manuals.

Device Accessories and Cables

NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables
and Accessories section of Chapter 2, DAQ System Overview, for more information.
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2
Sensors and
Tr ansducers
Signal
Conditioning
DAQ
Hardware
Personal Computer
or
PXI Express
Chassis
DAQ
Software
Cables and Accessories
DAQ System Overview
Figure 2-1 shows a typical DAQ system, which includes sensors, transducers, signal conditioning devices, cables that connect the various devices to the accessories, the X Series device, programming software, and PC. The following sections cover the components of a typical DAQ system.

Figure 2-1. Components of a Typical DAQ System

© National Instruments | 2-1
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Chapter 2 DAQ System Overview

DAQ Hardware

DAQ hardware digitizes signals, performs D/A conversions to generate analog output signals, and measures and controls digital I/O signals. Figure 2-2 features components common to all X Series devices.

Figure 2-2. General X Series Block Diagram

Analog Input
Analog Output
I/O Connector
Digital I/O
Counters
PFI
Digital
Routing
and Clock
Generation
RTSI
Bus
Interface
Bus

DAQ-STC3

The DAQ-STC3 and DAQ-6202 implement a high-performance digital engine for X Series data acquisition hardware. Some key features of this engine include the following:
Flexible AI and AO sample and convert timing
Many triggering modes
Independent AI, AO, DI, DO, and counter FIFOs
Generation and routing of RTSI signals for multi-device synchronization
Generation and routing of internal and external timing signals
Four flexible 32-bit counter/timer modules with hardware gating
Digital waveform acquisition and generation
Static DIO signals
True 5 V high current drive DO
DI change detection
DO watchdog timers
PLL for clock synchronization
Seamless interface to signal conditioning accessories
PCI Express/PXI Express interface
Independent scatter-gather DMA controllers for all acquisition and generation functions
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X Series User Manual

Calibration Circuitry

The X Series analog inputs and outputs have calibration circuitry to correct gain and offset errors. You can calibrate the device to minimize AI and AO errors caused by time and temperature drift at run time. No external circuitry is necessary; an internal reference ensures high accuracy and stability over time and temperature changes.
Factory-calibration constants are permanently stored in an onboard EEPROM and cannot be modified. When you self-calibrate the device, as described in the Device Self-Calibration section of Chapter 1, Getting Started, software stores new constants in a user-modifiable section of the EEPROM. To return a device to its initial factory calibration settings, software can copy the factory-calibration constants to the user-modifiable section of the EEPROM. Refer to the NI-DAQmx Help or the LabVIEW Help for more information about using calibration constants.
For a detailed calibration procedure for X Series devices, refer to the DAQ Multifunction I/O (MIO) and Simultaneous Multifunction I/O (SMIO) Devices Calibration Procedure available at
ni.com/manuals.

Cables and Accessories

Caution For compliance with Electromagnetic Compatibility (EMC)
requirements, this product must be operated with shielded cables and accessories. If unshielded cables or accessories are used, the EMC specifications are no longer guaranteed unless all unshielded cables and/or accessories are installed in a shielded enclosure with properly designed and shielded input/output ports.
NI offers a variety of products to use with X Series PCI Express, PXI Express, USB devices, including cables, connector blocks, and other accessories, as follows:
Shielded cables and cable assemblies, and unshielded ribbon cables and cable assemblies
Screw terminal connector blocks, shielded and unshielded
RTSI bus cables
SCXI modules and accessories for isolating, amplifying, exciting, and multiplexing signals; with SCXI you can condition and acquire up to 3,072 channels
Low-channel-count signal conditioning modules, devices, and accessories, including conditioning for strain gauges and RTDs, simultaneous sample and hold circuitry, and relays
For more specific information about these products, refer to the document, 63xx Models : DAQ Multifunction I/O Cable and Accessory Compatibility, available at ni.com/manuals.
Refer to the Custom Cabling and Connectivity section of this chapter and the Field Wiring
Considerations section of Chapter 4, Analog Input, for information about how to select
accessories for your X Series device.
© National Instruments | 2-3
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Chapter 2 DAQ System Overview

PCI Express, PXI Express, and USB Mass Termination Device Cables and Accessories

This section describes some cable and accessory options for X Series devices with one, two, three, or four 68-pin connectors. Refer to ni.com for other accessory options including new devices.
SCXI Accessories
SCXI is a programmable signal conditioning system designed for measurement and automation applications. To connect your X Series device to an SCXI chassis, use the SCXI-1349 adapter and an SHC68-68-EPM cable.
Note (NI 6346/6349/6356/6358/6366/6368/6374/6376/6378 Devices)
Simultaneous MIO (SMIO) X Series devices only support controlling SCXI in parallel mode.
Note (NI PXIe-6386/6396 Devices) PXIe-6386 and PXIe-6396 devices do not
support SCXI. For more information about special considerations for these devices,
ni.com/info and enter the Info Code smio14ms.
Use Connector 0 of your X Series device to control SCXI in parallel and multiplexed mode. NI-DAQmx only supports SCXI in parallel mode on Connector 1, 2, or 3.
Note When using Connector 1, 2, or 3 in parallel mode with SCXI modules that
support track and hold, you must programmatically disable track and hold.
SCC Accessories
SCC provides portable, modular signal conditioning to your DAQ system. Use an SHC68-68-EPM shielded cable to connect your X Series device to an SCC module carrier, such as the following:
SC-2345
SC-2350
SCC-68
You can use either connector on MIO X Series devices to control an SCC module carrier with NI-DAQmx.
Note PCI Express users should consider the power limits on certain SCC modules
without an external power supply. Refer to the device specifications, and the
PCI Express Device Disk Drive Power Connector section of Chapter 3, Connector and LED Information, for information about power limits and increasing the current
the device can supply on the +5 V terminal.
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X Series User Manual
Note (NI 6346/6349/6356/6358/6366/6368/6374/6376/6378/6386/6396 Devices)
Note (NI 6345/6355/6365/6375 Devices) SCC is supported only on Connector 0.
Simultaneous MIO X Series devices do not support SCC.
BNC Accessories
You can use the SHC68-68-EPM shielded cable, to connect your DAQ device to the BNC accessories listed in Table 2-1.
Table 2-1. BNC Accessories
BNC Accessory Description
BNC-2110 Provides BNC connectivity to all analog
signals, some digital signals, and spring terminals for other digital signals
BNC-2111
BNC-2120 Similar to the BNC-2110, and also has a
*
Provides BNC connectivity to 16 single-ended analog input signals, two analog output signals, five DIO/PFI signals, and the external reference voltage for analog output
built-in function generator, quadrature encoder, temperature reference, and thermocouple connector
BNC-2090A Desktop/rack-mountable device with
22 BNCs for connecting analog, digital, and timing signals
BNC-2115
Provides BNC connectivity for 24 differential or 48 single-ended analog inputs for connectors 1, 2, or 3 of the NI 6345/6355/6365/6375 devices. This leaves 8 differential or 16 single-ended analog inputs inaccessible on connectors 1, 2, or 3. Provides BNC connectivity for 24 differential analog inputs for connector 1 of the NI 6349 device.
*
The BNC-2111 cannot be used with NI 6356/6358/6366/6368/6374/6376/6378/6386/6396 SMIO
X Series devices.
The BNC-2115 can only be used on connectors 1, 2, or 3 of NI 6345/6355/6365/6375 devices and
connector 1 of the NI 6349 device.
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Chapter 2 DAQ System Overview
You can use one BNC accessory on connector 0 of any X Series device. An additional BNC accessory may be used on connector 1 of any X series device except the NI 6345/6349/6355/ 6365/6375 devices. The BNC-2115 can only be used on connectors 1, 2, or 3 of the NI 6345/ 6355/6365/6375 devices and connector 1 of the NI 6349 device.
Screw Terminal Accessories
National Instruments offers several styles of screw terminal connector blocks. All terminal connector blocks require a cable except the TB-2706 to connect an X Series device to a connector block, as listed in Table 2-2.
Table 2-2. Screw Terminal Accessories
Screw Terminal Accessory Description
CB-68LP and CB-68LPR Unshielded connector blocks
SCC-68 I/O connector block with screw terminals,
general breadboard area, bus terminals, and four expansion slots for SCC signal conditioning modules.
SCB-68 Shielded connector block with temperature
sensor
SCB-68A Screw terminal block with temperature
sensor
TBX-68 DIN rail-mountable connector block
TB-2706
*
Front panel mounted terminal block for PXI Express X Series devices
*
TB-2706 (not for use with NI 6345/6346/6349/6355/6365/6375 devices) uses Connector 0 of your
PXI Express device. After a TB-2706 is installed, Connector 1 cannot be used.
RTSI Cables
Use RTSI bus cables to connect timing and synchronization signals among PCI/PCI Express devices, such as X Series, M Series, CAN, and other measurement, vision, and motion devices. Since PXI devices use PXI backplane signals for timing and synchronization, no cables are required.
Cables
You can use the following cables:
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X Series User Manual
SHC68-68-EPM1—High-performance shielded cable designed for M/X Series devices. It has individual bundles separating analog and digital signals. Each differential analog input channel is routed on an individually shielded twisted pair of wires. Analog outputs are also individually shielded.
Note The SHC68-68-EPM cable is recommended for
NI 6345/6349/6355/6365/6375 connector 0, but does not work on NI 6345/6355/6365/6375 connectors 1, 2, or 3, nor NI 6349 connector 1.
SHC68-68—Lower-cost shielded cable with 34 twisted pairs of wire. The cable is recommended for NI 6345/6355/6365/6375 connectors 1, 2, or 3, and NI 6349 connector 1.
RC68-68—Highly-flexible unshielded ribbon cable
Custom Cabling and Connectivity
NI offers cables and accessories for many applications. However, if you want to develop your own cable, adhere to the following guidelines for best results:
For AI signals, use shielded, twisted-pair wires for each AI pair of differential inputs. Connect the shield for each signal pair to the ground reference at the source.
Route the analog lines separately from the digital lines.
When using a cable shield, use separate shields for the analog and digital sections of the cable. To prevent noise when using a cable shield, use separate shields for the analog and digital sections of the cable.
For more information about the connectors used for DAQ devices, refer to the document, NI DAQ Device Custom Cables, Replacement Connectors, and Screws, by going to
ni.com/info and entering the Info Code rdspmb.
CA-1000 Custom Connectivity Enclosure
The CA-1000 is a configurable enclosure that gives user-defined connectivity and flexibility through customized panelettes. Visit ni.com for more information about the CA-1000.
SHC68-C68-EPM Cable for Custom Connectivity
The SHC68-C68-EPM can be used for any device or module for which the SHC68-68-EPM is recommended. The SHC68-C68-EPM is intended for custom breakout fixtures that use the VHDCI 0.8 mm connector. All supported accessories listed in this manual feature a SCSI 0.050 D-Type connector and will not work with this cable.
USB Device Accessories, USB Cable, Power Supply, and Ferrite
NI offers a variety of products to use with the USB X Series devices, as shown in Table 2-3.
1
NI recommends that you use the SHC68-68-EPM cable; however, an SHC68-68-EP cable works with X Series devices.
© National Instruments | 2-7
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Chapter 2 DAQ System Overview
Table 2-3. USB Device Accessories, Power Supply, and Ferrite
Description Part Number
Universal power supply with mini-combicon connector, 12 VDC, 2.5 A
USB X Series mounting kit with DIN rail clip* 781515-01
USB X Series mounting kit* 781514-01
USB X Series lid with thumbscrew fasteners 781661-01
USB cable with locking screw, 2 m 780534-01
EMI suppression ferrites, 10.2 mm length 781233-02
*
Not for use with NI USB BNC devices.
781513-01

Signal Conditioning

Most computer-based measurement systems involve plug-in data acquisition (DAQ) devices with some form of signal conditioning. Sensors and transducers usually require signal conditioning before a measurement system can effectively and accurately acquire the signal. The front-end signal conditioning system can include functions such as signal amplification, attenuation, filtering, electrical isolation, simultaneous sampling, and multiplexing. In addition, many transducers require excitation currents or voltages, bridge completion, linearization, or high amplification for proper and accurate operation.

Sensors and Transducers

Sensors generate electrical signals to measure physical phenomena, such as temperature, force, sound, or light. Strain gauges, thermocouples, thermistors, angular encoders, linear encoders, and resistance temperature detectors (RTDs) are commonly used sensors.
To measure signals from these various transducers, you must convert them into a form that a DAQ device can accept. For example, the output voltage of most thermocouples is very small and susceptible to noise. You may need to amplify or filter the thermocouple output before digitizing it. The manipulation of signals to prepare them for digitizing is called signal conditioning.
For more information about sensors, refer to the following documents:
For general information about sensors, visit
If you are using LabVIEW, refer to the LabVIEW Help by selecting Help»Search the LabVIEW Help in LabVIEW and then navigate to the Taking Measurements book on the Contents tab.
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ni.com/sensors.
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X Series User Manual
If you are using other application software, refer to Common Sensors in the NI-DAQmx Help or the LabVIEW Help.

Signal Conditioning Options

SCXI
SCXI is a front-end signal conditioning and switching system for various measurement devices, including X Series devices. An SCXI system consists of a rugged chassis that houses shielded signal conditioning modules that amplify, filter, isolate, and multiplex analog signals from thermocouples or other transducers. SCXI is designed for large measurement systems or systems requiring high-speed acquisition.
Note (NI 6346/6349/6356/6358/6366/6368/6374/6376/6378 Devices)
Simultaneous MIO (SMIO) X Series devices only support controlling SCXI in parallel mode.
Note (NI PXIe-6386/6396 Devices) PXIe-6386 and PXIe-6396 devices do not
support SCXI. For more information about special considerations for these devices, go to ni.com/info and enter the Info Code smio14ms.
System features include the following:
Modular architecture—Choose your measurement technology
Expandability—Expand your system to 3,072 channels
Integration—Combine analog input, analog output, digital I/O, and switching into a single, unified platform
High bandwidth—Acquire signals at high rates
Connectivity—Select from SCXI modules with thermocouple connectors or terminal blocks
SCC
SCC is a front-end signal conditioning system for X Series plug-in data acquisition devices. An SCC system consists of a shielded carrier that holds up to 20 single- or dual-channel SCC modules for conditioning thermocouples and other transducers. SCC is designed for small measurement systems where you need only a few channels of each signal type, or for portable applications. SCC systems also offer the most comprehensive and flexible signal connectivity options.
System features include the following:
Modular architecture—Select your measurement technology on a per-channel basis
Small-channel systems—Condition up to 16 analog input and eight digital I/O lines
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Chapter 2 DAQ System Overview
Low-profile/portable—Integrates well with other laptop computer measurement technologies
Connectivity—Incorporates panelette technology to offer custom connectivity to thermocouple, BNC, LEMO™ (B Series), and MIL-Spec connectors
Note (PCI Express X Series Devices) PCI Express users should consider the
power limits on certain SCC modules without an external power supply. Refer to the device specifications, and the PCI Express Device Disk Drive Power Connector section of Chapter 3, Connector and LED Information, for information about power limits and increasing the current the device can supply on the +5 V terminal.
Note (NI 6346/6349/6356/6358/6366/6368/6374/6376/6378/6386/6396 Devices)
Simultaneous MIO (SMIO) X Series devices do not support SCC.

Programming Devices in Software

National Instruments measurement devices are packaged with NI-DAQmx driver software, an extensive library of functions and VIs you can call from your application software, such as LabVIEW or LabWindows/CVI, to program all the features of your NI measurement devices. Driver software has an application programming interface (API), which is a library of VIs, functions, classes, attributes, and properties for creating applications for your device.
X Series devices use the NI-DAQmx driver. NI-DAQmx includes a collection of programming examples to help you get started developing an application. You can modify example code and save it in an application. You can use examples to develop a new application or add example code to an existing application.
To locate LabVIEW, LabWindows/CVI, Measurement Studio, Visual Basic, and ANSI C examples, refer to the document, Where Are NI-DAQmx Examples Installed in Windows?, by going to
For additional examples, refer to ni.com/examples.
2-10 | ni.com
ni.com/info and entering the Info Code daqmxexp.
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Table 2-4 lists the earliest NI-DAQmx support version for each X Series device.

Table 2-4. X Series NI-DAQmx Software Support

Device NI-DAQmx Earliest Version Support
NI PCIe/PXIe-632x/6341/6343 NI-DAQmx 9.0
NI PCIe/PXIe-6351/6353/6361/6363 NI-DAQmx 9.0
NI PXIe-6356/6358/6366/6368 NI-DAQmx 9.0.2
NI USB-6341/6343/6351/6353/6361/6363
NI-DAQmx 9.2
Screw Terminal
NI USB-6356/6366 Screw Terminal NI-DAQmx 9.2.1
NI USB-6361/6363 Mass Termination NI-DAQmx 9.5
NI USB-6366 Mass Termination NI-DAQmx 9.5
NI USB-6341/6343/6356/6361/6363/6366
NI-DAQmx 9.5
BNC
NI PXIe-6345/6355/6365/6375 NI-DAQmx 14.1
NI PXIe-6376/6378 NI-DAQmx 15.5
NI PCIe-6374/6376 NI-DAQmx 17.6
NI PXIe-6349 NI-DAQmx 18.1
NI PCIe-6346 NI-DAQmx 18.1
USB-6346/6349 Screw Terminal NI-DAQmx 18.6
USB-6346/6349 BNC NI-DAQmx 18.6
NI PXIe-6386/6396 NI-DAQmx 19.0
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3
Connector and LED Information
The I/O Connector Signal Descriptions and +5 V Power Source sections contain information about X Series connector signals and power. Refer to Appendix A, Device-Specific Information, for device I/O connector pinouts.
The PCI Express Device Disk Drive Power Connector and RTSI Connector Pinout sections refer to X Series PCI Express device power and the RTSI connector on PCI Express devices.
The USB Device LED Patterns section refers to the X Series USB device READY, POWER, and ACTIVE LEDs.
© National Instruments | 3-1
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Chapter 3 Connector and LED Information

I/O Connector Signal Descriptions

Table 3-1 describes the signals found on the I/O connectors. Not all signals are available on all devices.

Table 3-1. I/O Connector Signals

Signal Name Reference Direction Description
AI GND Analog Input Ground—These terminals are the
reference point for single-ended AI measurements in RSE mode and the bias current return point for DIFF measurements. All three ground references—AI GND, AO GND, and D GND—are connected on the device.
AI <0..207> Va ri e s Input Analog Input Channels 0 to 207
(MIO X Series Devices) For single-ended measurements, each signal is an analog input voltage channel. In RSE mode, AI GND is the reference for these signals. In NRSE mode, the reference for each AI <0..15> signal is AI SENSE; the reference for each AI <16..79> signal is AI SENSE 2; the reference for each AI <80..143> is AI SENSE 3; and the reference for each AI <144..207> is AI SENSE 4.
For differential measurements on MIO X Series devices, AI 0 and AI 8 are the positive and negative inputs of differential analog input channel 0. Similarly, the following signal pairs also form differential input channels:
AI <1,9>, AI <2,10>, AI <3,11>, AI <4,12>, AI <5,13>, AI <6,14>, AI <7,15>, AI <16,24>, AI <17,25>, AI <18,26>, AI <19,27>, AI <20,28>, AI <21,29>, AI <22,30>, AI <23,31> and so on.
Also refer to the Connecting Ground-Referenced
Signal Sources section of Chapter 4, Analog Input.
(Simultaneous MIO X Series Devices) For differential measurements on Simultaneous MIO X Series devices, AI 0+ and AI 0- are the positive and negative inputs of differential analog input channel 0.
Also refer to the Connecting Analog Input Signals section of Chapter 4, Analog Input.
*
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Table 3-1. I/O Connector Signals (Continued)
Signal Name Reference Direction Description
AI SENSE, AI SENSE 2, AI SENSE 3, AI SENSE 4
Input Analog Input Sense—In NRSE mode, the reference
for each AI <0..15> signal is AI SENSE; the reference for each AI <16..31> signal is AI SENSE 2; the reference for each AI <80..143> is AI SENSE 3; and the reference for each AI <144..207> is AI SENSE 4. Also refer to the
Connecting Ground-Referenced Signal Sources
section of Chapter 4, Analog Input.
AO <0..3> AO GND Output Analog Output Channels 0 to 3—These terminals
supply the voltage output of AO channels 0 to 3.
AO GND Analog Output Ground—AO GND is the
reference for AO <0..3>. All three ground references—AI GND, AO GND, and D GND—are connected on the device.
*
D GND Digital Ground—D GND supplies the reference for
P0.<0..31>, PFI <0..15>/P1/P2, and +5 V. All three
P0.<0..31> D GND Input or
Output
ground references—AI GND, AO GND, and D GND—are connected on the device.
Port 0 Digital I/O Channels 0 to 31—You can individually configure each signal as an input or
*
output.
APFI <0,1> AO GND
or AI GND
Input Analog Programmable Function Interface
Channels 0to1—Each APFI signal can be used as AO external reference inputs for AO <0..3>, or as an analog trigger input. APFI <0,1> are referenced to AI GND when they are used as analog trigger inputs. APFI <0,1> are referenced to AO GND when they are used as AO external offset or reference inputs. These functions are not available on all devices. Refer to the device specifications.
+5 V D GND Output +5 V Power Source—These terminals provide a
fused +5 V power source. Refer to the +5 V Power
Source section for more information.
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Chapter 3 Connector and LED Information
Table 3-1. I/O Connector Signals (Continued)
Signal Name Reference Direction Description
PFI <0..7>/ P1.<0..7> PFI <8..15>/ P2.<0..7>
D GND Input or
Output
Programmable Function Interface or Digital I/O Channels 0 to 7 and Channels 8 to 15—Each of
these terminals can be individually configured as a PFI terminal or a digital I/O terminal.
As an input, each PFI terminal can be used to supply an external source for AI, AO, DI, and DO timing signals or counter/timer inputs.
As a PFI output, you can route many different internal AI, AO, DI, or DO timing signals to each PFI terminal. You can also route the counter/timer outputs to each PFI terminal.
As a Port 1 or Port 2 digital I/O signal, you can individually configure each signal as an input or output.
NC No connect—Do not connect signals to these
terminals.
USER 1, USER 2
User-Defined Channels 1 and 2—On
NI USB-63xx BNC devices, the USER <1..2> BNC connectors allow you to use a BNC connector for a digital or timing I/O signal of your choice. The USER <1..2> BNC connectors are internally routed to the USER <1..2> screw terminals.
CHS GND Chassis Ground†—This terminal connects to the
USB-63xx BNC device metal enclosure. You can connect your cable’s shield wire to CHS GND for a ground connection.
*
Though AI GND, AO GND, and D GND are connected on the X Series device, each ground has a slight
difference in potential.
USB-63xx Screw Terminal users can connect the shield of a shielded cable to the chassis ground lug
for a ground connection. The chassis ground lug is not available on all device versions.
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X Series User Manual

+5 V Power Source

The +5 V terminals on the I/O connector supply +5 V referenced to D GND. Use these terminals to power external circuitry.
Caution Never connect the +5 V power terminals to analog or digital ground or to
any other voltage source on the X Series device or any other device. Doing so can damage the device and the computer. NI is not liable for damage resulting from such a connection.
The power rating on most devices is +4.75 VDC to +5.25 VDC at 1 A.
Refer to the device specifications to obtain the device power rating.
Note (PCI Express X Series Devices) Some PCI Express X Series devices
supply less than 1 A of +5 V power unless you use the disk drive power connector. Refer to the PCI Express Device Disk Drive Power Connector section for more information.

USER 1 and USER 2

The USER 1 and USER 2 BNC connectors allow you to use a BNC connector for a digital or timing I/O signal of your choice. The USER 1 and USER 2 BNC connectors are routed internally to the USER 1 and USER 2 screw terminals, as shown in Figure 3-1.

Figure 3-1. USER 1 and USER 2 BNC Connections

Screw
Terminal
Block
USER 1 BNC
D GND
USER 2 BNC
D GND
Internal
Connection
USER 1 USER 2 D GND +5 V AI GND AI SENSE AI SENSE 2 APFI 0 CHS GND
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Chapter 3 Connector and LED Information

PCI Express Device Disk Drive Power Connector

(NI PCIe-632x/634x/635x/636x Devices, not including PCIe-6346) The disk drive power
connector is a four-pin hard drive connector on some PCI Express devices that, when connected, increases the current the device can supply on the +5 V terminal.
Note To ensure the best performance and accuracy for the PCI Express X Series
device, temperature regulation is required. For more information, refer to the document Guidelines for Temperature Management of PCIe Devices, by going to
ni.com/info and entering info code PCIeCooling.

When to Use the Disk Drive Power Connector

PCI Express X Series devices without the disk drive power connector installed perform identically to other X Series devices for most applications and with most accessories. For most applications, it is not necessary to install the disk drive power connector.
However, you should install the disk drive power connector in either of the following situations:
You need more power than listed in the device specifications
You are using an accessory without an external power supply, such as the SC-2345
Refer to the device specifications for more information about PCI Express power requirements and current limits.

Disk Drive Power Connector Installation

Before installing the disk drive power connector, you must install and set up the PCI Express X Series device as described in the DAQ Getting Started Guide for PCI/PCI Express. Complete the following steps to install the disk drive power connector.
1. Power off and unplug the computer.
2. Remove the computer cover.
3. Attach the PC disk drive power connector to the disk drive power connector on the device, as shown in Figure 3-2.
Note The power available on the disk drive power connectors in a computer can
vary. For example, consider using a disk drive power connector that is not in the same power chain as the hard drive.
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X Series User Manual
Figure 3-2. Connecting to the Disk Drive Power Connector
1
1 Device Disk Drive Power Connector 2 PC Disk Drive Power Connector
2
4. Replace the computer cover, and plug in and power on the computer.

RTSI Connector Pinout

(NI PCIe-632x/634x/635x/636x/637x Devices) Refer to the RTSI Connector Pinout section of
Chapter 9, Digital Routing and Clock Generation, for information about the RTSI connector on PCI Express X Series devices.

USB Device LED Patterns

(NI USB-634x/635x/636x Devices) USB X Series devices have LEDs labeled ACTIVE and
READY. The ACTIVE LED indicates activity over the bus. The READY LED indicates whether or not the device is configured. Table 3-2 shows the behavior of the LEDs.

Table 3-2. LED Patterns

POWER
LED*
Off or On Off Off The device is not powered or not connected to the
ACTIVE
LED
READY
LED
USB Device State
host computer, or the host computer does not have the correct version of NI-DAQmx. Refer to Tab le 2-4 , X Series NI-DAQmx Software
Support, for the NI-DAQmx support information
for your device. Detection can take 30 to 45 seconds.
On Off On The device is configured, but there is no activity
over the bus.
On On On
On Blinking On
* USB BNC devices only.
The device is configured and there is activity over the bus.
© National Instruments | 3-7
Page 43
Analog Input
Refer to one of the following sections, depending on your device:
Analog Input on MIO X Series
Devices—NI 632x/6341/6343/6345/6351/6353/6355/6361/6363/6365/6375 devices can
be configured for single-ended and differential analog input measurements.
Analog Input on Simultaneous MIO X Series
Devices—NI 6346/6349/6356/6358/6366/6368/6374/6376/6378/6386/6396 devices can
be configured for differential analog input simultaneous sampled measurements.

Analog Input on MIO X Series Devices

Figure 4-1 shows the analog input circuitry of MIO X Series devices.

Figure 4-1. MIO X Series Analog Input Circuitry

4
AI <0..207>
AI SENSE
I/O Connector
The main blocks featured in the MIO X Series device analog input circuitry are as follows:
I/O Connector—You can connect analog input signals to the MIO X Series device through the I/O connector. The proper way to connect analog input signals depends on the analog input ground-reference settings, described in the Analog Input Ground-Reference Settings section. Also refer to Appendix A, Device-Specific Information, for device I/O connector pinouts.
Mux—Each MIO X Series device has one analog-to-digital converter (ADC). The multiplexers (mux) route one AI channel at a time to the ADC through the NI-PGIA.
Ground-Reference Settings—The analog input ground-reference settings circuitry selects between differential, referenced single-ended, and non-referenced single-ended input modes. Each AI channel can use a different mode.
AI GND
Mux
DIFF, RSE,
or NRSE
AI Terminal
Configuration
Selection
NI-PGIA
Input Range
Selection
ADC
AI FIFO
© National Instruments | 4-1
AI Data
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Chapter 4 Analog Input
10V 10V
2
16
--------------------------------- 305 V=
Instrumentation Amplifier (NI-PGIA)—The NI programmable gain instrumentation amplifier (NI-PGIA) is a measurement and instrument class amplifier that minimizes settling times for all input ranges. The NI-PGIA can amplify or attenuate an AI signal to ensure that you use the maximum resolution of the ADC.
MIO X Series devices use the NI-PGIA to deliver high accuracy even when sampling multiple channels with small input ranges at fast rates. MIO X Series devices can sample channels in any order, and you can individually program each channel in a sample with a different input range.
A/D Converter—The analog-to-digital converter (ADC) digitizes the AI signal by converting the analog voltage into a digital number.
AI FIFO—MIO X Series devices can perform both single and multiple A/D conversions of a fixed or infinite number of samples. A large first-in-first-out (FIFO) buffer holds data during AI acquisitions to ensure that no data is lost. MIO X Series devices can handle multiple A/D conversion operations with DMA or programmed I/O.

Analog Input Range

Input range refers to the set of input voltages that an analog input channel can digitize with the specified accuracy. The NI-PGIA amplifies or attenuates the AI signal depending on the input range. You can individually program the input range of each AI channel on your MIO X Series device.
The input range affects the resolution of the MIO X Series device for an AI channel. Resolution refers to the voltage of one ADC code. For example, a 16-bit ADC converts analog inputs into one of 65,536 (= 2 spread fairly evenly across the input range. So, for an input range of -10 V to 10 V, the voltage of each code of a 16-bit ADC is:
16
) codes—that is, one of 65,536 possible digital values. These values are
MIO X Series devices use a calibration method that requires some codes (typically about 5% of the codes) to lie outside of the specified range. This calibration method improves absolute accuracy, but it increases the nominal resolution of input ranges by about 5% over what the formula shown above would indicate.
Choose an input range that matches the expected input range of your signal. A large input range can accommodate a large signal variation, but reduces the voltage resolution. Choosing a smaller input range improves the voltage resolution, but may result in the input signal going out of range.
For more information about setting ranges, refer to the NI-DAQmx Help or the LabVIEW Help.
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X Series User Manual
Table 4-1 shows the input ranges and resolutions supported by each MIO X Series device.
Table 4-1. MIO X Series Device Input Range and Nominal Resolution
Nominal Resolution
MIO X Series Device Input Range
Assuming 5% Over Range
NI 632x/6341/6343 -10 V to 10 V 320 μV
-5 V to 5 V 160 μV
-1 V to 1 V 32 μV
-200 mV to 200 mV 6.4 μV
NI 6345/6351/6353/6355/
6361/6363/6365/6375
-10 V to 10 V 320 μV
-5 V to 5 V 160 μV
-2 V to 2 V 64 μV
-1 V to 1 V 32 μV
-500 mV to 500 mV 16 μV
-200 mV to 200 mV 6.4 μV
-100 mV to 100 mV 3.2 μV

Working Voltage Range

On most MIO X Series devices, the PGIA operates normally by amplifying signals of interest while rejecting common-mode signals under the following three conditions:
The common-mode voltage (V cm), which is equivalent to subtracting AI <0..x> GND from AI <0..x>-, must be less than ±10 V. This Vcm is a constant for all range selections.
The signal voltage (Vs), which is equivalent to subtracting AI <0..x>+ from AI <0..x>-, must be less than or equal to the range selection of the given channel. If Vs is greater than the range selected, the signal clips and information are lost.
The total working voltage of the positive input, which is equivalent to (Vcm + Vs), or subtracting AI GND from AI <0..x>+, must be less than ±11 V.
If any of these conditions are exceeded, the input voltage is clamped until the fault condition is removed.
© National Instruments | 4-3
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Chapter 4 Analog Input
V
in+
Vm = [V
in+
– V
in–
] × Gain
V
m
V
in–
PGIA
+
Measured
Voltage

Analog Input Ground-Reference Settings

MIO X Series devices support the following analog input ground-reference settings:
Differential mode—In DIFF mode, the MIO X Series device measures the difference in voltage between two AI signals.
Referenced single-ended mode—In RSE mode, the MIO X Series device measures the voltage of an AI signal relative to AI GND.
Non-referenced single-ended mode—In NRSE mode, the MIO X Series device measures the voltage of an AI signal relative to one of the AI SENSE inputs specific for that channel.
The AI ground-reference setting determines how you should connect your AI signals to the MIO X Series device. Refer to the Connecting Analog Input Signals section for more information.
Ground-reference settings are programmed on a per-channel basis. For example, you might configure the device to scan 12 channels—four differentially-configured channels and eight single-ended channels.
MIO X Series devices implement the different analog input ground-reference settings by routing different signals to the NI-PGIA. The NI-PGIA is a differential amplifier. That is, the NI-PGIA amplifies (or attenuates) the difference in voltage between its two inputs. The NI-PGIA drives the ADC with this amplified voltage. The amount of amplification (the gain), is determined by the analog input range, as shown in Figure 4-2.
Figure 4-2. MIO X Series Device NI-PGIA
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Table 4-2 shows how signals are routed to the NI-PGIA on MIO X Series devices.
Table 4-2. Signals Routed to the NI-PGIA on MIO X Series Devices
AI Ground-Reference
Settings
RSE AI <0..207> AI GND
NRSE AI <0..15> AI SENSE
DIFF AI <0..7> AI <8..15>
Signals Routed to the
Positive Input of the
NI-PGIA (Vin+)
Signals Routed to the
Negative Input of the
NI-PGIA (Vin-)
AI <16..79> AI SENSE 2
AI <80..143> AI SENSE 3
AI <144..207> AI SENSE 4
AI <16..23> AI <24..31>
AI <32..39> AI <40..47>
AI <48..55> AI <56..63>
AI <64..71> AI <72..79>
AI <80..87> AI <88..95>
AI <96..103> AI <104..111>
AI <112..119> AI <120..127>
AI <128..135> AI <136..143>
AI <144..151> AI <152..159>
AI <160..167> AI <168..175>
AI <176..183> AI <184..191>
AI <192..199> AI <200..207>
For differential measurements, AI 0 and AI 8 are the positive and negative inputs of differential analog input channel 0. For a complete list of signal pairs that form differential input channels, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED
Information.
© National Instruments | 4-5
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Chapter 4 Analog Input
Caution The maximum input voltages rating of AI signals with respect to ground
(and for signal pairs in differential mode with respect to each other) are listed in the device specifications. Exceeding the maximum input voltage of AI signals distorts the measurement results. Exceeding the maximum input voltage rating can also damage the device and the computer. NI is not liable for any damage resulting from such signal connections.
AI ground-reference setting is sometimes referred to as AI terminal configuration.
Configuring AI Ground-Reference Settings in Software
You can program channels on an MIO X Series device to acquire with different ground references.
To enable multimode scanning in LabVIEW, use
Channel.vi
channels configured in a different input mode. In Figure 4-3, channel 0 is configured in differential mode, and channel 1 is configured in RSE mode.
To configure the input mode of your voltage measurement using the DAQ Assistant, use the Terminal Configuration drop-down list. Refer to the DAQ Assistant Help for more information about the DAQ Assistant.
To configure the input mode of your voltage measurement using the NI-DAQmx C API, set the terminalConfig property. Refer to the NI-DAQmx C Reference Help for more information.
of the NI-DAQmx API. You must use a new VI for each channel or group of
Figure 4-3. Enabling Multimode Scanning in LabVIEW
NI-DAQmx Create Virtual

Multichannel Scanning Considerations

MIO X Series devices can scan multiple channels at high rates and digitize the signals accurately. However, you should consider several issues when designing your measurement system to ensure the high accuracy of your measurements.
In multichannel scanning applications, accuracy is affected by settling time. When your MIO X Series device switches from one AI channel to another AI channel, the device configures the NI-PGIA with the input range of the new channel. The NI-PGIA then amplifies the input signal with the gain for the new input range. Settling time refers to the time it takes the NI-PGIA to amplify the input signal to the desired accuracy before it is sampled by the ADC. To determine your device settling time, refer to the device specifications.
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X Series User Manual
MIO X Series devices are designed to have fast settling times. However, several factors can increase the settling time which decreases the accuracy of your measurements. To ensure fast settling times, you should do the following (in order of importance):
1. Use Low Impedance Sources—To ensure fast settling times, your signal sources should have an impedance of <1 k. Large source impedances increase the settling time of the NI-PGIA, and so decrease the accuracy at fast scanning rates.
Settling times increase when scanning high-impedance signals due to a phenomenon called charge injection. Multiplexers contain switches, usually made of switched capacitors. When one of the channels, for example channel 0, is selected in a multiplexer, those capacitors accumulate charge. When the next channel, for example channel 1, is selected, the accumulated charge leaks backward through channel 1. If the output impedance of the source connected to channel 1 is high enough, the resulting reading of channel 1 can be partially affected by the voltage on channel 0. This effect is referred to as ghosting.
If your source impedance is high, you can decrease the scan rate to allow the NI-PGIA more time to settle. Another option is to use a voltage follower circuit external to your DAQ device to decrease the impedance seen by the DAQ device. Refer to the document, Eliminate Ghosting on Adjacent Input Channels by Decreasing Source Impedance, by going to
ni.com/info and entering the Info Code rdbbis.
2. Use Short High-Quality Cabling—Using short high-quality cables can minimize several effects that degrade accuracy including crosstalk, transmission line effects, and noise. The capacitance of the cable can also increase the settling time.
National Instruments recommends using individually shielded, twisted-pair wires that are 2 m or less to connect AI signals to the device. Refer to the Connecting Analog Input
Signals section for more information.
3. Carefully Choose the Channel Scanning Order
Avoid Switching from a Large to a Small Input Range—Switching from a channel
with a large input range to a channel with a small input range can greatly increase the settling time.
Suppose a 4 V signal is connected to channel 0 and a 1 mV signal is connected to channel 1. The input range for channel 0 is -10 V to 10 V and the input range of channel 1 is -200 mV to 200 mV.
When the multiplexer switches from channel 0 to channel 1, the input to the NI-PGIA switches from 4 V to 1 mV. The approximately 4 V step from 4 V to 1 mV is 1,000% of the new full-scale range. For a 16-bit device to settle within 0.0015% (15 ppm or 1 LSB) of the ±200 mV full-scale range on channel 1, the input circuitry must settle to within 0.000031% (0.31 ppm or 1/50 LSB) of the ±10 V range. Some devices can take many microseconds for the circuitry to settle this much.
To avoid this effect, you should arrange your channel scanning order so that transitions from large to small input ranges are infrequent.
In general, you do not need this extra settling time when the NI-PGIA is switching from a small input range to a larger input range.
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Chapter 4 Analog Input
Insert Grounded Channel between Signal Channels—Another technique to improve settling time is to connect an input channel to ground. Then insert this channel in the scan list between two of your signal channels. The input range of the grounded channel should match the input range of the signal after the grounded channel in the scan list.
Consider again the example above where a 4 V signal is connected to channel 0 and a 1 mV signal is connected to channel 1. Suppose the input range for channel 0 is -10 V to 10 V and the input range of channel 1 is -200 mV to 200 mV.
You can connect channel 2 to AI GND (or you can use the internal ground; refer to Internal Channels in the NI-DAQmx Help). Set the input range of channel 2 to
-200 mV to 200 mV to match channel 1. Then scan channels in the order: 0, 2, 1.
Inserting a grounded channel between signal channels improves settling time because the NI-PGIA adjusts to the new input range setting faster when the input is grounded.
Minimize Voltage Step between Adjacent Channels—When scanning between channels that have the same input range, the settling time increases with the voltage step between the channels. If you know the expected input range of your signals, you can group signals with similar expected ranges together in your scan list.
For example, suppose all channels in a system use a -5 V to 5 V input range. The signals on channels 0, 2, and 4 vary between 4.3 V and 5 V. The signals on channels 1, 3, and 5 vary between -4 V and 0 V. Scanning channels in the order 0, 2, 4, 1, 3, 5 produces more accurate results than scanning channels in the order 0, 1, 2, 3, 4, 5.
4. Avoid Scanning Faster Than Necessary—Designing your system to scan at slower speeds gives the NI-PGIA more time to settle to a more accurate level. Here are two examples to consider:
Example 1—Averaging many AI samples can increase the accuracy of the reading by
decreasing noise effects. In general, the more points you average, the more accurate the final result. However, you may choose to decrease the number of points you average and slow down the scanning rate.
Suppose you want to sample 10 channels over a period of 20 ms and average the results. You could acquire 500 points from each channel at a scan rate of 250 kS/s. Another method would be to acquire 1,000 points from each channel at a scan rate of 500 kS/s. Both methods take the same amount of time. Doubling the number of samples averaged (from 500 to 1,000) decreases the effect of noise by a factor of 1.4 (the square root of 2). However, doubling the number of samples (in this example) decreases the time the NI-PGIA has to settle from 4 μs to 2 μs. In some cases, the slower scan rate system returns more accurate results.
Example 2—If the time relationship between channels is not critical, you can sample
from the same channel multiple times and scan less frequently. For example, suppose an application requires averaging 100 points from channel 0 and averaging 100 points from channel 1. You could alternate reading between channels—that is, read one point from channel 0, then one point from channel 1, and so on. You also could read all 100 points from channel 0 then read 100 points from channel 1. The second method switches between channels much less often and is affected much less by settling time.
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Analog Input Data Acquisition Methods

When performing analog input measurements, you either can perform software-timed or hardware-timed acquisitions.
Software-Timed Acquisitions
With a software-timed acquisition, software controls the rate of the acquisition. Software sends a separate command to the hardware to initiate each ADC conversion. In NI-DAQmx, software-timed acquisitions are referred to as having on-demand timing. Software-timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data.
Hardware-Timed Acquisitions
With hardware-timed acquisitions, a digital hardware signal (AI Sample Clock) controls the rate of the acquisition. This signal can be generated internally on your device or provided externally.
Hardware-timed acquisitions have several advantages over software-timed acquisitions:
The time between samples can be much shorter.
The timing between samples is deterministic.
Hardware-timed acquisitions can use hardware triggering.
Hardware-timed operations can be buffered or hardware-timed single point (HWTSP). A buffer is a temporary storage in computer memory for to-be-transferred samples.
Buffered—In a buffered acquisition, data is moved from the DAQ device’s onboard FIFO memory to a PC buffer using DMA before it is transferred to application memory. Buffered acquisitions typically allow for much faster transfer rates than HWTSP acquisitions because data is moved in large blocks, rather than one point at a time.
One property of buffered I/O operations is the sample mode. The sample mode can be either finite or continuous:
Finite sample mode acquisition refers to the acquisition of a specific, predetermined
number of data samples. Once the specified number of samples has been read in, the acquisition stops. If you use a reference trigger, you must use finite sample mode.
Continuous acquisition refers to the acquisition of an unspecified number of samples.
Instead of acquiring a set number of data samples and stopping, a continuous acquisition continues until you stop the operation. Continuous acquisition is also referred to as double-buffered or circular-buffered acquisition.
If data cannot be transferred across the bus fast enough, the FIFO becomes full. New acquisitions overwrite data in the FIFO before it can be transferred to host memory, which causes the device to generate an error. With continuous operations, if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer, the buffer could reach an overflow condition, causing an error to be generated.
© National Instruments | 4-9
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Chapter 4 Analog Input
Hardware-timed single point (HWTSP)—Typically, HWTSP operations are used to read single samples at known time intervals. While buffered operations are optimized for high throughput, HWTSP operations are optimized for low latency and low jitter. In addition, HWTSP can notify software if it falls behind hardware. These features make HWTSP ideal for real time control applications. HWTSP operations, in conjunction with the wait for next sample clock function, provide tight synchronization between the software layer and the hardware layer. Refer to the NI-DAQmx Hardware-Timed Single Point Lateness Checking document, for more information. To access this document, go to the Info Code daqhwtsp.
Note (NI USB-634x/635x/636x Devices) USB X Series devices do not support
hardware-timed single point (HWTSP) operations.
ni.com/info and enter

Analog Input Triggering

Analog input supports three different triggering actions:
Start trigger
Reference trigger
Pause trigger
Refer to the AI Start Trigger Signal, AI Reference Trigger Signal, and AI Pause Trigger Signal sections for information about these triggers.
An analog or digital trigger can initiate these actions. All MIO X Series devices support digital triggering, but some do not support analog triggering. To find your device triggering options, refer to the device specifications.

Connecting Analog Input Signals

Table 4-3 summarizes the recommended input configuration for both types of signal sources.
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Table 4-3. MIO X Series Analog Input Configuration
+ –
+
AI+
AI–
AI GND
Signal Source DAQ Device
+ –
+
AI+
AI–
AI GND
Signal Source DAQ Device
+ –
+
AI
AI SENSE
AI GND
Signal Source DAQ Device
+ –
+
AI
AI
SENSE
AI GND
Signal Source DAQ Device
+ –
+
AI
AI GND
Signal Source DAQ Device
Floating Signal Sources
(Not Connected to
Building Ground)
Ground-Referenced
Signal Sources
X Series User Manual
AI Ground-Reference
Setting
*
Differential
Non-Referenced Single-Ended (NRSE)
Referenced Single-Ended (RSE)
Examples:
• Ungrounded thermocouples
• Signal conditioning with isolated outputs
• Battery devices
Example:
• Plug-in instruments with non-isolated outputs
NOT RECOMMENDED
Signal Source DAQ Device
AI
+ –
V
A
+
V
B
AI GND
*
Refer to the Analog Input Ground-Reference Settings section for descriptions of the RSE, NRSE, and
DIFF modes and software considerations.
Refer to the Connecting Ground-Referenced Signal Sources section for more information.
und-loop potential (V
Gro
to measured signal.
– VB) are added
A
© National Instruments | 4-11
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Chapter 4 Analog Input

Connecting Floating Signal Sources

What Are Floating Signal Sources?
A floating signal source is not connected to the building ground system, but has an isolated ground-reference point. Some examples of floating signal sources are outputs of transformers, thermocouples, battery-powered devices, optical isolators, and isolation amplifiers. An instrument or device that has an isolated output is a floating signal source.
When to Use Differential Connections with Floating Signal Sources
Use DIFF input connections for any channel that meets any of the following conditions:
The input signal is low level (less than 1 V).
The leads connecting the signal to the device are greater than 3 m (10 ft).
The input signal requires a separate ground-reference point or return signal.
The signal leads travel through noisy environments.
Two analog input channels, AI+ and AI-, are available for the signal.
DIFF signal connections reduce noise pickup and increase common-mode noise rejection. DIFF signal connections also allow input signals to float within the common-mode limits of the NI-PGIA.
Refer to the Using Differential Connections for Floating Signal Sources section for more information about differential connections.
When to Use Non-Referenced Single-Ended (NRSE) Connections with Floating Signal Sources
Only use NRSE input connections if the input signal meets the following conditions:
The input signal is high-level (greater than 1 V).
The leads connecting the signal to the device are less than 3 m (10 ft).
DIFF input connections are recommended for greater signal integrity for any input signal that does not meet the preceding conditions.
In the single-ended modes, more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations. The coupling is the result of differences in the signal path. Magnetic coupling is proportional to the area between the two signal conductors. Electrical coupling is a function of how much the electric field differs between the two conductors.
With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground.
Refer to the Using Non-Referenced Single-Ended (NRSE) Connections for Floating Signal
Sources section for more information about NRSE connections.
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When to Use Referenced Single-Ended (RSE) Connections with Floating Signal Sources
Only use RSE input connections if the input signal meets the following conditions:
The input signal can share a common reference point, AI GND, with other signals that use RSE.
The input signal is high-level (greater than 1 V).
The leads connecting the signal to the device are less than 3 m (10 ft).
DIFF input connections are recommended for greater signal integrity for any input signal that does not meet the preceding conditions.
In the single-ended modes, more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations. The coupling is the result of differences in the signal path. Magnetic coupling is proportional to the area between the two signal conductors. Electrical coupling is a function of how much the electric field differs between the two conductors.
With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground.
Refer to the Using Referenced Single-Ended (RSE) Connections for Floating Signal Sources section for more information about RSE connections.
Using Differential Connections for Floating Signal Sources
It is important to connect the negative lead of a floating source to AI GND (either directly or through a bias resistor). Otherwise, the source may float out of the maximum working voltage range of the NI-PGIA and the DAQ device returns erroneous data.
The easiest way to reference the source to AI GND is to connect the positive side of the signal to AI+ and connect the negative side of the signal to AI GND as well as to AI- without using resistors. This connection works well for DC-coupled sources with low source impedance (less than 100 Ω).
Note (NI USB-6341/6343/6346/6361/6363 BNC Devices) To measure a floating
signal source on X Series USB BNC devices, move the switch under the BNC connector to the FS position.
© National Instruments | 4-13
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Chapter 4 Analog Input
+
R is about
100 times
source
impedance
of sensor
AI GND
R
V
s
Floating
Signal
Source
AI+
AI–
AI SENSE
MIO X Series Device
Figure 4-4. Differential Connections for Floating Signal Sources
without Bias Resistors
MIO X Series Device
Floating
Signal
Source
Inpedance
<100 Ω
+
V
s
AI+
AI–
AI SENSE
AI GND
However, for larger source impedances, this connection leaves the DIFF signal path significantly off balance. Noise that couples electrostatically onto the positive line does not couple onto the negative line because it is connected to ground. This noise appears as a differential mode signal instead of a common-mode signal, and thus appears in your data. In this case, instead of directly connecting the negative line to AI GND, connect the negative line to AI GND through a resistor that is about 100 times the equivalent source impedance. The resistor puts the signal path nearly in balance, so that about the same amount of noise couples onto both connections, yielding better rejection of electrostatically coupled noise. This configuration does not load down the source (other than the very high input impedance of the NI-PGIA).
Figure 4-5. Differential Connections for Floating Signal Sources
with Single Bias Resistor
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You can fully balance the signal path by connecting another resistor of the same value between the positive input and AI GND, as shown in Figure 4-6. This fully balanced configuration offers slightly better noise rejection, but has the disadvantage of loading the source down with the series combination (sum) of the two resistors. If, for example, the source impedance is 2 k and each of the two resistors is 100 k, the resistors load down the source with 200 k and produce a -1% gain error.
Figure 4-6. Differential Connections for Floating Signal Sources
with Balanced Bias Resistors
AI+
Bias Resistors (see text)
Bias
Current
Return
Paths
+
V
s
AI–
Instrumentation
Amplifier
+
PGIA
V
m
+
Measured
Vol tage
Floating
Signal
Source
Input Multiplexers
AI SENSE
AI GND
I/O Connector
MIO X Series Device Configured in Differential Mode
Both inputs of the NI-PGIA require a DC path to ground in order for the NI-PGIA to work. If the source is AC coupled (capacitively coupled), the NI-PGIA needs a resistor between the positive input and AI GND. If the source has low-impedance, choose a resistor that is large enough not to significantly load the source, but small enough not to produce significant input offset voltage as a result of input bias current (typically 100 k to 1 M). In this case, connect the negative input directly to AI GND. If the source has high output impedance, balance the
© National Instruments | 4-15
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Chapter 4 Analog Input
+
AI GND
V
s
AC Coupled
Floating
Signal
Source
AI+
AI–
AI SENSE
AC Coupling
MIO X Series Device
+
AI GND
R
AI
SENSE
AI
V
s
Floating
Signal
Source
MIO X Series Device
signal path as previously described using the same value resistor on both the positive and negative inputs; be aware that there is some gain error from loading down the source, as shown in Figure 4-7.
Figure 4-7. Differential Connections for AC Coupled Floating Sources
with Balanced Bias Resistors
Using Non-Referenced Single-Ended (NRSE) Connections for Floating Signal Sources
It is important to connect the negative lead of a floating signals source to AI GND (either directly or through a resistor). Otherwise the source may float out of the valid input range of the NI-PGIA and the DAQ device returns erroneous data.
Note (NI USB-6341/6343/6346/6361/6363 BNC Devices) To measure a floating
signal source on X Series USB BNC devices, move the switch under the BNC connector to the FS position.
Figure 4-8 shows a floating source connected to the DAQ device in NRSE mode.
Figure 4-8. NRSE Connections for Floating Signal Sources
All of the bias resistor configurations discussed in the Using Differential Connections for
Floating Signal Sources section apply to the NRSE bias resistors as well. Replace AI- with
AI SENSE in Figures 4-4, 4-5, 4-6, and 4-7 for configurations with zero to two bias resistors. The noise rejection of NRSE mode is better than RSE mode because the AI SENSE connection is made remotely near the source. However, the noise rejection of NRSE mode is worse than DIFF mode because the AI SENSE connection is shared with all channels rather than being cabled in a twisted pair with the AI+ signal.
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Selected Channel in RSE Configuration
PGIA
Input Multiplexers
+
Floating
Signal
Source
V
s
I/O Connector
AI GND
AI SENSE
AI <0..31>
+
Programmable Gain
Instrumentation
Amplifier
Measured
Vol tage
V
m
+
Using the DAQ Assistant, you can configure the channels for RSE or NRSE input modes. Refer to the Configuring AI Ground-Reference Settings in Software section for more information about the DAQ Assistant.
Using Referenced Single-Ended (RSE) Connections for Floating Signal Sources
Figure 4-9 shows how to connect a floating signal source to the MIO X Series device configured for RSE mode.
Figure 4-9. RSE Connections for Floating Signal Sources
Note (NI USB-6341/6343/6361/6363 BNC Devices) To measure a floating signal
source on X Series USB BNC devices, move the switch under the BNC connector to the FS position.
Using the DAQ Assistant, you can configure the channels for RSE or NRSE input modes. Refer to the Configuring AI Ground-Reference Settings in Software section for more information about the DAQ Assistant.

Connecting Ground-Referenced Signal Sources

What Are Ground-Referenced Signal Sources?
A ground-referenced signal source is a signal source connected to the building system ground. It is already connected to a common ground point with respect to the device, assuming that the computer is plugged into the same power system as the source. Non-isolated outputs of instruments and devices that plug into the building power system fall into this category.
The difference in ground potential between two instruments connected to the same building power system is typically between 1 and 100 mV, but the difference can be much higher if power distribution circuits are improperly connected. If a grounded signal source is incorrectly measured, this difference can appear as measurement error. Follow the connection instructions
© National Instruments | 4-17
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Chapter 4 Analog Input
for grounded signal sources to eliminate this ground potential difference from the measured signal.
When to Use Differential Connections with Ground-Referenced Signal Sources
Use DIFF input connections for any channel that meets any of the following conditions:
The input signal is low level (less than 1 V).
The leads connecting the signal to the device are greater than 3 m (10 ft).
The input signal requires a separate ground-reference point or return signal.
The signal leads travel through noisy environments.
Two analog input channels, AI+ and AI-, are available.
DIFF signal connections reduce noise pickup and increase common-mode noise rejection. DIFF signal connections also allow input signals to float within the common-mode limits of the NI-PGIA.
Refer to the Using Differential Connections for Ground-Referenced Signal Sources section for more information about differential connections.
When to Use Non-Referenced Single-Ended (NRSE) Connections with Ground-Referenced Signal Sources
Only use NRSE connections if the input signal meets the following conditions:
The input signal is high-level (greater than 1 V).
The leads connecting the signal to the device are less than 3 m (10 ft).
The input signal can share a common reference point with other signals.
DIFF input connections are recommended for greater signal integrity for any input signal that does not meet the preceding conditions.
In the single-ended modes, more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations. The coupling is the result of differences in the signal path. Magnetic coupling is proportional to the area between the two signal conductors. Electrical coupling is a function of how much the electric field differs between the two conductors.
With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground.
Refer to the Using Non-Referenced Single-Ended (NRSE) Connections for Ground-Referenced
Signal Sources section for more information about NRSE connections.
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MIO X Series Device Configured in Differential Mode
PGIA
+
+
+
+
V
cm
V
s
Ground-
Referenced
Signal
Source
Common-
Mode
Noise and
Ground
Potential
AI GND
AI SENSE
Input Multiplexers
V
m
Measured
Vol tage
Instrumentation
Amplifier
AI+
AI–
I/O Connector
When to Use Referenced Single-Ended (RSE) Connections with Ground-Referenced Signal Sources
Do not use RSE connections with ground-referenced signal sources. Use NRSE or DIFF connections instead.
As shown in the bottom-rightmost cell of Table 4-3, there can be a potential difference between AI GND and the ground of the sensor. In RSE mode, this ground loop causes measurement errors.
Using Differential Connections for Ground-Referenced Signal Sources
Figure 4-10 shows how to connect a ground-referenced signal source to the MIO X Series device configured in differential mode.
Figure 4-10. Differential Connections for Ground-Referenced Signal Sources
Note (NI USB-6341/6343/6346/6361/6363 BNC Devices) To measure a
ground-referenced signal source on X Series USB BNC devices, move the switch under the BNC connector to the GS position.
With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground, shown as Vcm in the figure.
AI+ and AI- must both remain within ±11 V of AI GND.
© National Instruments | 4-19
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Chapter 4 Analog Input
MIO X Series Device Configured in NRSE Mode
Input Multiplexers
I/O Connector
AI GND
AI SENSE
AI <0..x>
+
+
V
cm
V
s
Ground-
Referenced
Signal
Source
Common-
Mode
Noise
and Ground
Potential
PGIA
+
+
V
m
Measured
Vol tage
Instrumentation
Amplifier
Using Non-Referenced Single-Ended (NRSE) Connections for Ground-Referenced Signal Sources
Figure 4-11 shows how to connect ground-reference signal sources in NRSE mode.
Figure 4-11. Single-Ended Connections for
Ground-Referenced Signal Sources (NRSE Configuration)
Note (NI USB-6341/6343/6346/6361/6363 BNC Devices) To measure a
ground-referenced signal source on X Series USB BNC devices, move the switch under the BNC connector to the GS position.
AI <0..31> and AI SENSE must both remain within ±11 V of AI GND.
To measure a single-ended, ground-referenced signal source, you must use the NRSE ground-reference setting. Use Table 4-4 to determine how to correctly connect your AI signal.
Table 4-4. AI Signal Connections
Signal Ground-Reference
AI <0..15> AI SENSE
AI <16..79> AI SENSE 2
AI SENSE is internally connected to the negative input of the NI-PGIA. Therefore, the ground point of the signal connects to the negative input of the NI-PGIA.
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AI <80..143> AI SENSE 3
AI <144..207> AI SENSE 4
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Any potential difference between the device ground and the signal ground appears as a common-mode signal at both the positive and negative inputs of the NI-PGIA, and this difference is rejected by the amplifier. If the input circuitry of a device were referenced to ground, as it is in the RSE ground-reference setting, this difference in ground potentials would appear as an error in the measured voltage.
Using the DAQ Assistant, you can configure the channels for RSE or NRSE input modes. Refer to the Configuring AI Ground-Reference Settings in Software section for more information about the DAQ Assistant.

Field Wiring Considerations

Environmental noise can seriously affect the measurement accuracy of the device if you do not take proper care when running signal wires between signal sources and the device. The following recommendations apply mainly to AI signal routing to the device, although they also apply to signal routing in general.
Minimize noise pickup and maximize measurement accuracy by taking the following precautions:
Use differential analog input connections to reject common-mode noise.
Use individually shielded, twisted-pair wires to connect AI signals to the device. With this type of wire, the signals attached to the positive and negative input channels are twisted together and then covered with a shield. You then connect this shield only at one point to the signal source ground. This kind of connection is required for signals traveling through areas with large magnetic fields or high electromagnetic interference.
Refer to the Field Wiring and Noise Considerations for Analog Signals document, for more information. To access this document, go to
ni.com/info and enter the Info Code rdfwn3.
© National Instruments | 4-21
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Chapter 4 Analog Input
PFI, RTSI
PXI_STA R
Analog Comparison
Event
20 MHz Timebase
100 kHz Timebase
PXI_CLK10
Programmable
Clock
Divider
Programmable
Clock
Divider
AI Sample Clock
Timebase
AI Convert Clock
Timebase
PFI, RTSI
PXI_STA R
Analog Comparison Event
Ctr n Internal Output
SW Pulse
PFI, RTSI
PXI_STA R
Analog Comparison Event
Ctr n Internal Output
AI Convert Clock
AI Sample Clock
100 MHz Timebase

Analog Input Timing Signals

In order to provide all of the timing functionality described throughout this section, MIO X Series devices have a flexible timing engine. Figure 4-12 summarizes all of the timing options provided by the analog input timing engine. Also refer to the Clock Routing section of Chapter 9,
Digital Routing and Clock Generation.
Figure 4-12. Analog Input Timing Options
MIO X Series devices use AI Sample Clock (ai/SampleClock) and AI Convert Clock (ai/ConvertClock) to perform interval sampling. As Figure 4-13 shows, AI Sample Clock controls the sample period, which is determined by the following equation:
AI Convert Clock controls the Convert Period, which is determined by the following equation:
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1/Sample Period = Sample Rate
Figure 4-13. MIO X Series Interval Sampling
Channel 0
Channel 1
Convert Period
Sample Period
1/Convert Period = Convert Rate
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X Series User Manual
)
n/a
0 023 12
AI Start Trigger
AI Reference Trigger
AI Sample Clock
AI Convert Clock
Sample Counter
)
)
)
))
))
)
))
))1)
Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is received. A typical posttriggered DAQ sequence is shown in Figure 4-14. The sample counter is loaded with the specified number of posttrigger samples, in this example, five. The value decrements with each pulse on AI Sample Clock, until all desired samples have been acquired.
Figure 4-14. Posttriggered Data Acquisition Example
AI Start Trigger
AI Sample Clock
AI Convert Clock
Sample Counter
Pretriggered data acquisition allows you to view data that is acquired before the trigger of interest, in addition to data acquired after the trigger. Figure 4-15 shows a typical pretriggered DAQ sequence. AI Start Trigger (ai/StartTrigger) can be either a hardware or software signal. If AI Start Trigger is set up to be a software start trigger, an output pulse appears on the ai/StartTrigger line when the acquisition begins. When the AI Start Trigger pulse occurs, the sample counter is loaded with the number of pretriggered samples, in this example, four. The value decrements with each pulse on AI Sample Clock.The sample counter is then loaded with the number of posttriggered samples, in this example, three.
Figure 4-15. Pretriggered Data Acquisition Example
If an AI Reference Trigger (ai/ReferenceTrigger) pulse occurs before the specified number of pretrigger samples are acquired, the trigger pulse is ignored. Otherwise, when the AI Reference Trigger pulse occurs, the sample counter value decrements until the specified number of posttrigger samples have been acquired.
4
)))
)) ))
0243 1
))
MIO X Series devices feature the following analog input timing signals:
AI Sample Clock Signal
AI Sample Clock Timebase Signal
AI Convert Clock Signal
AI Convert Clock Timebase Signal
*
*
© National Instruments | 4-23
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Chapter 4 Analog Input
AI Hold Complete Event Signal
AI Start Trigger Signal
AI Reference Trigger Signal
AI Pause Trigger Signal
*
*
*
Signals with an * support digital filtering. Refer to the PFI Filters section of Chapter 8, PFI, for more information.
Aggregate versus Single Channel Sample Rates
MIO X Series devices are characterized with maximum single channel and maximum aggregate sample rates. The maximum single channel rate is the fastest you can acquire data on the device from a single channel and still achieve accurate results. The maximum aggregate sample rate is the fastest you can acquire on multiple channels and still achieve accurate results. For example, NI 6351 devices have a single channel maximum rate of 1.25 MS/s and aggregate maximum sample rate of 1 MS/s so they can sample one channel at 1.25 MS/s or two channels at 500 kS/s per channel, as shown in Table 4-5.
Table 4-5. Analog Input Rates for MIO X Series Devices
Analog Input Rate*
MIO X Series Device
Single Channel Multi-Channel (Aggregate)
NI 6320/6321/6323 250 kS/s 250 kS/s
NI 6341/6343/6345 500 kS/s 500 kS/s
NI 6351/6353/6355 1.25 MS/s 1 MS/s
NI 6361/6363/6365 2 MS/s 1 MS/s
NI 6375 3.846 MS/s 1 MS/s
* On several devices, the single channel rate is higher than the aggregate rate because while the ADC can sample at that rate, the PGIA cannot settle fast enough to meet accuracy specifications.
AI Sample Clock Signal
Use the AI Sample Clock (ai/SampleClock) signal to initiate a set of measurements. Your MIO X Series device samples the AI signals of every channel in the task once for every AI Sample Clock. A measurement acquisition consists of one or more samples.
You can specify an internal or external source for AI Sample Clock. You can also specify whether the measurement sample begins on the rising edge or falling edge of AI Sample Clock.
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Using an Internal Source
One of the following internal signals can drive AI Sample Clock:
Counter n Internal Output
AI Sample Clock Timebase (divided down)
A pulse initiated by host software
Change Detection Event
Counter n Sample Clock
AO Sample Clock (ao/SampleClock)
DI Sample Clock (di/SampleClock)
DO Sample Clock (do/SampleClock)
A programmable internal counter divides down the sample clock timebase.
Several other internal signals can be routed to AI Sample Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
Using an External Source
Use one of the following external signals as the source of AI Sample Clock:
PFI <0..15>
•RTSI <0..7>
PXI_STAR
PXIe_DSTAR<A,B>
Analog Comparison Event (an analog trigger)
Routing AI Sample Clock Signal to an Output Terminal
You can route AI Sample Clock out to any PFI <0..15>, RTSI <0..7>, or PXIe_DSTARC terminal. This pulse is always active high.
All PFI terminals are configured as inputs by default.
Other Timing Requirements
Your DAQ device only acquires data during an acquisition. The device ignores AI Sample Clock when a measurement acquisition is not in progress. During a measurement acquisition, you can cause your DAQ device to ignore AI Sample Clock using the AI Pause Trigger signal.
A counter/timing engine on your device internally generates AI Sample Clock unless you select some external source. AI Start Trigger starts this counter and either software or hardware can stop it once a finite acquisition completes. When using the AI timing engine, you can also specify a configurable delay from AI Start Trigger to the first AI Sample Clock pulse. By default, this delay is set to four ticks of the AI Sample Clock Timebase signal.
© National Instruments | 4-25
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Chapter 4 Analog Input
AI Sample Clock Timebase
AI Start Trigger
AI Sample Clock
Delay
From Start
Trigger
When using an externally generated AI Sample Clock, you must ensure the clock signal is consistent with respect to the timing requirements of AI Convert Clock. Failure to do so may result in a scan overrun and will cause an error. Refer to the AI Convert Clock Signal section for more information about the timing requirements between AI Convert Clock and AI Sample Clock.
Figure 4-16 shows the relationship of AI Sample Clock to AI Start Trigger.
Figure 4-16. AI Sample Clock and AI Start Trigger
AI Sample Clock Timebase Signal
You can route any of the following signals to be the AI Sample Clock Timebase (ai/SampleClockTimebase) signal:
100 MHz Timebase (default)
20 MHz Timebase
100 kHz Timebase
•PXI_CLK10
•RTSI <0..7>
PFI <0..15>
PXI_STAR
PXIe_DSTAR<A,B>
Analog Comparison Event (an analog trigger)
AI Sample Clock Timebase is not available as an output on the I/O connector. AI Sample Clock Timebase is divided down to provide one of the possible sources for AI Sample Clock. You can configure the polarity selection for AI Sample Clock Timebase as either rising or falling edge, except on 100 MHz Timebase or 20 MHz Timebase.
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AI Convert Clock Signal
Use the AI Convert Clock (ai/ConvertClock) signal to initiate a single A/D conversion on a single channel. A sample (controlled by the AI Sample Clock) consists of one or more conversions.
You can specify either an internal or external signal as the source of AI Convert Clock. You can also specify whether the measurement sample begins on the rising edge or falling edge of AI Convert Clock.
With NI-DAQmx, the driver chooses the fastest conversion rate possible based on the speed of the A/D converter and adds 10 μs of padding between each channel to allow for adequate settling time. This scheme enables the channels to approximate simultaneous sampling and still allow for adequate settling time. If the AI Sample Clock rate is too fast to allow for this 10 μs of padding, NI-DAQmx chooses the conversion rate so that the AI Convert Clock pulses are evenly spaced throughout the sample.
To explicitly specify the conversion rate, use AI Convert Clock Rate DAQmx Timing property node or function.
Caution Setting the conversion rate higher than the maximum rate specified for
your device will result in errors.
Using an Internal Source
One of the following internal signals can drive AI Convert Clock:
AI Convert Clock Timebase (divided down)
Counter n Internal Output
Change Detection Event
Counter n Sample Clock
AO Sample Clock (ao/SampleClock)
DI Sample Clock (di/SampleClock)
DO Sample Clock (do/SampleClock)
A programmable internal counter divides down the AI Convert Clock Timebase to generate AI Convert Clock. The counter is started by AI Sample Clock and continues to count down to zero, produces an AI Convert Clock, reloads itself, and repeats the process until the sample is finished. It then reloads itself in preparation for the next AI Sample Clock pulse.
Several other internal signals can be routed to AI Convert Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
© National Instruments | 4-27
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Chapter 4 Analog Input
Using an External Source
Use one of the following external signals as the source of AI Convert Clock:
PFI <0..15>
•RTSI <0..7>
PXI_STAR
PXIe_DSTAR<A,B>
Analog Comparison Event (an analog trigger)
Routing AI Convert Clock Signal to an Output Terminal
You can route AI Convert Clock (as an active low signal) out to any PFI <0..15>, RTSI <0..7>, or PXIe_DSTARC terminal.
All PFI terminals are configured as inputs by default.
Using a Delay from Sample Clock to Convert Clock
When using the AI timing engine to generate your Convert Clock, you can also specify a configurable delay from AI Sample Clock to the first AI Convert Clock pulse within the sample. By default, this delay is three ticks of AI Convert Clock Timebase.
Figure 4-17 shows the relationship of AI Sample Clock to AI Convert Clock.
Figure 4-17. AI Sample Clock and AI Convert Clock
AI Convert Clock Timebase
AI Sample Clock
AI Convert Clock
Delay from
Sample
Clock
Convert
Period
Other Timing Requirements
The sample and conversion level timing of MIO X Series devices work such that some clock signals are gated off unless the proper timing requirements are met. For example, the device ignores both AI Sample Clock and AI Convert Clock until it receives a valid AI Start Trigger signal. Similarly, the device ignores all AI Convert Clock pulses until it recognizes an AI Sample Clock pulse. Once the device receives the correct number of AI Convert Clock pulses, it ignores subsequent AI Convert Clock pulses until it receives another AI Sample Clock. However, after
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AI Sample Clock
AI Convert Clock
Convert Period
Channel Measured 1 2 30
AI
Sample Clock
AI Convert Clock
Sample #1 Sample #2 Sample #3
1230
12301230
Channel Measured
AI Sample Clock
AI Convert Clock
Sample #1 Sample #2 Sample #3
1230
0
Channel Measured
1230
AI Sample Clock
AI Convert Clock
Sample #1 Sample #2 Sample #3
Channel Measured 1 2 30
12301230
the device recognizes an AI Sample Clock pulse, it causes an error if it receives an AI Sample Clock pulse before the correct number of AI Convert Clock pulses are received.
Figures 4-18, 4-19, 4-20, and 4-21 show timing sequences for a four-channel acquisition (using AI channels 0, 1, 2, and 3) and demonstrate proper and improper sequencing of AI Sample Clock and AI Convert Clock.
Figure 4-18. Scan Overrun Condition; AI Sample Clock Too Fast For Convert Clock
Causes an Error
Figure 4-19. AI Convert Clock Too Fast For AI Sample Clock;
AI Convert Clock Pulses Are Ignored
Figure 4-20. AI Sample Clock and AI Convert Clock Improperly Matched;
Figure 4-21. AI Sample Clock and AI Convert Clock Properly Matched
Leads to Aperiodic Sampling
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AI Convert Clock Timebase Signal
The AI Convert Clock Timebase (ai/ConvertClockTimebase) signal is divided down to provide one of the possible sources for AI Convert Clock. Use one of the following signals as the source of AI Convert Clock Timebase:
AI Sample Clock Timebase
100 MHz Timebase
AI Convert Clock Timebase is not available as an output on the I/O connector.
AI Hold Complete Event Signal
The AI Hold Complete Event (ai/HoldCompleteEvent) signal generates a pulse after each A/D conversion begins. You can route AI Hold Complete Event out to any PFI <0..15>, RTSI <0..7>, or PXIe_DSTARC terminal.
The polarity of AI Hold Complete Event is software-selectable, but is typically configured so that a low-to-high leading edge can clock external AI multiplexers indicating when the input signal has been sampled and can be removed.
AI Start Trigger Signal
Use the AI Start Trigger (ai/StartTrigger) signal to begin a measurement acquisition. A measurement acquisition consists of one or more samples. If you do not use triggers, begin a measurement with a software command. Once the acquisition begins, configure the acquisition to stop:
When a certain number of points are sampled (in finite mode)
After a hardware reference trigger (in finite mode)
With a software command (in continuous mode)
An acquisition that uses a start trigger (but not a reference trigger) is sometimes referred to as a posttriggered acquisition.
Retriggerable Analog Input
The AI Start Trigger is also configurable as retriggerable. The timing engine generates the sample and convert clocks for the configured acquisition in response to each pulse on an AI Start Trigger signal.
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AI Start Trigger
AI Sample Clock
AI Convert
The timing engine ignores the AI Start Trigger signal while the clock generation is in progress. After the clock generation is finished, the counter waits for another Start Trigger to begin another clock generation. Figure 4-22 shows a retriggerable analog input with three AI channels and four samples per trigger.
Figure 4-22. Retriggerable Analog Input
Note Waveform information from LabVIEW does not reflect the delay between
triggers. They are treated as a continuous acquisition with constant t0 and dt information.
Reference triggers are not retriggerable.
Using a Digital Source
To use AI Start Trigger with a digital source, specify a source and an edge. The source can be any of the following signals:
PFI <0..15>
•RTSI <0..7>
Counter n Internal Output
PXI_STAR
PXIe_DSTAR<A,B>
Change Detection Event
AO Start Trigger (ao/StartTrigger)
DI Start Trigger (di/StartTrigger)
DO Start Trigger (do/StartTrigger)
The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
You can also specify whether the measurement acquisition begins on the rising edge or falling edge of AI Start Trigger.
Using an Analog Source
When you use an analog trigger source, the acquisition begins on the first rising edge of the Analog Comparison Event signal.
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Routing AI Start Trigger to an Output Terminal
You can route AI Start Trigger out to any PFI <0..15>, RTSI <0..7>, or PXIe_DSTARC terminal. The output is an active high pulse. All PFI terminals are configured as inputs by default.
The device also uses AI Start Trigger to initiate pretriggered DAQ operations. In most pretriggered applications, a software trigger generates AI Start Trigger. Refer to the AI Reference
Trigger Signal section for a complete description of the use of AI Start Trigger and AI Reference
Trigger in a pretriggered DAQ operation.
AI Reference Trigger Signal
Use AI Reference Trigger (ai/ReferenceTrigger) signal to stop a measurement acquisition. To use a reference trigger, specify a buffer of finite size and a number of pretrigger samples (samples that occur before the reference trigger). The number of posttrigger samples (samples that occur after the reference trigger) desired is the buffer size minus the number of pretrigger samples.
Once the acquisition begins, the DAQ device writes samples to the buffer. After the DAQ device captures the specified number of pretrigger samples, the DAQ device begins to look for the reference trigger condition. If the reference trigger condition occurs before the DAQ device captures the specified number of pretrigger samples, the DAQ device ignores the condition.
If the buffer becomes full, the DAQ device continuously discards the oldest samples in the buffer to make space for the next sample. This data can be accessed (with some limitations) before the DAQ device discards it. Refer to the document, Can a Pretriggered Analog Acquisition be Continuous?, for more information. To access this document, go to Info Code
rdcanq.
ni.com/info and enter the
When the reference trigger occurs, the DAQ device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired. Figure 4-23 shows the final buffer.
Figure 4-23. Reference Trigger Final Buffer
Reference Trigger
Pretrigger Samples
Complete Buffer
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Using a Digital Source
To use AI Reference Trigger with a digital source, specify a source and an edge. The source can be any of the following signals:
PFI <0..15>
•RTSI <0..7>
PXI_STAR
PXIe_DSTAR<A,B>
Change Detection Event
Counter n Internal Output
DI Reference Trigger (di/ReferenceTrigger)
DO Start Trigger (do/StartTrigger)
AO Start Trigger (ao/StartTrigger)
The source can also be one of several internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
You can also specify whether the measurement acquisition stops on the rising edge or falling edge of AI Reference Trigger.
Using an Analog Source
When you use an analog trigger source, the acquisition stops on the first rising edge of the Analog Comparison Event signal.
Routing AI Reference Trigger Signal to an Output Terminal
You can route AI Reference Trigger out to any PFI <0..15>, RTSI <0..7>, PXI_Trig <0..7>, or PXIe_DSTARC terminal.
All PFI terminals are configured as inputs by default.
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AI Sample Clock
AI Convert Clock
AI Pause Trigger
T
A
AI External Sample Clock
AI Convert Clock
AI Pause Trigger
Halt. Used on Internal Clock
Free Running. Used on External Clock
T – A
AI Sample Clock
AI Pause Trigger Signal
Use the AI Pause Trigger (ai/PauseTrigger) signal to pause and resume a measurement acquisition. The internal sample clock pauses while the external trigger signal is active and resumes when the signal is inactive. You can program the active level of the pause trigger to be high or low, as shown in Figure 4-24. In the figure, T represents the period, and A represents the unknown time between the clock pulse and the posttrigger.
Figure 4-24. Halt (Internal Clock) and Free Running (External Clock)
Using a Digital Source
To use AI Pause Trigger, specify a source and a polarity. The source can be any of the following signals:
PFI <0..15>
•RTSI <0..7>
PXI_STAR
PXIe_DSTAR<A,B>
Counter n Internal Output
Counter n Gate
AO Pause Trigger (ao/PauseTrigger)
DO Pause Trigger (do/PauseTrigger)
DI Pause Trigger (di/PauseTrigger)
The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
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Using an Analog Source
When you use an analog trigger source, the internal sample clock pauses when the Analog Comparison Event signal is low and resumes when the signal goes high (or vice versa).
Routing AI Pause Trigger Signal to an Output Terminal
You can route AI Pause Trigger out to any PFI <0..15>, RTSI <0..7>, PXI_STAR, or PXIe_DSTARC terminal.
Note Pause triggers are only sensitive to the level of the source, not the edge.

Getting Started with AI Applications in Software

You can use the MIO X Series device in the following analog input applications:
Single-point analog input (on demand)
Finite analog input
Continuous analog input
Hardware-timed single point
You can perform these applications through DMA or programmed I/O data transfer mechanisms. Some of the applications also use start, reference, and pause triggers.
Note For more information about programming analog input applications and
triggers in software, refer to the NI-DAQmx Help or the LabVIEW Help.
MIO X Series devices use the NI-DAQmx driver. NI-DAQmx includes a collection of programming examples to help you get started developing an application. You can modify example code and save it in an application. You can use examples to develop a new application or add example code to an existing application.
To locate LabVIEW, LabWindows/CVI, Measurement Studio, Visual Basic, and ANSI C examples, refer to the document, Where Are NI-DAQmx Examples Installed in Windows?, by going to
For additional examples, refer to
ni.com/info and entering the Info Code daqmxexp.
ni.com/examples.
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Analog Input on Simultaneous MIO X Series Devices

Figure 4-25 shows the analog input circuitry of the Simultaneous MIO X Series devices.

Figure 4-25. Simultaneous MIO X Series Analog Input Circuitry

NI-PGIA
+
+
I/O Connector
ADC
AI FIFO
ADC
Analog Input Timing Signals
AI Data
On Simultaneous MIO X Series devices, each channel uses its own instrumentation amplifier, FIFO, multiplexer (mux), and A/D converter (ADC) to achieve simultaneous data acquisition. The main blocks featured in the Simultaneous MIO X Series device analog input circuitry are as follows:
I/O Connector—You can connect analog input signals to the Simultaneous MIO X Series device through the I/O connector. Refer to Appendix A, Device-Specific Information, for device I/O connector pinouts.
Instrumentation Amplifier (NI-PGIA)—The NI programmable gain instrumentation amplifier (NI-PGIA) can amplify or attenuate an AI signal to ensure that you get the maximum resolution of the ADC. The NI-PGIA also allows you to select the input range.
ADC—The analog-to-digital converter (ADC) digitizes the AI signal by converting the analog voltage into a digital number.
Analog Input Timing Signals—For information about the analog input timing signals available on Simultaneous MIO X Series devices, refer to the Analog Input Timing Signals section.
AI FIFO—Simultaneous MIO X Series devices can perform both single and multiple A/D conversions of a fixed or infinite number of samples. A large first-in-first-out (FIFO) buffer holds data during A/D conversions to ensure that no data is lost. Simultaneous MIO X Series devices can handle multiple A/D conversion operations with DMA or programmed I/O.
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10V 10V
2
16
--------------------------------- 305 V=

Analog Input Terminal Configuration

Simultaneous MIO X Series devices support only differential (DIFF) input mode. The channels on Simultaneous MIO X Series devices are true differential inputs, meaning both positive and negative inputs can carry signals of interest. For more information about DIFF input, refer to the
Connecting Analog Input Signals section, which contains diagrams showing the signal paths for
DIFF input mode.
Caution Exceeding the differential and common-mode input ranges distorts the
input signals. Exceeding the maximum input voltage rating can damage the device and the computer. NI is not liable for any damage resulting from such signal connections. The maximum input voltage ratings can be found in the specifications for each Simultaneous MIO X Series device.

Analog Input Range

Input range refers to the set of input voltages that an analog input channel can digitize with the specified accuracy. The NI-PGIA amplifies or attenuates the AI signal depending on the input range. You can individually program the input range of each AI channel on your Simultaneous MIO X Series device.
The input range affects the resolution of the Simultaneous MIO X Series device for an AI channel. Resolution refers to the voltage of one ADC code. For example, a 16-bit ADC converts analog inputs into one of 65,536 (= 2 These values are spread fairly evenly across the input range. So, for an input range of -10 V to 10 V, the voltage of each code of a 16-bit ADC is:
16
) codes—that is, one of 65,536 possible digital values.
Simultaneous MIO X Series devices use a calibration method that requires some codes (typically about 5% of the codes) to lie outside of the specified range. This calibration method improves absolute accuracy, but it increases the nominal resolution of input ranges by about 5% over what the formula shown above would indicate.
Choose an input range that matches the expected input range of your signal. A large input range can accommodate a large signal variation, but reduces the voltage resolution. Choosing a smaller input range improves the voltage resolution, but may result in the input signal going out of range.
For more information about setting ranges, refer to the NI-DAQmx Help or the LabVIEW Help.
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Table 4-6 shows the input ranges and resolutions supported by the Simultaneous MIO X Series device family.
Table 4-6. Simultaneous MIO X Series Device Input Range and Nominal Resolution
Simultaneous MIO
X Series Device
NI 6346/6349/6356/6358/
6366/6368/6374/
6376/6378/6386/6396
Input Range
-10 V to 10 V 320 μV
-5 V to 5 V 160 μV
-2 V to 2 V 64 μV
-1 V to 1 V 32 μV
Nominal Resolution Assuming
5% Over Range

Working Voltage Range

On most Simultaneous MIO X Series devices, the PGIA operates normally by amplifying signals of interest while rejecting common-mode signals under the following three conditions:
The common-mode voltage (Vcm), which is equivalent to subtracting AI <0..x> GND from AI <0..x>-, must be less than ±10 V. This Vcm is a constant for all range selections.
The signal voltage (Vs), which is equivalent to subtracting AI <0..x>+ from AI <0..x>-, must be less than or equal to the range selection of the given channel. If Vs is greater than the range selected, the signal clips and information are lost.
The total working voltage of the positive input, which is equivalent to (Vcm + Vs), or subtracting AI <0..x> GND from AI <0..x>+, must be less than ±11 V. This does not apply to the NI 6346 and NI 6349, which have lower working voltages for lower ranges. Refer to the device specifications on ni.com/manuals for working voltage values per range.
If any of these conditions are exceeded, the input voltage is clamped until the fault condition is removed.

Analog Input Data Acquisition Methods

When performing analog input measurements, you either can perform software-timed or hardware-timed acquisitions.
Software-timed acquisitions—With a software-timed acquisition, software controls the rate of the acquisition. Software sends a separate command to the hardware to initiate each ADC conversion. In NI-DAQmx, software-timed acquisitions are referred to as having on-demand timing. Software-timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data.
Hardware-timed acquisitions—With hardware-timed acquisitions, a digital hardware signal (AI Sample Clock) controls the rate of the acquisition. This signal can be generated internally on your device or provided externally.
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Hardware-timed acquisitions have several advantages over software-timed acquisitions:
The time between samples can be much shorter.
The timing between samples is deterministic.
Hardware-timed acquisitions can use hardware triggering.
Hardware-timed operations can be buffered or hardware-timed single point (HWTSP). A buffer is a temporary storage in computer memory for to-be-transferred samples.
Buffered—In a buffered acquisition, data is moved from the DAQ device’s onboard
FIFO memory to a PC buffer using DMA before it is transferred to application memory. Buffered acquisitions typically allow for much faster transfer rates than HWTSP acquisitions because data is moved in large blocks, rather than one point at a time.
One property of buffered I/O operations is the sample mode. The sample mode can be either finite or continuous:
Finite sample mode acquisition refers to the acquisition of a specific, predetermined number of data samples. Once the specified number of samples has been read in, the acquisition stops. If you use a reference trigger, you must use finite sample mode.
Note (NI USB-6356/6366 and PXIe-6378 Devices) Some X Series devices
internally transfer data in sample pairs, as opposed to single samples. This implementation allows for greater data throughput. However, if an acquisition on these devices acquires an odd number of total samples, the last sample acquired cannot be transferred.
To ensure this condition never occurs, NI-DAQmx adds a background channel for finite acquisitions that have both an odd number of channels and an odd number of samples-per-channel. The background channel is also added when performing any reference-triggered finite acquisition. Data from the background channel is only visible when reading in RAW mode.
For maximum efficiency in bus bandwidth and onboard FIFO use, use an even number of samples-per-channel or an even number of channels for finite acquisitions, so the background channel is not added.
Continuous acquisition refers to the acquisition of an unspecified number of samples. Instead of acquiring a set number of data samples and stopping, a continuous acquisition continues until you stop the operation. Continuous acquisition is also referred to as double-buffered or circular-buffered acquisition.
If data cannot be transferred across the bus fast enough, the FIFO becomes full. New acquisitions overwrite data in the FIFO before it can be transferred to host memory, which causes the device to generate an error. With continuous operations, if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer, the buffer could reach an overflow condition, causing an error to be generated.
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Hardware-timed single point (HWTSP)—Typically, HWTSP operations are used to
read single samples at known time intervals. While buffered operations are optimized for high throughput, HWTSP operations are optimized for low latency and low jitter. In addition, HWTSP can notify software if it falls behind hardware. These features make HWTSP ideal for real time control applications. HWTSP operations, in conjunction with the wait for next sample clock function, provide tight synchronization between the software layer and the hardware layer. Refer to the NI-DAQmx Hardware-Timed Single Point Lateness Checking document for more information. To access this document, go to
daqhwtsp.
Note (NI USB-635x/636x and NI PXIe-6386/6396 Devices) X Series USB and
ni.com/info and enter the Info Code
PXIe-6386/6396 devices do not support hardware-timed single point (HWTSP) operations. For more information about special considerations for PXIe-6386 and PXIe-6396 devices, go to
ni.com/info and enter the Info Code smio14ms.

Analog Input Triggering

Analog input supports three different triggering actions:
Start trigger
Reference trigger
Pause trigger
AI tasks will not support pause triggering on these devices.
Note (NI PXIe-6386/6396 Devices) AI tasks do not support pause triggering on
PXIe-6386 and PXIe-6396 devices. For more information about special considerations for these devices, go to ni.com/info and enter the Info Code
smio14ms.
Refer to the AI Start Trigger Signal, AI Reference Trigger Signal, and AI Pause Trigger Signal sections for information about these triggers.
An analog or digital trigger can initiate these actions. All Simultaneous MIO X Series devices support digital triggering, but some do not support analog triggering. To find your device triggering options, refer to the device specifications.
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Connecting Analog Input Signals

Table 4-7 summarizes the recommended input configuration for different types of signal sources for Simultaneous MIO X Series devices.
Table 4-7. Simultaneous MIO X Series Analog Input Signal Configuration
Floating Signal Sources
(Not Connected to
Earth Ground)
Ground-Referenced Signal
Sources
Examples:
• Ungrounded thermocouples
• Signal conditioning with isolated
Example:
• Plug-in instruments with non-isolated outputs
outputs
Input
Differential (DIFF)
• Battery devices
+
V
1
R
R
AI 0 +
AI 0 –
AI GND
+
+
V
1
AI 0 +
AI 0 –
+
AI GND
Refer to the Analog Input Terminal Configuration section for descriptions of the input modes.
Types of Signal Sources
When configuring the input channels and making signal connections, first determine whether the signal sources are floating or ground-referenced:
Floating Signal Sources—A floating signal source is not connected in any way to the building ground system, and instead has an isolated ground-reference point. Some examples of floating signal sources are outputs of transformers, thermocouples, battery-powered devices, optical isolators, and isolation amplifiers. An instrument or device that has an isolated output is a floating signal source. You must connect the ground reference of a floating signal to the AI ground of the device to establish a local or onboard reference for the signal. Otherwise, the measured input signal varies as the source floats outside the common-mode input range.
Ground-Referenced Signal Sources—A ground-referenced signal source is connected in some way to the building system ground and is, therefore, already connected to a common ground point with respect to the device, assuming that the computer is plugged into the same power system as the source. Non-isolated outputs of instruments and devices that plug into the building power system fall into this category.
The difference in ground potential between two instruments connected to the same building power system is typically between 1 mV and 100 mV, but the difference can be much
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Ground-
Referenced
Signal
Source
Common­Mode Noise and Ground
Potential
V
s
V
cm
+
+
I/O Connector
AI 0 Connections Shown
AI 0 GND
AI 0 –
AI 0 +
+
+
V
m
Measured
Voltage
Instrumentation
Amplifier
Simultaneous X Series Device
higher if power distribution circuits are improperly connected. If a grounded signal source is incorrectly measured, this difference can appear as measurement error. Follow the connection instructions for grounded signal sources to eliminate this ground potential difference from the measured signal.
Isolated devices have isolated front ends that are isolated from ground-reference signal sources and are not connected to building system grounds. Isolated devices require the user to provide a ground-reference terminal to which its input signals are referenced.
Differential Connections for Ground-Referenced Signal Sources
Figure 4-26 shows how to connect a ground-referenced signal source to a channel on an Simultaneous MIO X Series device.
Figure 4-26. Differential Connection for Ground-Referenced Signals on
Simultaneous MIO X Series Devices
Note (NI USB-6346/6356/6366 BNC Devices) To measure a floating signal
source on X Series USB BNC devices, move the switch under the BNC connector to the GS position.
With these types of connections, the instrumentation amplifier rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground, shown as Vcm in Figure 4-26.
Common-Mode Signal Rejection Considerations
The instrumentation amplifier can reject any voltage caused by ground potential differences between the signal source and the device. In addition, the instrumentation amplifier can reject common-mode noise pickup in the leads connecting the signal sources to the device. The instrumentation amplifier can reject common-mode signals as long as V+in and V-in (input signals) are both within the working voltage range of the device.
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+
+
Floating
Signal
Source
Instrumentation
Amplifier
V
m
Measured
Voltage
I/O Connector
AI 0 GND
Bias
Current
Return
Paths
AI 0 –
AI 0 +
AI 0 Connections Shown
Bias
Resistors
+
Simultaneous X Series Device
V
s
Differential Connections for Floating Signal Sources
Figure 4-27 shows how to connect a floating (or non-referenced) signal source to a channel on an Simultaneous MIO X Series device.
Figure 4-27. Differential Connection for Floating Signals on
Simultaneous MIO X Series Devices
Note (NI USB-6346/6356/6366 BNC Devices) To measure a floating signal
source on X Series USB BNC devices, move the switch under the BNC connector to the FS position.
Figure 4-27 shows bias resistors connected between AI 0 -, AI 0+, and the floating signal source ground. These resistors provide a return path for the bias current. A value of 10 k to 1M is usually sufficient. If you do not use the resistors and the source is truly floating, the source is not likely to remain within the common-mode signal range of the instrumentation amplifier, which saturates the instrumentation amplifier, causing erroneous readings. You must reference the source to the respective channel ground.
DC-Coupled
You can connect low source impedance and high source impedance DC-coupled sources:
Low Source Impedance—You must reference the source to AI GND. The easiest way to make this reference is to connect the positive side of the signal to the positive input of the instrumentation amplifier and connect the negative side of the signal to AI GND as well as
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to the negative input of the instrumentation amplifier, without using resistors. This connection works well for DC-coupled sources with low source impedance (less than 100 ).
High Source Impedance—For larger source impedances, this connection leaves the DIFF signal path significantly off balance. Noise that couples electrostatically onto the positive line does not couple onto the negative line because it is connected to ground. Hence, this noise appears as a DIFF-mode signal instead of a common-mode signal, and the instrumentation amplifier does not reject it. In this case, instead of directly connecting the negative line to AI GND, connect the negative line to AI GND through a resistor that is about 100 times the equivalent source impedance. The resistor puts the signal path nearly in balance, so that about the same amount of noise couples onto both connections, yielding better rejection of electrostatically coupled noise. This configuration does not load down the source (other than the very high input impedance of the instrumentation amplifier).
You can fully balance the signal path by connecting another resistor of the same value between the positive input and AI GND. This fully balanced configuration offers slightly better noise rejection but has the disadvantage of loading the source down with the series combination (sum) of the two resistors. If, for example, the source impedance is 2 k and each of the two resistors is 100 k, the resistors load down the source with 200 k and produce a -1% gain error.
AC-Coupled
Both inputs of the instrumentation amplifier require a DC path to ground in order for the instrumentation amplifier to work. If the source is AC-coupled (capacitively coupled), the instrumentation amplifier needs a resistor between the positive input and AI GND. If the source has low-impedance, choose a resistor that is large enough not to significantly load the source, but small enough not to produce significant input offset voltage as a result of input bias current (typically 100 k to 1 M). In this case, connect the negative input directly to AI GND. If the source has high output impedance, balance the signal path as previously described using the same value resistor on both the positive and negative inputs; be aware that there is some gain error from loading down the source.

Unused Channels

NI recommends connecting unused channel inputs AI+ and AI- to AIGND. This prevents the inputs from floating outside of the Vcm rating, which can generate unecessary heat and measurement drift. Additionally, open inputs can detect and amplify unwanted environmental noise.

Field Wiring Considerations

Environmental noise can seriously affect the measurement accuracy of the Simultaneous MIO X Series device if you do not take proper care when running signal wires between signal sources and the device. The following recommendations apply mainly to AI signal routing, although they also apply to signal routing in general.
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Minimize noise pickup and maximize measurement accuracy by taking the following precautions:
Use individually shielded, twisted-pair wires to connect AI signals to the device. With this type of wire, the signals attached to the AI+ and AI- inputs are twisted together and then covered with a shield. You then connect this shield only at one point to the signal source ground. This kind of connection is required for signals traveling through areas with large magnetic fields or high electromagnetic interference.
Route signals to the device carefully. Keep cabling away from noise sources. The most common noise source in a PCI DAQ system is the video monitor. Separate the monitor from the analog signals as far as possible.
Separate the signal lines of the Simultaneous MIO X Series device from high-current or high-voltage lines. These lines can induce currents in or voltages on the signal lines of the Simultaneous MIO X Series device if they run in close parallel paths. To reduce the magnetic coupling between lines, separate them by a reasonable distance if they run in parallel, or run the lines at right angles to each other.
•Do not run signal lines through conduits that also contain power lines.
Protect signal lines from magnetic fields caused by electric motors, welding equipment, breakers, or transformers by running them through special metal conduits.
Refer to the Field Wiring and Noise Considerations for Analog Signals document for more information. To access this document, go to
ni.com/info and enter the Info Code rdfwn3.
Minimizing Drift in Differential Mode
If the readings from the DAQ device are random and drift rapidly, you should check the ground-reference connections. The signal can be referenced to a level that is considered floating with reference to the device ground reference. Even though you are in DIFF mode, you must still reference the signal to the same ground level as the device reference. There are various methods of achieving this reference while maintaining a high common-mode rejection ratio (CMRR). These methods are outlined in the Connecting Analog Input Signals section.
AI GND is an AI common signal that routes directly to the ground connection point on the devices. You can use this signal if you need a general analog ground connection point to the device.

Analog Input Timing Signals

In order to provide all of the timing functionality described throughout this section, Simultaneous MIO X Series devices have a flexible timing engine. Refer to the Clock Routing section of Chapter 9, Digital Routing and Clock Generation.
Simultaneous MIO X Series devices use AI Sample Clock (ai/SampleClock) to perform simultaneous sampling on all active analog channels. Since there is one ADC per channel, AI Sample Clock controls the sample period on all the channels in the task.
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13042
AI Start Trigger
AI Sample Clock
Sample Counter
Don't Care
01231 0222
AI Start Trigger
AI Reference Trigger
AI Sample Clock
Sample Counter
An acquisition with posttrigger data allows you to view data that is acquired after a trigger event is received. A typical posttrigger DAQ sequence is shown in Figure 4-28. The sample counter is loaded with the specified number of posttrigger samples, in this example, five. The value decrements with each pulse on AI Sample Clock, until all desired samples have been acquired.
Figure 4-28. Typical Posttriggered DAQ Sequence
An acquisition with pretrigger data allows you to view data that is acquired before the trigger of interest, in addition to data acquired after the trigger. Figure 4-29 shows a typical pretrigger DAQ sequence. The AI Start Trigger signal (ai/StartTrigger) can be either a hardware or software signal. If AI Start Trigger is set up to be a software start trigger, an output pulse appears on the ai/StartTrigger line when the acquisition begins. When the AI Start Trigger pulse occurs, the sample counter is loaded with the number of pretrigger samples, in this example, four. The value decrements with each pulse on AI Sample Clock.The sample counter is then loaded with the number of posttrigger samples, in this example, three.
Figure 4-29. Typical Pretriggered DAQ Sequence
If an AI Reference Trigger (ai/ReferenceTrigger) pulse occurs before the specified number of pretrigger samples are acquired, the trigger pulse is ignored. Otherwise, when the AI Reference Trigger pulse occurs, the sample counter value decrements until the specified number of posttrigger samples have been acquired. For more information about start and reference triggers, refer to the Analog Input Triggering section.
Simultaneous MIO X Series devices feature the following analog input timing signals:
AI Sample Clock Signal
AI Sample Clock Timebase Signal
AI Hold Complete Event Signal
AI Start Trigger Signal
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*
*
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AI Reference Trigger Signal
AI Pause Trigger Signal
Note (NI PXIe-6386/6396 Devices) AI tasks do not support pause triggering on
*
*
PXIe-6386 and PXIe-6396 devices. For more information about special considerations for these devices, go to
smio14ms.
Signals with an
*
support digital filtering. Refer to the PFI Filters section of Chapter 8, PFI, for
ni.com/info and enter the Info Code
more information.
Aggregate versus Single Channel Sample Rates
Simultaneous MIO X Series devices have one ADC per channel so the single channel maximum sample rate can be achieved on each channel. The maximum single channel rate is the fastest you can acquire data on the device from a single or multiple channels and still achieve accurate results.
The total aggregate determines the maximum bus bandwidth used by the device. The total aggregate sample rate is the product of the maximum sample rate for a single channel multiplied by the number of AI channels that the device support.
Table 4-8 shows the single channels and total aggregate rates for Simultaneous MIO X Series devices.
Table 4-8. Analog Input Rates for Simultaneous MIO X Series Devices
Simultaneous MIO
X Series Device
Single Channel Total Aggregate
Analog Input Rate
NI 6346 500 kS/s 4 MS/s
NI 6349 500 kS/s 16 MS/s
NI 6356 1.25 MS/s 10 MS/s
NI 6358 1.25 MS/s 20 MS/s
NI 6366 2 MS/s 16 MS/s
NI 6368 2 MS/s 32 MS/s
NI 6374 3.57 MS/s 14.28 MS/s
NI 6376 3.57 MS/s 28.56 MS/s
NI 6378 3.57 MS/s 57.12 MS/s
NI 6386 14.29 MS/s
*
114.29 MS/s
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Chapter 4 Analog Input
Table 4-8. Analog Input Rates for Simultaneous MIO X Series Devices (Continued)
Simultaneous MIO
X Series Device
Single Channel Total Aggregate
NI 6396 14.29 MS/s
*
NI PXIe-6386/6396 devices support the listed analog input rates when using an internal clock. When using an externally-derived clock, the maximum single channel analog input rate is 15 MS/s and the total aggregate rate is 120 MS/s.
Note: On Simultaneous MIO X Series devices, each channel has an ADC so each channel can be acquired at the maximum single channel rate.
Analog Input Rate
*
114.29 MS/s
*
AI Sample Clock Signal
Use the AI Sample Clock (ai/SampleClock) signal to initiate a set of measurements. Your Simultaneous MIO X Series device samples the AI signals of every channel in the task once for every AI Sample Clock. A measurement acquisition consists of one or more samples.
You can specify an internal or external source for AI Sample Clock. You can also specify whether the measurement sample begins on the rising edge or falling edge of AI Sample Clock.
Using an Internal Source
One of the following internal signals can drive AI Sample Clock:
Counter n Internal Output
AI Sample Clock Timebase (divided down)
A pulse initiated by host software
Change Detection Event
Counter n Sample Clock
DI Sample Clock (di/SampleClock)
AO Sample Clock (ao/SampleClock)
DO Sample Clock (do/SampleClock)
A programmable internal counter divides down the sample clock timebase.
Several other internal signals can be routed to AI Sample Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
Using an External Source
Use one of the following external signals as the source of AI Sample Clock:
PFI <0..15>
•RTSI <0..7>
PXI_STAR
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AI Sample Clock Timebase
AI Start Trigger
AI Sample Clock
Delay
From Start
Trigger
PXIe_DSTAR<A,B>
Analog Comparison Event (an analog trigger)
Note (NI PXIe-6386/6396 Devices) PXIe-6386 and PXIe-6396 devices differ in
several ways from other SMIO devices. For more information about using an external source with these devices, go to
ni.com/info and enter the Info Code smio14ms.
Routing AI Sample Clock Signal to an Output Terminal
You can route AI Sample Clock out to any PFI <0..15>, RTSI <0..7>, or PXIe_DSTARC terminal. This pulse is always active high.
All PFI terminals are configured as inputs by default.
Other Timing Requirements
Your DAQ device only acquires data during an acquisition. The device ignores AI Sample Clock when a measurement acquisition is not in progress. During a measurement acquisition, you can cause your DAQ device to ignore AI Sample Clock using the AI Pause Trigger signal.
A counter/timing engine on your device internally generates AI Sample Clock unless you select an external source. AI Start Trigger starts this counter and either software or hardware can stop it once a finite acquisition completes. When using the AI timing engine, you can also specify a configurable delay from AI Start Trigger to the first AI Sample Clock pulse. By default, this delay is set to two ticks of the AI Sample Clock Timebase signal.
Figure 4-30 shows the relationship of AI Sample Clock to AI Start Trigger.
Figure 4-30. AI Sample Clock and AI Start Trigger
AI Sample Clock Timebase Signal
You can route any of the following signals to be the AI Sample Clock Timebase (ai/SampleClockTimebase) signal:
100 MHz Timebase (default)
20 MHz Timebase
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100 kHz Timebase
•PXI_CLK10
•RTSI <0..7>
PFI <0..15>
PXI_STAR
PXIe_DSTAR<A,B>
Analog Comparison Event (an analog trigger)
Note (NI PXIe-6386/6396 Devices) PXIe-6386 and PXIe-6396 devices differ in
several ways from other SMIO devices. For more information about these devices related to AI Sample Clocks, go to ni.com/info and enter the Info Code
smio14ms.
AI Sample Clock Timebase is not available as an output on the I/O connector. AI Sample Clock Timebase is divided down to provide one of the possible sources for AI Sample Clock. You can configure the polarity selection for AI Sample Clock Timebase as either rising or falling edge, except on 100 MHz Timebase or 20 MHz Timebase.
AI Hold Complete Event Signal
The AI Hold Complete Event (ai/HoldCompleteEvent) signal generates a pulse after each A/D conversion begins. You can route AI Hold Complete Event out to any PFI <0..15>, RTSI <0..7>, or PXIe_DSTARC terminal.
The polarity of AI Hold Complete Event is software-selectable, but is typically configured so that a low-to-high leading edge can clock external AI multiplexers indicating when the input signal has been sampled and can be removed.
AI Start Trigger Signal
Use the AI Start Trigger (ai/StartTrigger) signal to begin a measurement acquisition. A measurement acquisition consists of one or more samples. If you do not use triggers, begin a measurement with a software command. Once the acquisition begins, configure the acquisition to stop:
When a certain number of points are sampled (in finite mode)
After a hardware reference trigger (in finite mode)
With a software command (in continuous mode)
An acquisition that uses a start trigger (but not a reference trigger) is sometimes referred to as a posttriggered acquisition.
Retriggerable Analog Input
Note (PXIe-6386/6396 Devices) PXIe-6386 and PXIe-6396 devices do not
currently support retriggerable AI tasks. For more information about special
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considerations for these devices, go to ni.com/info and enter the Info Code
smio14ms.
The AI Start Trigger is configurable as retriggerable. When the AI Start Trigger is configured as retriggerable, the timing engine generates the sample and convert clocks for the configured acquisition in response to each pulse on an AI Start Trigger signal.
The timing engine ignores the AI Start Trigger signal while the clock generation is in progress. After the clock generation is finished, the counter waits for another Start Trigger to begin another clock generation. Figure 4-31 shows a retriggerable analog input with three AI channels and four samples per trigger.
Figure 4-31. Simultaneous MIO X Series Retriggerable Analog Input
AI Start Trigger
AI Sample Clock
Note Waveform information from LabVIEW does not reflect the delay between
triggers. They are treated as a continuous acquisition with constant t0 and t1 information.
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Note (NI USB-6356/6366 and PXIe-6378 Devices) Some X Series devices
internally transfer data in sample pairs, as opposed to single samples. This implementation allows for greater data throughput. However, if an acquisition on these devices acquires an odd number of total samples, the last sample acquired cannot be transferred.
To ensure this condition never occurs, NI-DAQmx adds a background channel for finite acquisitions that have both an odd number of channels and an odd number of samples-per-channel. The background channel is also added when performing any reference-triggered finite acquisition. Data from the background channel is only visible when reading in RAW mode.
For maximum efficiency in bus bandwidth and onboard FIFO use, use an even number of samples-per-channel or an even number of channels for finite acquisitions, so the background channel is not added.
Reference triggers are not retriggerable.
Using a Digital Source
To use AI Start Trigger with a digital source, specify a source and an edge. The source can be any of the following signals:
PFI <0..15>
•RTSI <0..7>
Counter n Internal Output
PXI_STAR
PXIe_DSTAR<A,B>
The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
You can also specify whether the measurement acquisition begins on the rising edge or falling edge of AI Start Trigger.
Using an Analog Source
When you use an analog trigger source, the acquisition begins on the first rising edge of the Analog Comparison Event signal.
Routing AI Start Trigger to an Output Terminal
You can route AI Start Trigger out to any PFI <0..15>, RTSI <0..7>, or PXIe_DSTARC terminal. The output is an active high pulse. All PFI terminals are configured as inputs by default.
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The device also uses AI Start Trigger to initiate pretriggered DAQ operations. In most pretriggered applications, a software trigger generates AI Start Trigger. Refer to the AI Reference
Trigger Signal section for a complete description of the use of AI Start Trigger and AI Reference
Trigger in a pretriggered DAQ operation.
AI Reference Trigger Signal
Use AI Reference Trigger (ai/ReferenceTrigger) signal to stop a measurement acquisition. To use a reference trigger, specify a buffer of finite size and a number of pretrigger samples (samples that occur before the reference trigger). The number of posttrigger samples (samples that occur after the reference trigger) desired is the buffer size minus the number of pretrigger samples.
Note (NI USB-6356/6366 Devices) You can select the buffer on the host or on the
NI USB-6356/6366 device. To enable a Reference Trigger to Onboard Memory, set the AI Data Transfer Request Condition property in NI-DAQmx to When Acquisition Complete.
Once the acquisition begins, the DAQ device writes samples to the buffer. After the DAQ device captures the specified number of pretrigger samples, the DAQ device begins to look for the reference trigger condition. If the reference trigger condition occurs before the DAQ device captures the specified number of pretrigger samples, the DAQ device ignores the condition.
If the buffer becomes full, the DAQ device continuously discards the oldest samples in the buffer to make space for the next sample. This data can be accessed (with some limitations) before the DAQ device discards it. Refer to the document, Can a Pretriggered Analog Acquisition be Continuous?, for more information. To access this document, go to Info Code
rdcanq.
ni.com/info and enter the
When the reference trigger occurs, the DAQ device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired. Figure 4-32 shows the final buffer.
Figure 4-32. Reference Trigger Final Buffer
Reference Trigger
Pretrigger Samples
Complete Buffer
Posttrigger Samples
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Using a Digital Source
To use AI Reference Trigger with a digital source, specify a source and an edge. The source can be any of the following signals:
PFI <0..15>
•RTSI <0..7>
PXI_STAR
PXIe_DSTAR<A,B>
Change Detection Event
Counter n Internal Output
DI Reference Trigger (di/ReferenceTrigger)
AO Start Trigger (ao/StartTrigger)
DO Start Trigger (do/StartTrigger)
The source can also be one of several internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
You can also specify whether the measurement acquisition stops on the rising edge or falling edge of AI Reference Trigger.
Using an Analog Source
When you use an analog trigger source, the acquisition stops on the first rising edge of the Analog Comparison Event signal.
Routing AI Reference Trigger Signal to an Output Terminal
You can route AI Reference Trigger out to any PFI <0..15>, RTSI <0..7>, PXI_Trig <0..7>, or PXIe_DSTARC terminal.
All PFI terminals are configured as inputs by default.
AI Pause Trigger Signal
Note (NI PXIe-6386/6396 Devices) AI tasks do not support pause triggering on
PXIe-6386 and PXIe-6396 devices. For more information about special considerations for these devices, go to
smio14ms.
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ni.com/info and enter the Info Code
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AI Sample Clock
AI Pause Trigger
T
A
AI External Sample Clock
AI Pause Trigger
Halt. Used on Internal Clock
Free Running. Used on External Clock
T – A
AI Sample Clock
Use the AI Pause Trigger (ai/PauseTrigger) signal to pause and resume a measurement acquisition. The internal sample clock pauses while the external trigger signal is active and resumes when the signal is inactive. You can program the active level of the pause trigger to be high or low, as shown in Figure 4-33. In the figure, T represents the period, and A represents the unknown time between the clock pulse and the posttrigger.
Figure 4-33. Halt (Internal Clock) and Free Running (External Clock)
Using a Digital Source
To use AI Pause Trigger, specify a source and a polarity. The source can be any of the following signals:
PFI <0..15>
•RTSI <0..7>
PXI_STAR
PXIe_DSTAR<A,B>
Counter n Internal Output
Counter n Gate
AO Pause Trigger (ao/PauseTrigger)
DI Pause Trigger (di/PauseTrigger)
DO Pause Trigger (do/PauseTrigger)
The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
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Using an Analog Source
When you use an analog trigger source, the internal sample clock pauses when the Analog Comparison Event signal is low and resumes when the signal goes high (or vice versa).
Routing AI Pause Trigger Signal to an Output Terminal
You can route AI Pause Trigger out to any PFI <0..15>, RTSI <0..7>, PXI_STAR, or PXIe_DSTARC terminal.
Note Pause triggers are only sensitive to the level of the source, not the edge.

Getting Started with AI Applications in Software

You can use the Simultaneous MIO X Series device in the following analog input applications:
Simultaneous sampling
Single-point analog input
Finite analog input
Continuous analog input
You can perform these applications through DMA or programmed I/O data transfer mechanisms. Some of the applications also use start and reference pause triggers.
Note For more information about programming analog input applications and
triggers in software, refer to the NI-DAQmx Help or the LabVIEW Help in version 8.0 or later.
Simultaneous MIO X Series devices use the NI-DAQmx driver. NI-DAQmx includes a collection of programming examples to help you get started developing an application. You can modify example code and save it in an application. You can use examples to develop a new application or add example code to an existing application.
To locate LabVIEW, LabWindows/CVI, Measurement Studio, Visual Basic, and ANSI C examples, refer to the document, Where Are NI-DAQmx Examples Installed in Windows?, by going to
For additional examples, refer to ni.com/examples.
ni.com/info and entering the Info Code daqmxexp.
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5
Analog Output
Many X Series devices have analog output functionality. X Series devices that support analog output have either two or four AO channels that are controlled by a single clock and are capable of waveform generation. Refer to Appendix A, Device-Specific Information, for information about the capabilities of your device.
Figure 5-1 shows the analog output circuitry of X Series devices.

Figure 5-1. X Series Analog Output Circuitry

AO 0
AO 1
AO 2
AO 3
The main blocks featured in the X Series analog output circuitry are as follows:
DACs—Digital-to-analog converters (DACs) convert digital codes to analog voltages.
AO FIFO—The AO FIFO enables analog output waveform generation. It is a first-in-first-out (FIFO) memory buffer between the computer and the DACs. It allows you to download the points of a waveform to your X Series device without host computer interaction.
AO Sample Clock—The AO Sample Clock signal reads a sample from the DAC FIFO and generates the AO voltage.
AO Reference Selection—The AO reference selection signal allows you to change the range of the analog outputs.
DAC0
DAC1
DAC2
DAC3
AO FIFO
AO Data
AO Sample Clock
AO Reference Select
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AO Reference Selection

AO reference selection allows you to set the analog output range. The analog output range describes the set of voltages the device can generate. The digital codes of the DAC are spread evenly across the analog output range. So, if the range is smaller, the analog output has better resolution; that is, the voltage output difference between two consecutive codes is smaller. Therefore, the analog output is more accurate.
The analog output range of a device is all of the voltages between:
-AO Reference and +AO Reference
The possible settings for AO reference depend on the device model. For models not described below, refer to the device specifications.
(NI 6321/6323/6341/6343/6346/6349 Devices) The AO reference is always 10 V. The
• analog output range equals ±10 V.
(NI 6345/635x/636x/637x/6386/6396 Devices) The AO reference of each analog output (AO <0..3>) can be individually set to one of the following:
–10V
–5V
APFI <0,1>
You can connect an external signal to APFI <0,1> to provide the AO reference. The AO reference can be a positive or negative voltage. If AO reference is a negative voltage, the polarity of the AO output is inverted. The valid ranges of APFI <0,1> are listed in the device specifications.
You can use one of the AO <0..3> signals to be the AO reference for a different AO signal. However, you must externally connect this channel to APFI 0 or APFI 1.
Note When using an external reference, the output signal is not calibrated in
software. You can generate a value and measure the voltage offset to calibrate your output in software.

Minimizing Glitches on the Output Signal

When you use a DAC to generate a waveform, you may observe glitches on the output signal. These glitches are normal; when a DAC switches from one voltage to another, it produces glitches due to released charges. The largest glitches occur when the most significant bit of the DAC code changes. You can build a lowpass deglitching filter to remove some of these glitches, depending on the frequency and nature of the output signal. Visit information about minimizing glitches.
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