National Instruments 6025E, 6024E, 6023E User Manual

DAQ

6023E/6024E/6025E User Manual

Multifunction I/O Devices for PCI, PXI ,
CompactPCI, and PCMCIA Bus Computers

6023E/6024E/6025E User Manual

December 2000 Edition

Part Number 322072C-01

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Important Information

Warranty

The DAQCard-6024E, PCI-6023E, PCI-6024E, PCI-6025E, and PXI-6025E devices are warranted against defectsin materials and
workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National
Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty
includes parts and labor.

The media on which you receive National Instruments software are warranted not to fail to execute programming instructions,
due to defects in materials and workmanship, for a period of 90 days from date of shipment, as evidenced by receipts or other
documentation. National Instruments will, at its option, repair or replace software media that do not execute programming
instructions if National Instruments receives notice of such defects during the warranty period. National Instruments does not
warrant that the operation of the software shall be uninterrupted or error free.

A Return Material Authorization (RMA) number must be obtained from the factory and clearly marked on the outside of
the package before any equipment will be accepted for warranty work. National Instruments will pay the shipping costs of
returning to the owner parts which are covered by warranty.

National Instruments believes that the information in this document is accurate. The document has been carefully reviewed
for technical accuracy. In the event that technical or typographical errors exist, National Instruments reserves the right to
make changes to subsequent editions of this document without prior notice to holders of this edition. The reader should consult
National Instruments if errors are suspected. In no event shall National Instruments be liable for any damages arising out of
or related to this document or the information contained in it.

E

XCEPT AS SPECIFIED HEREIN,NATIONAL INSTRUMENTS MAKES NO WARRANTIES, EXPRESS OR IMPLIED, AND SPECIFICALLY DISCLAIMS ANY

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Product and company names mentioned herein are trademarks or trade names of their respective companies.

WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS

(1) NATIONAL INSTRUMENTS PRODUCTS ARENOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL
OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL
COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE
EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN.

(2) IN ANY APPLICATION, INCLUDING THEABOVE, RELIABILITYOF OPERATION OF THE SOFTWARE PRODUCTS
CAN BE IMPAIRED BY ADVERSE FACTORS, INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL
POWER SUPPLY, COMPUTER HARDWARE MALFUNCTIONS, COMPUTER OPERATING SYSTEM SOFTWARE
FITNESS, FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION,
INSTALLATION ERRORS, SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS, MALFUNCTIONS OR
FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES, TRANSIENT FAILURES OF ELECTRONIC
SYSTEMS (HARDWARE AND/OR SOFTWARE), UNANTICIPATED USES OR MISUSES, OR ERRORS ON THE PART OF
THE USER OR APPLICATIONS DESIGNER (ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER
COLLECTIVELY TERMED “SYSTEM FAILURES”). ANY APPLICATION WHERE A SYSTEM FAILURE WOULD
CREATE A RISK OF HARM TO PROPERTY OR PERSONS (INCLUDING THE RISK OF BODILY INJURY AND DEATH)
SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM
FAILURE. TO AVOID DAMAGE, INJURY, OR DEATH, THE USER OR APPLICATION DESIGNER MUST TAKE
REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES, INCLUDING BUT NOT LIMITED TO
BACK-UP OR SHUT DOWN MECHANISMS. BECAUSE EACH END-USER SYSTEM IS CUSTOMIZED AND DIFFERS
FROM NATIONAL INSTRUMENTS' TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER
MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT
EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS, THE USER OR APPLICATION DESIGNER IS
ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL
INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A
SYSTEM OR APPLICATION, INCLUDING, WITHOUT LIMITATION, THE APPROPRIATE DESIGN, PROCESS AND
SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION.

Contents

About This Manual

Conventions Used in This Manual.................................................................................xi

Related Documentation..................................................................................................xii

Chapter 1
Introduction

Features of the 6023E, 6024E, and 6025E.....................................................................1-1

Using PXI with CompactPCI.........................................................................................1-2

What You Need to Get Started ......................................................................................1-2

Software Programming Choices ....................................................................................1-3

National Instruments Application Software ....................................................1-3

NI-DAQ Driver Software ................................................................................1-4

Optional Equipment.......................................................................................................1-5

Chapter 2
Installation and Configuration

Software Installation ......................................................................................................2-1

Unpacking......................................................................................................................2-1

Hardware Installation.....................................................................................................2-2

Hardware Configuration ................................................................................................ 2-3

Chapter 3
Hardware Overview

Analog Input ..................................................................................................................3-2

Input Mode ......................................................................................................3-2

Input Range .....................................................................................................3-3

Dithering..........................................................................................................3-4

Multichannel Scanning Considerations...........................................................3-5

Analog Output................................................................................................................3-6

Analog Output Glitch ......................................................................................3-6

Digital I/O ......................................................................................................................3-7

Timing Signal Routing................................................................................................... 3-7

Programmable Function Inputs .......................................................................3-8

Device and RTSI Clocks .................................................................................3-9

RTSI Triggers..................................................................................................3-9

© National Instruments Corporation v 6023E/6024E/6025E User Manual

Contents

Chapter 4
Signal Connections

I/O Connector ................................................................................................................ 4-1

Analog Input Signal Overview...................................................................................... 4-8

Types of Signal Sources.................................................................................. 4-8

Analog Input Modes........................................................................................ 4-9

Analog Input Signal Connections.................................................................................. 4-11

Differential Connection Considerations (DIFF Input Configuration) ............ 4-13

Single-Ended Connection Considerations ...................................................... 4-17

Common-Mode Signal Rejection Considerations........................................... 4-19

Analog Output Signal Connections............................................................................... 4-19

Digital I/O Signal Connections ..................................................................................... 4-20

All Devices...................................................................................................... 4-20

Programmable Peripheral Interface (PPI) ..................................................................... 4-22

Port C Pin Assignments .................................................................................. 4-23

Power-up State ................................................................................................ 4-24

Timing Specifications ..................................................................................... 4-25

Mode 1 Input Timing ...................................................................................... 4-27

Mode 1 Output Timing ................................................................................... 4-28

Mode 2 Bidirectional Timing.......................................................................... 4-29

Power Connections........................................................................................................ 4-30

Timing Connections ...................................................................................................... 4-30

Programmable Function Input Connections ................................................... 4-31

DAQ Timing Connections .............................................................................. 4-32

Floating Signal Sources .................................................................... 4-9

Ground-Referenced Signal Sources.................................................. 4-9

Differential Connections for Ground-Referenced Signal Sources ... 4-14
Differential Connections for Nonreferenced or Floating Signal

Sources........................................................................................... 4-15

Single-Ended Connections for Floating Signal Sources

(RSE Configuration)...................................................................... 4-18

Single-Ended Connections for Grounded Signal Sources

(NRSE Configuration) ................................................................... 4-18

Changing DIO Power-up State to Pulled Low ................................. 4-24

SCANCLK Signal ............................................................................ 4-33

EXTSTROBE* Signal...................................................................... 4-33

TRIG1 Signal.................................................................................... 4-34

TRIG2 Signal.................................................................................... 4-35

STARTSCAN Signal........................................................................ 4-36

CONVERT* Signal .......................................................................... 4-38

AIGATE Signal ................................................................................ 4-39

SISOURCE Signal............................................................................ 4-40

6023E/6024E/6025E User Manual vi ni.com

Field Wiring Considerations..........................................................................................4-49

Chapter 5
Calibration

Loading Calibration Constants ......................................................................................5-1

Self-Calibration..............................................................................................................5-2

External Calibration....................................................................................................... 5-2

Other Considerations .....................................................................................................5-3

Contents

Waveform Generation Timing Connections ...................................................4-40

WFTRIG Signal ................................................................................4-40

UPDATE* Signal..............................................................................4-41

UISOURCE Signal ...........................................................................4-42

General-Purpose Timing Signal Connections .................................................4-43

GPCTR0_SOURCE Signal............................................................... 4-43

GPCTR0_GATE Signal....................................................................4-44

GPCTR0_OUT Signal ...................................................................... 4-45

GPCTR0_UP_DOWN Signal ...........................................................4-45

GPCTR1_SOURCE Signal............................................................... 4-46

GPCTR1_GATE Signal....................................................................4-46

GPCTR1_OUT Signal ...................................................................... 4-47

GPCTR1_UP_DOWN Signal ...........................................................4-47

FREQ_OUT Signal ...........................................................................4-49

Appendix A
Specifications

Appendix B
Custom Cabling and Optional Connectors

Appendix C
Common Questions

Appendix D
Technical Support Resources

Glossary

Index

© National Instruments Corporation vii 6023E/6024E/6025E User Manual

Contents

Figures

Figure 1-1. The Relationship Between the Programming Environment,

NI-DAQ, and Your Hardware............................................................... 1-5

Figure 3-1. PCI-6023E, PCI-6024E, PCI-6025E, and PXI-6025E

Block Diagram ...................................................................................... 3-1

Figure 3-2. DAQCard-6024E Block Diagram......................................................... 3-2

Figure 3-3. Dithering ............................................................................................... 3-5

Figure 3-4. CONVERT* Signal Routing................................................................. 3-8

Figure 3-5. PCI RTSI Bus Signal Connection.........................................................3-10

Figure 3-6. PXI RTSI Bus Signal Connection......................................................... 3-11

Figure 4-1. I/O Connector Pin Assignment for the 6023E/6024E........................... 4-2

Figure 4-2. I/O Connector Pin Assignment for the 6025E ...................................... 4-3

Figure 4-3. Programmable Gain Instrumentation Amplifier (PGIA) ...................... 4-10

Figure 4-4. Summary of Analog Input Connections ............................................... 4-12

Figure 4-5. Differential Input Connections for Ground-Referenced Signals .......... 4-14

Figure 4-6. Differential Input Connections for Nonreferenced Signals .................. 4-15

Figure 4-7. Single-Ended Input Connections for Nonreferenced or

Floating Signals .................................................................................... 4-18

Figure 4-8. Single-Ended Input Connections for Ground-Referenced Signals ....... 4-19

Figure 4-9. Analog Output Connections.................................................................. 4-20

Figure 4-10. Digital I/O Connections ........................................................................ 4-21

Figure 4-11. Digital I/O Connections Block Diagram............................................... 4-22

Figure 4-12. DIO Channel Configured for High DIO Power-up State with

External Load........................................................................................ 4-24

Figure 4-13. Timing Specifications for Mode 1 Input Transfer ................................ 4-27

Figure 4-14. Timing Specifications for Mode 1 Output Transfer ............................. 4-28

Figure 4-15. Timing Specifications for Mode 2 Bidirectional Transfer.................... 4-29

Figure 4-16. Timing I/O Connections ....................................................................... 4-31

Figure 4-17. Typical Posttriggered Acquisition ........................................................ 4-32

Figure 4-18. Typical Pretriggered Acquisition.......................................................... 4-33

Figure 4-19. SCANCLK Signal Timing.................................................................... 4-33

Figure 4-20. EXTSTROBE* Signal Timing ............................................................. 4-34

Figure 4-21. TRIG1 Input Signal Timing.................................................................. 4-34

Figure 4-22. TRIG1 Output Signal Timing ...............................................................4-35

Figure 4-23. TRIG2 Input Signal Timing.................................................................. 4-36

Figure 4-24. TRIG2 Output Signal Timing ...............................................................4-36

Figure 4-25. STARTSCAN Input Signal Timing...................................................... 4-37

Figure 4-26. STARTSCAN Output Signal Timing ................................................... 4-37

Figure 4-27. CONVERT* Input Signal Timing ........................................................ 4-38

Figure 4-28. CONVERT* Output Signal Timing...................................................... 4-39

Figure 4-29. SISOURCE Signal Timing ................................................................... 4-40

6023E/6024E/6025E User Manual viii ni.com

Tables

Contents

Figure 4-30. WFTRIG Input Signal Timing ..............................................................4-41

Figure 4-31. WFTRIG Output Signal Timing............................................................4-41

Figure 4-32. UPDATE* Input Signal Timing............................................................4-42

Figure 4-33. UPDATE* Output Signal Timing .........................................................4-42

Figure 4-34. UISOURCE Signal Timing ...................................................................4-43

Figure 4-35. GPCTR0_SOURCE Signal Timing ......................................................4-44

Figure 4-36. GPCTR0_GATE Signal Timing in Edge-Detection Mode...................4-45

Figure 4-37. GPCTR0_OUT Signal Timing..............................................................4-45

Figure 4-38. GPCTR1_SOURCE Signal Timing ......................................................4-46

Figure 4-39. GPCTR1_GATE Signal Timing in Edge-Detection Mode...................4-47

Figure 4-40. GPCTR1_OUT Signal Timing..............................................................4-47

Figure 4-41. GPCTR Timing Summary.....................................................................4-48

Figure B-1. 68-Pin E Series Connector Pin Assignments ........................................B-3

Figure B-2. 68-Pin Extended Digital Input Connector Pin Assignments .................B-4

Figure B-3. 50-Pin E Series Connector Pin Assignments ........................................B-5

Figure B-4. 50-Pin Extended Digital Input Connector Pin Assignments .................B-6

Table 3-1. Available Input Configurations.............................................................3-3

Table 3-2. Measurement Precision ......................................................................... 3-3

Table 3-3. Pins Used by PXI E Series Device........................................................3-11

Table 4-1. I/O Connector Details............................................................................4-1

Table 4-2. I/O Connector Signal Descriptions........................................................4-4

Table 4-3. I/O Signal Summary..............................................................................4-7

Table 4-4. Port C Signal Assignments.................................................................... 4-23

Table 4-5. Signal Names Used in Timing Diagrams.............................................. 4-25

© National Instruments Corporation ix 6023E/6024E/6025E User Manual

About This Manual

The 6023, 6024, and 6025 E Series boards are high-performance
multifunction analog, digital, and timing I/O boards for PCI, PXI,
PCMCIA, and CompactPCI bus computers. Supported functions include
analog input, analog output, digital I/O, and timing I/O.

This manual describes the electrical and mechanical aspects of the
PCI-6023E, PCI-6024E, DAQCard-6024E, PCI-6025E, and PXI-6025E
boards from the E Series product line and contains information concerning
their operation and programming.

Conventions Used in This Manual

The following conventions are used in this manual:

<> Angle brackets containing numbers separated by an ellipsis represent a

range of values associated with a bit or signal name—for example,
DBIO<3..0>.

♦ The ♦ symbol indicates that the text following it applies only to a specific

product, a specific operating system, or a specific software version.

This icon denotes a note, which alerts you to important information.

This icon denotes a caution, which advises you of precautions to take to
avoid injury, data loss, or a system crash.

bold Bold text denotes items that you must select or click on in the software,

such as menu items and dialog box options. Bold text also denotes
parameter names.

CompactPCI CompactPCI refers to the core specification defined by the PCI Industrial

Computer Manufacturer’s Group (PICMG).

italic Italic text denotes variables, emphasis, a cross reference, or an introduction

to a key concept. This font also denotes text that is a placeholder for a word
or value that you must supply.

monospace

© National Instruments Corporation xi 6023E/6024E/6025E User Manual

Monospace font denotes text or characters that you should enter from the
keyboard, sections of code, programming examples, and syntax examples.
This font is also used for the proper names of disk drives, paths, directories,

About This Manual

programs, subprograms, subroutines, device names, functions, operations,
variables, filenames and extensions, and code excerpts.

NI-DAQ NI-DAQ refers to the NI-DAQ driver software for PC compatible

computers unless otherwise noted.

PXI PXI stands for PCI eXtensions for Instrumentation. PXI is an open

specification that builds off the CompactPCI specification by adding
instrumentation-specific features.

Related Documentation

The following documents contain information you may find helpful:

• DAQ-STC Technical Reference Manual

• National Instruments Application Note 025, FieldWiringandNoise

Considerations for Analog Signals

• PCI Local Bus Specification Revision 2.2

• PICMG CompactPCI 2.0 R2.1

• PXI Specification Revision 2.0

• PC Card (PCMCIA) 7.1 Standard

6023E/6024E/6025E User Manual xii ni.com

Introduction

This chapter describes the 6023E, 6024E, and 6025E devices, lists what
you need to get started, gives unpacking instructions, and describes the
optional software and equipment.

Features of the 6023E, 6024E, and 6025E

The 6025E features 16 channels (eight differential) of analog input,
two channels of analog output, a 100-pin connector, and 32 lines of digital
I/O. The 6024E features 16 channels of analog input, two channels of
analog output, a 68-pin connector and eight lines of digital I/O. The 6023E
is identical to the 6024E, except that it does not have analog output
channels.

These devices use the National Instruments DAQ-STC system timing
controller for time-related functions. The DAQ-STC consists of three
timing groups that control analog input, analog output, and general-purpose
counter/timer functions. These groups include a total of seven 24-bit and
three 16-bit counters and a maximum timing resolution of 50 ns. The
DAQ-STC makes possible such applications as buffered pulse generation,
equivalent time sampling, and seamless changing of the sampling rate.

1

♦ PCI-6023E, PCI-6024E, PCI-6025E, and PXI-6025E only

With many DAQ devices, you cannot easily synchronize several
measurement functions to a common trigger or timing event. These devices
have the Real-Time System Integration (RTSI) bus to solve this problem. In
a PCI system, the RTSI bus consists of the National Instruments RTSI bus
interface and a ribbon cable to route timing and trigger signals between
several functions on as many as five DAQ devices in your computer. In a
PXI system, the RTSI bus consists of the National Instruments RTSI bus
interface and the PXI trigger signals on the PXI backplane to route timing
and trigger signals between several functions on as many as seven DAQ
devices in your system.

© National Instruments Corporation 1-1 6023E/6024E/6025E User Manual

Chapter 1 Introduction

These devices can interface to an SCXI system—the instrumentation front
end for plug-in DAQ devices—so that you can acquire analog signals from
thermocouples, RTDs, strain gauges, voltage sources, and current sources.
You can also acquire or generate digital signals for communication and
control.

Using PXI with CompactPCI

Using PXI compatible products with standard CompactPCI products is an
important feature provided by PXI Specification, Revision 1.0. If you use a
PXI compatible plug-in card in a standard CompactPCI chassis, you cannot
use PXI-specific functions, but you can still use the basic plug-in card
functions. For example, the RTSI bus on your PXI E Series device is
available in a PXI chassis, but not in a CompactPCI chassis.

The CompactPCI specification permits vendors to develop sub-buses that
coexist with the basic PCI interface on the CompactPCI bus. Compatible
operation is not guaranteed between CompactPCI devices with different
sub-buses nor between CompactPCI devices with sub-buses and PXI.
The standard implementation for CompactPCI does not include these
sub-buses. Your PXI E Series device works in any standard CompactPCI
chassis adhering to PICMG CompactPCI 2.0 R2.1 core specification.

PXI specific features are implemented on the J2 connector of the
CompactPCI bus. Table 3-3, Pins Used by PXI E Series Device, lists the J2
pins used by your PXI E Series device. Your PXI device is compatible with
any Compact PCI chassis with a sub-bus that does not drive these lines.
Even if the sub-bus is capable of driving these lines, the PXI device is still
compatible as long as those pins on the sub-bus are disabled by default and
not ever enabled. Damage can result if these lines are driven by the sub-bus.

What You Need to Get Started

To set up and use your device, you need the following:

❑

One of the following devices:

– PCI-6023E

– PCI-6024E

– PCI-6025E

– PXI-6025E

– DAQCard-6024E

6023E/6024E/6025E User Manual 1-2 ni.com

6023E/6024E/6025E User Manual

❑

❑

One of the following software packages and documentation:

– LabVIEW for Windows

– Measurement Studio

– VirtualBench

❑

NI-DAQ for PC Compatibles

❑

Your computer equipped with one of the following:

– PCIbusforaPCIdevice

– PXI or CompactPCI chassis and controller for a PXI device

– Type II PCMCIA slot for a DAQCard device

Note

Read Chapter 2, Installation and Configuration, before installing your device.

Always install your software before installing your device.

Software Programming Choices

When programming your National Instruments DAQ and SCXI hardware,
you can use National Instruments application software or another
application development environment (ADE). In either case, you use
NI-DAQ.

Chapter 1 Introduction

National Instruments Application Software

LabVIEW features interactive graphics, a state-of-the-art user interface,
and a powerful graphical programming language. The LabVIEW Data
Acquisition VI Library, a series of virtual instruments for using LabVIEW
with National Instruments DAQ hardware, is included with LabVIEW. The
LabVIEW Data Acquisition VI Library is functionally equivalent to
NI-DAQ software.

Measurement Studio, which includes LabWindows/CVI, tools for Visual
C++, and tools for Visual Basic, is a development suite that allows you to
use ANSI C, Visual C++, and Visual Basic to design your test and
measurement software. For C developers, Measurement Studio includes
LabWindows/CVI, a fully integrated ANSI C application development
environment that features interactive graphics and the LabWindows/CVI
Data Acquisition and Easy I/O libraries. For Visual Basic developers,
Measurement Studio features a set of ActiveX controls for using National
Instruments DAQ hardware. These ActiveX controls provide a high-level

© National Instruments Corporation 1-3 6023E/6024E/6025E User Manual

Chapter 1 Introduction

programming interface for building virtual instruments. For Visual C++
developers, Measurement Studio offers a set of Visual C++ classes and
tools to integrate those classes into Visual C++ applications. The libraries,
ActiveX controls, and classes are available with Measurement Studio and
the NI-DAQ software.

VirtualBench features virtual instruments that combine DAQ products,
software, and your computer to create a stand-alone instrument with the
added benefit of the processing, display, and storage capabilities of your
computer. VirtualBench instruments load and save waveform data to disk
in the same forms that can be used in popular spreadsheet programs and
word processors.

Using LabVIEW, Measurement Studio, or VirtualBench software greatly
reduces the development time for your data acquisition and control
application.

NI-DAQ Driver Software

The NI-DAQ driver software shipped with your 6023E/6024E/6025E is
compatible with you device. It has an extensive library of functions that
you can call from your application programming environment. These
functions allow you to use all features of your 6023E/6024E/6025E.

NI-DAQ addresses many of the complex issues between the computer and
the DAQ hardware such as programming interrupts. NI-DAQ maintains a
consistent software interface among its different versions so that you can
change platforms with minimal modifications to your code. Whether you
are using LabVIEW, Measurement Studio, or other programming
languages, your application uses the NI-DAQ driver software, as illustrated
in Figure 1-1.

6023E/6024E/6025E User Manual 1-4 ni.com

Chapter 1 Introduction

Conventional

Programming Environment

DAQ or

SCXI Hardware

Figure 1-1.

The Relationship Between the Programming Environment,

NI-DAQ, and Your Hardware

NI-DAQ

Driver Software

LabVIEW,

Measurement Studio,

or VirtualBench

Personal

Computer or

Workstation

To download a free copy of the most recent version of NI-DAQ, click
Download Software at

ni.com

.

Optional Equipment

National Instruments offers a variety of products to use with your device,
including cables, connector blocks, and other accessories, as follows:

• Cables and cable assemblies, shielded and ribbon

• Connector blocks, shielded and unshielded screw terminals

• RTSI bus cables

• SCXI modules and accessories for isolating, amplifying, exciting, and

multiplexing signals for relays and analog output. With SCXI you can
condition and acquire up to 3,072 channels.

• Low channel count signal conditioning modules, devices, and
accessories, including conditioning for strain gauges and RTDs,
simultaneous sample and hold, and relays

© National Instruments Corporation 1-5 6023E/6024E/6025E User Manual

Chapter 1 Introduction

For more information about these products, refer to the National
Instruments catalogue or web site or call the office nearest you.

6023E/6024E/6025E User Manual 1-6 ni.com

Installation and Configuration

This chapter explains how to install and configure your 6023E, 6024E,
or 6025E device.

Software Installation

Install your software before installing your device.

If you are using LabVIEW, LabWindows/CVI, ComponentWorks, or
VirtualBench, install this software before installing the NI-DAQ driver
software. Refer to the software release notes of your software for
installation instructions.

If you are using NI-DAQ, refer to your NI-DAQ release notes. Find
the installation section for your operating system and follow the
instructions given there.

Unpacking

2

Your device is shipped in an antistatic package to prevent electrostatic
damage to the device. Electrostatic discharge can damage several
components on the device. To avoid such damage in handling the device,
take the following precautions:

• Ground yourself by using a grounding strap or by holding a grounded
object.

• Touch the antistatic package to a metal part of your computer chassis
before removing the device from the package.

• Remove the device from the package and inspect the device for
loose components or any other sign of damage. Notify National
Instruments if the device appears damaged in any way. Do not install
a damaged device into your computer.

Never touch the exposed pins of connectors.

© National Instruments Corporation 2-1 6023E/6024E/6025E User Manual

Chapter 2 Installation and Configuration

Hardware Installation

After installing your software, you are ready to install your hardware. Your
device will fit in any available slot in your computer. However, to achieve
best noise performance, leave as much room as possible between your
device and other devices. The following are general installation
instructions. Consult your computer user manual or technical reference
manual for specific instructions and warnings.

♦ PCI device installation

1. Turn off and unplug your computer.

2. Remove the top cover of your computer.

3. Remove the expansion slot cover on the back panel of the computer.

4. Touch any metal part of your computer chassis to discharge any static
electricity that might be on your clothes or body.

5. Insert the device into a 5 V PCI slot. Gently rock the device to ease it
into place. It may be a tight fit, but do not force the device into place.

6. Screw the mounting bracket of the device to the back panel rail of the
computer.

7. Visually verify the installation.

8. Replace the top cover of your computer.

9. Plug in and turn on your computer.

♦ PCMCIA card installation

Insert the DAQCard into any available Type II PCMCIA slot until the
connector is seated firmly. Insert the card face-up. It is keyed so that you
can only insert it one way.

♦ PXI device installation

1. Turn off and unplug your computer.

2. Choose an unused PXI slot in your system. For maximum
performance, the device has an onboard DMA controller that you can
only use if the device is installed in a slot that supports bus arbitration,
or bus master cards. National Instruments recommends installing the
device in such a slot. The PXI specification requires all slots to support
bus master cards, but the CompactPCI specification does not. If you
install in a CompactPCI non-master slot, you must disable the onboard
DMA controller of the device using software.

3. Remove the filler panel for the slot you have chosen.

6023E/6024E/6025E User Manual 2-2 ni.com

4. Touch any metal part of your computer chassis to discharge any static
electricity that might be on your clothes or body.

5. Insert the device into a 5 V PXI slot. Use the injector/ejector handle to
fully insert the device into the chassis.

6. Screw the front panel of the device to the front panel mounting rail of
the system.

7. Visually verify the installation.

8. Plug in and turn on your computer.

The device is installed. You are now ready to configure your hardware and
software.

Hardware Configuration

National Instruments standard architecture for data acquisition and
standard bus specifications, makes these devices completely
software-configurable. Youmust perform two types of configuration on the
devices—bus-related and data acquisition-related configuration.

The PCI devices are fully compatible with the industry-standard PCI Local

Bus Specification Revision 2.2. The PXI device is fully compatible with the
PXI Specification Revision 2.0. These specifications let your computer

automatically set the device base memory address and interrupt channel
without your interaction.

Chapter 2 Installation and Configuration

You can modify data acquisition-related configuration settings, such as
analog input range and mode, through application-level software. Refer to
Chapter 3, Hardware Overview, for more information about the various
settings available for your device. These settings are changed and
configured through software after you install your device. Refer to your
software documentation for configuration instructions.

© National Instruments Corporation 2-3 6023E/6024E/6025E User Manual

Hardware Overview

This chapter presents an overview of the hardware functions on your
device.

Figure 3-1 shows a block diagram for the PCI-6023E, PCI-6024E,
PCI-6025E, and PXI-6025E.

3

(8)

Analog
Input
Muxes

(8)

I/O Connector

DIO (24)

Voltage

REF

Calibration

Mux

PFI / Trigger

Timing

Digital I/O

DAC0

DAC1

Analog Output
(Not on 6023E)

Analog Mode
Multiplexer

AO Control

82C55A

Dither

Generator

Calibration DACs

Calibration

DACs

PGIA

(6025E Only)

Trigger
Interface

Counter/

Timing I/O

Digital I/O

DIO Control

Converter

Configuration

Memory

Analog Input

Timing/Control

DAQ - STC

Analog Output
Timing/Control

A/D

ADC
FIFO

AI Control

DMA/
Interrupt
Request

Bus

Interface

RTSI Bus

Interface

RTSI Connector

IRQ
DMA

EEPROM

Data

Analog

Input

Control

DAQ-STC

Bus

Interface

Analog
Output
Control

Generic

Bus

Interface

EEPROM

EEPROM

Control

DAQ - APE

Interface

Control

PCI

MINI-

Bus

MITE

Interface

Address/Data

DMA

Interface

Plug

and

Play

82C55

Bus

DIO

Control

Address

PCI Connector for PCI-602X, PXI Connector for PXI-6025E

Figure 3-1. PCI-6023E, PCI-6024E, PCI-6025E, and PXI-6025E Block Diagram

© National Instruments Corporation 3-1 6023E/6024E/6025E User Manual

Chapter 3 Hardware Overview

Figure 3-2 shows the block diagram for the DAQCard-6024E.

(8)

Analog

(8)

Muxes

I/O Connector

Voltage

REF

Calibration

Mux

PFI / Trigger

Digital I/O (8)

Mux Mode
Selection
Switches

Timing

DAC0

DAC1

Circuitry

6

Dither

Calibration

DACs

3

+
NI-PGIA

Gain
Amplifier

–

Calibration

DACs

12-Bit

Configuration

Trigger

Counter/

Timing I/O

Digital I/O

Memory

Analog Input

Timing/Control

DAQ - STC

Analog Output

Timing/Control

AO Control

Sampling

A/D

Converter

ADC
FIFO

AI Control

Interrupt
Request

Bus

Interface

RTSI Bus

Interface

Data (16)

IRQ

Figure 3-2. DAQCard-6024E Block Diagram

EEPROM

Analog

EEPROM

Input

Control

Control

DAQ-PCMCIA

DAQ-STC

Analog

Bus

Output

Interface

Control

Bus

Interface

PCMCIA Connector

Analog Input

The analog input section of each device is software configurable. The
following sections describe in detail each of the analog input settings.

Input Mode

The devices have three differentinput modes—nonreferenced single-ended
(NRSE), referenced single-ended (RSE), and differential (DIFF) input. The
single-ended input configurations provide up to 16 channels. The DIFF
input configuration provides up to eight channels. Input modes are
programmed on a per channel basis for multimode scanning. For example,
you can configure the circuitry to scan 12 channels—four DIFF channels
and eight RSE channels. Table 3-1 describes the three input configurations.

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Chapter 3 Hardware Overview

Input Range

Table 3-1.

Available Input Configurations

Configuration Description

DIFF A channel configured in DIFF mode uses two analog

input lines. One line connects to the positive input of
the programmable gain instrumentation amplifier
(PGIA) of the device, and the other connects to the
negative input of the PGIA.

RSE A channel configured in RSE mode uses one analog

input line, which connects to the positive input of the
PGIA. The negative input of the PGIA is internally
tied to analog input ground (AIGND).

NRSE A channel configured in NRSE mode uses one

analog input line, which connects to the positive
input of the PGIA. The negative input of the PGIA
connects to analog input sense (AISENSE).

For diagrams showing the signal paths of the three configurations, refer to
the Analog Input Signal Overview section in Chapter 4, Signal

Connections.

The devices have a bipolar input range that changes with the programmed
gain. You can program each channel with a unique gain of 0.5, 1.0, 10, or
100 to maximize the 12-bit analog-to-digital converter (ADC) resolution.
With the proper gain setting, you can use the full resolution of the ADC to
measure the input signal. Table 3-2 shows the input range and precision
according to the gain used.

Table 3-2.

Gain Input Range Precision

Measurement Precision

1

0.5 –10 to +10 V 4.88 mV

1.0 –5to+5V 2.44 mV

10.0 –500 to +500 mV 244.14 µV

100.0 –50 to +50 mV 24.41 µV

1

The value of 1 LSB of the 12-bit ADC; that is, the voltage increment corresponding to a

change of one count in the ADC 12-bit count.

Note: See Appendix A, Specifications, for absolute maximum ratings.

© National Instruments Corporation 3-3 6023E/6024E/6025E User Manual

Chapter 3 Hardware Overview

Dithering

When you enable dithering, you add approximately 0.5 LSB

rms

of white
Gaussian noise to the signal to be converted by the ADC. This addition is
useful for applications involving averaging to increase the resolution of
your device, as in calibration or spectral analysis. In such applications,
noise modulation is decreased and differential linearity is improved by the
addition of dithering. When taking DC measurements, such as when
checking the device calibration, enable dithering and average about
1,000 points to take a single reading. This process removes the effects of
quantization and reduces measurement noise, resulting in improved
resolution. For high-speed applications not involving averaging or spectral
analysis, you may want to disable dithering to reduce noise. Your software
enables and disables the dithering circuitry.

Figure 3-3 illustrates the effect of dithering on signal acquisition.
Figure 3-3a shows a small (±4 LSB) sine wave acquired with dithering off.
The ADC quantization is clearly visible. Figure 3-3b shows what happens
when 50 such acquisitions are averaged together; quantization is still
plainly visible. In Figure 3-3c, the sine wave is acquired with dithering on.
There is a considerable amount of visible noise, but averaging about 50
such acquisitions, as shown in Figure 3-3d, eliminates both the added noise
and the effects of quantization. Dithering has the effect of forcing
quantization noise to become a zero-mean random variable rather than a
deterministic function of the input signal.

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Chapter 3 Hardware Overview

LSBs

LSBs

6.0

6.0

4.0

4.0

2.0

2.0

0.0

0.0

-2.0

-2.0

-4.0

-4.0

-6.0

-6.0

100 200 300 4000 500

100 200 300 4000 500

a. Dither disabled; no averaging b. Dither disabled; average of 50 acquisitions

a. Dither disabled; no averaging b. Dither disabled; average of 50 acquisitions

LSBs

LSBs

6.0

6.0

4.0

4.0

2.0

2.0

0.0

0.0

-2.0

-2.0

-4.0

-4.0

-6.0

-6.0

100 200 300 4000 500

100 200 300 4000 500

c. Dither enabled; no averaging

c. Dither enabled; no averaging

LSBs

LSBs

6.0

6.0

4.0

4.0

2.0

2.0

0.0

0.0

-2.0

-2.0

-4.0

-4.0

-6.0

-6.0

LSBs

LSBs

6.0

6.0

4.0

4.0

2.0

2.0

0.0

0.0

-2.0

-2.0

-4.0

-4.0

-6.0

-6.0

d. Dither enabled; average of 50 acquisitions

d. Dither enabled; average of 50 acquisitions

100 200 300 4000 500

100 200 300 4000 500

100 200 300 4000 500

100 200 300 4000 500

Figure 3-3.

Dithering

Multichannel Scanning Considerations

The devices can scan multiple channels at the same maximum rate as their
single-channel rate; however, pay careful attention to the settling times for
each of the devices. No extra settling time is necessary between channels
as long as the gain is constant and source impedances are low. Refer to
Appendix A, Specifications, for a complete listing of settling times for each
of the devices.

When scanning among channels at various gains, the settling times can
increase. When the PGIA switches to a higher gain, the signal on the
previous channel can be well outside the new, smaller range. For instance,
suppose a 4 V signal connects to channel 0 and a 1 mV signal connects to
channel 1, and suppose the PGIA is programmed to apply a gain of one to
channel 0 and a gain of 100 to channel 1. When the multiplexer switches to
channel 1 and the PGIA switches to a gain of 100, the new full-scale range
is ±50 mV.

© National Instruments Corporation 3-5 6023E/6024E/6025E User Manual

Chapter 3 Hardware Overview

Analog Output

The approximately 4 V step from 4 V to 1 mV is 4,000% of the new
full-scale range. It can take as long as 100 µs for the circuitry to settle to
1 LSB after such a large transition. In general, this extra settling time is not
needed when the PGIA is switching to a lower gain.

Settling times can also increase when scanning high-impedance signals
due to a phenomenon called charge injection, where the analog input
multiplexer injects a small amount of charge into each signal source when
that source is selected. If the impedance of the source is not low enough,
the effect of the charge—a voltage error—has not decayed by the time the
ADC samples the signal. For this reason, keep source impedances under
1kΩ to perform high-speed scanning.

Due to the previously described limitations of settling times resulting from
these conditions, multiple-channel scanning is not recommended unless
sampling rates are low enough or it is necessary to sample several signals
as nearly simultaneously as possible. The data is much more accurate and
channel-to-channel independent if you acquire data from each channel
independently (for example, 100 points from channel 0, then 100 points
from channel 1, then 100 points from channel 2, and so on).

♦ 6025E and 6024E only

These devices supply two channels of analog output voltage at the I/O
connector. The bipolar range is fixed at ±10 V. Data written to the
digital-to-analog converter (DAC) is interpreted in two’s complement
format.

Analog Output Glitch

In normal operation, a DAC output glitches whenever it is updated with a
new value. The glitch energy differs from code to code and appears as
distortion in the frequency spectrum.

6023E/6024E/6025E User Manual 3-6 ni.com

Digital I/O

Chapter 3 Hardware Overview

The devices contain eight lines of digital I/O (DIO<0..7>) for
general-purpose use. You can individually software-configure each line for
either input or output. At system startup and reset, the digital I/O ports are
all high impedance.

The hardware up/down control for general-purpose counters 0 and 1 are
connected onboard to DIO6 and DIO7, respectively. Thus, you can use
DIO6 and DIO7 to control the general-purpose counters. The up/down
control signals are input only and do not affect the operation of the DIO
lines.

♦ 6025E only

The 6025E device uses an 82C55A programmable peripheral interface to
provide an additional 24 lines of digital I/O that represent three 8-bit
ports—PA, PB, PC. You can program each port as an input or output port.
The 82C55A has three modes of operation—simple I/O (mode 0), strobed
I/O (mode 1), and bidirectional I/O (mode 2). In modes 1 and 2, the three
ports are divided into two groups—group A and group B. Each group has
eight data bits, plus control and status bits from Port C (PC). Modes 1 and
2 use handshaking signals from the computer to synchronize data transfers.
Refer to Chapter 4, Signal Connections, for more detailed information.

Timing Signal Routing

The DAQ-STC chip provides a flexible interface for connecting timing
signals to other devices or external circuitry. Your device uses the RTSI
bus to interconnect timing signals between devices (PCI and PXI buses
only), and the programmable function input (PFI) pins on the I/O connector
to connect the device to external circuitry. These connections are designed
to enable the device to both control and be controlled by other devices and
circuits.

There are a total of 13 timing signals internal to the DAQ-STC that you can
control by an external source. You can also control these timing signals by
signals generated internally to the DAQ-STC, and these selections are fully
software-configurable. Figure 3-4 shows an example of the signal routing
multiplexer controlling the CONVERT* signal.

© National Instruments Corporation 3-7 6023E/6024E/6025E User Manual

Chapter 3 Hardware Overview

†

RTSI Trigger <0..6>

PFI<0..9>

Sample Interval Counter TC

GPCTR0_OUT

CONVERT*

†

PCI and PXI Buses Only

Figure 3-4. CONVERT* Signal Routing

Figure 3-4 shows that CONVERT* can be generated from a number of
sources, including the external signals RTSI<0..6> (PCI and PXI buses
only) and PFI<0..9> and the internal signals Sample Interval Counter TC
and GPCTR0_OUT.

On PCI and PXI devices, many of these timing signals are also available as
outputs on the RTSI pins, as indicated in the RTSI Triggers sectioninthis
chapter, and on the PFI pins, as indicated in Chapter 4, Signal Connections.

Programmable Function Inputs

Ten PFI pins are available on the device connector as PFI<0..9> and
connect to the internal signal routing multiplexer of the device for each
timing signal. Software can select any one of the PFI pins as the external
source for a given timing signal. It is important to note that you can use any
of the PFI pins as an input by any of the timing signals and that multiple
timing signals can use the same PFI simultaneously. This flexible routing

6023E/6024E/6025E User Manual 3-8 ni.com

scheme reduces the need to change physical connections to the I/O
connector for different applications.

You can also individually enable each of the PFI pins to output a specific
internal timing signal. For example, if you need the UPDATE* signal as an
output on the I/O connector, software can turn on the output driver for the
PFI5/UPDATE* pin.

Device and RTSI Clocks

♦ PCIandPXIbuses

Many device functions require a frequency timebase to generate the
necessary timing signals for controlling A/D conversions, DAC updates,
or general-purpose signals at the I/O connector.

These devices can use either its internal 20 MHz timebase or a timebase
received over the RTSI bus. In addition, if you configure the device to use
the internal timebase, you can also program the device to drive its internal
timebase over the RTSI bus to another device that is programmed to receive
this timebase signal. This clock source, whether local or from the RTSI bus,
is used directly by the device as the primary frequency source. The default
configuration at startup is to use the internal timebase without driving the
RTSI bus timebase signal. This timebase is software selectable.

Chapter 3 Hardware Overview

♦ PXI-6025E

The RTSI clock connects to other devices through the PXI trigger bus on
the PXI backplane. The RTSI clock signal uses the PXI trigger <7> line for
this connection.

RTSI Triggers

♦ PCIandPXIbuses

The seven RTSI trigger lines on the RTSI bus provide a very flexible
interconnection scheme for any device sharing the RTSI bus. These
bidirectional lines can drive any of eight timing signals onto the RTSI bus
and can receive any of these timing signals. This signal connection scheme
is shown in Figure 3-5 for PCI devices and Figure 3-6 for PXI devices.

© National Instruments Corporation 3-9 6023E/6024E/6025E User Manual

Chapter 3 Hardware Overview

Trigger

RTSI Bus Connector

Clock

DAQ-STC

TRIG1

TRIG2

CONVERT*

UPDATE*

WFTRIG

GPCTR0_SOURCE

GPCTR0_GATE

GPCTR0_OUT

7

RTSI Switch

switch

STARTSCAN

AIGATE

SISOURCE

UISOURCE

GPCTR1_SOURCE

GPCTR1_GATE

RTSI_OSC (20 MHz)

Figure 3-5. PCI RTSI Bus Signal Connection

6023E/6024E/6025E User Manual 3-10 ni.com

PXI Star (6)

PXI Trigger (0..5)

PXI Bus Connector

PXI Trigger (7)

RTSI Switch

switch

Chapter 3 Hardware Overview

DAQ-STC

TRIG1

TRIG2

CONVERT*

UPDATE*

WFTRIG

GPCTR0_SOURCE

GPCTR0_GATE

GPCTR0_OUT

STARTSCAN

AIGATE

SISOURCE

UISOURCE

GPCTR1_SOURCE

GPCTR1_GATE

RTSI_OSC (20 MHz)

Figure 3-6. PXI RTSI Bus Signal Connection

Table 3-3 lists the name and number of pins used by the PXI-6025E.

Table 3-3.

Pins Used by PXI E Series Device

PXI E Series

Signal

PXI Pin Name PXI J2 Pin Number

RTSI<0..5> PXI Trigger<0..5> B16, A16, A17, A18, B18, C18

RTSI 6 PXI Star D17

RTSI Clock PXI Trigger 7 E16

Reserved LBL<0..3> C20, E20, A19, C19

Reserved LBR<0..12> A21, C21, D21, E21, A20,

B20, E15, A3, C3, D3, E3,
A2, B2

Refer to the Timing Connections section of Chapter 4, Signal Connections,
for a description of the signals shown in Figures 3-5 and 3-6.

© National Instruments Corporation 3-11 6023E/6024E/6025E User Manual