National Instruments 5441 User Manual

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NI 5441 Specifications

NI PXI-5441 16-Bit 100 MS/s Arbitrary Waveform Generator with Onboard Signal Processing (OSP)

Unless otherwise noted, the following conditions were used for each specification:

• Analog Filter enabled.

• DAC Interpolation set to maximum allowed factor for a given sample rate.

• Signals terminated with 50 Ω.

• Direct Path set to 1 V and High-Gain Amplifier Path set to 12 V

• Sample clock set to 100 MS/s.

Typical values are representative of an average unit operating at room temperature (25 °C ± 3 °C). Specifications are subject to change without notice. For the most recent NI 5441 specifications, visit

ni.com/manuals.

To access all the NI 5441 documentation, including the NI Signal Generators Getting Started Guide, which contains functional descriptions

of the NI 5441 signals, navigate to Start»Programs»National Instruments»NI-FGEN»Documentation.

, Low-Gain Amplifier Path set to 2 V

pk-pk

Hot Surface If the NI 5441 has been in use, it may exceed safe handling temperatures and

cause burns. Allow the NI 5441 to cool before removing it from the chassis.

CH 0 ........................................................................................................ 2

Sample Clock .......................................................................................... 14

Onboard Clock ........................................................................................ 17

Phase-Locked Loop (PLL) Reference Clock .......................................... 17

CLK IN ...................................................................................................18

PFI 0 and PFI 1 .......................................................................................19

DIGITAL DATA & CONTROL (DDC) ................................................ 20

Start Trigger ............................................................................................ 22

Markers ................................................................................................... 24

Arbitrary Waveform Generation Mode ...................................................25

Function Generation Mode ......................................................................28

Onboard Signal Processing......................................................................29

Calibration ...............................................................................................38

Power .......................................................................................................38

Software...................................................................................................39

Environment ............................................................................................40

Safety, Electromagnetic Compatibility, and CE Compliance .................41

Physical....................................................................................................42

Technical Support Resources ..................................................................43

CH 0

(Channel 0 Analog Output, Front Panel Connector)

Specification Val ue Comments

Number of

1 —

Channels

Connector SMB (jack) —

Output Voltage Characteristics

Output Paths 1. The software-selectable Main Output Path setting

provides full-scale voltages from 12.00 V

5.64 mV

into a 50 Ω load. NI-FGEN uses either the

pk-pk

—

Low-Gain Amplifier or the High-Gain Amplifier when the Main Output Path is selected, depending on the Gain attribute.

2. The software-selectable Direct Path is optimized for IF applications and provides full-scale voltages from

DAC

1.000 V

16 bits —

to 0.707 V

pk-pk

Resolution

NI 5441 Specifications 2 ni.com

Specification Val ue Comments

Amplitude and Offset

Amplitude Range

Amplitude Resolution

Offset Range

Amplitude (V

) 1. Amplitude

pk-pk

values assume

Path Load

Direct 50 Ω 0.707 1.00

1kΩ 1.35 1.91

Minimum Value Maximum Value

the full scale of the DAC is utilized. If an amplitude smaller than

Open 1.41 2.00

the minimum value is

Low-

Gain

Amplifier

High-

Gain

Amplifier

50 Ω 0.00564 2.00

1kΩ 0.0107 3.81

Open 0.0113 4.00

50 Ω 0.0338 12.0

1kΩ 0.0644 22.9

desired, then waveforms less than full scale of the DAC can be used.

2. NI-FGEN compensates for user-

Open 0.0676 24.0

specified

3 digits —

Span of ±25% of Amplitude Range with increments <0.0014% of Amplitude Range.

Not available on the Direct Path.

Maximum Output Voltage

Maximum Output Vo l t a g e

Path Load Maximum Output Voltage (V

Direct 50 Ω ±0.500

1kΩ ±0.953

Open ±1.000

Low-

Gain

Amplifier

50 Ω ±1.000

1kΩ ±1.905

) The Maximum

pk-pk

Output Voltage of the NI 5441 is determined by the Amplitude Range and the Offset Range.

Open ±2.000

High-

Gain

Amplifier

50 Ω ±6.000

1kΩ ±11.43

Open ±12.00

Specification Val ue Comments

Accuracy

DC Accuracy For the Low-Gain or High-Gain Amplifier Path:

±0.2% of Amplitude ± 0.05% of Offset ± 500 µV (within ±10 °C of self-calibration temperature)

±0.4% of Amplitude ± 0.05% of Offset ± 1mV (0 °C to 55 °C)

For the Direct Path:

Gain Accuracy: ±0.2% (within ±10 °C of self-calibration temperature)

Gain Accuracy: ±0.4% (0 °C to 55 °C) DC Error: ±30 mV (0 °C to 55 °C)

AC Amplitude

±1.0% of Amplitude ± 1mV 50 kHz sine

Accuracy

Output Characteristics

Output

50 Ω nominal or 75 Ω nominal, software-selectable. —

Impedance

Load Impedance

Output amplitude is compensated for user-specified load impedances.

Compensation

Output

DC —

Coupling

All paths are calibrated for amplitude and gain errors. The Low-Gain and High-Gain Amplifier Paths also are calibrated for offset errors.

wave.

—

Output Enable

Software-selectable. When disabled, CH 0 out is terminated with a 1 W resistor with a value equal to the selected output

—

impedance.

Maximum Output Overload

The CH 0 output can be connected to a 50 Ω, ±12 V (±8 V for the Direct Path) source without sustaining any damage. No damage occurs if the CH 0 output is shorted to

—

ground indefinitely.

Waveform Summing

The CH 0 output supports waveform summing among similar paths—specifically, the outputs of multiple NI 5441

—

signal generators can be connected together.

NI 5441 Specifications 4 ni.com

Specification Val ue Comments

Frequency and Transient Response

Bandwidth 43 MHz Measured at

–3 dB.

DAC Digital Interpolation

Software-selectable Finite Impulse Response (FIR) filter. Available interpolation factors are 2, 4, or 8.

Filter

Analog Filter

Passband Flatness

Pulse Response

Software-selectable 7-pole elliptical filter for image suppression.

Path —

Direct Low-Gain

+0.6 dB to –0.4 dB 100 Hz to 40 MHz

+0.5 dB to –1.0 dB

100 Hz to 20 MHz

Amplifiers

High-Gain Amplifiers

+0.5 dB to –1.2 dB

100 Hz to 20 MHz

Path Analog Filter

Direct

Low-Gain

Amplifier

High-Gain

Amplifier

Rise/Fall Time <5 ns <8 ns <10 ns

Aberration <10% <5% <5%

Refer to the

Onboard Signal Processing

section for OSP Interpolation.

Available only on Low-Gain Amplifier and High-Gain Amplifier Paths.

and DAC Interpolation Filter disabled.

2.0

1.0

0.0

–1.0

–2.0

–3.0

–4.0

–5.0

–6.0

–7.0

–8.0

–9.0

–10.0

1.0M 10.0M 48.0M

Guaranteed Specification Typical

Frequency (Hz)

+0.3 dB

–0.4 dB

+0.4 dB

–0.4 dB

Figure 1. Normalized Passband Flatness, Direct Path

2.0

+0.6 dB

1.6

1.2

0.8

0.4

0.0

Amplitude (V)

–0.4

–0.8

–1.2

–1.6

–2.0

0.0 20.0n 40.0n 60.0n 80.0n 100.0n

Time (s)

Figure 2. Pulse Response, Low-Gain Amplifier Path 50

Ω Load

NI 5441 Specifications 6 ni.com

5.0

2.5

0.0

–2.5

–5.0

–7.5

–10.0

–12.5

dBm

–15.0

–17.5

–20.0

–22.5

–25.0

–27.5

–30.0

0.0 20.0M 40.0M 60.0M 80.0M 100.0M 120.0M 140.0M 160.0M 180.0M 200.0M

Frequency (Hz)

Figure 3. Frequency Response of Direct Path, 100 MS/s, 1x DAC Interpolation

Note

Above 50 MHz, the response is the image response.

Specification Val ue Comments

Suggested Maximum Frequencies for Common Functions

Function Path Disable the

Analog Filter and the DAC Interpolation Filter for Square,

Direct

Low-Gain

Amplifier

High-Gain

Amplifier

Sine 43 MHz 43 MHz 43 MHz

Ramp, and

Square Not recommended* 25 MHz 12.5 MHz

Triangle.

Ramp Not recommended* 5MHz 5MHz

* Direct Path is

Triangle Not recommended* 5MHz 5MHz

optimized for the frequency domain.

Spectral Characteristics

Signal to

Path Amplitude Noise and Distortion (SINAD)

Direct

Low-Gain

Amplifier

1MHz 64 dB 66 dB 63 dB

10 MHz 61 dB 60 dB 47 dB

20 MHz 57 dB 56 dB 42 dB

30 MHz 60 dB 62 dB 62 dB

40 MHz 60 dB 62 dB 62 dB

43 MHz 58 dB 60 dB 55 dB

High-Gain

Amplifier

–1 dBFS. Measured from DC to 50 MHz. SINAD at low amplitudes is limited by a –148 dBm/Hz noise floor.

NI 5441 Specifications 8 ni.com

Specification Val ue Comments

Spurious-Free

Path Amplitude Dynamic Range (SFDR) with Harmonics

Direct

Low-Gain

Amplifier

1MHz –76 dBc –71 dBc –58 dBc

10 MHz –68 dBc –64 dBc –47 dBc

20 MHz –60 dBc –57 dBc –42 dBc

30 MHz –73 dBc –73 dBc –74 dBc

40 MHz –76 dBc –73 dBc –74 dBc

43 MHz –78 dBc –75 dBc –59 dBc

SFDR without Harmonics

Direct

Path Amplitude

Low-Gain

Amplifier

1 MHz –88 dBFS –91 dBFS –91 dBFS

10 MHz –87 dBFS –89 dBFS –91 dBFS

20 MHz –80 dBFS –89 dBFS –89 dBFS

30 MHz –73 dBFS –73 dBFS –74 dBFS

40 MHz –76 dBFS –73 dBFS –74 dBFS

43 MHz –78 dBFS –75 dBFS –60 dBFS

High-Gain

Amplifier

High-Gain

Amplifier

–1 dBFS. Measured from DC to 50 MHz. Also called harmonic distortion. SFDR with harmonics at low amplitudes is limited by a –148 dBm/Hz noise floor. All values are typical and include aliased harmonics.

–1 dBFS. Measured from DC to 50 MHz. SFDR without harmonics at low amplitudes is limited by a –148 dBm/Hz noise floor. All values are typical and include aliased harmonics.

Specification Val ue Comments

0 ºC to 40 ºC

Path Amplitude Total Harmonic Distortion (THD)

Direct

Low-Gain

Amplifier

–77 dBc

20 kHz –77 dBc (typical)

(typical)

–70 dBc

1 MHz –75 dBc (typical)

(typical)

5 MHz –68 dBc –68 dBc –55 dBc

10 MHz –65 dBc –61 dBc –46 dBc

20 MHz –55 dBc –53 dBc –40 dBc

30 MHz –50 dBc –48 dBc –38 dBc

40 MHz –48 dBc –46 dBc –34 dBc

43 MHz –47 dBc –45 dBc –33 dBc

0 ºC to 55 ºC THD

Direct

Path Amplitude

Low-Gain

Amplifier

–76 dBc

20 kHz –76 dBc (typical)

(typical)

High-Gain

Amplifier

–77 dBc (typical)

–62 dBc (typical)

High-Gain

Amplifier

–76 dBc (typical)

–1 dBFS. Includes the 2 through the 6 harmonic.

–69 dBc

1 MHz –74 dBc (typical)

(typical)

–61 dBc (typical)

5 MHz –67 dBc –67 dBc –54 dBc

10 MHz –63 dBc –60 dBc –45 dBc

20 MHz –54 dBc –52 dBc –39 dBc

30 MHz –48 dBc –46 dBc –36 dBc

40 MHz –46 dBc –41 dBc –32 dBc

43 MHz –45 dBc –41 dBc –31 dBc

NI 5441 Specifications 10 ni.com

Specification Val ue Comments

Spectral Characteristics (Continued)

Average Noise Density

Path

Amplitude

Range

pk-pk

-----------

dBm dBm/Hz

Average

Noise Density

dBFS/

Direct 1 4.0 18 –142 –146.0

Low Gain 0.06 –20.4 9 –148 –127.6

Low Gain 0.1 –16.0 9 –148 –132.0

Low Gain 0.4 –4.0 13 –145 –141.0

Low Gain 1 4.0 18 –142 –146.0

Low Gain 2 10.0 35 –136 –146.0

High Gain 4 16.0 71 –130 –146.0

High Gain 12 25.6 213 –120 –145.6

Average Noise Density at small amplitudes is limited by a –148 dBm/Hz noise floor.

10.0

0.0

–10.0

–20.0

–30.0

–40.0

dBm

–50.0

–60.0

–70.0

–80.0

–90.0

0.0 25.0M 50.0M 75.0M 100.0M 125.0M 158.0M 175.0M 200.0M

Frequency (Hz)

Figure 4. 10 MHz Single-Tone Spectrum, Direct Path, 100 MS/s, DAC Interpolation Factor Set to 4

Note

The noise floor in Figure 4 is limited by the measurement device. Refer to the

Average Noise Density specifications.

NI 5441 Specifications 12 ni.com

20.0

10.0

0.0

–10.0

–20.0

–30.0

dBm

–40.0

–50.0

–60.0

–70.0

–80.0

–90.0

0.0 25.0M 50.0M 75.0M 100.0M 125.0M 150.0M 175.0M 200.0M

Frequency (Hz)

Figure 5. 10 MHz Single-Tone Spectrum, Low-Gain Amplifier Path, 100 MS/s, DAC Interpolation Factor Set to 4

Note

The noise floor in Figure 5 is limited by the measurement device. Refer to the

Average Noise Density specifications.

10.0

0.0

–10.0

–20.0

–30.0

–40.0

dBm

–50.0

–60.0

–70.0

–80.0

–90.0

0.0 25.0M 50.0M 75.0M 100.0M 125.0M 150.0M 175.0M 200.0M

Frequency (Hz)

Figure 6. Direct Path, 2-Tone Spectrum (Typical)

Note

The noise floor in Figure 6 is limited by the measurement device. Refer to the

Average Noise Density specifications.

Sample Clock

Specification Val ue Comments

Sources 1. Internal, Divide-by-N (N ≥ 1)

2. Internal, DDS-based, High-Resolution

3. External, CLK IN (SMB front panel connector)

4. External, DDC CLK IN (DIGITAL DATA & CONTROL front panel connector)

5. External, PXI Star trigger (backplane connector)

6. External, PXI_Trig<0..7> (backplane connector)

NI 5441 Specifications 14 ni.com

Refer to the

Onboard Clock

section for more information about internal clock sources.

Specification Val ue Comments

Sample Rate Range and Resolution

Sample Clock Source

Sample Rate Range Sample Rate Resolution

Divide-by-N 23.84 S/s to 100 MS/s Settable to (100 MS/s) / N

(1 ≤ N ≤ 4,194,304)

High

10 S/s to 100 MS/s 1.06 µHz

Resolution

CLK IN 200 kS/s to 105 MS/s Resolution determined by

DDC CLK IN 10 S/s to 105 MS/s

external clock source.

External Sample Clock duty

PXI Star

10 S/s to 105 MS/s

cycle tolerance 40% to 60%.

Trigger

PXI_Trig<0..7> 10 S/s to 20 MS/s

DAC Effective Sample Rate

Sample Rate

(MS/s)

DAC

Interpolation

Effective Sample

Rate

Factor

10 S/s to

105 MS/s

12.5 MS/s to 105 MS/s

10 MS/s to

100 MS/s

10 MS/s to

50 MS/s

1 (Off) 10 S/s to

105 MS/s

2 25 MS/s to

210 MS/s

4 40 MS/s to

400 MS/s

8 80 MS/s to

400 MS/s

—

DAC Effective Sample Rate = (DAC Interpolation Factor) × (Sample Rate)

Refer to the

Onboard Signal Processing

section for OSP Interpolation.

Sample Clock Delay Range and Resolution

Sample Clock Source

Delay Adjustment Range

Delay Adjustment

Resolution

—

Divide-by-N ±1 sample clock period <10 ps

HighResolution

±1 sample clock period Sample Clock

Period/16,384

External (all) 0 ns to 7.6 ns <15 ps

Specification Val ue Comments

System Phase Noise and Jitter (10 MHz Carrier)

Sample Clock Source

System Phase Noise

Density

(dBc/Hz) Offset

100 Hz 1 kHz 10 kHz

System Output Jitter

(Integrated from

100 Hz to 100 kHz)

Divide-by-N –110 –131 –137 <1.0 ps rms

HighResolution

–114 –126 –126 <4.0 ps rms

CLK IN –113 –132 –135 <1.1 ps rms

PXI Star

Trigger

External Sample Clock Input Jitter

–115 –118 –130 <3.0 ps rms

Cycle-Cycle Jitter ±300 ps

Period Jitter ±1 ns

Tolerance

Sample Clock Exporting

Exported Sample Clock Destinations

1. PFI<0..1> (SMB front panel connectors)

2. DDC CLK OUT (DIGITAL DATA & CONTROL front panel connector)

3. PXI_Trig<0..7> (backplane connector)

1. HighResolution specifications increase as the Sample Rate is decreased.

2. PXI Star trigger specification is valid when the Sample Clock Source is locked to PXI_CLK10.

—

Exported Sample Clocks can be divided by integer K (1 ≤ K ≤ 4,194,304).

Exported Sample Clock Destinations

Maximum Frequency

Jitter (Typical) Duty Cycle

PFI<0..1> 105 MHz PFI 0: 6 ps rms

25% to 65%

—

PFI 1: 12 ps rms

DDC CLK

105 MHz 40 ps rms 40% to 60%

OUT

PXI_Trig<0..7> 20 MHz — —

NI 5441 Specifications 16 ni.com

Onboard Clock

(Internal VCXO)

Specification Value Comments

Clock Source Internal sample clocks can either be locked to a Reference

Clock using a phase-locked loop or be derived from the onboard VCXO frequency reference.

Frequency Accuracy

±25 ppm —

—

Phase-Locked Loop (PLL) Reference Clock

Specification Value Comments

Sources 1. PXI_CLK10 (backplane connector)

2. CLK IN (SMB front panel connector)

Frequency Accuracy

Lock Time Typical: 70 ms.

When using the PLL, the Frequency Accuracy of the NI 5441 is solely dependent on the Frequency Accuracy of the PLL Reference Clock Source.

Maximum: 200 ms.

The PLL Reference Clock provides the reference frequency for the PLL.

—

Frequency Range

Duty Cycle Range

Exported PLL Reference Clock Destinations

5 MHz to 20 MHz in increments of 1 MHz. Default of 10 MHz.

The PLL Reference Clock Frequency has to be accurate to ±50 ppm.

40% to 60% —

1. PFI<0..1> (SMB front panel connectors)

2. PXI_Trig<0..7> (backplane connector)

—

CLK IN

(Sample Clock and Reference Clock Input, Front Panel Connector)

Specification Value Comments

Connector SMB (jack) —

Direction Input —

Destinations 1. Sample Clock

—

2. PLL Reference Clock

Frequency Range

1 MHz to 105 MHz (Sample Clock destination and sine waves)

—

200 kHz to 105 MHz (Sample Clock destination and square waves)

5 MHz to 20 MHz (PLL Reference Clock destination)

Input Voltage Range

Maximum

Sine wave: 0.65 V

pk-pk

to 2.8 V

pk-pk

into 50 Ω

—

(0 dBm to +13 dBm)

Square wave: 0.2 V

pk-pk

to 2.8 V

pk-pk

into 50 Ω

±10 V —

Input Overload

Input

50 Ω —

Impedance

Input Coupling AC —

NI 5441 Specifications 18 ni.com

PFI 0 and PFI 1

(Programmable Function Interface, Front Panel Connectors)

Specification Value Comments

Connectors Two SMB (jacks) —

Direction Bidirectional —

Frequency

DC to 105 MHz —

Range

As an Input (Trigger)

Destinations Start Trigger —

Maximum

–2 V to +7 V —

Input Overload

Input

2.0 V —

0.8 V —

1 kΩ —

Impedance

As an Output (Event)

Sources 1. Sample Clock divided by integer K (1 ≤ K ≤ 4,194,304)

—

2. Sample Clock Timebase (100 MHz) divided by integer M (2 ≤ M ≤ 4,194,304)

3. PLL Reference Clock

4. Marker

5. Exported Start Trigger (Out Start Trigger)

Output

50 Ω —

Impedance

Maximum

–2 V to +7 V — Output Overload

Minimum: 2.9 V (open load), 1.4 V (50 Ω load) Output drivers are

Maximum: 0.2 V (open load), 0.2 V (50 Ω load)

+3.3 V TTL compatible. Measured with a 1 m cable.

Rise/Fall Time ≤2.0 ns Load of 10 pF.

DIGITAL DATA & CONTROL (DDC)

Optional Front Panel Connector

Specification Value Comments

Connector Type

Number of Data Output Signals

Control Signals

Ground 23 pins —

Output Signal Characteristics (Includes Data Outputs, DDC CLK OUT, and PFI<4..5>)

Signal Type LVDS (Low-Voltage Differential Signal) —

Signal Characteristics

Differential Output Voltage

Output Common-Mode Vo l t a g e

Differential Pulse Skew (skew within a differential pair)

68-pin VHDCI female receptacle —

16 —

1. DDC CLK OUT (clock output)

2. DDC CLK IN (clock input)

3. PFI 2 (input)

4. PFI 3 (input)

5. PFI 4 (output)

6. PFI 5 (output)

Minimum Typical Maximum

— 1.3 V 1.7 V

0.8 V 1.0 V —

0.25 V — 0.45 V

1.125 V — 1.375 V

— — 0.6 ns

1. Tested with

2. Measured at

3. Load

4. Driver and

—

100 Ω differential load.

the front panel.

capacitance <15 pF.

receiver comply with ANSI/TIA/ EIA-644.

Rise/Fall Time — 0.5 ns 1.6 ns

NI 5441 Specifications 20 ni.com

Specification Value Comments

Output Signal Characteristics (Continued)

Output Skew Typical: 1 ns, maximum 2 ns. Skew between any

— two outputs on the DIGITAL DATA & CONTROL front panel connector.

Output Enable/Disable

Controlled through the software on all Data Output Signals and Control Signals collectively. When disabled, the outputs

—

go to a high-impedance state.

Maximum

–0.3 V to +3.9 V —

Output Overload

Input Signal Characteristics (Includes DDC CLK IN and PFI<2..3>)

Signal Type LVDS (Low-Voltage Differential Signal) —

Input

100 Ω —

Differential Impedance

Maximum

–0.3 V to +3.9 V —

Output Overload

Signal Characteristics

Differential

Minimum Maximum

0.1 V 0.5 V

—

Input Voltage

Input Common

0.2 V 2.2 V

Mode Voltage

DDC CLK OUT

Clocking Format

Frequency

Data outputs and markers change on the falling edge of

— DDC CLK OUT.

Refer to the Sample Clock section for more information. —

Range

Duty Cycle 40% to 60% —

Jitter 40 ps rms —

Specification Value Comments

DDC CLK IN

Clocking Format

Frequency Range

Input Duty Cycle Tolerance

Input Jitter Tolerances

DDC Data Output signals change on the rising edge of DDC CLK IN.

10 Hz to 105 MHz —

40% to 60% —

300 ps pk-pk of Cycle-Cycle Jitter, and 1 ns rms of Period Jitter.

—

Start Trigger

Specification Value Comments

Sources 1. PFI<0..1> (SMB front panel connectors)

2. PFI<2..3> (DIGITAL DATA & CONTROL front panel connector)

3. PXI_Trig<0..7> (backplane connector)

4. PXI Star trigger (backplane connector)

5. Software (use function call)

6. Immediate (does not wait for a trigger). Default.

—

Modes 1. Single

2. Continuous

3. Stepped

4. Burst

Edge Detection Rising —

Minimum Pulse Width

NI 5441 Specifications 22 ni.com

25 ns. Refer to the ts1 documentation in the NI Signal Generators Help by navigating to NI Signal Generators

Help»Devices»NI 5441»Triggering»Trigger Timing.

—

Specification Value Comments

Delay from Start Trigger to CH 0 Analog Output with OSP Disabled.

Delay from Start Trigger to Digital Data Output with OSP Disabled.

Additional Delay for Function Generator Mode.

Additional Delay with OSP Enabled.

DAC Interpolation Factor Typical Delay Refer to the t

Digital Interpolation Filter disabled.

2 58 Sample Clock

44 Sample Clock Periods + 110 ns

Periods + 110 ns

documentation in the NI Signal Generators Help by navigating to

NI Signal Generators

4 64 Sample Clock

Periods + 110 ns

8 65 Sample Clock

Periods + 110 ns

Help»Devices» NI 5441» Triggering» Trigger Timing.

40 Sample Clock periods + 110 ns. —

Add 33 Sample Clock Periods

—

(Applicable to Delay from Start Trigger to CH0 Analog Output and Delay from Start Trigger to Digital Data Output.)

Add 70 Sample Clock Periods for Real data processing mode

FIR and CIC filters enabled.

Add 73 Sample Clock Periods for Complex data processing mode.

(Applicable to Delay from Start Trigger to CH0 Analog Output and Delay from Start Trigger to Digital Data Output.)

Trigger Exporting

Exported Trigger Destinations

Exported Trigger Delay

A signal used as a trigger can be routed out to any destination listed in the Destinations specification of the

Markers section.

65 ns (typical). Refer to the ts3 documentation in the NI Signal Generators Help by navigating to NI Signal

—

Generators Help»Devices»NI 5441»Triggering»Trigger Timing.

Exported Trigger Pulse Width

>150 ns. Refer to the ts4 documentation in the NI Signal Generators Help by navigating to NI Signal Generators

Help»Devices»NI 5441»Triggering»Trigger Timing.

—

Markers

Specification Value Comments

Destinations 1. PFI<0..1> (SMB front panel connectors)

2. PFI<4..5> (DIGITAL DATA & CONTROL front panel connector)

3. PXI_Trig<0..6> (backplane connector)

Quantity One Marker per Segment. —

Quantum Marker position must be placed at an integer multiple of

four samples (two samples for Complex (IQ) data).

Width >150 ns. Refer to the tm2 documentation in the NI Signal

Generators Help by navigating to NI Signal Generators Help»Devices»NI 5441»Waveform Generation»Marker Events.

Skew

With Respect to

Destination

PFI<0..1> ±2 Sample Clock

PFI<4..5> N/A <2 ns

PXI_Trig<0..6> ±2 Sample Clock

Analog Output

Periods

With Respect to

Digital Data

Output

N/A

Refer to the tm1 documentation in the NI Signal Generators Help by navigating to

NI Signal Generators Help»Devices» NI 5441» Waveform Generation» Marker Events.

—

Jitter 20 ps rms —

NI 5441 Specifications 24 ni.com

Arbitrary Waveform Generation Mode

Specification Value Comments

Memory Usage The NI 5441 uses the Synchronization and Memory Core

(SMC) technology in which waveforms and instructions share onboard memory. Parameters, such as number of segments in sequence list, maximum number of waveforms in memory, and number of samples available for waveform storage, are flexible and user defined.

Onboard Memory Size

Output Modes Arbitrary Waveform mode and Arbitrary Sequence mode —

Arbitrary Waveform Mode

Arbitrary Sequence Mode

32 MB option: 33,554,432 bytes

In Arbitrary Waveform mode, a single waveform is selected from the set of waveforms stored in onboard memory and generated.

In Arbitrary Sequence mode, a sequence directs the NI 5441 to generate a set of waveforms in a specific order. Elements of the sequence are referred to as segments. Each segment is associated with a set of instructions. The instructions identify which waveform is selected from the set of waveforms in memory, how many loops (iterations) of the waveform are generated, and at which sample in the waveform a marker output signal is sent.

256 MB option: 268,435,456 bytes

512 MB option: 536,870,912 bytes

For more information, refer to the

NI Signal Generators Help

by navigating to

NI Signal Generators Help» Programming» NI-TClk Synchronization Help.

—

Specification Value Comments

Minimum Waveform Size (Samples)

Trigger Mode

Single 16 16

Arbitrary

Waveform Mode

Arbitrary

Sequence Mode

Continuous 16 96 @ >50 MS/s

32 @ ≤50 MS/s

Stepped 32 96 @ >50 MS/s

32 @ ≤50 MS/s

Burst 16 512 @ > 50 MS/s

256 @ ≤50 MS/s

Loop Count 1 to 16,777,215.

Burst trigger: Unlimited

Quantum Waveform size must be an integer multiple of four samples

(two samples for Complex (IQ) data).

Memory Limits

Arbitrary Waveform

32 MB Option 256 MB Option

16,777,088

Samples

134,217,600

Samples

512 MB Option All trigger modes

268,435,328

Samples Mode, Maximum Waveform Memory

The Minimum Waveform Size is sample rate dependent in Arbitrary Sequence mode.

For Co mplex (IQ) data Minimum Waveform Size is halved.

—

except where noted.

For Complex (IQ) data Maximum Wav eform Memory is halved.

Arbitrary Sequence Mode, Maximum Waveform Memory

16,777,008

Samples

134,217,520

Samples

268,435,200

Samples

Condition: One or two segments in a sequence.

For Complex (IQ) data Maximum Wav eform Memory is halved.

NI 5441 Specifications 26 ni.com

Specification Value Comments

Memory Limits (Continued)

Arbitrary Sequence Mode,

Burst trigger:

Maximum Waveforms

Arbitrary Sequence Mode,

Burst trigger:

Maximum Segments in a Sequence

Waveform Play Times

32 MB 256 MB 512 MB

Maximum Play

0.16 seconds 1.34 seconds 2.68 seconds Single Trigger Time, Sample Rate = 100 MS/s, OSP Disabled

Maximum Play

16 seconds 2 m i n u t e s a n d Time, IQ Rate = 1 MS/s, Real Mode, OSP Enabled

Maximum Play Time, IQ Rate

2 m i n u t e s a n d

47 seconds = 100 kS/s, Real Mode, OSP Enabled

262,000

32,000

418,000

262,000

2,097,000

Burst trigger:

262,000

3,354,000

Burst trigger:

2,090,000

14 seconds

2 2 m i n u t e s a n d

22 seconds

4,194,000

Burst trigger:

524,000

6,708,000

Burst trigger:

4,180,000

4 m i n u t e s a n d

28 seconds

4 4 m i n u t e s a n d

43 seconds

Condition: One or two segments in a sequence.

Condition: Waveform memory is <4,000 samples. (<2,000 samples for Complex (IQ) Data.)

Mode.

Play Times can be significantly extended by using Continuous, Stepped, or Burst Trigger Modes.

For Complex (IQ) Mode the Play Times are halved.

Function Generation Mode

Specification Value Comments

Standard Waveforms and Maximum Frequencies

Memory Size 65,536 Samples for 1/4 symmetric waveforms

(Example: Sine)

16, 384 Samples for non-1/4 symmetric waveforms (Example: Ramp)

Frequency Resolution

Phase Resolution

355 nHz —

0.0055º —

Wav eform Maximum Frequency —

Sine 43 MHz

Square 25 MHz

Triangle 5 MHz

Ramp Up 5 MHz

Ramp Down 5 MHz

DC —

Noise (Pseudo-Random) 5 MHz

User Defined 43 MHz

16-bit samples. User Defined Wav e forms must be exactly 16,384 samples.

NI 5441 Specifications 28 ni.com

Onboard Signal Processing

Waveform

Memory

Output Engine

Rate

Pre-Filter

Gain I

Pre-Filter

Gain Q

Pre-Filter

Offset I

Pre-Filter

Offset Q

I FIR

Q FIR

I CIC

Q CIC

Iφ Qφ

NCO

Digital

–

Gain

DAC

Interpolation

DAC

IQ Rate Rate Change

(OSP Interpolation)

Sample Rate Rate Change Effective

Sample Rate

Figure 7. Onboard Signal Processing Block Diagram

Specification Va lu e Comments

IQ Rate

OSP Interpolation Range

12 to 512 (Multiples of 2) 512 to 1,024 (Multiples of 4) 1,024 to 2,048 (Multiples of 8)

(OSP Interpolation = FIR Interpolation × CIC Interpolation)

Tota l NI PXI-5441 Interpolation = OSP Interpolation × DAC Interpolation.

IQ Rate Sample Rate/OSP Interpolation

(Lower IQ Rates are possible by either lowering the sample rate or doing software interpolation)

Example: For a Sample Rate of 100 MS/s, IQ Rate Range = 48.8 kS/s to

8.3 MS/s

Data Processing

1. Real (I path only)

2. Complex (IQ)

—

Modes

Pre-Filter Gain and Offset

Pre-Filter Gain

18 Bits — and Offset Resolution

Pre-Filter Gain Range

–2.0 to +2.0

(Values < |1| attenuate User Data)

Unitless

Specification Va lu e Comments

Pre-Filter Offset Range

Output Output = (User Data × Pre-Filter Gain) + Pre-Filter Offset

–1.0 to +1.0 Applied after

Pre-Filter Gain

Pre-Filter

(–1 ≤ Output ≤ +1)

Output

FIR (Finite Impulse Response) Filter

Filter Length 95 Taps The FIR Filter

Coefficient Width

Filter Symmetry

17 bits (–1 to +1)

Symmetric

is used to pulse shape the IQ Data and to compensate for the CIC Filter roll-off.

Interpolation

2, 4, or 8

Range

Coefficients Automatically generated by NI-FGEN (refer to FIR Filter

Types) or Custom Coefficients provided by the user

NI 5441 Specifications 30 ni.com

Specification Va lu e Comments

FIR Filter Types

Filter Type Parameter Minimum Maximum —

Custom — — — Coefficients

are provided by the user.

Flat Passband 0.1

0.43 Lowpass Filter that minimizes ripple to: IQ Rate × Passband.

Gaussian BT 0.1 0.9 —

Raised Cosine Alpha 0.1 0.9

Root Raised

Alpha 0.1 0.9

Cosine

CIC (Cascaded Integrator-Comb) Filter

Size 6 Stages The CIC Filter

Interpolation Range

6 ≤ Interpolation ≤ 256 (integers)

does the majority of the interpolation in the OSP.

NCO (Numerically Controlled Oscillator)

Frequency

1 mHz to (0.43 × Sample Rate) —

Range

Frequency Resolution

Sample Rate / 2

Example: 355 nHz with a Sample Rate of 100 MS/s

I and Q Phase

0.0055º —

Resolution

Phase Quantization

16 bits Look-Up

Table Address Width

Tuning Speed 1 ms —

Specification Va lu e Comments

Modulation Performance (Typical)

Modulation Configuration

GSM Physical

Layer

W-C DMA Physical

Layer

Measurement Type FIR Interpolation —

2 4 8

MER

46 dB 47 dB 42 dB Direct Path

(Modulation Error Ratio)

EVM (Error Vector Magnitude)

MER

<0.5 %

rms

<0.5 %

rms

<0.8 %

rms

46 dB 39 dB — Direct Path

(Modulation Error Ratio)

EVM (Error Vector Magnitude)

ACPR

<0.5 %

rms

<1.0 %

rms

65 dBc 68 dBc —

—

(Adjacent Channel Power Ratio) (External Sample Clock)

ACPR

61 dBc 61 dBc —

( 4 d B m P e a k ) , 25 MHz Carrier

( 4 d B m P e a k ) , 25 MHz Carrier, ACPR Measurement BW = 4 MHz & Channel Spacing = 5 MHz

(Adjacent Channel Power Ratio) (High-Resolution Sample Clock)

DVB Physical

Layer

MER (Modulation Error Ratio)

EVM (Error Vector Magnitude)

ACPR (Adjacent Channel Power Ratio) (External Sample Clock)

ACPR

43 dB — — Direct Path

( 4 d B m P e a k ) ,

<0.6 %

— —

rms

48 dBc — —

25 MHz Carrier, ACPR Measurement BW =

7.96 MHz & Channel Spacing =

47 dBc — —

8MHz

(Adjacent Channel Power Ratio) (High-Resolution Sample Clock)

OSP Enabled. IQ Rate = 1.083 MS/s, 4 Samples/Symbol. FIR Filter Type = Flat, Passband = 0.4. MSK modulation:

Software Pulse Shaping and Phase Accumulation, 270.833 kS/s, Gaussian, BT = 0.3. PN Sequence Order = 14.

OSP Enabled. IQ Rate = 3.84 MS/s, 1 Sample/Symbol. FIR Filter Type = Root Raised Cosine, Alpha = 0.22. QPSK.

PN Sequence Order = 15.

OSP Enabled. IQ Rate = 6.92 MS/s, 1 Sample/Symbol. FIR Filter Type = Root Raised Cosine, Alpha = 0.15. 32 QAM

Modulation. PN Sequence Order = 15.

NI 5441 Specifications 32 ni.com

Specification Value Comments

Digital Performance

Maximum

< –90 dBc Full-Scale Output

NCO Spur

FIR Interpolation

IQ Rate Range

(with 100 MS/s

Sample Clock

Rate)

2 195 kS/s to

8.33 MS/s

4 97.6 kS/s to

4.16 MS/s

8 48.8 kS/s to

2.08 MS/s

OSP Out of Band

Suppression

OSP Passband

Ripple

63 dB 0 to – 0.08 dB FIR Filter Type =

Flat. Passband =

74 dB 0 to – 0.08 dB

0.4. Ripple Measurement to

0.4 × IQ Rate.

40 dB 0 to –0.8 dB

Stop Band Suppression from

0.6 × IQ Rate.

—

Figure 8. GSM Physical Layer1

External Sample Clocking = 99.665 MHz

Figure 9. GSM Physical Layer

Internal (High Resolution) Sample Clocking = 99.665 MHz Additional artifacts are due to High Resolution Clock spurs.

OSP Enabled. Direct Path (4 dBm Peak). 25 MHz Carrier. IQ Rate = 1.083 MS/s, 4 Samples/Symbol. FIR Filter Type = Flat, Passband = 0.4. Software MSK modulation: 270.833 kS/s, Gaussian, BT = 0.3. PN Sequence Order = 14.

NI 5441 Specifications 34 ni.com

Figure 10. CDMA 2000 Physical Layer

External Sample Clocking = 98.304 MHz

Figure 11. CDMA 2000 Physical Layer

Internal (High Resolution) Sample Clocking = 98.304 MHz Additional artifacts are due to High Resolution Clock spurs.

OSP Enabled. Direct Path (4 dBm Peak). 25 MHz Carrier. IQ Rate = 1.2288 MS/s, 1 Sample/Symbol. FIR Filter Type = Custom Flat Filter with Passband = 0.48. QPSK. PN Sequence Order = 15.

Figure 12. W-CDMA Physical Layer

External Sample Clocking = 92.16 MHz

Figure 13. W-CDMA Physical Layer

Internal (High Resolution) Sample Clocking = 92.16 MHz Additional artifacts are due to High Resolution Clock spurs.

OSP Enabled. Direct Path (4 dBm Peak). 25 MHz Carrier. IQ Rate = 3.84 MS/s, 1 Sample/Symbol. FIR Filter Type = Root Raised Cosine, Alpha = 0.22. QPSK. PN Sequence Order = 15.

NI 5441 Specifications 36 ni.com

Figure 14. DVB Physical Layer

External Sample Clocking = 96.88 MHz Artifacts at 15 and 35 MHz are due to 2x FIR Interpolation aliasing.

Figure 15. DVB Physical Layer

Internal (High Resolution) Sample Clocking = 96.88 MHz Artifact at 10 MHz is due to CLK IN feed-through. Additional artifacts are due to High Resolution Clock spurs.

OSP Enabled. Direct Path (4 dBm Peak). 25 MHz Carrier. IQ Rate = 6.92 MS/s, 1 Sample/Symbol. FIR Filter Type = Root Raised Cosine, Alpha = 0.15. 32 QAM Modulation. PN Sequence Order = 15.

Calibration

Specification Value Comments

Self-Calibration An onboard, 24-bit ADC and precision voltage reference are

used to calibrate the DC gain and offset. The self-calibration is initiated by the user through the software and takes approximately 75 seconds to complete.

External Calibration

Calibration Interval

Warm-up Time 15 minutes —

The External Calibration calibrates the VCXO, voltage reference, output impedance, DC gain, and offset. Appropriate constants are stored in nonvolatile memory.

Specifications valid within 2 years of External Calibration. —

—

Power

Specification Typical Operation Overload Operation Comments

+3.3 VDC 1.9 A 2.7 A Typical.

+5 VDC 2.2 A 2.4 A

+12 VDC 0.46 A 0.5 A

–12 VDC 0.01 A 0.01 A

Total Power 22.9 W 27.0 W

Overload operation occurs when CH 0 is shorted to ground.

NI 5441 Specifications 38 ni.com

Software

Specification Value Comments

Driver Software

Application Software

Interactive Control and Configuration Software

NI-FGEN 2.3 or later version. NI-FGEN is an IVI-compliant driver that allows you to configure, control, and calibrate the NI 5441. NI-FGEN provides application programming interfaces for many development environments.

NI-FGEN provides programming interfaces for the following application development environments:

•LabVIEW

™

• LabWindows

• Measurement Studio

• Microsoft Visual C++ .NET

• Microsoft Visual C/C++

• Microsoft Visual Basic

NI provides several options for interactively controlling and configuring the NI 5441:

• NI Signal Express

• FGEN Soft Front panel

• NI Measurement & Automation Explorer (MAX)

/CVI

™

—

Environment

NI PXI-5441 Environment

Note To ensure that the NI PXI-5441 cools effectively, follow the guidelines in the

Maintain Forced-Air Cooling Note to Users included in the NI 5441 kit. The NI PXI-5441 is intended for indoor use only.

Specifications Val ue Comments

Operating Temperature

Storage Temperature

Operating Relative Humidity

Storage Relative Humidity

Operating Shock

Storage Shock 50 g, half-sine, 11 ms pulse. Meets IEC-60068-2-27. Test

Operating Vibration

0 ºC to +55 ºC in all NI PXI chassis except the following:

0 ºC to +45 ºC when installed in an NI PXI-101x or NI PXI-1000B chassis.

Meets IEC-60068-2-1 and IEC-60068-2-2.

–25 ºC to +85 ºC. Meets IEC-60068-2-1 and IEC-60068-2-2.

10% to 90%, noncondensing. Meets IEC-60068-2-56. —

5% to 95%, noncondensing. Meets IEC-60068-2-56. —

30 g, half-sine, 11 ms pulse. Meets IEC-60068-2-27. Test profile developed in accordance with MIL-PRF-28800F.

profile developed in accordance with MIL-PRF-28800F.

5 Hz to 500 Hz, 0.31 g

. Meets IEC-60068-2-64. Spectral and jitter

rms

—

Spectral and jitter specifications could degrade.

—

specifications could degrade.

Storage Vibration

Altitude 2,000 meter maximum (at 25 °C ambient temperature) —

Pollution Degree

NI 5441 Specifications 40 ni.com

5 Hz to 500 Hz, 2.46 g profile exceeds requirements of MIL-PRF-28800F, Class B.

2 —

. Meets IEC-60068-2-64. Test

rms

—

Safety, Electromagnetic Compatibility, and CE Compliance

Specification Va lu e Comments

Safety The NI 5441 meets the requirements of the

following standards of safety for electrical equipment for measurement, control, and laboratory use:

• IEC 61010-1, EN 61010-1

• UL 61010-1

• CAN/CSA-C22.2 No. 61010-1

Emissions EN 55011 Class A at 10 m

FCC Part 15A above 1 GHz

Immunity EN 61326:1997 + A2:2001, Table 1 —

EMC/EMI CE, C-Tick, and FCC Part 15 (Class A) Compliant.

For EMC compliance, operate this device with shielded cabling.

This product meets the essential requirements of applicable European Directives, as amended for CE marking, as follows:

Low-Voltage Directive (safety)

Electromagnetic Compatibility Directive (EMC)

73/23/EEC —

89/336/EEC —

For UL and other safety certifications, refer to the product label or visit

ni.com/

certification

—

Note: Refer to the Declaration of Conformity (DoC) for this product for any additional regulatory compliance information. To obtain the DoC for this product, visit search by model number or product line, and click the appropriate link in the Certification column.

ni.com/certification,

Physical

Specification Value Comments

Dimensions 3U, One Slot, PXI/cPCI Module

2.0 × 13.0 × 21.6 cm (0.8 × 5.1 × 8.5 in)

Weight 345 g (12.1 oz) —

Front Panel Connectors

Label Function(s) Connector Type —

CH 0 Analog Output SMB (jack)

CLK IN Sample clock input and PLL

reference clock input.

PFI 0 Marker output, trigger input,

sample clock output, exported trigger output, and PLL reference clock output.

PFI 1 Marker output, trigger input,

sample clock output, exported trigger output, and PLL reference clock output.

DIGITAL DATA & CONTROL

Digital data output, trigger input, exported trigger output, markers, external sample clock input, and sample clock output.

SMB (jack)

68-pin VHDCI female receptacle

—

Front Panel LED Indicators

Label Function For more

ACCESS LED The ACCESS LED indicates the status of the PCI bus and

the interface from the NI 5441 to the controller.

ACTIVE LED The ACTIVE LED indicates the status of the onboard

generation hardware of the NI 5441.

Included Cable

1 (NI part number 763541-01), 50 Ω, BNC Male to SMB Plug, RG223/U, Double Shielded, 1 m cable.

NI 5441 Specifications 42 ni.com

information, refer to the NI Signal

Generators Help.

—

Technical Support Resources

NI Web Support

National Instruments Web support is your first stop for help in solving installation, configuration, and application problems and questions. Online problem-solving and diagnostic resources include frequently asked questions, knowledge bases, product-specific troubleshooting wizards, manuals, drivers, software updates, and more. Web support is available through the Technical Support section of

Worldwide Support

National Instruments corporate headquarters is located at 11500 North Mopac Expressway, Austin, Texas, 78759-3504. National Instruments also has offices located around the world to help address your support needs. You can access our branch office Web sites from the Worldwide Offices section of provide up-to-date contact information, support phone numbers, email addresses, and current events.

If you have searched the technical support resources on our Web site and still cannot find the answers you need, contact your local office or National Instruments corporate. For telephone support in the United States, dial 512 795 8248. For telephone support outside the United States, contact your local branch office:

ni.com.

ni.com. Branch office Web sites

Australia 1800 300 800, Austria 43 0 662 45 79 90 0, Belgium32027570020, Brazil551132623599, Canada 800 433 3488, China 86 21 6555 7838, Czech Republic 420 224 235 774, Denmark 45 45 76 26 00, Finland3850972572511, France330148142424, Germany 49 0 89 741 31 30, India 91 80 51190000, Israel 972 0 3 6393737, Italy 39 02 413091, Japan 81 3 5472 2970, Korea820234513400, Lebanon96101332828, Malaysia 1800 887710, Mexico 01 800 010 0793, Netherlands 31 0 348 433 466, New Zealand 0800 553 322, Norway 47 0 66 90 76 60, Poland 48 22 3390150, Portugal 351 210 311 210, Russia 7 095 783 68 51, Singapore 1800 226 5886, Slovenia 386 3 425 4200, South Africa 27 0 11 805 8197, Spain 34 91 640 0085, Sweden460858789500, Switzerland41562005151, Taiwan 886 02 2377 2222, Thailand 662 992 7519, United Kingdom 44 0 1635 523545

National Instruments, NI, ni.com, and LabVIEW are trademarks of National Instruments Corporation. Refer to the Terms of Use section on ni.com/legal for more information about National Instruments trademarks. Other product and company names mentioned herein are trademarks or trad e names of their respective companies. For patents covering National Instruments products, refer to the appropriate location: Help»Patents in your software, the patents.txt file on your CD, or ni.com/patents.

373846A-01 Feb05

National Instruments 5441 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

NI 5441 Specifications

Contents

CH 0

Figure 1. Normalized Passband Flatness, Direct Path

Figure 3. Frequency Response of Direct Path, 100 MS/s, 1x DAC Interpolation

Figure 4. 10 MHz Single-Tone Spectrum, Direct Path, 100 MS/s, DAC Interpolation Factor Set to 4

Figure 5. 10 MHz Single-Tone Spectrum, Low-Gain Amplifier Path, 100 MS/s, DAC Interpolation Factor Set to 4

Figure 6. Direct Path, 2-Tone Spectrum (Typical)

Sample Clock

Onboard Clock

Phase-Locked Loop (PLL) Reference Clock

CLK IN

PFI 0 and PFI 1

DIGITAL DATA & CONTROL (DDC)

Start Trigger

Markers

Arbitrary Waveform Generation Mode

Function Generation Mode

Onboard Signal Processing

Figure 7. Onboard Signal Processing Block Diagram

Calibration

Power

Software

Environment

NI PXI-5441 Environment

Safety, Electromagnetic Compatibility, and CE Compliance

Physical

Technical Support Resources

NI Web Support

Worldwide Support