National Instruments 320030-01 User Manual

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GPIB-1014

User Manual

March 1997 Edition

Part Number 320030-01

National Instruments Corporate Headquarters

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Limited Warranty

The GPIB-1014 is warranted against defects in materials and workmanship for a period of two years from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.

The media on which you receive National Instruments software are warranted not to fail to execute programming instructions, due to defects in materials and workmanship, for a period of 90 days from date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period. National Instruments does not warrant that the operation of the software shall be uninterrupted or error free.

A Return Material Authorization (RMA) number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work. National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty.

National Instruments believes that the information in this manual is accurate. The document has been carefully reviewed for technical accuracy. In the event that technical or typographical errors exist, National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition. The reader should consult National Instruments if errors are suspected. In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it.

EXCEPT AS SPECIFIED HEREIN, NATIONAL INSTRUMENTS MAKES NO WARRANTIES, EXPRESS OR IMPLIED,

AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OF

NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA, PROFITS,

USE OF PRODUCTS, OR INCIDENTAL OR CONSEQUENTIAL DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY THEREOF

whether in contract or tort, including negligence. Any action against National Instruments must be brought within one year after the cause of action accrues. National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control. The warranty provided herein does not cover damages, defects, malfunctions, or service failures caused by owner's failure to follow the National Instruments installation, operation, or maintenance instructions; owner's modification of the product; owner's abuse, misuse, or negligent acts; and power failure or surges, fire, flood, accident, actions of third parties, or other events outside reasonable control.

. CUSTOMER'S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART

NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER.

. This limitation of the liability of National Instruments will apply regardless of the form of action,

Copyright

Under the copyright laws, this publication may not be reproduced or transmitted in any form, electronic or mechanical, including photocopying, recording, storing in an information retrieval system, or translating, in whole or in part, without the prior written consent of National Instruments Corporation.

Trademarks

NI-488M™ is a trademark of National Instruments Corporation. Product and company names listed are trademarks or trade names of their respective companies.

Warning Regarding Medical and Clinical Use

of National Instruments Products

National Instruments products are not designed with components and testing intended to ensure a level of reliability suitable for use in treatment and diagnosis of humans. Applications of National Instruments products involving medical or clinical treatment can create a potential for accidental injury caused by product failure, or by errors on the part of the user or application designer. Any use or application of National Instruments products for or involving medical or clinical treatment must be performed by properly trained and qualified medical personnel, and all traditional medical safeguards, equipment, and procedures that are appropriate in the particular situation to prevent serious injury or death should always continue to be used when National Instruments products are being used. National Instruments products are NOT intended to be a substitute for any form of established process, procedure, or equipment used to monitor or safeguard human health and safety in medical or clinical treatment.

FCC/DOC Radio Frequency Interference Compliance

This equipment generates and uses radio frequency energy and, if not installed and used in strict accordance with the instructions in this manual, may cause interference to radio and television reception. This equipment has been tested and found to comply with the following two regulatory agencies:

Federal Communications Commission

This device complies with Part 15 of the Federal Communications Commission (FCC) Rules for a Class A digital device. Operation is subject to the following two conditions:

1. This device may not cause harmful interference in commercial environments.

2. This device must accept any interference received, including interference that may cause undesired operation.

Canadian Department of Communications

This device complies with the limits for radio noise emissions from digital apparatus set out in the Radio Interference Regulations of the Canadian Department of Communications (DOC).

Le présent appareil numérique n’émiet pas de bruits radioélectriques dépassant les limites applicables aux appareils numériques de classe A prescrites dans le réglement sur le brouillage radioélectrique édicté par le ministére des communications du Canada.

Instructions to Users

These regulations are designed to provide reasonable protection against harmful interference from the equipment to radio reception in commercial areas. Operation of this equipment in a residential area is likely to cause harmful interference, in which case the user will be required to correct the interference at his own expense.

There is no guarantee that interference will not occur in a particular installation. However, the chances of interference are much less if the equipment is installed and used according to this instruction manual.

If the equipment does cause interference to radio or television reception, which can be determined by turning the equipment on and off, one or more of the following suggestions may reduce or eliminate the problem.

• Operate the equipment and the receiver on different branches of your AC electrical system.

• Move the equipment away from the receiver with which it is interfering.

• Reorient or relocate the receiver’s antenna.

• Be sure that the equipment is plugged into a grounded outlet and that the grounding has not been defeated with a cheater plug.

Notice to user: Changes or modifications not expressly approved by National Instruments could void the user’s

authority to operate the equipment under the FCC Rules.

If necessary, consult National Instruments or an experienced radio/television technician for additional suggestions. The following booklet prepared by the FCC may also be helpful: How to Identify and Resolve Radio-TV Interference Problems. This booklet is available from the U.S. Government Printing Office, Washington, DC 20402, Stock Number 004-000-00345-4.

Contents

About This Manual............................................................................................................ xiii

Organization of This Manual ........................................................................................ xiii

Conventions Used in This Manual ................................................................................ xiv

Related Documentation ................................................................................................. xiv

Customer Communication............................................................................................. xv

Chapter 1 Introduction

What Your Kit Should Contain..................................................................................... 1-3

Optional Equipment ...................................................................................................... 1-3

Unpacking ..................................................................................................................... 1-4

Chapter 2 General Description

Electrical Characteristics............................................................................................... 2-1

VMEbus Characteristics................................................................................................ 2-2

Data Transfer Features .................................................................................................. 2-7

GPIB-1014 Functional Description............................................................................... 2-8

.......................................................................................................................... 1-1

........................................................................................................... 2-1

VMEbus Slave-Addressing ............................................................................... 2-2

VMEbus Slave-Data.......................................................................................... 2-3

VMEbus Master-Direct Memory Access.......................................................... 2-5

Interrupter.......................................................................................................... 2-6

Data Transfer Bus (DTB) Requester................................................................. 2-7

VMEbus Modules Not Provided ........................................................... 2-7

Diagnostic Aids ................................................................................................. 2-7

Programmed I/O Transfers................................................................................ 2-8

Chapter 3 Configuration and Installation

Configuration................................................................................................................. 3-1

Access Mode ..................................................................................................... 3-3

Base Address ..................................................................................................... 3-3

Set Base Address Using Jumper Block W1 .......................................... 3-4

Set Base Address Using Compare Address Lines................................. 3-4

DMA Address Modifier Code Output............................................................... 3-5

Other Configuration Parameters........................................................................ 3-7

Installation..................................................................................................................... 3-7

Verification of System Compatibility ............................................................... 3-7

Cabling .............................................................................................................. 3-10

Verification Testing........................................................................................... 3-10

...................................................................................... 3-1

Chapter 4 Register Bit Descriptions

Register Map ................................................................................................................. 4-1

................................................................................................. 4-1

Contents

Interface Registers......................................................................................................... 4-3

Data In Register (DIR) ...................................................................................... 4-6

Command/Data Out Register (CDOR).............................................................. 4-7

Interrupt Status Register 1 (ISR1)..................................................................... 4-8

Interrupt Mask Register 1 (IMR1)..................................................................... 4-8

Interrupt Status Register 2 (ISR2)..................................................................... 4-14

Interrupt Mask Register 2 (IMR2)..................................................................... 4-14

Serial Poll Status Register (SPSR) .................................................................... 4-19

Serial Poll Mode Register (SPMR) ................................................................... 4-19

Address Status Register (ADSR) ...................................................................... 4-20

Address Mode Register (ADMR)...................................................................... 4-22

Command Pass Through Register (CPTR) ....................................................... 4-25

Auxiliary Mode Register (AUXMR) ................................................................ 4-27

Hidden Registers ............................................................................................... 4-33

Internal Counter Register (ICR)............................................................ 4-34

Parallel Poll Register (PPR) .................................................................. 4-35

Auxiliary Register A (AUXRA)............................................................ 4-37

Auxiliary Register B (AUXRB)............................................................ 4-39

Auxiliary Register E (AUXRE) ............................................................ 4-41

Address Register 0 (ADR0) .............................................................................. 4-42

Address Register (ADR) ................................................................................... 4-43

Address Register 1 (ADR1) .............................................................................. 4-44

End of String Register (EOSR) ......................................................................... 4-45

DMA Registers.............................................................................................................. 4-46

Address Registers.............................................................................................. 4-48

Transfer Count Registers................................................................................... 4-48

Function Code Registers ................................................................................... 4-50

Device Control Register .................................................................................... 4-51

Operation Control Register ............................................................................... 4-53

Sequence Control Register ................................................................................ 4-55

Channel Control Register .................................................................................. 4-56

Channel Status Register..................................................................................... 4-58

Channel Error Register...................................................................................... 4-60

Channel Priority Register .................................................................................. 4-61

Interrupt Vector Registers ................................................................................. 4-62

General Control Register................................................................................... 4-63

Configuration Registers..................................................................................... 4-64

Configuration Register 1 (CFG1).......................................................... 4-64

Configuration Register 2 (CFG2).......................................................... 4-66

Chapter 5 Programming Considerations

Initialization................................................................................................................... 5-1

The GPIB-1014 as GPIB Controller ............................................................................. 5-3

Becoming Controller-In-Charge (CIC) and Active Controller ......................... 5-3

Sending Remote Multiline Messages (Commands) .......................................... 5-4

Going from Active to Standby Controller......................................................... 5-4

GPIB-1014 User Manual viii © National Instruments Corporation

........................................................................................ 5-1

Contents

Going from Standby to Active Controller......................................................... 5-4

Going from Active to Idle Controller................................................................ 5-5

The GPIB-1014 as GPIB Talker and Listener............................................................... 5-6

Programmed Implementation of Talker and Listener ....................................... 5-6

Addressed Implementation of the Talker and Listener ..................................... 5-6

Address Mode 1..................................................................................... 5-6

Address Mode 2..................................................................................... 5-6

Address Mode 3..................................................................................... 5-7

Sending/Receiving Messages........................................................................................ 5-8

Using Direct Memory Access ........................................................................... 5-8

DMA Transfers without the Carry Cycle.............................................. 5-10

DMA Transfers with the Carry Cycle ................................................... 5-13

Polling During DMAs ........................................................................... 5-17

Sending END or EOS............................................................................ 5-17

Terminating the Transfer and Checking the Result............................... 5-17

Terminating on END or EOS ................................................................ 5-19

Using Programmed I/O ..................................................................................... 5-19

Sending and Receiving Data ................................................................. 5-19

Sending END or EOS............................................................................ 5-20

Terminating on END or EOS ................................................................ 5-20

Interrupts ....................................................................................................................... 5-20

Serial Polls..................................................................................................................... 5-22

Conducting a Serial Poll.................................................................................... 5-22

Responding to a Serial Poll ............................................................................... 5-22

Parallel Polls.................................................................................................................. 5-22

Conducting a Parallel Poll................................................................................. 5-23

Responding to a Parallel Poll ............................................................................ 5-24

Chapter 6 Theory of Operation

VMEbus Interface ......................................................................................................... 6-1

Data Lines.......................................................................................................... 6-1

Slave Read and Write Transfers............................................................ 6-1

DMA Transfers...................................................................................... 6-1

Control Signals.................................................................................................. 6-2

Address.............................................................................................................. 6-2

Control Equations of Transceivers.................................................................... 6-3

Address Decoding ......................................................................................................... 6-3

Clock and Reset Circuitry ............................................................................................. 6-4

Configuration Registers................................................................................................. 6-5

Configuration Register 1 ................................................................................... 6-5

Configuration Register 2 ................................................................................... 6-6

Timing State Machine ................................................................................................... 6-6

Slave Cycles ...................................................................................................... 6-6

DMA Cycles...................................................................................................... 6-7

DMA Gating and Control.............................................................................................. 6-7

Interrupter...................................................................................................................... 6-9

DTB Requester and Controller...................................................................................... 6-9

GPIB Synchronization and Interrupt Control................................................................ 6-12

.......................................................................................................... 6-1

Contents

68450 DMAC................................................................................................................ 6-14

DMAC Channel Operation................................................................................ 6-15

Initialization and Transfer Phases ......................................................... 6-15

Device (TLC)/DMAC Communication..................................... 6-15

DMA Requests ........................................................................ 6-16

Data Transfers ........................................................................... 6-16

Operands and Addressing.......................................................... 6-17

Address Register Operation....................................................... 6-17

Transfer Count Register Operation ........................................... 6-17

Initiation and Control of Channel Operation......................................... 6-18

Initiating the Operation ............................................................. 6-18

The Continue Mode of Operation ............................................. 6-18

Halt ............................................................................................ 6-18

Software Abort .......................................................................... 6-18

Interrupt Enable......................................................................... 6-19

Block Termination................................................................................. 6-19

Multiple Block Operations ........................................................ 6-19

Continued Operations................................................................ 6-19

Array Chaining Operations ....................................................... 6-19

Linked Chaining Operations ..................................................... 6-20

Error Conditions........................................................................ 6-21

GPIB Interface............................................................................................................... 6-23

Test and Troubleshooting.............................................................................................. 6-24

DMA Stand-Alone Testing ............................................................................... 6-24

GPIB Interface Testing...................................................................................... 6-24

Chapter 7 Diagnostic and Troubleshooting Test Procedures

Interpreting Test Procedures ......................................................................................... 7-1

GPIB-1014 Hardware Installation Tests ....................................................................... 7-2

Appendix A Hardware Specifications

.................................................................................................. A-1

Appendix B Parts List and Schematic Diagrams

............................................................................. B-1

Appendix C Sample Programs

............................................................................................................... C-1

Appendix D Multiline Interface Messages

......................................................................................... D-1

Appendix E Operation of the GPIB

Types of Messages ........................................................................................................ E-1

Talkers, Listeners, and Controllers................................................................................ E-1

The Controller-In-Charge and System Controller......................................................... E-2

GPIB Signals and Lines ................................................................................................ E-2

...................................................................................................... E-1

.................................................. 7-1

GPIB-1014 User Manual x © National Instruments Corporation

Data Lines.......................................................................................................... E-2

Handshake Lines ............................................................................................... E-2

NRFD (not ready for data) .................................................................... E-2

NDAC (not data accepted) .................................................................... E-3

DAV (data valid)................................................................................... E-3

Interface Management Lines............................................................................. E-3

ATN (attention) ..................................................................................... E-3

IFC (interface clear) .............................................................................. E-3

REN (remote enable)............................................................................. E-3

SRQ (service request)............................................................................ E-3

EOI (end or identify) ............................................................................. E-3

Physical and Electrical Characteristics.......................................................................... E-4

Configuration Requirements ......................................................................................... E-6

Related Documents........................................................................................................ E-7

Appendix F Mnemonics Key

................................................................................................................... F-1

Appendix G Customer Communication

Contents

.............................................................................................. G-1

Glossary ..................................................................................................................... Glossary-1

Index.................................................................................................................................. Index-1

Figures

Figure 1-1. GPIB-1014 Interface Board ............................................................................. 1-2

Figure 2-1. GPIB-1014 with a VMEbus Computer............................................................ 2-9

Figure 2-2. GPIB-1014 in a Multiprocessor Application ................................................... 2-10

Figure 2-3. GPIB-1014 Block Diagram.............................................................................. 2-11

Figure 3-1. Parts Locator Diagram ..................................................................................... 3-2

Figure 3-2. Access Mode After RESET ............................................................................. 3-3

Figure 3-3. Configuration for GPIB-1014 Base Address 2000 (hex)................................. 3-4

Figure 3-4. Default Settings of AM Code Jumpers W3, W4, and W5 ............................... 3-5

Figure 4-1. Interface Registers............................................................................................ 4-4

Figure 4-2. Writing to the Hidden Registers....................................................................... 4-5

Figure 4-3. DMA Register Memory Map........................................................................... 4-47

Figure 5-1. DMA Transfer without Carry Cycle ................................................................ 5-10

Figure 5-2. DMA Transfer with Carry Cycle ..................................................................... 5-13

Figure 6-1. DTB Requester and Controller Flip-Flop Operations...................................... 6-10

Figure 6-2. Array Format for Array Chaining Modes ........................................................ 6-20

Contents

Figure 6-3. Array Format for Linked Chaining Modes ...................................................... 6-21

Figure E-1. The GPIB Connector and Signal Assignments................................................ E-4

Figure E-2. Linear Configuration........................................................................................ E-5

Figure E-3. Star Configuration............................................................................................ E-6

Tables

Table 2-1. GPIB-1014 Signals............................................................................................ 2-1

Table 2-2. µPD7210 Internal GPIB Interface Registers..................................................... 2-3

Table 2-3. 68450 Internal DMA Registers ......................................................................... 2-4

Table 2-4. GPIB-1014 Configuration Registers ................................................................. 2-5

Table 2-5. GPIB-1014 IEEE 488 Interface Capabilities..................................................... 2-13

Table 2-6. GPIB-1014 IEEE 1014 Interrupter Compliance Levels.................................... 2-15

Table 3-1. Programming Values for Default Settings of W3, W4, and W5....................... 3-6

Table 3-2. Setting the Address Modifier Code Bits (AM5-AM0)...................................... 3-6

Table 3-3. GPIB-1014 Pin Assignment on VMEbus Connector P1................................... 3-8

Table 3-4. GPIB-1014 Pin Assignment on VMEbus Connector P2................................... 3-9

Table 4-1. GPIB-1014 Register Map.................................................................................. 4-1

Table 4-2. Clues to Understanding Mnemonics ................................................................. 4-3

Table 4-3. Multiline GPIB Commands Recognized by the µPD7210................................ 4-25

Table 4-4. Auxiliary Command Summary ......................................................................... 4-28

Table 4-5. Auxiliary Commands: Detail Description......................................................... 4-29

Table 4-6. Examples for Configuring the PPR................................................................... 4-36

Table 4-7. DMAC DMA Channel Register Set.................................................................. 4-46

Table 6-1. Control Equations of Transceivers.................................................................... 6-3

Table A-1. Electrical Characteristics................................................................................... A-1

Table A-2. Environmental Characteristics .......................................................................... A-1

Table A-3. Physical Characteristics..................................................................................... A-2

GPIB-1014 User Manual xii © National Instruments Corporation

About This Manual

The GPIB-1014 User Manual describes the mechanical and electrical aspects of the GPIB-1014, the data transfer features, and contains information concerning its operation and programming.

Organization of This Manual

The GPIB-1014 User Manual is organized as follows:

• Chapter 1, Introduction, describes the GPIB-1014, lists the contents and optional equipment for your GPIB-1014 kit, and explains how to unpack the GPIB-1014 kit.

• Chapter 2, General Description, contains the electrical specifications for the GPIB-1014, the data transfer features, and describes the characteristics of key interface board components.

• Chapter 3, Configuration and Installation, describes the steps needed to configure and install the GPIB-1014 hardware.

• Chapter 4, Register Bit Descriptions, contains a description of the register map, a list of interface registers, and a description of the DMA registers.

• Chapter 5, Programming Considerations, explains the initialization process, sending/receiving messages, and the serial/parallel poll process.

• Chapter 6, Theory of Operation, contains a functional overview of the GPIB-1014 board and explains the operation of each functional block making up the GPIB-1014.

• Chapter 7, Diagnostic and Troubleshooting Test Procedures, contains test procedures for determining if the GPIB-1014 is installed and operating correctly.

• Appendix A, Hardware Specifications, specifies the electrical, environmental, and physical characteristics of the GPIB-1014 board and the condition under which it should be operated.

• Appendix B, Parts List and Schematic Diagrams, contains the parts list and schematic diagrams for the GPIB-1014.

• Appendix C, Sample Programs, contains listings of routines in 68000 assembly language code that implement the essential elements of the major utility functions.

• Appendix D, Multiline Interface Messages, lists the multiline interface messages and describes the mnemonics and messages that correspond to the interface functions. These functions include initializing the bus, addressing and unaddressing devices, and setting device modes for local or remote programming. The multiline interface messages are IEEE 488-defined commands that are sent and received with ATN TRUE.

• Appendix E, Operation of the GPIB, describes the operation of the GPIB.

About This Manual

• Appendix F, Mnemonics Key, contains a mnemonics key that defines the mnemonics (abbreviations) used throughout this manual for functions, remote messages, local messages, states, bits, registers, integrated circuits, system functions, and VMEbus operations and signals.

• Appendix G, Customer Communication, contains forms for you to complete to facilitate communication with National Instruments concerning our products.

• The Glossary contains an alphabetical list and description of terms used in this manual, including abbreviations, acronyms, metric prefixes, and symbols.

• The Index contains an alphabetical list of key terms and topics used in this manual, including the pages where each one can be found.

Conventions Used in This Manual

The following conventions are used to distinguish elements of text throughout this manual: italic Italic text denotes emphasis, a cross reference, or an introduction to a key

concept.

IEEE 488 IEEE 488 is used throughout this manual to refer to the ANSI/IEEE

Standard 488.1-1987, which defines the GPIB.

IEEE 1014 IEEE 1014 is used throughout this manual to refer to the ANSI/IEEE

Standard 1014-1987, which defines the GPIB.

Customer Communication

National Instruments wants to receive your comments on our products and manuals. We are interested in the applications you develop with our products, and we want to help if you have problems with them. To make it easy for you to contact us, this manual contains comment and configuration forms for you to complete. These forms are in Appendix G, Customer

Communication, at the end of this manual.

Chapter 1 Introduction

This chapter describes the GPIB-1014, lists the contents and oiptional equipment for your GPIB-1014 kit, and explains how to unpack the GPIB-1014 kit.

The GPIB-1014 is a high-performance IEEE 488 interface for the VMEbus. This interface permits IEEE 488 compatible engineering, scientific, or medical instruments to be controlled from a VMEbus-based computer. The GPIB-1014 has the following features:

• Complete IEEE 488 Talker/Listener/Controller (TLC) capability using the NEC µPD7210

GPIB TLC chip

• DMA transfers

- Data rates up to 500 kbytes/sec

- Unlimited data block lengths

- Full 24-bit addressing

- GPIB synchronization detection

- General purpose DMA capability

• Complete software control through programmable configuration parameters

- One out of four Bus Request/Grant lines

- One out of seven Interrupt Request lines

- Supervisor or User access

- Red/Green SYSFAIL LED indicator

- Local Master Reset

• VME laboratories certified

• IEEE 1014 (VMEbus) standard compliance

• Comprehensive software support

Introduction Chapter 1

Art not available in PDF version of document.

Figure 1-1 shows the GPIB-1014 interface board.

Figure 1-1. GPIB-1014 Interface Board

GPIB-1014 User Manual 1-2 © National Instruments Corporation

Chapter 1 Introduction

The GPIB-1014 interface kit includes hardware and programming examples to implement the GPIB functions. Optional cables are supplied for interconnection with other devices on the GPIB.

What Your Kit Should Contain

Your GPIB-1014 kit should contain the following components:

Kit Component Part Number

One of these GPIB-1014 boards:

• GPIB-1014-1 776059-01

• GPIB-1014-2 776060-01

• GPIB-1014-EH (EH=Ejector Handles) 776059-51

• GPIB-1014-1S (no P2 signals) 776059-21

• GPIB-1014-1S-EH (no P2 signals; EH=Ejector Handles) 776059-61 One GPIB-1014 User Manual 320030-01

Optional Equipment

Equipment Part Number

Single-Connector Scrambler Interface Card 180170-01 Dual-Connector Scrambler Interface Card 180170-02

Scrambler Card to P2 Cable Assembly 180173-01 Single-Shielded Cables:

GPIB Type X1 Cable - 1 m 763001-01 GPIB Type X1 Cable - 2 m 763001-02 GPIB Type X1 Cable - 4 m 763001-03

GPIB Monitor/Analyzer:

GPIB-400 776074-01 GPIB-410 776104-01

Introduction Chapter 1

Unpacking

Follow these steps when unpacking your GPIB-1014.

1. Verify that the pieces contained in the package you received match the kit parts list given earlier in this chapter. Do not remove the board from its plastic bag at this point.

2. Your GPIB-1014 board is shipped packaged in an antistatic plastic bag to prevent electrostatic damage to the board. Several components on the board can be damaged by electrostatic discharge. To avoid such damage in handling the board, touch the plastic bag to a metal part of your VMEbus computer chassis before removing the board from the bag.

3. Remove the board from the bag and inspect the board for loose components or any other sign of damage. Notify National Instruments if the board appears damaged in any way. Do not install a damaged board into your computer.

GPIB-1014 User Manual 1-4 © National Instruments Corporation

Chapter 2 General Description

This chapter contains the electrical specifications for the GPIB-1014, the data transfer features, and describes the characteristics of key interface board components.

Electrical Characteristics

All integrated circuit drivers and receivers used on the GPIB-1014 meet the requirements of the VMEbus specification and the IEEE 1014 standard. Table 2-1 contains a list of the VMEbus signals used by the GPIB-1014 and the electrical loading presented by the circuitry on the interface board (in terms of device types and their part numbers).

Note: The asterisk (*) after the bus signal indicates that the signal is active low.

Table 2-1. GPIB-1014 Signals

Driver Device Receiver Device

Bus Signals Part Number Part Number

D00-D15 F245 F245 A23-A16 AS573 – A15-A09 AS573 LS2521 A8 AS573 F1241 A07-A01 F245 F245 AM5-AM3, AM0 F241 LS2521 AM2 F241 LS240 DS0*, DS1*, AS*, WRITE* F241 F1241 LWORD* F241 LS2521 IACK* F241 F1241 SYSCLK – LS240 BG0IN*-BG3IN* – LS241 BG0OUT*-BG3OUT* F241 – DTACK* AS756 LS240

(continues)

General Description Chapter 2

Table 2-1. GPIB-1014 Signals (continued)

Driver Device Receiver Device

Bus Signals Part Number Part Number

BR0*-BR3* AS756 LS241 BBSY* AS756 LS240 IACKIN* – LS240 IACKOUT* F1241 – IRQ1*-IRQ7* 74145 – BERR* – F1241 SYSFAIL* AS756 – SYSRESET* – LS240

All GPIB transceivers meet the requirements of the IEEE 488 standard. The components used are as follows:

Transceivers Component Designation

Data Transceivers DS75160AN Control Transceivers DS75162AN

Note: The GPIB-1014 requires regulated +5 VDC power from the VMEbus. Current load is

typically 1.6 A (2.0 A maximum).

VMEbus Characteristics

The following paragraphs describe each of the VMEbus modules on the GPIB-1014: slave, master, interrupter, and requester. Table 2-5 at the end of this chapter summarizes the capabilities of these modules.

VMEbus Slave-Addressing

The GPIB-1014 occupies 512 bytes (256 words) in the A16 (short) I/O space. As a VMEbus slave, it only responds when the address modifier (AM) lines specify a short supervisory access (AM code = 2D) or a short nonprivileged access (AM code = 29). The board responds to short 16-bit addresses. The GPIB-1014 compares address lines A15 through A9 with its base address

GPIB-1014 User Manual 2-2 © National Instruments Corporation

Chapter 2 General Description

to generate its board select signal. It then decodes the lowest eight lines, A8 through A1, to address the following items:

• The 68450 DMA Controller (DMAC)

• The µPD7210 GPIB Talker/Listener/Controller (TLC)

• Two 8-bit, write-only Configuration Registers

You can configure the base address of the board through the hardware jumper set W1 located on the interface board. Except for the models GPIB-1014-1S and GPIB-1014-1S-EH, the base address can also be set using strapped address lines located on the VMEbus P2 connector. See Chapter 3, Configuration and Installation, on how to set the base address of the board.

VMEbus Slave-Data

The GPIB-1014 can function as a VMEbus slave, decoding short I/O addresses and commands from a VMEbus master. The µPD7210 and the two Configuration Registers function as 8-bit slaves, allowing data to be transferred to and from the VMEbus Master on data lines D07 through D00. The 68450 can function as an 8- or 16-bit slave, allowing transfers on data lines D15 through D00. The board is designed to accommodate Address Only (ADO) cycles. In VMEbus terminology, the slave module of the board is designated as D16 & D08(EO).

The GPIB Interface Registers associated with the µPD7210 are addressed relative to the base address of the board, as shown in Table 2-2. The DMA registers internal to the 68450 are shown in Table 2-3. The two Configuration Registers of the GPIB-1014 are shown in Table 2-4.

Table 2-2. µPD7210 Internal GPIB Interface Registers

Address

(Base + Hex Offset) Mode Register Size

111 R Data In (DIR) 8 bits 111 W Command/Data Out (CDOR) 8 bits 113 R Interrupt Status 1 (ISR1) 8 bits 113 W Interrupt Mask 1 (IMR1) 8 bits 115 R Interrupt Status 2 (ISR2) 8 bits 115 W Interrupt Mask 2 (IMR2) 8 bits 117 R Serial Poll Status (SPSR) 8 bits 117 W Serial Poll Mode (SPMR) 8 bits 119 R Address Status (ADSR) 8 bits

119 W Address Mode (ADMR) 8 bits 11B R Command Pass Through (CPTR) 8 bits 11B W Auxiliary Mode (AUXMR) 8 bits

11D R Address 0 (ADR0) 8 bits 11D W Address (ADR) 8 bits

11F R Address 1 (ADR1) 8 bits 11F W End of String (EOSR) 8 bits

General Description Chapter 2

Table 2-3. 68450 Internal DMA Registers

Address (Base

+ Hex Offset) Mode Register Channel Size

0A R/W Memory Transfer Counter (MTCR0) 0 16 bits 0C R/W Memory Address Register (MAR0) 0 32 bits 29 R/W Memory Function Code (MFCR0) 0 8 bits 14 R/W Device Address Register (DAR0) 0 32 bits 31 R/W Device Function Code (DFCR0) 0 8 bits 1A R/W Base Transfer Counter (BTCR0) 0 16 bits 1C R/W Base Address Register (BAR0) 0 32 bits 39 R/W Base Function Code (BFCR0) 0 8 bits 00 R/W Channel Status (CSR0) 0 8 bits 01 R Channel Error (CER0) 0 8 bits 04 R/W Device Control (DCR0) 0 8 bits 05 R/W Operation Control (OCR0) 0 8 bits 06 R/W Sequence Control (SCR0) 0 8 bits 07 R/W Channel Control (CCR0) 0 8 bits 2D R/W Channel Priority (CPR0) 0 8 bits 25 R/W Normal Interrupt Vector (NIVR0) 0 8 bits 27 R/W Error Interrupt Vector (EIVR0) 0 8 bits

4A R/W Memory Transfer Counter (MTCR1) 1 16 bits 4C R/W Memory Address Register (MAR1) 1 32 bits 69 R/W Memory Function Code (MFCR1) 1 8 bits 54 R/W Device Address Register (DAR1) 1 32 bits 71 R/W Device Function Code (DFCR1) 1 8 bits 5A R/W Base Transfer Counter (BTCR1) 1 16 bit 5C R/W Base Address Register (BAR1) 1 32 bits 79 R/W Base Function Code (BFCR1) 1 8 bits 40 R/W Channel Status (CSR1) 1 8 bits 41 R Channel Error (CER1) 1 8 bits 44 R/W Device Control (DCR1) 1 8 bits 45 R/W Operation Control (OCR1) 1 8 bits 46 R/W Sequence Control (SCR1) 1 8 bits 47 R/W Channel Control (CCR1) 1 8 bits 6D R/W Channel Priority (CPR1) 1 8 bits 65 R/W Normal Interrupt Vector (NIVR1) 1 8 bits 67 R/W Error Interrupt Vector (EIVR1) 1 8 bits

8A R/W Memory Transfer Counter (MTCR2) 2 16 bits 8C R/W Memory Address Register (MAR2) 2 32 bits A9 R/W Memory Function Code (MFCR2) 2 8 bits 94 R/W Device Address Register (DAR2) 2 32 bits B1 R/W Device Function Code (DFCR2) 2 8 bits 9A R/W Base Transfer Counter (BTCR2) 2 16 bits 9C R/W Base Address Register (BAR2) 2 32 bits B9 R/W Base Function Code (BFCR2) 2 8 bits 80 R/W Channel Status (CSR2) 2 8 bits 81 R Channel Error (CER2) 2 8 bits 84 R/W Device Control (DCR2) 2 8 bits

(continues)

Chapter 2 General Description

Table 2-3. 68450 Internal DMA Registers (continued)

Address (Base + Hex Offset) Mode Register Channel Size

85 R/W Operation Control (OCR2) 2 8 bits 86 R/W Sequence Control (SCR2) 2 8 bits 87 R/W Channel Control (CCR2) 2 8 bits AD R/W Channel Priority (CPR2) 2 8 bits A5 R/W Normal Interrupt Vector (NIVR2) 2 8 bits A7 R/W Error Interrupt Vector (EIVR2) 2 8 bits

CA R/W Memory Transfer Counter (MTCR3) 3 16 bits CC R/W Memory Address Register (MAR3) 3 32 bits E9 R/W Memory Function Code (MFCR3) 3 8 bits D4 R/W Device Address Register (DAR3) 3 32 bits F1 R/W Device Function Code (DFCR3) 3 8 bits DA R/W Base Transfer Counter (BTCR3) 3 16 bits DC R/W Base Address Register (BAR3) 3 32 bits F9 R/W Base Function Code (BFCR3) 3 8 bits C0 R/W Channel Status (CSR3) 3 8 bits C1 R Channel Error (CER3) 3 8 bits C4 R/W Device Control (DCR3) 3 8 bits C5 R/W Operation Control (OCR3) 3 8 bits C6 R/W Sequence Control (SCR3) 3 8 bits C7 R/W Channel Control (CCR3) 3 8 bits ED R/W Channel Priority (CPR3) 3 8 bits E5 R/W Normal Interrupt Vector (NIVR3) 3 8 bits E7 R/W Error Interrupt Vector (EIVR3) 3 8 bits

FF R/W General Control Register (GCR) all 8 bits

Table 2-4. GPIB-1014 Configuration Registers

Address

(Base + Hex Offset) Mode Register Size

101 W Configuration Register 1 8 bits

105 W Configuration Register 2 8 bits

VMEbus Master-Direct Memory Access

The GPIB-1014 can function as a VMEbus master, performing data transfers to and from VMEbus memory. In most applications, the 68450 controls the data transfer to and from the GPIB during DMA, and can transfer the 8-bit data on data lines D07 through D00 or D15 through D08, allowing the packing of data in VMEbus memory. In addition to GPIB-to-VMEbus memory DMA transfers, the board can also perform 8- or 16-bit memory-to-memory DMA transfers.

General Description Chapter 2

Memory addresses generated by the GPIB-1014 are 24 bits wide and the VMEbus Address Modifier Lines (AM5 through AM0) are fully programmable using function code registers located in the 68450 and three hardware jumpers (W3, W4, and W5). (See Chapter 3 for instructions on setting the hardware jumpers. See Chapter 4 for a description of the DMAC Function Code Registers.) The 24-bit addresses, along with selectable Address Modifier codes, eliminate artificial memory boundaries and allow data transfers between the GPIB and data area, program area, or even devices located in the short I/O area. In VMEbus terminology, the GPIB-1014 has A24 / D08(EO) & D16 master capability. The board does not use Unaligned Transfer (UAT), Block Transfer (BLT), or Read Modify Write (RMW) cycles. The chaining feature of the 68450 allows data blocks of unlimited size to be transferred.

Interrupter

Interrupt events that can drive a hardware-programmed VMEbus interrupt request line are as follows:

• GPIB Data In (DI) • Address Status Change (ADSC)

• GPIB Data Out (DO) • Secondary Address Pass Through (APT)

• END Message Received (END RX) • Service Request Input (SRQI)

• GPIB Command Out (CO) • Device Execute Trigger (DET)

• Remote Mode Change (REMC) • Device Clear received (DEC RX)

• GPIB Handshake Error (ERR) • Command Pass Through (CPT)

• Lockout Change (LOKC) • Bus Error (BERR)

• GPIB DMA Transfer Finished and GPIB Synchronized (FIN)

You can select one of seven VMEbus interrupt request lines (IRQ1* through IRQ7*) through software using three bits located in Configuration Register 1.

The onboard hardware implements the VMEbus interrupt acknowledge protocol. Interrupt Vector Registers located in the 68450 let you select, through software, the 8-bit Interrupt Status/ID byte supplied by the GPIB-1014 during an interrupt acknowledge cycle of the correct priority. The GPIB-1014 is a D08(O) interrupter, because it responds to an interrupt acknowledge cycle by providing an 8-bit status/ID byte on data lines D00 through D07. In addition, the board is a Release On Register Access (RORA) interrupter, because it releases its interrupt line when the Channel Status Register is written with the proper value. In VMEbus terminology, the GPIB-1014 has D08(O) / RORA Interrupter capability.

Chapter 2 General Description

Data Transfer Bus (DTB) Requester

The GPIB-1014 arbitrates for the DTB before each DMA transfer. The board is designed for you to select, through software, one of four VMEbus request lines (BR0* through BR3*) using two bits in Configuration Register 1. To maximize the capabilities of the DTB, the board can be programmed to become a Release On Request (ROR) DTB master. Unless programmed, the GPIB-1014 is a Release When Done (RWD) master.

VMEbus Modules Not Provided

Because the GPIB-1014 is not designed to be VMEbus System Controller, it does not have the following modules:

• Bus Timer

• Arbiter

• Interrupt Handler

• IACK Daisy-Chain Driver

• System Clock Driver

• Serial Clock Driver

• Power Monitor

Diagnostic Aids

The GPIB-1014 is designed to allow stand-alone verification of I/O and DMA functions. See Chapter 7, Diagnostic and Troubleshooting Test Procedures, for details.

Data Transfer Features

The GPIB-1014 can be used to transfer data to and from the GPIB using Direct Memory Access (DMA) and programmed I/O. The overall throughput is dependent upon the following parameters:

• The number of GPIB commands sent

• The amount of time spent setting up the GPIB-1014 DMA transfers

• The size of the DMA data buffers (number of bytes transferred in one DMA operation)

• Operating system overhead

• Interrupt service time

• VMEbus memory response time (DS* low to DTACK* low)

General Description Chapter 2

• GPIB Listener response time (DAV* low to NDAC* high)

• GPIB Talker response time (NRFD* high to DAV* low)

• GPIB-1014 transfer mode: Cycle Steal with hold, programmable timeout

• T1 timing: high-speed

Transfer rates of 250 to 350 kbytes/sec can be expected in typical systems, and rates up to 500 kbytes/sec can be achieved under optimum conditions.

Programmed I/O Transfers

The GPIB-1014 is able to transfer data to and from the GPIB using programmed I/O. Transfer rates using programmed I/O depend on many factors including how fast the program code executes, how fast the microprocessor services interrupts, and the operating system overhead. Typically, the GPIB-1014 transfers data at rates ranging from 10 to 80 kbytes/sec using programmed I/O.

GPIB-1014 Functional Description

In the simplest terms, the GPIB-1014 can be thought of as a bus translator, converting messages and signals present on the VMEbus into appropriate GPIB messages and signals. Expressed in GPIB terminology, the GPIB-1014 implements GPIB interface functions for communicating with other GPIB devices and device functions for communicating with the central processor and memory. Expressed in VMEbus terminology, the GPIB-1014 is an interface to the outside world.

Figures 2-1 and 2-2 show typical applications for the GPIB-1014. In Figure 2-1, the GPIB-1014 is used to interface an assortment of test instruments to a VMEbus computer system, which then functions as an intelligent System Controller. This is the traditional role of the GPIB.

In Figure 2-2, the GPIB-1014 is used along with other National Instruments interface boards to connect a VMEbus computer to other processors to transfer files electrically rather than manually (via a removable storage medium) or to perform other interprocessor communication functions.

Chapter 2 General Description

Device A

VMEbus Computer with GPIB-1014

Able to Talk, Listen, and Control

Device C

Digital

Voltmeter

Able to Talk

and Listen

8 Lines

3 Lines

Frequency

Counter

Able to Talk

Device B

Printer

Able to Listen

Data Lines DIO1-DIO8

Handshake Lines DAV (Data Valid)

NRFD (Not Ready for Data) NDAC (Not Data Accepted)

Management Lines

5 Lines

IFC (Interface Clear) ATN (Attention) SRQ (Service Request)

REN (Remote Enable) EOI (End or Identify)

Figure 2-1. GPIB-1014 with a VMEbus Computer

General Description Chapter 2

R&D Lab

Microprocessor Work Station

VMEbus Computer with GPIB-1014 IEEE 488 Interface

Computer Center

IBM PC with GPIB-PC IEEE 488 Interface

GPIB-100 Bus Extender

Up to 300 Meters (RS-422)

GPIB-100 Bus Extender

Production & Testing

PDP 11/44 with GPIB11-2 IEEE 488 Interface

S-100 Computer GPIB-696P IEEE 488 Interface

Figure 2-2. GPIB-1014 in a Multiprocessor Application

Chapter 2 General Description

Figure 2-3 is a block diagram of the GPIB-1014.

GPIB

Configuration

Data

T ransceivers

Control

T ransceivers

Registers

µPD7210

Address

Decoding

Address

Transceivers

TLC

Address

State

Timing

Data

Transceivers

DTB Control

Machine

Data

Transceivers

68450 DMAC

Interrupter

and Control

DMA Gating

GPIB

Synchronization

DTB

Requester

and Interrupt Control

Clock and

Reset Circuitry

Data T ransfer Bus

Priority Interrupt

VMEbus

DTB Arbitration

Utility

Figure 2-3. GPIB-1014 Block Diagram

General Description Chapter 2

The interface consists of these major components, which are discussed in greater detail in Chapter 6.

• VMEbus Interface Consists of the buffers, drivers, and transceivers for the

address, data, status, and control lines used on the VMEbus, plus other logic circuitry that converts internal signals to bus-compatible signals.

• Address Decoder Recognizes when the VMEbus master addresses one of the

GPIB-1014 registers and generates the appropriate strobe to begin the data transfer.

• Clock and Reset Circuitry Monitors the VMEbus utility signals to generate the 8-MHz

clock used by the TLC and DMAC and to detect System Reset, Power Failure, and Bus Error conditions.

• Configuration Registers Programmably configures some of the operating parameters

of the GPIB-1014.

• Timing State Machine Controls the timing of DMA transfers and accesses to the

GPIB-1014 from the VMEbus.

• DMA Gating and Control Controls the DMA request/acknowledge interface between

the DMAC and the TLC.

• Interrupter Implements the VMEbus priority interrupt protocol,

allowing the GPIB-1014 to request and respond to an interrupt acknowledge cycle. All interrupt conditions are also detectable by polling.

• DTB Control Transceivers Performs the necessary VMEbus protocol to request,

obtain, and release control of the VME system bus. Once configured for a DMA transfer, the GPIB-1014 automatically performs data transfers between the GPIB and VMEbus memory.

• GPIB Synchronization and Detects the synchronization of the GPIB after the last byte Interrupt Control in a DMA transfer (all devices on the GPIB have accepted

the last byte) and detects interrupting conditions from the TLC. TLC interrupt requests are routed through the DMAC, which notifies the Interrupter when either a TLC interrupt or one of its own internal interrupt conditions is detected.

• DMAC (68450) Controls DMA transfers between the GPIB and the

VMEbus. The DMA Gating and Control circuitry controls the DMA request/acknowledge interface between the TLC and the DMAC.

• GPIB TLC (NEC µPD7210) Implements many of the GPIB interface functions, either

independently or with assistance of or interpretation by the controlling program. Together with special transceivers, the TLC forms the GPIB interface side of the GPIB-1014.

+ 216 hidden pages

National Instruments 320030-01 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Limited Warranty

Copyright

Trademarks

FCC/DOC Radio Frequency Interference Compliance

Figures

Tables

About This Manual

Organization of This Manual

Conventions Used in This Manual

Related Documentation

Customer Communication

Chapter 1 Introduction

Figure 1-1. GPIB-1014 Interface Board

What Your Kit Should Contain

Optional Equipment

Unpacking

Chapter 2 General Description

Electrical Characteristics

Table 2-1. GPIB-1014 Signals

VMEbus Characteristics

VMEbus Slave-Addressing

VMEbus Slave-Data

Table 2-3. 68450 Internal DMA Registers

Table 2-4. GPIB-1014 Configuration Registers

VMEbus Master-Direct Memory Access

Interrupter

Data Transfer Bus (DTB) Requester

VMEbus Modules Not Provided

Diagnostic Aids

Data Transfer Features

Programmed I/O Transfers

GPIB-1014 Functional Description

Figure 2-1. GPIB-1014 with a VMEbus Computer

Figure 2-2. GPIB-1014 in a Multiprocessor Application

Figure 2-3. GPIB-1014 Block Diagram