MX COM Inc CMX868P4, CMX868E2, CMX868D2 Datasheet

COMMUNICATION ICs

DATA BULLETIN

CMX868

Low Power

V.22 bis Modem

2000 MX-COM, Inc. www.mxcom.com tel: [phone] 744 5050 fax: [phone] Doc. # 20480205.006

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

ADVANCE INFORMATION

Features Applications

•

V.22bis 2400/2400bps QAM

•

V.22, Bell 212A 1200/1200 or 600/600bps DPSK

•

V.23 1200/75, 1200/1200, 75, 1200bps FSK

•

Bell 202 1200/150, 1200/1200, 150, 1200bps FSK

•

V.21 or Bell 103 300/300bps FSK

•

DTMF/Tones Transmit and Receive

•

Extremely Low Power:

3.5mA/3V, 6.5mA/5V typical

•

‘Powersave’ Standby Mode

•

Cable TV Set Top Box (STB)

•

Telephone Telemetry Systems

•

Remote Utility Meter Reading

•

Security Systems

•

Industrial Control Systems

•

Electronic Cash Terminals

•

Pay-Phones

•

Modem Links with Caller ID

C-BUS

SERIAL

INTERFACE

LINE

CMX868

LINE

INTERFACE

HOST

µ C

TX USART & SCRAMBLER.
QAM / DPSK / FSK MODULATOR.
TONE / DTMF GENERATOR.

RX DESCRAMBLER & USART,
QAM / DPSK / FSK RECEIVER.
TONE / DTMF DETECTOR.

RING DETECTOR.

RELAY DRIVER.

The CMX868 is a multi-standard modem for use in telephone based information and telemetry systems.
Control of the device is via a simple high speed serial bus, compatible with most types of µC serial interface.

The data transmitted and received by the modem is also transferred over the same serial bus. On-chip
programmable Tx and Rx USARTs meeting the requirements of V.14 are provided for use with asynchronous
data and allow unformatted synchronous data to be received or transmitted as 8-bit words.

It can transmit and detect standard DTMF and modem calling and answer signals or user-specific
programmed single or dual tone signals. A general purpose Call Progress signal detector is also included.

Flexible line driver and receive hybrid circuits are integrated on chip, requiring only passive external
components to build a 2 or 4-wire line interface.

The device also features a hook switch relay drive output and a Ring Detector circuit which continues to
function when the device is in the Powersave mode, providing an interrupt which can be used to wake up the
host µController when line voltage reversal or ringing is detected.

The CMX868 operates from a single 2.7 to 5.5V supply over a temperature range of -40°C to +85°C and is
available in 24-pin TSSOP, SOIC and DIP packages.

Low Power V.22bis Modem 2 CMX868 Advance Information

2000 MX-COM, Inc. www.mxcom.com tel: [phone] 744 5050 fax: [phone] Doc. # 20480205.006

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

CONTENTS

Section Page

1 Block Diagram................................................................................................................ 3

2 Signal List....................................................................................................................... 4

3 External Components.................................................................................................... 5

3.1 Ring Detector Interface........................................................................................................ 6

3.2 Line Interface....................................................................................................................... 7

3.2.1 2-Wire Line Interface ..............................................................................................................7

3.2.2 4-Wire Line Interface ..............................................................................................................8

4 General Description....................................................................................................... 9

4.1 Tx USART ......................................................................................................................... 10

4.2 FSK and QAM/DPSK Modulators...................................................................................... 11

4.3 Tx Filter and Equalizer....................................................................................................... 12

4.4 DTMF/Tone Generator ...................................................................................................... 12

4.5 Tx Level Control and Output Buffer ................................................................................... 12

4.6 Rx DTMF/Tones Detectors................................................................................................ 12

4.7 Rx Modem Filtering and Demodulation ............................................................................. 13

4.8 Rx Modem Pattern Detectors and Descrambler................................................................ 14

4.9 Rx Data Register and USART ........................................................................................... 15

4.10 C-BUS Interface ................................................................................................................ 16

4.10.1 General Reset Command (no data) C-BUS address $01 ..................................................17

4.10.2 General Control Register: 16-bit write-only C-BUS address $E0........................................ 18

4.10.3 Transmit Mode Register: 16-bit write-only C-BUS address $E1 .........................................19

4.10.4 Receive Mode Register ........................................................................................................23

4.10.5 Tx Data Register .................................................................................................................. 25

4.10.6 Rx Data Register ..................................................................................................................25

4.10.7 Status Register: 16-bit read-only C-BUS address $E6 ...................................................... 26

4.10.8 Programming Register ......................................................................................................... 29

5 Application Notes ........................................................................................................32

5.1 V.22bis Calling Modem Application ................................................................................... 32

5.2 V.22bis Answering Modem Application ............................................................................. 33

6 Performance Specification.......................................................................................... 34

6.1 Electrical Performance ...................................................................................................... 34

6.1.1 Absolute Maximum Ratings.................................................................................................. 34

6.1.2 Operating Limits ................................................................................................................... 34

6.1.3 Operating Characteristics..................................................................................................... 35

6.2 Packaging.......................................................................................................................... 42

MX-COM, Inc. reserves the right to change specifications at any time and without notice.

Low Power V.22bis Modem 3 CMX868 Advance Information

2000 MX-COM, Inc. www.mxcom.com tel: [phone] 744 5050 fax: [phone] Doc. # 20480205.006

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

1 Block Diagram

C-BUS

SERIAL

INTERFACE

+

Tx / Rx

DATA

REGISTERS

& USART

IRQ

CS

RDRV

XTAL / CLOCK

XTAL

VDDV

SS

V

BIAS

LOCAL

ANALOG

LOOPBACK

Tx Output

Buffer

Tx Level

Control

Rx Input
Amplifier

Rx Gain

Control

TXA

TXA

RXAFB

RXA

+

-

RXA

REPLY

DATA

RT

RD

COMMAND

DATA

SERIAL

CLOCK



Scrambler

Enable

Descrambler

Enable

QAM/DPSK

MODULATOR

FSK

DEMODULATOR

RING

DETECTOR

QAM/DPSK

DEMODULATOR

FSK

MODULATOR

DTMF/TONE

GENERATOR

MODEM

ENERGY

DETECTOR

DTMF/TONE/
CALL PROG/

ANSWER TONE

DETECTOR

RECEIVE

MODEM

FILTER &

EQUALIZER

TRANSMIT

FILTER &

EQUALIZER

Xtal Osc and

Clock Dividers

Figure 1: Block Diagram

Low Power V.22bis Modem 4 CMX868 Advance Information

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4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

2 Signal List

D2/E2/P4 Signal Description

Pin No. Name Type

1

XTAL

output The output of the on-chip Xtal oscillator inverter.

2 XTAL/CLOCK input

The input to the oscillator inverter from the Xtal circuit or
external clock source.

3

RDRV

output

Relay drive output, low resistance pull down to V

SS

when

active and medium resistance pull up to V

DD

when inactive.

4, 8, 12,

17, 21

V

SS

Power The negative supply rail (ground).

5 RD input

Schmitt trigger input to the Ring signal detector. Connect to
VSS if Ring Detector not used.

6 RT bi-directional

Open drain output and Schmitt trigger input forming part of
the Ring signal detector. Connect to V

DD

if Ring Detector

not used.

7, 16, 24 VDD Power

The positive supply rail. Levels and thresholds within the
device are proportional to this voltage.

9 RXAFB output The output of the Rx Input Amplifier.

10

RXA

input The inverting input to the Rx Input Amplifier

11 RXA input The non-inverting input to the Rx Input Amplifier

13 V

BIAS

output

Internally generated bias voltage of approximately V

DD

/2,

except when the device is in ‘Powersave’ mode when V

BIAS

will discharge to V

SS

. Should be de-coupled to VSS by a

capacitor mounted close to the device pins.

14

TXA

output The inverted output of the Tx Output Buffer.

15 TXA output The non-inverted output of the Tx Output Buffer.
18

CS

input

The C-BUS chip select input from the µC.

19

COMMAND

DATA

input

The C-BUS serial data input from the µC.

20 SERIAL CLOCK input

The C-BUS serial clock input from the µC.

22 REPLY DATA tri-state

A 3-state C-BUS serial data output to the µC. This output is
high impedance when not sending data to the µC.

23

IRQ

output

A ‘wire-ORable’ output for connection to a µC Interrupt
Request input. This output is pulled down to V

SS

when
active and is high impedance when inactive. An external
pull-up resistor is required i.e. R1 of Figure 2.

Table 1: Signal List

Low Power V.22bis Modem 5 CMX868 Advance Information

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4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

3 External Components

1

C1

C2

C3

X1

XTAL

XTAL/CLOCK

C-BUS
to/from

µC

Ring Detector

See Section 3.1

Tx Line Interface

See Section 3.2

Rx Line Interface

See Section 3.2

SERIAL CLOCK

COMMAND DATA

REPLY DATA

CS

IRQ

RDRV

RT

TXA

RXA

RXA

RXAFB

TXA

RD

V

DD

V

DD

V

BIAS

2

5
6

8

9

CMX868

10
11

7

12

13

14

15

16

17

18

19

20

21

22

23

24

R1

V

DD

V

SS

V

SS

V

SS

3
4

V

DD

V

SS

C4

C5

+

V

DD

Figure 2: Recommended External Components for Typical Applciation

R1

100kΩ

C5 10uF

C1, C2 22pF X1 11.0592MHz or 12.288MHz
C3, C4 100nF

Resistors ±5%, capacitors ±20% unless otherwise stated.

Table 2: Recommended External Components for typical Application

Note:

1. This device is capable of detecting and decoding small amplitude signals. To achieve this V

DD

and V

BIAS

should be de-coupled and the receive path protected from extraneous in-band signals. It is
recommended that the printed circuit board be laid out with a V

SS

ground plane in the CMX868 area to

provide a low impedance connection between the V

SS

pins and the VDD and V

BIAS

decoupling capacitors.

The V

SS

connections to the Xtal oscillator capacitors C1 and C2 should also be low impedance and

preferably be part of the V

SS

ground plane to ensure reliable start up of the oscillator.

2. For best results, a crystal oscillator design should drive the clock inverter input with signal levels of at
least 40% of V

DD

, peak to peak. Tuning fork crystals generally cannot meet this requirement. To obtain

crystal oscillator design assistance, please consult your crystal manufacturer.

Low Power V.22bis Modem 6 CMX868 Advance Information

2000 MX-COM, Inc. www.mxcom.com tel: [phone] 744 5050 fax: [phone] Doc. # 20480205.006

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

3.1 Ring Detector Interface

Figure 3 shows how the CMX868 may be used to detect the large amplitude Ringing signal voltage present
on the 2-wire line at the start of an incoming telephone call.

The ring signal is usually applied at the subscriber's exchange as an ac voltage inserted in series with one of
the telephone wires and will pass through either C20 and R20 or C21 and R21 to appear at the top end of
R22 (point X in Figure 3) in a rectified and attenuated form.

The signal at point X is further attenuated by the potential divider formed by R22 and R23 before being
applied to the CMX868 RD input. If the amplitude of the signal appearing at RD is greater than the input
threshold (Vt

HI

) of Schmitt trigger 'A' then the N transistor connected to RT will be turned on, pulling the

voltage at RT to V

SS

by discharging the external capacitor C22. The output of the Schmitt trigger 'B' will then

go high, setting bit 14 (Ring Detect) of the Status Register.
The minimum amplitude ringing signal that is certain to be detected is:

()

()

RMSHI

V707.0

23R

23R22R20R

Vt7.0









++

+

where Vt

HI

is the high-going threshold voltage of the Schmitt trigger A (see Section 6.1).

With R20-22 all 470kΩ as Figure 3, then setting R23 to 68kΩ will guarantee detection of ringing signals of
40V

RMS

and above for VDD over the range 3 to 5V.

2-Wire

Telephone

Line

RD

CMX868

To Status

Register

RT

V

DD

D1 - 4

C20

C22

R20

R21

R22

R23

R24

C21

RT

Status Register bit 14
(Ring Detect)

Bridge rectifier

output (X)

Ring signal

Vt

HI

V

SS

V

SS

Vt

HI

A

B

X

Figure 3: Ring Signal Interface Circuit

R20, 21, 22

470kΩ

C20, 21

0.1µF

R23 See text C22

0.33µF

R24

470kΩ

D1-4 1N4004

Resistors ±5%, capacitors ±20%

Table 3: Ring Signal Detector Interface Circuit External Components

Low Power V.22bis Modem 7 CMX868 Advance Information

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4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

If the time constant of R24 and C22 is large enough then the voltage on RT will remain below the threshold of
the 'B' Schmitt trigger for the duration of a ring cycle.

The time for the voltage on RT to charge from V

SS

towards VDD can be derived from the formula





















−=









×

−

22C24R

t

DDRT

e1VV

As the Schmitt trigger high-going input threshold voltage (Vt

HI

) has a minimum value of 0.56 x VDD, then the

Schmitt trigger B output will remain high for a time of at least 0.821 x R24 x C22 following a pulse at RD.

The values of R24 and C22 given in Figure 3 (470kΩ and 0.33µF) give a minimum RT charge time of 100ms,
which is adequate for ring frequencies of 10Hz or above.

Note:

The circuit will also respond to a telephone line voltage reversal. If necessary the µC can distinguish
between a Ring signal and a line voltage reversal by measuring the time that bit 14 of the Status Register
(Ring Detect) is high.

If the Ring detect function is not used then pin RD should be connected to V

SS

and RT to VDD.

3.2 Line Interface

A line interface circuit is needed to provide dc isolation and to terminate the line.

3.2.1 2-Wire Line Interface

Figure 4 shows an interface for use with a 600Ω 2-wire line. The complex line termination is provided by R13
and C10, high frequency noise is attenuated by C10 and C11, while R11 and R12 set the receive signal level
into the modem. For clarity, the 2-wire line protection circuitry has not been shown.

+ve

R13

2-Wire

Line

1:1

RDRV

­+

To Ring

Detect Circuit

See Section 3.1

Optional buffer if

needed to drive

low resistance relay

CMX868

TXA

TXA

R11

C11

R12

C3

C10

RXA
RXA

V

BIAS

RXAFB

Figure 4: 2-Wireline Interface Circuit

R11 See text C3 See Figure 2
R12

100kΩ

C10 33nF

R13

600Ω

C11 100pF

Resistors ±5%, capacitors ±20%

Table 4: 2-Wireline Interface Circuit External Components

The transmit line signal level is determined by the voltage swing between the TXA and

TXA

pins, less 6dB

due to the line termination resistor R13, and less the loss in the line coupling transformer.

Low Power V.22bis Modem 8 CMX868 Advance Information

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4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

Allowing for 1dB loss in the transformer, then with the Tx Mode Register set for a Tx Level Control gain of 0dB
the nominal transmit line levels will be:

V

DD

= 3.0V VDD = 5.0V

QAM, DPSK and FSK Tx modes (no guard tone) -10dBm -5.5dBm
Single tone transmit mode -10dBm -5.5dBm
DTMF transmit mode -6 and -8 dBm -1.5 and -3.5 dBm

For a line impedance of 600Ω, 0dBm = 775mV

RMS

. See also Section 6.1.3.

In the receive direction, the signal detection thresholds within the CMX868 are proportional to V

DD

and are
affected by the Rx Gain Control gain setting in the Rx Mode Register. The signal level into the CMX868 is
affected by the line coupling transformer loss and the values of R11 and R12 of Figure 4.

Assuming 1dB transformer loss, the Rx Gain Control programmed to 0dB and R12 = 100kΩ, then for correct
operation (see Section 6.1.3) the value of R11 should be equal to 500 / V

DD

kΩ i.e. 160kΩ at 3.0V, falling to

100kΩ at 5.0V

3.2.2 4-Wire Line Interface

Figure 5 shows an interface for use with a 600Ω 4-wire line. The line terminations are provided by R10 and
R13, high frequency noise is attenuated by C11 while R11 and R12 set the receive signal level into the
modem.

Transmit and receive line level settings and the value of R11 are as for the 2-wire circuit.

C12

R10

Rx

Tx

4-Wire

Line

1:1

R13

­+

CMX868

TXA

TXA

R11

C11

R12

C3

RXA
RXA

V

BIAS

RXAFB

Figure 5: 4-Wireline Interface Circuit

R10, 13

600Ω

1 C3 See Figure 2

R11 See text C11 100pF
R12

100kΩ

C12 33nF

Resistors ±5%, capacitors ±20%

Table 5: 4-Wireline Interface Circuit External Components

Low Power V.22bis Modem 9 CMX868 Advance Information

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4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

4 General Description

The CMX868 transmit and receive operating modes are independently programmable.
The transmit mode can be set to any one of the following:

•

V.22bis modem. 2400bps QAM (Quadrature Amplitude Modulation).

•

V.22 and Bell 212A modem. 1200 or 600bps DPSK (Differential Phase Shift Keying).

•

V.21 modem. 300bps FSK (Frequency Shift Keying).

•

Bell 103 modem. 300bps FSK.

•

V.23 modem. 1200 or 75bps FSK.

•

Bell 202 modem. 1200 or 150bps FSK.

•

DTMF transmit.

•

Single tone transmit (from a range of modem calling, answer and other tone frequencies)

•

User programmed tone or tone pair transmit (programmable frequencies and levels)

•

Disabled.

The receive mode can be set to any one of the following:

•

V.22bis modem. 2400bps QAM.

•

V.22 and Bell 212A modem. 1200 or 600bps DPSK.

•

V.21 modem. 300bps FSK.

•

Bell 103 modem. 300bps FSK.

•

V.23 modem. 1200 or 75bps FSK.

•

Bell 202 modem. 1200 or 150bps FSK.

•

DTMF detect.

•

2100Hz and 2225Hz answer tone detect.

•

Call progress signal detect.

•

User programmed tone or tone pair detect.

•

Disabled.

The CMX868 may also be set into a Powersave mode that disables all circuitry except for the C-BUS
interface and the Ring Detector.

Low Power V.22bis Modem 10 CMX868 Advance Information

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4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

4.1 Tx USART

A flexible Tx USART is provided for all modem modes, meeting the requirements of V.14 for QAM and DPSK
modems.

It can be programmed to transmit continuous patterns, Start-Stop characters or Synchronous Data.
In both Synchronous Data and Start-Stop modes the data to be transmitted is written by the µC into the 8-bit

C-BUS Tx Data Register from which it is transferred to the Tx Data Buffer.
If Synchronous Data mode has been selected the 8 data bits in the Tx Data Buffer are transmitted serially, b0

being sent first.
In Start-Stop mode a single Start bit is transmitted, followed by 5, 6, 7 or 8 data bits from the Tx Data Buffer -

b0 first - followed by an optional Parity bit then - normally - one or two Stop bits. The Start, Parity and Stop
bits are generated by the USART as determined by the Tx Mode Register settings and are not taken from the
Tx Data Register.

Tx Data Register

C-BUS Interface

Tx USART

Modem bit rate clock

Continuous

patterns

To FSK or

QAM/DPSK

Modulator

Enable

Tx data

from µC

Start/Stop

bits

Tx Data Buffer

Parity bit generator

USART Control

7 0

Scrambler

Figure 6: Tx USART

Every time the contents of the C-BUS Tx Data Register are transferred to the Tx Data Buffer the Tx Data
Ready flag bit of the Status Register is set to 1 to indicate that a new value should be loaded into the C-BUS
Tx Data Register. This flag bit is cleared to 0 when a new value is loaded into the Tx Data Register.

StartTx Line Signal:

Tx Data Ready flag bit:

Par'y StopB0 B1 B7

Figure 7: Tx USART Function (Start-Stop mode, 8 Data Bits + Parity)

If a new value is not loaded into the Tx Data Register in time for the next Tx Data Register to Tx Data Buffer
transfer then the Status Register Tx Data Underflow bit will be set to 1. In this event the contents of the Tx
Data Buffer will be re-transmitted if Synchronous Data mode has been selected, or if the Tx modem is in
Start-Stop mode then a continuous Stop signal (1) will be transmitted until a new value is loaded into the Tx
Data Register.

In all modes the transmitted bit and baud rates are the nominal rates for the selected modem type, with an
accuracy determined by the XTAL frequency accuracy, however for QAM and DPSK modes V.14 requires
that Start-Stop characters can be transmitted at up to 1% over-speed (basic signaling rate range) or 2.3%
over-speed (extended signaling rate range) by deleting a Stop bit from no more than one out of every 8 (basic
range) or 4 (extended range) consecutive transmitted characters.

To accommodate the V.14 requirement the Tx Data Register has been given two C-BUS addresses, $E3 and
$E4. Data should normally be written to $E3.

In QAM or DPSK Start-Stop modes if data is written to $E4 then the programmed number of Stop bits will be
reduced by one for that character. In this way the µC can delete transmitted Stop bits as needed.

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In FSK Start-Stop modes, data written to $E4 will be transmitted with a 12.5% reduction in the length of the
Stop bit at the end of that character.

In all Synchronous Data modes data written to $E4 will be treated as though it had been written to $E3.
The underspeed transmission requirement of V.14 is automatically met by the CMX868 as in Start-Stop mode

it automatically inserts extra Stop bit(s) if it has to wait for new data to be loaded into the C-BUS Tx Data
Register.

The optional V.22/V.22bis compatible data scrambler can be programmed to invert the next input bit in the
event of 64 consecutive ones appearing at its input. It uses the generating polynomial:

1714

xx1

−−

++

4.2 FSK and QAM/DPSK Modulators

Serial data from the USART is fed via the optional scrambler to the FSK modulator if V.21, V.23, Bell 103 or
Bell 202 mode has been selected or to the QAM/DPSK modulator for V.22, V.22bis and Bell 212A modes.

The FSK modulator generates one of two frequencies according to the transmit mode and the value of current
transmit data bit.

The QAM/DPSK modulator generates a carrier of 1200Hz (Low Band, Calling modem) or 2400Hz (High Band,
Answering modem) which is modulated at 600 symbols/sec as described below:

600bps V.22 signals are transmitted as a +90° carrier phase change for a ‘0’ bit, +270° for ‘1’.
For V.22 and Bell 212A 1200bps DPSK the transmit data stream is divided into groups of two consecutive bits

(dibits) which are encoded as a carrier phase change:

Dibit

(left-hand bit is the first of the pair)

Phase change

00

+90°

01

0°

11

+270°

10

+180°

For V.22bis 2400bps QAM the transmit data stream is divided into groups of 4 consecutive data bits. The first
two bits of each group are encoded as a phase quadrant change and the last two bits define one of four
elements within a quadrant:

First two bits of group

(left-hand bit is the first of the pair)

Phase quadrant change

00

+90° (e.g. quadrant 1 to 2)

01

0° (no change of quadrant)

11

+270° (e.g. quadrant 1 to 4)

10

+180° (e.g. quadrant 1 to 3)

00

11

10

10

10

1001

Q

I

Phase Quadrant 1Phase Quadrant 2

Phase Quadrant 3 Phase Quadrant 4

01

01

01

11

1111

00

0000

Figure 8: V.22 bis Signal Constellation

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4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

4.3 Tx Filter and Equalizer

The FSK or QAM/DPSK modulator output signal is fed through the Transmit Filter and Equalizer block which
limits the out-of-band signal energy to acceptable limits. In 600, 1200 and 2400bps FSK, DPSK and QAM
modes this block includes a fixed compromise line equalizer which is automatically set for the particular
modulation type and frequency band being employed. This fixed compromise line equalizer may be enabled
or disabled by bit 10 of the General Control Register. The amount of Tx equalization provided compensates
for one quarter of the relative amplitude and delay distortion of ETS Test Line 1 over the frequency band
used.

4.4 DTMF/Tone Generator

In DTMF/Tones mode this block generates DTMF signals or single or dual frequency tones. In QAM/DPSK
modem modes, it is used to generate the optional 550 or 1800Hz guard tone.

4.5 Tx Level Control and Output Buffer

The outputs (if present) of the Transmit Filter and DTMF/Tone Generator are summed then passed through
the programmable Tx Level Control and Tx Output Buffer to the pins TXA and

TXA . The Tx Output Buffer

has symmetrical outputs to provide sufficient line voltage swing at low values of V

DD

and to reduce harmonic

distortion of the signal.

4.6 Rx DTMF/Tones Detectors

In Rx Tones Detect mode the received signal, after passing through the Rx Gain Control block, is fed to the
DTMF / Tones / Call Progress / Answer Tone detector. The user may select any of four separate detectors:

The DTMF detector detects standard DTMF signals. A valid DTMF signal will set bit 5 of the Status Register
to 1 for as long as the signal is detected.

The programmable tone pair detector includes two separate tone detectors (see Figure 20). The first detector
will set bit 6 of the Status Register for as long as a valid signal is detected, the second detector sets bit 7, and
bit 10 of the Status Register will be set when both tones are detected.

The Call Progress detector measures the amplitude of the signal at the output of a 275 - 665Hz bandpass
filter and sets bit 10 of the Status Register to 1 when the signal level exceeds the measurement threshold.

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0

10

0 0.5 1 1.5 2 2.5 3 3.5 4

kHz

dB

Figure 9: Response of Call Progress Filter

The Answer Tone detector measures both amplitude and frequency of the received signal and sets bit 6 or bit
7 of the Status Register when a valid 2225Hz or 2100Hz signal is received.

Low Power V.22bis Modem 13 CMX868 Advance Information

2000 MX-COM, Inc. www.mxcom.com tel: [phone] 744 5050 fax: [phone] Doc. # 20480205.006

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

4.7 Rx Modem Filtering and Demodulation

When the receive part of the CMX868 is operating as a modem, the received signal is fed to a bandpass filter
to attenuate unwanted signals and to provide fixed compromise line equalization for 600, 1200 and 2400bps
FSK, DPSK and QAM modes. The characteristics of the bandpass filter and equalizer are determined by the
chosen receive modem type and frequency band. The line equalizer may be enabled or disabled by bit 10 of
the General Control Register and compensates for one quarter of the relative amplitude and delay distortion
of ETS Test Line 1.

The responses of these filters, including the line equalizer and the effect of external components used in
Figure 4 and Figure 5, are shown in Figure 10, Figure 11, Figure 12, and Figure 13:

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0

10

00.511.522.533.54
kHz

dB

Figure 10: QAM/DPSK Rx Filters

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-10

0

10

0 0.5 1 1.5 2 2.5 3 3.5 4

kHz

dB

Figure 11: V.21 Rx Filters

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0

10

0 0.5 1 1.5 2 2.5 3 3.5 4

kHz

dB

Figure 12: Bell 103 Rx Filters

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-10

0

10

0 0.5 1 1.5 2 2.5 3 3.5 4

kHz

dB

Figure 13: Bell 202 / V.23 Rx Filters

The signal level at the output of the Receive Modem Filter and Equalizer is measured in the Modem Energy
Detector block, compared to a threshold value, and the result controls bit 10 of the Status Register.

The output of the Receive Modem Filter and Equalizer is also fed to the FSK or QAM/DPSK demodulator
depending on the selected modem type.