MX COM Inc CMX602AP3, CMX602AD4 Datasheet

COMMUNICATION ICs

g

Calling Line Identifier/Calling

DATA BULLETIN

Features Applications

Automatic CAS Dual Tone Detector

x

High Sensitivity, Low Falsing

Automatic CAS Duration Checking

1PA max. 'Zero-Power' Ring or Line

x

Polarity Reversal Detector

V23/Bell202 FSK Demodulator

x

with Data Retiming facility

PC Interrupt / Wake-up output to

x

minimize system operating power

Low Power Operation 0.5mA at 2.7V

x

DD

Line Identifier on Call Waitin

PRELIMINARY INFORMATION

x

Caller ID/Caller ID on Call Waiting

Telephones
Adjunct Boxes

Bellcore, ETSI, British Telecom, and

x

Mercury Systems

Computer Telephone Integration

x

Call Logging Systems

x

Voice Mail Equipment

x

CMX602A

AMPOUT

FSK

IN-

IN+

V

DD

V

BIAS

V

SS

RD

The CMX602A is a low power CMOS device used for the reception of physical layer signals in Bellcore's
Calling Identity Delivery (CID) and Calling Identity on Call Waiting (CIDCW) systems, British Telecom Calling
Line Identification Service (CLIP), the Cable Communications Association's Caller Display Services (CDS),
and similar evolving services. The CMX602A also meets the requirements of emerging Caller Identity with
Call Waiting Services (CIDCW).

This device includes a 'zero-power' ring or line polarity reversal detector, a dual-tone (2130Hz plus 2750Hz)
internally timed CPE Alerting Signal (CAS) detector, and a 1200-baud FSK Bell202/V23 compatible
asynchronous data demodulator with data retiming circuitry which removes the need for a UART in the
associated µC.

The CMX602A is suitable for use in systems using Bellcore specifications GR-30-CORE and SR-TSV­002476, British Telecom specifications SIN227 and SIN242, CCA TW/P&E/312, ETSI: ETS 300 659 parts 1
and 2 and ETS 300 778 parts 1 and 2, and Mercury Communications MNR 19.

This device may be used with a 2.7V to 5.5V supply and is available in the following packages:
16-pin SOIC (CMX602AD4) and a 16-pin PDIP (CMX602AP3).

CONTENTS

-

+

Input Signal
Amplifier

Power

Supply

Circuits

RT

Bandpass

Filter

XTAL XTAL

Demod

Level

Detector

Tone Alert

Detector

Xtal Osc and

Clock Dividers

Data

Retiming

Mode

Control

Logic

RXD
RXCLK

DET
IRQ

ZP

MODE

¤1999 MX-COM, Inc. www.mxcom.com Tel: [phone] 744 5050 Fax: [phone] Doc. # 20480169.004

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks an service marks are held by their respective companies.

Calling Line Identifier/Calling Line Identifier on Call Waiting 2 CMX602A PRELIMINARY INFORMATION

Section Page

1. Block Diagram................................................................................................................3

2. Signal List.......................................................................................................................4

3. External Components....................................................................................................5

4. General Description.......................................................................................................6

4.1 Mode Control Logic .......................................................................................................... 6

4.2 Input Signal Amplifier........................................................................................................ 6

4.3 Bandpass Filter................................................................................................................. 7

4.4 Level Detector .................................................................................................................. 8

4.5 FSK Demodulator............................................................................................................. 8

4.6 FSK Data Retiming........................................................................................................... 8

4.7 FSK Data Without Retiming.............................................................................................. 9

4.8 Tone Alert Detector ........................................................................................................ 10

4.9 Ring or Line Polarity Reversal Detector.......................................................................... 10

4.10 Xtal Osc and Clock Dividers........................................................................................... 12

5. Application ...................................................................................................................12

5.1 'On-Hook' Operation....................................................................................................... 12

5.1.1 Bellcore System......................................................................................................................12

5.1.2 British Telecom System..........................................................................................................13

5.1.3 Other 'On-Hook' Systems .......................................................................................................13

5.2 'Off-Hook' Operation....................................................................................................... 15

6. Performance Specification..........................................................................................17

6.1 Electrical Performance ................................................................................................... 17

6.1.1 Absolute Maximum Ratings....................................................................................................17

6.1.2 Operating Limits......................................................................................................................17

6.1.3 Operating Characteristics .......................................................................................................18

6.2 Packaging....................................................................................................................... 21

MX-COM, Inc. reserves the right to change specifications at any time and without notice.

¤1999 MX-COM, Inc www.mxcom.com Tel: [phone] 744 5050 Fax: [phone] Doc. # 20480169.004

4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA All trademarks and service marks are held by their respective companies.

Calling Line Identifier/Calling Line Identifier on Call Waiting 3 CMX602A PRELIMINARY INFORMATION

1. Block Diagram

To / From µC

RXD

Data

FSK

RXCLK

Retiming

Demod

DET

IRQ

Level

Detector

Filter

Bandpass

Tone Alert

Mode

Detector

MODE

ZP

Logic

Control

XTAL

C1

3.579545MHz

X1

Xtal Osc and

Clock Dividers

C2

XTAL

RT

C5

AMPOUT

R8

R6

C6

Audio band

IN-

input

DD

V

R5

Power

Supply

BIAS

V

Circuits

SS

V

RD

-

+

Input Signal

Amplifier

IN+

DD

V

C9

C8

Ring or Line Polarity

Reversal Detector input

(components shown

for unbalanced input)

Figure 1: Block Diagram

¤1999 MX-COM, Inc www.mxcom.com Tel: [phone] 744 5050 Fax: [phone] Doc. # 20480169.004

4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA All trademarks and service marks are held by their respective companies.

Calling Line Identifier/Calling Line Identifier on Call Waiting 4 CMX602A PRELIMINARY INFORMATION

2. Signal List

Pin No. Signal Type Description

1

XTAL

2 XTAL input Input to the on-chip Xtal oscillator inverter
3 RD input

4 RT input /

5 AMPOUT output Output of the on-chip Input Signal Amplifier
6 IN - input Inverting input to the on-chip Input Signal Amplifier
7 IN + input Non-inverting input to the on-chip Input Signal Amplifier

V

8
9

V

SS
BIAS

10 MODE

11 ZP input

12

IRQ

13 DET output Logic level output driven by the Ring or Line Polarity Reversal Detector, the

14 RXCLK input

15 RXD output Logic level output carrying either the raw output of the FSK Demodulator or

16

V

DD

output Output of the on-chip Xtal oscillator inverter

Input to the Ring or Line Polarity Reversal Detector

(S)

Open-drain output and Schmitt trigger input forming part of the Ring or Line

output

Polarity Reversal detector. An external resistor to V
V

should be connected to RT to filter and extend the RD input signal

SS

and a capacitor to

DD

power Negative supply
output

Internally generated bias voltage, held at V
'Zero-Power' mode. Should be bypassed to V

/2 when the device is not in

DD

by a capacitor mounted

SS

close to the device pins.

input

(S)

Input used to select the Tone Alert or FSK Level Detection operating mode.
See Section 4.1

High level on this input selects 'Zero-Power' mode, a low level input enables

(S)

the V

supply, the Input signal amplifier, the Bandpass Filter , and either

BIAS

the FSK or the Tone alert circuits depending on the MODE input

output Open-drain output (active low) that may be used as an Interrupt Request /

Wake-up input to the associated µC. Indicates CAS Dual Tone event of
correct duration when device is in Tone Alert Detect Mode. An external pull­up resistor should be connected between this output and V

DD

.

Tone Alert Detector or the FSK Level detect circuits, depending on the
operating mode. When device is in Tone Alert Mode, it may be used as a
near end voice mute control signal. See Section 4.1

Logic level input, which may be used to clock, received data bits out of the
FSK Data Retiming block. When held high disables FSK Data Retiming
block.

re-timed 8-bit characters depending on the state of the RXCLK input. See
Section 4.6

power Positive supply. Levels and thresholds within the device are proportional to

this voltage. Should be bypassed to V

by a capacitor mounted close to the

SS

device pins.

Notes: input (S) = Schmitt trigger input

Table 1 : Signal List

¤1999 MX-COM, Inc www.mxcom.com Tel: [phone] 744 5050 Fax: [phone] Doc. # 20480169.004

4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA All trademarks and service marks are held by their respective companies.

Calling Line Identifier/Calling Line Identifier on Call Waiting 5 CMX602A PRELIMINARY INFORMATION

3. External Components

V

DD

C8

To/From µC

C9

Line

C1

C3

C4

C6

C7

R3

D1-D4

R4

R6

R7

R1

R2

C2

V

DD

R5

C5

R9 R10

A

Line

Protection

Network

B

XTAL

X1

XTAL

RD
RT

AMPOUT

R8

IN­IN+

V

SS

1
2
3
4

CMX602A

5
6
7
8

16
15
14
13
12
11
10

9

V

DD

RXD
RXCLK
DET
IRQ
ZP
MODE

V

BIAS

R11

Note:

provide a low impedance ground connection to the V

It is recommended that the printed circuit board provide a ground plane in the CMX602A area to

pin and to the bypass capacitors C8 and C9.

SS

Figure 2 : Recommended External Components for Bellcore and/or British Telecom Application

R1
R2 Note 1

470k

:r

r

1%
1%

R3, R4 C3, C4
R5, R6

:r

470k

1%
R7 C6, C7 680pF
R8 Note 2, 3

470k: @ 3.3V

r

1%

R11

100k

C1, C2 18pF

0.1PF

C5

C8,C9

0.33PF

0.1PF

:r

20%

r

20%

r

20%

r

20%

r

20%

r

20%

680k: @ 5.0V

R9 Note 2

240k: @ 3.3V

r

1%

X1 Note 4 3.579545MHz

r

0.1%

200k: @ 5.0V

R10

:r

160k

1%

D1 - D4 1N4004

Table 2: Recommended External Components

Recommended External Component Notes:

1. See Section 4.8

2. See Section 4.2

3. The recommended values of R8 were selected for applications in both Bellcore and British Telecom
Systems. Optimum Bellcore-only operation may be achieved by reducing the value of R8 e.g. to 656k
@ 5.0V.

4. For best results, a crystal oscillator design should drive the clock inverter input with signal levels of at
least 40% of V

, peak to peak. Tuning fork crystals generally cannot meet this requirement. To obtain

DD

crystal oscillator design assistance, consult your crystal manufacturer.

:

¤1999 MX-COM, Inc www.mxcom.com Tel: [phone] 744 5050 Fax: [phone] Doc. # 20480169.004

4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA All trademarks and service marks are held by their respective companies.

Calling Line Identifier/Calling Line Identifier on Call Waiting 6 CMX602A PRELIMINARY INFORMATION

4. General Description

4.1 Mode Control Logic

The CMX602A's operating mode and the source of the DET and

outputs are determined by the logic

IRQ

levels applied to the MODE and ZP input pins.

ZP MODE Mode DET output from

IRQ output from

0 0 Tone Alert Detect Tone Alert Signal Detection Valid 'off-hook' CAS Duration.

Ring or Line Polarity Reversal Detector

0 1 FSK Receive FSK Level Detector FSK Data Retiming (if enabled). Ring or

Line Polarity Reversal Detector.

1 0 Zero-Power

Ring or Line Polarity

Ring or Line Polarity Reversal Detector.

Reversal Detector

1 1 Zero-Power

Ring or Line Polarity

None

Reversal Detector

In the 'Zero-Power' modes, power is removed from all of the internal circuitry except for the Ring or Line
Polarity Reversal Detector and the DET and

IRQ

outputs.

4.2 Input Signal Amplifier

The Input Signal Amplifier is used to convert the balanced FSK and Tone Alert signals received over the
telephone line to an unbalanced signal of the correct amplitude for the FSK receiver and Tone Alert Detector
circuits.

AMPOUT

C6

C7

R6

R7

R9 R10

A
B

R8

IN­IN+

V

SS

-

+

Input Signal
Amplifier

V

BIAS

C9

Figure 3: Input Signal Amplifier, balanced input configuration

The design equations for this circuit are:

V

Differential Voltage Gain

R6 = R7 = 470k R10 = 160k

AMPOUT

V

(B-A)

::

RR8

= R9 =

6

R8 R10

u

(R8 - R10)

The target differential voltage gain depends on the expected A and B input signal levels and the CMX602A's
internal overload and threshold levels, which are proportional to the supply voltage.

The CMX602A has been designed to meet the applicable specifications when R8 = 430k: at V
nominal, rising to 680k: at V
V

= 5.0V as indicated in Section 3 and as shown in Figure 5. Reference Notes found in Section 3.

DD

¤1999 MX-COM, Inc www.mxcom.com Tel: [phone] 744 5050 Fax: [phone] Doc. # 20480169.004

4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA All trademarks and service marks are held by their respective companies.

= 5.0V (see note) and R9 = 240k: at V

DD

= 3.0V dropping to 200k: at

DD

DD

= 3.0V

Calling Line Identifier/Calling Line Identifier on Call Waiting 7 CMX602A PRELIMINARY INFORMATION

The Input Signal Amplifier may also be used to allow the CMX602A to operate from an unbalanced signal
source as shown in Figure 4. In this unbalanced signal configuration, the values of R6 and R8 are the same
as used for the balanced input configuration.

AMPOUT

A

C6

R8R6

IN­IN+

V

SS

-

+

Input Signal
Amplifier

V

BIAS

C9

Figure 4: Input Signal Amplifier, unbalanced input configuration

1000

900

800

700

600

R8

500

400

R8 and R9 kΩ

300

200

R9

100

0

33.5

4

V(Volts)

DD

4.5

Figure 5: Input Signal Amplifier, Optimum Values of R8 and R9 vs. V

55.5

DD

4.3 Bandpass Filter

The Bandpass Filter is used to attenuate out of band noise and interfering signals from reaching the FSK
Demodulator, Tone Alert Detector and Level Detector circuits. The characteristics of this filter differ between
FSK and Tone Alert modes. Switched Capacitor filter stages clocked at 57.7kHz provide primary filtering. If
the input signal is band limited to below 28.85kHz then external anti-aliasing filtering is not required.

¤1999 MX-COM, Inc www.mxcom.com Tel: [phone] 744 5050 Fax: [phone] Doc. # 20480169.004

4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA All trademarks and service marks are held by their respective companies.