Murata Electronics North America TY1SC User Manual

Version

Release Date

Comments

0.1

10/01/2018

Initial draft

0.2

11/08/2018

Revisions following first review

0.3

03/27/2019

Revised VBAT_FEM Max Current

0.4

07/01/2019

Added FCC Notice

Type1SC Hardware Design Guidelines

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TABLE OF CONTENTS

1 Introduction ................................................................................................................................................................ 6

1.1 Scope ....................................................................................................................................................... 6

1.2 Audience .................................................................................................................................................. 6

1.3 Contact Information and Support ............................................................................................................. 6

1.4 Text Conventions ..................................................................................................................................... 6

1.5 Acronyms ................................................................................................................................................. 6

1.6 Related Documents ................................................................................................................................. 7

2 Introduction ................................................................................................................................................................ 8

2.1 High Level Block Diagram ........................................................................................................................ 8

2.2 Supported bands ...................................................................................................................................... 8

2.3 Tx Output Power ...................................................................................................................................... 8

2.4 Rx Sensitivity ........................................................................................................................................... 8

2.5 Power Modes ........................................................................................................................................... 8

LS Power Mode ................................................................................................................................ 9

DS Power Mode ............................................................................................................................... 9

DH0 Power Mode ............................................................................................................................. 9

DH1 Power Mode ............................................................................................................................. 9

DH2 Power Mode ............................................................................................................................. 9

PSM Current Draw ........................................................................................................................... 9

eDRX Current Draw ........................................................................................................................ 10

2.6 Certification and Regulatory ................................................................................................................... 11

2.7 Power Supply Range ............................................................................................................................. 11

2.8 Temperature Range ............................................................................................................................... 11

2.9 Mechanical Specifications ...................................................................................................................... 12

2.10 Pin Layout and Descriptions .................................................................................................................. 13

2.11 Reference Circuit ................................................................................................................................... 22

3 Power ....................................................................................................................................................................... 22

3.1 Power Up Sequence .............................................................................................................................. 22

3.2 Power Down Sequence .......................................................................................................................... 22

3.3 Power Supply Scenarios (by Battery Type) ............................................................................................ 22

LiPo Battery (3.2 ~ 4.35 V) ............................................................................................................. 23

CR17450 Battery (2.2 ~ 3.0 V) ....................................................................................................... 23

AA Lithium Battery (1.0 ~ 1.5 V) ..................................................................................................... 23

3.4 PMU ....................................................................................................................................................... 23

PMU_SHUTDOWN ........................................................................................................................ 24

PMU_POWER_BUTTON ............................................................................................................... 24

PMU_WAKEUP .............................................................................................................................. 24

4 SIM Interface ............................................................................................................................................................ 24

5 Host Interface ........................................................................................................................................................... 24

6 Antenna Requirements ............................................................................................................................................ 25

6.1 Main Antenna ......................................................................................................................................... 25

6.2 MIPI RFFE for Antenna Tuning .............................................................................................................. 26

6.3 GPS Coexistence ................................................................................................................................... 26

7 APPLICATION PCB DESIGN .................................................................................................................................. 26

7.1 Solder Reflow ......................................................................................................................................... 26

Antenna Installation Guidelines ...................................................................................................... 27

PCB Design Guidelines .................................................................................................................. 27

Transmission line design ................................................................................................................ 28

8 FCC Notice ............................................................................................................................................................... 29

8.1 FCC Test Data........................................................................................................................................ 29

8.2 ISED Test Data....................................................................................................................................... 29

LIST OF FIGURES

Figure 1 Module block diagram ........................................................................................................ 8

Figure 2 Land pattern: top view, in millimeters ................................................................................ 12

Figure 3 Pin layout: top view .......................................................................................................... 13

Figure 4 Power up sequence ......................................................................................................... 22

LIST OF TABLES

Table 1 Supported bands ................................................................................................................................................... 8

Table 2 Power supply range ............................................................................................................................................. 11

Table 3 Temperature range .............................................................................................................................................. 11

Table 4 Pin description ..................................................................................................................................................... 21

Table 5 I/Os with PU/PD ................................................................................................................................................... 21

Table 6 Special UART signals for certification/testing ..................................................................................................... 22

Table 7 PMU system signals ............................................................................................................................................ 23

Table 8 Host interface signals .......................................................................................................................................... 25

Acronym

Meaning

3GPP

3rd Generation Partnership Project

API

Application Programming Interface

CPU

Central Processing Unit

eDRX

Extended Discontinuous Reception

eMTC

enhanced Machine-Type Communication

EVB

Evaluation Board

Firmware

GPIO

General Purpose Input/Output

FEM

Front End Module

Hyper Frame (10.24s)

MIPI

Mobile Industry Processor Interface

IoT

Internet of Things

LiPo

Lithium-ion Polymer

LTE

Long Term Evolution

LPWA

Low Power Wide Area

Personal Computer

PSM

Power Saving Mode

PTW

Paging Time Window

Radio Frequency

RFFE

RF Front End

SoC

System on Chip

Software

UART

Universal Asynchronous Receiver/Transmitter

USB

Universal Serial Bus

1 Introduction

1.1 Scope

This document introduces the Murata Type1SC LTE CatM1/NB1 module and presents some possible and recommended guidelines for developing new products based on this module. The information given should be used as a guide and a starting point for properly developing products with the Murata module.

1.2 Audience

This document is intended for Murata customers, especially system architects and HW engineers, to design products based on the Murata Type1SC module.

1.3 Contact Information and Support

For general contact, technical support services, technical questions and report documentation errors contact Murata Technical Support at techhelp@murata.com

Please keep us informed of your comments and suggestions for improvements. Murata will take into consideration any and all feedback from the users of this information.

1.4 Text Conventions

Danger – This information MUST be followed or catastrophic equipment failure or bodily injury may occur.

Caution/Warning

Alerts the user to important points about using the product; if these points are not followed, the product and end user equipment may fail or malfunction.

Tip/Information – Provides advice and suggestions that may be useful when using the product.

1.5 Acronyms

1.6 Related Documents

[1] Type1SC Reference Schematics

Product

LTE Bands

Regions

LBAD0XX1SC

LB: B5/B8/B12/B13/B14/B17/B18/B19/B20/B26/B28

MB: B1:B2/B3/B4/B25

Americas, EU and

2 Introduction

Type1SC is Murata’s new LTE series for IoT applications. The module can be used as a wireless communication front-end for wearable products, offering mobile communication features to an external host CPU through its interfaces.

Note: NB1 will be supported in a future firmware release.

2.1 High Level Block Diagram

The following block diagram illustrates the module which contains the ALT1250 LTE Cat M1/NB1 SoC, RF FEM, 128 MBits flash and clocks.

Figure 1 Module block diagram

2.2 Supported bands

The module supports the following bands:

Table 1 Supported bands

ASEAN

2.3 Tx Output Power

The LTE bands in the 1SC module meet the 3GPP spec for a Power Class 3 device (23 dBm).

2.4 Rx Sensitivity

The receive sensitivity of the module will be around -103 dBm.

2.5 Power Modes

The 1SC module has the following power modes

• LS: Provides very fast entry and recovery time and is mainly used for very short sleeps. It is used for CDRX mode during the networking process.

• DS: Provides fast recovery and entry time and is mainly used during the IDRX networking mode.

• DH2: Provides medium entry and recovery time and is mainly used during the EDRX and IDRX networking

modes.

• DH1: Same as DH2, however IO logic is not retained.

• DH05: Provides long entry and recovery times and is mainly used for very long inactivity intervals like PSM.

The IO output values are retained in this mode.

• DH0: Same as DH05, however IO output values are not retained.

The device chooses the described power modes according to the networking state and the maximum allowed chip power mode configuration.

An application note will be provided to show how to configure the module and the R&S CMW500 to test the different power modes.

LS Power Mode

Only one of the following pins can be used to wake up the device

• RTC Expiration

• PMU_POWER_BUTTON

• PMU_WAKEUP

• PMU_SHUTDOWN

• AntiTamper

Other digital interface pins can also be configured to wake up the system (up to 10 GPIO’s can be used). Serial interface pins are not active in this mode

DS Power Mode

This mode is the same as LS, but requires lower power consumption due to the unused reference clock.

The average current draw in this mode of operation is 2.5mA.

DH0 Power Mode

The following occurs in the DH0 power mode:

• All digital logic is powered down

• Memories are not retained

• IO’s are not stored

• The RTC is on

• One of the following dedicated pins is used to wake from this mode:

o RTC Expiration o PMU_POWER_BUTTON o PMU_WAKEUP o PMU_SHUTDOWN o AntiTamper

The average current draw in this mode of operation is 1.7uA.

DH1 Power Mode This mode is similar to DH0, however it enables memory retention to store the system sate. A Wakeup event will only initiate a boot flow in a case of state full configuration

The average current draw in this mode of operation is 48uA.

DH2 Power Mode This mode is similar to DH1, however it also enables output IOs to latch and wakeup from digital inputs (up to 10 GPIO’s can be used)

The current draw is similar to DH1, but will depend on the extra current draw of the GPIOs.

PSM Current Draw Currently the PSM mode of operation is not optimized so the current draw will vary. This will be fixed in a future version of firmware. This figure below represents the worst-case condition (This was tested with RK _50). Current ideal conditions the average current should be 33.76mA.

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