8
+12V_BUS
C1
CAP CER 10UF 20% 16V X5R
10UFC110UF
(1206)1.8MM H MAX
+12V_BUS
+12V_BUS
C2
D D
+3.3V_BUS
+3.3V_BUS
C C
B B
C3
150nF_16VC2150nF_16V
150nF_16VC3150nF_16V
CAP CER 10UF 10% 6.3V X6S
(0805)1.4MM MAX THI C K
C5
10uF_X6SC510uF_X6S
C8
C7
C6
1uF_6.3VC71uF_6.3V
100nF_6.3VC6100nF_6.3V
Place these caps as close to the PCIE
connector as possible
10nFC810nF
7
+3.3V
R5
R6
NC_4.7KR5NC_4.7K
NC_4.7KR6NC_4.7K
C9
C9
DNI DNI
NC_100nF_6.3V
GPIO_4 (7)
GPIO_3 (7)
TEST_EN_J TEST_EN_J
NC_100nF_6.3V
R10RR1
0R
(2)
+3.3V_BUS
PETn0_GFXRn0 (2)
PETp1_GFXRp1
PETn1_GFXRn1 (2)
PETp2_GFXRp2 (2)
PETn2_GFXRn2 (2)
PETp3_GFXRp3 (2)
PETn3_GFXRn3 (2)
PETp4_GFXRp4 (2)
PETn4_GFXRn4 (2)
PETp5_GFXRp5 (2)
PETn5_GFXRn5 (2)
PETp6_GFXRp6 (2)
PETn6_GFXRn6 (2)
PETp7_GFXRp7 (2)
PETn7_GFXRn7 (2)
PETp8_GFXRp8 (2)
PETn8_GFXRn8 (2)
PETp9_GFXRp9 (2)
PETn9_GFXRn9 (2)
PETp10_GFXRp10 (2)
PETn10_GFXRn10 (2)
PETp11_GFXRp11 (2)
PETn11_GFXRn11 (2)
PETp12_GFXRp12 (2)
PETn12_GFXRn12 (2)
PETp13_GFXRp13 (2)
PETn13_GFXRn13 (2)
PETp14_GFXRp14 (2)
PETn14_GFXRn14 (2)
PETp15_GFXRp15 (2)
PETn15_GFXRn15 (2)
6
U12
U12
VCC8OE1
1B2OE2
6
2B
1A
4
2A
GND
NC_NC7WB66K8X
NC_NC7WB66K8X
NC_0RR7NC_0R
R7
NC_0RR8NC_0R
R8
DNI , To Bypass U12
+3.3V_BUS
JTRST
PRESENCE
5
PCI-EXPRESS EDGE CONNECTOR
7
3
1
5
C10
C10
NC_100nF_6.3V
NC_100nF_6.3V
SMCLK
SMDAT
+12V_BUS
+3.3V
R4
NC_0RR4NC_0R
B1
+12V#B1
B2
+12V#B2
B3
+12V#B3
B4
GND#B4
B5
SMCLK
B6
SMDAT
B7
GND#B7
B8
+3.3V#B8
B9
JTAG1
B10
3.3Vaux
B11
WAKE#
Mechanical Key
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
Mechanical Key
RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
機
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82
x16 PCIe
x16 PCIe
PRSNT1#A1
+12V#A2
+12V#A3
GND#A4
JTAG2
JTAG3
JTAG4
JTAG5
+3.3V#A9
+3.3V#A10
PERST#
GND#A12
REFCLK+
REFCLKGND#A15
PERp0
PERn0
GND#A18
RSVD#A19
GND#A20
PERp1
PERn1
GND#A23
GND#A24
PERp2
PERn2
GND#A27
GND#A28
PERp3
PERn3
GND#A31
RSVD#A32
RSVD#A33
GND#A34
PERp4
PERn4
GND#A37
GND#A38
PERp5
PERn5
GND#A41
GND#A42
PERp6
PERn6
GND#A45
GND#A46
PERp7
PERn7
GND#A49
RSVD#A50
GND#A51
PERp8
PERn8
GND#A54
GND#A55
PERp9
PERn9
GND#A58
GND#A59
PERp10
密
PERn10
GND#A62
GND#A63
PERp11
PERn11
GND#A66
GND#A67
PERp12
PERn12
GND#A70
GND#A71
PERp13
PERn13
GND#A74
GND#A75
PERp14
PERn14
GND#A78
GND#A79
PERp15
PERn15
GND#A82
MPCIE1
MPCIE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
PRESENCE
4
TP2
TP2
TP1
TP1
TP5
TP5
35mil
35mil
35mil
35mil
35mil
+12V_BUS
+3.3V_BUS
JTCK
JTDI
JTDO
JTMS
PERp0
PERn0
PERp1
PERn1
PERp2
PERn2
PERp3
PERn3
PERp4
PERn4
PERp5
PERn5
PERp6
PERn6
文件
PERp7
PERn7
PERp8
PERn8
PERp9
PERn9
PERp10
PERn10
PERp11
PERn11
PERp12
PERn12
PERp13
PERn13
PERp14
PERn14
PERp15
PERn15
35mil
3
TP3
TP3
35mil
35mil
No JTAG
R2 0R R2 0R
NC_TDA08H0SB1R
NC_TDA08H0SB1R
JTRST
TSW1
TSW1
PCIE_REFCLKP (2)
PCIE_REFCLKN (2) PETp0_GFXRp0 (2)
PERp0 (2)
PERn0 (2)
PERp1 (2)
PERn1 (2)
PERp2 (2)
PERn2 (2)
PERp3 (2)
PERn3 (2)
PERp4 (2)
PERn4 (2)
PERp5 (2)
PERn5 (2)
PERp6 (2)
PERn6 (2)
PERp7 (2)
PERn7 (2)
PERp8 (2)
PERn8 (2)
PERp9 (2)
PERn9 (2)
PERp10 (2)
PERn10 (2)
PERp11 (2)
PERn11 (2)
PERp12 (2)
PERn12 (2)
PERp13 (2)
PERn13 (2)
PERp14 (2)
PERn14 (2)
PERp15 (2)
PERn15 (2)
2
TP4
TP4
35mil
35mil
9 8
10 7
11 6
12 5
13 4
14 3
15 2
16 1
JTAG_TRSTB (7)
JTAG_TCK (7)
JTAG_TDI (7)
JTAG_TDO (7)
JTAG_TMS (7)
PERST#
JTAG_MODE
JTAG_MODE (7)
1
2
R3 NC_0R R3 NC_0R
1
R9 & MR9 can share pa d
R9 0R R9 0R
MR9 NC_0R MR9 NC_0R
C4
100nF_6.3VC4100nF_6.3V
NC7SZ08P5X_NL
NC7SZ08P5X_NL
4
U11
U11
R_RST
DNI
+3.3V_BUS
+3.3V
PERST#_buf (2,11,17)
Place R3 in U5
Table 1: Connection for JTAG
Production
(No JTAG)
Internal Use Only
TSW1, R1 & R2 are located on the bottom side of the board close to PCIE con necto r.
Install R1, R2 & Don't Install TSW1
Install TSW1 & Don't Install R1 & R2
TSW1 Switch #1, 2, 3, 4, 5 and 6 close d (ON)
JTAG
#8 and 7 open
TSW1 Switch #1, 2, 3, 4, 5 and 6 open
NO JTAG
#8 & 7 closed (ON)
A A
8
7
Printed with FinePrint - purchase at www.fineprint.com
SYMBOL LEGEND
DO NOT
DNI
INSTALL
ACTIVE
#
LOW
DIGITAL
GROUND
ANALOG
GROUND
BUO BRING UP
Doc No.
Doc No.
Doc No.
1
ONLY
Rev Date:
Rev Date:
Rev Date:
1
1
1
105-B507xx-10
105-B507xx-10
105-B507xx-10
HD4870XG5-v10
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
from use of the information include d herein .
from use of the information include d herein .
from use of the information include d herein .
Title
Title
6
5
4
3
Title
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
2
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Thursday, October 09, 2008
Thursday, October 09, 2008
Thursday, October 09, 2008
Sheet
Sheet
Sheet
12 2
12 2
12 2
of
of
of
www.vinafix.vn
5
NOTE: some of the PCIE test point s wil l
be available trought via on traces.
1uF_6.3V
1uF_6.3V
C99
C99
TP15TP15
TP8TP8
TP9TP9
TP16TP16
TP18TP18
TP12TP12
TP20TP20
TP21TP21
TP25TP25
TP27TP27
C91
C91
100nF_6.3V
100nF_6.3V
C100
C100
1uF_6.3V
1uF_6.3V
TP6TP6
TP13TP13
TP14TP14
TP7TP7
TP17TP17
TP10TP10
TP11TP11
TP19TP19
TP22TP22
TP23TP23
TP26TP26
C92
C92
+PCIE_VDDC
1uF_6.3V
1uF_6.3V
D D
C C
PCIE_REFCLKP (1)
PCIE_REFCLKN (1)
+1.1V +PCIE_VDDC
B B
B23
B23
+PCIE_VDDR +1.8V
26R_600mA
26R_600mA
4.7uF_6.3V
4.7uF_6.3V
A A
PETp0_GFXRp0 (1)
PETn0_GFXRn0 (1)
PETp1_GFXRp1 (1)
PETn1_GFXRn1 (1)
PETp2_GFXRp2 (1)
PETn2_GFXRn2 (1)
PETp3_GFXRp3 (1)
PETn3_GFXRn3 (1)
PETp4_GFXRp4 (1)
PETn4_GFXRn4 (1)
PETp5_GFXRp5 (1)
PETn5_GFXRn5 (1)
PETp6_GFXRp6 (1)
PETn6_GFXRn6 (1)
PETp7_GFXRp7 (1)
PETn7_GFXRn7 (1)
PETp8_GFXRp8 (1)
PETp9_GFXRp9 (1)
PETn9_GFXRn9 (1)
PETp10_GFXRp10 (1)
PETn10_GFXRn10 (1)
PETp11_GFXRp11 (1)
PETn11_GFXRn11 (1)
PETp12_GFXRp12 (1)
PETn12_GFXRn12 (1)
PETp13_GFXRp13 (1)
PETn13_GFXRn13 (1)
PETp14_GFXRp14 (1)
PETn14_GFXRn14 (1)
PETp15_GFXRp15 (1)
PETn15_GFXRn15 (1)
B21 220R_2A B21 220R_2A
10uF_X6S
10uF_X6S
C94
C94
1uF_6.3V
1uF_6.3V
C88
C88
C51
C51
1uF_6.3V
1uF_6.3V
C95
C95
C96
C96
100nF_6.3V
100nF_6.3V
1uF_6.3V
1uF_6.3V
5
1uF_6.3V
1uF_6.3V
C97
C97
C90
C90
C89
C89
1uF_6.3V
1uF_6.3V
C98
C98
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C101
C101
4
U1A
U1A
AM48
PCIE_RX0P
AL49
PCIE_RX0N
AL51
PCIE_RX1P
AK52
PCIE_RX1N
AK48
PCIE_RX2P
AJ49
PCIE_RX2N
AJ51
PCIE_RX3P
AH52
PCIE_RX3N
AH48
PCIE_RX4P
AG49
PCIE_RX4N
AG51
PCIE_RX5P
AF52
PCIE_RX5N
AF48
PCIE_RX6P
AE49
PCIE_RX6N
AE51
PCIE_RX7P
AD52
PCIE_RX7N
AD48
PCIE_RX8P
AC49
PCIE_RX8N
AC51
PCIE_RX9P
AB52
PCIE_RX9N
AB48
PCIE_RX10P
AA49
PCIE_RX10N
AA51
PCIE_RX11P
Y52
PCIE_RX11N
Y48
PCIE_RX12P
W49
PCIE_RX12N
W51
PCIE_RX13P
V52
PCIE_RX13N
V48
PCIE_RX14P
U49
PCIE_RX14N
U51
PCIE_RX15P
T52
PCIE_RX15N
AM45
PCIE_REFCLKP
AM44
AA38
AA39
AB37
AB38
AB39
AD37
AD38
AD39
AE37
AE38
AE39
AM40
AH37
AK38
AK39
AK37
AM37
AM38
AM39
AN37
AN38
AN39
AR39
AR40
AA40
AA43
AA47
AB50
AB40
AB43
AC53
AC47
AD50
AD40
AD43
AE53
AE40
AE43
AE47
AG53
AG47
AF39
AF38
AF37
W38
W39
W40
W41
W42
W43
W44
W45
AJ38
AJ39
AJ37
AF50
AF40
AF43
PCIE_REFCLKN
PCIE_CALRP
PCIE_CALRN
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
PCIE_VDDC#13
PCIE_VDDC#14
PCIE_VDDC#15
PCIE_VDDC#16
PCIE_VDDC#17
PCIE_VDDC#18
PCIE_VDDC#19
PCIE_VDDC#20
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDR#9
PCIE_VDDR#10
PCIE_VDDR#11
PCIE_VDDR#12
PCIE_VDDR#13
PCIE_VDDR#14
PCIE_VDDR#15
PCIE_VDDR#16
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
R22 1.27K R22 1.27K
2.0K
2.0K
R24
R24
C93
C93
4
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PCIE_PVDD
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35
PCIE_VSS#36
PCIE_VSS#37
PCIE_VSS#38
PCIE_VSS#39
PCIE_VSS#40
PCIE_VSS#41
PCIE_VSS#42
PCIE_VSS#43
PCIE_VSS#44
PCIE_VSS#45
PCIE_VSS#46
PCIE_VSS#47
PCIE_VSS#48
PCIE_VSS#49
PCIE_VSS#50
PCIE_VSS#51
PCIE_VSS#52
PCIE_VSS#53
PCIE_VSS#54
PCIE_VSS#55
PCIE_VSS#56
PCIE_VSS#57
PCIE_VSS#58
PCIE_VSS#59
PCIE_VSS#60
PCIE_VSS#61
PCIE_VSS#62
PCIE_VSS#63
PCIE_VSS#64
PCIE_VSS#65
PCIE_VSS#66
PCIE_VSS#67
PCIE_VSS#68
PCIE_VSS#69
PCIE_VSS#70
PCIE_VSS#71
PCIE_VSS#72
PCIE_VSS#73
PCIE_VSS#74
PCIE_VSS#75
PCIE_VSS#76
PCIE_VSS#77
PCIE_VSS#78
PCIE_VSS#79
PCIE_VSS#80
PCIE_VSS#81
PCIE_VSS#82
RV770 GL A11
RV770 GL A11
PERSTB
PCIE_TX0P
AK45
PCIE_TX0N
AK44
PCIE_TX1P
AK42
PCIE_TX1N
AK41
PCIE_TX2P
AJ45
PCIE_TX2N
AJ44
PCIE_TX3P
AJ42
PCIE_TX3N
AJ41
PCIE_TX4P
AH45
PCIE_TX4N
AH44
PCIE_TX5P
AH42
PCIE_TX5N
AH41
PCIE_TX6P
AF45
PCIE_TX6N
AF44
PCIE_TX7P
AF42
PCIE_TX7N
AF41
PCIE_TX8P
AE45
PCIE_TX8N
AE44
PCIE_TX9P
AE42
PCIE_TX9N
AE41
PCIE_TX10P
AD45
PCIE_TX10N
AD44
PCIE_TX11P
AD42
PCIE_TX11N
AD41
PCIE_TX12P
AB45
PCIE_TX12N
AB44
PCIE_TX13P
AB42
PCIE_TX13N
AB41
PCIE_TX14P
AA45
PCIE_TX14N
AA44
PCIE_TX15P
AA42
PCIE_TX15N
AA41
AT39
AR37
AH50
AH40
AH43
AJ53
AJ40
AJ43
AJ47
AK50
AK40
AK43
AL53
AL47
AM50
AA53
AM43
AN53
AN40
機
AN43
AN47
AP50
AR53
Y50
AR43
AR47
AT50
AT40
AT43
AU53
AU40
AU43
AU47
AV50
AW53
AW40
AW43
AW47
AY50
AY40
AY43
BA53
BA47
BB50
BB43
BC53
BB42
BC47
BD50
BD44
BD45
BF53
BE47
BF50
BJ53
BL45
BN46
W47
BN49
T50
U53
U47
V50
W53
3
C57
C57
C52
C52
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
C58
C58
100nF_6.3V
100nF_6.3V
C60
C60
100nF_6.3V
100nF_6.3V
C62
C62
100nF_6.3V
100nF_6.3V
C54
C54
100nF_6.3V
100nF_6.3V
C64
C64
100nF_6.3V
100nF_6.3V
C55
C55
100nF_6.3V
100nF_6.3V
C67
C67
100nF_6.3V
100nF_6.3V
C69
C69
100nF_6.3V
100nF_6.3V
C71
C71
100nF_6.3V
100nF_6.3V
C72
C72
100nF_6.3V
100nF_6.3V
C74
C74
100nF_6.3V
100nF_6.3V
C76
C76
100nF_6.3V
100nF_6.3V
C78
C78
100nF_6.3V
100nF_6.3V
C80
C80
100nF_6.3V
100nF_6.3V
C82
C82
100nF_6.3V
100nF_6.3V
PERST#_buf (1,11,17)
C85
C85
C86
100nF_6.3V
100nF_6.3V
C86
10uF_X6S
10uF_X6S
C84
C84
10nF
10nF
密
3
C59
C59
100nF_6.3V
100nF_6.3V
C61
C61
100nF_6.3V
100nF_6.3V
C53
C53
100nF_6.3V
100nF_6.3V
C63
C63
100nF_6.3V
100nF_6.3V
C65
C65
100nF_6.3V
100nF_6.3V
C66
C66
100nF_6.3V
100nF_6.3V
C68
C68
100nF_6.3V
100nF_6.3V
C70
C70
100nF_6.3V
100nF_6.3V
C56
C56
100nF_6.3V
100nF_6.3V
C73
C73
100nF_6.3V
100nF_6.3V
C75
C75
100nF_6.3V
100nF_6.3V
C77
C77
100nF_6.3V
100nF_6.3V
C79
C79
100nF_6.3V
100nF_6.3V TP24TP24
C81
C81
100nF_6.3V
100nF_6.3V
C83
C83
100nF_6.3V
100nF_6.3V
文件
+PCIE_PVDD +1.8V
BLM15BD121SN1
BLM15BD121SN1
B22
B22
C87
C87
1uF_6.3V
1uF_6.3V
PERp0 (1)
PERn0 (1)
PERp1 (1)
PERn1 (1)
PERp2 (1)
PERn2 (1)
PERp3 (1)
PERn3 (1)
PERp4 (1)
PERn4 (1)
PERp5 (1)
PERn5 (1)
PERp6 (1)
PERn6 (1)
PERp7 (1)
PERn7 (1)
PERp8 (1)
PERn8 (1) PETn8_GFXRn8 (1)
PERp9 (1)
PERn9 (1)
PERp10 (1)
PERn10 (1)
PERp11 (1)
PERn11 (1)
PERp12 (1)
PERn12 (1)
PERp13 (1)
PERn13 (1)
PERp14 (1)
PERn14 (1)
PERp15 (1)
PERn15 (1)
2
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
from use of the information include d herein .
from use of the information include d herein .
from use of the information include d herein .
Title
Title
Title
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
2
RH RV770 GDDR5 DVI-I VO DVI-I FH
1
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Thursday, October 09, 2008
Thursday, October 09, 2008
Thursday, October 09, 2008
Sheet
Sheet
Sheet
22 2
22 2
22 2
of
of
of
1
Doc No.
Doc No.
Doc No.
Rev Date:
Rev Date:
Rev Date:
1
1
1
105-B507xx-10
105-B507xx-10
105-B507xx-10
Printed with FinePrint - purchase at www.fineprint.com
www.vinafix.vn
5
4
Recommended caps:
(see BOM for qualified value s/vendors)
10uF , X6S, 0805, 6.3V, 1.4MM MAX THICK
4.7uF , X6S/X5R, 0603, 6.3V/4V
1uF, X6S, 0402, 6.3V
100nF, X7R, 0402
10nF , X7R, 0402
3
2
Q102
Q102
SI2304DS
SI2304DS
1
LVT_EN (17)
1
D D
+1.8V
LVT_EN (17)
C C
+1.8V
+1.8V
B B
BLM15BD121SN1
BLM15BD121SN1
+1.8V
B108
B108
BLM15BD121SN1
BLM15BD121SN1
+1.1V
B109
B109
BLM15BD121SN1
BLM15BD121SN1
+1.8V
B110
B110
12
B118
B118
B111
B111
GND_DPLL_PVDD
C150
C150
1uF_6.3V
1uF_6.3V
A A
+1.8V
+3.3V_BUS
Install B118 & DNI
B111 for 1.8V
Oscillators
BLM15BD121SN1
BLM15BD121SN1
NC_BLM15BD121SN1
NC_BLM15BD121SN1
BLM15BD121SN1
BLM15BD121SN1
B103
B103
NS1
NS1
NS_VIA
NS_VIA
12
BLM15BD121SN1
BLM15BD121SN1
B105
B105
NS3
NS3
NS_VIA
NS_VIA
12
GND_T2PVSS
+1.8V
12
GND_A2VSSQ
+DPLL_PVDD
NS6 NS_VIA NS6 NS_VIA
C151
C151
100nF_6.3V
100nF_6.3V
+DPA_PVDD
MC3
MC3
4.7uF_6.3V
4.7uF_6.3V
NC_10uF_X6S
NC_10uF_X6S
Overlap footprints
+T2PVDD
BLM15BD121SN1
BLM15BD121SN1
B123
B123
+A2VDDQ
NS5 NS_VIA NS5 NS_VIA
1uF_6.3V
1uF_6.3V
10uF_X6S
10uF_X6S
Oscillator Option
5
SI2304DS
SI2304DS
C143
C143
C147
C147
OSC_EN (14)
Q101
Q101
C125
C125
3 2
C132
C132
10uF_X6S
10uF_X6S
+3.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
+1.1V
Use 0R
10R_1A_0402
10R_1A_0402
C126
C126
1uF_6.3V
1uF_6.3V
+1.8V
+VDD1DI
12
BLM15BD121SN1
BLM15BD121SN1
C144
C144
100nF_6.3V
100nF_6.3V
C145
C145
C148
C148
OSC_EN
B102
B102
SSCLKIN (7)
10R_1A_0402
10R_1A_0402
B100
B100
4.7uF_6.3V
4.7uF_6.3V
C127
C127
100nF
100nF
C133
C133
1uF_6.3V
1uF_6.3V
BLM15BD121SN1
BLM15BD121SN1
B115
B115
NS10 NS_VI A NS10 NS_VIA
B106
B106
+1.8V
C146
C146
100nF_6.3V
100nF_6.3V
C149
C149
100nF_6.3V
100nF_6.3V
Y1
Y1
4
VCC
1
TRISTATE
100MHZ_1.8V
100MHZ_1.8V
+DPA_VDDR
Overlap footprints
C122
C122
MC122
MC122
NC_10uF_X6S
NC_10uF_X6S
GND_DPAVSS
C134
C134
100nF_6.3V
100nF_6.3V
+AVDD
NS9 NS_VIA NS9 NS_VIA
12
C371
C371
100nF_6.3V
100nF_6.3V
1uF_6.3V
1uF_6.3V
GND_VSS1DI
+A2VDD
C136
C136
4.7uF_6.3V
4.7uF_6.3V
BLM15BD121SN1
BLM15BD121SN1
B107
B107
3
OUT
2
GND
Overlap footprints
MC50
MC50
4.7uF_6.3V
4.7uF_6.3V
NC_10uF_X6S
NC_10uF_X6S
C111
C111
1uF_6.3V
1uF_6.3V
100nF_6.3V
100nF_6.3V
C368
C368
C369
C369
100nF_6.3V
100nF_6.3V
1uF_6.3V
1uF_6.3V
GND_AVSSQ
C372
C372
C373
C373
10nF
10nF
C138
C138
C137
C137
100nF_6.3V
100nF_6.3V
1uF_6.3V
1uF_6.3V
+VDD2DI
NS4 NS_VIA NS4 NS_VIA
12
GND_A2VSSQ
Crystal Option
3
4
C112
C112
NC_18pF_50V
NC_18pF_50V
Place holder only
Install 0R for 1.8V Osil lator s
R112
DNI for
1.8V
Osillators
4
C50
C50
+T2XVDDC
C123
C123
NC_50MHZ
NC_50MHZ
XTAL2
GND4
C370
C370
C139
C139
C140
C140
1uF_6.3V
1uF_6.3V
GND_VSS2DI
R116 NC_1M R116 NC_1M
XTAL1
GND2
MY1
MY1
0RR112 0R
C104
C104
1uF_6.3V
1uF_6.3V
10nF
10nF
GND_AVSSQ
10nF
10nF
1
2
R113
R113
NC_221R
NC_221R
100nF_6.3V
100nF_6.3V
XTAL1 XTAL2
C117
C117
100nF
100nF
R109 150R R109 150R
GND_A2VSSQ
C141
C141
NC_0R
NC_0R
R117
R117
C113
C113
NC_18pF_50V
NC_18pF_50V
XTALIN
DP_CALR
R110 499R R110 499R
C142
C142
10nF
10nF
R111 715R R111 715R
XTALOUT
U1B
U1B
BD29
DPAVDDR#1
BE29
DPAVDDR#2
BG25
DPAVSSR#1
BN27
DPAVSSR#2
BN25
DPAVSSR#3
BG27
DPAVSSR#4
BK26
DPAVSSR#5
BK28
DPAVSSR#6
BM24
DPAVSSR#7
BD30
DPBVDDR#1
BE30
DPBVDDR#2
BK32
DPBVSSR#1
BG31
DPBVSSR#2
BN29
DPBVSSR#3
BN31
DPBVSSR#4
BH32
DPBVSSR#5
BK30
DPBVSSR#6
BG29
DPBVSSR#7
BG37
T2XVDDC#1
BK38
T2XVDDC#2
BK44
T2VXDDC#3
BM44
T2XVDDC#4
BG35
T2XVSSR#1
BN41
T2XVSSR#2
BM34
T2XVSSR#3
BG39
T2XVSSR#4
BK36
T2XVSSR#5
BJ43
T2XVSSR#6
BN43
T2XVSSR#7
BK40
T2XVSSR#8
BN35
T2XVSSR#9
BN37
T2XVSSR#10
BN39
T2XVSSR#11
BG41
T2XVSSR#12
BH42
T2XVSSR#13
BE26
DPA_PVDD
BD26
DPA_PVSS
BE28
DPB_PVDD
BD28
DPB_PVSS
BC29
DP_CALR
BN33
T2PVDD
BL33
T2PVSS
BC40
AVDD
BB40
AVSSQ
BG45
VDD1DI
BE44
VSS1DI
機
BA40
RSET
BD39
A2VDD
BC39
A2VSSQ
BD43
VDD2DI
BE43
R2SET GND_A2VSSQ
VSS2DI
BB39
R2SET
BE39
A2VDDQ
BD33
DPLL_VDDC
BG33
DPLL_PVDD
TP28
TP28
BE33
DPLL_PVSS
35mil
35mil
AV37
PLLTEST
BH44
XTALIN
BJ45
XTALOUT
RV770 GL A11
RV770 GL A11
Multi footprint with MY1
3
4
3
BM26
TX0P_DPA2P
BL25
TX0M_DPA2N
BJ27
TX1P_DPA1P
BH26
TX1M_DPA1N
BM28
TX2P_DPA0P
BL27
TX2M_DPA0N
BJ25
TXCAP_DPA3P
BK24
TXCAM_DPA3N
BM30
TX3P_DPB2P
BL29
TX3M_DPB2N
BJ31
TX4P_DPB1P
BH30
TX4M_DPB1N
BM32
TX5P_DPB0P
BL31
TX5M_DPB0N
BJ29
TXCBP_DPB3P
BH28
TXCBM_DPB3N
BJ35
T2X0P
BH34
T2X0M
BM36
T2X1P
BL35
T2X1M
BJ37
T2X2P
BH36
T2X2M
BM38
T2X3P
BL37
T2X3M
BK34
T2XCLKP
BJ33
T2XCLKM
BM40
T2X4P
BL39
T2X4M
BJ41
T2X5P
BH40
T2X5M
BM42
NC#1
BL41
NC#2
BL43
NC#3
BK42
NC#4
BJ39
NC#5
BH38
NC#6
AW39
HPD1
密
DDC3DATA_DP3_AUX N
DDC3CLK_DP3_AUXP
DDC4CLK_DP4_AUXP
DDC4DATA_DP4_AUX N
NY1
NY1
41
32
NC_66MHz
NC_66MHz
NC_66MHz_5X7
NC_66MHz_5X7
XTAL2
GND4
OY1
OY1
XTAL1
GND2
HSYNC
VSYNC
H2SYNC
V2SYNC
COMP
DDC1CLK
DDC1DATA
DDC2CLK
DDC2DATA
1
2
BC42
R
BC43
Rb
BD42
G
BE42
Gb
BE40
B
BD40
Bb
AY39
BA39
BC37
R2
BC36
R2b
BD37
G2
BE37
G2b
BE36
B2
BD36
B2b
AY37
AW37
BB36
BA37
Y
BB37
C
BC32
SCL
BB32
SDA
AU37
AU38
AY36
BA36
BB28
BC28
BB26
BC26
XTAL1 XTAL2
TX0P
TX0M
TX1P
TX1M
TX2P
TX2M
TXCAP
TXCAM
TX3P
TX3M
TX4P
TX4M
TX5P
TX5M
T2X0P
T2X0M
T2X1P
T2X1M
T2X2P
T2X2M
T2X3P
T2X3M
T2XCP
T2XCM
T2X4P
T2X4M
T2X5P
文件
T2X5M
HPD1 (15)
Place close to Connector
C115 100nF_6.3V C115 100nF_6.3V
C116 100nF_6.3V C116 100nF_6.3V
C105 100nF_6.3V C105 100nF_6.3V
C121 100nF_6.3V C121 100nF_6.3V
C107 100nF_6.3V C107 100nF_6.3V
C119 100nF_6.3V C119 100nF_6.3V
C109 100nF_6.3V C109 100nF_6.3V
Place close to ASIC (DNI)
SCL (7)
SDA (7)
DDC3DATA (16)
DDC3CLK (1 6)
DDC4CLK (1 5)
DDC4DATA (15)
C102 100nF_6.3V C102 100nF_6.3V
C103 100nF_6.3V C103 100nF_6.3V
C106 100nF_6.3V C106 100nF_6.3V
C110 100nF_6.3V C110 100nF_6.3V
C118 100nF_6.3V C118 100nF_6.3V
C108 100nF_6.3V C108 100nF_6.3V
C120 100nF_6.3V C120 100nF_6.3V
NC_100R R107 NC_100R
A_DAC1_R (15)
A_DAC1_RB (15 )
A_DAC1_G (15)
A_DAC1_GB (15)
A_DAC1_B (15)
A_DAC1_BB (15)
HSYNC1 (7,15)
VSYNC1 (7,15)
A_DAC2_R (16)
A_DAC2_RB (16 )
A_DAC2_G (16)
A_DAC2_GB (16)
A_DAC2_B (16)
A_DAC2_BB (16)
HSYNC2 (7,16)
VSYNC2 (7,16)
A_DAC2_COMP (18)
A_DAC2_Y (18)
A_DAC2_C (18)
2
R101 NC_100R R101 NC_100R
R103 NC_100R R103 NC_100R
R104 NC_100R R104 NC_100R
R105 NC_100R R105 NC_100R
R106 NC_100R R106 NC_100R
R107
R108 NC_100R R108 NC_100R
+3.3V
R115
R115
R114
R114
4.7K
4.7K
4.7K
4.7K
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
regarding this schematic and design, in cluding, n ot limit ed to,
regarding this schematic and design, in cluding, n ot limit ed to,
regarding this schematic and design, in cluding, n ot limit ed to,
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
purpose, and disclaims respons ibility fora ny consequences resul ting
purpose, and disclaims respons ibility fora ny consequences resul ting
purpose, and disclaims respons ibility fora ny consequences resul ting
from use of the information include d herein .
from use of the information include d herein .
from use of the information include d herein .
Title
Title
Title
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
T2X0P (15)
T2X0M (15)
T2X1P (15)
T2X1M (15)
T2X2P (15)
T2X2M (15)
T2X3P (15)
T2X3M (15)
T2XCP (15)
T2XCM (15)
T2X4P (15)
T2X4M (15)
T2X5P (15)
T2X5M (15)
DDC2CLK (11,17,19)
DDC2DATA (11,17,19)
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Thursday, October 09, 2008
Thursday, October 09, 2008
Thursday, October 09, 2008
Sheet
Sheet
Sheet
32 2
32 2
32 2
of
of
of
1
Doc No.
Doc No.
Doc No.
T1X0P (16)
T1X0M (16)
T1X1P (16)
T1X1M (16)
T1X2P (16)
T1X2M (16)
T1XCP (16)
T1XCM (16)
T1X3P (16)
T1X3M (16)
T1X4P (16)
T1X4M (16)
T1X5P (16)
T1X5M (16)
Rev Date:
Rev Date:
Rev Date:
1
1
1
105-B507xx-10
105-B507xx-10
105-B507xx-10
Printed with FinePrint - purchase at www.fineprint.com
www.vinafix.vn
C230
C230
1uF_6.3V
1uF_6.3V
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
VDDCI#15
VDDCI#16
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22
VDDCI#23
VDDCI#24
VDDCI#25
VDDCI#26
VDDCI#27
VDDCI#28
VDDCI#29
VDDCI#30
VDDCT#1
VDDCT#2
VDDCT#3
VDDCT#4
C251
C251
1uF_6.3V
1uF_6.3V
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
VDDCI#9
SPVDD
SPVSS
RV770 GL A11
RV770 GL A11
C221
C221
1uF_6.3V
1uF_6.3V
C231
C231
1uF_6.3V
1uF_6.3V
C241
C241
1uF_6.3V
1uF_6.3V
C262
C262
1uF_6.3V
1uF_6.3V
5
C252
C252
1uF_6.3V
1uF_6.3V
AA17
AB17
AD17
AE17
AF17
AH17
AJ17
AK17
AR17
AT17
AU17
AU18
AU19
U17
U19
U21
U22
U24
U25
U26
U28
U29
U30
U35
U36
U37
V37
W37
W17
AA37
AV22
AU21
AV21
AV19
AT37
AT38
C222
C222
1uF_6.3V
1uF_6.3V
C242
C242
1uF_6.3V
1uF_6.3V
C263
C263
1uF_6.3V
1uF_6.3V
C232
C232
1uF_6.3V
1uF_6.3V
C253
C253
1uF_6.3V
1uF_6.3V
C243
C243
1uF_6.3V
1uF_6.3V
C264
C264
1uF_6.3V
1uF_6.3V
C186
C186
100nF_6.3V
100nF_6.3V
GND_SPVDD
C223
C223
1uF_6.3V
1uF_6.3V
C233
C233
1uF_6.3V
1uF_6.3V
C254
C254
1uF_6.3V
1uF_6.3V
C265
C265
1uF_6.3V
1uF_6.3V
C343
C343
1uF_6.3V
1uF_6.3V
C353
C353
1uF_6.3V
1uF_6.3V
C354
C354
1uF_6.3V
1uF_6.3V
C349
C349
1uF_6.3V
1uF_6.3V
C361
C361
1uF_6.3V
1uF_6.3V
C244
C244
1uF_6.3V
1uF_6.3V
C187
C187
100nF_6.3V
100nF_6.3V
C224
C224
1uF_6.3V
1uF_6.3V
C234
C234
1uF_6.3V
1uF_6.3V
C255
C255
1uF_6.3V
1uF_6.3V
C266
C266
1uF_6.3V
1uF_6.3V
C344
C344
1uF_6.3V
1uF_6.3V
C352
C352
1uF_6.3V
1uF_6.3V
C355
C355
1uF_6.3V
1uF_6.3V
C357
C357
1uF_6.3V
1uF_6.3V
C350
C350
1uF_6.3V
1uF_6.3V
C245
C245
1uF_6.3V
1uF_6.3V
C188
C188
1uF_6.3V
1uF_6.3V
C363
C363
1uF_6.3V
1uF_6.3V
C225
C225
1uF_6.3V
1uF_6.3V
C256
C256
1uF_6.3V
1uF_6.3V
C267
C267
1uF_6.3V
1uF_6.3V
C235
C235
1uF_6.3V
1uF_6.3V
C246
C246
1uF_6.3V
1uF_6.3V
C345
C345
1uF_6.3V
1uF_6.3V
C347
C347
1uF_6.3V
1uF_6.3V
C346
C346
1uF_6.3V
1uF_6.3V
C359
C359
1uF_6.3V
1uF_6.3V
C362
C362
1uF_6.3V
1uF_6.3V
C189
C189
1uF_6.3V
1uF_6.3V
C226
C226
1uF_6.3V
1uF_6.3V
C257
C257
1uF_6.3V
1uF_6.3V
C268
C268
1uF_6.3V
1uF_6.3V
C364
C364
100nF_6.3V
100nF_6.3V
C236
C236
1uF_6.3V
1uF_6.3V
C247
C247
1uF_6.3V
1uF_6.3V
BLM15BD121SN1
BLM15BD121SN1
C227
C227
1uF_6.3V
1uF_6.3V
C258
C258
1uF_6.3V
1uF_6.3V
U1G
U1G
AA12
VDDR1#1
AB9
VDDR1#2
AD12
VDDR1#3
AE9
VDDR1#4
AE15
VDDR1#5
AB15
VDDR1#6
AH9
VDDR1#7
AH15
VDDR1#8
AJ12
VDDR1#9
AK15
VDDR1#10
AK9
VDDR1#11
AM12
VDDR1#12
AN15
VDDR1#13
AN9
VDDR1#14
AR12
VDDR1#15
AT15
D D
VDDR1#16
AT9
VDDR1#17
AU12
VDDR1#18
AW9
VDDR1#19
AW14
VDDR1#20
BB14
VDDR1#21
BE18
VDDR1#22
BC10
VDDR1#23
AW18
VDDR1#24
BE11
VDDR1#25
BE15
VDDR1#26
BB17
VDDR1#27
K11
VDDR1#28
J14
VDDR1#29
J17
VDDR1#30
J30
VDDR1#31
J33
VDDR1#32
J36
VDDR1#33
J19
VDDR1#34
J22
VDDR1#35
J25
VDDR1#36
J28
VDDR1#37
J39
VDDR1#38
K43
VDDR1#39
L45
VDDR1#40
L10
VDDR1#41
L15
VDDR1#42
M18
VDDR1#43
M21
VDDR1#44
M24
VDDR1#45
R22
VDDR1#46
M29
VDDR1#47
M32
VDDR1#48
M35
VDDR1#49
M37
VDDR1#50
P14
VDDR1#51
P17
VDDR1#52
R19
VDDR1#53
C C
R25
VDDR1#54
R28
VDDR1#55
R30
VDDR1#56
R33
VDDR1#57
R36
VDDR1#58
P39
VDDR1#59
P42
VDDR1#60
P9
VDDR1#61
R11
VDDR1#62
R45
VDDR1#63
U14
VDDR1#64
U42
VDDR1#65
U9
VDDR1#66
V12
VDDR1#67
V39
VDDR1#68
V45
VDDR1#69
W9
VDDR1#70
W15
VDDR1#71
C220
C220
C219
C219
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C229
C229
1uF_6.3V
1uF_6.3V
B B
C239
C239
C240
C240
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C250
C250
1uF_6.3V
1uF_6.3V
C260
C260
C261
C261
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
4
C348
C348
10uF_6.3V
10uF_6.3V
C360
C360
10uF_6.3V
10uF_6.3V
C356
C356
10uF_6.3V
10uF_6.3V
C358
C358
10uF_6.3V
10uF_6.3V
C351
C351
10uF_6.3V
10uF_6.3V
B112
B112
+1.8V +VDD_CT
B122
B122
+SPVDD +VDDC
BLM15BD121SN1
BLM15BD121SN1
1 2
NS_VIA
NS_VIA
NS7
NS7
+MVDDQ
C228
C228
1uF_6.3V
1uF_6.3V
C237
C237
C238
C238
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C248
C248
C249
C249
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C259
C259
1uF_6.3V
1uF_6.3V
C270
C270
C269
C269
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C374
C374
10uF_6.3V
10uF_6.3V
C375
C375
10uF_6.3V
10uF_6.3V
C376
C376
10uF_6.3V
10uF_6.3V
+VDDC
3
U1I
G39
VSSM#101
G41
VSSM#102
G43
VSSM#103
G45
VSSM#104
G9
VSSM#105
H1
VSSM#106
J47
VSSM#107
H53
VSSM#108
J7
VSSM#109
J11
VSSM#110
K2
VSSM#111
L40
VSSM#112
K14
VSSM#113
K17
VSSM#114
K19
VSSM#115
K22
VSSM#116
K25
VSSM#117
K28
VSSM#118
K30
VSSM#119
K33
VSSM#120
K36
VSSM#121
K39
VSSM#122
L47
VSSM#123
K52
VSSM#124
L7
VSSM#125
P2
VSSM#126
M2
VSSM#127
M43
VSSM#128
M52
VSSM#129
L9
VSSM#130
R15
VSSM#131
N18
VSSM#132
N21
VSSM#133
N24
VSSM#134
N26
VSSM#135
N29
VSSM#136
N32
VSSM#137
N35
VSSM#138
N37
VSSM#139
N40
VSSM#140
N47
VSSM#141
N7
VSSM#142
P10
VSSM#143
P41
VSSM#144
R53
VSSM#145
R12
VSSM#146
M15
VSSM#147
R17
VSSM#148
T19
VSSM#149
T22
VSSM#150
T25
VSSM#151
T28
VSSM#152
T30
VSSM#153
T33
VSSM#154
T36
VSSM#155
R44
VSSM#156
R47
VSSM#157
R7
VSSM#158
T2
VSSM#159
T48
VSSM#160
U10
VSSM#161
U15
VSSM#162
U41
VSSM#163
U7
VSSM#164
V13
VSSM#165
V38
VSSM#166
V44
VSSM#167
V2
VSSM#168
W10
VSSM#169
W16
VSSM#170
W7
VSSM#171
Y2
VSSM#172
U1I
B14
B18
B22
A39
A49
A5
AA13
AA7
AB10
AB16
AB2
AC7
AD13
AD2
AE10
AE16
AE7
AF13
AF2
AG7
AH10
AH16
AH2
AJ13
AJ7
AK10
AK16
AK2
AL7
AM13
AM2
AN1
AN10
AN16
AN7
AR13
AR7
AT10
AT16
AT2
AU13
AU7
AW1
AW10
AW7
AY13
AY2
B10
B16
B26
B30
A33
B42
BA14
BA17
BA7
AY11
AV18
BB2
BD15
BD18
BC7
BC12
BD2
BE7
BG11
BG13
BG15
BG9
BJ1
BM12
BN8
BN15
BM10
BN5
B12
B20
B24
B28
B32
B36
B40
B44
A8
E1
E53
G11
G13
G15
G17
G19
G21
G23
G25
G27
G29
G31
G33
G35
G37
AA20
VSSC#1
AA23
VSSC#2
AA25
VSSC#3
AA28
VSSC#4
AA30
VSSC#5
AA33
VSSC#6
AA35
VSSC#7
AC19
VSSC#8
AC21
VSSC#9
AC24
VSSC#10
AC26
VSSC#11
AC29
VSSC#12
AC31
VSSC#13
AC34
VSSC#14
AD20
VSSC#15
AD23
VSSC#16
AD25
VSSC#17
AD28
VSSC#18
AD30
VSSC#19
AD33
VSSC#20
AD35
VSSC#21
AE19
VSSC#22
AE21
VSSC#23
AE24
VSSC#24
AE26
VSSC#25
AE29
VSSC#26
AE31
VSSC#27
AE34
VSSC#28
AF20
VSSC#29
AF23
VSSC#30
AF25
VSSC#31
AF28
VSSC#32
AF30
VSSC#33
AF33
VSSC#34
AF35
VSSC#35
AH19
VSSC#36
AH21
VSSC#37
AH24
VSSC#38
AH26
VSSC#39
AH29
VSSC#40
AH31
VSSC#41
AH34
VSSC#42
AJ20
VSSC#43
AJ23
VSSC#44
AJ25
VSSC#45
AJ28
VSSC#46
AJ30
VSSC#47
AJ33
VSSC#48
AJ35
VSSC#49
AK19
VSSC#50
AK21
VSSC#51
AK24
VSSC#52
AK26
VSSC#53
AK29
VSSC#54
AK31
VSSC#55
AK34
VSSC#56
AL20
VSSC#57
AL23
VSSC#58
AL25
VSSC#59
AL28
VSSC#60
AL30
VSSC#61
AL33
VSSC#62
AL35
VSSC#63
AN19
VSSC#64
AN21
VSSC#65
AN24
VSSC#66
AN26
VSSC#67
AN29
VSSC#68
AN31
VSSC#69
AN34
VSSC#70
AP20
VSSC#71
AP23
VSSC#72
密
AP25
VSSC#73
AP28
VSSC#74
AP30
VSSC#75
AP33
VSSC#76
AR21
VSSC#77
AR24
VSSC#78
AR26
VSSC#79
AR29
VSSC#80
AR31
VSSC#81
AR34
VSSC#82
W20
VSSC#83
W23
VSSC#84
W25
VSSC#85
W28
VSSC#86
W30
VSSC#87
W33
VSSC#88
W35
VSSC#89
Y19
VSSC#90
Y21
VSSC#91
Y24
VSSC#92
Y26
VSSC#93
Y29
VSSC#94
Y31
VSSC#95
Y34
VSSC#96
AP35
VSSC#97
VSSM#1
VSSM#2
VSSM#3
VSSM#4
VSSM#5
VSSM#6
VSSM#7
VSSM#8
VSSM#9
VSSM#10
VSSM#11
VSSM#12
VSSM#13
VSSM#14
VSSM#15
VSSM#16
VSSM#17
VSSM#18
VSSM#19
VSSM#20
VSSM#21
VSSM#22
VSSM#23
VSSM#24
VSSM#25
VSSM#26
VSSM#27
VSSM#28
VSSM#29
VSSM#30
VSSM#31
VSSM#32
VSSM#33
VSSM#34
VSSM#35
VSSM#36
VSSM#37
VSSM#38
VSSM#39
VSSM#40
VSSM#41
VSSM#42
VSSM#43
VSSM#44
VSSM#45
VSSM#46
VSSM#47
VSSM#48
VSSM#49
VSSM#50
VSSM#51
VSSM#52
VSSM#53
VSSM#54
VSSM#55
VSSM#56
VSSM#57
VSSM#58
VSSM#59
VSSM#60
VSSM#61
VSSM#62
VSSM#63
VSSM#64
VSSM#65
VSSM#66
VSSM#67
VSSM#68
VSSM#69
VSSM#70
VSSM#71
VSSM#72
VSSM#73
VSSM#74
VSSM#75
VSSM#76
VSSM#77
VSSM#78
VSSM#79
VSSM#80
VSSM#81
VSSM#82
VSSM#83
VSSM#84
VSSM#85
VSSM#86
機
VSSM#87
VSSM#88
VSSM#89
VSSM#90
VSSM#91
VSSM#92
VSSM#93
VSSM#94
VSSM#95
VSSM#96
VSSM#97
VSSM#98
VSSM#99
VSSM#100
RV770 GL A11
RV770 GL A11
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDC#59
VDDC#60
VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67
VDDC#68
VDDC#69
VDDC#70
VDDC#71
VDDC#72
VDDC#73
VDDC#74
VDDC#75
VDDC#76
VDDC#77
VDDC#78
VDDC#79
VDDC#80
VDDC#81
VDDC#82
VDDC#83
VDDC#84
VDDC#85
VDDC#86
VDDC#87
VDDC#88
VDDC#89
VDDC#90
VDDC#91
VDDC#92
VDDC#93
VDDC#94
VDDC#95
VDDC#96
VDDC#97
SP_PVDD
RV770 GL A11
RV770 GL A11
U1H
U1H
AA19
AA21
AA24
AA26
AA29
AA31
AA34
AC20
AC23
AC25
AC28
AC30
AC33
AC35
AD19
AD21
AD24
AD26
AD29
AD31
AD34
AE20
AE23
AE25
AE28
AE30
AE33
AE35
AF19
AF21
AF24
AF26
AF29
AF31
AF34
AH20
AH23
AH25
AH28
AH30
AH33
AH35
AJ19
AJ21
AJ24
AJ26
AJ29
AJ31
AJ34
AK20
AK23
AK25
AK28
AK30
AK33
AK35
AL19
AL21
文件
AL24
AL26
AL29
AL31
AL34
AN20
AN23
AN25
AN28
AN30
AN33
AN35
AP21
AP24
AP26
AP29
AP31
AP34
AR20
AR23
AR25
AR28
AR30
AR33
W19
W21
W24
W26
W29
W31
W34
Y20
Y23
Y25
Y28
Y30
Y33
Y35
+PCIE_PVDD
AR35
AR38
C152
C152
1uF_6.3V
1uF_6.3V
C164
C164
1uF_6.3V
1uF_6.3V
C174
C174
1uF_6.3V
1uF_6.3V
C179
C179
10uF_X6S
10uF_X6S
MC179
MC179
NC_4.7uF_6.3V
NC_4.7uF_6.3V
C377
C377
1uF_6.3V
1uF_6.3V
C190
C190
1uF_6.3V
1uF_6.3V
C200
C200
1uF_6.3V
1uF_6.3V
C153
C153
1uF_6.3V
1uF_6.3V
C165
C165
1uF_6.3V
1uF_6.3V
C175
C175
1uF_6.3V
1uF_6.3V
C180
C180
10uF_X6S
10uF_X6S
MC180
MC180
NC_4.7uF_6.3V
NC_4.7uF_6.3V
C378
C378
1uF_6.3V
1uF_6.3V
C191
C191
1uF_6.3V
1uF_6.3V
C201
C201
1uF_6.3V
1uF_6.3V
C211
C211
100nF_6.3V
100nF_6.3V
2
C154
C154
1uF_6.3V
1uF_6.3V
C166
C166
1uF_6.3V
1uF_6.3V
C379
C379
1uF_6.3V
1uF_6.3V
C192
C192
1uF_6.3V
1uF_6.3V
C202
C202
1uF_6.3V
1uF_6.3V
C155
C155
1uF_6.3V
1uF_6.3V
C167
C167
1uF_6.3V
1uF_6.3V
C176
C176
1uF_6.3V
1uF_6.3V
C203
C203
1uF_6.3V
1uF_6.3V
C212
C212
100nF_6.3V
100nF_6.3V
C380
C380
1uF_6.3V
1uF_6.3V
C193
C193
1uF_6.3V
1uF_6.3V
C156
C156
C157
C157
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C168
C168
C169
C169
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C177
C177
1uF_6.3V
1uF_6.3V
C182
C182
10uF_X6S
10uF_X6S
MC182
MC182
NC_4.7uF_6.3V
NC_4.7uF_6.3V
Overlapped Footprints
C381
C381
1uF_6.3V
1uF_6.3V
C194
C194
1uF_6.3V
1uF_6.3V
C204
C204
C205
C205
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C213
C213
C214
C214
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
C178
C178
1uF_6.3V
1uF_6.3V
C382
C382
1uF_6.3V
1uF_6.3V
C195
C195
1uF_6.3V
1uF_6.3V
C158
C158
1uF_6.3V
1uF_6.3V
C170
C170
1uF_6.3V
1uF_6.3V
C383
C383
1uF_6.3V
1uF_6.3V
C209
C209
1uF_6.3V
1uF_6.3V
C215
C215
100nF_6.3V
100nF_6.3V
C159
C159
1uF_6.3V
1uF_6.3V
C171
C171
1uF_6.3V
1uF_6.3V
C196
C196
1uF_6.3V
1uF_6.3V
C185
C185
10uF_X6S
10uF_X6S
C160
C160
1uF_6.3V
1uF_6.3V
C172
C172
1uF_6.3V
1uF_6.3V
MC185
MC185
4.7uF_6.3V
4.7uF_6.3V
C384
C384
1uF_6.3V
1uF_6.3V
C197
C197
1uF_6.3V
1uF_6.3V
C206
C206
1uF_6.3V
1uF_6.3V
C216
C216
100nF_6.3V
100nF_6.3V
C161
C161
1uF_6.3V
1uF_6.3V
C385
C385
1uF_6.3V
1uF_6.3V
C207
C207
1uF_6.3V
1uF_6.3V
1
C173
C173
1uF_6.3V
1uF_6.3V
C198
C198
1uF_6.3V
1uF_6.3V
C217
C217
100nF_6.3V
100nF_6.3V
C162
C162
1uF_6.3V
1uF_6.3V
C386
C386
1uF_6.3V
1uF_6.3V
C208
C208
1uF_6.3V
1uF_6.3V
MC132
MC132
NC_4.7uF_6.3V
NC_4.7uF_6.3V
C387
C387
1uF_6.3V
1uF_6.3V
C199
C199
1uF_6.3V
1uF_6.3V
C218
C218
100nF_6.3V
100nF_6.3V
C163
C163
1uF_6.3V
1uF_6.3V
+VDDC
C210
C210
1uF_6.3V
1uF_6.3V
+VDDC
C388
C388
1uF_6.3V
1uF_6.3V
+VDDC
C272
C272
C271
C271
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
MC285
MC285
MC286
MC286
NC_4.7uF_6.3V
NC_4.7uF_6.3V
NC_4.7uF_6.3V
C286
C286
10uF_X6S
10uF_X6S
NC_4.7uF_6.3V
A A
C285
C285
10uF_X6S
10uF_X6S
C287
C287
10uF_X6S
10uF_X6S
C273
C273
100nF_6.3V
100nF_6.3V
MC287
MC287
NC_4.7uF_6.3V
NC_4.7uF_6.3V
5
C274
C274
100nF_6.3V
100nF_6.3V
C288
C288
10uF_X6S
10uF_X6S
MC288
MC288
NC_4.7uF_6.3V
NC_4.7uF_6.3V
C289
C289
10uF_X6S
10uF_X6S
C275
C275
100nF_6.3V
100nF_6.3V
MC289
MC289
NC_4.7uF_6.3V
NC_4.7uF_6.3V
C290
C290
10uF_X6S
10uF_X6S
C276
C276
100nF_6.3V
100nF_6.3V
MC290
MC290
NC_4.7uF_6.3V
NC_4.7uF_6.3V
C291
C291
10uF_X6S
10uF_X6S
C277
C277
C278
C278
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
MC291
MC291
NC_4.7uF_6.3V
NC_4.7uF_6.3V
Overlapped Footprints
C292
C292
10uF_X6S
10uF_X6S
MC292
MC292
NC_4.7uF_6.3V
NC_4.7uF_6.3V
4
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3
www.vinafix.vn
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
from use of the information include d herein .
from use of the information include d herein .
from use of the information include d herein .
Title
Title
Title
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
2
RH RV770 GDDR5 DVI-I VO DVI-I FH
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Thursday, October 09, 2008
Thursday, October 09, 2008
Thursday, October 09, 2008
Sheet
Sheet
Sheet
42 2
42 2
42 2
of
of
of
1
Doc No.
Doc No.
Doc No.
Rev Date:
Rev Date:
Rev Date:
1
1
1
105-B507xx-10
105-B507xx-10
105-B507xx-10
5
U1C
C181
C181
1uF_6.3V
1uF_6.3V
AW19
V40
R42
V41
R41
V42
V43
U45
P44
M48
M50
L53
L51
P48
P50
P52
N53
L49
J51
K50
K48
G52
H48
F48
C51
C43
F44
E43
D44
A46
D46
F46
B47
L44
M45
P40
M44
R43
P43
J43
K44
M42
K45
R51
R49
E50
D49
U44
N49
J49
C45
U43
N51
H50
E45
U38
R39
R40
J44
P45
L43
U40
U39
U33
U32
T32
P36
+MVDDQ
+MVDDQ
U1C
DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA0_8
ADBIA0
WCKA0_0
WCKA0B_0
WCKA0_1
WCKA0B_1
EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3
DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3
WEA0B
CSA0B_0
CSA0B_1
CASA0B
RASA0B
CKEA0
CLKA0
CLKA0B
MVREFAS
MVREFAD
MEM_CALRPA
MEM_CALRNA
DRAM_RST
RV770 GL A11
RV770 GL A11
R122
R122
40.2R
40.2R
1%
R125
100R
100R
1%
R126
R126
40.2R
40.2R
1%
R128
R128
100R
100R
1%
DNI
C293
C293
NC_1uF_6.3V
NC_1uF_6.3V
C300
C300
1uF_6.3V
1uF_6.3V
C303
C303
NC_1uF_6.3V
NC_1uF_6.3V
C305
C305
1uF_6.3V
1uF_6.3V
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31
MAA1_0
MAA1_1
MAA1_2
MAA1_3
MAA1_4
MAA1_5
MAA1_6
MAA1_7
MAA1_8
ADBIA1
WCKA1_0
WCKA1B_0
WCKA1_1
WCKA1B_1
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3
DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3
WEA1B
CSA1B_0
CSA1B_1
CASA1B
RASA1B
CKEA1
CLKA1
CLKA1B
MPVDD#0
MPVDD#1
MPVDD#2
DNI
DQA0_[31..0] (8)
D D
MAA0_[8..0] (8)
ADBIA0 (8)
WCKA0_0 (8)
WCKA0b_0 (8)
WCKA0_1 (8)
C C
B B
WCKA0b_1 (8)
EDCA0_0 (8)
EDCA0_1 (8)
EDCA0_2 (8)
EDCA0_3 (8)
DDBIA0_0 (8)
DDBIA0_1 (8)
DDBIA0_2 (8)
DDBIA0_3 (8)
DRAM_RST (8,9)
DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA0_8
WEA0b (8)
CSA0b_0 (8)
CASA0b (8)
RASA0b (8)
CKEA0 (8)
CLKA0 (8)
CLKA0b (8)
MVREFS_A
MVREFD_A
+MVDDQ
R120 243R R120 243R
R121 243R R121 243R C336
R102
R102
10K
10K
D30
A31
F30
E29
D32
C33
E33
F32
J35
L32
L35
K35
M30
L33
L30
J29
F34
A35
E35
C35
E37
C37
B38
A37
F42
E41
A43
D42
D40
E39
C39
F40
J42
K40
L37
J40
J37
K37
M39
M40
K42
L42
B34
D34
D38
F38
C31
J32
D36
C41
E31
K32
F36
A41
N36
P37
R37
N39
L39
T37
M36
L36
J10
K10
K9
MVREFD_A
MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)
MVREFS_A
4
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
MAA1_0
MAA1_1
MAA1_2
MAA1_3
MAA1_4
MAA1_5
MAA1_6
MAA1_7
MAA1_8
1uF_6.3V
1uF_6.3V
3
DQA1_[31..0] (8)
MAA1_[8..0] (8)
ADBIA1 (8)
WCKA1_0 (8)
WCKA1b_0 (8)
WCKA1_1 (8)
WCKA1b_1 (8)
EDCA1_0 (8)
EDCA1_1 (8)
EDCA1_2 (8)
EDCA1_3 (8)
DDBIA1_0 (8)
DDBIA1_1 (8)
DDBIA1_2 (8)
DDBIA1_3 (8)
WEA1b (8)
CSA1b_0 (8)
CASA1b (8)
RASA1b (8)
CKEA1 (8)
CLKA1 (8)
CLKA1b (8)
+1.8V +MPVDD
B114
B114
10R_1A_0402
10R_1A_0402
1uF_6.3V
1uF_6.3V
C336
C337
C337
10uF_X6S
10uF_X6S
C338
C338
C339
C339
100nF_6.3V
100nF_6.3V
DQB0_[31..0] (8)
MAB0_[8..0] (8)
ADBIB0 (8)
WCKB0_0 (8)
WCKB0b_0 (8)
WCKB0_1 (8)
WCKB0b_1 (8)
EDCB0_0 (8)
EDCB0_1 (8)
EDCB0_2 (8)
EDCB0_3 (8)
DDBIB0_1 (8)
DDBIB0_0 (8)
DDBIB0_2 (8)
DDBIB0_3 (8)
密
DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31
MAB0_0
MAB0_1
MAB0_2
MAB0_3
MAB0_4
MAB0_5
MAB0_6
MAB0_7
MAB0_8
文件
WEB0b (8)
CSB0b_0 (8)
CASB0b (8)
RASB0b (8)
CKEB0 (8)
CLKB0 (8)
CLKB0b (8)
+MVDDQ
R118 243R R118 243R
R119 243R R119 243R
MVREFS_B
MVREFD_B
P35
P32
T35
P33
N30
P30
R32
R35
M25
M28
N25
T26
K26
J26
R29
N28
A29
C29
F28
D28
A27
D26
E25
F26
E21
D22
C21
A21
C23
E23
F24
D24
J24
L24
L25
P24
L28
P25
N22
P22
L22
M22
K29
L29
C25
A25
N33
L26
E27
F22
M33
M26
C27
A23
T29
P26
R26
R24
K24
T24
P29
P28
T17
U18
T21
R21
機
U1D
U1D
DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31
MAB0_0
MAB0_1
MAB0_2
MAB0_3
MAB0_4
MAB0_5
MAB0_6
MAB0_7
MAB0_8
ADBIB0
WCKB0_0
WCKB0B_0
WCKB0_1
WCKB0B_1
EDCB0_0
EDCB0_1
EDCB0_2
EDCB0_3
DDBIB0_0
DDBIB0_1
DDBIB0_2
DDBIB0_3
WEB0B
CSB0B_0
CSB0B_1
CASB0B
RASB0B
CKEB0
CLKB0
CLKB0B
MVREFBS
MVREFBD
MEM_CALRPB
MEM_CALRNB
RV770 GL A11
RV770 GL A11
+MVDDQ
R123
R123
40.2R
40.2R
1%
R124
R124
100R
100R R125
1%
+MVDDQ
R127
R127
40.2R
40.2R
1%
R129
R129
100R
100R
1%
2
DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8
DQB1_9
DQB1_10
DQB1_11
DQB1_12
DQB1_13
DQB1_14
DQB1_15
DQB1_16
DQB1_17
DQB1_18
DQB1_19
DQB1_20
DQB1_21
DQB1_22
DQB1_23
DQB1_24
DQB1_25
DQB1_26
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_31
MAB1_0
MAB1_1
MAB1_2
MAB1_3
MAB1_4
MAB1_5
MAB1_6
MAB1_7
MAB1_8
ADBIB1
WCKB1_0
WCKB1B_0
WCKB1_1
WCKB1B_1
EDCB1_0
EDCB1_1
EDCB1_2
EDCB1_3
DDBIB1_0
DDBIB1_1
DDBIB1_2
DDBIB1_3
WEB1B
CSB1B_0
CSB1B_1
CASB1B
RASB1B
CLKB1B
C295
C295
DNI
NC_1uF_6.3V
NC_1uF_6.3V
C298
C298
1uF_6.3V
1uF_6.3V
C301
C301
NC_1uF_6.3V
NC_1uF_6.3V
C307
C307
1uF_6.3V
1uF_6.3V
CKEB1
CLKB1
DNI
C3
D5
B7
D8
E9
F10
D10
A11
K18
L18
L17
M17
M12
L12
K12
J12
F12
D12
C13
A13
F14
C15
A15
E15
F20
C17
D20
C19
E19
D18
E17
A17
J18
M19
P18
T18
N17
R18
N19
P21
L19
J21
C11
E11
D16
F16
F8
K15
E13
A19
C9
J15
D14
F18
P15
N15
L14
K21
P19
L21
N14
M14
MVREFD_B
MVREFS_B
DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8
DQB1_9
DQB1_10
DQB1_11
DQB1_12
DQB1_13
DQB1_14
DQB1_15
DQB1_16
DQB1_17
DQB1_18
DQB1_19
DQB1_20
DQB1_21
DQB1_22
DQB1_23
DQB1_24
DQB1_25
DQB1_26
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_31
MAB1_0
MAB1_1
MAB1_2
MAB1_3
MAB1_4
MAB1_5
MAB1_6
MAB1_7
MAB1_8
MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)
DQB1_[31..0] (8)
MAB1_[8..0] (8)
ADBIB1 (8)
WCKB1_0 (8)
WCKB1b_0 (8)
WCKB1_1 (8)
WCKB1b_1 (8)
EDCB1_0 (8)
EDCB1_1 (8)
EDCB1_2 (8)
EDCB1_3 (8)
DDBIB1_0 (8)
DDBIB1_1 (8)
DDBIB1_2 (8)
DDBIB1_3 (8)
WEB1b (8)
CSB1b_0 (8)
CASB1b (8)
RASB1b (8)
CKEB1 (8)
CLKB1 (8)
CLKB1b (8)
1
A A
5
4
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CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
from use of the information include d herein .
from use of the information include d herein .
from use of the information include d herein .
Title
Title
2
Title
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Thursday, October 09, 2008
Thursday, October 09, 2008
Thursday, October 09, 2008
Sheet
Sheet
Sheet
52 2
52 2
52 2
of
of
of
1
Doc No.
Doc No.
Doc No.
Rev Date:
Rev Date:
Rev Date:
1
1
1
105-B507xx-10
105-B507xx-10
105-B507xx-10
5
U1E
W12
W13
AA14
W11
AA10
W14
AA11
AA16
AA15
E4
H4
G2
F6
J5
K6
K4
L1
V10
V11
U11
U12
L11
M11
M10
M9
M6
M4
N3
N1
P6
R3
R1
R5
Y6
W3
Y4
W5
V4
U3
U5
U1
V9
V14
V16
U13
V15
AA9
L3
L5
T4
T6
H6
R10
N5
W1
J3
R9
P4
V6
R14
R13
P11
P13
P12
U16
V17
U1E
DQC0_0
DQC0_1
DQC0_2
DQC0_3
DQC0_4
DQC0_5
DQC0_6
DQC0_7
DQC0_8
DQC0_9
DQC0_10
DQC0_11
DQC0_12
DQC0_13
DQC0_14
DQC0_15
DQC0_16
DQC0_17
DQC0_18
DQC0_19
DQC0_20
DQC0_21
DQC0_22
DQC0_23
DQC0_24
DQC0_25
DQC0_26
DQC0_27
DQC0_28
DQC0_29
DQC0_30
DQC0_31
MAC0_0
MAC0_1
MAC0_2
MAC0_3
MAC0_4
MAC0_5
MAC0_6
MAC0_7
MAC0_8
ADBIC0
WCKC0_0
WCKC0B_0
WCKC0_1
WCKC0B_1
EDCC0_0
EDCC0_1
EDCC0_2
EDCC0_3
DDBIC0_0
DDBIC0_1
DDBIC0_2
DDBIC0_3
WEC0B
CSC0B_0
CSC0B_1
CASC0B
RASC0B
CKEC0
CLKC0
CLKC0B
MVREFCS
MVREFCD
MEM_CALRPC
MEM_CALRNC
RV770 GL A11
RV770 GL A11
+MVDDQ
R139
R139
40.2R
40.2R
1%
R141
R141
100R
100R
1%
+MVDDQ
R143
R143
40.2R
40.2R
1%
R145
R145
100R
100R
1%
WCKC1_0
WCKC1B_0
WCKC1_1
WCKC1B_1
DDBIC1_0
DDBIC1_1
DDBIC1_2
DDBIC1_3
C311
C311
NC_1uF_6.3V
NC_1uF_6.3V
C315
C315
1uF_6.3V
1uF_6.3V
C319
C319
NC_1uF_6.3V
NC_1uF_6.3V
C323
C323
1uF_6.3V
1uF_6.3V
DQC1_0
DQC1_1
DQC1_2
DQC1_3
DQC1_4
DQC1_5
DQC1_6
DQC1_7
DQC1_8
DQC1_9
DQC1_10
DQC1_11
DQC1_12
DQC1_13
DQC1_14
DQC1_15
DQC1_16
DQC1_17
DQC1_18
DQC1_19
DQC1_20
DQC1_21
DQC1_22
DQC1_23
DQC1_24
DQC1_25
DQC1_26
DQC1_27
DQC1_28
DQC1_29
DQC1_30
DQC1_31
MAC1_0
MAC1_1
MAC1_2
MAC1_3
MAC1_4
MAC1_5
MAC1_6
MAC1_7
MAC1_8
ADBIC1
EDCC1_0
EDCC1_1
EDCC1_2
EDCC1_3
WEC1B
CSC1B_0
CSC1B_1
CASC1B
RASC1B
CKEC1
CLKC1
CLKC1B
MVREFD_C
MVREFS_C
AR16
AN14
AR14
AR15
AM15
AM14
AK13
AK14
AJ15
AH12
AH13
AF10
AF9
AF16
AE13
AE12
AJ3
AJ1
AH4
AH6
AG1
AF4
AE5
AF6
AA5
AB4
AA3
AA1
AC5
AD6
AD4
AC3
AD9
AD11
AE11
AD14
AH11
AE14
AB13
AB14
AB11
AB12
AJ10
AJ11
AE3
AE1
AN13
AF11
AG5
AB6
AN12
AF12
AG3
AC1
AJ16
AF14
AF15
AD15
AD10
AD16
AJ14
AH14
MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)
DQC0_[31..0] (9)
D D
MAC0_[8..0] (9)
ADBIC0 (9)
WCKC0_0 (9)
WCKC0b_0 (9)
WCKC0_1 (9)
WCKC0b_1 (9)
C C
B B
EDCC0_0 (9)
EDCC0_1 (9)
(9)
EDCC0_2
EDCC0_3 (9)
DDBIC0_0 (9)
DDBIC0_1 (9)
DDBIC0_2 (9)
DDBIC0_3 (9)
DQC0_0
DQC0_1
DQC0_2
DQC0_3
DQC0_4
DQC0_5
DQC0_6
DQC0_7
DQC0_8
DQC0_9
DQC0_10
DQC0_11
DQC0_12
DQC0_13
DQC0_14
DQC0_15
DQC0_16
DQC0_17
DQC0_18
DQC0_19
DQC0_20
DQC0_21
DQC0_22
DQC0_23
DQC0_24
DQC0_25
DQC0_26
DQC0_27
DQC0_28
DQC0_29
DQC0_30
DQC0_31
MAC0_0
MAC0_1
MAC0_2
MAC0_3
MAC0_4
MAC0_5
MAC0_6
MAC0_7
MAC0_8
WEC0b (9)
CSC0b_0 (9)
CASC0b (9)
RASC0b (9)
CKEC0 (9)
CLKC0 (9)
CLKC0b (9)
+MVDDQ
MVREFS_C
MVREFD_C
R135 243R R135 243R
R137 243R R137 243R
DQC1_0
DQC1_1
DQC1_2
DQC1_3
DQC1_4
DQC1_5
DQC1_6
DQC1_7
DQC1_8
DQC1_9
DQC1_10
DQC1_11
DQC1_12
DQC1_13
DQC1_14
DQC1_15
DQC1_16
DQC1_17
DQC1_18
DQC1_19
DQC1_20
DQC1_21
DQC1_22
DQC1_23
DQC1_24
DQC1_25
DQC1_26
DQC1_27
DQC1_28
DQC1_29
DQC1_30
DQC1_31
MAC1_0
MAC1_1
MAC1_2
MAC1_3
MAC1_4
MAC1_5
MAC1_6
MAC1_7
MAC1_8
4
DQC1_[31..0] (9)
MAC1_[8..0] (9)
ADBIC1 (9)
WCKC1_0 (9)
WCKC1b_0 (9)
WCKC1_1 (9)
WCKC1b_1 (9)
EDCC1_0 (9)
EDCC1_1 (9)
EDCC1_2 (9)
EDCC1_3 (9)
DDBIC1_0 ( 9)
DDBIC1_1 ( 9)
DDBIC1_2 ( 9)
DDBIC1_3 ( 9)
WEC1b (9)
CSC1b_0 (9)
CASC1b (9)
RASC1b (9)
CKEC1 (9)
CLKC1 (9)
CLKC1b (9)
機
3
U1F
DQD0_[31..0] (9)
MAD0_[8..0] (9)
ADBID0 (9)
WCKD0_0 (9)
WCKD0b_0 (9)
WCKD0_1 (9)
WCKD0b_1 (9)
EDCD0_0 (9)
EDCD0_1 (9)
EDCD0_2 (9)
EDCD0_3 (9)
DDBID0_0 (9)
DDBID0_1 (9)
DDBID0_2 (9)
DDBID0_3 (9)
DQD0_0
DQD0_1
DQD0_2
DQD0_3
DQD0_4
DQD0_5
DQD0_6
DQD0_7
DQD0_8
DQD0_9
DQD0_10
DQD0_11
DQD0_12
DQD0_13
DQD0_14
DQD0_15
DQD0_16
DQD0_17
DQD0_18
DQD0_19
DQD0_20
DQD0_21
DQD0_22
DQD0_23
DQD0_24
DQD0_25
DQD0_26
DQD0_27
DQD0_28
DQD0_29
DQD0_30
DQD0_31
MAD0_0
MAD0_1
MAD0_2
MAD0_3
MAD0_4
MAD0_5
MAD0_6
MAD0_7
MAD0_8
WED0b (9)
CSD0b_0 (9)
CASD0b (9)
RASD0b (9)
CKED0 (9)
CLKD0 (9)
CLKD0b (9)
MVREFS_D
MVREFD_D
+MVDDQ
密
R134 243R R134 243R
R136 243R R136 243R
U1F
AJ5
DQD0_0
AK6
DQD0_1
AK4
DQD0_2
AL1
DQD0_3
AM6
DQD0_4
AM4
DQD0_5
AN5
DQD0_6
AN3
DQD0_7
AR11
DQD0_8
AK12
DQD0_9
AR10
DQD0_10
AR9
DQD0_11
AN11
DQD0_12
AK11
DQD0_13
AJ9
DQD0_14
AM11
DQD0_15
AR3
DQD0_16
AR1
DQD0_17
AP6
DQD0_18
AR5
DQD0_19
AU1
DQD0_20
AU3
DQD0_21
AU5
DQD0_22
AV2
DQD0_23
BB6
DQD0_24
BA5
DQD0_25
BC1
DQD0_26
BB4
DQD0_27
AY6
DQD0_28
AW5
DQD0_29
AW3
DQD0_30
AY4
DQD0_31
BB9
MAD0_0
AY10
MAD0_1
AU11
MAD0_2
AY9
MAD0_3
AU9
MAD0_4
AU10
MAD0_5
AW12
MAD0_6
AY12
MAD0_7
BB10
MAD0_8
BB11
ADBID0
AP2
WCKD0_0
AP4
WCKD0B_0
AV4
WCKD0_1
AV6
WCKD0B_1
AL3
EDCD0_0
AM9
EDCD0_1
AT4
EDCD0_2
BA3
EDCD0_3
AL5
DDBID0_0
AM10
DDBID0_1
AT6
DDBID0_2
BA1
DDBID0_3
文件
AT13
WED0B
AU14
CSD0B_0
AU15
CSD0B_1
AW13
CASD0B
AW11
RASD0B
AU16
CKED0
AT12
CLKD0
AT11
CLKD0B
AM17
MVREFDS
AN17
MVREFDD
AM16
MEM_CALRPD
AT14
MEM_CALRND
RV770 GL A11
RV770 GL A11
+MVDDQ
R138
R138
40.2R
40.2R
1%
R140
R140
100R
100R
1%
+MVDDQ
R142
R142
40.2R
40.2R
1%
R144
R144
100R
100R
1%
C309
C309
NC_1uF_6.3V
NC_1uF_6.3V
C313
C313
1uF_6.3V
1uF_6.3V
C317
C317
NC_1uF_6.3V
NC_1uF_6.3V
C321
C321
1uF_6.3V
1uF_6.3V
DQD1_0
DQD1_1
DQD1_2
DQD1_3
DQD1_4
DQD1_5
DQD1_6
DQD1_7
DQD1_8
DQD1_9
DQD1_10
DQD1_11
DQD1_12
DQD1_13
DQD1_14
DQD1_15
DQD1_16
DQD1_17
DQD1_18
DQD1_19
DQD1_20
DQD1_21
DQD1_22
DQD1_23
DQD1_24
DQD1_25
DQD1_26
DQD1_27
DQD1_28
DQD1_29
DQD1_30
DQD1_31
MAD1_0
MAD1_1
MAD1_2
MAD1_3
MAD1_4
MAD1_5
MAD1_6
MAD1_7
MAD1_8
ADBID1
WCKD1_0
WCKD1B_0
WCKD1_1
WCKD1B_1
EDCD1_0
EDCD1_1
EDCD1_2
EDCD1_3
DDBID1_0
DDBID1_1
DDBID1_2
DDBID1_3
WED1B
CSD1B_0
CSD1B_1
CASD1B
RASD1B
CKED1
CLKD1
CLKD1B
MVREFD_D
MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)
MVREFS_D
BC18
BB18
BA18
AY18
BE17
BA15
BB15
BD14
BH12
BK12
BN11
BL11
BH14
BK14
BM14
BN13
BJ11
BK10
BM7
BL9
BH10
BH8
BH6
BL3
BC5
BD4
BC3
BF1
BD6
BF6
BF4
BG2
BD11
BE12
AY14
BD12
BC15
BC14
BC9
BD10
BC11
BE10
BL15
BJ15
BK5
BJ4
BD17
BJ13
BJ9
BE3
BC17
BL13
BK8
BE5
AV17
AW15
AY15
BD9
BE14
BB12
AY17
AW17
2
DQD1_0
DQD1_1
DQD1_2
DQD1_3
DQD1_4
DQD1_5
DQD1_6
DQD1_7
DQD1_8
DQD1_9
DQD1_10
DQD1_11
DQD1_12
DQD1_13
DQD1_14
DQD1_15
DQD1_16
DQD1_17
DQD1_18
DQD1_19
DQD1_20
DQD1_21
DQD1_22
DQD1_23
DQD1_24
DQD1_25
DQD1_26
DQD1_27
DQD1_28
DQD1_29
DQD1_30
DQD1_31
MAD1_0
MAD1_1
MAD1_2
MAD1_3
MAD1_4
MAD1_5
MAD1_6
MAD1_7
MAD1_8
WED1b (9)
CKED1 (9)
CLKD1 (9)
CLKD1b (9)
DQD1_[31..0] (9)
MAD1_[8..0] (9)
ADBID1 (9)
WCKD1_0 (9)
WCKD1b_0 (9)
WCKD1_1 (9)
WCKD1b_1 (9)
EDCD1_0 (9)
EDCD1_1 (9)
EDCD1_2 (9)
EDCD1_3 (9)
DDBID1_0 ( 9)
DDBID1_1 ( 9)
DDBID1_2 ( 9)
DDBID1_3 ( 9)
CSD1b_0 (9)
CASD1b (9)
RASD1b (9)
1
A A
5
4
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CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
from use of the information include d herein .
from use of the information include d herein .
from use of the information include d herein .
Title
Title
2
Title
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Thursday, October 09, 2008
Thursday, October 09, 2008
Thursday, October 09, 2008
Sheet
Sheet
Sheet
62 2
62 2
62 2
of
of
of
1
Doc No.
Doc No.
Doc No.
Rev Date:
Rev Date:
Rev Date:
1
1
1
105-B507xx-10
105-B507xx-10
105-B507xx-10
5
U1K
+1.8V
R147 221R R147 221R
R151 110R R151 110R
C328 100nF_6.3V C328 100nF_6.3V
+3.3V
C332
C332
C333
C333
100nF_6.3V
100nF_6.3V
100nF_6.3V
C325
C325
10uF_X6S
10uF_X6S
+TSVDD
NS8 NS_VIA NS8 NS_VIA
12
JTAG_MODE (1)
100nF_6.3V
C335
C335
1uF_6.3V
1uF_6.3V
C329
C329
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C365
C365
D D
+1.8V
B113
B113
BLM15BD121SN1
BLM15BD121SN1
+1.8V
BLM15BD121SN1
BLM15BD121SN1
B119
B119
C C
B B
TS_FDO (19)
GPU_DPLUS (19)
GPU_DMINUS (19)
100nF_6.3V
100nF_6.3V
DNI
C334
C334
100nF_6.3V
100nF_6.3V
C326
C326
100nF_6.3V
100nF_6.3V
C330
C330
100nF_6.3V
100nF_6.3V
C366
C366
+3.3V
MR170
MR170
NC_10K
NC_10K
R1701KR170
1K
TP4008
TP4009
TP4009
VREFG
C327
C327
1uF_6.3V
1uF_6.3V
C331
C331
1uF_6.3V
1uF_6.3V
C367
C367
10nF
10nF
GND_TSVSS
JTAG_MODE
35mil
35mil
35mil
35mil
BG21
AU29
AU30
AU32
AU33
BB24
BE24
BC24
BD24
BE25
BD25
BB25
BC25
AV36
AV30
AW30
AU24
AU25
BA30
BB30
AU39
BG19
BA22
AV28
BA29
BA35
AW36
BA26
AY30
BM22
BN19
AU22
BG43
AU28
AU26
AR19
AP19
BA19
AY19
U1K
VREFG
VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4
VDDR5#1
VDDR5#2
VDDR5#3
VDDR5#4
VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4
TS_FDO
DPLUS
DMINUS
TSVDD
TSVSS
RSVD#1
RSVD#2
JMODE
VSSD#1
VSSD#2
VSSD#3
VSSD#4
VSSD#5
VSSD#6
VSSD#7
VSSD#8
VSSD#9
VSSD#10
VSSD#11
VSSD#12
VSSD#13
VSSD#14
NC_GPIO_31
NC_GPIO_32
TEST_YCLK
TEST_MCLK
RV770 GL A11
RV770 GL A11
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
DVPCNTL_MVP_0
DVPCNTL_MVP_1
GPIO_3_SMBDAT
GPIO_4_SMBCLK
GPIO_6_TACH
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_ 0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_ 1
GPIO_21
GPIO_22_ROMCSB
GPIO_23_CLKREQB
GPIO_24_TRSTB
GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS
GPIO_28_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE
GENERICF
GENERICG
GENERICH
CrossFire Card-Edge
Lower Cable Card Edge
1
DVOCLK
DVPCNTL_2
DVPDATA_1
DVPDATA_3
DVPDATA_5
DVPDATA_7
A A
DVPDATA_9
DVPDATA_11
DVPCNTL_1
GENERICD
3
5
7
9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39
J1J1
2
4
6
8
DVPDATA_0
10
12
DVPDATA_2
14
16
DVPDATA_4
18
20
DVPDATA_6
22
24
DVPDATA_8
26
28
DVPDATA_10
32
DVPCNTL_0
34
36
GPIO_2
38
40
Bundle B
5
Upper Cable Card Edge
DVP_MVP_CNTL_1
DVP_MVP_CNTL_0
DVPDATA_13
DVPDATA_15
DVPDATA_17
DVPDATA_19
DVPDATA_21
DVPDATA_23
GENERICB_R
GENERICC
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39
Bundle A (closer to the bracket)
DVPCLK
GPIO_0
GPIO_1
GPIO_2
GPIO_5
GPIO_7
VIP_0
VIP_1
VIP_2
VIP_3
VIP_4
VIP_5
VIP_6
VIP_7
VPCLK0
DVALID
PSYNC
VHAD_0
VHAD_1
VPHCTL
VIPCLK
1
3
5
7
9
J2J2
BH20
BK20
BM20
BJ21
BL21
BN21
BH22
BK22
BG23
BJ23
BN23
BL23
BK18
BM18
BJ19
BL19
AW25
AY24
AV25
AY25
AY26
AW26
BA28
AV26
AY28
AW28
AY29
AW29
AW24
AV24
BA24
AV29
BH24
BD22
BA25
BE22
AY22
BC22
BB22
BA21
BB21
AW22
BE21
BD21
BD19
BB19
BC19
BE19
AY21
BH18
BN17
BG17
BC21
AW21
BL17
BM16
BH16
BK16
BJ17
BC35
BE32
BC33
BA33
BC30
BD35
BB29
BD32
AV35
AW35
AY35
AV33
AW33
AY33
AV32
AW32
AY32
BB33
BE35
AU36
AU35
BB35
BA32
2
4
6
8
10
12
14
16
18
20
22
24
26
28
32
34
36
38
40
4
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVOCLK
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
DVP_MVP_CNTL_0
DVP_MVP_CNTL_1
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
HPD2
G1_GPIO_15_PWRCNTL_0
GPIO_16
GPIO_17_INT
GPIO_19_CTF
G1_GPIO_20_PWRCNTL_1
GPIO_21
GPIO_22_ROMCSb
PCIE_CLK_REQb
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
R198 0R R198 0R
R204 0R R204 0R
VIP_0
VIP_1
VIP_2
VIP_3
VIP_6
DVALID DVALID
PSYNC PSYNC
VHAD_0
DVPDATA_12
DVPDATA_14
DVPDATA_16
DVPDATA_18
DVPDATA_20
DVPDATA_22
DVALID_R
GPIO_1
4
TP4005 35mil TP4005 35mil
CrossFire
TP4003 35mil TP4003 35mil
TP4004 35mil TP4004 35mil
TP4006 35mil TP4006 35mil
+1.8V
NC_BLM15BD121SN1
NC_BLM15BD121SN1
B125
B125
NC_100nF_6.3V
NC_100nF_6.3V
1.8V to 3.3V translator option
SSCLKIN (3)
C398
C398
+3.3V
BLM15BD121SN1
BLM15BD121SN1
B124
B124
C397 1uF_6.3V C397 1uF_6.3V
C395 100nF_6.3V C395 100nF_6.3V
R197 0R R197 0R
MR197
MR197
3
NC_0R
NC_0R
Share pad
TP4007
TP4007
DVP_MVP_CNTL_0 : DE for bits D[ 12..23]
35mil
35mil
DVP_MVP_CNTL_1 : CLK for bits D[12..23]
CrossFire
FLOW_CONTROL_1 - Lower Cable
GPIO_3 (1)
FLOW_CONTROL_2 - U pper C a ble
GPIO_4 (1)
SWAP_LOCK_1 - Lower Cable
GPIO_5 (17)
SWAP_LOCK_2 - Upper C able
TACH (19)
R162 NC_0R R162 NC_0R
JTAG_TRSTB (1)
JTAG_TDI (1)
JTAG_TCK (1)
JTAG_TMS (1)
JTAG_TDO (1)
EXT_12V_DET (17)
EXT_12V_DET_B (17)
TP4011 35mil TP4011 35mil
TP4012 35mil TP4012 35mil TP4008
TP4013 35mil TP4013 35mil
TP4017 35mil TP4017 35mil
TP4016 35mil TP4016 35mil
TP4010 35mil TP4010 35mil
TP4014 35mil TP4014 35mil
TP4015 35mil TP4015 35mil
Place it at top edge of the
board on the bottom side.
In production, this block
will not be populated.
Mating connector: 6010028300G
(HEADER 2X8 1.27MM PITCH, SMD)
When attaching the daughter card (B176) align it by mounting hole.
+3.3V
TC1
TC1
NC_100nF_6.3V
NC_100nF_6.3V
R181 NC_0R R181 NC_0 R
R182 NC_0R R182 NC_0 R
GENERICB: Generic I2C_SDA
DVALID: Generic I2C_SCL
RP1A 33R RP1A 33R
GPIO_8_R
8 1
GPIO_9_R
RP1B 33R RP1B 33R
7 2
GPIO_10_R
RP1C 33R RP1C 33R
6 3
ROMCSb_R
RP1D 33R RP1D 33R
5 4
HPD2 (16)
ThermINT (17,19)
REG_THERM_INT# (17)
GPIO_19_CTF (17)
機
TR2 NC_0R TR2 NC_0R
DNI
JTAG_MODE
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
DNI
DVALID
DNI
GENERICB
BUO
TJ1
TJ1
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
NC_2X8SOCKET
NC_2X8SOCKET
R203
R203
NC_150R
NC_150R
Place close to U1
GPIOs for VDDC Setting
GENERICA (18)
TP30
TP30
35mil
35mil
GPIO_8_T
ROMCSb_T
GPIO_9_T
GPIO_10_T
SDA
SCL
3
U14
U14
1
VCCA
5
DIR
2
GND
A3B
NC_DIGPOT_10K
NC_DIGPOT_10K
C396
C396
10nF_25V
10nF_25V
SS_VCC
8
7
6
5
EXT_12V_DET (17)
Place SW1 & SW2 on the bottom side
(easily accessible).
Clearly Mark A & B contacts on the
silkscreen.
G1_GPIO_15_PWRCNTL_0 (11)
G1_GPIO_20_PWRCNTL_1 (11)
VCCB
VCC
CRSEL
SSO
SSEN
6
4
R201
R201
100K
100K
CLKIN
SMSEL1
SMSEL2
DS1081LE
DS1081LE
SS_VCC
R202
R202
100K
100K
U13
U13
1
2
3
4
GND
+3.3V
文件
密
TP31
TP31
35mil
35mil
For wire soldering
EXT_ADJ_1.8V
Place TRP1 & TR2 in a way
to minimize the stub when
they are not populated.
NC_33R
NC_33R
TRP1D
TRP1D
GPIO_8_R
5 4
NC_33R
NC_33R
TRP1C
TRP1C
ROMCSb_R
6 3
GPIO_9_R
TRP1B NC_33R TRP1B NC_33R
7 2
GPIO_10_R
TRP1A NC_33R TRP1A NC_33R
8 1
2
+3.3V
DNI
MR146 NC_10K MR146 NC_10K
DNI
MR150 NC_10K MR150 NC_10K
+3.3V
Share pad Place close to U13
TR1
TR1
10K
10K
35mil
35mil
TP29
TP29
MR148 10K MR148 10K
DNI
MR149 NC_10K MR149 NC_10K
DNI
MR152 NC_10K MR152 NC_10K
DNI
MR153 10K MR153 10K
MR155 NC_10K MR155 NC_10K
MR156 10KMR156 10K
DNI
MR157 NC_10K MR157 NC_10K
MR158 10KMR158 10K
MR159 NC_10K MR159 NC_10K
MR160 NC_10K MR160 NC_10K
MR161 10K MR161 10K
MR163 10K MR163 10K
MR164 NC_10K MR164 NC_10K
DNI
MR165 NC_10K MR165 NC_10K
MR166 NC_10K MR166 NC_10K
MR167 NC_10K MR167 NC_10K
MR168 NC_10K MR168 NC_10K
MR169 NC_10K MR169 NC_10K
MR173 NC_10K MR173 NC_10K
MR175 NC_10K MR175 NC_10K
Pull-Down Resistors are for BU until built-in pull-downs are verified.
+3.3V +5V
TR4
TR4
TR3
TR3
NC_4.7K
NC_4.7K
NC_4.7K
NC_4.7K
BUO BUO
SDA (3)
SCL (3)
TC2
TC2
NC_100nF_6.3V
NC_100nF_6.3V
2
PIN BASED STRAPS
R146 10K R146 10K
R150 10K R150 10K
DNI
R148 NC_10K R1 48 NC_10K
R149 10K R149 10K
R152 10K R152 10K
R153 NC_10K R1 53 NC_10K
DNI
R155 NC_10K R155 NC_10K
DNI
R156
R156
R157 10KR157 10K
DNI
R158 NC_10K
R158 NC_10K
DNI
R159 10KR159 10K
R160 10K R160 10K
R161 NC_10K R1 61 NC_10K
DNI
R163 NC_10K R1 63 NC_10K
DNI
R164 NC_10K R164 NC_10K
DNI
R165
R165
DNI
R166 NC_10K R166 NC_10K
DNI
R167 NC_10K R167 NC_10K
DNI
R168 NC_10K R168 NC_10K
DNI
R169 NC_10K R169 NC_10K
DNI
R173 NC_10K R173 NC_10K
DNI
R175 NC_10K R175 NC_10K
NTSC
VSYNC
VHAD_0
PSYNC
GPIO_0
GPIO_1
GPIO_2
VIP_1
NC_10K
NC_10K
GPIO_9_R
GPIO_13
GPIO_12
GPIO_11
GPIO_8
HSYNC1
DVALID
VIP_6
NC_10K
NC_10K
VIP_3
VIP_2
VIP_0
GPIO_21
VSYNC2
HSYNC2
GENERICC
GPIO_7
R176 10K R176 10K
R180
R180
10K
10K
ROMCSb_R
GPIO_8_R
PN 2280007900G for 1Mbit (PM25LV010A-100SCE)
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
?2007 Advanced Micro D evices
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
This AMD Board schemat ic and desi gn is the exclu sive pr opert y o f AMD,
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
and is provided only to entiti es under a non -disclosure agreement
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
with AMD for evalu ation purposes. F urther distribut ion or di sclosure
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
is strictly prohibited. Use of th is sch ematic and de sign fo r any pu rpose
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
other than evaluation re quires a Board T echnology License Agre ement
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
with AMD. AMD makes no r epre sentat ions or war ranties of an y kind
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
regarding this schemat ic and design , in cluding, n ot limit ed to,
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
any implied warranty of mer chanti bility or fitness for a par ticular
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
purpose, and disclaims respons ibility forany co nsequences resul ting
from use of the information include d herein .
from use of the information include d herein .
from use of the information include d herein .
Title
Title
Title
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
RH RV770 GDDR5 DVI-I VO DVI-I FH
VSYNC1 (3,15)
SW1A
SW1A
NC_DIP_SWX2
NC_DIP_SWX2
SW1B
SW1B
NC_DIP_SWX2
NC_DIP_SWX2
SW2A
SW2A
NC_DIP_SWX2
NC_DIP_SWX2
HSYNC1 (3,15)
VSYNC2 (3,16)
HSYNC2 (3,16)
U2
U2
1
CE#
2
SO
3
WP#
GND4SI
PM25LV010-25SCE
PM25LV010-25SCE
1
VIP_DEVICE_STRAP_EN
0: Slave VIP host port devices present (use if Theater is populated)
1: No slave VIP host port devices reporting presence during reset (use for
configurations without video-in)
If VIP_DEVICE_STRAP_EN is set to ?? then this pin is
used to sense whether a VIP slave de vic e is co nne cted to
the VIP Host interface. If VIP_DEVICE_STRAP_EN is set
to ?? then this pin is not used as a strap at all
VGA DISABLE : 1 for disable (s et to 0 for nor ma l operatio n)
GPIO(0) - TX_PWRS_ENB (Tra nsmi tter Pow er Sav ings Enable)
4 1
0: 50% Tx output swing for mobi le mo de
1: full Tx output swing (Default se tti ng for De skt op)
GPIO(1) - TX_DEEMPH_EN (Transmitter D e-emphasis E na ble)
3 2
0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setti ng for Des ktop)
GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable)
4 1
1 : Allows either PCIe 2.5 GT/s or 5.0 GT /s opera tion
0 : Debug use only (disables PCIe 5.0 GT/s negotiation)
MSI_DIS (Default: 0)
Disable Message Signaled Interrupt is both a RO M strap
and a pin strap. The pin strap is only applicable i f a B IOS
ROM is not present.
GPIO(9,13, 12,11) - CONFIG[3..0]
CONFIG[3]
0100 - 512Kbit M25P05A (S T)
0101 - 1Mbit M25P10A (ST)
CONFIG[2]
0101 - 2Mbit M25P20 (ST)
0101 - 4Mbit M25P40 (ST)
CONFIG[1]
0101 - 8Mbit M25P80 (ST)
0100 - 512Kbit Pm25LV512 (Chingis)
CONFIG[0]
0101 - 1Mbit Pm25LV010 (Chingis)
AUDIO_EN : Enable HD Audi o func ti on in the P C I co nfigurat io n spa ce.
0 - Disable HD Audio
1 - Enable HD Audio
HD audio must only be enabled on systems that are l ega lly
entitled. It is the responsibility of the system desi gner to
ensure that the system is entitled to support this feature.
HDMI_EN :
Note: Board manufacturer must not set t hi s str ap t o 1 unles s
there is an onboard HDMI connector. I t is the
manufacturers responsibility to pay royalti es if this strap is
enabled.
This Board doesn't have HD M I C onnec tor
therefore only pull down optio n is av ai lable
BIF_CLK_PM_EN
0 - Disable CLKREQ# power management capabi lity
1 - Enable CLKREQ# power management capabili ty
RESERVED :Internal use only. Other logic must not affect this signal
during RESET.
BUO
MR176 NC_10K MR176 NC_10K
SW2B
SW2B
3 2
NC_DIP_SWX2
NC_DIP_SWX2
+3.3V
C342
C342
100nF_6.3V
100nF_6.3V
GPIO_10_R
GPIO_9_R
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Thursday, October 09, 2008
Thursday, October 09, 2008
Thursday, October 09, 2008
72 2
72 2
72 2
of
of
of
1
HOLD#
8
VCC
7
6
SCK
5
Sheet
Sheet
Sheet
1 - NTSC TVO 0 - PAL TVO TV OUT STANDARD
BIOS1
BIOS1
BIOS
BIOS
113-B339XX-XXX
113-B339XX-XXX
VIDEO BIOS
FIRMWARE
Doc No.
Doc No.
Doc No.
105-B507xx-10
105-B507xx-10
105-B507xx-10
Rev Date:
Rev Date:
Rev Date:
1
1
1
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