MSI MS-V382 Schematics
MSI CONFIDENTIAL
00205363 weistang(唐浩健)
RD(C)2019121001 RMA工程課
劉巍 (30001789)
NAVI14 GDDR6 4PCS,8L 3xDPs +1xHDMI
105-D332xx-00B RevB Desktop board(110W TGP)
TABLE OF CONTENTS
SHEET NO. SHEET NAMESHEET NO.SHEET NAME
TOC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
21
22
23
24
25
BLOCK DIAGRAM
NAVI14 - PCIe Interface
NAVI14 - GPIO, EXTRA
NAVI14 - XTAL
NAVI14 - POWER and GND
NAVI14 - Decaps
NAVI14 - MEM CH AB
NAVI14 - MEM CH CD
GDDR6 x16 - MEM CH AB
GDDR6 x16 - MEM CH CD
NAVI14 - TMDPAB - USB,HDMI
NAVI14 - TMDPCD - DP,DP
NAVI14 - TMDPE - DP
REG VDDGFX/SOC CONTL
REG VDDGFX
REG VDDSOC
REG PCC
REG VDDCI/MVDD CNTL
REG VDDCI/MVDD20
REG - 0V75
LDO 1V8/VPP/5V/5V_VESA
MECHANICAL AND THERMAL
POWER MANAGEMENT
SVI2
DEBUG CIRCUITS
26
REVISION HISTORY
27
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V382
MS-V382
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, September 09, 2019
Monday, September 09, 2019
Monday, September 09, 2019
TOC
TOC
TOC
MS-V382
1.0
1.0
1 27
1 27
1 27
1.0
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
MSI CONFIDENTIAL
00205363 weistang(唐浩健)
RD(C)2019121001 RMA工程課
劉巍 (30001789)
External Connector
+12V_EXT
JTAG/I2C
PCC
Speed control
& temperature
sense
SVI2/I2C/Power Management
POWER DELIVERY
Debug
Regulator HOT
Straps
BIOS
Built-in PWM
INTERRUPT
Temp. Sensing
DBGDATA[7:0]
GPIO5
GPIO4
GPIOs
ROM
Thermal
DDCVGA
PROCHOT_L
D+/D-
FAN_OUT
FAN_IN
TMDPA
TMDPB
TMDPC
TMDPD
TMDPE
HDMI
DP
Debug Header
POWER REGULATORS
From +12 V EXT AND +12V_BUS
+VDDCR_GFX, VDDCR_SOC
From +12V_BUS
+MVDD, +VDDCI_MEM, FAN
From +12V_BUS
+5V +5V_VESA
From +3.3V Direct:
VDDRN_33, +VPP
1.8V, 0.75V
FAN
Power Sequencing
and Control Circuit
+3.3V_BUS
+12V_BUS
Temperature Critical
PCI-Express Bus
REFCLK
CTF
PCI-Express
100MHz
Clock
NAVI14 D332 110W TGP
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V382
MS-V382
MSI
MSI
MSI
MS-V382
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Monday, September 09, 2019
Monday, September 09, 2019
Monday, September 09, 2019
10
10
2 27
2 27
2 27
10
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
(3) NAVI14 PCIe Edge Connector
MSI CONFIDENTIAL
00205363 weistang(唐浩健)
RD(C)2019121001 RMA工程課
劉巍 (30001789)
RESERVE FOR PCIE SLEW RATE
These termination should be as short as possible, never exceed 500mil
R15 1%
R16 1%
R17 1%
R18 1%
R20 1%
R23 1%
R24 1%
R25 1%
R26 1%
R27 1%
R28 1%
R29 1%
R30 1%
WAKEB
3
+3V3_BUS
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
43.2R1 2
+3V3_BUS
12
R34
0R
share
UNNAMED_28_MOSN_I26_G
pads
1
12
R36
2.2K
2 3
BSH111
R40
1 2
DNI
0R
+3V3_BUS
+3V3_BUS
12
R5
10K
+12V_BUS
12
12
C51
10uF
16V
CLKREQ#_PCIE
PCIE_REFCLKP
PCIE_REFCLKN
DGPU_PWR_EN_PCIE
PWRBRK#
PRSNT2_B31
DGPU_PWR_OK_PCIE
TH_ALERT#
PRSNT2_B81
RSVD_A50
PRESENCE
RSVD_B82
PRSNT2_B17
3
3
3
12
C7
C8
10uF
10uF
16V
16V
12
12
C12
C11
0.01uF
0.1uF
25V
10V
B12
3
A13
3
A14
3
A19
3
B30
3
B31
3
A32
3
A33
3
B81
3
A50
3
B48
3
B82
3
B17
3
JTAGIO_LOOP
PRESENCE
3
PRSNT2_B17
3
PRSNT2_B31
3
PRSNT2_B81
3
WAKEB_CON
CLKREQ#_PCIE
3
PWRBRK#
3
DGPU_PWR_EN_PCIE
DGPU_PWR_OK_PCIE
TH_ALERT#
RSVD_A50
3
RSVD_B82
3
12
C50
10uF
16V
DNI
+3V3_BUS
+3V3_AUX
+12V_BUS_B
Q4
12
MR34
0R
DNI
DNI
12
12
12
C9
C13
C10
10uF
10uF
1uF
6.3V
6.3V
6.3V
DNI
UNNAMED_28_CAP_I87_A
C17
1pF1 2
50V
UNNAMED_28_CAP_I88_A
C18
1pF1 2
50V
UNNAMED_28_CAP_I84_A
C19
1pF1 2
50V
UNNAMED_28_CAP_I85_A
C20
1pF1 2
50V
UNNAMED_28_CAP_I83_A
C21
1pF1 2
50V
UNNAMED_28_CAP_I82_A
C22
1pF1 2
50V
UNNAMED_28_CAP_I81_A
C23
1pF1 2
50V
UNNAMED_28_CAP_I56_A
C24
1pF1 2
50V
UNNAMED_28_CAP_I57_A
C25
1pF1 2
50V
UNNAMED_28_CAP_I55_A
C26
1pF1 2
50V
UNNAMED_28_CAP_I54_A
C27
1pF1 2
50V
UNNAMED_28_CAP_I53_A
C28
1pF1 2
50V
UNNAMED_28_CAP_I52_A
C29
1pF1 2
50V
+3V3_AUX
12
R37
10K
DNI
MPCIE1
A2
+12V
A3
+12V
B1
+12V
B2
+12V
B3
+12V
A9
+3.3V
A10
+3.3V
B8
+3.3V
B10
3.3Vaux
A4
GND
A12
GND
A15
GND
A18
GND
A20
GND
A23
GND
A24
GND
A27
GND
A28
GND
A31
GND
A34
GND
A37
GND
A38
GND
A41
GND
A42
GND
A45
GND
A46
GND
A49
GND
A51
GND
A54
GND
A55
GND
A58
GND
A59
GND
A62
GND
A63
GND
A66
GND
A67
GND
A70
GND
A71
GND
A74
GND
A75
GND
A78
GND
A79
GND
A82
GND
B4
GND
B7
GND
B13
GND
B16
GND
B18
GND
B21
GND
B22
GND
B25
GND
B26
GND
B29
GND
B32
GND
B35
GND
B36
GND
B39
GND
B40
GND
B43
GND
B44
GND
B47
GND
B49
GND
B52
GND
B53
GND
B56
GND
B57
GND
B60
Mechanical Key
GND
B61
GND
B64
GND
B65
GND
B68
GND
B69
GND
B72
GND
B73
GND
B76
GND
B77
GND
B80
GND
B9
JTAG1
A5
JTAG2
A6
JTAG3
A7
JTAG4
A8
JTAG5
A1
PRSNT1#
B17
PRSNT2#_B17
B31
PRSNT2#_B31
B48
PRSNT2#_B48
B81
PRSNT2#_B81
B11
WAKE#
B12
CLKREQ#
B30
PWRBRK#
A19
RSVD_A19
A32
RSVD_A32
A33
RSVD_A33
A50
RSVD_A50
B82
RSVD_B82
x16 GEN4 PCIe
PERST#
REFCLK+
REFCLK-
SMCLK
SMDAT
PETp10
PETn10
PETp11
PETn11
PETp12
PETn12
PETp13
PETn13
PETp14
PETn14
PETp15
PETn15
PERp10
PERn10
PERp11
PERn11
PERp12
PERn12
PERp13
PERn13
PERp14
PERn14
PERp15
PERn15
PERST#
A11
PCIESMCLK
B5
PCIESMDAT
B6
A13
A14
B14
PETp0
B15
PETn0
B19
PETp1
B20
PETn1
B23
PETp2
B24
PETn2
B27
PETp3
B28
PETn3
B33
PETp4
B34
PETn4
B37
PETp5
B38
PETn5
B41
PETp6
B42
PETn6
B45
PETp7
B46
PETn7
B50
PETp8
B51
PETn8
B54
PETp9
B55
PETn9
B58
B59
B62
B63
B66
B67
B70
B71
B74
B75
B78
B79
PERP0
A16
PERp0
PERN0
A17
PERn0
PERP1
A21
PERp1
PERN1
A22
PERn1
PERP2
A25
PERp2
PERN2
A26
PERn2
PERP3
A29
PERp3
PERN3
A30
PERn3
PERP4
A35
PERp4
PERN4
A36
PERn4
PERP5
A39
PERp5
PERN5
A40
PERn5
PERP6
A43
PERp6
PERN6
A44
PERn6
PERP7
A47
PERp7
PERN7
A48
PERn7
A52
PERp8
A53
PERn8
A56
PERp9
A57
PERn9
A60
A61
A64
A65
A68
A69
A72
A73
A76
A77
A80
A81
+3V3_BUS
2
6 1
R3 DNI
5
Q1A
3 4
BSS138PS
R4 DNI
TP3
TP5
TP16
TP18
C30 6.3V
0.22uF1 2
C31 6.3V
0.22uF1 2
C32 6.3V
0.22uF1 2
C33 6.3V
0.22uF1 2
C34 6.3V
0.22uF1 2
C35 6.3V
0.22uF1 2
C36 6.3V
0.22uF1 2
C37 6.3V
0.22uF1 2
C38 6.3V
0.22uF1 2
C39 6.3V
0.22uF1 2
C40 6.3V
0.22uF1 2
C41 6.3V
0.22uF1 2
C42 6.3V
0.22uF1 2
C43 6.3V
0.22uF1 2
C44 6.3V
0.22uF1 2
C45 6.3V
0.22uF1 2
+3V3_BUS
12
BSS138PS
12
R10
R9
45.3K
45.3K
1%
1%
0R1 2
0R1 2
LMSMCLK
LMSMDATA
R1
R2
Q1B
INPUT_RAILS_UP
22,24
IN
GPUSMCLK
0R1 2
GPUSMDAT
0R1 2
PCIE_REFCLKP
3
PCIE_REFCLKN
3
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
C6 DNI 10V
R6
R7
AN10
SMBCLK
AP10
SMBDAT
AN14
PCIE_REFCLKP
AM14
PCIE_REFCLKN
AR15
PCIE_RX0P
AP15
PCIE_RX0N
AN16
PCIE_RX1P
AM16
PCIE_RX1N
AR17
PCIE_RX2P
AP17
PCIE_RX2N
AN18
PCIE_RX3P
AM18
PCIE_RX3N
AR19
PCIE_RX4P
AP19
PCIE_RX4N
AN20
PCIE_RX5P
AM20
PCIE_RX5N
AR21
PCIE_RX6P
AP21
PCIE_RX6N
AN22
PCIE_RX7P
AM22
PCIE_RX7N
AJ14
PCIE_TX0P
AH14
PCIE_TX0N
AL15
PCIE_TX1P
AK15
PCIE_TX1N
AJ16
PCIE_TX2P
AH16
PCIE_TX2N
AL17
PCIE_TX3P
AK17
PCIE_TX3N
AJ18
PCIE_TX4P
AH18
PCIE_TX4N
AL19
PCIE_TX5P
AK19
PCIE_TX5N
AJ20
PCIE_TX6P
AH20
PCIE_TX6N
AL21
PCIE_TX7P
AK21
PCIE_TX7N
Navi14 Rev0.90
symbol1
U1A
DNI
0.1uF1 2
0R1 2
0R1 2
PERSTB
CLKREQB
WAKEB
PX_EN
PCIE_ZVSS
3
RST_EN
1
UNNAMED_28_74AUP1G57_I276_C
6
R8 DNI
AN12
CLKREQ#
AP13
WAKEB
AR13
PX_EN_T
AR26
PCIE_ZVSS
AR23
U3
5
A
VCC
4
Y
B
2
GND
C
74AUP1G57GM
+3V3_BUS
12
R13
10K
DNI
0R 12
3
2mA max current
R38 1%
Should minimize the wire
resistance and parasitic
capacitance from external board
device to internal bump.
- total trace resistance < 1 ohm
- total parasitic capacitance < 10pF
C5 6.3V
PERST#_BUF
10K1 2
R14
R19
12
R21
1K
DNI
200R1 2
0.1uF1 2
OUT
CLKREQ#_PCIE
3
PX_EN
0R1 2
12
C53
0.1uF
6.3V
SYMBOL LEGEND
DNI
DO NOT
INSTALL
ACTIVE
b or #
LOW
BUO
15,19,23,24
23,24,26
OUT
BRING UP
ONLY
DIGITAL
GROUND
ANALOG
GROUND
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V382
MS-V382
MSI
MSI
MSI
MS-V382
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
NAVI14 - PCIe Interface
NAVI14 - PCIe Interface
NAVI14 - PCIe Interface
Thursday, September 12, 2019
Thursday, September 12, 2019
Thursday, September 12, 2019
10
10
3 27
3 27
3 27
10
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
(4) NAVI14 GPIOs & ROM
MSI CONFIDENTIAL
00205363 weistang(唐浩健)
RD(C)2019121001 RMA工程課
劉巍 (30001789)
7-BIT I2C 8-BIT I2C
ADDRESS
ADDRESS
0x60
0x30
0x44
0x22
0x53 0xA6
0x90
0x48
0x4C
0x98
FUNCTION
VDDCR_GFX/SOC
MVDD/VDDCI
PCCψreserved
G6 Temperture
EXT SENSOR
Note: Internal PU/PD at GPIO pad is ~40k
PINSTRAP_6
PINSTRAP_7
GPIO_13
GPIO_15
PINSTRAP_5
PINSTRAP_4
PINSTRAP_3
GPIO_12
GPIO_11
GPIO_18
GPIO_17
GPIO_16
PINSTRAP_2
PINSTRAP_1
PINSTRAP_0
GPIO_19
GPIO_10_ROMCS#
GPIO_6
strength in 14nm design spec
Internal Default
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
Value
STRAP_BIF_GEN4_DIS_A
0
0: PCIe GEN 4 supported
1: PCIe GEN 4 not supported
PINSTRAP_BIF_CLK_PM_EN
0
0: CLKREQ# power management capability is disabled
1: CLKREQ# power management capability is enabled
PINSTRAP_BIF_LC_TX_SWING
0
0: Full swing mode
1: Reduced swing mode(half swing)
PINSTRAP_BIF_VGA_DIS
0
0: VGA controller capacity enabled
1: The device won't be recognised as the system's VGA controller
0
PINSTRAP_AUD_PORT_CONN[2:0]
Number of audio-capable display outputs
0
0: All endpoints connected
1: 6 endpoints connected
0
2: 5 endpoints connected
3: 4 endpoints connected
Deafault(PINSTRAP5,PINSTRAR4,PINSTRAR3) = 000
PINSTRAP_AUD[1:0]
0
1: Audio for DisplayPort only
0
2: Audio for DisplayPort and HDMI if dongle is detected
3: Audio for both DisplayPort and HDMI
Deafault(GPIO12,GPIO11) = 11
PINSTRAP_FIG[1:0] - No definition on NV
0
0
PINSTRAP_MVDD_FB_DIVIDER_CONFIG
0
0: Divider does not exist
1: Divider exists
1
0
1
PINSTRAP_SMBUS_ADDR
0
0: 0x41h
1: 0x40h
1
+3V3_BUS +1V8
GPIO_5_REG_HOT#
GPIO_5_REG_HOT#
4
PINSTRAP_0
AJ5
PINSTRAP_1
AJ4
PINSTRAP_2
AG6
PINSTRAP_3
AG5
PINSTRAP_4
AF7
PINSTRAP_5
AF5
PINSTRAP_6
AF4
PINSTRAP_7
AF8
I2C BUS
SCL/SDA
SCL/SDA
SCL/SDA
DDCVGACLK/DATA
DDCVGACLK/DATA
+1V8
12
R96
1K
12
15,18,19,26
R97
1K
15,18,19,26
+3V3_BUS
OUT
BI
12
R98
1K
DEVICE
U501/IR35217
U701/NCP81022
U4601/GS8601
U4000/TMP102A
U4001/LM96163
R92
R93
R127
R128
REG_SCL
REG_SDA
R99
AB7
HPD1
14
IN
HPD2
13
IN
HPD3
13
IN
HPD4
12
IN
1.5K1 2
10K1 2
10K1 2
10K1 2
1 2
R130
0R
1 2
R131
0R
DDCVGACLK
DDCVGADATA
TEST_PG_S5P
TEST_PG
TEST_PG_BACO
PS_EN
0R1 2
SCL
SDA
4
4
4
4
GPIO_9_ROMSO
GPIO_8_ROMSI
GPIO_7_ROMSCK
GPIO_10_ROMCS#
AB9
AC8
AN25
AP25
AN26
AP26
AK10
AK7
AJ9
AH9
W8
W5
Y4
Y5
PINSTRAP_0
PINSTRAP_1
PINSTRAP_2
PINSTRAP_3
PINSTRAP_4
PINSTRAP_5
PINSTRAP_6
PINSTRAP_7
GENERICA
GENERICB
HPD1
GENERICC_HPD2
GENERICD_HPD3
GENERICE_HPD4
GENERICF_HPD5
SCL
SDA
DDCVGACLK
DDCVGADATA
TEST_PG_S5P
TEST_PG
TEST_PG_BACO
PS_EN
symbol2
Navi14 Rev0.90
RN1A
RN1B
RN1C
RN1D
U1B
N5
GPIO_0
N6
GPIO_1
N8
GPIO_2
R6
GPIO_3
GPIO4_GFX_PCC#
R5
GPIO_4
GPIO_5_REG_HOT#
T8
GPIO_5
GPIO_6
T7
GPIO_6
GPIO_7_ROMSCK
P5
GPIO_7_ROMSCK
GPIO_8_ROMSI
GPIO_9_ROMSO
GPIO_10_ROMCSB
GPIO_SVC0
GPIO_SVD0
GPIO_SVT0
GPIO_SVC1
GPIO_SVD1
GPIO_SVT1
SWAPLOCKB
SWAPLOCKA
GENLK_CLK
GENLK_VSYNC
BL_ENABLE
BL_PWM_DIM
BAMACO_EN
GPIO_8_ROMSI
P7
GPIO_9_ROMSO
N4
GPIO_10_ROMCS#
P4
GPIO_11
T4
GPIO_11
GPIO_12
U8
GPIO_12
GPIO_13
T5
GPIO_13
R8
GPIO_14
GPIO_15
U5
GPIO_15
GPIO_16
U6
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_17
V4
GPIO_18
V8
GPIO_19
V7
V5
SVC0
AD5
SVD0
AD7
SVT0
AD4
SVC1
AE6
SVD1
AE8
SVT1
AE5
W6
U9
W9
Y9
AP11
AN11
AR11
DIGON
BAMACO_EN
AH22
12
R100
1K
DNI
GPIO_9_ROMSO_R
33R1 8
GPIO_8_ROMSI_R
33R2 7
GPIO_7_ROMSCK_R
33R3 6
GPIO_10_ROMCS#_R
33R4 5
R48
R49
4
4
4
4
4
4
4
4
4
4
R86
R87
R88
R89
R90
R91
0R1 2
0R1 2
0R1 2
0R1 2
0R1 2
0R1 2
24,25,26
OUT
PCB_Delay+ ROM_Delay<8ns
+3V3_BUS +3V3_BUS
U5
3
WP
2
SO
5
SI
6
SCK
1
CE
GD25Q80C
GFX_SOC_VRHOT#
0R1 2
MVDD_VDDCI_OCP#
0R1 2
15,18,26
IN
SVC_GFX_SOC
SVD_GFX_SOC
SVT_GFX_SOC
C60 DNI 10V
C61 DNI 10V
C62 DNI 10V
C63 DNI 10V
C64 DNI 10V
C65 DNI 10V
SVC_MVDD_VDDCI
SVD_MVDD_VDDCI
SVT_MVDD_VDDCI
8
VDD
7
HOLD
12
4
GND
10V
AC/DC
FL/GL
FL/GL
VDDCR_GFX PCC (low active)
VR HOT
USB C Exteranl power detect
ROM Control; ROMSCK
ROM Control; ROMSI
ROM Control; ROMSO
ROM COntrol; ROMSCB / Pinstrap
Pinstrap
Pinstrap
Pinstrap
Pinstrap, VGA En/Dis
Pinstrap
Pinstrap, Board ID
pinstrap, Board ID,
Pinstrap
Pinstrap, Smbus address
PD_RESET
OUT
OUT
IN
0.1uF1 2
0.1uF1 2
0.1uF1 2
0.1uF1 2
0.1uF1 2
0.1uF1 2
OUT
OUT
IN
C48
0.1uF
IN
IN
15,25
15,25
15
C62/C63: Close to GPU
C60/C61/C64/C65: Close to VR
25
25
25
User
15
19
DCE BIF
Platform
SMU
R51 DNI
R52 DNI
R53 DNI
R54 DNI
R56 DNI
R57 DNI
R58 DNI
R59 DNI
R60 DNI
R61 DNI
R62 DNI
R63 DNI
R64 DNI
R65 DNI
R66
R67 DNI
R68
R69 DNI
R70 DNI
R71 DNI
R72 DNI
R73 DNI
R74
R75 DNI
RN700A DNI 0.1%
R76 DNI
R77 DNI
R78 DNI
R79 DNI
R80 DNI
R81 DNI
R82 DNI
R83 DNI
R84 DNI
R85 DNI
R124 DNI
R125 DNI
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
100R1 4
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
10K1 2
1K1 2
10K1 2
PINSTRAP_0
GPIO_6
Definition
4: 3 endpoints connected
5: 2 endpoints connected
6: 1 endpoint connected
7: 0 endpoints connected
PINSTRAP_BFI_MEM_AP_SIZE[2:0] Or PINSTRAP_ROM_CONFIG[2:0]
100 - 512KBIT (ST) M25P05A
101 - 1MBIT (ST) (M25P10A)
101 - 2MBIT (ST) M25P20
101 - 4MBIT (ST) M25P40
101 - 8MBIT (ST) M25P80
100 - 512KBIT (CHINGIS) PM25LV512
101 - 1MBIT (CHINGIS) PM25LV010
Deafault(PINSTRAP2,PINSTRAR1,PINSTRAR0) = 101
PINSTRAP_BIOS_ROM_EN
0: Disable the external BIOS ROM device
1: Enable the external BIOS ROM device
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V382
MS-V382
MSI
MSI
MSI
MS-V382
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
NAVI14 - GPIO, EXTRA
NAVI14 - GPIO, EXTRA
NAVI14 - GPIO, EXTRA
Thursday, September 12, 2019
Thursday, September 12, 2019
Thursday, September 12, 2019
10
10
4 27
4 27
4 27
10
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
(5) NAVI14 XTAL
MSI CONFIDENTIAL
00205363 weistang(唐浩健)
RD(C)2019121001 RMA工程課
劉巍 (30001789)
100MHz oscilator option
+1V8
B1
1 2
12
C55
10uF
+3V3_BUS
+1V8
R112
1 2
R113
1 2
XTRIG* are for debug purpose
R116
R117
R119
OSC_GAIN[2:0] = 3'd6
on Production Board
XTRIG6
2.2K
1%
XTRIG7
2.2K
1%
OSC_GAIN2
10K1 2
OSC_GAIN1
10K1 2
OSC_GAIN0
10K1 2
U1E
symbol5
AC9
XTRIG6
AD8
XTRIG7
AR9
OSC_GAIN2
AP9
OSC_GAIN1
PLLCHARZ1_H
AN9
OSC_GAIN0
PLLCHARZ1_L
Navi14 Rev0.90
AP7
XTALIN
AR7
XTALOUT
AB8
ANALOGIO
PLLCHARZ1_H
AP12
PLLCHARZ1_L UNNAMED_5_CAP_I10_B
AR12
XTALIN
XTALOUT
ANALOGIO
6.3V
R111
TP22
TP30
C57
1 2
C58
1 2
Total parasitic cap < 1.2pf when C57/C58 DNI
DNI
120R
UNNAMED_5_CAP_I11_B
0.1uF
0.1uF
Avoid noisy area
12
100M_OSC
20R1 2
R122
10V
10V
R123
OSC_VDD18
12
12
C4
C54
10uF
0.1uF
6.3V
6.3V
1 2
1 2
Y1
4
VDD
3
C3
CLK
2.2uF
6.3V
3
2
51.1R
1%
51.1R
1%
100.00000 MHZ
MY1
OUT4VDD
GND
NA
OVERLAP WITH Y1
2
GND
1
R1090RDNI
1 2
NC
UNNAMED_5_OSC_I73_OE
1
OE
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V382
MS-V382
MSI
MSI
MSI
MS-V382
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
NAVI14 - XTAL
NAVI14 - XTAL
NAVI14 - XTAL
Thursday, September 12, 2019
Thursday, September 12, 2019
Thursday, September 12, 2019
10
10
5 27
5 27
5 27
10
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
(6) NAVI14 POWER AND GND
MSI CONFIDENTIAL
00205363 weistang(唐浩健)
RD(C)2019121001 RMA工程課
劉巍 (30001789)
U1R
symbol18
A2
VSS#1
A5
VSS#2
A7
VSS#3
A10
VSS#4
A12
VSS#5
A14
VSS#6
A16
VSS#7
A18
VSS#8
A20
VSS#9
A22
VSS#10
A24
VSS#11
A26
VSS#12
A29
VSS#13
A31
VSS#14
A34
VSS#15
B1
VSS#16
B4
VSS#17
B6
VSS#18
B9
VSS#19
B11
VSS#20
B13
VSS#21
B15
VSS#22
B17
VSS#23
B19
VSS#24
B21
VSS#25
B23
VSS#26
B25
VSS#27
B27
VSS#28
B30
VSS#29
B32
VSS#30
B34
VSS#31
B35
VSS#32
C5
VSS#33
C7
VSS#34
C10
VSS#35
C12
VSS#36
C14
VSS#37
C16
VSS#38
C18
VSS#39
C20
VSS#40
C22
VSS#41
C24
VSS#42
C26
VSS#43
C29
VSS#44
C31
VSS#45
D6
VSS#46
D9
VSS#47
D11
VSS#48
D13
VSS#49
D15
VSS#50
D17
VSS#51
D19
VSS#52
D21
VSS#53
D23
VSS#54
D25
VSS#55
D27
VSS#56
D30
VSS#57
D34
VSS#58
E2
VSS#59
E5
VSS#60
E7
VSS#61
E10
VSS#62
E12
VSS#63
E14
VSS#64
E16
VSS#65
E18
VSS#66
E20
VSS#67
E22
VSS#68
E24
VSS#69
E26
VSS#70
E29
VSS#71
E31
VSS#72
E33
VSS#73
E35
VSS#74
F3
VSS#75
F6
VSS#76
F9
VSS#77
F11
VSS#78
F13
VSS#79
F15
VSS#80
F17
VSS#81
F19
VSS#82
F21
VSS#83
F23
VSS#84
F25
VSS#85
F27
VSS#86
F30
VSS#87
F32
VSS#88
F34
VSS#89
G1
VSS#90
G4
VSS#91
G7
VSS#92
G10
VSS#93
G12
VSS#94
G14
VSS#95
G16
VSS#96
G18
VSS#97
G20
VSS#98
G22
VSS#99
G24
VSS#100
G26
VSS#101
G31
VSS#102
G33
VSS#103
G35
VSS#104
H9
VSS#105
H11
VSS#106
H13
VSS#107
H15
VSS#108
H17
VSS#109
H19
VSS#110
H21
VSS#111
H23
VSS#112
H25
VSS#113
H27
VSS#114
J3
VSS#115
J5
VSS#116
J8
VSS#117
J12
VSS#118
J14
VSS#119
J16
VSS#120
J18
VSS#121
J20
VSS#122
J22
VSS#123
J24
VSS#124
J28
VSS#125
J30
VSS#126
J32
VSS#127
J34
VSS#128
K3
VSS#129
K6
VSS#130
K29
VSS#131
K31
VSS#132
K33
VSS#133
K35
VSS#134
L1
VSS#135
L4
VSS#136
L28
VSS#137
L30
VSS#138
L32
VSS#139
L34
VSS#140
M3
VSS#141
M5
VSS#142
M8
VSS#143
M10
VSS#144
M11
VSS#145
M13
VSS#146
M15
VSS#147
M17
VSS#148
M19
VSS#149
M21
VSS#150
M23
VSS#151
M24
VSS#152
M27
VSS#153
M29
VSS#154
M31
VSS#155
M33
VSS#156
M35
VSS#157
N1
VSS#158
N7
VSS#159
N12
VSS#160
Navi14 Rev0.90
U1S
N14
VSS#161
N16
VSS#162
N18
VSS#163
N20
VSS#164
N22
VSS#165
N24
VSS#166
N28
VSS#167
N30
VSS#168
N32
VSS#169
N34
VSS#170
P3
VSS#171
P6
VSS#172
P10
VSS#173
P11
VSS#174
P13
VSS#175
P15
VSS#176
P17
VSS#177
P19
VSS#178
P21
VSS#179
P23
VSS#180
P27
VSS#181
P29
VSS#182
P31
VSS#183
P33
VSS#184
P35
VSS#185
R1
VSS#186
R4
VSS#187
R7
VSS#188
R10
VSS#189
R12
VSS#190
R14
VSS#191
R16
VSS#192
R18
VSS#193
R20
VSS#194
R22
VSS#195
R24
VSS#196
R28
VSS#197
R30
VSS#198
R32
VSS#199
R34
VSS#200
T3
VSS#201
T6
VSS#202
T10
VSS#203
T11
VSS#204
T13
VSS#205
T15
VSS#206
T17
VSS#207
T19
VSS#208
T21
VSS#209
T23
VSS#210
T27
VSS#211
T29
VSS#212
T31
VSS#213
T33
VSS#214
T35
VSS#215
U1
VSS#216
U4
VSS#217
U7
VSS#218
U10
VSS#219
U12
VSS#220
U14
VSS#221
U16
VSS#222
U18
VSS#223
U20
VSS#224
U22
VSS#225
U24
VSS#226
U28
VSS#227
U30
VSS#228
U32
VSS#229
U34
VSS#230
V3
VSS#231
V6
VSS#232
V10
VSS#233
V11
VSS#234
V13
VSS#235
V15
VSS#236
V17
VSS#237
V19
VSS#238
V21
VSS#239
V23
VSS#240
V27
VSS#241
V29
VSS#242
V31
VSS#243
V33
VSS#244
V35
VSS#245
W1
VSS#246
W4
VSS#247
W7
VSS#248
W10
VSS#249
W12
VSS#250
W14
VSS#251
W16
VSS#252
W18
VSS#253
W20
VSS#254
W22
VSS#255
W24
VSS#256
W28
VSS#257
W30
VSS#258
W32
VSS#259
W34
VSS#260
Y3
VSS#261
Y6
VSS#262
Y10
VSS#263
Y11
VSS#264
Y13
VSS#265
Y15
VSS#266
Y17
VSS#267
Y19
VSS#268
Y21
VSS#269
Y23
VSS#270
Y27
VSS#271
Y29
VSS#272
Y31
VSS#273
Y33
VSS#274
Y35
VSS#275
AA1
VSS#276
AA4
VSS#277
AA7
VSS#278
AA12
VSS#279
AA14
VSS#280
AA16
VSS#281
AA18
VSS#282
AA20
VSS#283
AA22
VSS#284
AA24
VSS#285
AA28
VSS#286
AA30
VSS#287
AA32
VSS#288
AA34
VSS#289
AB3
VSS#290
AB6
VSS#291
AB10
VSS#292
AB11
VSS#293
AB13
VSS#294
AB15
VSS#295
AB17
VSS#296
AB19
VSS#297
AB21
VSS#298
AB23
VSS#299
AB27
VSS#300
AB29
VSS#301
AB31
VSS#302
AB33
VSS#303
AB35
VSS#304
AC1
VSS#305
AC4
VSS#306
AC7
VSS#307
AC12
VSS#308
AC14
VSS#309
AC16
VSS#310
AC18
VSS#311
AC20
VSS#312
AC22
VSS#313
AC24
VSS#314
AC28
VSS#315
AC30
VSS#316
AC32
VSS#317
AC34
VSS#318
AD3
VSS#319
AD6
VSS#320
symbol19
AD10
VSS#321
AD11
VSS#322
AD13
VSS#323
AD15
VSS#324
AD17
VSS#325
AD19
VSS#326
AD21
VSS#327
AD23
VSS#328
AD27
VSS#329
AD29
VSS#330
AD31
VSS#331
AD33
VSS#332
AD35
VSS#333
AE1
VSS#334
AE4
VSS#335
AE7
VSS#336
AE9
VSS#337
AE12
VSS#338
AE14
VSS#339
AE16
VSS#340
AE18
VSS#341
AE20
VSS#342
AE22
VSS#343
AE24
VSS#344
AE28
VSS#345
AE30
VSS#346
AE32
VSS#347
AE34
VSS#348
AF3
VSS#349
AF6
VSS#350
AF11
VSS#351
AF13
VSS#352
AF15
VSS#353
AF17
VSS#354
AF19
VSS#355
AF21
VSS#356
AF23
VSS#357
AF29
VSS#358
AF31
VSS#359
AF33
VSS#360
AF35
VSS#361
AG1
VSS#362
AG4
VSS#363
AG7
VSS#364
AG12
VSS#365
AG14
VSS#366
AG16
VSS#367
AG18
VSS#368
AG20
VSS#369
AG22
VSS#370
AG24
VSS#371
AG28
VSS#372
AG30
VSS#373
AG32
VSS#374
AG34
VSS#375
AH13
VSS#376
AH15
VSS#377
AH17
VSS#378
AH19
VSS#379
AH21
VSS#380
AH24
VSS#381
AH27
VSS#382
AJ3
VSS#383
AJ7
VSS#384
AJ10
VSS#385
AJ13
VSS#386
AJ15
VSS#387
AJ17
VSS#388
AJ19
VSS#389
AJ21
VSS#390
AJ23
VSS#391
AJ25
VSS#392
AJ29
VSS#393
AJ31
VSS#394
AJ33
VSS#395
AJ35
VSS#396
AK1
VSS#397
AK4
VSS#398
AK6
VSS#399
AK9
VSS#400
AK11
VSS#401
AK12
VSS#402
AK14
VSS#403
AK16
VSS#404
AK18
VSS#405
AK20
VSS#406
AK22
VSS#407
AK26
VSS#408
AK30
VSS#409
AK32
VSS#410
AK34
VSS#411
AL3
VSS#412
AL7
VSS#413
AL14
VSS#414
AL16
VSS#415
AL18
VSS#416
AL20
VSS#417
AL22
VSS#418
AL27
VSS#419
AL31
VSS#420
AL33
VSS#421
AL35
VSS#422
AM2
VSS#423
AM6
VSS#424
AM9
VSS#425
AM10
VSS#426
AM11
VSS#427
AM12
VSS#428
AM13
VSS#429
AM15
VSS#430
AM17
VSS#431
AM19
VSS#432
AM21
VSS#433
AM25
VSS#434
AM29
VSS#435
AM34
VSS#436
AN1
VSS#437
AN5
VSS#438
AN7
VSS#439
AN13
VSS#440
AN15
VSS#441
AN17
VSS#442
AN19
VSS#443
AN21
VSS#444
AN23
VSS#445
AN30
VSS#446
AP1
VSS#447
AP2
VSS#448
AP6
VSS#449
AP14
VSS#450
AP16
VSS#451
AP18
VSS#452
AP20
VSS#453
AP22
VSS#454
AP31
VSS#455
AP34
VSS#456
AP35
VSS#457
AR2
VSS#458
AR6
VSS#459
AR10
VSS#460
AR14
VSS#461
AR16
VSS#462
AR18
VSS#463
AR20
VSS#464
AR22
VSS#465
AR25
VSS#466
AR34
VSS#467
Navi14 Rev0.90
+VDDCR_GFX
+VDDCI
symbol15
N11
VDDCR_GFX#1
N13
VDDCR_GFX#2
N15
VDDCR_GFX#3
N17
VDDCR_GFX#4
N19
VDDCR_GFX#5
N21
VDDCR_GFX#6
N23
VDDCR_GFX#7
P12
VDDCR_GFX#8
P14
VDDCR_GFX#9
P16
VDDCR_GFX#10
P18
VDDCR_GFX#11
P20
VDDCR_GFX#12
P22
VDDCR_GFX#13
R11
VDDCR_GFX#14
R13
VDDCR_GFX#15
R15
VDDCR_GFX#16
R17
VDDCR_GFX#17
R19
VDDCR_GFX#18
R21
VDDCR_GFX#19
R23
VDDCR_GFX#20
T12
VDDCR_GFX#21
T14
VDDCR_GFX#22
T16
VDDCR_GFX#23
T18
VDDCR_GFX#24
T20
VDDCR_GFX#25
T22
VDDCR_GFX#26
U11
VDDCR_GFX#27
U13
VDDCR_GFX#28
U15
VDDCR_GFX#29
U17
VDDCR_GFX#30
U19
VDDCR_GFX#31
U21
VDDCR_GFX#32
U23
VDDCR_GFX#33
V12
VDDCR_GFX#34
V14
VDDCR_GFX#35
V16
VDDCR_GFX#36
V18
VDDCR_GFX#37
V20
VDDCR_GFX#38
V22
VDDCR_GFX#39
W11
VDDCR_GFX#40
W13
VDDCR_GFX#41
W15
VDDCR_GFX#42
W17
VDDCR_GFX#43
W19
VDDCR_GFX#44
W21
VDDCR_GFX#45
W23
VDDCR_GFX#46
Y12
VDDCR_GFX#47
Y14
VDDCR_GFX#48
Y16
VDDCR_GFX#49
Y18
VDDCR_GFX#50
Y20
VDDCR_GFX#51
Y22
VDDCR_GFX#52
AA11
VDDCR_GFX#53
AA13
VDDCR_GFX#54
AA15
VDDCR_GFX#55
AA17
VDDCR_GFX#56
AA19
VDDCR_GFX#57
AA21
VDDCR_GFX#58
AA23
VDDCR_GFX#59
AB12
VDDCR_GFX#60
AB14
VDDCR_GFX#61
AB16
VDDCR_GFX#62
AB18
VDDCR_GFX#63
AB20
VDDCR_GFX#64
AB22
VDDCR_GFX#65
AC11
VDDCR_GFX#66
AC13
VDDCR_GFX#67
AC15
VDDCR_GFX#68
AC17
VDDCR_GFX#69
AC19
VDDCR_GFX#70
AC21
VDDCR_GFX#71
AC23
VDDCR_GFX#72
AD12
VDDCR_GFX#73
AD14
VDDCR_GFX#74
AD16
VDDCR_GFX#75
AD18
VDDCR_GFX#76
AD20
VDDCR_GFX#77
AD22
VDDCR_GFX#78
AE11
VDDCR_GFX#79
AE13
VDDCR_GFX#80
AE15
VDDCR_GFX#81
AE17
VDDCR_GFX#82
AE19
VDDCR_GFX#83
AE21
VDDCR_GFX#84
AE23
VDDCR_GFX#85
Navi14 Rev0.90
symbol16
M9
VDDCI_MEM#1
M14
VDDCI_MEM#2
M16
VDDCI_MEM#3
M18
VDDCI_MEM#4
M20
VDDCI_MEM#5
M22
VDDCI_MEM#6
P24
VDDCI_MEM#7
T24
VDDCI_MEM#8
V24
VDDCI_MEM#9
Y24
VDDCI_MEM#10
AB24
VDDCI_MEM#11
Navi14 Rev0.90
+VDDCR_SOC
U1O
AF10
VDDCR_SOC#1
AF12
VDDCR_SOC#2
AF14
VDDCR_SOC#3
AF16
VDDCR_SOC#4
AF18
VDDCR_SOC#5
AF20
VDDCR_SOC#6
AF22
VDDCR_SOC#7
AF24
VDDCR_SOC#8
AG11
VDDCR_SOC#9
AG13
VDDCR_SOC#10
AG15
VDDCR_SOC#11
AG17
VDDCR_SOC#12
AG19
VDDCR_SOC#13
AG21
VDDCR_SOC#14
AG23
VDDCR_SOC#15
12
12
12
12
C1216
C1215
1uF
10uF
6.3V
4V
12
12
12
12
DNI
C1229
C1230
2.2uF
1uF
4V
6.3V
FB_VDDCR_GFX
AH12
FB_VDDCR_GFX
FB_VDDCR_SOC
AJ12
FB_VDDCR_SOC
FB_VSS_A
AH11
FB_VSS_A
VDDIO_MEM#1
VDDIO_MEM#2
VDDIO_MEM#3
VDDIO_MEM#4
VDDIO_MEM#5
VDDIO_MEM#6
VDDIO_MEM#7
VDDIO_MEM#8
VDDIO_MEM#9
VDDIO_MEM#10
VDDIO_MEM#11
VDDIO_MEM#12
VDDIO_MEM#13
VDDIO_MEM#14
VDDIO_MEM#15
VDDIO_MEM#16
FB_VDDIO_MEM
FB_VDDCI_MEM
+MVDD
L7
L11
L13
L15
L17
L19
L21
L23
L25
N25
R25
U25
W25
AA25
AC25
AE25
FB_VDDIO_MEM
N9
FB_VDDCI_MEM
P9
FB_VSS_B
N10
FB_VSS_B
U1T
symbol20
B2
A1_DETECT
AH10
FREE#1
AJ11
FREE#2
AL24
FREE#3
Navi14 Rev0.90
U1P
15,26
OUT
15,26
OUT
15,26
OUT
19
OUT
19
OUT
19
OUT
+3V3_BUS
12
12
DNI
C1201
C1200
1uF
10uF
6.3V
6.3V
12
DNI
C1208
C1209
10uF
10uF
4V
4V
12
C1218
C1217
1uF
1uF
6.3V
6.3V
12
DNI
C1222
C1223
10uF
47uF
4V
4V
12
C1232
C1231
1uF
2.2uF
6.3V
4V
+1V8
12
DNI
DNI
C1210
10uF
4V
12
DNI
DNI
C1219
1uF
6.3V
+0V75
12
DNI
C1224
10uF
4V
12
DNI
DNI
12
C1233
DNI
C1234
1uF
6.3V
1uF
6.3V
U1Q
symbol17
AL12
VDDIO_33
AC10
VDD_18#1
AD9
VDD_18#2
AE10
VDD_18#3
S5 DomainS0 Domain
S5P Domain
AM23
VDD_075#1
AP23
VDD_075#2
AP24
VDD_075#3
AR24
VDD_075#4
Navi14 Rev0.90
VDDCR_075_S5
VDDCR_075_S5P
VDDAN_18_EFUSE
VDDIO_33_S5
VDD_33_S5P
VDDIO_18_S5
VDD_18_S5P
AL11
AL10
AM7
AL9
AN24
AM24
VDDAN_18_EFUSE = 1.8V
UNNAMED_27_CAP_I68_A
AA10
12
C1237
1uF
6.3V
+3V3_BUS
12
DNI
C1204
1uF
6.3V
+1V8
12
C1211
1uF
6.3V
+0V75
12
C1225
1uF
6.3V
DNI
12
R1207
0R
12
12
12
C1348
C1347
C1205
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
12
C1212
C1350
C1351
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
12
C1226
C1354
C1353
1uF
1uF
2.2uF
6.3V
6.3V
4V
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V382
MS-V382
MSI
MSI
MSI
MS-V382
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
NAVI14 - POWER and GND
NAVI14 - POWER and GND
NAVI14 - POWER and GND
Thursday, September 12, 2019
Thursday, September 12, 2019
Thursday, September 12, 2019
10
10
6 27
6 27
6 27
10
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
(7) NAVI14 Decaps
MSI CONFIDENTIAL
00205363 weistang(唐浩健)
RD(C)2019121001 RMA工程課
劉巍 (30001789)
+VDDCR_GFX
+VDDCR_GFX decoupling caps (10uF - 0402)
10uF - 0402 x81
12
12
C1238
C1239
10uF
10uF
4V
4V
12
12
C1248
C1249
1uF
10uF
6.3V
4V
12
12
C1359
C1258
1uF
10uF
6.3V
4V
12
12
C1368
C1369
10uF
10uF
4V
4V
12
12
C1378
C1379
10uF
10uF
4V
4V
12
12
C1388
C1389
1uF
1uF
6.3V
6.3V
12
12
C1399
C1398
1uF
1uF
6.3V
6.3V
12
12
C1408
C1409
1uF
1uF
6.3V
6.3V
12
C1428
1uF
6.3V
+VDDCR_GFX decoupling caps
+VDDCR_GFX
47uF - 0805 x4
12
12
C1328
C1327
47uF
47uF
4V
4V
22uF - 0603 x2
12
12
C1337
C1338
22uF
22uF
4V
4V
12
12
12
12
4V
12
C1250
10uF
4V
12
C1360
1uF
6.3V
12
C1370
10uF
4V
12
C1380
1uF
6.3V
12
C1390
1uF
6.3V
12
C1400
1uF
6.3V
12
C1420
1uF
6.3V
12
12
12
12
C1253
C1254
C1252
C1251
1uF
1uF
10uF
10uF
6.3V
6.3V
4V
4V
12
12
12
12
C1362
C1361
C1363
C1364
10uF
10uF
10uF
10uF
4V
4V
4V
4V
12
C1371
10uF
4V
12
C1381
1uF
6.3V
12
C1391
1uF
6.3V
12
C1401
1uF
6.3V
12
C1421
1uF
6.3V
12
12
12
C1374
C1372
C1373
10uF
10uF
10uF
4V
4V
4V
12
12
12
C1383
C1382
C1384
10uF
1uF
10uF
4V
6.3V
4V
12
12
12
C1393
C1392
C1394
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
12
C1404
C1403
C1402
10uF
10uF
10uF
4V
4V
4V
12
12
12
C1422
C1424
C1423
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
12
C1242
C1244
C1243
C1241
C1240
1uF
10uF
10uF
1uF
10uF
6.3V
4V
4V
6.3V
12
C1246
C1245
C1247
10uF
1uF
10uF
4V
6.3V
4V
12
12
12
C1257
C1255
C1256
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
12
C1366
C1367
C1365
10uF
10uF
10uF
4V
4V
4V
12
12
12
C1377
C1376
C1375
10uF
10uF
10uF
4V
4V
4V
12
12
12
C1386
C1387
C1385
10uF
1uF
10uF
4V
6.3V
4V
12
12
12
C1395
C1397
C1396
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
12
C1405
C1407
C1406
10uF
10uF
1uF
4V
4V
6.3V
12
12
12
C1427
C1426
C1425
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1330
C1329
47uF
47uF
4V
4V
+VDDCR_SOC decoupling caps
+VDDCR_SOC
+VDDCR_SOC
10uF 0402 x5
12
C1410
10uF
4V
22uF 0603 x3
12
C1416
22uF
4V
12
C1411
10uF
4V
12
C1417
22uF
4V
12
12
12
C1414
C1413
C1412
10uF
10uF
10uF
4V
4V
4V
12
C1418
22uF
4V
12
12
12
C1431
C1430
C1415
10uF
10uF
10uF
4V
4V
4V
+MVDD
10uF 0402 x10
12
C1280
10uF
4V
12
C1301
1uF
6.3V
1uF 0201 x8
12
C1278
1uF
4V
+VDDCI_MEM decoupling caps
+VDDCI
12
C1277
1uF
4V
10uF 0402 x11
12
12
C1268
1uF
6.3V
12
12
C1291
10uF
4V
C1269
1uF
6.3V
C1292
1uF
6.3V
12
12
12
C1284
C1281
1uF
1uF
6.3V
6.3V
12
12
C1303
C1302
10uF
1uF
4V
6.3V
12
12
C1279
C1282
1uF
1uF
4V
4V
12
12
C1285
C1286
C1300
10uF
1uF
1uF
4V
6.3V
6.3V
12
C1305
10uF
4V
12
12
C1283
1uF
4V
12
12
C1287
1uF
4V
12
C1289
C1288
C1304
1uF
1uF
1uF
4V
4V
4V
1uF 0201 x1
12
12
C1272
C1270
10uF
10uF
4V
4V
12
C1293
10uF
4V
12
C1273
10uF
4V
12
12
12
C1276
C1275
C1274
10uF
10uF
10uF
4V
4V
4V
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V382
MS-V382
MSI
MSI
MSI
MS-V382
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
NAVI14 - Decaps
NAVI14 - Decaps
NAVI14 - Decaps
Thursday, September 12, 2019FL7
Thursday, September 12, 2019
Thursday, September 12, 2019
10
10
7 27
7 27
7 27
10
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
(8) NAVI14 MEM INTERFACE CH A/B
MSI CONFIDENTIAL
00205363 weistang(唐浩健)
RD(C)2019121001 RMA工程課
劉巍 (30001789)
DQA0_[0..15]
10
BI
CAA0_[0..9]
10
OUT
10
BI
10
BI
10
BI
10
BI
10
BI
10
BI
10
BI
10
BI
10
OUT
10
OUT
10
OUT
10
OUT
R3600 1%
DRAM_RSTA_R
10
OUT
UNNAMED_30_CAP_I3_A UNNAMED_30_CAP_I76_A
R3602 1%
49.9R1 2
118R1 2
R3603 1%
12
C3600
120pF
50V
DQA0_0
10 8
0
DQA0_1
10 8
1
DQA0_2
10 8
2
DQA0_3
10 8
3
DQA0_4
10 8
4
DQA0_5
10 8
5
DQA0_6
10 8
6
DQA0_7
10 8
7
DQA0_8
10 8
8
DQA0_9
10 8
9
DQA0_10
10 8
10
DQA0_11
10 8
11
DQA0_12
10 8
12
DQA0_13
10 8
13
DQA0_14
10 8
14
DQA0_15
10 8
15
CAA0_0
10 8
0
CAA0_1
10 8
1
CAA0_2
10 8
2
CAA0_3
10 8
3
CAA0_4
10 8
4
CAA0_5
10 8
5
CAA0_6
10 8
6
CAA0_7
10 8
7
CAA0_8
10 8
8
CAA0_9
10 8
9
WCKA0_0
WCKA0B_0
WCKA0_1
WCKA0B_1
EDCA0_0
EDCA0_1
DBIA0_0
DBIA0_1
CABIA0
CKEA0
CKA
CKAB
MEM_CALRA MEM_CALRB
DRAM_RSTA DRAM_RSTB
10R1 2
12
R3606
5.1K
1%
U1K
symbol11
AN35
DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
CAA0_0
CAA0_1
CAA0_2
CAA0_3
CAA0_4
CAA0_5
CAA0_6
CAA0_7
CAA0_8
CAA0_9
WCKA0_0
WCKA0B_0
WCKA0_1
WCKA0B_1
EDCA0_0
EDCA0_1
DBIA0_0
DBIA0_1
CABIA0
CKEA0
CKA
CKAB
MEM_CALR_A
DRAM_RSTA
Navi14 Rev0.90
WCKA1B_0
WCKA1B_1
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
WCKA1_0
WCKA1_1
EDCA1_0
EDCA1_1
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
CAA1_0
CAA1_1
CAA1_2
CAA1_3
CAA1_4
CAA1_5
CAA1_6
CAA1_7
CAA1_8
CAA1_9
DBIA1_0
DBIA1_1
CABIA1
CKEA1
AM33
AL34
AK35
AJ34
AG35
AG33
AF32
AD34
AC35
AC33
AB32
AA33
Y32
Y34
W35
AN31
AJ26
AR33
AH26
AP32
AK27
AG25
AK29
AM31
AR31
AE35
AF34
AE33
AD32
AJ32
AB34
AK33
AA35
AM30
AJ27
AL29
AL30
AH25
AK24
DQA1_0
10 8
AL32
DQA1_1
10 8
AK31
DQA1_2
10 8
AJ30
DQA1_3
10 8
AG29
DQA1_4
10 8
AF28
DQA1_5
10 8
AE31
DQA1_6
10 8
AE29
DQA1_7
10 8
AD28
DQA1_8
10 8
AB30
DQA1_9
10 8
AA31
DQA1_10
10 8
AA29
DQA1_11
10 8
Y30
DQA1_12
10 8
W29
DQA1_13
10 8
V30
DQA1_14
10 8
V28
DQA1_15
10 8
U31
CAA1_0
10 8
AM26
CAA1_1
10 8
AD26
CAA1_2
10 8
AJ24
CAA1_3
10 8
AF25
CAA1_4
10 8
AL25
CAA1_5
10 8
AE26
CAA1_6
10 8
AF26
CAA1_7
10 8
AE27
CAA1_8
10 8
AK25
CAA1_9
10 8
AM27
WCKA1_0
AC31
WCKA1B_0
AD30
WCKA1_1
AC29
WCKA1B_1
AB28
EDCA1_0
AG31
EDCA1_1
W31
DBIA1_0
AF30
DBIA1_1
Y28
CABIA1
AL26
CKEA1
AD25
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
DQA1_[0..15]
CAA1_[0..9]
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
10
BI
10
OUT
10
10
10
10
10
10
10
10
10
10
DRAM_RSTB_R
10
OUT
R3604 1%
DQB0_[0..15]
10
BI
CAB0_[0..9]
10
OUT
10
BI
10
BI
10
BI
10
BI
10
BI
10
BI
10
BI
10
BI
10
OUT
10
OUT
10
OUT
10
R3601 1%
49.9R1 2
OUT
118R1 2
R3605 1%
12
C3601
120pF
50V
DQB0_0
10 8
0
DQB0_1
10 8
1
DQB0_2
10 8
2
DQB0_3
10 8
3
DQB0_4
10 8
4
DQB0_5
10 8
5
DQB0_6
10 8
6
DQB0_7
10 8
7
DQB0_8
10 8
8
DQB0_9
10 8
9
DQB0_10
10 8
10
DQB0_11
10 8
11
DQB0_12
10 8
12
DQB0_13
10 8
13
DQB0_14
10 8
14
DQB0_15
10 8
15
CAB0_0
0
10 8
CAB0_1
1
10 8
CAB0_2
8
2
10
CAB0_3
10 8
3
CAB0_4
10 8
4
CAB0_5
10 8
5
CAB0_6
10 8
6
CAB0_7
10 8
7
CAB0_8
10 8
8
CAB0_9
10 8
9
WCKB0_0
WCKB0B_0
WCKB0_1
WCKB0B_1
EDCB0_0
EDCB0_1
DBIB0_0
DBIB0_1
CABIB0
CKEB0
CKB
CKBB
10R1 2
12
R3607
5.1K
1%
U1L
symbol12
W33
DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
CAB0_0
CAB0_1
CAB0_2
CAB0_3
CAB0_4
CAB0_5
CAB0_6
CAB0_7
CAB0_8
CAB0_9
WCKB0_0
WCKB0B_0
WCKB0_1
WCKB0B_1
EDCB0_0
EDCB0_1
DBIB0_0
DBIB0_1
CABIB0
CKEB0
CKB
CKBB
MEM_CALR_B
DRAM_RSTB
Navi14 Rev0.90
DQB1_10
DQB1_11
DQB1_12
DQB1_13
DQB1_14
DQB1_15
WCKB1_0
WCKB1B_0
WCKB1_1
WCKB1B_1
EDCB1_0
EDCB1_1
DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8
DQB1_9
CAB1_0
CAB1_1
CAB1_2
CAB1_3
CAB1_4
CAB1_5
CAB1_6
CAB1_7
CAB1_8
CAB1_9
DBIB1_0
DBIB1_1
CABIB1
CKEB1
V32
V34
U35
T34
R35
R33
P32
M34
L35
L33
K32
J33
G34
F35
C35
Y25
R26
W27
P26
W26
T25
P25
T26
V26
Y26
N35
P34
N33
M32
T32
K34
U33
J35
V25
R27
U26
U27
K26
AD24
DQB1_0
10 8
U29
DQB1_1
10 8
T30
DQB1_2
10 8
T28
DQB1_3
10 8
R31
DQB1_4
10 8
P28
DQB1_5
10 8
N31
DQB1_6
10 8
N29
DQB1_7
10 8
M28
DQB1_8
10 8
K30
DQB1_9
10 8
J31
DQB1_10
10 8
J29
DQB1_11
10 8
G32
DQB1_12
10 8
F31
DQB1_13
10 8
E34
DQB1_14
10 8
E32
DQB1_15
10 8
D33
CAB1_0
10 8
AB25
CAB1_1
10 8
L27
CAB1_2
10 8
AC27
CAB1_3
10 8
N26
CAB1_4
10 8
AC26
CAB1_5
10 8
M25
CAB1_6
10 8
N27
CAB1_7
10 8
M26
CAB1_8
10 8
AB26
CAB1_9
10 8
AA26
WCKB1_0
L31
WCKB1B_0
M30
WCKB1_1
L29
WCKB1B_1
K28
EDCB1_0
R29
EDCB1_1
F33
DBIB1_0
P30
DBIB1_1
G30
CABIB1
AA27
CKEB1
L26
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
DQB1_[0..15]
CAB1_[0..9]
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
10
BI
10
OUT
10
10
10
10
10
10
10
10
10
10
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V382
MS-V382
MSI
MSI
MSI
MS-V382
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
NAVI14 - MEM CH AB
NAVI14 - MEM CH AB
NAVI14 - MEM CH AB
Thursday, September 12, 2019FL7
Thursday, September 12, 2019
Thursday, September 12, 2019
10
10
8 27
8 27
8 27
10
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
(9) NAVI14 MEM INTERFACE CH C/D
MSI CONFIDENTIAL
00205363 weistang(唐浩健)
RD(C)2019121001 RMA工程課
劉巍 (30001789)
DQC0_[0..15]
11
BI
CAC0_[0..9]
11
OUT
11
BI
11
R3609 1%
DRAM_RSTC_R
11
OUT
UNNAMED_29_CAP_I6_A
R3614 1%
49.9R1 2
BI
11
BI
11
BI
11
BI
11
BI
11
BI
11
BI
11
OUT
11
OUT
11
OUT
11
OUT
118R1 2
R3615 1%
12
C3603
120pF
50V
DQC0_0
11 9
0
DQC0_1
11 9
1
DQC0_2
11 9
2
DQC0_3
11 9
3
DQC0_4
11 9
4
DQC0_5
11 9
5
DQC0_6
11 9
6
DQC0_7
11 9
7
DQC0_8
11 9
8
DQC0_9
11 9
9
DQC0_10
11 9
10
DQC0_11
11 9
11
DQC0_12
11 9
12
DQC0_13
11 9
13
DQC0_14
11 9
14
DQC0_15
11 9
15
CAC0_0
11 9
0
CAC0_1
11 9
1
CAC0_2
11 9
2
CAC0_3
11 9
3
CAC0_4
11 9
4
CAC0_5
11 9
5
CAC0_6
11 9
6
CAC0_7
11 9
7
CAC0_8
11 9
8
CAC0_9
11 9
9
WCKC0_0
WCKC0B_0
WCKC0_1
WCKC0B_1
EDCC0_0
EDCC0_1
DBIC0_0
DBIC0_1
CABIC0
CKEC0
CKC
CKCB
MEM_CALRC
DRAM_RSTC
10R1 2
12
R3618
5.1K
1%
U1M
symbol13
A33
DQC0_0
DQC0_1
DQC0_2
DQC0_3
DQC0_4
DQC0_5
DQC0_6
DQC0_7
DQC0_8
DQC0_9
DQC0_10
DQC0_11
DQC0_12
DQC0_13
DQC0_14
DQC0_15
CAC0_0
CAC0_1
CAC0_2
CAC0_3
CAC0_4
CAC0_5
CAC0_6
CAC0_7
CAC0_8
CAC0_9
WCKC0_0
WCKC0B_0
WCKC0_1
WCKC0B_1
EDCC0_0
EDCC0_1
DBIC0_0
DBIC0_1
CABIC0
CKEC0
CKC
CKCB
MEM_CALR_C
DRAM_RSTC
Navi14 Rev0.90
WCKC1_0
WCKC1B_0
WCKC1_1
WCKC1B_1
MVREFD_0
DQC1_10
DQC1_11
DQC1_12
DQC1_13
DQC1_14
DQC1_15
EDCC1_0
EDCC1_1
DQC1_0
DQC1_1
DQC1_2
DQC1_3
DQC1_4
DQC1_5
DQC1_6
DQC1_7
DQC1_8
DQC1_9
CAC1_0
CAC1_1
CAC1_2
CAC1_3
CAC1_4
CAC1_5
CAC1_6
CAC1_7
CAC1_8
CAC1_9
DBIC1_0
DBIC1_1
CABIC1
CKEC1
A30
B29
C27
D26
C25
A25
B24
D22
C21
A21
B20
A19
B18
D18
C17
L16
K21
J17
K22
K17
L20
L22
K20
K18
K16
C23
D24
A23
B22
B26
D20
A27
C19
L18
J21
K19
J19
G29
M12
DQC1_0
11 9
C32
DQC1_1
11 9
D31
DQC1_2
11 9
B31
DQC1_3
11 9
E30
DQC1_4
11 9
D29
DQC1_5
11 9
G27
DQC1_6
11 9
E27
DQC1_7
11 9
F26
DQC1_8
11 9
H24
DQC1_9
11 9
G23
DQC1_10
11 9
E23
DQC1_11
11 9
H22
DQC1_12
11 9
E21
DQC1_13
9
11
H20
DQC1_14
11 9
F20
DQC1_15
11 9
G19
CAC1_0
11 9
L14
CAC1_1
11 9
J25
CAC1_2
11 9
J13
CAC1_3
11 9
K23
CAC1_4
11 9
K13
CAC1_5
11 9
L24
CAC1_6
11 9
J23
CAC1_7
11 9
K24
CAC1_8
11 9
K14
CAC1_9
11 9
K15
WCKC1_0
G25
WCKC1B_0
H26
WCKC1_1
E25
WCKC1B_1
F24
EDCC1_0
C30
EDCC1_1
G21
DBIC1_0
F29
DBIC1_1
F22
CABIC1
J15
CKEC1
K25
MVREFD_0
AN32
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
DQC1_[0..15]
CAC1_[0..9]
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
12
C3605
1uF
6.3V
11
BI
11
OUT
11
11
11
11
11
11
11
11
11
11
+MVDD
12
R3611
40.2R
1%
DRAM_RSTD_R
11
OUT
12
R3619
100R
1%
R3612 1%
DQD0_[0..15]
11
BI
CAD0_[0..9]
11
OUT
11
11
11
11
11
11
11
11
11
11
11
11
R3608 1%
UNNAMED_29_CAP_I72_A
49.9R1 2
118R1 2
R3613 1%
12
C3602
120pF
50V
DQD0_0
11 9
0
DQD0_1
11 9
1
DQD0_2
11 9
2
DQD0_3
11 9
3
DQD0_4
11 9
4
DQD0_5
11 9
5
DQD0_6
11 9
6
DQD0_7
11 9
7
DQD0_8
11 9
8
DQD0_9
11 9
9
DQD0_10
11 9
10
DQD0_11
11 9
11
DQD0_12
11 9
12
DQD0_13
11 9
13
DQD0_14
11 9
14
DQD0_15
11 9
15
CAD0_0
11 9
0
CAD0_1
11 9
1
CAD0_2
11 9
2
CAD0_3
11 9
3
CAD0_4
11 9
4
CAD0_5
11 9
5
CAD0_6
11 9
6
CAD0_7
11 9
7
CAD0_8
11 9
8
CAD0_9
11 9
9
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
OUT
OUT
WCKD0_0
WCKD0B_0
WCKD0_1
WCKD0B_1
EDCD0_0
EDCD0_1
DBID0_0
DBID0_1
CABID0
CKED0
CKD
CKDB
MEM_CALRD
DRAM_RSTD
10R1 2
12
R3616
5.1K
1%
U1N
symbol14
A17
DQD0_0
DQD0_1
DQD0_2
DQD0_3
DQD0_4
DQD0_5
DQD0_6
DQD0_7
DQD0_8
DQD0_9
DQD0_10
DQD0_11
DQD0_12
DQD0_13
DQD0_14
DQD0_15
CAD0_0
CAD0_1
CAD0_2
CAD0_3
CAD0_4
CAD0_5
CAD0_6
CAD0_7
CAD0_8
CAD0_9
WCKD0_0
WCKD0B_0
WCKD0_1
WCKD0B_1
EDCD0_0
EDCD0_1
DBID0_0
DBID0_1
CABID0
CKED0
CKD
CKDB
MEM_CALR_D
DRAM_RSTD
Navi14 Rev0.90
DQD1_10
DQD1_11
DQD1_12
DQD1_13
DQD1_14
DQD1_15
WCKD1_0
WCKD1B_0
WCKD1_1
WCKD1B_1
EDCD1_0
EDCD1_1
MVREFD_1
DQD1_0
DQD1_1
DQD1_2
DQD1_3
DQD1_4
DQD1_5
DQD1_6
DQD1_7
DQD1_8
DQD1_9
CAD1_0
CAD1_1
CAD1_2
CAD1_3
CAD1_4
CAD1_5
CAD1_6
CAD1_7
CAD1_8
CAD1_9
DBID1_0
DBID1_1
CABID1
CKED1
B16
D16
C15
D14
C13
A13
B12
D10
C9
A9
B7
A6
B5
C4
A3
E3
K7
C1
K8
D2
J6
L9
G6
E4
E1
C11
D12
A11
B10
B14
D7
A15
C6
F4
J7
G5
F5
L8
M6
DQD1_0
11 9
E19
DQD1_1
11 9
H18
DQD1_2
11 9
F18
DQD1_3
11 9
G17
DQD1_4
11 9
F16
DQD1_5
11 9
G15
DQD1_6
11 9
E15
DQD1_7
11 9
F14
DQD1_8
11 9
H12
DQD1_9
11 9
G11
DQD1_10
11 9
E11
DQD1_11
11 9
H10
DQD1_12
11 9
G9
DQD1_13
11 9
F7
DQD1_14
11 9
E6
DQD1_15
11 9
D5
CAD1_0
11 9
K4
CAD1_1
11 9
K12
CAD1_2
11 9
M7
CAD1_3
11 9
L10
CAD1_4
11 9
L5
CAD1_5
11 9
K11
CAD1_6
11 9
K10
CAD1_7
11 9
J11
CAD1_8
11 9
L6
CAD1_9
11 9
J4
WCKD1_0
G13
WCKD1B_0
H14
WCKD1_1
E13
WCKD1B_1
F12
EDCD1_0
E17
EDCD1_1
E9
DBID1_0
H16
DBID1_1
F10
CABID1
K5
CKED1
L12
MVREFD_1
D3
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
DQD1_[0..15]
CAD1_[0..9]
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
12
C3604
1uF
6.3V
11
BI
11
OUT
11
11
11
11
11
11
11
11
11
11
+MVDD
12
R3610
40.2R
1%
12
R3617
100R
1%
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V382
MS-V382
MSI
MSI
MSI
MS-V382
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
NAVI14 - MEM CH CD
NAVI14 - MEM CH CD
NAVI14 - MEM CH CD
Thursday, September 12, 2019FL7
Thursday, September 12, 2019
Thursday, September 12, 2019
10
10
9 27
9 27
9 27
10
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
Loading...