Page 1
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
17ci203
8
8
7
7
7
6
6
6
5 4 3
5 4 3
5 4 3
2
2
2
1
1
1
D D
D D
D D
5
IN
5
BI
G_SMBCLK
G_SMBDAT
+3.3V_BUS
+3.3V_BUS
12
12
R103
R104
45.3K
45.3K
1%
1%
DNI
DNI
+3.3V_BUS
2
1 2
1 2
5
61
34
Q100A
2N7002DW
Q100B
2N7002DW
0R 5%R105
0R 5%R106
DNI
DNI
C
C
C
PLACE THESE CAPS AS CLOSE TO
PCIE CONN ECTOR AS POSSIBLE
B B
B B
B B
+12V_BUS
+3.3V_BUS
12
12
12
C110
C111
C112
10uF
0.15uF
0.15uF
16V
16V
16V
12
12
12
C113
10uF
6.3V
12
C114
C115
C116
0.1uF
1uF
0.01uF
6.3V
6.3V
10V
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
1
+3.3V_BUS +12V_BUS +12V_BUS +3.3V_BUS +3.3V_BUS
SMBCLK
SMBDAT
PETP0_GFXRP0
PETN0_GFXRN0
PETP1_GFXRP1
PETN1_GFXRN1
PETP2_GFXRP2
PETN2_GFXRN2
PETP3_GFXRP3
PETN3_GFXRN3
PETP4_GFXRP4
PETN4_GFXRN4
PETP5_GFXRP5
PETN5_GFXRN5
PETP6_GFXRP6
PETN6_GFXRN6
PETP7_GFXRP7
PETN7_GFXRN7
PETP8_GFXRP8
PETN8_GFXRN8
PETP9_GFXRP9
PETN9_GFXRN9
PETP10_GFXRP10
PETN10_GFXRN10
PETP11_GFXRP11
PETN11_GFXRN11
PETP12_GFXRP12
PETN12_GFXRN12
PETP13_GFXRP13
PETN13_GFXRN13
PETP14_GFXRP14
PETN14_GFXRN14
PETP15_GFXRP15
PETN15_GFXRN15
PRESENCE
Mechanical Key
MPCIE1
x16 PCIe
SCHEMATIC
PRSNT1_A1
PERST_
REFCLK+
REFCLK-
RSVD_A19
RSVD_A32
RSVD_A33
RSVD_A50
PERp10
PERn10
PERp11
PERn11
PERp12
PERn12
PERp13
PERn13
PERp14
PERn14
PERp15
PERn15
A1
A2
+12V
A3
+12V
A4
GND
A5
JTAG2
A6
JTAG3
A7
JTAG4
A8
JTAG5
A9
+3.3V
A10
+3.3V
A11
A12
GND
A13
A14
A15
GND
A16
PERp0
A17
PERn0
A18
GND
A19
A20
GND
A21
PERp1
A22
PERn1
A23
GND
A24
GND
A25
PERp2
A26
PERn2
A27
GND
A28
GND
A29
PERp3
A30
PERn3
A31
GND
A32
A33
A34
GND
A35
PERp4
A36
PERn4
A37
GND
A38
GND
A39
PERp5
A40
PERn5
A41
GND
A42
GND
A43
PERp6
A44
PERn6
A45
GND
A46
GND
A47
PERp7
A48
PERn7
A49
GND
A50
A51
GND
A52
PERp8
A53
PERn8
A54
GND
A55
GND
A56
PERp9
A57
PERn9
A58
GND
A59
GND
A60
A61
A62
GND
A63
GND
A64
A65
A66
GND
A67
GND
A68
A69
A70
GND
A71
GND
A72
A73
A74
GND
A75
GND
A76
A77
A78
GND
A79
GND
A80
A81
A82
GND
B1
+12V
B2
+12V
B3
+12V
B4
GND
B5
SMCLK
B6
SMDAT
B7
GND
B8
+3.3V
B9
JTAG1
B10
3.3Vaux
B11
WAKE_
B12
RSVD_B12
B13
GND
B14
PETp0
B15
PETn0
B16
GND
B17
PRSNT2_B17
B18
GND
B19
PETp1
B20
PETn1
B21
GND
B22
GND
B23
PETp2
B24
PETn2
B25
GND
B26
GND
B27
PETp3
B28
PETn3
B29
GND
B30
RSVD_B30
B31
PRSNT2_B31
B32
GND
B33
PETp4
B34
PETn4
B35
GND
B36
GND
B37
PETp5
B38
PETn5
B39
GND
B40
GND
B41
PETp6
B42
PETn6
B43
GND
B44
GND
B45
PETp7
B46
PETn7
B47
GND
B48
PRSNT2_B48
B49
GND
B50
PETp8
B51
PETn8
B52
GND
B53
GND
B54
PETp9
B55
PETn9
B56
GND
B57
GND
B58
PETp10
B59
PETn10
B60
GND
B61
GND
B62
PETp11
B63
PETn11
B64
GND
B65
GND
B66
PETp12
B67
PETn12
B68
GND
B69
GND
B70
PETp13
B71
PETn13
B72
GND
B73
GND
B74
PETp14
B75
PETn14
B76
GND
B77
GND
B78
PETp15
B79
PETn15
B80
GND
B81
PRSNT2_B81
B82
RSVD_B82
PRESENCE
JTDIO_LOOP
PCIE_REFCLKP
PCIE_REFCLKN
PERP0
PERN0
PERP1
PERN1
PERP2
PERN2
PERP3
PERN3
PERP4
PERN4
PERP5
PERN5
PERP6
PERN6
PERP7
PERN7
PERP8
PERN8
PERP9
PERN9
PERP10
PERN10
PERP11
PERN11
PERP12
PERN12
PERP13
PERN13
PERP14
PERN14
PERP15
PERN15
1
1.8V_EN
16,15
IN
PERSTB
2
OUT
2
OUT
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
1 2
12
C100
0.1uF
6.3V
12
C101
0.1uF
6.3V
RST_EN
0R 5%R102
U100
3
A
1
B
6
C
74AUP1G57GM
1 2
PLACE R100 I N U100
5
VCC
4
PERSTB_BUF
Y
2
GND
1K 5%R100
DNI
2,11,17
OUT
SYMBOL LEGEND
DNI
DO NOT
INSTALL
b or #
ACTIVE
LOW
BUO
BRING UP
ONLY
DIGITAL
GROUND
ANALOG
GROUND
C
C
C
A
A
A
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
1.0
1.0
1.0
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
A
A
A
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
PCI-E EDGE CONNECTOR
PCI-E EDGE CONNECTOR
PCI-E EDGE CONNECTOR
SHEET:
SHEET:
SHEET:
Mon Mar 30 03:01:31 2015
Mon Mar 30 03:01:31 2015
Mon Mar 30 03:01:31 2015
DATE:
DATE:
DATE:
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTE
NOTE
NOTE
NOTES:
NOTES:
NOTES:
8
8
8
7
7
7
6
6
6
5
5
5
1 20
1 20
1 20
OF
OF
OF
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
REV:
REV:
REV:
Page 2
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
17ci203
8
8
7
7
7
6
6
6
5 4 3
5 4 3
5 4 3
2
2
2
1
1
1
D D
D D
D D
U1B
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
C
C
C
B B
B B
B B
A
A
A
8
8
8
7
7
7
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
1
IN
TP100
TP101
TP130
TP131
6
6
6
+1.8V
12
12
C120
10uF
6.3V
+0.95V
12
12
C130
1uF
6.3V
12
12
C134
1uF
6.3V
PETP0_GFXRP0
PETN0_GFXRN0
PETP1_GFXRP1
PETN1_GFXRN1
PETP2_GFXRP2
PETN2_GFXRN2
PETP3_GFXRP3
PETN3_GFXRN3
PETP4_GFXRP4
PETN4_GFXRN4
PETP5_GFXRP5
PETN5_GFXRN5
PETP6_GFXRP6
PETN6_GFXRN6
PETP7_GFXRP7
PETN7_GFXRN7
PETP8_GFXRP8
PETN8_GFXRN8
PETP9_GFXRP9
PETN9_GFXRN9
PETP10_GFXRP10
PETN10_GFXRN10
PETP11_GFXRP11
PETN11_GFXRN11
PETP12_GFXRP12
PETN12_GFXRN12
PETP13_GFXRP13
PETN13_GFXRN13
PETP14_GFXRP14
PETN14_GFXRN14
PETP15_GFXRP15
PETN15_GFXRN15
PCIE_REFCLKP
PCIE_REFCLKN
12
12
C121
C122
C123
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C131
C132
C133
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C135
1uF
6.3V
12
C136
C137
C138
1uF
1uF
10uF
6.3V
6.3V
6.3V
5
5
5
AH52
AH50
AG53
AG51
AF52
AF50
AE53
AE51
AD52
AD50
AC53
AC51
AA53
AA51
AJ51
AJ53
AU48
AR48
AA42
AA43
AC42
AC43
AG43
AE42
AE43
AE44
AG42
AA44
Y52
Y50
W53
W51
V52
V50
U53
U51
R53
R51
P52
P50
N53
N51
M52
M50
L53
L51
U43
U44
U42
W43
W42
R42
N42
N43
L43
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
PCIE_REFCLKP
PCIE_REFCLKN
PCIE_PVDD_1
PCIE_PVDD_2
BIF_VDDC
BIF_VDDC
BIF_VDDC
BIF_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
VSS
VSS
NC_VSS
PART 2 OF 16
BONAIRE
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIEXPRESS
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PCIE_CALR_RX
PCIE_CALR_TX
PERSTB
PX_EN
NC_PX_EN_1
PCIE_TX0N
AL47
PCIE_TX1P
AL45
PCIE_TX1N
AL44
PCIE_TX2P
AJ48
PCIE_TX2N
AJ47
PCIE_TX3P
AG48
PCIE_TX3N
AG47
PCIE_TX4P
AG45
PCIE_TX4N
AG44
PCIE_TX5P
AE48
PCIE_TX5N
AE47
PCIE_TX6P
AC48
PCIE_TX6N
AC47
PCIE_TX7P
AC45
PCIE_TX7N
AC44
PCIE_TX8P
AA48
PCIE_TX8N
AA47
PCIE_TX9P
W48
PCIE_TX9N
W47
PCIE_TX10P
W45
PCIE_TX10N
W44
PCIE_TX11P
U48
PCIE_TX11N
U47
PCIE_TX12P
R48
PCIE_TX12N
R47
PCIE_TX13P
R45
PCIE_TX13N
R44
PCIE_TX14P
N48
PCIE_TX14N
N47
PCIE_TX15P
L48
PCIE_TX15N
L47
PCIE_CALR_RX
AN47
PCIE_CALR_TX
AN48
AK50
PERSTB_BUF
J48
PX_EN
J45
PCIE_TX0P
AL48
1 2
C150 6.3V0.22uF
1 2
C151 6.3V0.22uF
1 2
C152 6.3V0.22uF
1 2
C153 6.3V0.22uF
1 2
C154 6.3V0.22uF
1 2
C155 6.3V0.22uF
1 2
C156 6.3V0.22uF
1 2
C157 6.3V0.22uF
1 2
C158 6.3V0.22uF
1 2
C159 6.3V0.22uF
1 2
C160 6.3V0.22uF
1 2
C161 6.3V0.22uF
1 2
C162 6.3V0.22uF
1 2
C163 6.3V0.22uF
1 2
C164 6.3V0.22uF
1 2
C165 6.3V0.22uF
1 2
C166 6.3V0.22uF
1 2
C167 6.3V0.22uF
1 2
C168 6.3V0.22uF
1 2
C169 6.3V0.22uF
1 2
C170 6.3V0.22uF
1 2
C171 6.3V0.22uF
1 2
C172 6.3V0.22uF
1 2
C173 6.3V0.22uF
1 2
C174 6.3V0.22uF
1 2
C175 6.3V0.22uF
1 2
C176 6.3V0.22uF
1 2
C177 6.3V0.22uF
1 2
C178 6.3V0.22uF
1 2
C179 6.3V0.22uF
1 2
C180 6.3V0.22uF
1 2
C181 6.3V0.22uF
1 2
R150 1%1K
1 2
R151 1%1.69K
12
R152
1K
5%
DNI
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
TOBAGO PCIE INTERFACE
TOBAGO PCIE INTERFACE
TOBAGO PCIE INTERFACE
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:02 2015
Mon Mar 30 02:42:02 2015
Mon Mar 30 02:42:02 2015
DATE:
DATE:
DATE:
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTE
NOTE
NOTE
NOTES:
NOTES:
NOTES:
+0.95V
1,11,17
IN
16,17
OUT
2 20
2 20
2 20
OF
OF
OF
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
PERP0
PERN0
PERP1
PERN1
PERP2
PERN2
PERP3
PERN3
PERP4
PERN4
PERP5
PERN5
PERP6
PERN6
PERP7
PERN7
PERP8
PERN8
PERP9
PERN9
PERP10
PERN10
PERP11
PERN11
PERP12
PERN12
PERP13
PERN13
PERP14
PERN14
PERP15
PERN15
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
1
OUT
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
1.0
1.0
1.0
REV:
REV:
REV:
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
C
C
C
A
A
A
Page 3
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
17ci203
U1C
PART 3 OF 16
DQA0_<0>
4,3
BI
DQA0_<1>
4,3
BI
DQA0_<2>
4,3
BI
DQA0_<3>
4,3
BI
DQA0_<4>
4,3
BI
DQA0_<5>
4,3
BI
DQA0_<6>
4,3
BI
DQA0_<7>
4,3
BI
DQA0_<8>
4,3
BI
DQA0_<9>
4,3
BI
DQA0_<10>
4,3
BI
DQA0_<11>
4,3
BI
DQA0_<12>
4,3
BI
DQA0_<13>
4,3
BI
DQA0_<14>
4,3
BI
DQA0_<15>
4,3
BI
DQA0_<16>
4,3
BI
DQA0_<17>
4,3
BI
DQA0_<18>
4,3
BI
DQA0_<19>
4,3
BI
DQA0_<20>
4,3
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DQA0_<21>
4,3
BI
DQA0_<22>
4,3
BI
DQA0_<23>
4,3
BI
DQA0_<24>
4,3
BI
DQA0_<25>
4,3
BI
DQA0_<26>
4,3
BI
DQA0_<27>
4,3
BI
DQA0_<28>
4,3
BI
DQA0_<29>
4,3
BI
DQA0_<30>
4,3
BI
DQA0_<31>
4,3
BI
MAA0_<0>
4,3
BI
MAA0_<1>
4,3
BI
MAA0_<2>
4,3
BI
MAA0_<3>
4,3
BI
MAA0_<4>
4,3
BI
MAA0_<5>
4,3
BI
MAA0_<6>
4,3
BI
MAA0_<7>
4,3
BI
MAA0_<8>
4,3
BI
WCKA0_0
4
BI
WCKA0B_0
4
BI
WCKA0_1
4
BI
WCKA0B_1
4
BI
EDCA0_0
4
BI
EDCA0_1
4
BI
EDCA0_2
4
BI
EDCA0_3
4
BI
DDBIA0_0
4
BI
DDBIA0_1
4
BI
DDBIA0_2
4
BI
DDBIA0_3
4
BI
ADBIA0
4
BI
CSA0B_0
4
OUT
G51
DQA0_0
F52
DQA0_1
F50
DQA0_2
E53
DQA0_3
D50
DQA0_4
C49
DQA0_5
A49
DQA0_6
D48
DQA0_7
B48
DQA0_8
C47
DQA0_9
D46
DQA0_10
B46
DQA0_11
D44
DQA0_12
B44
DQA0_13
C43
DQA0_14
D42
DQA0_15
A41
DQA0_16
D40
DQA0_17
B40
DQA0_18
C39
DQA0_19
C37
DQA0_20
A37
DQA0_21
D36
DQA0_22
B36
DQA0_23
C35
DQA0_24
D34
DQA0_25
B34
DQA0_26
C33
DQA0_27
D32
DQA0_28
B32
DQA0_29
C31
DQA0_30
D30
DQA0_31
L33
MAA0_0
G33
MAA0_1
F37
MAA0_2
G37
MAA0_3
F39
MAA0_4
K39
MAA0_5
F29
MAA0_6
G29
MAA0_7
MEMORY INTERFACE BANK A
F33
MAA0_8
L37
MAA0_9
J53
WCKA0_0
H52
WCKA0B_0
B42
WCKA0_1
C41
WCKA0B_1
E51
EDCA0_0
C45
EDCA0_1
B38
EDCA0_2
A33
EDCA0_3
H50
DDBIA0_0
A45
DDBIA0_1
D38
DDBIA0_2
B30
DDBIA0_3
L29
ADBIA0
K35
CSA0B_0
K31
CSA0B_1
A29
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31
MAA1_0
MAA1_1
MAA1_2
MAA1_3
MAA1_4
MAA1_5
MAA1_6
MAA1_7
MAA1_8
MAA1_9
WCKA1_0
WCKA1B_0
WCKA1_1
WCKA1B_1
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3
DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3
ADBIA1
CSA1B_0
CSA1B_1
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
DQA1_<1>
B28
DQA1_<2>
C27
DQA1_<3>
B26
DQA1_<4>
C25
DQA1_<5>
A25
DQA1_<6>
D24
DQA1_<7>
B24
DQA1_<8>
C23
DQA1_<9>
D22
DQA1_<10>
B22
DQA1_<11>
D20
DQA1_<12>
B20
DQA1_<13>
C19
DQA1_<14>
D18
DQA1_<15>
A17
DQA1_<16>
D16
DQA1_<17>
B16
DQA1_<18>
C15
DQA1_<19>
C13
DQA1_<20>
A13
DQA1_<21>
D12
DQA1_<22>
B12
DQA1_<23>
C11
DQA1_<24>
D10
DQA1_<25>
B10
DQA1_<26>
C9
DQA1_<27>
D8
DQA1_<28>
B8
DQA1_<29>
C7
DQA1_<30>
B6
DQA1_<31>
K19
MAA1_<0>
F17
MAA1_<1>
G13
MAA1_<2>
F15
MAA1_<3>
F13
MAA1_<4>
F11
MAA1_<5>
F23
MAA1_<6>
L21
MAA1_<7>
F19
MAA1_<8>
G17
C17
WCKA1_0
B18
WCKA1B_0
A5
WCKA1_1
C5
WCKA1B_1
D26
EDCA1_0
C21
EDCA1_1
B14
EDCA1_2
A9
EDCA1_3
C29
DDBIA1_0
A21
DDBIA1_1
D14
DDBIA1_2
D6
DDBIA1_3
G21
ADBIA1
K15
CSA1B_0
F21
DQA1_<0>
D28
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
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4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
OUT
DQB0_<0>
4,3
BI
DQB0_<1>
4,3
BI
DQB0_<2>
4,3
BI
DQB0_<3>
4,3
BI
DQB0_<4>
4,3
BI
DQB0_<5>
4,3
BI
DQB0_<6>
4,3
BI
DQB0_<7>
4,3
BI
DQB0_<8>
4,3
BI
DQB0_<9>
4,3
BI
DQB0_<10>
4,3
BI
DQB0_<11>
4,3
BI
DQB0_<12>
4,3
BI
DQB0_<13>
4,3
BI
DQB0_<14>
4,3
BI
DQB0_<15>
4,3
BI
DQB0_<16>
4,3
BI
DQB0_<17>
4,3
BI
DQB0_<18>
4,3
BI
DQB0_<19>
4,3
BI
DQB0_<20>
4,3
BI
DQB0_<21>
4,3
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DQB0_<22>
4,3
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DQB0_<23>
4,3
BI
DQB0_<24>
4,3
BI
DQB0_<25>
4,3
BI
DQB0_<26>
4,3
BI
DQB0_<27>
4,3
BI
DQB0_<28>
4,3
BI
DQB0_<29>
4,3
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DQB0_<30>
4,3
BI
DQB0_<31>
4,3
BI
MAB0_<0>
4,3
BI
MAB0_<1>
4,3
BI
MAB0_<2>
4,3
BI
MAB0_<3>
4,3
BI
MAB0_<4>
4,3
BI
MAB0_<5>
4,3
BI
MAB0_<6>
4,3
BI
MAB0_<7>
4,3
BI
MAB0_<8>
4,3
BI
WCKB0_0
4
BI
WCKB0B_0
4
BI
WCKB0_1
4
BI
WCKB0B_1
4
BI
EDCB0_0
4
BI
EDCB0_1
4
BI
EDCB0_2
4
BI
EDCB0_3
4
BI
DDBIB0_0
4
BI
DDBIB0_1
4
BI
DDBIB0_2
4
BI
DDBIB0_3
4
BI
ADBIB0
4
BI
CSB0B_0
4
OUT
U1D
PART 4 OF 16
AJ1
DQB0_0
AH4
DQB0_1
AH2
DQB0_2
AG3
DQB0_3
AF2
DQB0_4
AE3
DQB0_5
AE1
DQB0_6
AD4
DQB0_7
AD2
DQB0_8
AC3
DQB0_9
AB4
DQB0_10
AB2
DQB0_11
Y4
DQB0_12
Y2
DQB0_13
W3
DQB0_14
V4
DQB0_15
U1
DQB0_16
T4
DQB0_17
T2
DQB0_18
R3
DQB0_19
N3
DQB0_20
N1
DQB0_21
M4
DQB0_22
M2
DQB0_23
L3
DQB0_24
K4
DQB0_25
K2
DQB0_26
J3
DQB0_27
H4
DQB0_28
H2
DQB0_29
G3
DQB0_30
F2
DQB0_31
W10
MAB0_0
U6
MAB0_1
N7
MAB0_2
R6
MAB0_3
N6
MAB0_4
L6
MAB0_5
AC6
MAB0_6
AA11
MEMORY INTERFACE BANK B
MAB0_7
W6
MAB0_8
U7
MAB0_9
U3
WCKB0_0
V2
WCKB0B_0
E1
WCKB0_1
E3
WCKB0B_1
AF4
EDCB0_0
AA3
EDCB0_1
P2
EDCB0_2
J1
EDCB0_3
AJ3
DDBIB0_0
AA1
DDBIB0_1
P4
DDBIB0_2
F4
DDBIB0_3
AA7
ADBIB0
R10
CSB0B_0
AA6
CSB0B_1
DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8
DQB1_9
DQB1_10
DQB1_11
DQB1_12
DQB1_13
DQB1_14
DQB1_15
DQB1_16
DQB1_17
DQB1_18
DQB1_19
DQB1_20
DQB1_21
DQB1_22
DQB1_23
DQB1_24
DQB1_25
DQB1_26
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_31
MAB1_0
MAB1_1
MAB1_2
MAB1_3
MAB1_4
MAB1_5
MAB1_6
MAB1_7
MAB1_8
MAB1_9
WCKB1_0
WCKB1B_0
WCKB1_1
WCKB1B_1
EDCB1_0
EDCB1_1
EDCB1_2
EDCB1_3
DDBIB1_0
DDBIB1_1
DDBIB1_2
DDBIB1_3
ADBIB1
CSB1B_0
CSB1B_1
AK4
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
4 3
DQB1_<1>
AM2
DQB1_<2>
AM4
DQB1_<3>
AN3
DQB1_<4>
AP2
DQB1_<5>
AP4
DQB1_<6>
AR3
DQB1_<7>
AT2
DQB1_<8>
AT4
DQB1_<9>
AU1
DQB1_<10>
AU3
DQB1_<11>
AW3
DQB1_<12>
AY2
DQB1_<13>
AY4
DQB1_<14>
BA1
DQB1_<15>
BB4
DQB1_<16>
BC3
DQB1_<17>
BD2
DQB1_<18>
BD4
DQB1_<19>
BF2
DQB1_<20>
BF4
DQB1_<21>
BG3
DQB1_<22>
BH2
DQB1_<23>
BH4
DQB1_<24>
BJ1
DQB1_<25>
BJ3
DQB1_<26>
BK4
DQB1_<27>
BN5
DQB1_<28>
BK6
DQB1_<29>
BM6
DQB1_<30>
BL7
DQB1_<31>
AN11
MAB1_<0>
AN6
MAB1_<1>
AU7
MAB1_<2>
AR10
MAB1_<3>
AW6
MAB1_<4>
AW10
MAB1_<5>
AJ6
MAB1_<6>
AJ7
MAB1_<7>
AN7
MAB1_<8>
AU11
BB2
WCKB1_0
BA3
WCKB1B_0
BN9
WCKB1_1
BM8
WCKB1B_1
AN1
EDCB1_0
AV2
EDCB1_1
BE3
EDCB1_2
BL5
EDCB1_3
AK2
DDBIB1_0
AV4
DDBIB1_1
BE1
DDBIB1_2
BK8
DDBIB1_3
AJ11
ADBIB1
AU6
CSB1B_0
AL10
DQB1_<0>
AL3
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4,3
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
BI
4
OUT
CASA0B
4
OUT
RASA0B
4
OUT
WEA0B
4
OUT
CKEA0
4
OUT
CLKA0
4
OUT
CLKA0B
4
OUT
1 2
R3600 120R 1%
DRAM_RST_A
4
OUT
1 2
R3605 49.9R 1%
12
1 2
R3604 1%10R
C3601
120pF
50V
MEM_CALRA MEM_CALRBMVREFDA MVREFDB
DNI
DRAM_RST_A_R DRAM_RST_B_R
12
R3603
5.1K
1%
K27
CASA0B
F35
RASA0B
M41
WEA0B
G25
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F41
CLKA0
G41
CLKA0B
F31
MEM_CALRA
L25
DRAM_RSTA
BONAIRE
K23
CASA1B
CASA1B
L17
RASA1B
RASA1B
G11
WEA1B
WEA1B
F25
CKEA1
CKEA1
F9
CLKA1
CLKA1
G9
CLKA1B
CLKA1B
F27
MVREFDA
USE INTERNAL VREF USE INTERNAL VREF
4
OUT
4
OUT
4
OUT
OUT
OUT
OUT
+MVDD +MVDD
4
12
4
4
R3601
40.2R
1%
DNI
12
12
R3602
C3600
100R
1uF
1%
6.3V
DNI
DNI
DRAM_RST_B
4
OUT
1 2
R3615 49.9R 1%
1 2
R3610 120R 1%
1 2
R3614 10R 1%
12
C3611
120pF
50V
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHEET:
SHEET:
SHEET:
DATE:
DATE:
DATE:
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
4
OUT
4
OUT
4
OUT
4
OUT
4
OUT
4
OUT
DNI
TOBAGO MEMORY
TOBAGO MEMORY
TOBAGO MEMORY
NOTE
NOTE
NOTE
CASB0B
RASB0B
WEB0B
CKEB0
CLKB0
CLKB0B
12
R3613
5.1K
1%
Mon Mar 30 02:42:02 2015
Mon Mar 30 02:42:02 2015
Mon Mar 30 02:42:02 2015
AC10
U11
L7
AE6
J6
J7
AL6
AE11
3 20
3 20
3 20
OF
OF
OF
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
CASB0B
RASB0B
WEB0B
CKEB0
CLKB0
CLKB0B
MEM_CALRB
DRAM_RSTB
BONAIRE
AG10
CASB1B
CASB1B
AR6
RASB1B
RASB1B
BA12
WEB1B
WEB1B
AE7
CKEB1
CKEB1
BA6
CLKB1
CLKB1
BA7
CLKB1B
CLKB1B
AG6
MVREFDB
MVREFD = 0.7 * VDDR1MVREFD = 0.7 * VDDR1
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
1.0
1.0
1.0
REV:
REV:
REV:
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
4
OUT
4
OUT
4
OUT
4
OUT
OUT
OUT
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
4
4
12
C3610
1uF
6.3V
DNI
12
R3611
40.2R
1%
DNI
12
R3612
100R
1%
DNI
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
Page 4
MF = 0
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
+MVDD
+MVDD
+MVDD
+MVDD
1 2
R2003 60.4R 1%
1 2
R2004 60.4R 1%
1 2
R2000 1%120R
1 2
R2010 1%2.37K
1 2
R2011 1%5.49K
1 2
C2000 6.3V1uF
1 2
R2012 1%2.37K
1 2
R2013 1%5.49K
1 2
C2001 6.3V1uF
1 2
R2014 1%2.37K
1 2
R2015 1%5.49K
1 2
C2002 6.3V1uF
VDDQ_B1
VDDQ_B3
VDDQ_B12
VDDQ_B14
VDDQ_D1
VDDQ_D3
VDDQ_D12
VDDQ_D14
VDDQ_E5
VDDQ_E10
VDDQ_F1
VDDQ_F3
VDDQ_F12
VDDQ_F14
VDDQ_G2
VDDQ_G13
VDDQ_H3
VDDQ_H12
VDDQ_K3
VDDQ_K12
VDDQ_L2
VDDQ_L13
VDDQ_M1
VDDQ_M3
VDDQ_M12
VDDQ_M14
VDDQ_N5
VDDQ_N10
VDDQ_P1
VDDQ_P3
VDDQ_P12
VDDQ_P14
VDDQ_T1
VDDQ_T3
VDDQ_T12
VDDQ_T14
VDD_C5
VDD_C10
VDD_D11
VDD_G1
VDD_G4
VDD_G11
VDD_G14
VDD_L1
VDD_L4
VDD_L11
VDD_L14
VDD_P11
VDD_R5
VDD_R10
VSSQ_A1
VSSQ_A3
VSSQ_A12
VSSQ_A14
VSSQ_C1
VSSQ_C3
VSSQ_C4
VSSQ_C11
VSSQ_C12
VSSQ_C14
VSSQ_E1
VSSQ_E3
VSSQ_E12
VSSQ_E14
VSSQ_F5
VSSQ_F10
VSSQ_H2
VSSQ_H13
VSSQ_K2
VSSQ_K13
VSSQ_M5
VSSQ_M10
VSSQ_N1
VSSQ_N3
VSSQ_N12
VSSQ_N14
VSSQ_R1
VSSQ_R3
VSSQ_R4
VSSQ_R11
VSSQ_R12
VSSQ_R14
VSSQ_V1
VSSQ_V3
VSSQ_V12
VSSQ_V14
VSS_B5
VSS_B10
VSS_D10
VSS_G5
VSS_G10
VSS_H1
VSS_H14
VSS_K1
VSS_K14
VSS_L5
VSS_L10
VSS_P10
VSS_T5
VSS_T10
+MVDD
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
+MVDD
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
+MVDD
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
V1
V3
V12
V14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
+MVDD
+MVDD
+MVDD
+MVDD
1 2
R2203 1%60.4R
1 2
R2204 1%60.4R
R2200 1%120R
R2210 1%2.37K
R2211 1%5.49K
C2200 6.3V1uF
R2212 1%2.37K
R2213 1%5.49K
C2201 6.3V1uF
R2214 1%2.37K
R2215 1%5.49K
C2202 6.3V1uF
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DQA1 _<1 6>
3,4
BI
DQA1 _<1 7>
3,4
BI
DQA1 _<1 9>
3,4
BI
DQA1 _<1 8>
3,4
BI
DQA1 _<2 3>
3,4
BI
DQA1 _<2 1>
3,4
BI
DQA1 _<2 2>
3,4
BI
DQA1 _<2 0>
3,4
BI
DQA1 _<2 4>
3,4
BI
DQA1 _<2 5>
3,4
BI
DQA1 _<2 6>
3,4
BI
DQA1 _<2 7>
3,4
BI
DQA1 _<3 0>
3,4
BI
DQA1 _<3 1>
3,4
BI
DQA1 _<2 8>
3,4
BI
DQA1 _<2 9>
3,4
BI
DQA1 _<1 3>
3,4
BI
DQA1 _<1 4>
3,4
BI
DQA1 _<1 5>
3,4
BI
DQA1 _<1 2>
3,4
BI
DQA1 _<1 0>
3,4
BI
DQA1 _<9 >
3,4
BI
DQA1 _<1 1>
3,4
BI
DQA1 _<8 >
3,4
BI
DQA1 _<7 >
3,4
BI
DQA1 _<6 >
3,4
BI
DQA1 _<4 >
3,4
BI
DQA1 _<5 >
3,4
BI
DQA1 _<0 >
3,4
BI
DQA1 _<2 >
3,4
BI
DQA1 _<1 >
3,4
BI
DQA1 _<3 >
3,4
BI
MAA1_<8>
3
BI
MAA1_<0>
3
BI
MAA1_<1>
3
BI
MAA1_<3>
3
BI
MAA1_<2>
3
BI
MAA1_<5>
3
BI
MAA1_<4>
3
BI
MAA1_<6>
3
BI
MAA1_<7>
3
BI
WCKA1_0
3
IN
WCKA1B_0
3
IN
WCKA1_1
3
IN
WCKA1B_1
3
IN
EDCA1_2
3
OUT
EDCA1_3
3
OUT
EDCA1_1
3
OUT
EDCA1_0
3
OUT
3
3
3
3
DDBIA1_2
BI
DDBIA1_3
BI
DDBIA1_1
BI
DDBIA1_0
BI
CASA1B
3
IN
RASA1B
3
IN
CKEA1
3
IN
CLKA1B
3
IN
CLKA1
3
IN
WEA1B
3
IN
CSA1B_0
3
IN
DRAM_RST_A
3,4
IN
ADBIA1
3
IN
M2
M4
N2
N4
T2
T4
V2
V4
M13
M11
N13
N11
T13
T11
V13
V11
F13
F11
E13
E11
B13
B11
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A11
F2
F4
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E4
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B4
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A4
J5
K4
K5
K10
K11
H10
H11
H5
H4
D4
D5
P4
P5
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C2
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D13
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J12
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V10
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J4
DQ31__DQ7
DQ30__DQ6
DQ29__DQ5
DQ28__DQ4
DQ27__DQ3
DQ26__DQ2
DQ25__DQ1
DQ24__DQ0
DQ23__DQ15
DQ22__DQ14
DQ21__DQ13
DQ20__DQ12
DQ19__DQ11
DQ18__DQ10
DQ17__DQ9
DQ16__DQ8
DQ15__DQ23
DQ14__DQ22
DQ13__DQ21
DQ12__DQ20
DQ11__DQ19
DQ10__DQ18
DQ9__DQ17
DQ8__DQ16
DQ7__DQ31
DQ6__DQ30
DQ5__DQ29
DQ4__DQ28
DQ3__DQ27
DQ2__DQ26
DQ1__DQ25
DQ0__DQ24
RFU_A12_NC
A7_A8__A0_A10
A6_A11__A1_A9
A5_BA1__A3_BA3
A4_BA2__A2_BA0
A3_BA3__A5_BA1
A2_BA0__A4_BA2
A1_A9__A6_A11
A0_A10__A7_A8
WCK01__WCK23
WCK01#__WCK23#
WCK23__WCK01
WCK23#__WCK01#
EDC3__EDC0
EDC2__EDC1
EDC1__EDC2
EDC0__EDC3
DBI3#__DBI0#
DBI2#__DBI1#
DBI1#__DBI2#
DBI0#__DBI3#
RAS#__CAS#
CAS#__RAS#
CKE#
CK#
CK
CS#__WE#
WE#__CS#
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SEN
RESET#
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Vpp_NC1
VREFD1
VREFD2
VREFC
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U2200
U2000
DQA0_<16>
3,4
BI
DQA0_<17>
3,4
BI
DQA0_<19>
3,4
BI
DQA0_<18>
3,4
BI
DQA0_<23>
3,4
BI
DQA0_<21>
3,4
BI
DQA0_<22>
3,4
BI
DQA0_<20>
3,4
BI
DQA0_<25>
3,4
BI
DQA0_<26>
3,4
BI
DQA0_<27>
3,4
BI
DQA0_<24>
3,4
BI
DQA0_<29>
3,4
BI
DQA0_<30>
3,4
BI
DQA0_<28>
3,4
BI
DQA0_<31>
3,4
BI
DQA0_<14>
3,4
BI
DQA0_<15>
3,4
BI
DQA0_<13>
3,4
BI
DQA0_<12>
3,4
BI
DQA0_<9>
3,4
BI
DQA0_<11>
3,4
BI
DQA0_<10>
3,4
BI
DQA0_<8>
3,4
BI
DQA0_<7>
3,4
BI
DQA0_<6>
3,4
BI
DQA0_<4>
3,4
BI
DQA0_<5>
3,4
BI
DQA0_<0>
3,4
BI
DQA0_<2>
3,4
BI
DQA0_<1>
3,4
BI
DQA0_<3>
3,4
BI
MAA0_<8>
3
BI
MAA0_<7>
3
BI
MAA0_<6>
3
BI
MAA0_<5>
3
BI
MAA0_<4>
3
BI
MAA0_<3>
3
BI
MAA0_<2>
3
BI
MAA0_<1>
3
BI
MAA0_<0>
3
BI
WCKA0_0
3
IN
WCKA0B_0
3
IN
WCKA0_1
3
IN
WCKA0B_1
3
IN
EDCA0_2
3
OUT
EDCA0_3
3
OUT
EDCA0_1
3
OUT
EDCA0_0
3
OUT
3
3
3
3
DDBIA0_2
BI
DDBIA0_3
BI
DDBIA0_1
BI
DDBIA0_0
BI
RASA0B
3
IN
CASA0B
3
IN
CKEA0
3
IN
CLKA0B
3
IN
CLKA0
3
IN
CSA0B_0
3
IN
WEA0B
3
IN
ZQ_A0 ZQ_A1 ZQ_B0 ZQ_B1
DRAM_RST_A
3,4
IN
VREFD1_A0 VREFD1_A1 VREFD1_B0 VREFD1_B1
VREFD2_A0 VREFD2_A1 VREFD2_B0 VREFD2_B1
VREFC_A0 VREFC_A1 VREFC_B0 VREFC_B1
ADBIA0
3
IN
M2
DQ31__DQ7
M4
DQ30__DQ6
N2
DQ29__DQ5
N4
DQ28__DQ4
T2
DQ27__DQ3
T4
DQ26__DQ2
V2
DQ25__DQ1
V4
DQ24__DQ0
M13
DQ23__DQ15
M11
DQ22__DQ14
N13
DQ21__DQ13
N11
DQ20__DQ12
T13
DQ19__DQ11
T11
DQ18__DQ10
V13
DQ17__DQ9
V11
DQ16__DQ8
F13
DQ15__DQ23
F11
DQ14__DQ22
E13
DQ13__DQ21
E11
DQ12__DQ20
B13
DQ11__DQ19
B11
DQ10__DQ18
A13
DQ9__DQ17
A11
DQ8__DQ16
F2
DQ7__DQ31
F4
DQ6__DQ30
E2
DQ5__DQ29
E4
DQ4__DQ28
B2
DQ3__DQ27
B4
DQ2__DQ26
A2
DQ1__DQ25
A4
DQ0__DQ24
J5
RFU_A12_NC
K4
A7_A8__A0_A10
K5
A6_A11__A1_A9
K10
A5_BA1__A3_BA3
K11
A4_BA2__A2_BA0
H10
A3_BA3__A5_BA1
H11
A2_BA0__A4_BA2
H5
A1_A9__A6_A11
H4
A0_A10__A7_A8
D4
WCK01__WCK23
D5
WCK01#__WCK23#
P4
WCK23__WCK01
P5
WCK23#__WCK01#
R2
EDC3__EDC0
R13
EDC2__EDC1
C13
EDC1__EDC2
C2
EDC0__EDC3
P2
DBI3#__DBI0#
P13
DBI2#__DBI1#
D13
DBI1#__DBI2#
D2
DBI0#__DBI3#
G3
RAS#__CAS#
L3
CAS#__RAS#
J3
CKE#
J11
CK#
J12
CK
G12
CS#__WE#
L12
WE#__CS#
J13
ZQ
J10
SEN
J2
RESET#
J1
MF
A5
Vpp_NC
V5
Vpp_NC1
A10
VREFD1
V10
VREFD2
J14
VREFC
J4
ABI#
VDDQ_B1
VDDQ_B3
VDDQ_B12
VDDQ_B14
VDDQ_D1
VDDQ_D3
VDDQ_D12
VDDQ_D14
VDDQ_E5
VDDQ_E10
VDDQ_F1
VDDQ_F3
VDDQ_F12
VDDQ_F14
VDDQ_G2
VDDQ_G13
VDDQ_H3
VDDQ_H12
VDDQ_K3
VDDQ_K12
VDDQ_L2
VDDQ_L13
VDDQ_M1
VDDQ_M3
VDDQ_M12
VDDQ_M14
VDDQ_N5
VDDQ_N10
VDDQ_P1
VDDQ_P3
VDDQ_P12
VDDQ_P14
VDDQ_T1
VDDQ_T3
VDDQ_T12
VDDQ_T14
VDD_C5
VDD_C10
VDD_D11
VDD_G1
VDD_G4
VDD_G11
VDD_G14
VDD_L1
VDD_L4
VDD_L11
VDD_L14
VDD_P11
VDD_R5
VDD_R10
VSSQ_A1
VSSQ_A3
VSSQ_A12
VSSQ_A14
VSSQ_C1
VSSQ_C3
VSSQ_C4
VSSQ_C11
VSSQ_C12
VSSQ_C14
VSSQ_E1
VSSQ_E3
VSSQ_E12
VSSQ_E14
VSSQ_F5
VSSQ_F10
VSSQ_H2
VSSQ_H13
VSSQ_K2
VSSQ_K13
VSSQ_M5
VSSQ_M10
VSSQ_N1
VSSQ_N3
VSSQ_N12
VSSQ_N14
VSSQ_R1
VSSQ_R3
VSSQ_R4
VSSQ_R11
VSSQ_R12
VSSQ_R14
VSSQ_V1
VSSQ_V3
VSSQ_V12
VSSQ_V14
VSS_B5
VSS_B10
VSS_D10
VSS_G5
VSS_G10
VSS_H1
VSS_H14
VSS_K1
VSS_K14
VSS_L5
VSS_L10
VSS_P10
VSS_T5
VSS_T10
+MVDD
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
+MVDD
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
+MVDD
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
V1
V3
V12
V14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
+MVDD
+MVDD
+MVDD
1 2
R2403 1%60.4R
1 2
R2404 1%60.4R
R2400 120R 1%
R2410 1%2.37K
R2411 1%5.49K
C2400 6.3V1uF
R2412 1%2.37K
R2413 1%5.49K
C2401 6.3V1uF
R2414 1%2.37K
R2415 1%5.49K
C2402 6.3V1uF
3
3
3
3
3
3
3
3
3
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
15
DQB0 _<1 5>
3,4
BI
14
DQB0 _<1 4>
3,4
BI
12
DQB0 _<1 2>
3,4
BI
13
DQB0 _<1 3>
3,4
BI
8
DQB0 _<8 >
3,4
BI
10
DQB0 _<1 0>
3,4
BI
9
DQB0 _<9 >
3,4
BI
11
DQB0 _<1 1>
3,4
BI
7
DQB0 _<7 >
3,4
BI
3
DQB0 _<3 >
3,4
BI
6
DQB0 _<6 >
3,4
BI
5
DQB0 _<5 >
3,4
BI
0
DQB0 _<0 >
3,4
BI
1
DQB0 _<1 >
3,4
BI
4
DQB0 _<4 >
3,4
BI
2
DQB0 _<2 >
3,4
BI
19
DQB0 _<1 9>
3,4
BI
17
DQB0 _<1 7>
3,4
BI
18
DQB0 _<1 8>
3,4
BI
16
DQB0 _<1 6>
3,4
BI
21
DQB0 _<2 1>
3,4
BI
22
DQB0 _<2 2>
3,4
BI
20
DQB0 _<2 0>
3,4
BI
23
DQB0 _<2 3>
3,4
BI
24
DQB0 _<2 4>
3,4
BI
25
DQB0 _<2 5>
3,4
BI
27
DQB0 _<2 7>
3,4
BI
26
DQB0 _<2 6>
3,4
BI
31
DQB0 _<3 1>
3,4
BI
29
DQB0 _<2 9>
3,4
BI
30
DQB0 _<3 0>
3,4
BI
28
DQB0 _<2 8>
3,4
BI
8
MAB 0_ <8>
BI
7
MAB 0_ <7>
BI
6
MAB 0_ <6>
BI
5
MAB 0_ <5>
BI
4
MAB 0_ <4>
BI
3
MAB 0_ <3>
BI
2
MAB 0_ <2>
BI
1
MAB 0_ <1>
BI
0
MAB 0_ <0>
BI
WCKB0_1
3
IN
WCKB0B_1
3
IN
WCKB0_0
3
IN
WCKB0B_0
3
IN
EDCB0_1
3
OUT
EDCB0_0
3
OUT
EDCB0_2
3
OUT
EDCB0_3
3
OUT
3
3
3
3
DDBIB0_1
BI
DDBIB0_0
BI
DDBIB0_2
BI
DDBIB0_3
BI
RASB0B
3
IN
CASB0B
3
IN
CKEB0
3
IN
CLKB0B
3
IN
CLKB0
3
IN
CSB0B_0
3
IN
WEB0B
3
IN
DRAM_RST_B
3,4
IN
ADBIB0
3
IN
M2
M4
N2
N4
T2
T4
V2
V4
M13
M11
N13
N11
T13
T11
V13
V11
F13
F11
E13
E11
B13
B11
A13
A11
F2
F4
E2
E4
B2
B4
A2
A4
J5
K4
K5
K10
K11
H10
H11
H5
H4
D4
D5
P4
P5
R2
R13
C13
C2
P2
P13
D13
D2
G3
L3
J3
J11
J12
G12
L12
J13
J10
J2
J1
A5
V5
A10
V10
J14
J4
DQ31__DQ7
DQ30__DQ6
DQ29__DQ5
DQ28__DQ4
DQ27__DQ3
DQ26__DQ2
DQ25__DQ1
DQ24__DQ0
DQ23__DQ15
DQ22__DQ14
DQ21__DQ13
DQ20__DQ12
DQ19__DQ11
DQ18__DQ10
DQ17__DQ9
DQ16__DQ8
DQ15__DQ23
DQ14__DQ22
DQ13__DQ21
DQ12__DQ20
DQ11__DQ19
DQ10__DQ18
DQ9__DQ17
DQ8__DQ16
DQ7__DQ31
DQ6__DQ30
DQ5__DQ29
DQ4__DQ28
DQ3__DQ27
DQ2__DQ26
DQ1__DQ25
DQ0__DQ24
RFU_A12_NC
A7_A8__A0_A10
A6_A11__A1_A9
A5_BA1__A3_BA3
A4_BA2__A2_BA0
A3_BA3__A5_BA1
A2_BA0__A4_BA2
A1_A9__A6_A11
A0_A10__A7_A8
WCK01__WCK23
WCK01#__WCK23#
WCK23__WCK01
WCK23#__WCK01#
EDC3__EDC0
EDC2__EDC1
EDC1__EDC2
EDC0__EDC3
DBI3#__DBI0#
DBI2#__DBI1#
DBI1#__DBI2#
DBI0#__DBI3#
RAS#__CAS#
CAS#__RAS#
CKE#
CK#
CK
CS#__WE#
WE#__CS#
ZQ
SEN
RESET#
MF
Vpp_NC
Vpp_NC1
VREFD1
VREFD2
VREFC
ABI#
U2400
VDDQ_B1
VDDQ_B3
VDDQ_B12
VDDQ_B14
VDDQ_D1
VDDQ_D3
VDDQ_D12
VDDQ_D14
VDDQ_E5
VDDQ_E10
VDDQ_F1
VDDQ_F3
VDDQ_F12
VDDQ_F14
VDDQ_G2
VDDQ_G13
VDDQ_H3
VDDQ_H12
VDDQ_K3
VDDQ_K12
VDDQ_L2
VDDQ_L13
VDDQ_M1
VDDQ_M3
VDDQ_M12
VDDQ_M14
VDDQ_N5
VDDQ_N10
VDDQ_P1
VDDQ_P3
VDDQ_P12
VDDQ_P14
VDDQ_T1
VDDQ_T3
VDDQ_T12
VDDQ_T14
VDD_C5
VDD_C10
VDD_D11
VDD_G1
VDD_G4
VDD_G11
VDD_G14
VDD_L1
VDD_L4
VDD_L11
VDD_L14
VDD_P11
VDD_R5
VDD_R10
VSSQ_A1
VSSQ_A3
VSSQ_A12
VSSQ_A14
VSSQ_C1
VSSQ_C3
VSSQ_C4
VSSQ_C11
VSSQ_C12
VSSQ_C14
VSSQ_E1
VSSQ_E3
VSSQ_E12
VSSQ_E14
VSSQ_F5
VSSQ_F10
VSSQ_H2
VSSQ_H13
VSSQ_K2
VSSQ_K13
VSSQ_M5
VSSQ_M10
VSSQ_N1
VSSQ_N3
VSSQ_N12
VSSQ_N14
VSSQ_R1
VSSQ_R3
VSSQ_R4
VSSQ_R11
VSSQ_R12
VSSQ_R14
VSSQ_V1
VSSQ_V3
VSSQ_V12
VSSQ_V14
VSS_B5
VSS_B10
VSS_D10
VSS_G5
VSS_G10
VSS_H1
VSS_H14
VSS_K1
VSS_K14
VSS_L5
VSS_L10
VSS_P10
VSS_T5
VSS_T10
+MVDD
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
V1
V3
V12
V14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
MF = 1MF = 0MF = 1
+MVDD
+MVDD
1 2
R2603 1%60.4R
1 2
R2604 1%60.4R
R2600 1%120R
+MVDD
R2610 1%2.37K
+MVDD
R2611 1%5.49K
C2600 6.3V1uF
R2612 1%2.37K
+MVDD
R2613 1%5.49K
C2601 6.3V1uF
R2614 1%2.37K
+MVDD
R2615 1%5.49K
C2602 6.3V1uF
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3
3
3
3
3
3
3
3
3
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
16
DQB1 _<1 6>
BI
17
DQB1 _<1 7>
BI
19
DQB1 _<1 9>
BI
18
DQB1 _<1 8>
BI
23
DQB1 _<2 3>
BI
21
DQB1 _<2 1>
BI
22
DQB1 _<2 2>
BI
20
DQB1 _<2 0>
BI
26
DQB1 _<2 6>
BI
24
DQB1 _<2 4>
BI
25
DQB1 _<2 5>
BI
27
DQB1 _<2 7>
BI
28
DQB1 _<2 8>
BI
30
DQB1 _<3 0>
BI
29
DQB1 _<2 9>
BI
31
DQB1 _<3 1>
BI
14
DQB1 _<1 4>
BI
13
DQB1 _<1 3>
BI
15
DQB1 _<1 5>
BI
12
DQB1 _<1 2>
BI
11
DQB1 _<1 1>
BI
8
DQB1 _<8 >
BI
10
DQB1 _<1 0>
BI
9
DQB1 _<9 >
BI
7
DQB1 _<7 >
BI
6
DQB1 _<6 >
BI
4
DQB1 _<4 >
BI
5
DQB1 _<5 >
BI
0
DQB1 _<0 >
BI
2
DQB1 _<2 >
BI
1
DQB1 _<1 >
BI
3
DQB1 _<3 >
BI
8
MAB 1_ <8>
BI
0
MAB 1_ <0>
BI
1
MAB 1_ <1>
BI
3
MAB 1_ <3>
BI
2
MAB 1_ <2>
BI
5
MAB 1_ <5>
BI
4
MAB 1_ <4>
BI
6
MAB 1_ <6>
BI
7
MAB 1_ <7>
BI
WCKB1_0
3
IN
WCKB1B_0
3
IN
WCKB1_1
3
IN
WCKB1B_1
3
IN
EDCB1_2
3
OUT
EDCB1_3
3
OUT
EDCB1_1
3
OUT
EDCB1_0
3
OUT
3
3
3
3
DDBIB1_2
BI
DDBIB1_3
BI
DDBIB1_1
BI
DDBIB1_0
BI
CASB1B
3
IN
RASB1B
3
IN
CKEB1
3
IN
CLKB1B
3
IN
CLKB1
3
IN
WEB1B
3
IN
CSB1B_0
3
IN
DRAM_RST_B
3,4
IN
ADBIB1
3
IN
M2
M4
N2
N4
T2
T4
V2
V4
M13
M11
N13
N11
T13
T11
V13
V11
F13
F11
E13
E11
B13
B11
A13
A11
F2
F4
E2
E4
B2
B4
A2
A4
J5
K4
K5
K10
K11
H10
H11
H5
H4
D4
D5
P4
P5
R2
R13
C13
C2
P2
P13
D13
D2
G3
L3
J3
J11
J12
G12
L12
J13
J10
J2
J1
A5
V5
A10
V10
J14
J4
DQ31__DQ7
DQ30__DQ6
DQ29__DQ5
DQ28__DQ4
DQ27__DQ3
DQ26__DQ2
DQ25__DQ1
DQ24__DQ0
DQ23__DQ15
DQ22__DQ14
DQ21__DQ13
DQ20__DQ12
DQ19__DQ11
DQ18__DQ10
DQ17__DQ9
DQ16__DQ8
DQ15__DQ23
DQ14__DQ22
DQ13__DQ21
DQ12__DQ20
DQ11__DQ19
DQ10__DQ18
DQ9__DQ17
DQ8__DQ16
DQ7__DQ31
DQ6__DQ30
DQ5__DQ29
DQ4__DQ28
DQ3__DQ27
DQ2__DQ26
DQ1__DQ25
DQ0__DQ24
RFU_A12_NC
A7_A8__A0_A10
A6_A11__A1_A9
A5_BA1__A3_BA3
A4_BA2__A2_BA0
A3_BA3__A5_BA1
A2_BA0__A4_BA2
A1_A9__A6_A11
A0_A10__A7_A8
WCK01__WCK23
WCK01#__WCK23#
WCK23__WCK01
WCK23#__WCK01#
EDC3__EDC0
EDC2__EDC1
EDC1__EDC2
EDC0__EDC3
DBI3#__DBI0#
DBI2#__DBI1#
DBI1#__DBI2#
DBI0#__DBI3#
RAS#__CAS#
CAS#__RAS#
CKE#
CK#
CK
CS#__WE#
WE#__CS#
ZQ
SEN
RESET#
MF
Vpp_NC
Vpp_NC1
VREFD1
VREFD2
VREFC
ABI#
U2600
VDDQ_B1
VDDQ_B3
VDDQ_B12
VDDQ_B14
VDDQ_D1
VDDQ_D3
VDDQ_D12
VDDQ_D14
VDDQ_E5
VDDQ_E10
VDDQ_F1
VDDQ_F3
VDDQ_F12
VDDQ_F14
VDDQ_G2
VDDQ_G13
VDDQ_H3
VDDQ_H12
VDDQ_K3
VDDQ_K12
VDDQ_L2
VDDQ_L13
VDDQ_M1
VDDQ_M3
VDDQ_M12
VDDQ_M14
VDDQ_N5
VDDQ_N10
VDDQ_P1
VDDQ_P3
VDDQ_P12
VDDQ_P14
VDDQ_T1
VDDQ_T3
VDDQ_T12
VDDQ_T14
VDD_C5
VDD_C10
VDD_D11
VDD_G1
VDD_G4
VDD_G11
VDD_G14
VDD_L1
VDD_L4
VDD_L11
VDD_L14
VDD_P11
VDD_R5
VDD_R10
VSSQ_A1
VSSQ_A3
VSSQ_A12
VSSQ_A14
VSSQ_C1
VSSQ_C3
VSSQ_C4
VSSQ_C11
VSSQ_C12
VSSQ_C14
VSSQ_E1
VSSQ_E3
VSSQ_E12
VSSQ_E14
VSSQ_F5
VSSQ_F10
VSSQ_H2
VSSQ_H13
VSSQ_K2
VSSQ_K13
VSSQ_M5
VSSQ_M10
VSSQ_N1
VSSQ_N3
VSSQ_N12
VSSQ_N14
VSSQ_R1
VSSQ_R3
VSSQ_R4
VSSQ_R11
VSSQ_R12
VSSQ_R14
VSSQ_V1
VSSQ_V3
VSSQ_V12
VSSQ_V14
VSS_B5
VSS_B10
VSS_D10
VSS_G5
VSS_G10
VSS_H1
VSS_H14
VSS_K1
VSS_K14
VSS_L5
VSS_L10
VSS_P10
VSS_T5
VSS_T10
+MVDD
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
+MVDD
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
V1
V3
V12
V14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
+MVDD +MVDD
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C2014 6.3V1uF
C2015 6.3V1uF
C2016 6.3V1uF
C2017 6.3V1uF
C2010 6.3V1uF
C2020 6.3V0.1uF
C2011 6.3V1uF
C2012 6.3V1uF
C2013 6.3V1uF
1 2
C2021 6.3V0.1uF
C2022 6.3V0.1uF
C2023 6.3V0.1uF
C2024 6.3V0.1uF
C2025 6.3V0.1uF
C2026 6.3V0.1uF
C2027 6.3V0.1uF
C2030 6.3V10uF
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
1.0
1.0
1.0
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
+MVDD +MVDD
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C2210 6.3V1uF
1 2
C2211 6.3V1uF
C2212 6.3V1uF
C2213 6.3V1uF
C2214 6.3V1uF
C2215 6.3V1uF
C2216 6.3V1uF
C2217 6.3V1uF
C2220 6.3V0.1uF
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C2226 6.3V0.1uF
C2227 6.3V0.1uF
C2230 6.3V10uF
C2410 6.3V1uF
C2411 6.3V1uF
C2412 6.3V1uF
C2413 6.3V1uF
C2414 6.3V1uF
C2415 6.3V1uF
C2221 6.3V0.1uF
C2222 6.3V0.1uF
C2223 6.3V0.1uF
C2224 6.3V0.1uF
C2225 6.3V0.1uF
C2416 6.3V1uF
1 2
1 2
C2417 6.3V1uF
C2420 6.3V0.1uF
1 2
C2421 6.3V0.1uF
C2422 6.3V0.1uF
C2423 6.3V0.1uF
C2424 6.3V0.1uF
C2425 6.3V0.1uF
C2426 6.3V0.1uF
C2427 6.3V0.1uF
C2430 6.3V10uF
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C2614 6.3V1uF
C2615 6.3V1uF
C2616 6.3V1uF
C2617 6.3V1uF
C2610 6.3V1uF
C2620 6.3V0.1uF
C2611 6.3V1uF
C2612 6.3V1uF
C2613 6.3V1uF
1 2
C2621 6.3V0.1uF
C2622 6.3V0.1uF
C2623 6.3V0.1uF
C2624 6.3V0.1uF
C2625 6.3V0.1uF
C2626 6.3V0.1uF
C2627 6.3V0.1uF
C2630 6.3V10uF
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
GDDR5 x32 CHAB
GDDR5 x32 CHAB
GDDR5 x32 CHAB
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:03 2015
Mon Mar 30 02:42:03 2015
Mon Mar 30 02:42:03 2015
DATE:
DATE:
DATE:
4 20
4 20
NOTE
NOTE
NOTE
4 20
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
OF
OF
OF
REV:
REV:
REV:
Page 5
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
+1.8V
D D
D D
D D
C
C
C
B B
B B
B B
A
A
A
12
R50
3.24K
1%
12
12
R51
C50
5.62K
0.082uF
1%
16V
+1.8V
12
R54
4.53K
1%
PS_2
12
12
R55
C52
4.99K
0.68uF
1%
4V
8
8
8
+1.8V
12
R52
8.45K
1%
5
12
R53
2K
1%
+1.8V
12
R56
4.99K
1%
5
DNI
12
R57
4.75K
1%
+1.8V
+0.95V
+1.8V
7
7
7
PS_1
5
12
C51
0.082uF
16V
DNI
PS_3
5
12
C53
0.68uF
4V
+1.8V
1 2
12
120R
B1
12
120R
B2
1 2
220R
B3
R1 1K DNI5%
1 2
R2 5%1K
12
12
12
C16
4.7uF
6.3V
DNI
7
7
7
+3.3V_BUS
+1.8V
5
5
5
5
1
OUT
1
BI
11,16
OUT
11,16
IN
11
OUT
+SPLL_PVDD
12
12
C10
C11
C12
4.7uF
1uF
0.1uF
6.3V
6.3V
6.3V
+SPLL_VDDC
12
12
C13
C14
1uF
0.1uF
6.3V
6.3V
+MPLL_PVDD
12
12
C17
C18
C19
4.7uF
1uF
0.1uF
6.3V
6.3V
6.3V
PS_0
PS_1
PS_2
PS_3
G_SMBCLK
G_SMBDAT
SVC
SVD
SVT
TEST_PG
6
6
6
U1E
BC37
12
BC39
BD37
C1
1uF
BD39
6.3V
AV34
12
AV36
AW34
C2
1uF
AW36
6.3V
BE43
BC41
BE41
BG41
AL51
AL53
BD21
BC21
BD17
BD19
BC17
BC49
BC48
BM20
BE19
BE39
BE15
BH43
BH27
BE23
BE17
BH25
BH29
BE21
U1G
PART 7 OF 16
AW23
SPLL_PVDD
AV23
SPLL_PVSS
AW25
SPLL_VDDC
AV21
MPLL_PVDD
AV20
MPLL_PVDD
6
6
6
PART 5 OF 16
VDDR3
VDDR3
VDDR3
VDDR3
VDD_CT
VDD_CT
VDD_CT
VDD_CT
MLPS_0
MLPS_1
MLPS_2
MLPS_3
SMBCLK
SMBDAT
SCL
SDA
GPIO_SVC
GPIO_SVD
GPIO_SVT
DDCVAGCLK
DDCVGADATA
TEST_PG
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GPIO
BONAIRE
GPIO_5_REGHOT_AC_BATT
GPIO_6_TACH
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_14_HPD2
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_22_ROMCSB
GENERICE_HPD 4
GENERICF_H PD5
GENERICG_HPD 6
NC_IDSC_AN ALOGOUT
NC_IDSC_I L0
NC_IDSC_PW M0
NC_IDSC_PW M1
NC_IDSC_C MON
BH50
XO_IN2
BH52
XO_IN
BONAIRE
PLLS XTAL
SPLL_CLKTEST A
SPLL_CLKTEST B
PLL_ANALOG_IN
PLL_ANALOG_OUT
XTALIN
BJ53
XTALIN
XTALOUT
BJ51
XTALOUT
CLKTESTA
BD15
CLKTESTB
BC15
BD23
BC23
5 4 3
5 4 3
5 4 3
BG27
GPIO_0
BH23
GPIO_1
BN19
GPIO_2
BG29
GPIO_3
BE27
GPIO_4
BH35
BC29
GPIO_11
GPIO_12
GPIO_13
GPIO_15
GPIO_16
GPIO_20
GPIO_21
GPIO_29
GPIO_30
GENERICA
GENERICB
GENERICC
GENERICD
DIGON
VARY_BL
CLKREQB
WAKEB
NC_DSM_0
NC_DSM_1
NC_PS_4
HPD1
CEC
BA45
BG39
BH37
BH39
BE29
BC31
BD31
BK28
BG31
BG37
BD29
BK36
BC27
BH33
BH31
BH41
BE25
BG25
BE45
BC45
BG23
BL19
BK42
BA53
AW49
BM44
AW45
AW47
BK44
J47
AK52
G48
F47
F45
G45
F43
BG33
BG35
BC43
KEEP THE CLOCK PATH
AS SHORT AS POSSIBLE
1 2
C30 6.3V0.1uF
1 2
C31 6.3V0.1uF
5
5
5
GPIO_6_TACH
GPIO_8_ROMSO
GPIO_9_ROMSIPS_0
GPIO_10_ROMSCK
GPIO_14_HPD2
GPIO_22_ROMCSB
GENERICG_HPD 6
HPD1
CTF_OUT
12
R28
1M
1%
IN
IN
OUT
IN
IN
1 2
C24 18pF 50V
3
4
Y2
27.000MHz
1
2
1 2
C25 50V18pF
1 2
R30 51.1R 1%
1 2
R31 1%51.1R
17
DP
8
17,16
DVI-I
9
HDMI
7
+1.8V
RP1A 33R 5%
RP1B 33R 5%
RP1C 33R 5%
RP1D 33R 5%
12
12
C5
C6
1uF
1uF
6.3V
6.3V
+1.8V
1 2
R3 221R 1% DNI
1 2
R4 110R 1% DNI
1 2
C8 0.1uF 6.3V DNI
1 8
2 7
3 6
4 5
12
C7
1uF
6.3V
TP1
TP2
TP3
TP4
+3.3V_BUS
12
R5
10K
5%
DVPCLK
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
VREFG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
TOBAGO GPIO MLPS PLL XTAL
TOBAGO GPIO MLPS PLL XTAL
TOBAGO GPIO MLPS PLL XTAL
SHEET:
SHEET:
SHEET:
DATE:
DATE:
DATE:
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTE
NOTE
NOTE
NOTES:
NOTES:
NOTES:
ROMSO
ROMSI
ROMSCK
ROMCSB
1 2
MR7
1 2
MR8
U1F
AV38
VDDR4
AV39
VDDR4
AW38
VDDR4
AW39
VDDR4
BD33
SWAPLOCKA
BC33
SWAPLOCKB
BC35
GENLK_CLK
BD35
GENLK_VSYNC
BH9
DVPCLK
BM18
DVPCNTL_0
BK18
DVPCNTL_1
BG9
DVPCNTL_2
BL11
MVP_DVOCNTL_0
BN11
MVP_DVOCNTL_1
BK20
VREFG
Mon Mar 30 02:42:04 2015
Mon Mar 30 02:42:04 2015
Mon Mar 30 02:42:04 2015
5 20
5 20
5 20
+3.3V_BUS
10K 5%
DNI
10K 5%
DNI
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
3
2
5
6
1
+3.3V_BUS
OF
OF
OF
VIDEO BIOS
FIRMWARE
PART 6 OF 16
WP
SO
SI
CE
SCK
PM25LD010C-SCE
BONAIRE
U11
VDD
HOLD
GND
1 2
R7 10K 5%
1 2
R8 10K 5%
DVP
PIN STRAPS
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
8
7
4
+3.3V_BUS
2
2
2
12
BIOS1
C4
0.1uF
6.3V
BIOS
HSYNC
VSYNC
DVPDATA_<0>
BH11
DVPDATA_<1>
BG11
DVPDATA_<2>
BH13
DVPDATA_<3>
BG13
DVPDATA_<4>
BH15
DVPDATA_<5>
BG15
DVPDATA_<6>
BH17
DVPDATA_<7>
BG17
DVPDATA_<8>
BH19
DVPDATA_<9>
BG19
DVPDATA_<10>
BH21
DVPDATA_<11>
BG21
DVPDATA_<12>
BM12
DVPDATA_<13>
BK12
DVPDATA_<14>
BN13
DVPDATA_<15>
BL13
BM14
BK14
BN15
BL15
BM16
BK16
BN17
BL17
1.0
1.0
1.0
REV:
REV:
REV:
HSYNC = AUD[1], VSYNC = AUD[ 0]
[00] NO AU DIO FU NCTION
6
OUT
[01] AUDI O FOR D P ONLY
[10] AUDI O FOR D P AND H DMI IF DONGLE IS DETECTED
[11] AUDI O FOR BOTH DP AND HDMI
6
OUT
HDMI MUST ONLY BE ENABLED ON SYSTEMS THAT ARE LEGALLY
ENTITLED. IT IS THE RESPONSIBI LITY OF THE SYSTEM DESIGN ERS
TO SUPPORT THIS FEATUR E.
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
1
1
1
C
C
C
A
A
A
Page 6
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
7
7
7
6
6
6
5 4 3
5 4 3
5 4 3
2
2
2
1
1
1
D D
D D
D D
U1H
+1.8V
+1.8V
12
120R
B1500
12
120R
B1501
+VDD1DI
12
C1500
1uF
6.3V
+AVDD
12
C1502
1uF
6.3V
R1500 1%499R
12
C1501
0.1uF
6.3V
12
C1503
0.1uF
6.3V
RSET
12
C
C
C
B B
B B
B B
BC47
BA47
AR47
AM52
AM50
+5V_VESA
+5V_VESA
VDD1DI
VSS1DI
AVDD
AVSSQ
RSET
U1500B
3 5
74AHCT1G126GW
U1501B
3 5
74AHCT1G126GW
PART 8 OF 16
DAC1
1 2
C1504 6.3V0.1uF
1 2
C1505 6.3V0.1uF
AP50
R
AN51
G
AN53
B
AP52
AVSSN
AR49
VSYNC
AU49
HSYNC
HSYNC
5
OUT
VSYNC
5
OUT
12
R1510
150R
1%
12
R1512
150R
1%
12
R1514
150R
1%
1
2 4
U1500A
74AHCT1G126GW
1
2 4
U1501A
74AHCT1G126GW
R_DAC
G_DAC
B_DAC
12
R1511
150R
1%
12
R1513
150R
1%
12
R1515
150R
1%
SEE BOM FOR Q UALIFIED FILTE RS
L1500
1 2
0.012uH
L1502
1 2
0.012uH
L1504
1 2
0.012uH
HSYNC_DAC_B
VSYNC_DAC_B
R_DAC_L
G_DAC_L
L1501
1 2
0.012uH
0.012uH
0.012uH
12
C1511
5pF
50V
L1503
12
C1513
5pF
50V
L1505
12
C1515
5pF
50V
12
C1506
12pF
50V
DNI
12
C1507
12pF
50V
DNI
R_DAC_F
G_DAC_F
B_DAC_FB_DAC_L
HSYNC_D AC_R
VSYNC_DAC _R
6,9
OUT
6,9
OUT
6,9
OUT
6,9
OUT
6,9
OUT
12
C1510
5pF
50V
1 2
12
C1512
5pF
50V
1 2
12
C1514
5pF
50V
1 2
R1501 5%24R
1 2
R1502 5%24R
C
C
C
OPTIONAL ESD PROTECTION DIODES
D1500 ESD5V3U1U-02LRH
12
D1501 ESD5V3U1U-02LRH
12
D1502 ESD5V3U1U-02LRH
A
A
A
8
8
8
12
D1505 ESD8V0R1B-02LRH
12
D1506 ESD8V0R1B-02LRH
12
7
7
7
R_DAC_F
DNI
G_DAC_F
DNI
B_DAC_F
DNI
HSYNC_DAC_R
DNI
VSYNC_DAC_R
DNI
9 6
9 6
9 6
9 6
9 6
6
6
6
5
5
5
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
TOBAGO DAC
TOBAGO DAC
TOBAGO DAC
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:05 2015
Mon Mar 30 02:42:05 2015
Mon Mar 30 02:42:05 2015
DATE:
DATE:
DATE:
6 20
6 20
NOTE
NOTE
NOTE
6 20
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
OF
OF
OF
REV:
REV:
REV:
1.0
1.0
1.0
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
A
A
A
Page 7
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
+1.8V
+0.95V
12
12
12
12
12
C1702
C1700
C1701
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
12
C1710
C1711
C1712
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
C1703
C1704
C1705
1uF
10uF
10uF
6.3V
6.3V
6.3V
12
12
12
C1713
C1714
C1715
1uF
10uF
10uF
6.3V
6.3V
6.3V
U1I
PART 9 OF 16
AW42
DP_VDDR
AU44
DP_VDDR
AW43
DP_VDDR
AU42
DP_VDDR
AU43
DP_VDDR
BA42
DP_VDDR
AR44
DP_VDDR
AW44
DP_VDDR
AJ42
DP_VDDC
AJ43
DP_VDDC
AJ44
DP_VDDC
AL42
DP_VDDC
AN42
DP_VDDC
AN43
DP_VDDC
AN44
DP_VDDC
AR42
DP_VDDC
AR43
DP_VDDC
TX2P_DPA0P
TX2M_DPA0N
TX1P_DPA1P
TX1M_DPA1N
TX0P_DPA2P
TX0M_DPA2N
TXCAP_DPA3P
TXCAM_DPA3N
DDCAUX3P
TMDP A/B
DDCAUX3N
BL41
BN41
BK40
BM40
BL39
BN39
BK38
BM38
BL37
BN37
+5V_VESA
BTX2P
BTX2N
BTX1P
BTX1N
BTX0P
BTX0N
BTXCP
BTXCN
DDC4CLK_HDMI
DDC4DAT_HDMI
12
HPD_HDMI
C1730
1uF
10V
J1700
SHELL1
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
D0+
8
D0 Shield
9
D0-
10
CK+
11
CK Shield
12
CK-
13
CE Remote
14
NC
15
DDC CLK
16
DDC DATA
17
GND
18
+5V
19
HP DET
SHELL2
HDMI19PM_BLACK-HF
N5Y-19M0061-L06
HDMI_D19_4
21
23
MEC1
22
20
BTX2P
7
BTX2N
7
BTX1P
7
BTX1N
7
BTX0P
7
BTX0N
7
BTXCP
7
BTXCN
7
DDC4CLK_HD MI
7
DDC4DAT_HDMIDPAB_CALR
7
HPD_HDMI
SCREW1700
SCREW
1 2
R1700 1%150R
BL49
TX5P_DPB0P
BN49
TX5M_DPB0N
BK48
TX4P_DPB1P
BM48
TX4M_DPB1N
BL47
TX3P_DPB2P
BN47
TX3M_DPB2N
BK46
TXCBP_DPB3P
BM46
TXCBM_DPB3N
BL45
BM42
DPAB_CALR
BONAIRE
DDCAUX4P
DDCAUX4N
BN45
DPB_TX2P
DPB_TX2N
DPB_TX1P
DPB_TX1N
DPB_TX0P
DPB_TX0N
DPB_TXCP
DPB_TXCN
1 2
C1720 0.1uF 6.3V
1 2
C1721 0.1uF 6.3V
1 2
C1722 0.1uF 6.3V
1 2
C1723 6.3V0.1uF
1 2
C1724 6.3V0.1uF
1 2
C1725 6.3V0.1uF
1 2
C1726 0.1uF 6.3V
1 2
C1727 6.3V0.1uF
+5V_VESA
1 2
R1701 1%499R
1 2
R1702 499R 1%
1 2
R1703 1%499R
1 2
R1704 1%499R
1 2
R1705 1%499R
1 2
R1706 499R 1%
1 2
R1707 1%499R
1 2
R1708 499R 1%
12
12
R1709
R1710
2.2K
2.2K
5%
5%
DVI_EN
9
IN
DPB_GND
Q1700
1
2N7002
2 3
+3.3V_BUS
Q1703
1
1 2
2 3
R1713 20K 5%
1 2
R1714 10K 5%
HPD1
5
OUT
MMBT3904
OPTIONAL ESD PROTECTION DIODES
ESD5V3U1U-02LRH
12
D1700
ESD5V3U1U-02LRH
12
D1701
ESD5V3U1U-02LRH
12
D1702
ESD5V3U1U-02LRH
12
D1703
ESD5V3U1U-02LRH
12
D1704
ESD5V3U1U-02LRH
12
D1705
ESD5V3U1U-02LRH
12
D1706
ESD5V3U1U-02LRH
12
D1707
ESD5V3U1U-02LRH
12
D1708
ESD5V3U1U-02LRH
12
D1709
ESD5V3U1U-02LRH
12
D1710
BTX2P
DNI
BTX2N
DNI
BTX1P
DNI
BTX1N
DNI
BTX0P
DNI
BTX0N
DNI
BTXCP
DNI
BTXCN
DNI
DDC4CLK_HD MI
DNI
DDC4DAT_HDMI
DNI
HPD_HDMI
DNI
7
7
7
7
7
7
7
7
7
7
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
TOBAGO TMDPAB HDMI
TOBAGO TMDPAB HDMI
TOBAGO TMDPAB HDMI
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:05 2015
Mon Mar 30 02:42:05 2015
Mon Mar 30 02:42:05 2015
DATE:
DATE:
DATE:
7 20
7 20
NOTE
NOTE
NOTE
7 20
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
1.0
1.0
OF
OF
OF
1.0
REV:
REV:
REV:
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
Page 8
1 2
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
R1800 150R 1%
U1J
PART 10 OF 16
TMDP C/D
DPCD_CALR
BM28
DPCD_CALR
BONAIRE
TX2P_DPC0P
TX2M_DPC0N
TX1P_DPC1P
TX1M_DPC1N
TX0P_DPC2P
TX0M_DPC2N
TXCCP_DPC3P
TXCCM_DPC3N
AUX1P
AUX1N
DDC1CLK
DDC1DATA
TX5P_DPD0P
TX5M_DPD0N
TX4P_DPD1P
TX4M_DPD1N
TX3P_DPD2P
TX3M_DPD2N
TXCDP_DPD3P
TXCDM_DPD3N
AUX2P
AUX2N
DDC2CLK
DDC2DATA
BL27
BN27
BK26
BM26
BL25
BN25
BK24
BM24
BK22
BM22
BL23
BN23
BL35
BN35
BK34
BM34
BL33
BN33
BK32
BM32
BK30
BM30
BL31
BN31
DPC_C0P
DPC_C0N
DPC_C1P
DPC_C1N
DPC_C2P
DPC_C2N
DPC_C3P
DPC_C3N
AUX1P
AUX1N
DDC1CLK
DDC1DAT
1 2
1 2
R1832 0R 5%
61
Q1802B
2N7002DW
2
C1820 0.1uF 6.3V
1 2
C1821 0.1uF 6.3V
1 2
C1822 0.1uF 6.3V
1 2
C1823 0.1uF 6.3V
1 2
C1824 6.3V0.1uF
1 2
C1825 0.1uF 6.3V
1 2
C1826 0.1uF 6.3V
1 2
C1827 0.1uF 6.3V
1 2
C1828 0.1uF 6.3V
1 2
C1829 0.1uF 6.3V
1 2
R1833 0R 5%
1 2
R1801 100K 5%
1 2
MMDT3904-7
+3.3V_BUS
Q1801B
R1802 5%100K
3
5
4
R1805 1M 5%
1 2
R1803 5%20K
1 2
R1804 10K 5%
1 2
R1806 5.1M 5%
+12V_EXT +12V_EXT
12
12
R1807
R1808
10K
10K
5%
34
Q1802A
2N7002DW
5
AUX1_BYPASS_EN
MMDT3904-7
Q1801A
5%
6
2
2 3
1
GPIO_14_HPD2
5
OUT
1
Q1805
2N7002
1 2
+3.3V_DP
8
8
8
8
8
8
8
8
8
8
8
DPC_0P
DPC_0N
DPC_1P
DPC_1N
DPC_2P
DPC_2N
DPC_3P
DPC_3N
AUX1P_DPC
AUX1N_DPC
HPD_DP
DONGLE_DET_DP
CONFIG2_DP
1
ML_Lane_0p
3
ML_Lane_0n
4
ML_Lane_1p
6
ML_Lane_1n
7
ML_Lane_2p
9
ML_Lane_2n
10
ML_Lane_3p
12
ML_Lane_3n
15
AUX_CHp
17
AUX_CHn
18
Hot_Det
13
CONFIG 1
14
CONFIG 2
J1800
DP_RECEPTACLE_W/TAB
DP_PWR
PWR_RTN
GND_2
20
19
G1
G1
G2
G2
G3
G3
G4
G4
2
GND_0
5
GND_1
8
11
GND_3
16
GND_6
+3.3V_DP
12
C1841
100uF
6.3V
DNI
SCREW1800
1 2
SMD1206P110TFT
8V
SCREW
12
C1840
22uF
6.3V
+3.3V_BUS
F1800
OPTIONAL ESD PROTECTION DIODES
DPC_0P DPC_0P
8
DPC_0N DPC_0N
8
DPC_1P DPC_1P
8
DPC_1N DPC_1N
8
DPC_2P DPC_2P
8
DPC_2N DPC_2N
8
DPC_3P DPC_3P
8
DPC_3N DPC_3N
8
D1805
D1802 ESD5V 3U1U-02LRH
D1803
D1804
12
12
12
12
5
D6Y4
4
C
3
GND
2
B
1
A
5
D6Y4
4
C
3
GND
2
B
1
A
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
D1800
D1801
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
TOBAGO TMDPCD DP
TOBAGO TMDPCD DP
TOBAGO TMDPCD DP
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:05 2015
Mon Mar 30 02:42:05 2015
Mon Mar 30 02:42:05 2015
DATE:
DATE:
DATE:
8 20
8 20
NOTE
NOTE
NOTE
8 20
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
1.0
1.0
OF
OF
OF
1.0
REV:
REV:
REV:
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
HPD_DP
AUX1P_DPC
AUX1N_DPC
DONGLE_DET_DP
8
8
8
8
8
8
8
8
8
8
8
7
Y3
8
GND1
9
Y2
10
Y1
DNIRCLAMP0524P
7
Y3
8
GND1
9
Y2
10
Y1
DNIRCLAMP0524P
DNI
DNI
DNI
DNI
Page 9
1 2
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
R1925 150R 1%
OPTIONAL ESD PROTECTION DIODES
D1900
D1901
D1902
D1903
D1904
D1905
D1906
D1907
D1908
D1909
D1910
D1911
D1912
D1913
D1914
D1915
D1916
U1K
PART 11 OF 16
TMDP E/F
DPEF_CALR
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
ESD5V3U1U-02LRH
BA49
DPEF_CALR
BONAIRE
EFTX2P
DNI
EFTX2N
DNI
EFTX1P
DNI
EFTX1N
DNI
EFTX0P
DNI
EFTX0N
DNI
EFTXCP
DNI
EFTXCN
DNI
EFTX5P
DNI
EFTX5N
DNI
EFTX4P
DNI
EFTX4N
DNI
EFTX3P
DNI
EFTX3N
DNI
DDC6CLK_DVI
DNI
DDC6DAT_DVI
DNI
HPD_EF_DVI
DNI
TXOUT_L3P
TXOUT_L3N
TX2P_L2P_DPE0P
TX2M_L2N_DPE0N
TX1P_L1P_DPE1P
TX1M_L1N_DPE1N
TX0P_L0P_DPE2P
TX0M_L0N_DPE2N
TXCEP_LP_DPE3P
TXCEM_LN_DPE3N
DDCAUX5P
DDCAUX5N
TXOUT_U3P
TXOUT_U3N
TX5P_U2P_DPF0P
TX5M_U2N_DPF0N
TX4P_U1P_DPF1P
TX4M_U1N_DPF1N
TX3P_U0P_DPF2P
TX3M_U0N_DPF2N
TXCFP_UP_DPF3P
TXCFM_UN_DPF3N
DDCAUX6P
DDCAUX6N
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
BB52
BB50
BC53
BC51
BD52
BD50
BE53
BE51
BF52
BF50
BE48
BE49
AT52
AT50
AU53
AU51
AV52
AV50
AW53
AW51
AY52
AY50
AR53
AR51
DPE_TX2P
DPE_TX2N
DPE_TX1P
DPE_TX1N
DPE_TX0P
DPE_TX0N
DPE_TXCP
DPE_TXCN
DPF_TX5P
DPF_TX5N
DPF_TX4P
DPF_TX4N
DPF_TX3P
DPF_TX3N
1 2
C1900 0.1uF 6.3V
1 2
C1901 0.1uF 6.3V
1 2
C1902 6.3V0.1uF
1 2
C1903 6.3V0.1uF
1 2
C1904 6.3V0.1uF
1 2
C1905 0.1uF 6.3V
1 2
C1906 6.3V0.1uF
1 2
C1907 6.3V0.1uF
1 2
C1910 0.1uF 6.3V
1 2
C1911 6.3V0.1uF
1 2
C1912 6.3V0.1uF
1 2
C1913 0.1uF 6.3V
9
1 2
C1914 0.1uF 6.3V
1 2
C1915 0.1uF 6.3V
1 2
R1900 1%499R
1 2
R1901 499R 1%
1 2
R1902 499R 1%
1 2
R1903 499R 1%
1 2
R1904 499R 1%
1 2
R1905 499R 1%
1 2
R1906 499R 1%
1 2
R1907 1%499R
1 2
R1908 499R 1%
1 2
R1909 499R 1%
1 2
R1910 499R 1%
1 2
R1911 499R 1%
1 2
R1912 1%499R
1 2
C1920
0.1uF
16V
1
2 3
GENERICG_HPD6
DPEF_GND
Q1901
2N7002
R1913 499R 1%
Q1900
MMBT3904
+12V_BUS
12
R1920
100K
5%
DVI_EN
7
OUT
+5V_VESA
12
12
12
R1921
R1922
2.2K
2.2K
5%
5%
5
OUT
+3.3V_BUS
2 3
1
1 2
R1923 5%20K
1 2
R1924 10K 5%
EFTX2P
9
EFTX2N
9
EFTX1P
9
EFTX1N
9
EFTX0P
9
EFTX0N
9
EFTXCP
9
EFTXCN
9
EFTX5P
9
EFTX5N
9
EFTX4P
9
EFTX4N
EFTX3P
9
EFTX3N
9
6
IN
6
IN
6
IN
6
IN
6
IN
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
TOBAGO TMDPEF
TOBAGO TMDPEF
TOBAGO TMDPEF
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:06 2015
Mon Mar 30 02:42:06 2015
DATE:
DATE:
DATE:
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTE
NOTE
NOTE
NOTES:
NOTES:
NOTES:
Mon Mar 30 02:42:06 2015
9 20
9 20
9 20
OF
OF
OF
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
REV:
REV:
REV:
DDC6CLK_DVI
9
DDC6DAT_DVI
9
R_DAC_F
G_DAC_F
B_DAC_F
HSYNC_D AC_R
VSYNC_DAC _R
HPD_EF_DVI
1.0
1.0
1.0
J1900
TMDS_Data2+
TMDS_Data2-
TMDS_Data1+
TMDS_Data1-
TMDS_Data0+
TMDS_Data0-
TMDS_Clock+
TMDS_Clock-
TMDS_Data5+
TMDS_Data5-
TMDS_Data4+
TMDS_Data4-
TMDS_Data3+
TMDS_Data3-
DDC_Clock
DDC_Data
Analog_Red
Analog_Green
Analog_Blue
Analog_HYNC
Analog_VSYNC
Hot_Plug_Detect
2014
2014
2014
DVI-I_BLACK
DVI CONN ECTOR
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
2
1
10
9
18
17
23
24
21
20
5
4
13
12
6
7
C1
C2
C3
C4
8
16
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
14
+5V_Power
19
TMDS_Data0/5_Shield
11
TMDS_Data1/3_Shield
3
TMDS_Data2/4_Shield
22
TMDS_Clock_Shield
15
GND_(for_+5V)
C5
Analog_GND
C6
Analog_GND#C6
25
CASE
26
CASE#M2
27
CASE#M3
28
CASE#M4
29
CASE#M5
30
CASE#M6
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
+5V_VESA
12
C1921
1uF
16V
SCREW1900
SCREW1901
Page 10
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
+VDDC
12
C1200
1uF
6.3V
D D
D D
D D
C
C
C
B B
B B
B B
A
A
A
8
8
8
12
C1205
1uF
6.3V
12
C1210
1uF
6.3V
12
C1215
1uF
6.3V
12
C1220
1uF
6.3V
12
C1225
1uF
6.3V
12
C1230
1uF
6.3V
12
C1235
1uF
6.3V
12
C1240
1uF
6.3V
12
C1245
1uF
6.3V
12
C1250
1uF
6.3V
+MVDD
12
C1300
1uF
6.3V
12
C1305
1uF
6.3V
12
C1310
10uF
6.3V
7
7
7
U1L
AA15
12
12
12
C1201
1uF
6.3V
12
C1206
1uF
6.3V
12
C1211
1uF
6.3V
12
C1216
1uF
6.3V
12
C1221
1uF
6.3V
12
C1226
1uF
6.3V
12
C1231
1uF
6.3V
12
C1236
1uF
6.3V
12
C1241
1uF
6.3V
12
C1246
1uF
6.3V
12
C1251
1uF
6.3V
12
C1301
1uF
6.3V
12
C1306
1uF
6.3V
12
C1202
C1203
C1204
1uF
1uF
1uF
6.3V
6.3V
12
12
12
12
12
12
12
12
12
12
12
12
12
6.3V
12
12
C1207
C1208
C1209
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1212
C1213
C1214
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1217
C1218
C1219
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1222
C1223
C1224
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1227
C1228
C1229
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1232
C1233
C1234
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1238
C1239
C1237
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1243
C1244
C1242
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1248
C1249
C1247
1uF
1uF
1uF
6.3V
6.3V
6.3V
C1252
1uF
6.3V
12
12
C1303
C1304
C1302
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
12
C1308
C1309
C1307
1uF
1uF
1uF
6.3V
6.3V
6.3V
12
C1312
C1311
1uF
1uF
6.3V
6.3V
7
7
7
VDDC
AA16
VDDC
AJ34
VDDC
AA23
VDDC
AA25
VDDC
AA29
VDDC
AA31
VDDC
AA34
VDDC
AA38
VDDC
AA39
VDDC
AC16
VDDC
AC18
VDDC
AE25
VDDC
AC20
VDDC
AC21
VDDC
AC33
VDDC
AC34
VDDC
AC27
VDDC
AC36
VDDC
AC38
VDDC
AE16
VDDC
AE18
VDDC
AA27
VDDC
AE20
VDDC
Y20
VDDC
AA20
VDDC
AE34
VDDC
AJ27
VDDC
AE36
VDDC
AE38
VDDC
AG16
VDDC
AG18
VDDC
AG21
VDDC
AG20
VDDC
AG27
VDDC
AE29
VDDC
AG34
VDDC
AG33
VDDC
AG36
VDDC
AG38
VDDC
AL16
VDDC
AL34
VDDC
AJ16
VDDC
AJ23
VDDC
AJ25
VDDC
AJ29
VDDC
AJ31
VDDC
AJ38
VDDC
AE23
VDDC
AE31
VDDC
AJ15
VDDC
AL27
VDDC
AJ20
VDDC
AL23
VDDC
AL25
VDDC
AL29
VDDC
AL31
VDDC
AL38
VDDC
AL20
VDDC
AJ39
VDDC
AN15
VDDC
AN18
VDDC
AP20
VDDC
AN23
VDDC
AN25
VDDC
AN29
VDDC
AN31
VDDC
AP34
VDDC
U1M
F7
VDDR1
G15
VDDR1
AE9
VDDR1
W7
VDDR1
AJ9
VDDR1
W11
VDDR1
AW11
VDDR1
AR7
VDDR1
AU9
VDDR1
L39
VDDR1
AW7
VDDR1
BA9
VDDR1
BC7
VDDR1
L11
VDDR1
J13
VDDR1
N9
VDDR1
J17
VDDR1
G19
VDDR1
J21
VDDR1
G23
VDDR1
J25
VDDR1
G27
VDDR1
J29
VDDR1
G31
VDDR1
J33
VDDR1
G35
VDDR1
J37
VDDR1
G39
VDDR1
G43
VDDR1
J41
VDDR1
L19
VDDR1
J9
VDDR1
L27
VDDR1
L35
VDDR1
AA9
VDDR1
U9
VDDR1
AN9
VDDR1
R7
VDDR1
AC7
VDDR1
AG7
VDDR1
AL7
VDDR1
AG11
VDDR1
AR11
VDDR1
G6
VDDR1
BE6
VDDR1
BC11
VDDR1
PART 12 OF 16
PART 13 OF 16
6
6
6
AN36
VDDC
AN39
VDDC
AP15
VDDC
AP18
VDDC
AP21
VDDC
AP23
VDDC
AP25
VDDC
AP29
VDDC
AP31
VDDC
AP33
VDDC
AP36
VDDC
AP39
VDDC
AT15
VDDC
AT18
VDDC
AT21
VDDC
AE21
VDDC
AT25
VDDC
AT29
VDDC
AE33
VDDC
AT33
VDDC
AT36
VDDC
AT39
VDDC
R15
VDDC
R18
VDDC
AE15
VDDC
R21
VDDC
R36
VDDC
R25
VDDC
R29
VDDC
R33
VDDC
AE39
VDDC
R39
VDDC
T16
VDDC
T18
VDDC
T21
VDDC
T23
VDDC
T25
VDDC
POWER1
BONAIRE
POWER 2
BONAIRE
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
FB_VDDC
FB_VSSC
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
FB_VDDCI
FB_VSSCI
6
6
6
T29
T31
T33
T36
T38
V16
V18
T20
V23
V25
V29
V31
T34
V36
V38
V15
Y16
Y27
Y23
Y25
Y29
Y31
Y34
Y38
V39
AV18
AW18
AA12
AC12
AE12
AG12
AJ12
AL12
AN12
AR12
AU12
M13
M15
M17
M19
M21
M23
M25
M27
M29
M31
M33
M35
M37
M39
AW12
N12
R12
U12
W12
BB13
BC13
BE13
AW15
AW16
FB_VDDC
FB_VSSC
FB_VDDCI
12
C1260
22uF
4V
12
C1265
22uF
4V
12
C1400
1uF
6.3V
12
C1405
1uF
6.3V
12
C1410
22uF
4V
5 4 3
5 4 3
5 4 3
12
12
C1261
C1262
22uF
22uF
4V
4V
12
12
C1267
C1266
22uF
22uF
4V
4V
11
IN
11
IN
12
12
C1402
C1401
1uF
1uF
6.3V
6.3V
12
12
C1407
C1406
1uF
1uF
6.3V
6.3V
12
C1411
22uF
4V
11
IN
5
5
5
+VDDC
12
12
C1263
C1264
22uF
22uF
4V
4V
+VDDCI
12
12
C1403
C1404
1uF
1uF
6.3V
6.3V
12
12
C1408
C1409
1uF
1uF
6.3V
6.3V
12
C1412
1uF
6.3V
A11
VSS
L23
VSS
A15
VSS
L41
VSS
A19
VSS
L31
VSS
A23
VSS
K17
VSS
A27
VSS
BB23
VSS
A31
VSS
L13
VSS
A35
VSS
A39
VSS
BB19
VSS
A43
VSS
BG6
VSS
A47
VSS
B50
VSS
A7
VSS
K21
VSS
W9
VSS
AL11
VSS
AA18
VSS
AT31
VSS
AA21
VSS
AA33
VSS
AA36
VSS
AA45
VSS
AA49
VSS
AA5
VSS
AC1
VSS
AW27
VSS
AC15
VSS
AC25
VSS
AG23
VSS
AC29
VSS
AC39
VSS
BA51
VSS
AC49
VSS
AC5
VSS
T50
VSS
T52
VSS
BK10
VSS
AV25
VSS
R23
VSS
AE27
VSS
AG31
VSS
AC31
VSS
R31
VSS
AE45
VSS
AE49
VSS
AE5
VSS
AG1
VSS
AC9
VSS
AG15
VSS
AG25
VSS
AJ33
VSS
AG29
VSS
AG39
VSS
AW48
VSS
AG49
VSS
AG5
VSS
AU10
VSS
AG9
VSS
AL15
VSS
AJ18
VSS
AJ21
VSS
AL39
VSS
AJ36
VSS
AJ45
VSS
AJ49
VSS
AJ5
VSS
AB52
VSS
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
TOBAGO POWER GND
TOBAGO POWER GND
TOBAGO POWER GND
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:06 2015
Mon Mar 30 02:42:06 2015
Mon Mar 30 02:42:06 2015
DATE:
DATE:
DATE:
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTE
NOTE
NOTE
NOTES:
NOTES:
NOTES:
U1N
PART 14 OF 16
GND 1
BONAIRE
10 20
10 20
10 20
OF
OF
OF
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
AL1
VSS
AL9
VSS
AL18
VSS
AL21
VSS
AC23
VSS
AL33
VSS
AL36
VSS
BL29
VSS
AL49
VSS
AW5
VSS
AJ10
VSS
AR9
VSS
AN16
VSS
AN21
VSS
AN27
VSS
AN33
VSS
AN38
VSS
BA48
VSS
AN5
VSS
AP16
VSS
AN20
VSS
AP27
VSS
AN34
VSS
AP38
VSS
AB50
VSS
AR1
VSS
AW9
VSS
AN45
VSS
BE31
VSS
AR5
VSS
AT16
VSS
AT20
VSS
R27
VSS
AT34
VSS
AT38
VSS
G49
VSS
AE10
VSS
D4
VSS
AN49
VSS
AU5
VSS
AV15
VSS
AV16
VSS
AV33
VSS
AW1
VSS
BC9
VSS
BB41
VSS
BE5
VSS
B4
VSS
BN7
VSS
BC6
VSS
BA5
VSS
R11
VSS
BC1
VSS
BM10
VSS
BE37
VSS
BC5
VSS
BB21
VSS
BB17
VSS
BJ27
VSS
BJ29
VSS
BB31
VSS
BB33
VSS
BB35
VSS
BB37
VSS
BE33
VSS
BM4
VSS
BB15
VSS
BG43
VSS
AW33
VSS
BG5
VSS
BL9
VSS
BG1
VSS
BE11
VSS
REV:
REV:
REV:
BH7
BE9
BJ11
BJ13
BJ15
BJ5
BJ7
BJ9
BK2
D52
E11
E13
E15
E17
E19
E21
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
AW29
J43
L15
N11
G53
J49
K50
K52
L45
AN10
J15
BA11
J19
J23
K25
K33
BB39
J31
AV27
J35
AV29
J39
J11
AU47
K29
L49
AL5
K37
N45
N49
BM36
BG51
1.0
1.0
1.0
2
2
2
U1O
PART 15 OF 16
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E5
VSS
VSS
D2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND 2
VSS
L5
VSS
E7
VSS
E9
VSS
G1
VSS
VSS
VSS
G5
VSS
VSS
VSS
VSS
VSS
J5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L1
VSS
VSS
VSS
VSS
VSS
VSS
L9
VSS
VSS
VSS
VSS
N5
VSS
VSS
VSS
BONAIRE
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
R1
VSS
AA10
VSS
R16
VSS
AT27
VSS
R20
VSS
R34
VSS
R38
VSS
AL43
VSS
BG53
VSS
AV31
VSS
AW31
VSS
R49
VSS
R5
VSS
T15
VSS
V20
VSS
T27
VSS
V34
VSS
T39
VSS
BE7
VSS
U10
VSS
U45
VSS
U49
VSS
U5
VSS
Y15
VSS
V21
VSS
V27
VSS
V33
VSS
Y39
VSS
W1
VSS
AC11
VSS
R43
VSS
W49
VSS
W5
VSS
J51
VSS
Y18
VSS
AT23
VSS
Y21
VSS
Y33
VSS
Y36
VSS
J27
VSS
BJ25
VSS
BL21
VSS
BE35
VSS
BA43
VSS
BK50
VSS
BK52
VSS
BJ17
VSS
BJ19
VSS
BJ21
VSS
BJ23
VSS
BB25
VSS
BB27
VSS
BB29
VSS
BJ31
VSS
BJ33
VSS
BJ35
VSS
BJ37
VSS
BJ39
VSS
BJ41
VSS
BJ43
VSS
BJ45
VSS
BJ49
VSS
BM50
VSS
BN43
VSS
BN29
VSS
BL43
VSS
BJ47
VSS
BN21
VSS
AR45
VSS
AU45
VSS
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
1
1
1
C
C
C
A
A
A
Page 11
R581
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
100R
5%
12
12
NS1
1 2
NS2
1 2
1
1
1
+VDDC
12
12
C549
C550
C551
22uF
22uF
22uF
4V
4V
4V
12
12
+
+
C554
C555
820uF
820uF
2.5V
2.5V
12
12
C563
C564
C565
22uF
22uF
22uF
4V
4V
4V
12
12
+
+
C568
C569
820uF
820uF
2.5V
2.5V
VDDC_LOC_P
11
VDDC_LOC_N
11
8
8
8
11
11
D D
D D
D D
+VDDC_I_VIN2
R611
1 2
1 2
12
4.7R 5%
C604
1uF
16V
11
VDDC_ISENN 2
11
VDDC_ISENN 1
11
VDDC_ISENP1
11
C503
FB_VDDC
VDDC_LOC_P
FB_VSSC
VDDC_LOC_N
VDDCI_LOC_N
VDDC_THERM_P
VDDC_THERM_N
R666
PERSTB_BUF
VDDC_I_PGOOD
NR604
10K 1%
NC606
8
8
8
11
R621
1 2
2.2R
12
12
5%0R
C645
82pF 50V
NR602
U602
4
BOOT
5
PWM
1
EN
8
VCC
RT9610BGQW
1uF
10V
0.1uF 16V
C9
1 2
10K 1%
1 2
11K 0.5%
12
16V0.1uF
R649
R655
NC605
1uF 25V
TH
9
AGND
C
C
C
10
IN
11
10
IN
11
12
IN
11
11
AGND
AGND
+5V
1,2,17
1 2
1 2
2.2R
NR643
IN
R10
16 11
NS555
1 2
1 2
0R 5%
5%0R
B B
B B
B B
VDDC_PWM3
11
A
A
A
11
11
11
R612
1%110K
11
VDDC_ISENP2
C504
16V0.1uF
VDDC_ISENN 3
R517
1 2
5%0R
12
1 2
R660
10K
1%
DNI
R625
1 2
5%0R
R504
1 2
100R 5%
R656
1 2
5%0R
R654
1 2
100R 5%
R518
1 2
100R 5%
R651
1 2
1%14K
12
R648
17.4K
1%
R519
1 2
0R 5%
1 2
1
2
NC7SZ08P5X
3
UGATE
2
PHASE
6
GND
7
LGATE
7
7
7
+5V
R633
1 2
12
2.2R 5%
C500
2.2uF
10V
VDDC_UG1
VDDC_PH1
VDDC_LG1
VDDC_LG2
VDDC_PH2
11
VDDC_UG2
C618
25V0.22uF
1 2
1 2
1K 1%
VDDC_ISENP3
11
C641
4.7pF 50V
R662
1%910K
C625
25V0.22uF
12
AGND
R590
DNI
5%0R
U590A
U601
1
UGATE2
R624
2
1 2
BOOT2
2.2R 5%
VDDC_PWM3
3
PWM3
4
TONSET
5
ISEN2P
R520
6
ISEN2N
1%1K
R521
7
ISEN1N
8
ISEN1P
9
ISEN3P
R11
10
1 2
ISEN3N
1K 1%
11
VSEN
12
FB
13
COMP
R663
1 2
1%19. 1K
RGND15IMON16V06417IMONA18VDDIO19PWROK20SVC21SVD22SVT23OFS24OFSA25SET126SET2
RT8880CGQW
14
C640
AGND
50V270pF
R628
1 2
1 2
1%21. 5K
12
R646
20.5K
1%
R522
1 2
0R 5%
C502
0.47uF
16V
+3.3V_BUS +1.8V
12
U590B
NC7SZ08P5X
3 5
4
VDDC_UG3 VDDC_UG3_CTL
VDDC_PH3
VDDC_LG3
7
7
7
47
48
50
51
PVCC
PHASE149LGATE1
LGATE252PHASE2
UGATE1
R623
VDDCI_THERM_P
1%8. 06K
VDDCI_THERM_N
R631
1 2
5%2. 2R
C590
0.1uF
16V
VDDC_PWROK
VDDC_LG33_FET
R551
1 2
0R 5%
12
C626
0.22uF
25V
12
R500
2.2R
5%
46
BOOT1
12
R550
1 2
0R 5%
R552
1 2
6
6
6
VDDCI_LG
VDDCI_PH1
R502
39
38
37
36
35
34
33
32
31
30
29
28
27
C643
0.1uF
10V
C501
0.1uF
10V
MDU1514U
100A
56789
123
VDDCI_UG
1 2
12
4.7R 5%
C611
1uF
16V
R511
1 2
0R 5%
R512
1 2
0R 5%
R513
1 2
0R 5%
R626
1 2
100K 1%
VCC5
OCP_L
VCC5
12
R630
20K
1%
DNI
12
R650
0R
5%
12
R620
0R
5%
AGND
AGND
SVT
SVD
SVC
12
R554
1R
5%
DNI
MDU1517
12
C3
3300pF
50V
DNI
12
C646
0.22uF
25V
12
R501
2.2R
5%
1 2
140K 1%
40
41
42
43
44
PWMA2
BOOTA1
PHASEA145LGATEA1
UGATEA1
TONSETA
PGOOD
PGOODA
EN
ISENA1P
ISENA1N
ISENA2N
ISENA2P
VSENA
FBA
COMPA
IBIAS
VCC
OCP_L
TH
53TH54TH55TH56
AGND
12
OUT
12
OUT
C622
2.2uF
10V
VDDC_LG3_FET
5%0R
100A
56789
Q531
4
123
6
6
6
12
AGND
12
12
R12
0R
5%
AGND
66.3A
56789
Q530
4
123
Q532
4
MDU1517
5 4 3
5 4 3
5 4 3
12
OUT
12
OUT
12
R503
1 2
1K 1%
12
R629
20K
1%
12
R647
0R
5%
12
R645
0R
5%
OUT
OUT
OUT
12
NS507
+VDDC_I_VIN2
R523
1 2
AGND
12
C21
10uF
16V
12
1 2
OUT
158K 1%
C642
2.2uF
10V
AGND
+3.3V_BUS
12
R514
10K
1%
C627
1.5pF 50V
R642
1 2
R618
1 2
2.2R 5%
R515
1 2
5%0R
12
C621
0.1uF
10V
5
16,5
5,16
12
C23
10uF
16V
L530
1 2
0.31uH
R555
1%1. 5K
5
5
5
C505
R643
+5V
+1.8V
12
12
C28
10uF
16V
0.47uF 16V
1 2
10
12
VDDC_I_PGOOD
16V0.1uF
1%10. 5K
R516
4.7K
5%
12
R659
120K
1%
12
R622
4.99K
1%
12
R613
13.3K
1%
12
R637
909R
1%
AGND
C20
R556
1%1. 5K
IN
IN
VDDC_I_EN
VCC5
12
C29
10uF
16V
12
NS508
VDDCI_ISEN P1
VDDCI_ISEN N1
AGND
12
R627
10K
1%
12
AGND
VDDC_ISENN 3
VDDC_ISENP3
DNI
C644
0.22uF
25V
AGND
FB_VDDCI
VDDCI_LOC_P
OUT
OUT
1 2
12
R635
412K
1%
12
R632
20.5K
1%
12
R636
475R
1%
12
R610
5.1R
5%
12
+VDDC_I_VIN1
C32
0.1uF
16V
R505
1 2
0R 5%
R506
1 2
5%100R
11,16
16
12
OUT
OUT
1 2
1 2
R639
1 2
5%0R
C628
50V82pF
12
C33
0.1uF
16V
11
11
12
+12V_BUS
12
+
R634
R524
R640
C1000
270uF
16V
12
1%10K
5%0R
1%10K
C34
22uF
4V
+5V
1 2
1 2
R1000 0R 5%
1 2
R1001 5%0R
12
C35
22uF
4V
VDDC INPUT
+12V_EXT
1 2
L1000 0.47uH
1 2
R6 0R 5%
1 2
R9 5%0R
VDDC_UG1
11
VDDC_PH1
11
VDDC_LG1
11
+VDDC_I_VIN1
L1001
0.47uH
12
OVERLAP
+
C1003
270uF
16V
VDDC_UG2 VDDC_UG2_CTL
11
VDDC_PH2
11
VDDC_LG2
11
+VDDC
12
12
12
+
C36
C37
C38
22uF
22uF
820uF
4V
4V
2.5V
OVERLAP
12
12
12
C542
C543
10uF
10uF
16V
16V
DNI
DNI
1 2
1 2
0R 5%
R5008
VDDC_LG12_FET
1 2
0R 5%
VDDC_THERM_P
11
VDDC_THERM_N
11
12
12
12
C556
C557
10uF
10uF
16V
16V
DNI
DNI
1 2
1 2
VDDC_LG22_FET
R5009
1 2
5%0R
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
VDDC
VDDC
VDDC
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:07 2015
Mon Mar 30 02:42:07 2015
Mon Mar 30 02:42:07 2015
DATE:
DATE:
DATE:
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTE
NOTE
NOTE
NOTES:
NOTES:
NOTES:
+VDDC_I_VIN2
12
+
12
C544
C545
10uF
10uF
16V
16V
R507
5%0R
R508
VDDC_LG1_FET
12
C558
C559
10uF
10uF
16V
16V
R509
5%0R
R510
5%0R
Q522
4
11 20
11 20
11 20
C1002
270uF
16V
12
C546
0.1uF
16V
VDDC_UG1_CTL
100A
4
12
C560
0.1uF
16V
VDDC_LG2_FET
100A
56789
123
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
56789
123
MDU1517
OF
OF
OF
Q512
MDU1517
56789
4
123
4
56789
4
123
4
2
2
2
66.3A
MDU1514U
Q510
L510
1 2
0.31uH
12
12
NS500
R529
56789
1R
5%
100A
DNI
R570
1 2
1.5K 1%
12
C506
3300pF
50V
DNI
123
Q511
MDU1517
PLACE CLOSE TO THE VDDC INDUCTOR (L510&L520)
66.3A
MDU1514U
Q520
L520
1 2
0.31uH
12
12
NS501
R530
56789
1R
5%
100A
DNI
R575
1 2
12
REV:
REV:
REV:
1%1. 5K
C507
3300pF
50V
DNI
1.0
1.0
1.0
2 14
2 14
2 14
123
Q521
MDU1517
12
12
NS505
C553
0.47uF 16V
R527
VDDC_ISENN 1
1 2
1.5K 1%
VDDC_ISENP1
12
R572
100K
1%
12
12
NS506
C567
0.47uF 16V
R528
VDDC_ISENN 2
1 2
1.5K 1%
VDDC_ISENP2
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
12
C547
C548
0.1uF
22uF
16V
4V
11
11
12
C561
C562
0.1uF
22uF
16V
4V
11
11
12
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
C
C
C
A
A
A
Page 12
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
7
7
7
6
6
6
5 4 3
5 4 3
5 4 3
2
2
2
1
1
1
D D
D D
D D
+VDDC_I_VIN2
INPUT FILTER & INPUT BULK CAPS LOCATED ON PWR MGT PAGE
12
12
12
12
12
12
12
12
C526
C527
C528
C529
0.1uF
2.2uF
16V
16V
VDDCI_UG
11
IN
VDDCI_PH1
11
IN
C
C
C
B B
B B
B B
VDDCI_LG
11
IN
VDDCI_THERM_P
11
IN
VDDCI_THERM_N
11
IN
C530
10uF
10uF
10uF
16V
16V
16V
DNI
DNI
R563
1 2
5%0R
R564
1 2
0R 5%
C531
10uF
16V
VDDCI_LG1_FET
+
C532
C540
0.1uF
270uF
16V
16V
66.3A
56789
4
123
100A
4
PLACE CLOSE TO THE VDDCI INDUCTOR
Q550
MDU1514U
56789
123
Q551
MDU1517
NL551
1 2
DNI
0.33uH
ML551
1 2
DNI
0.33uH
L551
1 2
0.33uH
12
12
NS502
R531
1R
5%
DNI
12
C508
3300pF
50V
DNI
R565
1 2
C539
1%1. 91K
R526
1 2
12
R567
100K
1%
12
12
12
NS503
16V0.47uF
1%1. 05K
VDDCI_ISEN N1
VDDCI_ISEN P1
12
C534
C535
C536
0.1uF
22uF
22uF
16V
4V
4V
11
OUT
11
OUT
+VDDCI
12
12
C537
C538
22uF
22uF
4V
4V
NS504
1 2
12
12
+
+
C578
C541
470uF
820uF
2V
2.5V
VDDCI_LOC_P
12
R566
100R
5%
NS509
1 2
VDDCI_LOC_N
11
OUT
11
OUT
C
C
C
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
1.0
1.0
1.0
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
A
A
A
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
A
A
A
8
8
8
7
7
7
6
6
6
5
5
5
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
VDDCI
VDDCI
VDDCI
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:08 2015
Mon Mar 30 02:42:08 2015
Mon Mar 30 02:42:08 2015
DATE:
DATE:
DATE:
12 20
12 20
NOTE
NOTE
NOTE
12 20
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
OF
OF
OF
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
REV:
REV:
REV:
Page 13
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
7
7
7
6
6
6
5 4 3
5 4 3
5 4 3
2
2
2
1
1
1
D D
D D
D D
C
C
C
R709
1 2
2.2R
1 2
MVDD_BOOT
R705
40.2K
12
10
R715
NC
1%
B B
B B
B B
13
MVDD_LGATE_CTR
13
MVDD_UGATE_CTR
1 2
13
1
BOOT
2
UGATE
3
OCSET
4
LGATE5VCC
GND
9
GND
GS7256-ASO
MVDD_PHASE
C705
0.1uF
16V
U701
8
PHASE
7
COMP/EN
6
FB
GND
GND
12
12
C703
0.22uF
11
25V
805
C711
1 2
MVDD_EN
2.7nF
10V
1 2
MVDD_FB
R707
12
2.2R
805
+12V_EXT
IN
R712
24.9K
C712
150pF
50V
13
13
16
Type III Compensation
12
1%
R713
1 2
1.5K
1%
R711
1 2
RFB1
OUT
MVDD_UGATE_CTR
MVDD_LGATE_CTR
10K
1%
C713
16
3.3nF
16V
+12V_EXT
1 2
13
12
MVDD_SV
MVDD INPUT
1 2
L1002 0.47uH
1 2
R1002 5%DNI
1 2
R1003 5%DNI
R701
MVDD_UGATE
0R
R703
1 2
0R
603
R700
0R
OVERLAP
MVDD_PHASE
MVDD_LGATE
13
12
+MVDD
+MVDD
12
MVDD_FB_TRACE
NS_VIA
Sense Point
4
NS700
+MVDD_SOURCE
4
+MVDD_Source
56789
123
56789
123
MQ701
MDV1524
24A
MQ703
MDV1524
12
12
C715
C716
DNI
10uF
16V
16V
24A
12
R719
2.2R
12
C708
1500pF
16V
12
C717
DNI
16V
1 2
12
C719
DNI
16V
L701
1.0uH
12
12
C718
0.15uF
+
C730
16V
100uF
16V
+MVDD
+MVDD
13
12
12
12
C724
DNI
+
C726
4V
820uF
2.5V
13
12
C725
DNI
10V
12
+
C723
C732
DNI
470uF
4V
2V
+MVDD
+MVDD
12
C728
C727
DNI
DNI
50V
10V
1 2
C
C
C
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
1.0
1.0
1.0
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
A
A
A
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
A
A
A
8
8
8
7
7
7
6
6
6
5
5
5
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
MVDD
MVDD
MVDD
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:08 2015
Mon Mar 30 02:42:08 2015
Mon Mar 30 02:42:08 2015
DATE:
DATE:
DATE:
13 20
13 20
NOTE
NOTE
NOTE
13 20
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
OF
OF
OF
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
REV:
REV:
REV:
Page 14
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
7
7
7
6
6
6
5 4 3
5 4 3
5 4 3
2
2
2
1
1
1
D D
D D
D D
12
12
C801
C802
0.95V
0.95V
1uF
12
R806
10K
0.95V
C
C
C
16
IN
+12V_EXT
1 2
R840 0R 5%
B B
B B
B B
+0.95V_Source
12
12
C810
C809
10uF
10uF
16V
16V
0.95V
0.95V
+0.95V_EN
+3.3V_BUS
12
R801
5.49K
1%
0.95V
12
C807
0.1uF
10V
0.95V
12
C808
4.7uF
16V
0.95V
12
C806
0.15uF
16V
0.95V
12
R803
10K
0.95V
12
C804
0.01uF
10V
0.95V
12
R805 2.2R0.95V
R804
100K
1%
0.95V
12
1 2
R807
10K
0.95V
APW8713AQBI
U801
0.95V
+0.95V_LDO
22
23
SS
VIN
1
POK
2
EN
3
PFM
4
AGND
5
FB
6
TON
LDOIN8VIN9VIN
7
+0.95V_LDOIN
12
C805
1uF
16V
0.95V
0.1uF
6.3V
6.3V
L801
1 2
1 2
2.2uH
ML801 2.2uH
1 2
0.95V
1 2
C811 0.95V 0.0033uF 50V
12
C819
470pF
50V
0.95V
C899
1 2
0.95V
1uF
6.3V
FBR7
1 2
R809 0.95V 0.1%1K
+0.95_FB
+0.95V
+0.95V
12
12
12
C812
C813
C814
22uF
22uF
22uF
10V
10V
0.95V
10V
0.95V
0.95V
NS801
1 2
16
IN
+ C815
12
560uF
2.5V
0.95V
+0.95V
12
12
C817
0.015uF
10V
0.95V
12
C818
390pF
50V
0.95V
C816
0.1uF
10V
0.95V
+0.95V_PG
C803
0.95V
0.1uF 25V
18LX19
20
21
LDO
PGND
BOOT
17
LX
16
LX
15
PGND
14
PGND
13
PGND
12
PGND
LX
10LX11
OUT
R808 1%0.95V 68.1K
C
C
C
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
1.0
1.0
1.0
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
A
A
A
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
A
A
A
8
8
8
7
7
7
6
6
6
5
5
5
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
0.95V REG
0.95V REG
0.95V REG
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:08 2015
Mon Mar 30 02:42:08 2015
Mon Mar 30 02:42:08 2015
DATE:
DATE:
DATE:
14 20
14 20
NOTE
NOTE
NOTE
14 20
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
OF
OF
OF
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
REV:
REV:
REV:
Page 15
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
7
7
7
6
6
6
5 4 3
5 4 3
5 4 3
2
2
2
1
1
1
D D
D D
D D
5V REGULATOR
+12V_BUS +5V
MC78M05CDT
U400
1
IN
GND
TAB
2
4
MREG1
3
IN
ADJ
1
Pin out: 1-G/AD J, 2-O,3-I
OUT
TAB
4
12
C400
1uF
1.8V REGULATOR
C
+3.3V_BUS
+3.3V_BUS
1.8V_PGOOD
15,16
OUT
1.8V_EN
16,1,15
IN
B B
B B
B B
12
C304
0.1uF
6.3V
DNI
1.8V_PGOOD
16 15
1.8V_EN 1.8V_FB
+5V
15
+5V
+5V
15
12
12
C305
C306
10uF
1uF
6.3V
10V
C
C
MU300
1
POK
2
EN
3
VIN
4
CNTL5NC
UP0104PDC8
OVERLAP U300 AND MU300
U300
1
POK
2
EN
3
VIN
4
VDD5NC
GS7103-A
PROVIDE 50 TO 70 MM SQ.
COPPER AREA F OR COOLIN G
THMPAD
8
GND
7
FB
+1.8V
6
VOUT
9
GND
DNI
8
GND
1.8V_FB
7
15
FB
+1.8V
6
15
VOUT
9
15 15 1 16
15
12
12
R301
C300
12.7K
33pF
1%
50V
12
R300
10K
1%
VOUT = VREF x (1 + R301/R300)
VREF = 0.8V
+1.8V
12
12
12
C301
C302
C303
10uF
10uF
0.1uF
6.3V
6.3V
6.3V
DNI
16V
SPX1117M3
12
R401
0R
5%
3
12
C425
1uF
16V
2
OUT
1 2
200mA
+5V
+5V_VESA
F400
24V
12
C401
1uF
10V
C
C
C
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
1.0
1.0
1.0
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
A
A
A
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
A
A
A
8
8
8
7
7
7
6
6
6
5
5
5
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SMALL RAIL REGULATORS
SMALL RAIL REGULATORS
SMALL RAIL REGULATORS
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:09 2015
Mon Mar 30 02:42:09 2015
Mon Mar 30 02:42:09 2015
DATE:
DATE:
DATE:
15 20
15 20
NOTE
NOTE
NOTE
15 20
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
OF
OF
OF
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
REV:
REV:
REV:
Page 16
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
7
7
7
6
6
6
5 4 3
5 4 3
5 4 3
2
2
2
1
1
1
D D
D D
D D
+12V_EXT
J1000
1
+12V
2
+12V
3
+12V
12
C22
10uF
16V
4
GND
6
GND
5
Sense
C
C
C
B B
B B
B B
POWER_HEADER
INPUT POWER SEQUENCE
12
C26
47pF
50V
+12V_BUS
12
R1010
11.3K
1%
12V_BUS_UP
12
R1011
+12V_EXT
1K
1%
12
R1012
11.3K
1%
12V_EXT_UP
12
R1013
1K
1%
+3.3V_BUS
12
R1014
5.11K
1%
INPUT_UP_B
6
Q1010A
2
MMDT3904-7
1
3
Q1010B
5
MMDT3904-7
4
3
1 2
CTF_OUT
5,17
IN
R221 2. 2K 5%
VOLTAGE CONTROL
Q210B
5
MMDT3904-7
4
6
Q210A
2
12
MMDT3904-7
C1010
1
0.1uF
16V
+3.3V_BUS
12
R1020
10K
5%
1.8V_EN
INTERNAL CTF L ATCH - 1.8V V DDCT REQUIRED
ENABLE THRES HOLD
+1.8V: >1.4 V
+0.95V: FLO AT
+VDDC/+VDDCI: >2.0V
1,15
OUT
BUS RAILS (3.3V /12V UP) -> +1.8 V -> 0.95V -> VDDC/VDDCI -> MVDD
+MVDD: FLOAT
POWER UP SEQUENCE
15
IN
1.8V_PGOOD
+3.3V_BUS
12
R1021
10K
5%
1 2
R1022 0R 5%
+0.95V
1 2
R1034 5.1K 5%
+3.3V_BUS
12
VDDC_I_PGOOD
11
IN
+12V_EXT
12
R1023
10K
5%
6
Q1020A
2
12
MMDT3904-7
C1020
1
1uF
6.3V
DNI
+12V_EXT
12
R1035
10K
5%
6
Q1021A
2
12
MMDT3904-7
C1021
1
1uF
6.3V
+12V_EXT
12
R1032
10K
R1030
10K
5%
5%
Q1030
1
12
2N7002
C1030
2 3
1uF
6.3V
DNI
R1024 5%5.1K
R1025
2,17
IN
IN BACO MODE
TURN OFF
VDDC, VDDCI AND MVDD
1 2
1 2
PX_EN
5%5.1K
DNI
1 2
R1027 10K 5%
3
Q1020B
5
MMDT3904-7
4
3
Q1021B
5
MMDT3904-7
4
3
Q1022B
5
MMDT3904-7
4
+3.3V_BUS
12
+0.95V_EN
12
R1026
10K
5%
VDDC_I_EN
6
Q1022A
2
MMDT3904-7
1
R1028
10K
5%
DNI
MVDD_EN
14
OUT
11
OUT
13
OUT
C
C
C
+1.8V
12
12
R1050
R1052
10K
10K
5%
SVC
5,11
5,11
BI
SVD
11,5
11,5
IN
+0.95_FB
A
A
A
8
8
8
7
7
7
12
OUT
R830
52.3K
1%
RFB2
5%
12
12
R1051
R1053
10K
10K
5%
5%
14
6
6
6
BI
OUT
SVI2 POWER UP VOL TAGE (VDDC/VDDCI)
SVC SVD
0
0
0
1
0
1
1
1
MVDD_FB
12
R714
6.65K
1%
RFB2
5
5
5
VOLTAGE
1.1V
1.0V
0.9V
0.8V
13
OUT
+MVDD OUTPUT VOLTAGE
VOUT = VREF * (1+ RFB/RFB2)VREF = 0.8V
RFB2 = (RFB * VREF) / (VOUT - VREF)
VREF = 0.6V
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
POWER MANAGEMENT
POWER MANAGEMENT
POWER MANAGEMENT
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:09 2015
Mon Mar 30 02:42:09 2015
Mon Mar 30 02:42:09 2015
DATE:
DATE:
DATE:
16 20
16 20
NOTE
NOTE
NOTE
16 20
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
1.0
1.0
OF
OF
OF
1.0
REV:
REV:
REV:
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
A
A
A
Page 17
Q252
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
AO3415L
FAN_PWM
TACH
FANOUT_P
FANOUT_N
12
R253
0R
5%
DNI
1 2
R264 5%2.2K
+12V_EXT
12
B201
220R
1
1
1
HEADER_1X2_SHROUDED
+12V_EXT
12
B200
220R
12
C201
10uF
16V
CTF_OUT
J200
4
3
2
1
HEADER_1X4_SHROUDED
MJ200
1
2
5
8
8
8
+1.8V
D D
D D
D D
U1P
AW21
12
TSVDD
C200
1uF
6.3V
AW20
TSVSS
BC19
TS_A
CRITICAL TEMPERATURE FAULT
FM1
1
SW_FB
FM2
1
SW_FB
C
C
C
FM3
1
SW_FB
FM4
1
SW_FB
HEATSINKS
B B
B B
B B
A
A
A
FM5
1
SW_FB
FM6
1
SW_FB
TEMPORARY
Verde_Fansink
HS1A
9
1234567
8
Verde_Fansink
HS2A
9
1234567
8
8
8
8
7
7
7
PART 16 OF 16
BD25
DPLUS
BC25
DMINUS
TSS FDO
BONAIRE
GPIO_28_FDO
GPIO_28_FDO
BD27
1 2
R200 5%20K
12
R210
10K
5%
DNI
Verde_Fansink
HS1B
1011121314
Verde_Fansink
HS2B
1011121314
Verde_Fansink
HS1C
16
17
15
1819202122
Verde_Fansink
16
17
15
1819202122
7
7
7
Verde_Fansink
HS1D
24
25
23
2627282930
31
HS2C
Verde_Fansink
HS2D
24
25
23
2627282930
31
6
6
6
PWM
1 2
R236 5%2.2K
12
R237
1K
5%
TO MAXI MIZE FAN OUTPUT
DURING CTF TRIGGER
CTF_OUT
32
OUT
32
6
6
6
5 4 3
5 4 3
5 4 3
CTF_FAN
1
2 3
5,16,17
BRACKET
BKT1
BRACKET
8020058600G
8020058 600G
SS - DP W TAB, HDM I, SINGLE DVI
8020056 20AG
DS - DP W TAB, HDMI, SINGLE DVI
BRACKET MT HOLE
MT200
2
34567
NA
9
8
5
5
5
Q232
MMBT3904
SCREW201
SCREW
PWM_B
Q200
1
MMBT3904
2 3
17
OUT
FOR 4-WIRE FAN
FOR 2-WIRE FAN
2,16,17
+3.3V_BUS
12
R201
5.1K
5%
+12V_EXT
12
R211
2.61K
1%
+3.3V_BUS
5
234
74LVC1G04GW
TO SHUTDOWN FAN IN BACO
IN
1 2
R202 5%1K
1 2
C272 6.3V0.1uF
QB_OUTQ_OUT
U202
FAN_EN
17
PX_EN
2,16,17
IN
PERSTB_BUF
1,2,11
IN
1 2
PX_EN
R257 20K 5%
1
1 2
R212 10K 5%
1 2
C254 1uF 16V
1 2
1N4148W
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHEET:
SHEET:
SHEET:
DATE:
DATE:
DATE:
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
2
Q250A
MMDT3904-7
+3.3V_BUS
12
R203
10K
5%
DNI
5
OUT
Q201
MMBT3904
2 3
+12V_EXT
12
R214
5.1K
5%
D201
1 2
12
BAT54KFILM
R215
6.8K
5%
PFB
12
12
C202
R213
1uF
1M
16V
5%
12
R262
Mon Mar 30 02:42:09 2015
Mon Mar 30 02:42:09 2015
Mon Mar 30 02:42:09 2015
17 20
17 20
17 20
100K
5%
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
D250
MECH AND THERM MANAGEMENT
MECH AND THERM MANAGEMENT
MECH AND THERM MANAGEMENT
NOTE
NOTE
NOTE
+3.3V_BUS
1
12
R267
10K
5%
6
1
OF
OF
OF
GPIO_6_TACH
Q255
2N7002
2 3
12
MR271
0R
5%
DNI
FAN_EN
17
12
C255
0.1uF
6.3V
DNI
Q_OUT
17
1 2
R205 1K 1%
12
R204
3.83K
1%
+12V_EXT
12
R216
1K
5%
1
2
Q202A
6
MMDT3906
12
R218
10K
5%
U201
1
A
2
B
3
CLR
4
GND5Q
SN74LVC1G123DCT
1 2
R260 20K 5%
4
Q202B
3
REV:
REV:
REV:
5
MMDT3906
Rext/Cex t
+12V_EXT
+3.3V_BUS
8
VCC
7
6
Cext
5
12
R206
10K
5%
12
R217
1M
5%
23
1
1.0
1.0
1.0
2
2
2
12
C270
0.1uF
6.3V
1 2
C271 6.3V10uF
Q_OUT
2
3
Q250B
MMDT3904-7
4
4
Q204
BCP68
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
17
2014
2014
2014
12
12
6
1
R256
20K
5%
R255
20K
5%
Q251A
MMDT3904-7
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
R270 1%499K
17
Q251B
MMDT3904-7
1 2
C203 DNI1uF 16V
1N4148W
1 2
12V_FAN
3
4
12
D270
R219
0R
5%
+3.3V_BUS
12
DNI
23
1
CTF_BACO
5
HEADER IS 2MM
IT DOES NOT FOLLOW
2.54MM SPACING AS 4-PI N
PWM FAN SPECIFICAT ION
DNI
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
16 17
C
C
C
A
A
A
Page 18
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
JTAG
U1A
PART 1 OF 16
BONAIRE
JTAG_TDO
BH47
JTAG_TDO
JTAG_TDI
BG48
JTAG_TDI
JTAG_TM S
BE47
JTAG_TMS
JTAG_TCK
BG45
JTAG_TCK
JTAG
TESTEN
BH45
TESTEN
BG49
JTAG_TRSTB
JTAG_TRSTB
HEADER_RECEPT_2X4
R4003 1K 5%
R4000 DNI1K 5%
J4004
7 8
5 6
3 4
1 2
1 2
1 2
+3.3V_BUS
+3.3V_BUS
+3.3V_BUS
12
R4001
1K
5%
DNI
12
R4002
1K
5%
J2
X_PIN1*2
TOP
Single end
RGB
50 ohm +/- 10%
0.102mm
4.02 mils
J3
X_PIN1*2
L3
Single end
Memory
48 ohm +/- 5 ohm
0.11mm
4.33 mils
J4
X_PIN1*2
Bottom
Single end
Memory
48 ohm +/- 5 ohm
0.11mm
4.33 mils
J5
341
2
impedence
TOP
Different
TMDS
80 ohm +/- 10 %
0.11 mm / 0.16 mm
4.33 mils / 6.3 mils
L3
Different
Memory clock
80 ohm +/- 10 %
0.11 mm / 0.16 mm
4.33 mils / 6.3 mils
J6
341
2
impedence
J7
341
2
impedence
Bottom
Different
PCIE
85 ohm +/- 10 %
0.112 mm / 0.188 mm
4.41 mils / 7.04 mils
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
DEBUG CIRCUITS
DEBUG CIRCUITS
DEBUG CIRCUITS
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:10 2015
Mon Mar 30 02:42:10 2015
Mon Mar 30 02:42:10 2015
DATE:
DATE:
DATE:
18 20
18 20
NOTE
NOTE
NOTE
18 20
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
1.0
1.0
OF
OF
OF
1.0
REV:
REV:
REV:
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
Page 19
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
7
7
7
6
6
6
5 4 3
5 4 3
5 4 3
2
2
2
1
1
1
D D
D D
D D
DP
+3.3V_DP
HDMI
C
C
C
+5V_VESA
DVI-I
+5V_VESA
B B
B B
B B
DEBUG TP
AC CAPS
AC CAPS
TERMINATIONS
TERMINATIONS
RGB FILTERS
DVO
DVPDATA[15:0]
DVPCNTL_0
MEMORY
CHA/B
CHA/B GDDR5 4pcs x32
JTAG
JTAG
DEBUG
HEADER
TMDPC
DDCAUX1
HPD2
POWER DELIVER Y
TMDPB
DDCAUX4
HPD1
TOBAGO
M3
THERM
XTALIN/OUT
TS_FDO
GPIO6
GPIO19
XO_IN/2
PX_EN
BACO
FAN SPEED
BUILT-IN PWM
TACH INPUT
CTF
27M
CRYSTAL
CONTROL
PCI-E TOBAGO GDDR5 4pcs. x32
DP HDM DL-DVI FH 4L 5.7"
STRAPS
EEPROM
VBIOS/UEFI
TMDPEFAC CAPS
DDCAUX6
HPD6
CRTDAC
HSYNC/ VSYNC
MLPS
GPIO8/9/10/22
PCI-E x16
FAN
VOLTAGE REGULATORS
FROM +12V_BUS
+VDDC, +VDD CI, +MVDD, +5V, FAN
FROM +3.3V_BUS
+1.8V, +0.95V, +3.3V_D P, VDDR 3
FROM +VDDC (SMPS)
VDDC
FROM +VDDCI (SMPS)
VDDCI
FROM +MVDD (SMPS)
VDDR1, MVDD Q/C
FROM +0.95V (SMPS)
PCIE_VDDC, BIF_VDD C, DP_VD DC
SPLL_VDDC
FROM +1.8V (LDO)
PCIE_PVDD, VDD_CT, VD DR4
DP_VDDR, SPLL_PVDD, MPLL_PVDD
VDD1DI, AVDD, TSVDD
POWER ENABLE
SEQUNCING
C
C
C
+12V_BUS
+3.3V_BUS
PCI-EXPRESS BUS
A
A
A
8
8
8
7
7
7
6
6
6
5
5
5
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
SHEET:
SHEET:
SHEET:
Mon Mar 30 02:42:10 2015
Mon Mar 30 02:42:10 2015
Mon Mar 30 02:42:10 2015
DATE:
DATE:
DATE:
19 20
19 20
NOTE
NOTE
NOTE
19 20
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
3
3
3
SHEET NUMBER:
SHEET NUMBER:
SHEET NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
DOCUMENT NUMBER:
NOTES:
NOTES:
NOTES:
OF
OF
OF
REV:
REV:
REV:
1.0
1.0
1.0
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
is provided only to entitie s under a non-dis closure agreemen t with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
for evaluation purposes. Further dis tribution or dis closure i s strictl y
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
prohibited. Use of this schema tic and des ign for any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
evaluation requires a Board T echnology Li cense Agreeme nt with AMD.
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
AMD makes no representations or warranties of a ny kind regarding this
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
schematic and design, i ncluding , not limit ed to, any implie d warranty
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
of merchantability or fitnes s for a particu lar purpose, and di sclai ms
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
responsibili ty for any consequences resulting f rom use of the
information incl uded herein.
information incl uded herein.
information incl uded herein.
TITLE:
TITLE:
TITLE:
2 14
2 14
2 14
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
A
A
A
Page 20
8
MSI CONFIDENTIAL
00017967 jonepei(裴亮樂)
RD(C)2017052601 RMA工程課
石阿鋒 (00068760)
8
8
TITLE:
TITLE:
AMD
AMD
AMD
REVISION HISTORY
REVISION HISTORY
REVISION HISTORY
PCB
SCH
PCB
SCH
PCB
SCH
Rev
Rev
Rev
D D
D D
D D
Date
Date
Date
Rev
Rev
Rev
TITLE:
INITIAL DESI GN00A 02/10/20150
ENGINEER:
ENGINEER:
ENGINEER:
7
7
7
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
TOBAGO G5 4X32bit
PEAK, DONG
PEAK, DONG
PEAK, DONG
NOTES:
NOTES:
NOTES:
6
6
6
DOCUMENT NUMBER: SHEET NUMBER:
DOCUMENT NUMBER: SHEET NUMBER:
DOCUMENT NUMBER: SHEET NUMBER:
NOTE
NOTE
NOTE
5 4 3
5 4 3
5 4 3
105_C936xx_00A
105_C936xx_00A
105_C936xx_00A
REVISION DESCRIPTON
REVISION DESCRIPTON
REVISION DESCRIPTON
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and is provided only to entiti es under a non-dis clos ure agreement with AMD
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and is provided only to entiti es under a non-dis clos ure agreement with AMD
This AMD Board sch ematic and de sign is the exclusi ve property of AMD, and is provided only to entiti es under a non-dis clos ure agreement with AMD
for evaluation purposes. Further dis tribution or dis closure i s strictl y prohibited. Use of this sc hematic and design fo r any purpose other than
for evaluation purposes. Further dis tribution or dis closure i s strictl y prohibited. Use of this sc hematic and design fo r any purpose other than
for evaluation purposes. Further dis tribution or dis closure i s strictl y prohibited. Use of this sc hematic and design fo r any purpose other than
evaluation requires a Board T echnology Li cense Agreeme nt with AMD. AMD makes no representations or warranties of any kind regarding th is
evaluation requires a Board T echnology Li cense Agreeme nt with AMD. AMD makes no representations or warranties of any kind regarding th is
evaluation requires a Board T echnology Li cense Agreeme nt with AMD. AMD makes no representations or warranties of any kind regarding th is
schematic and design, i ncluding , not limit ed to, any implie d warranty of merchantabilit y or fitness for a partic ular purpose, and discl aims
schematic and design, i ncluding , not limit ed to, any implie d warranty of merchantabilit y or fitness for a partic ular purpose, and discl aims
schematic and design, i ncluding , not limit ed to, any implie d warranty of merchantabilit y or fitness for a partic ular purpose, and discl aims
responsibili ty for any consequences resulting f rom use of the info rmation incl uded herein.
responsibili ty for any consequences resulting f rom use of the info rmation incl uded herein.
responsibili ty for any consequences resulting f rom use of the info rmation incl uded herein.
Wed Feb 11 05:56:21 2015 1.0
Wed Feb 11 05:56:21 2015 1.0
Wed Feb 11 05:56:21 2015 1.0
DATE:
DATE:
DATE:
2014
2014
2014
Advanced Micro Devices
Advanced Micro Devices
Advanced Micro Devices
C
C
C
2
2
2
20
20
20
20
20
20
OF
OF
OF
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
SHANGHAI, CHINA 201203
1
1
1
REV:
REV:
REV:
C
C
C
B B
B B
B B
A
A
A
C
C
C
A
A
A
8
8
8
7 6
7 6
7 6
5
5
5
4
4
4
3
3
3
2
2
2
1
1
1
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