Page 1
A B
smd.db-x7.ru
D
HGFEC
PG301 A02
1
Comanche 192b GDDR5, <150W, 2-way SLI
Tall DVI-I + DP + DP + DP/HDMI + DP
TABLE OF CONTENTS
Page
Description
Page
1
Table of Contents
2
Block Diagram
3
PCI Express
4
MEMORY: GPU Partition A/B
5
2
3
4
MEMORY: FBA[31:0]
6
MEMORY: FBA[63:32]
7
MEMORY: FBB[31:0]
8
MEMORY: FBB[63:32]
9
MEMORY: GPU Partition C
10
MEMORY: FBC[31:0]
11
MEMORY: FBC[63:32]
12
GPU PWR and GND
13
GPU Decoupling
14
DACA Interface
15
IFPAB DVI-I-DL
16
IFPEF with IFPE DP
17
IFPF DP
18
IFPC HDMI/DP
19
IFPD DP
20
MIOA
21
MISC1: Fan, Thermal, JTAG, GPIO
22
MISC2: ROM, XTAL, Straps
23
PS: 5V, PEX_VDD, VID_PLL
24
PS: FBVDD/Q
25
PS: NVVDD Controller OVR4 option
Description
PS: NVVDD Phase 1,2
26
PS: NVVDD Phase 3,4
27
[RESERVED]
28
29
PS: NVVDD OVR2+1 option
PS: Inputs, Filtering, and Monitoring
30
31
PS: Sequence and Shutdown
32
LEDs
PS: IOVDD Regulator
33
34
MECH: Bracket/Thermal
Note:
1 page:4-11 修改net name,加<>
2 page:8 增加跨頁符號
3 page:15 修改DVI footprint
4 page:16/17/19 修改DP footprint
5 page:18 修改HDMI footprint
6 page:26/27 修改output chike footprint
1
2
3
4
5
ASSEMBLY
BASE LEVEL GENE RIC SCHEMATIC ONLY
PAGE DETAIL
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAINK NOWNA ND UNKNOWN VIOLATIONS OR DEVIA TIONS OFI NDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKESNO WARRA NTIES, E XPRESSE D, IMPLIED, STAT UTORY OR OTHERWISE WITH RESPECT TOT HE MATERIALS OROTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
A B D F
Table of Contents
EC
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
01_Table of Cont ents
01_Table of Cont ents
01_Table of Cont ents
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
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MS-V320
MS-V320
MS-V320
5
10
10
10
Sheet ofDate:
1 34
Sheet ofDate:
1 34
Sheet ofDate:
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Page 2
Block Diagram
smd.db-x7.ru
A B C D E F G H
1
SLI/
2
3
DP
HDMI/
DP
QD:FRAME LOCK
DP
C
MEM MEM MEM B
LO
C
HI
LO
MEM
MEM
B
HI
A
LO
Power Supply
NVVDD-PH4
Power Supply
NVVDD-PH3
Power Supply
NVVDD-PH2
Power Supply
NVVDD-PH1
Power Supply
5V Linear
Power Supply
FBVDD/FBVDD Q
MEM A
DVI-I
DP
4
QD:STEREO
QUADRO OPTIONS SHOWN IN YELLOW
and prefix "QD:"
HI
PEX_VDD
LDO
VID_PLL
LDO
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAINK NOWNA ND UNKNOWN VIOLATIONS OR DEVIA TIONS OFI NDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKESNO WARRA NTIES, E XPRESSE D, IMPLIED, STAT UTORY OR OTHERWISE WITH RESPECT TOT HE MATERIALS OROTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
ASSEMBLY
PAGE DETAIL
BASE LEVEL GENE RIC SCHEMATIC ONLY
Block Diagram
Fan
FDBA
EXT_12V 2x3 PWR 1
(NORTH)
PEX_12V Finger
PEX_3V3 Finger
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
G
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
02_Block Diagram
02_Block Diagram
02_Block Diagram
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
2 34
2 34
2 34
1
2
3
4
5
10
10
10
Page 3
A B C D E F G H
smd.db-x7.ru
PCI Express
1
2
3
4
3V3
XXXV32010
12
12
4.7uF
20%
X5R
0603
COMMON
C817
C822
GND
5
ALLNV IDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS,FILES , DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE INGP ROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
12V
NONPH Y-X16
NONPHY-X16
CON_X1 6
COMMON
@electro_mechanic.c on_pc i_expr ess( sym_1 ):page3_ i662
B1
+12V
B2
+12V
A2
+12V
A3
+12V
B3
PEX_PRSNT*
+12V/RSVD
B8
+3V3
A9
+3V3
A10
+3V3
B10
+3V3AUX
A1
PRSNT1
B17
PRSNT2
B12
RSVD
B4
GND
A4
GND
B7
GND
A12
GND
B13
GND
A15
GND
B16
GND
B18
GND
A18
GND
GND
END OF X1
B31
PRSNT2
A19
RSVD
B30
RSVD
A32
RSVD
A20
GND
B21
GND
B22
GND
A23
GND
A24
GND
B25
GND
B26
GND
A27
GND
A28
GND
B29
GND
A31
GND
B32
GND
END OF X4
B48
GND
PRSNT2
A33
RSVD
A34
GND
B35
GND
B36
GND
A37
GND
A38
GND
B39
GND
B40
GND
A41
GND
A42
GND
B43
GND
B44
GND
A45
GND
A46
GND
B47
GND
B49
GND
A49
GND
END OF X8
GND
B81
PRSNT2
A50
RSVD
B82
RSVD
A51
GND
B52
GND
B53
GND
A54
GND
A55
GND
B56
GND
B57
GND
A58
GND
A59
GND
B60
GND
B61
GND
A62
GND
A63
GND
B64
GND
B65
GND
A66
GND
A67
GND
B68
GND
B69
GND
A70
GND
A71
GND
B72
GND
B73
GND
A74
GND
A75
GND
B76
GND
B77
GND
A78
GND
A79
GND
B80
GND
A82
GND
GND
END OF X16
XXXV32010
CN2
XXXV32010
0.1uF
10%
X7R
0402
COMMON
TRST* JTA G1
TCLK JT AG2
TDI JTA G3
TDO JTAG4
TMS JTAG5
B9
A5
A6
A7
A8
B5
SMCLK
B6
SMDAT
B11
WAKE
A11
PERST
A13
REFCLK
A14
REFCLK
A16
PERP0
A17
PERN0
B14
PETP0
B15
PETN0
A21
PERP1
A22
PERN1
B19
PETP1
B20
PETN1
A25
PERP2
A26
PERN2
B23
PETP2
B24
PETN2
A29
PERP3
A30
PERN3
B27
PETP3
B28
PETN3
A35
PERP4
A36
PERN4
B33
PETP4
B34
PETN4
A39
PERP5
A40
PERN5
B37
PETP5
B38
PETN5
A43
PERP6
A44
PERN6
B41
PETP6
B42
PETN6
A47
PERP7
A48
PERN7
B45
PETP7
B46
PETN7
A52
PERP8
A53
PERN8
B50
PETP8
B51
PETN8
A56
PERP9
A57
PERN9
B54
PETP9
B55
PETN9
A60
PERP10
A61
PERN10
B58
PETP10
B59
PETN10
A64
PERP11
A65
PERN11
B62
PETP11
B63
PETN11
A68
PERP12
A69
PERN12
B66
PETP12
B67
PETN12
A72
PERP13
A73
PERN13
B70
PETP13
B71
PETN13
A76
PERP14
A77
PERN14
B74
PETP14
B75
PETN14
A80
PERP15
A81
PERN15
B78
PETP15
B79
PETN15
VVVV32010
0ohm
1 2
0402
COMMON
PEX_TRST*
PEX_TCLK
R118
PEX_TDI
PEX_TDO
PEX_TMS
PEX_SMCLK
PEX_SMDAT
PEX_RST*
PEX_REFCLK
PEX_REFCLK*
PEX_TXX0
PEX_TXX0*
PEX_RX0
PEX_RX0*
PEX_TXX1
PEX_TXX1*
PEX_RX1
PEX_RX1*
PEX_TXX2
PEX_TXX2*
PEX_RX2
PEX_RX2*
PEX_TXX3
PEX_TXX3*
PEX_RX3
PEX_RX3*
PEX_TXX4
PEX_TXX4*
PEX_RX4
PEX_RX4*
PEX_TXX5
PEX_TXX5*
PEX_RX5
PEX_RX5*
PEX_TXX6
PEX_TXX6*
PEX_RX6
PEX_RX6*
PEX_TXX7
PEX_TXX7*
PEX_RX7
PEX_RX7*
PEX_TXX8
PEX_TXX8*
PEX_RX8
PEX_RX8*
PEX_TXX9
PEX_TXX9*
PEX_RX9
PEX_RX9*
PEX_TXX10
PEX_TXX10*
PEX_RX10
PEX_RX10*
PEX_TXX11
PEX_TXX11*
PEX_RX11
PEX_RX11*
PEX_TXX12
PEX_TXX12*
PEX_RX12
PEX_RX12*
PEX_TXX13
PEX_TXX13*
PEX_RX13
PEX_RX13*
PEX_TXX14
PEX_TXX14*
PEX_RX14
PEX_RX14*
PEX_TXX15
PEX_TXX15*
PEX_RX15
PEX_RX15*
G
2
XXXV32010
S6D
COMMON
SOT363
1
0ohm
1 2
Q518
DNI0402
XXXV32010
R162
OUT 3
PEX_REFCLK PEXGEN3_SIGNALS
PEXGEN3_SIGNALSPEX_REFCLK
PEXGEN3_SIGNALSPEX_TXX0
PEX_TXX0 PEXGEN3_SIGNALS
PEXGEN3_SIGNALSPEX_RX0
PEXGEN3_SIGNALSPEX_RX0
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEX_RX1 PEXGEN3_SIGNALS
PEX_RX1 PEXGEN3_SIGNALS
PEX_TXX2 PEXGEN3_SIGNALS
PEX_TXX2 PEXGEN3_SIGNALS
PEXGEN3_SIGNALSPEX_RX2
PEX_RX2 PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEX_RX3 PEXGEN3_SIGNALS
PEXGEN3_SIGNALSPEX_RX3
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEX_RX4 PEXGEN3_SIGNALS
PEX_RX4 PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEX_RX5 PEXGEN3_SIGNALS
PEX_RX5 PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEX_RX6 PEXGEN3_SIGNALS
PEX_RX6 PEXGEN3_SIGNALS
PEX_TXX7 PEXGEN3_SIGNALS
PEX_TXX7 PEXGEN3_SIGNALS
PEX_RX7 PEXGEN3_SIGNALS
PEX_RX7 PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEX_RX8 PEXGEN3_SIGNALS
PEX_RX8 PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEX_RX9 PEXGEN3_SIGNALS
PEX_RX9 PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEX_RX10 PEXGEN3_SIGNALS
PEX_RX10 PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEX_RX11 PEXGEN3_SIGNALS
PEX_RX11 PEXGEN3_SIGNALS
PEX_TXX12 PEXGEN3_SIGNALS
PEX_TXX12 PEXGEN3_SIGNALS
PEX_RX12 PEXGEN3_SIGNALS
PEX_RX12 PEXGEN3_SIGNALS
PEX_TXX13 PEXGEN3_SIGNALS
PEX_TXX13 PEXGEN3_SIGNALS
PEX_RX13 PEXGEN3_SIGNALS
PEX_RX13 PEXGEN3_SIGNALS
PEX_TXX14 PEXGEN3_SIGNALS
PEX_TXX14 PEXGEN3_SIGNALS
PEX_RX14 PEXGEN3_SIGNALS
PEX_RX14 PEXGEN3_SIGNALS
PEX_TXX15 PEXGEN3_SIGNALS
PEX_TXX15 PEXGEN3_SIGNALS
PEX_RX15 PEXGEN3_SIGNALS
PEX_RX15 PEXGEN3_SIGNALS
C E
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
@discrete.q_fet_n_enh(s ym_2) :page3_i898
COMMON
SOT363
Q518
1 2
0402 DNI
XXXV32010
R148
1 2
1 2
R688
1 2
R724
0402
1 2
R704
0402
1 2
R705
0402
R706
G
5
S3D
4
0ohm
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
1 2
X5R
1 2
0402 6.3V
X5R
1 2
X5R
1 2
0402 6.3V
X5R
1 2
0402 6.3V
X5R
1 2
0402
X5R
1 2
0402 6.3V
X5R
1 2
0402 6.3V
X5R
1 2
0402 6.3V
X5R
1 2
0402
X5R
1 2
0402
X5R
1 2
0402
X5R
1 2
0402
X5R
1 2
0402 6.3V
X5R
1 2
0402 6.3V
X5R
1 2
0402
X5R
0ohm
JTAG_TRST*
JTAG_TCLK
JTAG_TDI
JTAG_TDO
JTAG_TMS
1 2
0402
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
1 2
0402 6.3V
VVVV32010
C801
VVVV32010
C790
VVVV32010
C783
VVVV32010
C777
VVVV32010
C767
VVVV32010
C781
VVVV32010
C778
VVVV32010
C771
VVVV32010
C768
VVVV32010
C765
VVVV32010
C678
VVVV32010
C652
VVVV32010
C632
VVVV32010
C601
VVVV32010
C581
VVVV32010
C570
ASSEMBLY
PAGE DETAIL
0.22uF
10%
6.3V
X5R
0.22uF
10%
X5R
0.22uF
10%
X5R
0.22uF
X5R
0.22uF
10%
X5R
0.22uF
10%
X5R
0.22uF
10%
X5R
0.22uF
10%
X5R
0.22uF
X5R
0.22uF
10%
X5R
0.22uF
10%
X5R
0.22uF
10%
X5R
0.22uF
10%
X5R
0.22uF
X5R
0.22uF
10%
X5R
0.22uF
10%
X5R
OUT 21
OUT 21
OUT 21
OUT 21
OUT 21
XXXV32010
100k
5 %
0402
COMMON
R1642
IN3,20,32
PEX_TX0
PEX_TX0*
COMMON
PEX_TX1
PEX_TX1*
COMMON
PEX_TX2
PEX_TX2*
COMMON
PEX_TX3
PEX_TX3*
COMMON
PEX_TX4
PEX_TX4*
COMMON
PEX_TX5
PEX_TX5*
COMMON
PEX_TX6
PEX_TX6*
COMMON
PEX_TX7
PEX_TX7*
COMMON
PEX_TX8
PEX_TX8*
COMMON
PEX_TX9
PEX_TX9*
COMMON
PEX_TX10
PEX_TX10*
COMMON
PEX_TX11
PEX_TX11*
COMMON
PEX_TX12
PEX_TX12*
COMMON
PEX_TX13
PEX_TX13*
COMMON
PEX_TX14
PEX_TX14*
COMMON
PEX_TX15
PEX_TX15*
COMMON
BASE LEVEL GENE RIC SCHEMATIC ONLY
PCI Express
IN3 OUT 3,20,32
NV3V3
XXXV32010
100k
5 %
0402
COMMON
I2CS_SCL
OUT 21
I2CS_SDA
OUT 21
R1643
PEX_RST_BUF*
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
COMMON0402
0ohm
COMMON0402
0ohm
COMMON
0ohm
COMMON
0ohm
COMMON
0.22uF
6.3V0402
10%
VVVV32010
C804
0.22uF
10%
VVVV32010
C795
0.22uF
6.3V0402
10%
VVVV32010
C787
0.22uF
VVVV32010
C779
0.22uF
10%
VVVV32010
C769
0.22uF
6.3V
10%
VVVV32010
C782
0.22uF
10%
VVVV32010
C780
0.22uF
10%
VVVV32010
C776
0.22uF
VVVV32010
C770
0.22uF
6.3V
10%
VVVV32010
C766
0.22uF
6.3V
10%
VVVV32010
C684
0.22uF
6.3V
10%
VVVV32010
C659
0.22uF
6.3V
10%
VVVV32010
C639
0.22uF
VVVV32010
C609
0.22uF
10%
VVVV32010
C584
0.22uF
6.3V
10%
VVVV32010
C574
PEX_RST*
BA15
BB19
BB18
AW17
AY17
AU19
AV19
BA19
AY19
AW20
AV20
AY21
BA21
AV21
AU21
BB21
BB22
AU22
AV22
BA22
AY22
AV23
AW23
AY24
BA24
AV24
AU24
BB24
BB25
AU25
AV25
BA25
AY25
AW26
AV26
AY27
BA27
AV27
AU27
BB27
BB28
AU28
AV28
BA28
AY28
AW29
AV29
AY30
BA30
AV30
AU30
BB30
BB31
AU31
AV31
BA31
AY31
AW32
AV32
AY33
BA33
AV33
AU33
BB33
BB34
AU34
AV34
BA34
AY34
NV3V3
U502
3V3_F
@logic.u_buf_3_state(sy m_10):page 3_i876
SC70_5
5
COMMON
1
VCC
XXXV32010
OE
A
Y
2
GND
1 2
VVVV32010
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
BGA1428
@digital.u_gpu_gb2b_192( sym_1 ):page3_i8 64
BGA1428
COMMON
1/18 PCI_EXPRESS
PEX_WAKE
PEX_RST
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
VVVV32010
G1
PEX_RST_BUF*
4
3
GND
R672
0ohm
COMMON0402
GND
R675
XXXV32010
5 %
0402
DNI
PEX_TST CLK_OUT
PEX_TST CLK_OUT
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_PLL_HVDD
PEX_SVDD_3V3
NVVDD_SENSE
GND_SENSE
PEX_PLLVDD
TESTMODE
PEX_TERMP
12V
3V3
GND
AP29
AP30
AR27
AR28
AR29
AP17
AP18
AP19
AP20
AP21
AP22
AP23
C723
AP24
12
VVVV32010
AP25
1uF
AP26
6.3V
AP27
10%
AP28
X5R
AR19
0402
COMMON
AR20
AR21
AR22
AR23
AR24
AR25
AR26
AT22
AT28
C672
12
VVVV32010
0.1uF
16V
X7R
0402
COMMON
NVVDD_SENSE
AT42
GND_SENSE
AT41
PEX_PLL_CLK_OUT
BB36
PEX_PLL_CLK_OUT*
BA36
AT25
GPU_TESTMODE
AT21
PEX_TERMP
AW35
FDBA
12V
3V3
GND 0.4008.5A0V
C762
12
12
VVVV32010
1uF
6.3V
10%
X5R
0402
COMMON
GPU_PEX_IOVDDQ 0.400
C724
C722
12
12
VVVV32010
VVVV32010
1uF
0.1uF
6.3V
16V
10%
10%
X5R
X7R
0402
0402
COMMON
COMMON
IOVDD
C729
C679
12
12
VVVV32010
VVVV32010
4.7uF
4.7uF
6.3V
6.3V
X5R
X5R
0603
0603
COMMON
COMMON
GND
OUT 25,29
OUT 25,29
PEX_PLL_CLK PEXGEN3_SIGNALS
PEX_PLL_CLK PEXGEN3_SIGNALS
PEX_PLLVDD
10k
1 2
COMMON
0402
5 %
VVVV32010
R637
GND
2.49k
1 2
COMMON
0402
1 %
VVVV32010
R629
GND
VOLTAGE MAX_CURRENT
12V
5.5A
3.3V
3.0A
C743
C741
C751
12
12
VVVV32010
VVVV32010
VVVV32010
4.7uF
22uF
22uF
6.3V
6.3V
6.3V
20%
20%
20%
X5R
X5R
X5R
0603
0805
0805
COMMON
COMMON
COMMON
C732
C721
12
VVVV32010
VVVV32010
12
0.1uF
1uF
16V
6.3V
10%
10%
X7R
X5R
0402
0402
COMMON
COMMON
GND
C137
12
12
VVVV32010
4.7uF
6.3V
20%
X5R
0603
COMMON
R635
200ohm
5 %
0402
COMMON
VVVV32010
C759
12
VVVV32010
0.1uF
16V
10%
X7R
0402
COMMON
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
G
Wednesday, November 12, 201 4
MIN_WIDTHNET
0.500
0.500
C132
12
VVVV32010
22uF
nv_res
6.3V
R1668
20%
VVVV32010
X5R
0ohm
0805
COMMON
0.05 ohm
0805
COMMON
GND
nv_res
R1669
XXXV32010
0ohm
0.05 ohm
0805
COMMON
C136
12
VVVV32010
22uF
6.3V
20%
X5R
0805
COMMON
PEX_VDD IOVDD
R664
0ohm
VVVV32010
0402
COMMON
C761
12
VVVV32010
4.7uF
6.3V
20%
X5R
0603
COMMON
GND
MS-V320
MS-V320
MS-V320
PEX_VDD
C750
12
VVVV32010
22uF
6.3V
20%
X5R
0805
COMMON
R663
0ohm
XXXV32010
0402
COMMON
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
H
C133
VVVV32010
22uF
6.3V
20%
X5R
0805
COMMON
C731
12
VVVV32010
1uF
6.3V
10%
X5R
0402
COMMON
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
03_PCI Express
03_PCI Express
03_PCI Express
PEX_VDD
nv_res
R1670
VVVV32010
0ohm
0.05 ohm
0805
COMMON
GND
3 34
3 34
3 34
1
2
IOVDD
3
4
5
10
10
10
Page 4
A B C D E F G H
smd.db-x7.ru
MEMORY: GPU Partition A/B
1
5
Fba_D<0>
5
Fba_D<1>
5
Fba_D<2>
5
Fba_D<3>
5
Fba_D<4>
5
Fba_D<5>
5
Fba_D<6>
5
Fba_D<7>
5
Fba_D<8>
5
Fba_D<9>
5
Fba_D<10>
5
Fba_D<11>
5
Fba_D<12>
5
Fba_D<13>
5
Fba_D<14>
5
Fba_D<15>
5
Fba_D<16>
5
Fba_D<17>
5
Fba_D<18>
5
Fba_D<19>
5
Fba_D<20>
5
Fba_D<21>
5
2
3
Fba_D<22>
5
Fba_D<23>
5
Fba_D<24>
5
Fba_D<25>
5
Fba_D<26>
5
Fba_D<27>
5
Fba_D<28>
5
Fba_D<29>
5
Fba_D<30>
5
Fba_D<31>
6
Fba_D<32>
6
Fba_D<33>
6
Fba_D<34>
6
Fba_D<35>
6
Fba_D<36>
6
Fba_D<37>
6
Fba_D<38>
6
Fba_D<39>
6
Fba_D<40>
6
Fba_D<41>
6
Fba_D<42>
6
Fba_D<43>
6
Fba_D<44>
6
Fba_D<45>
6
Fba_D<46>
6
Fba_D<47>
6
Fba_D<48>
6
Fba_D<49>
6
Fba_D<50>
6
Fba_D<51>
6
Fba_D<52>
6
Fba_D<53>
6
Fba_D<54>
6
Fba_D<55>
6
Fba_D<56>
6
Fba_D<57>
6
Fba_D<58>
6
Fba_D<59>
6
Fba_D<60>
6
Fba_D<61>
6
Fba_D<62>
6
Fba_D<63>
6
4
6
FBA_D<0>
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_D<5>
5
FBA_D<6>
6
FBA_D<7>
7
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_D<16>
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
FBA_D<31>
31
FBA_D<32>
32
FBA_D<33>
33
FBA_D<34>
34
FBA_D<35>
35
FBA_D<36>
36
FBA_D<37>
37
FBA_D<38>
38
FBA_D<39>
39
FBA_D<40>
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50>
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DBI<0>
0
OUT5
FBA_DBI<1>
1
OUT5
FBA_DBI<2>
2
OUT5
FBA_DBI<3>
3
OUT5
FBA_DBI<4>
FBA_DBI<5>
5
OUT6
FBA_DBI<6>
6
OUT6
FBA_DBI<7>
7
OUT6
FBA_EDC<0>
0
BI5
FBA_EDC<1>
1
BI5
FBA_EDC<2>
2
BI5
FBA_EDC<3>
3
BI5
FBA_EDC<4>
FBA_EDC<5>
5
BI6
FBA_EDC<6>
6
BI6
FBA_EDC<7>
7
BI6
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAINK NOWNA ND UNKNOWN VIOLATIONS OR DEVIA TIONS OFI NDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKESNO WARRA NTIES, E XPRESSE D, IMPLIED, STAT UTORY OR OTHERWISE WITH RESPECT TOT HE MATERIALS OROTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1B
@digital.u_gpu_gb2b_192( sym_2 ):page4_i1 905
BGA1428
COMMON
2/18 FBA
H38
FBA_D0
J39
FBA_D1
J38
FBA_D2
J37
FBA_D3
L36
FBA_D4
K38
FBA_D5
M39
FBA_D6
K39
FBA_D7
M42
FBA_D8
L40
FBA_D9
M41
FBA_D10
M40
FBA_D11
J42
FBA_D12
J41
FBA_D13
H40
FBA_D14
J40
FBA_D15
N40
FBA_D16
N41
FBA_D17
N42
FBA_D18
P40
FBA_D19
T40
FBA_D20
T42
FBA_D21
U40
FBA_D22
T41
FBA_D23
T38
FBA_D24
T37
FBA_D25
T39
FBA_D26
U36
FBA_D27
P36
FBA_D28
R39
FBA_D29
R38
FBA_D30
N39
FBA_D31
AT40
FBA_D32
AP39
FBA_D33
AR38
FBA_D34
AP38
FBA_D35
AN37
FBA_D36
AL37
FBA_D37
AN39
FBA_D38
AN38
FBA_D39
AL40
FBA_D40
AL41
FBA_D41
AL42
FBA_D42
AM40
FBA_D43
AP40
FBA_D44
AP42
FBA_D45
AR40
FBA_D46
AP41
FBA_D47
AK37
FBA_D48
AK39
FBA_D49
AK38
FBA_D50
AH39
FBA_D51
AF36
FBA_D52
AG37
FBA_D53
AG39
FBA_D54
AG38
FBA_D55
AF38
FBA_D56
AG41
FBA_D57
AG40
FBA_D58
AG42
FBA_D59
AJ40
FBA_D60
AK40
FBA_D61
AK42
FBA_D62
AK41
FBA_D63
K36
FBA_DQM0
K42
FBA_DQM1
R42
FBA_DQM2
R37
FBA_DQM3
AP37
FBA_DQM4
AN42
FBA_DQM5
AJ36
FBA_DQM6
AH42
FBA_DQM7
J36
FBA_DQS_WP0
K41
FBA_DQS_WP1
R41
FBA_DQS_WP2
T35
FBA_DQS_WP3
AN36
FBA_DQS_WP4
AN41
FBA_DQS_WP5
AH38
FBA_DQS_WP6
AH41
FBA_DQS_WP7
J35
FBA_DQS_RN0
K40
FBA_DQS_RN1
R40
FBA_DQS_RN2
R36
FBA_DQS_RN3
AM36
FBA_DQS_RN4
AN40
FBA_DQS_RN5
AH37
FBA_DQS_RN6
AH40
FBA_DQS_RN7
VVVV32010
FBA_CMD<0>
W38
FBA_CMD0
FBA_CMD<1>
W37
FBA_CMD1
Y40
FBA_CMD2
Y38
FBA_CMD3
AC40
FBA_CMD4
Y36
FBA_CMD5
V36
FBA_CMD6
W42
FBA_CMD7
W41
FBA_CMD8
W40
FBA_CMD9
V35
FBA_CMD10
W39
FBA_CMD11
V40
FBA_CMD12
V39
FBA_CMD13
V38
FBA_CMD14
V37
FBA_CMD15
AE38
FBA_CMD16
AE37
FBA_CMD17
AE36
FBA_CMD18
AD39
FBA_CMD19
AE35
FBA_CMD20
AD38
FBA_CMD21
AE41
FBA_CMD22
AE42
FBA_CMD23
AD37
FBA_CMD24
AC38
FBA_CMD25
AC36
FBA_CMD26
W35
FBA_CMD27
AE40
FBA_CMD28
AD42
FBA_CMD29
AD41
FBA_CMD30
AD40
FBA_CMD31
AE34
FBA_CMD32
AF34
FBA_CMD33
AC35
FBA_CMD34
AD35
FBA_CMD35
V41
FBA_CLK0
V42
FBA_CLK0
AF40
FBA_CLK1
AF39
FBA_CLK1
M37
FBA_WCK01
M38
FBA_WCK01
M36
FBA_WCKB01
L35
FBA_WCKB01
N37
FBA_WCK23
N38
FBA_WCK23
P35
FBA_WCKB23
N36
FBA_WCKB23
AK36
FBA_WCK45
AJ35
FBA_WCK45
AH36
FBA_WCKB45
AG35
FBA_WCKB45
AL38
FBA_WCK67
AL39
FBA_WCK67
AM35
FBA_WCKB67
AL36
FBA_WCKB67
AG34
FBA_PLL_AVDD
C E
1
FBA_CMD<2>
2
FBA_CMD<3>
3
FBA_CMD<4>
4
FBA_CMD<5>
5
FBA_CMD<6>
6
FBA_CMD<7>
7
FBA_CMD<8>
8
FBA_CMD<9>
9
FBA_CMD<10>
FBA_CMD<11>
11
FBA_CMD<12>
12
FBA_CMD<13>
13
FBA_CMD<14>
14
FBA_CMD<15>
15
FBA_CMD<16>
16
FBA_CMD<17>
17
FBA_CMD<18>
18
FBA_CMD<19>
19
FBA_CMD<20>
FBA_CMD<21>
21
FBA_CMD<22>
22
FBA_CMD<23>
23
FBA_CMD<24>
24
FBA_CMD<25>
25
FBA_CMD<26>
26
FBA_CMD<27>
27
FBA_CMD<28>
28
FBA_CMD<29>
29
FBA_CMD<30>
FBA_CMD<31>
31
R580
FBA_DEBUG0
FBA_DEBUG1
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_WCK01
FBA_WCK01*
FBA_WCK23
FBA_WCK23*
FBA_WCK45
FBA_WCK45*
FBA_WCK67
FBA_WCK67*
60.4ohm
1 2
0402
1 %
XXXV32010
IOVDD
LB501
30ohm
COMMON
BEAD_060 3
VVVV32010
FB_PLLVDD FB_PLLVDD
VVVV32010
C593
12
C633
12
0.1uF
22uF
16V
6.3V
10%
20%
X7R
X5R
0402
0805
COMMON
COMMON
VVVV32010
GND
CKE*
FBA_CMD<30>
FBA_CMD<14>
FBA_CMD<29>
FBA_CMD<13>
DNI
FB_CLK
FB_CLK
FB_CLK
FB_CLK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FBA_CMD<0>
FBA_CMD<1>
FBA_CMD<2>
FBA_CMD<3>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
FBA_CMD<7>
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<12>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<15>
FBA_CMD<16>
FBA_CMD<17>
FBA_CMD<18>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<21>
FBA_CMD<22>
FBA_CMD<23>
FBA_CMD<24>
FBA_CMD<25>
FBA_CMD<26>
FBA_CMD<27>
FBA_CMD<28>
FBA_CMD<29>
FBA_CMD<30>
FBA_CMD<31>
R583
1 2
60.4ohm
0402
DNI
1 %
XXXV32010
OUT 4,9,15
R614
10k
5 %
COMMON
VVVV32010
VVVV32010
R564
10k
5 %
COMMON
ASSEMBLY
PAGE DETAIL
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
FBVDDQ
6
OUT 5
OUT 5
OUT 6
OUT 6
OUT 5
OUT 5
OUT 5
OUT 6
OUT 6
OUT 6
OUT 6
FBVDDQ
R561
10k
5 %
COMMON
VVVV32010
VVVV32010
R621
10k
5 %
COMMON
GND
GDDR5_BGA170_MIRROR
CMD0 CS*
CMD1 A3_BA3
CMD2 A2_BA0
CMD3 A4_BA2
CMD4 A5_BA1
CMD5 WE*
CMD6 A7_A8
CMD7 A6_A11
CMD8 ABI*
CMD9 A12_RFU
CMD10 A0_A10
CMD11 A1_A9
CMD12 RAS*
CMD13 RST*
CMD14 CKE*
CMD15 CAS*
CMD32
CMD34 DBG0 DBG0
CMD16 CS*
CMD17 A3_BA3
CMD18 A2_BA0
CMD19 A4_BA2
CMD20 A5_BA1
CMD21 W E*
CMD22 A7_A8
CMD23 A6_A11
CMD24 ABI *
CMD25 A12_RFU
CMD26 A0_A10
CMD27 A1_A9
CMD28 RAS*
CMD29 RST*
CMD30 CKE*
CMD31 CAS*
CMD33
CMD35 DBG1 DBG1
5
CKE*
FBB_CMD<30>
FBB_CMD<14>
FBB_CMD<29>
FBB_CMD<13>
RST*RST*
BASE LEVEL GENE RIC SCHEMATIC ONLY
MEMORY: GPU Partition A/B
0..31 32..63
7
Fbb_D<0>
7
Fbb_D<1>
7
Fbb_D<2>
7
Fbb_D<3>
7
Fbb_D<4>
7
Fbb_D<5>
7
Fbb_D<6>
7
Fbb_D<7>
7
Fbb_D<8>
7
Fbb_D<9>
7
Fbb_D<10>
7
Fbb_D<11>
7
Fbb_D<12>
7
Fbb_D<13>
7
Fbb_D<14>
7
Fbb_D<15>
7
Fbb_D<16>
7
Fbb_D<17>
7
Fbb_D<18>
7
Fbb_D<19>
7
Fbb_D<20>
7
Fbb_D<21>
7
Fbb_D<22>
7
Fbb_D<23>
7
Fbb_D<24>
7
Fbb_D<25>
7
Fbb_D<26>
7
Fbb_D<27>
7
Fbb_D<28>
7
Fbb_D<29>
7
Fbb_D<30>
7
Fbb_D<31>
8
Fbb_D<32>
8
Fbb_D<33>
8
Fbb_D<34>
8
Fbb_D<35>
8
Fbb_D<36>
8
Fbb_D<37>
8
Fbb_D<38>
8
Fbb_D<39>
8
Fbb_D<40>
8
Fbb_D<41>
8
Fbb_D<42>
8
Fbb_D<43>
8
Fbb_D<44>
8
Fbb_D<45>
8
Fbb_D<46>
8
Fbb_D<47>
8
Fbb_D<48>
8
Fbb_D<49>
8
Fbb_D<50>
8
Fbb_D<51>
8
Fbb_D<52>
8
Fbb_D<53>
8
Fbb_D<54>
8
Fbb_D<55>
8
Fbb_D<56>
8
Fbb_D<57>
8
Fbb_D<58>
8
Fbb_D<59>
8
Fbb_D<60>
8
Fbb_D<61>
8
Fbb_D<62>
8
Fbb_D<63>
8
8
FBVDDQ
R552
R550
10k
10k
5 %
5 %
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
VVVV32010
R551
R553
10k
10k
5 %
5 %
COMMON
COMMON
GND
FBB_D<0>
FBB_D<1>
1
FBB_D<2>
2
FBB_D<3>
3
FBB_D<4>
4
FBB_D<5>
5
FBB_D<6>
6
FBB_D<7>
7
FBB_D<8>
8
FBB_D<9>
9
FBB_D<10>
FBB_D<11>
11
FBB_D<12>
12
FBB_D<13>
13
FBB_D<14>
14
FBB_D<15>
15
FBB_D<16>
16
FBB_D<17>
17
FBB_D<18>
18
FBB_D<19>
19
FBB_D<20>
FBB_D<21>
21
FBB_D<22>
22
FBB_D<23>
23
FBB_D<24>
24
FBB_D<25>
25
FBB_D<26>
26
FBB_D<27>
27
FBB_D<28>
28
FBB_D<29>
29
FBB_D<30>
FBB_D<31>
31
FBB_D<32>
32
FBB_D<33>
33
FBB_D<34>
34
FBB_D<35>
35
FBB_D<36>
36
FBB_D<37>
37
FBB_D<38>
38
FBB_D<39>
39
FBB_D<40>
FBB_D<41>
41
FBB_D<42>
42
FBB_D<43>
43
FBB_D<44>
44
FBB_D<45>
45
FBB_D<46>
46
FBB_D<47>
47
FBB_D<48>
48
FBB_D<49>
49
FBB_D<50>
FBB_D<51>
51
FBB_D<52>
52
FBB_D<53>
53
FBB_D<54>
54
FBB_D<55>
55
FBB_D<56>
56
FBB_D<57>
57
FBB_D<58>
58
FBB_D<59>
59
FBB_D<60>
FBB_D<61>
61
FBB_D<62>
62
FBB_D<63>
63
FBB_DBI<0>
0
OUT7
FBB_DBI<1>
1
OUT7
FBB_DBI<2>
2
OUT7
FBB_DBI<3>
3
OUT7
FBB_DBI<4>
FBB_DBI<5>
5
OUT8
FBB_DBI<6>
6
OUT8
FBB_DBI<7>
7
OUT8
FBB_EDC<0>
0
BI7
FBB_EDC<1>
1
BI7
FBB_EDC<2>
2
BI7
FBB_EDC<3>
3
BI7
FBB_EDC<4>
FBB_EDC<5>
5
BI8
FBB_EDC<6>
6
BI8
FBB_EDC<7>
7
BI8
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1C
@digital.u_gpu_gb2b_192( sym_3 ):page4_i1 906
BGA1428
COMMON
3/18 FBB
F15
FBB_D0
D15
FBB_D1
E15
FBB_D2
G15
FBB_D3
E16
FBB_D4
D16
FBB_D5
D18
FBB_D6
E18
FBB_D7
C18
FBB_D8
C17
FBB_D9
A18
FBB_D10
B18
FBB_D11
C15
FBB_D12
A15
FBB_D13
C14
FBB_D14
B15
FBB_D15
D19
FBB_D16
E19
FBB_D17
F19
FBB_D18
D21
FBB_D19
G23
FBB_D20
F22
FBB_D21
E22
FBB_D22
D22
FBB_D23
C23
FBB_D24
B22
FBB_D25
C22
FBB_D26
A22
FBB_D27
B21
FBB_D28
C19
FBB_D29
A19
FBB_D30
B19
FBB_D31
G41
FBB_D32
F42
FBB_D33
G42
FBB_D34
F41
FBB_D35
C41
FBB_D36
D42
FBB_D37
C39
FBB_D38
C40
FBB_D39
G35
FBB_D40
F37
FBB_D41
D36
FBB_D42
D37
FBB_D43
E37
FBB_D44
E39
FBB_D45
G37
FBB_D46
F38
FBB_D47
A36
FBB_D48
C35
FBB_D49
C36
FBB_D50
B36
FBB_D51
A34
FBB_D52
A33
FBB_D53
C33
FBB_D54
B33
FBB_D55
F35
FBB_D56
G34
FBB_D57
E36
FBB_D58
A37
FBB_D59
F34
FBB_D60
E33
FBB_D61
F33
FBB_D62
G32
FBB_D63
F16
FBB_DQM0
A16
FBB_DQM1
H22
FBB_DQM2
A21
FBB_DQM3
D40
FBB_DQM4
D41
FBB_DQM5
E34
FBB_DQM6
D34
FBB_DQM7
G16
FBB_DQS_WP0
B16
FBB_DQS_WP1
E21
FBB_DQS_WP2
C21
FBB_DQS_WP3
F40
FBB_DQS_WP4
D38
FBB_DQS_WP5
C34
FBB_DQS_WP6
B37
FBB_DQS_WP7
H15
FBB_DQS_RN0
C16
FBB_DQS_RN1
F21
FBB_DQS_RN2
C20
FBB_DQS_RN3
E40
FBB_DQS_RN4
D39
FBB_DQS_RN5
B34
FBB_DQS_RN6
C37
FBB_DQS_RN7
VVVV32010
FDBA
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33
FBB_CMD34
FBB_CMD35
FBB_WCK01
FBB_WCK01
FBB_WCKB01
FBB_WCKB01
FBB_WCK23
FBB_WCK23
FBB_WCKB23
FBB_WCKB23
FBB_WCK45
FBB_WCK45
FBB_WCKB45
FBB_WCKB45
FBB_WCK67
FBB_WCK67
FBB_WCKB67
FBB_WCKB67
FBB_PLL_AVDD
FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1
FBB_CMD<0>
D24
FBB_CMD<1>
E24
F24
H24
C24
A25
B25
C25
D25
G24
F25
E25
C26
C29
C30
B30
B31
G26
E26
C31
A31
A30
G31
D30
F30
E30
E29
H25
G29
D31
E31
F31
H29
H26
H30
H31
B24
A24
D32
C32
H20
G19
G18
H17
G17
F18
G20
G21
C38
B39
G36
H35
A39
B40
H36
H37
H23
G
1
FBB_CMD<2>
2
FBB_CMD<3>
3
FBB_CMD<4>
4
FBB_CMD<5>
5
FBB_CMD<6>
6
FBB_CMD<7>
7
FBB_CMD<8>
8
FBB_CMD<9>
9
FBB_CMD<10>
FBB_CMD<11>
11
FBB_CMD<12>
12
FBB_CMD<13>
13
FBB_CMD<14>
14
FBB_CMD<15>
15
FBB_CMD<16>
16
FBB_CMD<17>
17
FBB_CMD<18>
18
FBB_CMD<19>
19
FBB_CMD<20>
FBB_CMD<21>
21
FBB_CMD<22>
22
FBB_CMD<23>
23
FBB_CMD<24>
24
FBB_CMD<25>
25
FBB_CMD<26>
26
FBB_CMD<27>
27
FBB_CMD<28>
28
FBB_CMD<29>
29
FBB_CMD<30>
FBB_CMD<31>
31
FBB_DEBUG0
FBB_DEBUG1
FBB_CLK0
FBB_CLK0*
FBB_CLK1
FBB_CLK1*
FBB_WCK01
FBB_WCK01*
FBB_WCK23
FBB_WCK23*
FBB_WCK45
FBB_WCK45*
FBB_WCK67
FBB_WCK67*
MSI
MSI
MSI
R562
1 2
0402
C704
12
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
04_MEMORY_ GPU Partition A_B
04_MEMORY_ GPU Partition A_B
04_MEMORY_ GPU Partition A_B
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Fbb_Cmd<0>
Fbb_Cmd<1>
Fbb_Cmd<2>
Fbb_Cmd<3>
Fbb_Cmd<4>
Fbb_Cmd<5>
Fbb_Cmd<6>
Fbb_Cmd<7>
Fbb_Cmd<8>
Fbb_Cmd<9>
Fbb_Cmd<10>
Fbb_Cmd<11>
Fbb_Cmd<12>
Fbb_Cmd<13>
Fbb_Cmd<14>
Fbb_Cmd<15>
Fbb_Cmd<16>
Fbb_Cmd<17>
Fbb_Cmd<18>
Fbb_Cmd<19>
Fbb_Cmd<20>
Fbb_Cmd<21>
Fbb_Cmd<22>
Fbb_Cmd<23>
Fbb_Cmd<24>
Fbb_Cmd<25>
Fbb_Cmd<26>
Fbb_Cmd<27>
Fbb_Cmd<28>
Fbb_Cmd<29>
Fbb_Cmd<30>
Fbb_Cmd<31>
60.4ohm
DNI
1 %
XXXV32010
FB_CLK
FB_CLK
FB_CLK
FB_CLK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
IN 4,9,15
MS-V320
MS-V320
MS-V320
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
R566 60.4ohm
1 2
0402
1 %
XXXV32010
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
FBVDDQ
DNI
OUT 7
OUT 7
OUT 8
OUT 8
OUT 7
OUT 7
OUT 7
OUT 8
OUT 8
OUT 8
OUT 8
4 34
4 34
4 34
1
2
3
7
4
10
10
10
Page 5
A B C D E F G H
smd.db-x7.ru
MEMORY: FBA Partition 31..0
1
4
4
4
4
4
4
4
4
4
4
4
4
4
4
2
3
4
4
M2C
@memory.u_mem_sd_ddr5 _x32( sym_6 ):page5_ i558
BGA170
M2B
@memory.u_mem_sd_ddr5 _x32( sym_5 ):page5_ i556
COMMON
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
RFU_A12
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
FBA_ZQ_1
121ohm
J13
ZQ
COMMON0402
J10
SEN
VVVV32010
C578
10nF
16V
10%
0402
COMMON
VVVV32010
VVVV32010
R565
40.2ohm
1 %
0402
COMMON
0.350 0.140A
12
C573
10nF
6.3V
10%
X5R
0402
COMMON
VVVV32010
GND GND
FBA_VREFC
1.05V
FBA_CMD<12>
FBA_CMD<15>
FBA_CMD<5>
FBA_CMD<0>
FBA_CMD<8>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<2>
FBA_CMD<1>
FBA_CMD<3>
FBA_CMD<4>
FBA_CMD<7>
FBA_CMD<6>
FBA_CMD<9>
FBA_CMD<13>
FBA_CMD<14>
R204
1 2
VVVV32010
OUT 6
1 %
FBA_CMD<3>
3
FBA_CMD<3>
FBA_CMD<0>
FBA_CMD<10>
FBA_CMD<15>
FBA_CMD<7>
FBA_CMD<5>
FBA_CMD<4>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<12>
FBA_CMD<11>
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<6>
FBA_CMD<2>
FBA_CMD<1>
0.350 1.05V
FBA_VREF_Q
FBA_D<16>
FBA_D<17>
FBA_D<18>
FBA_D<19>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_D<24>
FBA_D<25>
FBA_D<26>
FBA_D<27>
FBA_D<28>
FBA_D<29>
FBA_D<30>
FBA_D<31>
GPIO10_FBVREF_SEL
VVVV32010
M2A
@memory.u_mem_sd_ddr5 _x32( sym_3 ):page5_ i507
BGA170
COMMON
NORMAL
V11
DQ16
V13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2
VREFD
x32
V4
DQ24
V2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3
P4
WCK23
P5
WCK23
Use low VGSth part for Pascal
AO3420
1G1D1 S
x16
NC
NC
NC
NC
NC
NC
NC
NC
NC
G
1
V10
VVVV32010
3
D
Q515
@discrete.q_fet_n_enh(s ym_2) :page5_i506
SOT23_1 G1D 1S
COMMON
S
2
GND
M2D
@memory.u_mem_sd_ddr5 _x32( sym_1 ):page5_ i468
BGA170
COMMON
NORMAL
FBA_D<0>
A4
FBA_WCK01
FBA_WCK01*
FBA_D<1>
FBA_D<2>
FBA_D<3>
FBA_D<4>
FBA_D<5>
FBA_D<6>
FBA_D<7>
FBA_EDC<0>
FBA_DBI<0>
FBA_D<8>
FBA_D<9>
FBA_D<10>
FBA_D<11>
FBA_D<12>
FBA_D<13>
FBA_D<14>
FBA_D<15>
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0
A10
VREFD
x16
x32
A11
DQ8
NC
A13
DQ9
NC
B11
DQ10
NC
B13
DQ11
NC
E11
DQ12
E13
DQ13
NC
F11
DQ14
NC
F13
DQ15
NC
C13
EDC1
GND
D13
DBI1
NC
D4
WCK01
D5
WCK01
VVVV32010
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
16
Fba_D<16>
17
Fba_D<17>
18
Fba_D<18>
19
Fba_D<19>
20
Fba_D<20>
21
Fba_D<21>
22
Fba_D<22>
23
Fba_D<23>
FBA_EDC<2>
OUT4
FBA_DBI<2>
OUT4
24
Fba_D<24>
25
Fba_D<25>
26
Fba_D<26>
27
Fba_D<27>
Fba_D<28>
29
Fba_D<29>
30
Fba_D<30>
31
Fba_D<31>
FBA_EDC<3>
OUT4
FBA_DBI<3>
OUT4
IN4
IN4
FBA_WCK23
FBA_WCK23*
IN7,10,21
0
Fba_D<0>
1
Fba_D<1>
2
Fba_D<2>
3
Fba_D<3>
4
Fba_D<4>
5
Fba_D<5>
6
Fba_D<6>
7
Fba_D<7>
OUT4
OUT4
8
Fba_D<8>
9
Fba_D<9>
10
Fba_D<10>
11
Fba_D<11>
Fba_D<12>
13
Fba_D<13>
14
Fba_D<14>
15
Fba_D<15>
FBA_EDC<1>
OUT4
FBA_DBI<1>
OUT4
IN4
IN4
4
FBA_CMD<0>
0
4
FBA_CMD<10>
10
4
FBA_CMD<15>
15
4
FBA_CMD<7>
7
4
FBA_CMD<5>
4
FBA_CMD<4>
4
4
FBA_CMD<13>
13
4
FBA_CMD<14>
14
4
FBA_CMD<12>
12
4
FBA_CMD<11>
11
4
FBA_CMD<8>
8
4
FBA_CMD<9>
9
4
FBA_CMD<6>
6
4
FBA_CMD<2>
4
FBA_CMD<1>
1
4
FBA_CLK0
IN4
FBA_CLK0*
IN4
VVVV32010
R563
40.2ohm
1 %
0402
COMMON
FBA_CLK0_CM
12
FBVDDQ
VVVV32010
GND
R659
549ohm
1 %
0402
COMMON
R181
R658
1.33k
931ohm
1 %
1 %
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
GND
COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
VVVV32010
GND
FBVDDQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
1
2
3
4
FBVDDQ
C147
12
C140
12
C742
12
C694
12
C738
12
C693
12
C181
12
C739
12
C712
12
C703
1uF
1uF
1uF
1uF
1uF
6.3V
6.3V
6.3V
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
C621
12
C159
12
C554
12
4.7uF
4.7uF
4.7uF
6.3V
6.3V
6.3V
20%
20%
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAINK NOWNA ND UNKNOWN VIOLATIONS OR DEVIA TIONS OFI NDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKESNO WARRA NTIES, E XPRESSE D, IMPLIED, STAT UTORY OR OTHERWISE WITH RESPECT TOT HE MATERIALS OROTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
VVVV32010
20%
X5R
X5R
X5R
0603
0603
0603
COMMON
COMMON
COMMON
VVVV32010
VVVV32010
1uF
6.3V
6.3V
6.3V
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
C158
12
C162
12
4.7uF
10uF
6.3V
6.3V
20%
20%
X5R
X5R
0603
0805
COMMON
COMMON
VVVV32010
VVVV32010
12
1uF
1uF
1uF
1uF
6.3V
6.3V
6.3V
6.3V
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
VVVV32010
C550
12
10uF
6.3V
20%
X5R
0805
COMMON
VVVV32010
C173
12
C176
12
47uF
47uF
GND
4V
4V
20%
20%
X5R
X5R
COMMON
COMMON
VVVV32010
VVVV32010
GND
C E
FDBA
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
G
Wednesday, November 12, 201 4
MS-V320
MS-V320
MS-V320
05_MEMORY_ FBA[ 31_0]
05_MEMORY_ FBA[ 31_0]
05_MEMORY_ FBA[ 31_0]
4
5
10
10
10
Sheet ofDate:
5 34
Sheet ofDate:
5 34
Sheet ofDate:
5 34
H
Page 6
A B C D E F G H
smd.db-x7.ru
MEMORY: FBA Partition 63..32
1
2
FBA_CMD<19>
19
FBA_CMD<19>
FBA_CMD<16>
3
4
4
4
4
4
4
4
4
4
4
4
4
4
FBA_WCK45
FBA_WCK45*
12
4
4
4
VVVV32010
VVVV32010
C567
12
C566
C646
12
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
C754
12
C130
12
4.7uF
4.7uF
6.3V
6.3V
20%
20%
0603
0603
COMMON
COMMON
VVVV32010
VVVV32010
4
IN4
IN4
FBVDDQ
VVVV32010
C665
12
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAINK NOWNA ND UNKNOWN VIOLATIONS OR DEVIA TIONS OFI NDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKESNO WARRA NTIES, E XPRESSE D, IMPLIED, STAT UTORY OR OTHERWISE WITH RESPECT TOT HE MATERIALS OROTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
4.7uF
6.3V
20%
0603
COMMON
VVVV32010
32
Fba_D<32>
33
Fba_D<33>
34
Fba_D<34>
35
Fba_D<35>
36
Fba_D<36>
37
Fba_D<37>
38
Fba_D<38>
39
Fba_D<39>
FBA_EDC<4>
OUT4
FBA_DBI<4>
OUT4
40
Fba_D<40>
41
Fba_D<41>
42
Fba_D<42>
43
Fba_D<43>
Fba_D<44>
45
Fba_D<45>
46
Fba_D<46>
47
Fba_D<47>
FBA_EDC<5>
OUT4
FBA_DBI<5>
OUT4
VVVV32010
VVVV32010
VVVV32010
C182
12
C595
12
C619
12
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
C674
12
C129
12
4.7uF
10uF
6.3V
6.3V
20%
20%
0603
0805
COMMON
COMMON
VVVV32010
VVVV32010
M503D
@memory.u_mem_sd_ddr5 _x32( sym_1 ):page6_ i380
BGA170
COMMON
NORMAL
FBA_D<32>
A4
DQ0
A2
FBA_D<33>
DQ1
FBA_D<34>
B4
DQ2
FBA_D<35>
B2
DQ3
FBA_D<36>
E4
DQ4
FBA_D<37>
E2
DQ5
FBA_D<38>
F4
DQ6
FBA_D<39>
F2
DQ7
C2
EDC0
D2
DBI0
A10
VREFD
x16
x32
FBA_D<40>
A11
DQ8
FBA_D<41>
FBA_D<42>
FBA_D<43>
FBA_D<44>
FBA_D<45>
FBA_D<46>
FBA_D<47>
VVVV32010
C154
12
1uF
6.3V
10%
X5R
0402
COMMON
12
NC
A13
DQ9
NC
B11
DQ10
NC
B13
DQ11
NC
E11
DQ12
E13
DQ13
NC
F11
DQ14
NC
F13
DQ15
NC
C13
EDC1
GND
D13
DBI1
NC
D4
WCK01
D5
WCK01
VVVV32010
VVVV32010
VVVV32010
VVVV32010
C150
12
C620
12
C151
12
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
C569
12
C653
C145
12
10uF
6.3V
20%
0805
COMMON
VVVV32010
47uF
47uF
4V
4V
20%
20%
0805
0805
COMMON
COMMON
VVVV32010
VVVV32010
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
GND
C E
48
Fba_D<48>
49
Fba_D<49>
50
Fba_D<50>
51
Fba_D<51>
52
Fba_D<52>
53
Fba_D<53>
54
Fba_D<54>
55
Fba_D<55>
FBA_EDC<6>
OUT4
FBA_DBI<6>
OUT4
56
Fba_D<56>
57
Fba_D<57>
58
Fba_D<58>
59
Fba_D<59>
Fba_D<60>
61
Fba_D<61>
62
Fba_D<62>
63
Fba_D<63>
FBA_EDC<7>
OUT4
FBA_DBI<7>
OUT4
FBA_WCK67
IN4
FBA_WCK67*
IN4
FBA_D<48>
FBA_D<49>
FBA_D<50>
FBA_D<51>
FBA_D<52>
FBA_D<53>
FBA_D<54>
FBA_D<55>
FBA_D<56>
FBA_D<57>
FBA_D<58>
FBA_D<59>
FBA_D<60>
FBA_D<61>
FBA_D<62>
FBA_D<63>
M503A
@memory.u_mem_sd_ddr5 _x32( sym_3 ):page6_ i420
BGA170
COMMON
NORMAL
V11
DQ16
V13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2
x32
V4
DQ24
V2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3
P4
WCK23
P5
WCK23
VVVV32010
FBA_CMD<26>
FBA_CMD<31>
FBA_CMD<23>
FBA_CMD<21>
FBA_CMD<20>
FBA_CMD<29>
FBA_CMD<30>
FBA_CMD<28>
FBA_CMD<27>
FBA_CMD<24>
FBA_CMD<25>
FBA_CMD<22>
FBA_CMD<18>
FBA_CMD<17>
V10
VREFD
x16
NC
NC
NC
NC
NC
NC
NC
NC
NC
5
4
FBA_CMD<16>
4
FBA_CMD<26>
26
4
FBA_CMD<31>
31
4
FBA_CMD<23>
23
4
FBA_CMD<21>
21
4
FBA_CMD<20>
20
4
FBA_CMD<29>
29
4
FBA_CMD<30>
30
4
FBA_CMD<28>
4
FBA_CMD<27>
27
4
FBA_CMD<24>
24
4
FBA_CMD<25>
25
4
FBA_CMD<22>
22
4
FBA_CMD<18>
18
4
FBA_CMD<17>
17
4
FBA_CLK1
IN4
FBA_CLK1*
IN4
C713
12
10nF
6.3V
10%
X5R
0402
COMMON
VVVV32010
GND GND
FBA_CMD<28>
FBA_CMD<31>
FBA_CMD<21>
FBA_CMD<16>
FBA_CMD<24>
FBA_CMD<26>
FBA_CMD<27>
FBA_CMD<18>
FBA_CMD<17>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<23>
FBA_CMD<22>
FBA_CMD<25>
FBA_CMD<29>
FBA_CMD<30>
R609
R600
40.2ohm
40.2ohm
1 %
1 %
VVVV32010
0402
0402
COMMON
COMMON
FBA_CLK1_CM
VVVV32010
C726
12
10nF
16V
X7R
0402
COMMON
VVVV32010
GND
R619
121ohm
1 2
COMMON
0402
1 %
VVVV32010
FBA_ZQ_2_B
FBA_VREFC
M503B
BGA170
COMMON
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
RFU_A12
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
J13
ZQ
J10
SEN
VVVV32010
FDBA
M503C
@memory.u_mem_sd_ddr5 _x32( sym_6 ):page6_ i479
COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
VVVV32010
GND
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
G
FBVDDQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
06_MEMORY_ FBA[ 63_32]
06_MEMORY_ FBA[ 63_32]
06_MEMORY_ FBA[ 63_32]
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
6 34
6 34
6 34
1
2
3
4
5
10
10
10
Page 7
A B C D E F G H
smd.db-x7.ru
MEMORY: FBB Partition 31..0
1
2
3
4
Fbb_D<0>
4
Fbb_D<1>
4
Fbb_D<2>
4
Fbb_D<3>
4
Fbb_D<4>
4
Fbb_D<5>
4
Fbb_D<6>
4
Fbb_D<7>
4
Fbb_D<8>
4
Fbb_D<9>
4
Fbb_D<10>
4
Fbb_D<11>
4
Fbb_D<12>
4
Fbb_D<13>
4
Fbb_D<14>
4
Fbb_D<15>
IN4
IN4
M3C
@memory.u_mem_sd_ddr5 _x32( sym_6 ):page7_ i570
M3B
@memory.u_mem_sd_ddr5 _x32( sym_5 ):page7_ i567
BGA170
COMMON
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
RFU_A12
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
FBB_ZQ_1
J13
ZQ
COMMON
J10
SEN
VVVV32010
C510
10nF
16V
10%
X7R
0402
COMMON
VVVV32010
GND GND
VVVV32010
R533
40.2ohm
1 %
0402
COMMON
0.350 0.140A
C509
12
10nF
6.3V
10%
X5R
0402
COMMON
VVVV32010
FBB_VREFC
1.05V
FBB_CMD<12>
FBB_CMD<15>
FBB_CMD<5>
FBB_CMD<0>
FBB_CMD<8>
FBB_CMD<10>
FBB_CMD<11>
FBB_CMD<2>
FBB_CMD<1>
FBB_CMD<3>
FBB_CMD<4>
FBB_CMD<7>
FBB_CMD<6>
FBB_CMD<9>
FBB_CMD<13>
FBB_CMD<14>
R216 121ohm
1 2
0402
VVVV32010
OUT 8
1 %
Fbb_Cmd<3>
4
Fbb_Cmd<0>
4
Fbb_Cmd<10>
M3D
BGA170
COMMON
NORMAL
FBB_D<0>
A4
0
1
2
3
4
6
7
FBB_EDC<0>
OUT4
FBB_DBI<0>
OUT4
8
10
11
12
13
14
15
FBB_EDC<1>
OUT4
FBB_DBI<1>
OUT4
FBB_WCK01
FBB_WCK01*
DQ0
FBB_D<1>
A2
DQ1
FBB_D<2>
B4
DQ2
FBB_D<3>
B2
DQ3
FBB_D<4>
E4
DQ4
FBB_D<5>
E2
DQ5
FBB_D<6>
F4
DQ6
FBB_D<7>
F2
DQ7
C2
EDC0
D2
DBI0
VREFD
x16
x32
FBB_D<8>
A11
DQ8
FBB_D<9>
FBB_D<10>
FBB_D<11>
FBB_D<12>
FBB_D<13>
FBB_D<14>
FBB_D<15>
NC
A13
DQ9
B11
DQ10
NC
B13
DQ11
NC
E11
DQ12
NC
E13
DQ13
NC
F11
DQ14
NC
F13
DQ15
NC
C13
EDC1
GND
D13
DBI1
NC
D4
WCK01
D5
WCK01
VVVV32010
4
4
4
4
4
4
4
4
A10
4
4
4
4
4
4
4
4
IN4
IN4
Fbb_D<16>
Fbb_D<17>
Fbb_D<18>
Fbb_D<19>
Fbb_D<20>
Fbb_D<21>
Fbb_D<22>
Fbb_D<23>
Fbb_D<24>
Fbb_D<25>
Fbb_D<26>
Fbb_D<27>
Fbb_D<28>
Fbb_D<29>
Fbb_D<30>
Fbb_D<31>
16
17
18
19
20
22
23
FBB_EDC<2>
OUT4
FBB_DBI<2>
OUT4
24
26
27
28
29
30
31
FBB_EDC<3>
OUT4
FBB_DBI<3>
OUT4
FBB_WCK23
FBB_WCK23*
IN5,10,21
FBB_D<16>
FBB_D<17>
FBB_D<18>
FBB_D<19>
FBB_D<20>
FBB_D<21>
FBB_D<22>
FBB_D<23>
FBB_D<24>
FBB_D<25>
FBB_D<26>
FBB_D<27>
FBB_D<28>
FBB_D<29>
FBB_D<30>
FBB_D<31>
GPIO10_FBVREF_SEL
V11
V13
T11
T13
N11
N13
M11
M13
R13
P13
V4
V2
T4
T2
N4
N2
M4
M2
R2
P2
P4
P5
M3A
BGA170
COMMON
NORMAL
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
EDC2
DBI2
VREFD
x32
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
VVVV32010
Use low VGSth part for Pascal
1G1D1 S
x16
NC
NC
NC
NC
NC
NC
NC
NC
NC
AO3420
G
1
VVVV32010
V10
3
D
Q34
@discrete.q_fet_n_enh(s ym_2) :page7_i518
SOT23_1 G1D 1S
COMMON
S
2
GND
4
Fbb_Cmd<15>
4
Fbb_Cmd<7>
4
Fbb_Cmd<5>
4
Fbb_Cmd<4>
4
Fbb_Cmd<13>
4
Fbb_Cmd<14>
4
Fbb_Cmd<12>
4
Fbb_Cmd<11>
4
Fbb_Cmd<8>
4
Fbb_Cmd<9>
4
Fbb_Cmd<6>
4
Fbb_Cmd<2>
4
Fbb_Cmd<1>
4
FBB_VREF_Q
FBB_CMD<0>
0
FBB_CMD<10>
10
FBB_CMD<15>
15
FBB_CMD<7>
7
FBB_CMD<5>
5
FBB_CMD<4>
4
FBB_CMD<13>
13
FBB_CMD<14>
14
FBB_CMD<12>
12
FBB_CMD<11>
11
FBB_CMD<8>
8
FBB_CMD<9>
FBB_CMD<6>
6
FBB_CMD<2>
2
FBB_CMD<1>
1
FBB_CLK0
FBB_CLK0*
IN4
VVVV32010
R532
40.2ohm
1 %
0402
COMMON
FBB_CLK0_CM
12
FBVDDQ
GND
R543
549ohm
1 %
COMMON
VVVV32010
R214
R212
931ohm
1.33k
1 %
1 %
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
GND
1.05V0.350
FBB_CMD<3>
3
4
COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
VVVV32010
GND
FBVDDQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
1
2
3
4
FBVDDQ
12
12
12
C572
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
C514
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAINK NOWNA ND UNKNOWN VIOLATIONS OR DEVIA TIONS OFI NDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKESNO WARRA NTIES, E XPRESSE D, IMPLIED, STAT UTORY OR OTHERWISE WITH RESPECT TOT HE MATERIALS OROTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
12
4.7uF
20%
X5R
0603
COMMON
VVVV32010
12
C185
C184
C539
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
C513
12
C177
12
C525
12
4.7uF
4.7uF
4.7uF
20%
20%
20%
X5R
X5R
X5R
0603
0603
0603
COMMON
COMMON
VVVV32010
COMMON
VVVV32010
VVVV32010
12
12
12
12
12
C523
C602
C538
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
C518
12
12
10uF
20%
X5R
0805
COMMON
VVVV32010
VVVV32010
12
C524
C522
C540
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
C571
C533
12
C174
12
10uF
47uF
47uF
20%
20%
20%
X5R
X5R
X5R
0805
0805
0805
COMMON
COMMON
COMMON
VVVV32010
VVVV32010
C E
GND
FDBA
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
G
Wednesday, November 12, 201 4
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
07_MEMORY_ FBB[ 31_0]
07_MEMORY_ FBB[ 31_0]
07_MEMORY_ FBB[ 31_0]
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
H
7 34
7 34
7 34
4
5
10
10
10
Page 8
A B C D E F G H
smd.db-x7.ru
MEMORY: FBB Partition 63..32
1
2
M502B
@memory.u_mem_sd_ddr5 _x32( sym_5 ):page8_ i498
FBB_ZQ_2_B
FBB_VREFC
BGA170
COMMON
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
RFU_A12
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
J13
ZQ
J10
SEN
VVVV32010
FDBA
3
FBB_D<32>
Fbb_D<32>
Fbb_D<33>
Fbb_D<34>
Fbb_D<35>
Fbb_D<36>
Fbb_D<37>
Fbb_D<38>
Fbb_D<39>
Fbb_D<40>
Fbb_D<41>
Fbb_D<42>
Fbb_D<43>
Fbb_D<44>
Fbb_D<45>
Fbb_D<46>
Fbb_D<47>
VVVV32010
32
FBB_D<33>
33
FBB_D<34>
34
FBB_D<35>
35
FBB_D<36>
36
FBB_D<37>
37
FBB_D<38>
38
FBB_D<39>
FBB_EDC<4>
OUT4
FBB_DBI<4>
OUT4
FBB_D<40>
40
FBB_D<41>
41
FBB_D<42>
42
FBB_D<43>
FBB_D<44>
44
FBB_D<45>
45
FBB_D<46>
46
FBB_D<47>
47
FBB_EDC<5>
OUT4,8
FBB_DBI<5>
OUT4,8
VVVV32010
VVVV32010
VVVV32010
VVVV32010
C541
12
C169
12
C521
12
12
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
C535
12
C537
12
4.7uF
10uF
6.3V
6.3V
X5R
X5R
0603
0805
COMMON
COMMON
VVVV32010
VVVV32010
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
FBVDDQ
12
5
VVVV32010
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAINK NOWNA ND UNKNOWN VIOLATIONS OR DEVIA TIONS OFI NDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKESNO WARRA NTIES, E XPRESSE D, IMPLIED, STAT UTORY OR OTHERWISE WITH RESPECT TOT HE MATERIALS OROTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
4
4
4
FBB_WCK45
IN4
FBB_WCK45*
VVVV32010
VVVV32010
VVVV32010
C548
12
C547
12
C166
12
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
C171
4.7uF
6.3V
X5R
0603
COMMON
COMMON
C172
12
C534
12
4.7uF
4.7uF
6.3V
6.3V
X5R
X5R
0603
0603
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
M502D
@memory.u_mem_sd_ddr5 _x32( sym_1 ):page8_ i401
BGA170
COMMON
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0
A10
VREFD
x16
x32
A11
DQ8
NC
A13
DQ9
NC
B11
DQ10
NC
B13
DQ11
E11
DQ12
NC
E13
DQ13
NC
F11
DQ14
NC
F13
DQ15
NC
C13
EDC1
GND
D13
DBI1
NC
4,8 4,8
4,8 4,8
D4
WCK01
D5
WCK01
VVVV32010
VVVV32010
C519
1uF
6.3V
10%
X5R
0402
COMMON
12
VVVV32010
C155
12
C179
12
12
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C170
C175
12
C141
12
10uF
47uF
6.3V
X5R
0805
COMMON
47uF
4V
4V
X5R
X5R
0805
0805
COMMON
COMMON
VVVV32010
VVVV32010
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
C520
1uF
6.3V
10%
X5R
0402
COMMON
GND
C E
Fbb_D<48>
Fbb_D<49>
Fbb_D<50>
Fbb_D<51>
Fbb_D<52>
Fbb_D<53>
Fbb_D<54>
Fbb_D<55>
Fbb_D<56>
Fbb_D<57>
Fbb_D<58>
Fbb_D<59>
Fbb_D<60>
Fbb_D<61>
Fbb_D<62>
Fbb_D<63>
IN4
FBB_WCK67
FBB_WCK67*
48
49
50
51
52
53
54
OUT4
OUT4
56
57
58
60
61
62
63
OUT4,8
OUT4,8
FBB_EDC<6>
FBB_DBI<6>
FBB_EDC<7>
FBB_DBI<7>
@memory.u_mem_sd_ddr5 _x32( sym_3 ):page8_ i441
FBB_D<48>
FBB_D<49>
FBB_D<50>
FBB_D<51>
FBB_D<52>
FBB_D<53>
FBB_D<54>
FBB_D<55>
FBB_D<56>
FBB_D<57>
FBB_D<58>
FBB_D<59>
FBB_D<60>
FBB_D<61>
FBB_D<62>
FBB_D<63>
M502A
BGA170
COMMON
NORMAL
V11
DQ16
V13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2
VREFD
x16
x32
V4
DQ24
V2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3
P4
WCK23
P5
WCK23
VVVV32010
Fbb_Cmd<19>
Fbb_Cmd<16>
Fbb_Cmd<26>
Fbb_Cmd<31>
Fbb_Cmd<23>
Fbb_Cmd<21>
Fbb_Cmd<20>
Fbb_Cmd<29>
Fbb_Cmd<30>
Fbb_Cmd<28>
Fbb_Cmd<27>
Fbb_Cmd<24>
Fbb_Cmd<25>
Fbb_Cmd<22>
V10
Fbb_Cmd<18>
NC
Fbb_Cmd<17>
NC
NC
NC
NC
NC
NC
NC
NC
FBB_CMD<19>
19
4
FBB_CMD<16>
16
4
FBB_CMD<26>
26
4
FBB_CMD<31>
31
4
FBB_CMD<23>
4
FBB_CMD<21>
21
4
FBB_CMD<20>
20
4
FBB_CMD<29>
29
4
FBB_CMD<30>
30
4
FBB_CMD<28>
28
4
FBB_CMD<27>
27
4
FBB_CMD<24>
24
4
FBB_CMD<25>
25
4
FBB_CMD<22>
4
FBB_CMD<18>
18
4
FBB_CMD<17>
17
4
FBB_CLK1
IN4
4
FBB_CLK1*
IN7
C511
12
10nF
6.3V
10%
X5R
0402
COMMON
VVVV32010
GND GND
FBB_CLK1_CM
VVVV32010
R534
40.2ohm
1 %
0402
COMMON
GND
C512
12
10nF
10%
X7R
0402
COMMON
VVVV32010
R536 121ohm
1 2
0402
1 %
VVVV32010
FBB_CMD<28>
FBB_CMD<31>
FBB_CMD<21>
FBB_CMD<16>
FBB_CMD<24>
FBB_CMD<26>
FBB_CMD<27>
FBB_CMD<18>
FBB_CMD<17>
FBB_CMD<19>
FBB_CMD<20>
FBB_CMD<23>
FBB_CMD<22>
FBB_CMD<25>
FBB_CMD<29>
FBB_CMD<30>
VVVV32010
R535
40.2ohm
1 %
0402
COMMON
COMMON
M502C
BGA170
COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
VVVV32010
GND
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
G
Wednesday, November 12, 201 4
FBVDDQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
08_MEMORY_ FBB[ 63_32]
08_MEMORY_ FBB[ 63_32]
08_MEMORY_ FBB[ 63_32]
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
8 34
8 34
8 34
1
2
3
4
5
10
10
10
Page 9
A B C D E F G H
smd.db-x7.ru
MEMORY: GPU Partition C/D
1
10
Fbc_D<0>
10
Fbc_D<1>
10
Fbc_D<2>
10
Fbc_D<3>
10
Fbc_D<4>
10
Fbc_D<5>
10
Fbc_D<6>
10
Fbc_D<7>
10
Fbc_D<8>
10
Fbc_D<9>
10
Fbc_D<10>
10
Fbc_D<11>
10
Fbc_D<12>
10
Fbc_D<13>
10
Fbc_D<14>
10
Fbc_D<15>
10
Fbc_D<16>
10
Fbc_D<17>
10
Fbc_D<18>
10
Fbc_D<19>
10
Fbc_D<20>
10
Fbc_D<21>
10
2
3
4
Fbc_D<22>
10
Fbc_D<23>
10
Fbc_D<24>
10
Fbc_D<25>
10
Fbc_D<26>
10
Fbc_D<27>
10
Fbc_D<28>
10
Fbc_D<29>
10
Fbc_D<30>
10
Fbc_D<31>
11
Fbc_D<32>
11
Fbc_D<33>
11
Fbc_D<34>
11
Fbc_D<35>
11
Fbc_D<36>
11
Fbc_D<37>
11
Fbc_D<38>
11
Fbc_D<39>
11
Fbc_D<40>
11
Fbc_D<41>
11
Fbc_D<42>
11
Fbc_D<43>
11
Fbc_D<44>
11
Fbc_D<45>
11
Fbc_D<46>
11
Fbc_D<47>
11
Fbc_D<48>
11
Fbc_D<49>
11
Fbc_D<50>
11
Fbc_D<51>
11
Fbc_D<52>
11
Fbc_D<53>
11
Fbc_D<54>
11
Fbc_D<55>
11
Fbc_D<56>
11
Fbc_D<57>
11
Fbc_D<58>
11
Fbc_D<59>
11
Fbc_D<60>
11
Fbc_D<61>
11
Fbc_D<62>
11
Fbc_D<63>
11
11
FBC_D<0>
FBC_D<1>
1
FBC_D<2>
2
FBC_D<3>
3
FBC_D<4>
4
FBC_D<5>
5
FBC_D<6>
6
FBC_D<7>
7
FBC_D<8>
8
FBC_D<9>
9
FBC_D<10>
FBC_D<11>
11
FBC_D<12>
12
FBC_D<13>
13
FBC_D<14>
14
FBC_D<15>
15
FBC_D<16>
16
FBC_D<17>
17
FBC_D<18>
18
FBC_D<19>
19
FBC_D<20>
FBC_D<21>
21
FBC_D<22>
22
FBC_D<23>
23
FBC_D<24>
24
FBC_D<25>
25
FBC_D<26>
26
FBC_D<27>
27
FBC_D<28>
28
FBC_D<29>
29
FBC_D<30>
FBC_D<31>
31
FBC_D<32>
32
FBC_D<33>
33
FBC_D<34>
34
FBC_D<35>
35
FBC_D<36>
36
FBC_D<37>
37
FBC_D<38>
38
FBC_D<39>
39
FBC_D<40>
FBC_D<41>
41
FBC_D<42>
42
FBC_D<43>
43
FBC_D<44>
44
FBC_D<45>
45
FBC_D<46>
46
FBC_D<47>
47
FBC_D<48>
48
FBC_D<49>
49
FBC_D<50>
FBC_D<51>
51
FBC_D<52>
52
FBC_D<53>
53
FBC_D<54>
54
FBC_D<55>
55
FBC_D<56>
56
FBC_D<57>
57
FBC_D<58>
58
FBC_D<59>
59
FBC_D<60>
FBC_D<61>
61
FBC_D<62>
62
FBC_D<63>
63
FBC_DBI<0>
0
OUT10
FBC_DBI<1>
1
OUT10
FBC_DBI<2>
2
OUT10
FBC_DBI<3>
3
OUT10
FBC_DBI<4>
FBC_DBI<5>
5
OUT11
FBC_DBI<6>
6
OUT11
FBC_DBI<7>
7
OUT11
FBC_EDC<0>
0
BI10
FBC_EDC<1>
1
BI10
FBC_EDC<2>
2
BI10
FBC_EDC<3>
3
BI10
FBC_EDC<4>
FBC_EDC<5>
5
BI11
FBC_EDC<6>
6
BI11
FBC_EDC<7>
7
BI11
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1D
@digital.u_gpu_gb2b_192( sym_4 ):page9_i2 034
BGA1428
COMMON
4/18 FBC
AB5
FBC_D0
AB6
FBC_D1
AC7
FBC_D2
AB4
FBC_D3
F
AA5
FBC_D4
AA4
FBC_D5
W4
FBC_D6
B
W5
FBC_D7
W1
FBC_D8
Y3
FBC_D9
C
W2
FBC_D10
W3
FBC_D11
AB1
FBC_D12
AB2
FBC_D13
AC3
FBC_D14
AB3
FBC_D15
N
V5
FBC_D16
V6
FBC_D17
V4
FBC_D18
O
T4
FBC_D19
P7
FBC_D20
R5
FBC_D21
R6
FBC_D22
T
R4
FBC_D23
P3
FBC_D24
R1
FBC_D25
R2
FBC_D26
R3
FBC_D27
U3
FBC_D28
A
V2
FBC_D29
V3
FBC_D30
V1
FBC_D31
D13
FBC_D32
V
G14
FBC_D33
E13
FBC_D34
F13
FBC_D35
A
D12
FBC_D36
E12
FBC_D37
E10
FBC_D38
D10
FBC_D39
I
B10
FBC_D40
C10
FBC_D41
A10
FBC_D42
C11
FBC_D43
L
C13
FBC_D44
A13
FBC_D45
D14
FBC_D46
B13
FBC_D47
A
D9
FBC_D48
D7
FBC_D49
G8
FBC_D50
E7
FBC_D51
B
G5
FBC_D52
F6
FBC_D53
E6
FBC_D54
D6
FBC_D55
L
C5
FBC_D56
B6
FBC_D57
C6
FBC_D58
A6
FBC_D59
E
C8
FBC_D60
C9
FBC_D61
A9
FBC_D62
B9
FBC_D63
AA6
AA1
F12
A12
AB8
AA2
H13
B12
AA7
AA3
G12
C12
W
FBC_DQM0
FBC_DQM1
U7
FBC_DQM2
I
T1
FBC_DQM3
FBC_DQM4
FBC_DQM5
H6
FBC_DQM6
T
A7
FBC_DQM7
FBC_DQS_WP0
H
FBC_DQS_WP1
T5
FBC_DQS_WP2
T2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
G
G7
FBC_DQS_WP6
B7
FBC_DQS_WP7
M
FBC_DQS_RN0
FBC_DQS_RN1
2
T6
FBC_DQS_RN2
T3
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
0
F7
FBC_DQS_RN6
C7
FBC_DQS_RN7
6
VVVV32010
FBC_CMD<0>
N6
FBC_CMD0
N5
FBC_CMD<1>
FBC_CMD1
N4
FBC_CMD2
N7
FBC_CMD3
N8
FBC_CMD4
M4
FBC_CMD5
M5
FBC_CMD6
M6
FBC_CMD7
L5
FBC_CMD8
L7
FBC_CMD9
M8
FBC_CMD10
G3
FBC_CMD11
F3
FBC_CMD12
F1
FBC_CMD13
F2
FBC_CMD14
G2
FBC_CMD15
D4
FBC_CMD16
E4
FBC_CMD17
F4
FBC_CMD18
G4
FBC_CMD19
H4
FBC_CMD20
D3
FBC_CMD21
D1
FBC_CMD22
B3
FBC_CMD23
C2
FBC_CMD24
L3
FBC_CMD25
N3
FBC_CMD26
M3
FBC_CMD27
M1
FBC_CMD28
E3
FBC_CMD29
D2
FBC_CMD30
M2
FBC_CMD31
K8
FBC_CMD32
K9
FBC_CMD33
K7
FBC_CMD34
L8
FBC_CMD35
N2
FBC_CLK0
N1
FBC_CLK0
A4
FBC_CLK1
B4
FBC_CLK1
V7
FBC_WCK01
U8
FBC_WCK01
Y8
FBC_WCKB01
W7
FBC_WCKB01
Y7
FBC_WCK23
W6
FBC_WCK23
R8
FBC_WCKB23
T7
FBC_WCKB23
E9
FBC_WCK45
F9
FBC_WCK45
H8
FBC_WCKB45
H9
FBC_WCKB45
G11
FBC_WCK67
F10
FBC_WCK67
H11
FBC_WCKB67
G10
FBC_WCKB67
P8
FBC_PLL_AVDD
C E
FBC_CMD<2>
FBC_CMD<3>
FBC_CMD<4>
FBC_CMD<5>
FBC_CMD<6>
FBC_CMD<7>
FBC_CMD<8>
FBC_CMD<9>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<12>
FBC_CMD<13>
FBC_CMD<14>
FBC_CMD<15>
FBC_CMD<16>
FBC_CMD<17>
FBC_CMD<18>
FBC_CMD<19>
FBC_CMD<20>
FBC_CMD<21>
FBC_CMD<22>
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
FBC_CMD<26>
FBC_CMD<27>
FBC_CMD<28>
FBC_CMD<29>
FBC_CMD<30>
FBC_CMD<31>
FBC_DEBUG0
FBC_DEBUG1
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBC_WCK01
FBC_WCK01*
FBC_WCK23
FBC_WCK23*
FBC_WCK45
FBC_WCK45*
FBC_WCK67
FBC_WCK67*
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
21
22
23
24
25
26
27
28
29
31
R568
1 2
0402
1 %
XXXV32010
FB_PLLVDD
C612
12
0.1uF
16V
10%
X7R
0402
COMMON
XXXV32010
GND
CKE*
FBC_CMD<30>
FBC_CMD<14>
FBC_CMD<29>
FBC_CMD<13>
RST*
10
Fbc_Cmd<0>
10
Fbc_Cmd<1>
10
Fbc_Cmd<2>
10
Fbc_Cmd<3>
10
Fbc_Cmd<4>
10
Fbc_Cmd<5>
10
Fbc_Cmd<6>
10
Fbc_Cmd<7>
10
Fbc_Cmd<8>
10
Fbc_Cmd<9>
10
Fbc_Cmd<10>
10
Fbc_Cmd<11>
10
Fbc_Cmd<12>
10
Fbc_Cmd<13>
10
Fbc_Cmd<14>
10
Fbc_Cmd<15>
11
Fbc_Cmd<16>
11
Fbc_Cmd<17>
11
Fbc_Cmd<18>
11
Fbc_Cmd<19>
11
Fbc_Cmd<20>
11
Fbc_Cmd<21>
11
Fbc_Cmd<22>
11
Fbc_Cmd<23>
11
Fbc_Cmd<24>
11
Fbc_Cmd<25>
11
Fbc_Cmd<26>
11
Fbc_Cmd<27>
11
Fbc_Cmd<28>
11
Fbc_Cmd<29>
11
Fbc_Cmd<30>
FBVDDQ
11
Fbc_Cmd<31>
60.4ohm
R570 60.4ohm
DNI
1 2
DNI0402
1 %
XXXV32010
FB_CLK
OUT 10
FB_CLK
OUT 10
FB_CLK
OUT 11
FB_CLK
OUT 11
FB_WCK
OUT 10
FB_WCK
OUT 10
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
R546
10k
5 %
COMMON
XXXV32010
R569
10k
5 %
COMMON
XXXV32010
OUT 10
OUT 11
OUT 11
OUT 11
OUT 11
IN 4,15
FBVDDQ
R573
10k
5 %
COMMON
XXXV32010
R547
10k
5 %
COMMON
XXXV32010
GND
10
GDDR5_BGA170_MIRROR
0..31 32..63
CMD0 CS*
CMD1 A3_BA3
CMD2 A2_BA0
CMD3 A4_BA2
CMD4 A5_BA1
CMD5 WE*
CMD6 A7_A8
CMD7 A6_A11
CMD8 ABI*
CMD9 A12_RFU
CMD10 A0_A10
CMD11 A1_A9
CMD12 RAS*
CMD13 RST*
CMD14 CKE*
CMD15 CAS*
CMD32
CMD34 DBG0 DBG0
CMD16 CS*
CMD17 A3_BA3
CMD18 A2_BA0
CMD19 A4_BA2
CMD20 A5_BA1
CMD21 W E*
CMD22 A7_A8
CMD23 A6_A11
CMD24 ABI *
CMD25 A12_RFU
CMD26 A0_A10
CMD27 A1_A9
CMD28 RAS*
CMD29 RST*
CMD30 CKE*
CMD31 CAS*
CMD33
CMD35 DBG1 DBG1
FDBA
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MSI
MSI
MSI
MS-V320
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
09_MEMORY_ GPU Partition C
09_MEMORY_ GPU Partition C
09_MEMORY_ GPU Partition C
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
1
2
3
4
10
10
10
Sheet ofDate:
9 34
Sheet ofDate:
9 34
Sheet ofDate:
9 34
Page 10
A B C D E F G H
smd.db-x7.ru
MEMORY: FBC Partition 31..0
1
9
Fbc_D<0>
9
Fbc_D<1>
9
Fbc_D<2>
9
Fbc_D<3>
9
Fbc_D<4>
9
Fbc_D<5>
9
Fbc_D<6>
9
Fbc_D<7>
OUT9
OUT9
9
Fbc_D<8>
9
Fbc_D<9>
9
Fbc_D<10>
9
Fbc_D<11>
9
Fbc_D<12>
9
Fbc_D<13>
9
Fbc_D<14>
9
Fbc_D<15>
9
2
3
OUT9
FBC_WCK01
IN
FBC_WCK01*
IN
M1C
@memory.u_mem_sd_ddr5 _x32( sym_6 ):page10 _i572
BGA170
M1B
@memory.u_mem_sd_ddr5 _x32( sym_5 ):page10 _i568
BGA170
COMMON
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
RFU_A12
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
FBC_ZQ_1
J13
ZQ
J10
SEN
XXXV32010
C603
10nF
16V
10%
X7R
0402
COMMON
XXXV32010
12
GND GND
XXXV32010
R567
40.2ohm
1 %
COMMON
0.350 0.140A
C617
10nF
6.3V
10%
X5R
0402
COMMON
XXXV32010
FBC_CMD<12>
FBC_CMD<15>
FBC_CMD<5>
FBC_CMD<0>
FBC_CMD<8>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<2>
FBC_CMD<1>
FBC_CMD<3>
FBC_CMD<4>
FBC_CMD<7>
FBC_CMD<6>
FBC_CMD<9>
FBC_CMD<13>
FBC_CMD<14>
OUT 11
FBC_VREFC
1.05V
R206 121ohm
1 2
0402 COMM ON
XXXV32010
1 %
FBC_CMD<3>
3
Fbc_Cmd<3>
Fbc_Cmd<0>
Fbc_Cmd<10>
Fbc_Cmd<15>
Fbc_Cmd<7>
Fbc_Cmd<5>
Fbc_Cmd<4>
Fbc_Cmd<13>
Fbc_Cmd<14>
Fbc_Cmd<12>
Fbc_Cmd<11>
Fbc_Cmd<8>
Fbc_Cmd<9>
Fbc_Cmd<6>
Fbc_Cmd<2>
Fbc_Cmd<1>
FBC_VREF_Q
FBC_EDC<2>
FBC_DBI<2>
FBC_EDC<3>
FBC_DBI<3>
FBC_D<16>
FBC_D<17>
FBC_D<18>
FBC_D<19>
FBC_D<20>
FBC_D<21>
FBC_D<22>
FBC_D<23>
FBC_D<24>
FBC_D<25>
FBC_D<26>
FBC_D<27>
FBC_D<28>
FBC_D<29>
FBC_D<30>
FBC_D<31>
GPIO10_FBVREF_SEL
M1A
@memory.u_mem_sd_ddr5 _x32( sym_3 ):page10 _i519
BGA170
COMMON
NORMAL
V11
DQ16
V13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2
VREFD
x32
V4
DQ24
V2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3
P4
WCK23
P5
WCK23
XXXV32010
Use low VGSth part for Pascal
1G1D1 S
x16
NC
NC
NC
NC
NC
NC
NC
NC
NC
AO3420
G
1
V10
3
D
Q514
@discrete.q_fet_n_enh(s ym_2) :page10_i51 8
COMMON
S
2
XXXV32010
GND
M1D
@memory.u_mem_sd_ddr5 _x32( sym_1 ):page10 _i480
BGA170
COMMON
NORMAL
FBC_D<0>
A4
0
1
2
4
5
6
7
FBC_EDC<0>
FBC_DBI<0>
8
9
10
11
12
13
14
15
FBC_EDC<1>
FBC_DBI<1>
DQ0
FBC_D<1>
A2
DQ1
FBC_D<2>
B4
DQ2
FBC_D<3>
B2
DQ3
FBC_D<4>
E4
DQ4
FBC_D<5>
E2
DQ5
FBC_D<6>
F4
DQ6
FBC_D<7>
F2
DQ7
C2
EDC0
D2
DBI0
VREFD
x16
x32
FBC_D<8>
A11
DQ8
FBC_D<9>
FBC_D<10>
FBC_D<11>
FBC_D<12>
FBC_D<13>
FBC_D<14>
FBC_D<15>
NC
A13
DQ9
NC
B11
DQ10
NC
B13
DQ11
NC
E11
DQ12
NC
E13
DQ13
NC
F11
DQ14
NC
F13
DQ15
NC
C13
EDC1
D13
DBI1
NC
D4
WCK01
D5
WCK01
XXXV32010
9
9
9
9
9
9
9
9
A10
9
9
9
9
9
9
9
9
9
IN9
IN9
Fbc_D<16>
Fbc_D<17>
Fbc_D<18>
Fbc_D<19>
Fbc_D<20>
Fbc_D<21>
Fbc_D<22>
Fbc_D<23>
Fbc_D<24>
Fbc_D<25>
Fbc_D<26>
Fbc_D<27>
Fbc_D<28>
Fbc_D<29>
Fbc_D<30>
Fbc_D<31>
FBC_WCK23
FBC_WCK23*
16
17
18
20
21
22
23
OUT9
OUT9
24
25
26
27
28
29
30
31
OUT9
IN5,7,21
9
FBC_CMD<0>
0
9
FBC_CMD<10>
9
FBC_CMD<15>
15
9
FBC_CMD<7>
7
9
FBC_CMD<5>
5
9
FBC_CMD<4>
4
9
FBC_CMD<13>
13
9
FBC_CMD<14>
14
9
FBC_CMD<12>
12
9
FBC_CMD<11>
9
FBC_CMD<8>
8
9
FBC_CMD<9>
9
9
FBC_CMD<6>
6
9
FBC_CMD<2>
2
9
FBC_CMD<1>
9
FBC_CLK0
IN9
FBC_CLK0*
IN9
XXXV32010
R571
40.2ohm
1 %
COMMON
FBC_CLK0_CM
12
FBVDDQ
R556
549ohm
GND
1 %
0402
COMMON
XXXV32010
R208
R209
1.33k
931ohm
1 %
1 %
0402
0402
COMMON
COMMON
XXXV32010
XXXV32010
GND
1.05V0.350
COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
XXXV32010
GND
FBVDDQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
1
2
3
4
FBVDDQ
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAINK NOWNA ND UNKNOWN VIOLATIONS OR DEVIA TIONS OFI NDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKESNO WARRA NTIES, E XPRESSE D, IMPLIED, STAT UTORY OR OTHERWISE WITH RESPECT TOT HE MATERIALS OROTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
12
XXXV32010
12
12
12
12
12
12
12
12
12
C576
C153
C634
C636
C580
C622
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
XXXV32010
XXXV32010
XXXV32010
C553
12
C183
C558
12
4.7uF
4.7uF
4.7uF
20%
20%
20%
X5R
X5R
X5R
0603
0603
0603
COMMON
COMMON
COMMON
XXXV32010
XXXV32010
C152
1uF
1uF
1uF
1uF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
XXXV32010
XXXV32010
XXXV32010
XXXV32010
C156
12
4.7uF
20%
X5R
0603
COMMON
XXXV32010
12
C555
12
10uF
20%
X5R
0805
COMMON
XXXV32010
XXXV32010
12
C583
C575
C149
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
XXXV32010
XXXV32010
XXXV32010
C157
C611
12
C532
12
10uF
47uF
20%
X5R
0805
COMMON
47uF
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
XXXV32010
XXXV32010
GND
C E
FDBA
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
10_MEMORY_ FBC [31_0]
10_MEMORY_ FBC [31_0]
10_MEMORY_ FBC [31_0]
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
G
Wednesday, November 12, 201 4
MS-V320
MS-V320
MS-V320
4
10
10
10
Sheet ofDate:
10 34
Sheet ofDate:
10 34
Sheet ofDate:
10 34
H
Page 11
A B C D E F G H
smd.db-x7.ru
MEMORY: FBC Partition 63..32
1
2
FBC_ZQ_2_B
FBC_VREFC
FDBA
M501B
@memory.u_mem_sd_ddr5 _x32( sym_5 ):page11 _i445
BGA170
COMMON
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
RFU_A12
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
J13
ZQ
J10
SEN
XXXV32010
3
FBC_CMD<19>
19
Fbc_Cmd<19>
M501D
BGA170
COMMON
NORMAL
FBC_D<32>
A4
Fbc_D<32>
Fbc_D<33>
Fbc_D<34>
Fbc_D<35>
Fbc_D<36>
Fbc_D<37>
Fbc_D<38>
Fbc_D<39>
Fbc_D<40>
Fbc_D<41>
Fbc_D<42>
Fbc_D<43>
Fbc_D<44>
Fbc_D<45>
Fbc_D<46>
Fbc_D<47>
32
33
34
35
36
38
39
FBC_EDC<4>
BI9
FBC_DBI<4>
BI9
40
42
43
44
45
46
47
FBC_EDC<5>
BI9
FBC_DBI<5>
BI9
FBVDDQ
XXXV32010
12
C515
1uF
6.3V
10%
X5R
0402
COMMON
C163
12
12
4.7uF
20%
X5R
0603
COMMON
XXXV32010
XXXV32010
9
9
9
9
9
9
9
9
9
9
9
4
9
9
9
9
9
FBC_WCK45
IN9
FBC_WCK45*
IN9
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
DQ0
FBC_D<33>
A2
DQ1
FBC_D<34>
B4
DQ2
FBC_D<35>
B2
DQ3
FBC_D<36>
E4
DQ4
FBC_D<37>
E2
DQ5
FBC_D<38>
F4
DQ6
FBC_D<39>
F2
DQ7
C2
EDC0
D2
DBI0
A10
VREFD
x16
x32
FBC_D<40>
A11
DQ8
FBC_D<41>
FBC_D<42>
FBC_D<43>
FBC_D<44>
FBC_D<45>
FBC_D<46>
FBC_D<47>
XXXV32010
12
C517
1uF
6.3V
10%
X5R
0402
COMMON
C161
4.7uF
20%
X5R
0603
COMMON
NC
A13
DQ9
B11
DQ10
NC
B13
DQ11
NC
E11
DQ12
NC
E13
DQ13
NC
F11
DQ14
NC
F13
DQ15
NC
C13
EDC1
GND
D13
DBI1
NC
D4
WCK01
D5
WCK01
XXXV32010
XXXV32010
XXXV32010
XXXV32010
12
12
12
C544
C167
C543
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
C549
12
C551
12
4.7uF
4.7uF
20%
20%
X5R
X5R
0603
0603
COMMON
COMMON
XXXV32010
XXXV32010
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
XXXV32010
XXXV32010
XXXV32010
12
12
12
C178
C516
C168
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
10%
X5R
X5R
X5R
0402
0402
0402
COMMON
COMMON
COMMON
C560
12
C557
12
12
10uF
10uF
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
XXXV32010
XXXV32010
XXXV32010
C E
48
Fbc_D<48>
49
Fbc_D<49>
50
Fbc_D<50>
51
Fbc_D<51>
52
Fbc_D<52>
Fbc_D<53>
54
Fbc_D<54>
55
Fbc_D<55>
FBC_EDC<6>
BI9
FBC_DBI<6>
BI9
56 17
Fbc_D<56>
Fbc_D<57>
58
Fbc_D<58>
59
Fbc_D<59>
60
Fbc_D<60>
61
Fbc_D<61>
62
Fbc_D<62>
63
Fbc_D<63>
FBC_EDC<7>
BI9
FBC_DBI<7>
BI9
FBC_WCK67
IN9
FBC_WCK67*
IN9
XXXV32010
XXXV32010
12
12
C546
C545
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C582
12
C629
47uF
47uF
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
XXXV32010
GND
M501A
BGA170
COMMON
NORMAL
FBC_D<48>
V11
DQ16
FBC_D<49>
V13
DQ17
FBC_D<50>
T11
DQ18
FBC_D<51>
T13
DQ19
FBC_D<52>
N11
DQ20
FBC_D<53>
N13
DQ21
FBC_D<54>
M11
DQ22
FBC_D<55>
M13
DQ23
R13
EDC2
P13
DBI2
VREFD
x32
FBC_D<56>
V4
DQ24
FBC_D<57>
V2
DQ25
FBC_D<58>
T4
DQ26
FBC_D<59>
T2
DQ27
FBC_D<60>
N4
DQ28
FBC_D<61>
N2
DQ29
FBC_D<62>
M4
DQ30
FBC_D<63>
M2
DQ31
R2
EDC3
P2
DBI3
P4
WCK23
P5
WCK23
XXXV32010
Fbc_Cmd<16>
Fbc_Cmd<26>
Fbc_Cmd<31>
Fbc_Cmd<23>
Fbc_Cmd<21>
Fbc_Cmd<20>
Fbc_Cmd<29>
Fbc_Cmd<30>
Fbc_Cmd<28>
Fbc_Cmd<27>
Fbc_Cmd<24>
Fbc_Cmd<25>
Fbc_Cmd<22>
V10
x16
Fbc_Cmd<18>
NC
Fbc_Cmd<17>
NC
NC
NC
NC
NC
NC
NC
NC
9
FBC_CMD<16>
16
9
FBC_CMD<26>
26
9
FBC_CMD<31>
9
FBC_CMD<23>
23
9
FBC_CMD<21>
21
9
FBC_CMD<20>
20
9
FBC_CMD<29>
29
9
FBC_CMD<30>
30
9
FBC_CMD<28>
28
9
FBC_CMD<27>
27
9
FBC_CMD<24>
9
FBC_CMD<25>
25
9
FBC_CMD<22>
22
9
FBC_CMD<18>
18
9
FBC_CMD<17>
9
FBC_CLK1
IN9
FBC_CLK1*
IN9
IN10
C507
12
10nF
6.3V
10%
X5R
0402
COMMON
XXXV32010
GND GND
FBC_CLK1_CM
XXXV32010
R529
40.2ohm
1 %
0402
COMMON
GND
12
C508
10nF
16V
10%
X7R
0402
COMMON
XXXV32010
R531
1 2
0402
1 %
XXXV32010
FBC_CMD<28>
FBC_CMD<31>
FBC_CMD<21>
FBC_CMD<16>
FBC_CMD<24>
FBC_CMD<26>
FBC_CMD<27>
FBC_CMD<18>
FBC_CMD<17>
FBC_CMD<19>
FBC_CMD<20>
FBC_CMD<23>
FBC_CMD<22>
FBC_CMD<25>
FBC_CMD<29>
FBC_CMD<30>
XXXV32010
R530
40.2ohm
1 %
0402
COMMON
121ohm
COMMON
M501C
@memory.u_mem_sd_ddr5 _x32( sym_6 ):page11 _i499
BGA170
COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
XXXV32010
GND
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
G
FBVDDQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
11_MEMORY_ FBC [63_32]
11_MEMORY_ FBC [63_32]
11_MEMORY_ FBC [63_32]
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
1
2
3
4
5
10
10
10
Sheet ofDate:
11 34
Sheet ofDate:
11 34
Sheet ofDate:
11 34
Page 12
A B C D E F G H
smd.db-x7.ru
GPU PWR and GND
1
2
3
4
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1E
@digital.u_gpu_gb2b_192( sym_1 4):page12 _i76
BGA1428
COMMON
14/18 GND
BA1
GND
BA11
GND
BA14
GND
BA17
GND
BA2
GND
BA20
GND
BA23
GND
BA26
GND
BA29
GND
BA32
GND
BA35
GND
BA5
GND
BA8
GND
BB2
GND
BB3
GND
C42
GND
D11
GND
D17
GND
D20
GND
D33
GND
D35
GND
D5
GND
D8
GND
E11
GND
E14
GND
E17
GND
E20
GND
E23
GND
E35
GND
E38
GND
E41
GND
E5
GND
E8
GND
F36
GND
F39
GND
G13
GND
G22
GND
G33
GND
G38
GND
G6
GND
G9
GND
H12
GND
H16
GND
H18
GND
H21
GND
H32
GND
H34
GND
H39
GND
H41
GND
H7
GND
K35
GND
K37
GND
L12
GND
L14
GND
L16
GND
L18
GND
L20
GND
L22
GND
L24
GND
L26
GND
L28
GND
L38
GND
L39
GND
L41
GND
M11
GND
M13
GND
M15
GND
GND GND
VVVV32010
M17
GND
M19
GND
M21
GND
M23
GND
M25
GND
M27
GND
M35
GND
N12
GND
N14
GND
N16
GND
N18
GND
N20
GND
N22
GND
N24
GND
N26
GND
N28
GND
P11
GND
P13
GND
P15
GND
P17
GND
P19
GND
P2
GND
U26
GND
U28
GND
U38
GND
U4
GND
U41
GND
U5
GND
V11
GND
V13
GND
V15
GND
V17
GND
V19
GND
V21
GND
V23
GND
V25
GND
V27
GND
V8
GND
W12
GND
W14
GND
W16
GND
W18
GND
W20
GND
W22
GND
W24
GND
W26
GND
W28
GND
W8
GND
Y11
GND
Y13
GND
Y15
GND
Y17
GND
Y19
GND
Y2
GND
Y21
GND
Y23
GND
Y25
GND
Y27
GND
Y4
GND
Y5
GND
P25
GND
P27
GND
AL9
GND
AK9
GND
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
BA
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1F
@digital.u_gpu_gb2b_192( sym_1 5):page12 _i77
BGA1428
COMMON
15/18 GND
A41
GND
AA12
GND
AA14
GND
AA16
GND
AA18
GND
AA20
GND
AA22
GND
AA24
GND
AA26
GND
AA28
GND
AA8
GND
AB11
GND
AB13
GND
AB15
GND
AB17
GND
AB19
GND
AB21
GND
AB23
GND
AB25
GND
AB27
GND
AB7
GND
AC12
GND
AC14
GND
AC16
GND
AC18
GND
AC2
GND
AC20
GND
AC22
GND
AC24
GND
AC26
GND
AC28
GND
AC4
GND
AC5
GND
AD11
GND
AD13
GND
AD15
GND
AD17
GND
AD19
GND
AD21
GND
AD23
GND
AD25
GND
AD27
GND
AE12
GND
AE14
GND
AE16
GND
AE18
GND
AE20
GND
AE22
GND
AE24
GND
AE26
GND
AE28
GND
AF11
GND
AF13
GND
AF15
GND
AF17
GND
AF19
GND
AF2
GND
AF21
GND
AF23
GND
AF25
GND
AF27
GND
AF35
GND
AF41
GND
AF5
GND
AF7
GND
AG12
GND
AG14
GND
AG16
GND
AG18
GND
AG20
GND
AG22
GND
AG24
GND
AG26
GND
AG36
GND
AH11
GND
AH13
GND
AH15
GND
AH17
GND
AH19
GND
AH21
GND
AH23
GND
AH25
GND
AH35
GND
AJ2
GND
AJ38
GND
AJ39
GND
AJ41
GND
AJ5
GND
AJ7
GND
AK35
GND
AL35
GND
AM2
GND
AM38
GND
AM39
GND
GND GND
VVVV32010
AW24
GND
AW25
GND
AW27
GND
AW28
GND
AW30
GND
AW31
GND
AW33
GND
AW34
GND
AY1
GND
AY20
GND
AY23
GND
AY26
GND
AY29
GND
AY32
GND
AY35
GND
B11
GND
B14
GND
B17
GND
B20
GND
B23
GND
B32
GND
B35
GND
B38
GND
B41
GND
B42
GND
B5
GND
B8
GND
A40
GND
AM41
GND
AM5
GND
AM7
GND
AR2
GND
AR39
GND
AR41
GND
AR5
GND
AR7
GND
AT11
GND
AT14
GND
AT17
GND
AT20
GND
AT23
GND
AT26
GND
AT29
GND
AT32
GND
AV11
GND
AV14
GND
AV17
GND
AV2
GND
AV35
GND
AV5
GND
AV8
GND
AW19
GND
AW21
GND
AW22
GND
P38
GND
P39
GND
P41
GND
P5
GND
R12
GND
R14
GND
R16
GND
R18
GND
R20
GND
R22
GND
R24
GND
R26
GND
R28
GND
R35
GND
R7
GND
T11
GND
T13
GND
T15
GND
T17
GND
T19
GND
T21
GND
T23
GND
T25
GND
T27
GND
T36
GND
T8
GND
U12
GND
U14
GND
U16
GND
U18
GND
U2
GND
U20
GND
U22
GND
U24
GND
P21
GND
P23
GND
C
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1G
NVVDD NVVDD NVVDD NVVDD
@digital.u_gpu_gb2b_192( sym_1 6):page12 _i78
BGA1428
COMMON
16/18 VDD
AA11
VDD
AA13
VDD
AA15
VDD
AA17
VDD
AA19
VDD
AA21
VDD
AA23
VDD
AA25
VDD
AA27
VDD
AB12
VDD
AB14
VDD
AB16
VDD
AB18
VDD
AB20
VDD
AB22
VDD
AB24
VDD
AB26
VDD
AB28
VDD
AC11
VDD
AC13
VDD
AC15
VDD
AC17
VDD
AC19
VDD
AC21
VDD
AC23
VDD
AC25
VDD
AC27
VDD
AD12
VDD
AD14
VDD
AD16
VDD
AD18
VDD
AD20
VDD
AD22
VDD
AD24
VDD
AD26
VDD
AD28
VDD
AE11
VDD
AE13
VDD
AE15
VDD
AE17
VDD
AE19
VDD
AE21
VDD
AE23
VDD
AE25
VDD
AE27
VDD
AF12
VDD
AF14
VDD
AF16
VDD
AF18
VDD
AF20
VDD
AF22
VDD
AF24
VDD
AF26
VDD
AF28
VDD
AG11
VDD
AG13
VDD
AG15
VDD
AG17
VDD
AG19
VDD
AG21
VDD
AG23
VDD
AG25
VDD
AG27
VDD
AG28
VDD
AH12
VDD
AH14
VDD
AH16
VDD
AH18
VDD
AH20
VDD
AH22
VDD
AH24
VDD
AH26
VDD
AH27
VDD
AH28
VDD
AM34
VDD
M14
VDD
M16
VDD
M18
VDD
M20
VDD
M22
VDD
M24
VDD
M26
VDD
M28
VDD
N11
VDD
N13
VDD
N15
VDD
N17
VDD
N19
VDD
N21
VDD
N23
VDD
N25
VDD
N27
VDD
P12
VDD
P14
VDD
P16
VDD
P18
VDD
P20
VDD
P22
VDD
P24
VDD
P26
VDD
P28
VDD
R11
VDD
R13
VDD
R15
VDD
R17
VDD
Y20
VDD
Y22
VDD
Y24
VDD
Y26
VDD
Y28
VDD
VVVV32010
AN34
VDD
AN35
VDD
AP31
VDD
AP32
VDD
AP33
VDD
AP34
VDD
AP35
VDD
AP36
VDD
AR32
VDD
AR33
VDD
AR34
VDD
AR35
VDD
AR36
VDD
AR37
VDD
AT33
VDD
AT34
VDD
AT35
VDD
AT36
VDD
AT37
VDD
AT38
VDD
AT39
VDD
AU35
VDD
AU36
VDD
AU37
VDD
AU38
VDD
AU39
VDD
AU40
VDD
AU41
VDD
AU42
VDD
AV36
VDD
AV37
VDD
AV38
VDD
AV39
VDD
AV40
VDD
AV41
VDD
AW36
VDD
AW37
VDD
AW38
VDD
AW39
VDD
AW40
VDD
AW41
VDD
AW42
VDD
AY36
VDD
AY37
VDD
AY38
VDD
AY39
VDD
AY40
VDD
AY41
VDD
AY42
VDD
BA37
VDD
BA38
VDD
BA39
VDD
BA40
VDD
BA41
VDD
BA42
VDD
BB37
VDD
BB39
VDD
BB40
VDD
BB41
VDD
L11
VDD
L13
VDD
L15
VDD
L17
VDD
L19
VDD
L21
VDD
L23
VDD
L25
VDD
L27
VDD
M12
VDD
R19
VDD
R21
VDD
R23
VDD
R25
VDD
R27
VDD
T12
VDD
T14
VDD
T16
VDD
T18
VDD
T20
VDD
T22
VDD
T24
VDD
T26
VDD
T28
VDD
U11
VDD
U13
VDD
U15
VDD
U17
VDD
U19
VDD
U21
VDD
U23
VDD
U25
VDD
U27
VDD
V12
VDD
V14
VDD
V16
VDD
V18
VDD
V20
VDD
V22
VDD
V24
VDD
V26
VDD
V28
VDD
W11
VDD
W13
VDD
W15
VDD
W17
VDD
W19
VDD
W21
VDD
W23
VDD
W25
VDD
W27
VDD
Y12
VDD
Y14
VDD
Y16
VDD
Y18
VDD
FBVDDQ
A2
A27
A28
A3
AA34
AA35
AA36
AA37
AA38
AA39
AA40
AA41
AA42
AA9
AB34
AB35
AB36
AB37
AB38
AB39
AB40
AB41
AB42
AB9
AC34
AC8
AC9
AD34
AE39
B1
B2
P34
P4
P9
R34
R9
T34
T9
U34
U39
U9
V34
V9
W34
W9
Y34
Y9
AC39
AC41
AD36
B26
B29
C3
D26
D29
E2
G25
G30
H3
L2
L4
M7
W36
Y39
Y41
GND
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1H
@digital.u_gpu_gb2b_192( sym_1 7):page12 _i79
BGA1428
COMMON
17/18 FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
GND_OPT
VVVV32010
FBVDDQ_SENSE
FB_GND_PROBE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
FB_CLAMP
B27
FBVDDQ
B28
FBVDDQ
C1
FBVDDQ
C27
FBVDDQ
C28
FBVDDQ
C4
FBVDDQ
D23
FBVDDQ
D27
FBVDDQ
D28
FBVDDQ
E27
FBVDDQ
E28
FBVDDQ
E32
FBVDDQ
F27
FBVDDQ
F28
FBVDDQ
G1
FBVDDQ
G27
FBVDDQ
G28
FBVDDQ
H2
FBVDDQ
H27
FBVDDQ
H28
FBVDDQ
H5
FBVDDQ
J1
FBVDDQ
J10
FBVDDQ
J11
FBVDDQ
J12
FBVDDQ
J13
FBVDDQ
J14
FBVDDQ
J15
FBVDDQ
J16
FBVDDQ
J17
FBVDDQ
J18
FBVDDQ
J19
FBVDDQ
J2
FBVDDQ
J20
FBVDDQ
J21
FBVDDQ
J22
FBVDDQ
J23
FBVDDQ
J24
FBVDDQ
J25
FBVDDQ
J26
FBVDDQ
J27
FBVDDQ
J28
FBVDDQ
J29
FBVDDQ
J3
FBVDDQ
J30
FBVDDQ
J31
FBVDDQ
J32
FBVDDQ
J33
FBVDDQ
J34
FBVDDQ
J4
FBVDDQ
J5
FBVDDQ
J6
FBVDDQ
J7
FBVDDQ
J8
FBVDDQ
J9
FBVDDQ
K1
FBVDDQ
K2
FBVDDQ
K3
FBVDDQ
K34
FBVDDQ
K4
FBVDDQ
K5
FBVDDQ
K6
FBVDDQ
L34
FBVDDQ
L9
FBVDDQ
M34
FBVDDQ
M9
FBVDDQ
N34
FBVDDQ
N9
FBVDDQ
AR31
AR30
AJ34
H33
FB_VREF
U35
N35
Y35
FBVDDQ
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
R576
1 2
0402
1 %
R574
1 2
VVVV32010
0402
1 %
R578
1 2
VVVV32010
0402
1 %
VVVV32010
40.2ohm
COMMON
40.2ohm
COMMON
60.4ohm
COMMON
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1I
@digital.u_gpu_gb2b_192( sym_1 8):page12 _i89
BGA1428
COMMON
18/18 NC/3V3
AK34
NC
AM9
NC
AN9
NC
AT31
NC
AW15
NC
F5
NC
AT30
NC
F8
NC
AP14
NC
AP15
NC
AP16
NC
AT24
NC
AT27
NC
G39
NC
G40
NC
H10
NC
H14
NC
VVVV32010
FBVDDQ
GND
SNN_3V3AUX_NC
AH8
3V3AUX_NC
AD6
VDD33
AD7
VDD33
AD8
VDD33
AE6
VDD33
AE7
VDD33
AE8
VDD33
AF8
VDD33
AF9
VDD33
AG8
VDD33
AG9
VDD33
AH9
VDD33
AJ8
3V3_AON
AJ9
3V3_AON
GND
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
12_GPU PWR and GND
12_GPU PWR and GND
12_GPU PWR and GND
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
MS-V320
MS-V320
MS-V320
1
IOVDD
2
IOVDD
3
4
10
10
10
Sheet ofDate:
12 34
Sheet ofDate:
12 34
Sheet ofDate:
12 34
Page 13
A B C D E F G H
smd.db-x7.ru
GPU Decoupling
FBVDDQ
FBVDDQ
1
VVVV32010
VVVV32010
VVVV32010
VVVV32010
12
12
C635
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
VVVV32010
C591
12
12
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
VVVV32010
C587
12
12
4.7uF
6.3V
X5R
0603
2
COMMON
XXXV32010
XXXV32010
C590
12
C577
12
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
VVVV32010
12
12
C627
C596
0.1uF
16V
10%
X7R
0402
COMMON
C592
1uF
6.3V
10%
X5R
0402
COMMON
C630
4.7uF
6.3V
X5R
0603
COMMON
C597
0.1uF
0.1uF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
C598
12
C610
12
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
C642
12
C564
12
4.7uF
4.7uF
6.3V
6.3V
X5R
X5R
0603
0603
COMMON
COMMON
Spare
XXXV32010
C662
12
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
12
12
C594
C180
0.1uF
0.1uF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
VVVV32010
C656
12
C647
12
12
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
C565
12
C552
12
12
4.7uF
4.7uF
6.3V
6.3V
X5R
X5R
0603
0603
COMMON
COMMON
XXXV32010
C589
12
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
C138
C588
12
C618
12
1uF
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
C563
4.7uF
6.3V
X5R
0603
COMMON
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
XXXV32010
C643
12
1uF
6.3V
10%
X5R
0402
COMMON
under GPU
XXXV32010
C651
12
1uF
6.3V
10%
X5R
0402
COMMON
3
Place un der/near th e GPU
C600
12
C695
12
C585
12
C562
10uF
6.3V
20%
X5R
0805
VVVV32010
XXXV32010
12
10uF
10uF
6.3V
20%
X5R
0805
COMMON
10uF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV32010
VVVV32010
C586
12
C579
12
C561
12
C559
22uF
6.3V
20%
X5R
0805
COMMON
VVVV32010
VVVV32010
12
22uF
22uF
6.3V
20%
X5R
0805
COMMON
22uF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV32010
VVVV32010
GND
4
IOVDD
C123
12
C671
12
C733
12
C681
C666
12
C668
12
C673
12
C667
4.7uF
4.7uF
6.3V
6.3V
20%
20%
X5R
X5R
0603
0603
COMMON
COMMON
VVVV32010
VVVV32010
12
4.7uF
6.3V
20%
X5R
0603
COMMON
VVVV32010
VVVV32010
C87
12
C687
2.2uF
6.3V
20%
X5R
0402
COMMON
12
1uF
0.1uF
6.3V
16V
10%
10%
X5R
X7R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
0.1uF
0.1uF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
12
0.1uF
0.1uF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
GND
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
ASSEMBLY
PAGE DETAIL
NVVDD
NVVDD
XXXV32010
BASE LEVEL GENE RIC SCHEMATIC ONLY
GPU Decoupling
C654
330uF
COMMON
20%
2V
AL-Polyme r
3.5A@105 deg C,10 0KH z
0.006oh m
SMD_734 3
VVVV32010
VVVV32010
12
12
VVVV32010
VVVV32010
12
12
C638
0.1uF
16V
10%
X7R
0402
COMMON
C631
12
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
C649
1uF
6.3V
10%
X5R
1005_BG A
COMMON
C709
1uF
6.3V
10%
X5R
1005_BG A
COMMON
near the GP U
12
C747
10uF
6.3V
20%
X5R
0805
COMMON
C655
330uF
COMMON
20%
2V
AL-Polyme r
3.5A@105 deg C,10 0KH z
0.006oh m
SMD_734 3
VVVV32010
VVVV32010
C657
1uF
10%
X5R
0402
COMMON
12
VVVV32010
12
VVVV32010
VVVV32010
12
C623
12
1uF
6.3V
10%
X5R
1005_BG A
COMMON
VVVV32010
VVVV32010
under GPU
GND
VVVV32010
VVVV32010
VVVV32010
C698
12
C691
12
C669
12
1uF
1uF
10%
X5R
0402
COMMON
C689
0.1uF
16V
10%
X7R
0402
COMMON
C640
1uF
6.3V
10%
X5R
0402
COMMON
C701
1uF
6.3V
10%
X5R
1005_BG A
COMMON
12
C794
22uF
6.3V
20%
X5R
0805
COMMON
1uF
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
12
C670
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
C648
12
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
VVVV32010
C690
12
1uF
6.3V
10%
X5R
1005_BG A
COMMON
C658
12
1uF
6.3V
10%
X5R
1005_BG A
COMMON
VVVV32010
12
C749
47uF
6.3V
20%
X5R
1206
COMMON
VVVV32010
12
12
C607
C641
0.1uF
0.1uF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
C616
12
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
GND
VVVV32010
VVVV32010
C613
12
C606
12
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
1005_BG A
1005_BG A
COMMON
COMMON
C708
12
C710
12
1uF
6.3V
10%
X5R
1005_BG A
COMMON
VVVV32010
12
1uF
6.3V
10%
X5R
1005_BG A
COMMON
VVVV32010
VVVV32010
12
C744
47uF
4V
20%
X5R
0805
COMMON
VVVV32010
NVVDD
VVVV32010
C628
12
22uF
6.3V
20%
X5R
0805
COMMON
VVVV32010
C615
12
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
C688
12
1uF
6.3V
X5R
0402
COMMON
12
12
12
C675
C697
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
C624
1uF
6.3V
10%
X5R
1005_BG A
COMMON
GND
C682
0.1uF
0.1uF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
Combined (Maxwell)
GND
FDBA
1
near the GP U
VVVV32010
under GPU
C707
12
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
VVVV32010
VVVV32010
C614
12
C692
12
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
C663
12
C605
12
1uF
0.1uF
6.3V
16V
X5R
X7R
0402
0402
COMMON
COMMON
12
C706
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
NVVDD
SVVDD
VVVV32010
C626
12
C644
12
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
C676
12
C625
12
1uF
1uF
6.3V
6.3V
X5R
X5R
0402
0402
COMMON
COMMON
Under GPU
90uF + 1x 330uF
32uF
122uF + 1x 330uF
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
13_GPU Decoupling
13_GPU Decoupling
13_GPU Decoupling
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
12
12
Near GPU
88uF
22uF
110uF
VVVV32010
C604
1uF
6.3V
10%
X5R
0402
COMMON
VVVV32010
C645
1uF
6.3V
X5R
0402
COMMON
MS-V320
MS-V320
MS-V320
VVVV32010
C735
12
22uF
6.3V
20%
X5R
0805
COMMON
VVVV32010
VVVV32010
C608
12
C700
12
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
VVVV32010
C664
12
1uF
6.3V
X5R
0402
COMMON
2
COMMON
VVVV32010
C699
12
1uF
6.3V
X5R
0402
COMMON
GND
3
4
5
10
10
10
Sheet ofDate:
13 34
Sheet ofDate:
13 34
Sheet ofDate:
13 34
Page 14
DACA Interface
smd.db-x7.ru
1
2
3
4
A B C D E F G H
NV3V3
IN15
GENERIC_SEZ1
R620
56ohm
DACA_I2C_SCL_R
1 2
GENERIC_SEZ1
GENERIC_SEZ1
FB_IFP_ABCDEF_PLLVDD
IN15,16,18,19
VVVV32010
R176
0ohm
0402
COMMON
VVVV32010
VVVV32010
C757
12
C720
12
0.1uF
0.1uF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
DACA_VDD
VVVV32010
VVVV32010
C124
12
C125
12
0.1uF
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
16V
C736
12
10%
0.1uF
X7R
16V
0402
COMMON
X7R
0402
COMMON
VVVV32010
GND
GND
DACA_VREF
DACA_RSET
R662
124ohm
1 %
COMMON
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1J
@digital.u_gpu_gb2b_192( sym_5 ):page14_ i659
BGA1428
COMMON
5/18 DAC
AR18
DACA_VDD
AT18
DACA_VREF
AT19
DACA_RSET
VVVV32010
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
I2CA_SCL
I2CA_SDA
DACA_I2C_SCL
AU7
DACA_I2C_SDA
AY5
DACA_HSYNC
AU18
DACA_VSYNC
AV18
DACA_RED
BB16
BA16
BB15
DACA_GREEN
DACA_BLUE
DAC_RGB
DAC_RGB
DAC_RGB
GENERIC_SEZ1
GENERIC_SEZ1
0402
5 %
VVVV32010
R640
1 2
0402
5 %
VVVV32010
IN15
COMMON
GENERIC_SEZ1
56ohm
DACA_I2C_SDA_R
COMMON
XXXV32010
Q11B
G
5
@discrete.q_fet_n_enh(s ym_2) :page14_i68 1
SOT363
S3D
nv_res
4
R57
0ohm
1 2
COMMON
0402
0.05 ohm
XXXV32010
R777
NV3V3
2.2k
5 %
VVVV32010
COMMON
R776
2.2k
5 %
0402
COMMON
XXXV32010
XXXV32010
G
2
S6D
1
R65
1 2
0402
0.05 ohm
VVVV32010
Q11A
@discrete.q_fet_n_enh(s ym_2) :page14_i68 2
SOT363
COMMON
nv_res
0ohm
COMMON
5V
XXXV32010
3
4 5
GND
D503B
@discrete.d_3pin_ac (sy m_1):page1 4_i669
0.215A
100V
SC70-6 _D UAL
COMMON
6
VVVV32010
R58
75ohm
1 %
0402
COMMON
GND
VVVV32010
R59
75ohm
1 %
COMMON
GND
VVVV32010
R55
75ohm
1 %
0402
COMMON
GND
DACA_I2C_SCL_R1
GENERIC_SEZ1
R52
2.2k
5 %
COMMON
R60
2.2k
5 %
0402
COMMON
DACA_I2C_SDA_R1
GENERIC_SEZ1
5V
XXXV32010
D503A
@discrete.d_3pin_ac (sy m_1):page1 4_i672
0.215A
100V
SC70-6 _D UAL
1 2
GND
VVVV32010
C61
12
22pF
50V
5%
C0G
0402
COMMON
GND
VVVV32010
C62
12
22pF
50V
C0G
0402
COMMON
GND
VVVV32010
C57
12
22pF
50V
5%
C0G
0402
COMMON
GND
LB1
0.068uH
COMMON06 03
VVVV32010
VVVV32010
5V
VVVV32010
LB2
0.068uH
COMMON
0603
VVVV32010
L1
0.027uH
COMMON06 03
XXXV32010
VVVV32010
12
GND
L5
0.027uH
COMMON06 03
XXXV32010
VVVV32010
12
GND
L2
0.027uH
COMMON06 03
VVVV32010
L3
0.027uH
COMMON
0603
VVVV32010
VVVV32010
L4
0.027uH
COMMON06 03
GENERIC_SEZ1
DACA_I2C_SCL_DVI
C50
12
2.2pF
50V
0.1pF
0402
COMMON
VVVV32010
GND
GENERIC_SEZ1
VVVV32010
C59
12
2.2pF
50V
0.1pF
C0G
0402
COMMON
GND
GENERIC_SEZ1
DACA_HS_DVI
C55
2.2pF
0.1pF
C0G
0402
COMMON
DACA_VS_DVI
C56
2.2pF
50V
0.1pF
C0G
0402
COMMON
DAC_RGB
DACA_RED_DVI
XXXV32010
C53
12
2.2pF
50V
0.1pF
C0G
0402
COMMON
GND
DAC_RGB
DACA_GREEN_DVI
XXXV32010
C54
12
2.2pF
50V
C0G
0402
COMMON
GND
DAC_RGB
DACA_BLUE_DVI
XXXV32010
C52
12
2.2pF
50V
0.1pF
C0G
0402
COMMON
GND
BI 15
DACA_I2C_SDA_DVI
OUT 15
OUT 15
OUT 15
1
15
2
3
15
4
15
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
FDBA
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MSI
MSI
MSI
MS-V320
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
14_DACA Interf ace
14_DACA Interf ace
14_DACA Interf ace
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
10
10
10
Sheet ofDate:
14 34
Sheet ofDate:
14 34
Sheet ofDate:
14 34
Page 15
A B C D E F G H
smd.db-x7.ru
IFPAB DVI-I-DL
BI14
DACA_I2C_SDA_DVI
1
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1K
@digital.u_gpu_gb2b_192( sym_6 ):page15_ i507
BGA1428
COMMON
6/18 IFPAB
GK106 GM206
NC
NC
IFPAB_RSET
IFPAB_PLLVDD
IFPAB_IOVDD
IFPAB_IOVDD
IFPB_IOVDD
IFPB_IOVDD
NC
NC
DPA_L3
DPA_L2
DPA_L1
DPA_L0
DPB_L3
DPB_L2
DPB_L1
DPB_L0
FB_PLLVDD
IN 4,9
IOVDD
LB502
30ohm
COMMON
BEAD_060 3
XXXV32010
R174
1 2
Unstuff for Kepler
VVVV32010
12
PEX_VDD
Kepler
R173
0ohm
XXXV32010
0603
COMMON
VVVV32010
0ohm
COMMON0402
OUT 14,16,18,19
3V3_BLK
XXXV32010
R171
0ohm
Kepler
0402
COMMON
IFPAB_IOVDD
VVVV32010
C121
C718
12
4.7uF
1uF
6.3V
6.3V
20%
10%
X5R
X5R
0603
0402
COMMON
COMMON
Kepler
R661
1k
IFPAB_RSET
GND
1 2
0402
VVVV32010
IFPAB_PLLVDD
VVVV32010
C717
12
0.1uF
16V
10%
X7R
0402
COMMON
1 %
AT16
COMMON
AR17
VVVV32010
VVVV32010
C719
12
C128
12
1uF
0.1uF
6.3V
16V
10%
10%
X5R
X7R
0402
0402
COMMON
COMMON
GND
AT15
AR16
AR14
AR15
VVVV32010
C127
12
0.1uF
16V
10%
X7R
0402
COMMON
GND
PEX_VDD
Maxwell
FB_IFP_ABCDEF_PLLVDD
VVVV32010
R172
0ohm
Maxwell
0402
COMMON
R579
0ohm
VVVV32010
0603
COMMON
Colayout
2
3
IFPAB
VVVV32010
NV3V3
VVVV32010
R63
10k
5 %
0402
GPIO14_IFPA_HPD
4
OUT21
COMMON
3
Q520
@discrete.q_npn(s ym_1):pag e15_i37 6
SOT23_1 B1C 1E
COMMON
2
GND
C
B
1
E
VVVV32010
R62
100k
1 2
1
COMMON
0402
5 %
VVVV32010
VVVV32010
R61
100k
5 %
0402
COMMON
GND GND GND
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
BI14
nv_res
C962
C931
C929
C927
D
G
1
S
R613
0ohm
1 2
COMMON
0402
0.05 ohm
XXXV32010
VVVV32010
0.1uF
1 2
COMMON
VVVV32010
0.1uF
1 2
COMMON
VVVV32010
0.1uF
1 2
COMMON
VVVV32010
0.1uF
1 2
COMMON
VVVV32010
C935
0.1uF
1 2
COMMON
VVVV32010
C926
0.1uF
1 2
COMMON
VVVV32010
C948
0.1uF
1 2
COMMON
IFPAB_TERM_CM
3
Q522
VVVV32010
@discrete.q_fet_n_enh(s ym_2) :page15_i38 4
SOT23_1 G1D 1S
COMMON
2
GND
0.406
0V
R645
1 2
0402
C957
1 2
C933
1 2
C930
1 2
C928
1 2
C944
1 2
C925
1 2
C952
1 2
IFPA_AUX_SDA
AP10
IFPA_AUX_SDA
IFPA_AUX_SCL
AP11
IFPA_AUX_SCL
AP12
IFPB_AUX_SDA
AP13
IFPB_AUX_SCL
LVDS/DVI/HDMIDP
DVIA_HPD_RDVIA_HPD_R_Q
C E
IFPAB_TXC*
BB10
IFPA_TXC
IFPAB_TXC
BB9
IFPA_TXC
IFPAB_TXD0*
BA9
IFPA_TXD0
IFPAB_TXD0
AY9
IFPA_TXD0
IFPAB_TXD1*
BB13
IFPA_TXD1
IFPAB_TXD1
BB12
IFPA_TXD1
IFPAB_TXD2*
AY10
IFPA_TXD2
IFPAB_TXD2
BA10
IFPA_TXD2
BA12
IFPA_TXD3
AY12
IFPA_TXD3
AV16
IFPB_TXC
AU16
IFPB_TXC
IFPAB_TXD4*
BA13
IFPB_TXD4
IFPAB_TXD4
AY13
IFPB_TXD4
IFPAB_TXD5*
AW13
IFPB_TXD5
IFPAB_TXD5
AY14
IFPB_TXD5
IFPAB_TXD6*
AY15
IFPB_TXD6
IFPAB_TXD6
AW14
IFPB_TXD6
AU15
IFPB_TXD7
AV15
IFPB_TXD7
PLACE CLOSE
TO CONNECTOR
R51
0ohm
1 2
COMMON0603
VVVV32010
VVVV32010
C63
12
220pF
50V
5%
0402
COMMON
GENERIC_SEZ1
GENERIC_SEZ1
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
XXXV32010
C58
12
220pF
50V
5%
0402
DNI
NV3V3
1G1D1 S
nv_res
XXXV32010
0ohm
DACA_I2C_SDA_R
DACA_I2C_SCL_R
COMMON
0.05 ohm
0.1uF
COMMON
VVVV32010
0.1uF
COMMON
VVVV32010
0.1uF
COMMON
VVVV32010
0.1uF
COMMON
VVVV32010
DP_SIGNALS
0.1uF
DP_SIGNALS
COMMON
VVVV32010
DP_SIGNALS
0.1uF
DP_SIGNALS
COMMON
VVVV32010
DP_SIGNALS
0.1uF
DP_SIGNALS
COMMON
VVVV32010
R833
499ohm
COMMON
0402
1 %
R830
499ohm
VVVV32010
COMMON
0402
1 %
R795
499ohm
VVVV32010
COMMON
0402
1 %
R799
499ohm
VVVV32010
COMMON
0402
1 %
R786
499ohm
VVVV32010
COMMON
0402
1 %
R790
499ohm
VVVV32010
COMMON
0402
1 %
R780
499ohm
VVVV32010
COMMON
0402
1 %
R783
499ohm
VVVV32010
COMMON
0402
1 %
R804
499ohm
VVVV32010
COMMON
0402
1 %
R808
499ohm
VVVV32010
COMMON
0402
1 %
R779
499ohm
VVVV32010
COMMON
0402
1 %
R778
499ohm
VVVV32010
COMMON
0402
1
1 %
R812
499ohm
VVVV32010
COMMON
0402
1 %
R824
499ohm
VVVV32010
COMMON
0402
1 %
VVVV32010
BI 14
14
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
IFPAB_TXC_C*
12
IFPAB_TXC_C
12
IFPAB_TXD0_C*
12
IFPAB_TXD0_C
12
IFPAB_TXD1_C*
12
IFPAB_TXD1_C
12
IFPAB_TXD2_C*
12
IFPAB_TXD2_C
12
IFPAB_TXD4_C*
12
IFPAB_TXD4_C
12
IFPAB_TXD5_C*
12
IFPAB_TXD5_C
12
IFPAB_TXD6_C*
12
IFPAB_TXD6_C
12
FDBA
IN14
IN14
IN14
IN14
IN14
IFPAB_TXD0_C*
IFPAB_TXD0_C
IFPAB_TXD1_C*
IFPAB_TXD1_C
IFPAB_TXD2_C*
IFPAB_TXD2_C
IFPAB_TXD4_C*
IFPAB_TXD4_C
IFPAB_TXD5_C*
IFPAB_TXD5_C
IFPAB_TXD6_C*
IFPAB_TXD6_C
DACA_I2C_SCL_DVI
IFPAB_TXC_C*
IFPAB_TXC_C
DACA_VS_DVI
DVIA_HPD_C
DACA_RED_DVI
DACA_GREEN_DVI
DACA_BLUE_DVI
DACA_HS_DVI
DDC_5V
C49
12
4.7nF
16V
10%
X5R
0402
SHIELD1
DNI
25
SHIELD2
XXXV32010
GND
26
SHIELD3
27
SHIELD4
28
TX0-
17
TX0+
18
TX1-
9
TX1+
10
TX2-
1
TX2+
2
SHLD24
3
SHLD13
11
SHLD05
19
TX3-
12
TX3+
13
TX4-
4
TX4+
5
TX5-
20
TX5+
21
DDCC
6
DDCD
7
VDDC
14
GND
15
SHLDC
22
TXC-
24
TXC+
23
VSYNC
8
HPD
16
R
C1
G
C2
B
C3
AGND1
C5
AGND2
C5A
HSYNC
C4
SHIELD5
29
SHIELD6
30
SHIELD7
31
SHIELD8
32
SHIELD9
33
GND
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
15_IFPAB DVI-I -DL
15_IFPAB DVI-I -DL
15_IFPAB DVI-I -DL
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
MS-V320
MS-V320
MS-V320
J6
VVVV32010
@electro_mechanic.c on_dv i_i(sy m_8):page15 _i508
DVI_I_(SLIM_ )SHL D_ B
DVI_I_TALL_ 9SH LD
COMMON
Sheet ofDate:
15 37
Sheet ofDate:
15 37
Sheet ofDate:
15 37
1
2
3
4
34
34
34
Page 16
A B C D E F G H
smd.db-x7.ru
Page18: IFPEF with IFPE DP
1
2
VVVV32010
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1L
@digital.u_gpu_gb2b_192( sym_9 ):page16_ i431
BGA1428
COMMON
9/18 IFPEF
R594
1k
IFPEF_RSET
1 2
0402
COMMON
VVVV32010
GND
FB_IFP_ABCDEF_PLLVDD
3
4
IN14,15,18,19
PEX_VDD
VVVV32010
VVVV32010
C752
12
4.7uF
6.3V
20%
X5R
0603
COMMON
VVVV32010
C714
12
C763
12
1uF
0.1uF
6.3V
16V
10%
10%
X5R
X7R
0402
0402
COMMON
COMMON
AR8
1 %
12
GND
IFPEF_RSET
AT8
IFPEF_PLLVDD
C716
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
AN7
IFPEF_IOVDD
AN8
IFPEF_IOVDD
AP7
IFPF_IOVDD
AP8
IFPF_IOVDD
GND
DVI-DL DP
IFPE
DVI-DL DVI/HDMI DP
TXD3
TXD3
TXD4
TXD4
TXD5
IFPF
TXD5
DVI/HDMI
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPE_AUX_SDA
IFPE_AUX_SCL
IFPF_AUX_SDA
IFPF_AUX_SCL
AW4
AY4
AU2
IFPE_L3
AU3
IFPE_L3
AT1
IFPE_L2
AU1
IFPE_L2
AW1
IFPE_L1
AY2
IFPE_L1
AT3
IFPE_L0
AT2
IFPE_L0
AY3
BA3
AU9
IFPF_L3
AU8
IFPF_L3
AY8
IFPF_L2
AW8
IFPF_L2
AW9
IFPF_L1
AV9
IFPF_L1
AV10
IFPF_L0
AU10
IFPF_L0
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
IFPE_AUX*
IFPE_AUX
IFPE_L3*
IFPE_L3
IFPE_L2*
IFPE_L2
IFPE_L1*
IFPE_L1
IFPE_L0*
IFPE_L0
IFPF_AUX*
IFPF_AUX
IFPF_L3*
IFPF_L3
IFPF_L2*
IFPF_L2
IFPF_L1*
IFPF_L1
IFPF_L0*
IFPF_L0
Two cases to be considered:
1. DP AUX to DP connect or: AUX AC coupled
2. DP AUX to DP-DVI dongle: AUX pass t hrough
R862
100k
5 %
0402
COMMON
VVVV32010
GND
GENERIC_DEZ1IFPE_AUX_C
GENERIC_DEZ1IFPE_AUX_C
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
NV3V3
R54
10k
5 %
0402
COMMON
VVVV32010
BI 17
BI 17
BI 17
BI 17
BI 17
BI 17
BI 17
BI 17
BI 17
BI 17
GPIO18_IFPE_HPD
OUT21
1
S6D
1
S6D
G
2
G
2
SOT23_1 B1C 1E
IFPE_AUX_BYP*
Q528A
@discrete.q_fet_n_enh(s ym_2) :page16_i44 5
SOT363
COMMON
VVVV32010
VVVV32010
Q526A
@discrete.q_fet_n_enh(s ym_2) :page16_i44 7
SOT363
COMMON
IFPE_AUX_BYP
R851
100k
5 %
0402
COMMON
VVVV32010
GND
VVVV32010
C12 0.1uF
1 2
COMMON
VVVV32010
C18 0.1uF
1 2
COMMON
VVVV32010
C37 0.1uF
1 2
COMMON
VVVV32010
C44 0.1uF
1 2
COMMON
3
C
Q521
@discrete.q_npn(s ym_1):pag e16_i32 6
1
2 E
VVVV32010
GND
C965 0.1uF
1 2
0402
16V
10%
X7R
COMMON
VVVV32010
GENERIC_DEZ1
Q528B
4
@discrete.q_fet_n_enh(s ym_2) :page16_i44 4
SOT363
COMMON
S3D
VVVV32010
G
5
VVVV32010
G
5
Q526B
@discrete.q_fet_n_enh(s ym_2) :page16_i44 6
D
S
SOT363
COMMON
4
3
GENERIC_DEZ1
C966
0.1uF
1 2
0402
16V
10%
X7R
COMMON
VVVV32010
C16 0.1uF
1 2
COMMON
VVVV32010
C27 0.1uF
1 2
COMMON
VVVV32010
C41 0.1uF
1 2
COMMON
VVVV32010
C46 0.1uF
1 2
COMMON
VVVV32010
Hotplug Detection PLACE CLOSE
not found
1B1C1E
B
R53
100k
1 2
0402
COMMON
5 %
VVVV32010
R56
100k
5 %
0402
COMMON
VVVV32010
GND
Fused DP_PWR
3V3_F
C934
12
0.1uF
R801 10k
1 2
16V
0402 C OMMO N
10%
VVVV32010
X7R
0402
COMMON
VVVV32010
GND
IFPE_C_HPD_RIFPE_C_HPD_R_Q
5 %
R836
100k
0402
COMMON
VVVV32010
R837
100k
5 %
0402
COMMON
VVVV32010
GENERIC_DEZ1 IFPE_AUX_C
GENERIC_DEZ1 IFPE_AUX_C
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
TO CONNECTOR
C60
12
220pF
50V
5%
C0G
0402
COMMON
VVVV32010
GND
NV3V3
R1654
4.7k
5 %
0402
COMMON
XXXV32010
3V3_DP_PWR_EF_EN
DP_PWR_EF
GND
R50 0ohm
1 2
0603 CO MMON
2
3
4
5
FDBA
D512
@discrete.d_3pin_ac (sy m_1):page1 6_i380
3
0.1A
100V
SOT23
DNI
XXXV32010
1 2
GND
D513
@discrete.d_3pin_ac (sy m_1):page1 6_i373
3
0.1A
SOT23
DNI
XXXV32010
1 2
VVVV32010
12
GND
DP-SKU
U508
VVVV32010
@analog.u_sw_pwr _tps203 1(sy m_1):page1 6_i338
SO8
COMMON
IN
IN
EN
OC*
IFPE_MODE
C975
12
10nF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
IFPE_C_HPD_C
IFPE_AUX_C*
IFPE_AUX_C
IFPE_L3_C*
IFPE_L3_C
IFPE_L2_C*
IFPE_L2_C
IFPE_L1_C*
IFPE_L1_C
IFPE_L0_C*
IFPE_L0_C
C960
220pF
50V
5%
C0G
0402
DNI
XXXV32010
8
OUT
7
OUT
6
OUT
1
GND
GND
12
C972
0.1uF
16V
10%
X7R
0402
DNI
XXXV32010
GND
NV12V
3.3V
1.0A
0.406
GND
R849
10k
5 %
0402
COMMON
VVVV32010
@discrete.q_npn(s ym_1):pag e16_i44 8
nv_cap
12
R825
4.7k
0402
COMMON
VVVV32010
Q529B
SOT363
COMMON
GND
Hot_De t
18
17
AUX_CH n
AUX_CH p
15
ML_Lan e_3 n
12
ML_Lan e_3 p
10
9
ML_Lan e_2 p
7
ML_Lan e_1 n
6
ML_Lan e_1 p
4
ML_Lan e_0 n
3
ML_Lan e_0 p
1
MODE
13
14
CEC
_
VVVV32010
N5W-20M0610-A43
C5
47uF
6.3V
20%
X5R
0805
COMMON
XXXV32010
12
GND GND
NV3V3
VVVV32010
R858
4.7k
5 %
C
E
DP_W/GASKET
0402
1B1C1E
COMMON
IFPE_MODE*
B
5
6
C
Q529A
B
@discrete.q_npn(s ym_1):pag e16_i44 9
2
SOT363
COMMON
E
1
VVVV32010
GND
DP_PWR_EF
20
DP_PWR
MEC1
MEC1
19
PWR_R TN
X1
X1
X2
X2
X3
X3
X4
X4
2
GND_0
5
GND_1
8
GND_2
11
GND_3
16
GND_6
GND
nv_cap
nv_cap
nv_cap
Quadro
C4
12
C7
12
C2
12
47uF
47uF
47uF
6.3V
6.3V
6.3V
20%
20%
20%
X5R
X5R
X5R
0805
0805
0805
COMMON
COMMON
COMMON
XXXV32010
XXXV32010
XXXV32010
DP_PWR_EF
C105
C958
12
560uF
22uF
20%
20%
6.3V
X5R
AL-Polyme r
0805
4.7A@105 deg C,10 0KH z
COMMON
0.008oh m
VVVV32010
TH_D6 3P25
VVVV32010
GND
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
G
Wednesday, November 12, 201 4
1B1C1E
R844 4.7k
1 2
IFPE_MODE_R
0402 COMM ON
5 %
VVVV32010
DP_PWR_EF
C964
12
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
nv_cap
DP_PWR_EF
C3
12
47uF
6.3V
20%
X5R
0805
COMMON
XXXV32010
GND
Desktop
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
16_IFPEF wit h IFPE D P
16_IFPEF wit h IFPE D P
16_IFPEF wit h IFPE D P
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
3
4
VVVV32010
J3
C949
0.1uF
10%
X7R
0402
COMMON
VVVV32010
IFPE_MODE_C
16 34
16 34
16 34
1
2
R838
1M
5 %
COMMON
3
VVVV32010
GND
4
5
10
10
10
Page 17
A B C D E F G H
smd.db-x7.ru
IFPF DP
1
2
IFPF_AUX*
BI16
IFPF_AUX
3
4
BI16
IFPF_L3*
BI16
IFPF_L3
BI16
IFPF_L2*
BI16
IFPF_L2
BI16
IFPF_L1*
BI16
IFPF_L1
BI16
IFPF_L0*
BI16
IFPF_L0
BI16
GPIO8_IFPF_HPD
OUT21
Two cases to be considered:
1. DP AUX to DP connect or: AUX AC coupled
2. DP AUX to DP-DVI dongle: AUX pass t hrough
R863
100k
5 %
0402
COMMON
VVVV32010
GND
GENERIC_DEZ1IFPF_AUX_C
GENERIC_DEZ1IFPF_AUX_C
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
NV3V3
VVVV32010
R82
10k
5 %
Hotplug Detection
0402
not found
COMMON
3
1B1C1E
C
Q16
B
@discrete.q_npn(s ym_1):pag e17_i5
1
SOT23_1 B1C 1E
COMMON
E
2
VVVV32010
GND
GND
C967
0.1uF
1 2
16V040 2
10%
X7R
COMMON
@discrete.q_fet_n_enh(s ym_2) :page17_i98
SOT363
COMMON
C954 0.1uF
COMMON
1 2
C951 0.1uF
COMMON
1 2
C956 0.1uF
COMMON
1 2
C946 0.1uF
COMMON
1 2
IFPF_HPD_RIFPF_HPD_R_Q
C64
12
220pF
5%
C0G
0402
COMMON
VVVV32010
GND
VVVV32010
GENERIC_DEZ1
@discrete.q_fet_n_enh(s ym_2) :page17_i97
SOT363
COMMON
VVVV32010
Q527B
@discrete.q_fet_n_enh(s ym_2) :page17_i95
SOT363
COMMON
VVVV32010
GENERIC_DEZ1
C968
1 2
0402
VVVV32010
COMMON
VVVV32010
COMMON
VVVV32010
COMMON
VVVV32010
COMMON
VVVV32010
Q530B
0.1uF
16V
10%
X7R
COMMON
R49 0ohm
1 2
PLACE CLOSE
TO CONNECTOR
4
S3D
G
5
G
5
D
S
4
3
COMMON0603
VVVV32010
12
GND
IFPF_AUX_BYP*
Q530A
1
6
S
D
VVVV32010
G
2
G
2
Q527A
@discrete.q_fet_n_enh(s ym_2) :page17_i96
S6D
SOT363
COMMON
VVVV32010
1
IFPF_AUX_BYP
R852
100k
5 %
0402
COMMON
VVVV32010
GND
C953 0.1uF
VVVV32010
1 2
C950 0.1uF
VVVV32010
1 2
C955 0.1uF
VVVV32010 1 2
C945 0.1uF
VVVV32010
1 2
R64 100k
1 2
COMMON0402
5 %
VVVV32010
R69
100k
0402
COMMON
VVVV32010
DP_PWR_EF
VVVV32010
R839
100k
5 %
VVVV32010
COMMON
COMMON
VVVV32010
IFPF_HPD_C
IFPF_AUX_C*
IFPF_AUX_C
IFPF_L3_C*
IFPF_L3_C
IFPF_L2_C*
IFPF_L2_C
IFPF_L1_C*
IFPF_L1_C
IFPF_L0_C*
IFPF_L0_C
C961
220pF
50V
5%
C0G
0402
DNI
VVVV32010
D514
@discrete.d_3pin_ac (sy m_1):page1 7_i45
3
0.1A
100V
SOT23
DNI
1 2
GND
D515
@discrete.d_3pin_ac (sy m_1):page1 7_i38
3
0.1A
100V
DNI
VVVV32010
1 2
R840
100k
5 %
0402
GND
VVVV32010
C973
12
0.1uF
16V
10%
X7R
0402
DNI
GND
NV12V
VVVV32010
R850
10k
5 %
0402
COMMON
IFPF_MODE
Q531A
C976
10nF
16V
10%
X7R
0402
COMMON
VVVV32010
GENERIC_DEZ1IFPF_AUX_C
GENERIC_DEZ1IFPF_AUX_C
@discrete.q_npn(s ym_1):pag e17_i10 0
COMMON
GND GND
18
17
15
12
10
9
7
6
4
3
1
12
GND
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
13
14
6
1
Hot_De t
AUX_CH n
AUX_CH p
ML_Lan e_3 n
ML_Lan e_3 p
ML_Lan e_2 n
ML_Lan e_2 p
ML_Lan e_1 n
ML_Lan e_1 p
ML_Lan e_0 n
ML_Lan e_0 p
MODE
_
VVVV32010
N5W-20M0610-A43
NV3V3
VVVV32010
R859
4.7k
5 %
0402
1B1C1E
COMMON
C
IFPF_MODE*
B
2
3
C
Q531B
E
@discrete.q_npn(s ym_1):pag e17_i99
SOT363
COMMON
E
VVVV32010
J4
4
VVVV32010
DP_PWR_EF
20
DP_PWR
MEC1
19
PWR_R TN
X1
X1
X2
X2
X3
X3
X4
X4
2
GND_0
5
GND_1
8
GND_2
11
GND_3
16
CEC
GND_6
DP_W/GASKET
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
FDBA
1
1B1C1E
R845
1 2
0402
5 %
VVVV32010
IFPF_MODE_C
G
4.7k
COMMON
DP_PWR_EF
12
C963
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
R841
1M
5 %
0402
COMMON
VVVV32010
GND
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
17_IFPF DP
17_IFPF DP
17_IFPF DP
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
MS-V320
MS-V320
MS-V320
2
3
4
10
10
10
Sheet ofDate:
17 34
Sheet ofDate:
17 34
Sheet ofDate:
17 34
H
B
5
IFPF_MODE_R
GND
Page 18
A B C D E F G H
smd.db-x7.ru
Page20: IFPC HDMI/DP
1
2
14,15,16,19
PEX_VDD
VVVV32010
C711
12
4.7uF
6.3V
20%
0603
3
4
COMMON
Fused DP_PWR
3V3_F
12
C974
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
GND
FB_IFP_ABCDEF_PLLVDD
R855
1 2
0402
VVVV32010
R6391k
IFPC_RSET
12
0402COMMON
1 %
VVVV32010
GND
5 %
12
C728
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
VVVV32010
C725
12
C715
12
0.1uF
0.1uF
16V
16V
X7R
X7R
0402
0402
COMMON
COMMON
VVVV32010
GND
NV3V3
R1655
4.7k
U510
5 %
@analog.u_sw_pwr _tps203 1(sy m_1):page1 8_i164
0402
SO8
COMMON
COMMON
2
3V3_DP_PWR_EN
IN
3
IN
4
EN
5
OC*
VVVV32010
BA
VVVV32010
10k
COMMON
FOR ESD DIODES
Place ne ar ESD dio des
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1M
@digital.u_gpu_gb2b_192( sym_7 ):page18_ i192
BGA1428
7/18 IFPC
AT12
IFPCD_RSET
AT13
IFPCD_PLLVDD
IFPC
AR10
IFPCD_IOVDD
AR11
IFPCD_IOVDD
VVVV32010
DP-SKU
8
OUT
7
OUT
6
OUT
1
GND
VVVV32010
GND GND
GND
IFPC_ESD
C947
12
0.1uF
16V
10%
X7R
0402
DNI
VVVV32010
GND
DPDVI/HDMI
I2CW_AUX*
AV3
IFPC_AUX_SDA
IFPC_AUX_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
3.3V
1.0A
0.406
R7
C6
12
12
4.7k
0.1uF
5 %
16V
0402
10%
COMMON
X7R
0402
COMMON
VVVV32010
VVVV32010
GND GND
I2CW_AUX
AV4
IFPC_TXC*
AW10
IFPC_L3
IFPC_TXC
AY11
IFPC_L3
IFPC_TXD0*
AW12
IFPC_L2
IFPC_TXD0
AW11
IFPC_L2
IFPC_TXD1*
AV12
IFPC_L1
IFPC_TXD1
AU12
IFPC_L1
IFPC_TXD2*
AV13
IFPC_L0
IFPC_TXD2
AU13
IFPC_L0
DP_PWR
C51
C8
560uF
22uF
COMMON
6.3V
20%
20%
6.3V
X5R
AL-Polyme r
0805
4.7A@105 deg C,10 0KH z
COMMON
0.008oh m
TH_D6 3P25
VVVV32010
C
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
OUT21
GPIO15_IFPC_HPD
* I2C to DDC level switching
NV3V3
R11
10k
5 %
0402
COMMON
VVVV32010
R13
100k
5 %
0402
COMMON
VVVV32010
GND
NV3V3
R21
10k
5 %
0402
COMMON
VVVV32010
R29
100k
0402
COMMON
VVVV32010
GND
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
NV3V3
1
R5
10k
5 %
0402
COMMON
Q2
@discrete.q_npn(s ym_1):pag e18_i88
SOT23_1 B1C 1E
VVVV32010
COMMON
GND
NV3V3
1G1D1 S
HDMI
DP
HDMI
DP
3
C
E
2
VVVV32010
G
1
G
2
S6D
1
VVVV32010
G
5
S3D
4
VVVV32010
VVVV32010
VVVV32010
VVVV32010
VVVV32010
not found
1B1C1E
B
1
3
D
Q523
@discrete.q_fet_n_enh(s ym_2) :page18_i10 4
SOT23_1 G1D 1S
COMMON
S
2
VVVV32010
GND
ALL
Q5A
@discrete.q_fet_n_enh(s ym_2) :page18_i20 5
SOT363
COMMON
I2CW_SDA_Q
ALL
Q5B
@discrete.q_fet_n_enh(s ym_2) :page18_i20 7
SOT363
COMMON
I2CW_SCL_Q
C936
1 2
0402
C938 0.1uF
1 2
C940
1 2
0402
C942 0.1uF
1 2
GND
IFPC_TERM_EN_D
1 2
C28
1 2
VVVV32010
0.1uF
COMMON
COMMON04 02
0.1uF
COMMON
COMMON04 02
R848
100k
5 %
0402
COMMON
VVVV32010
0V
0.406
IFPC_MODE_Q*
DP
Q6B
@discrete.q_fet_n_enh(s ym_2) :page18_i20 6
D
SOT363
COMMON
3
VVVV32010
1 2
0402 CO MMON
R826
C14 0.1uF
VVVV32010
16V040 2
DP
10%
X7R
COMMON
VVVV32010
Q6A
DP
@discrete.q_fet_n_enh(s ym_2) :page18_i20 8
D
SOT363
COMMON
6
VVVV32010
R813
1 2
0402 CO MMON
0.1uF
16V040 2
10%
DP
X7R
COMMON
C937
0.1uF
1 2
COMMON04 02
VVVV32010
C939 0.1uF
1 2
0402 COMMON
VVVV32010
C941
0.1uF
1 2
0402 COMMON
VVVV32010
C943
0.1uF
1 2
0402 COMMON
VVVV32010
R847 100k
1 2
0402 C OMMO N
5 %
VVVV32010
nv_ind_ noxne t
LB40
COMMON
BEAD_040 2
VVVV32010
IFPC_TXC*
IFPC_TXC
IFPC_TXD0*
IFPC_TXD0
IFPC_TXD1*
IFPC_TXD1
IFPC_TXD2*
IFPC_TXD2
C13
12
10nF
16V
10%
X7R
DP_PWR
DDC_5V
VVVV32010
VVVV32010
R843
R842
G
0ohm
HDMI
G
VVVV32010
600ohm
LB41
BEAD_040 2
VVVV32010
HDMI
0ohm
D508
@discrete.d_3pin_ac (sy m_1):page1 8_i47
0.1A
100V
SOT23
DNI
VVVV32010
R846 0ohm
1 2
0603 C OM MON
C970
VVVV32010
220pF
50V
5%
C0G
0402
COMMON
VVVV32010
R822
499ohm
0402
COMMON
VVVV32010
600ohm
LB43
BEAD_040 2 COMMON
VVVV32010
VVVV32010
COMMON0402
VVVV32010
VVVV32010
VVVV32010
nv_ind_ noxne t
0ohm
0402
0402
COMMON
COMMON
DP
IFPC_ESD
DDC_5V
D511
@discrete.d_3pin_ac (sy m_1):page1 8_i58
3
3
0.1A
100V
SOT23
DNI
VVVV32010
1 2
1 2
GND
GND
1
R807
100k
5 %
0402
COMMON
VVVV32010
GND
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
HDMI_C_HPD_CHDMI_C_HPD_RHDMI_C_HPD_R_Q
12
C971
220pF
50V
5%
C0G
0402
DNI
VVVV32010
GND
R821
R820
R819
499ohm
499ohm
499ohm
0402
0402
0402
COMMON
COMMON
COMMON
VVVV32010
VVVV32010
VVVV32010
nv_ind_ noxne t
nv_ind_ noxne t
600ohm
VVVV32010
C30 0.1uF
1 2
0402 CO MMON
C32
1 2
0402 CO MMON
C34 0.1uF
1 2
0402 CO MMON
C36 0.1uF
1 2
0402 CO MMON
LB44
BEAD_040 2
0.1uF
nv_ind_ noxne t
600ohm
COMMON
LB45
600ohm
COMMON
BEAD_040 2
LB46
VVVV32010
BEAD_040 2
VVVV32010
IFPC_L3_C*
IFPC_L3_C
IFPC_L2_C*
IFPC_L2_C
IFPC_L1_C*
IFPC_L1_C
IFPC_L0_C*
IFPC_L0_C
5
S
4
2
S
1
0ohm
HDMI
IFPC_TXC_C1*
IFPC_TXC_C1
IFPC_TXD0_C1*
IFPC_TXD0_C1
IFPC_TXD1_C1*
IFPC_TXD1_C1
IFPC_TXD2_C1*
IFPC_TXD2_C1
12
GND
nv_ind_ noxne t
R823
499ohm
1 %
nv_ind_ noxne t
0402
COMMON
VVVV32010
600ohm
COMMON
LB42
BEAD_040 2 C OMMO N
VVVV32010
C29 0.1uF
VVVV32010
1 2
C31 0.1uF
VVVV32010
1 2
0402 CO MMON
C33 0.1uF
VVVV32010
1 2
0402 CO MMON
C35 0.1uF
VVVV32010
1 2
0402 CO MMON
0402
COMMON
DP_PWR
GND
VVVV32010
R831
100k
DP
5 %
0402
COMMON
1
R829
2k
HDMI
5 %
0402
COMMON
VVVV32010
R809
2k
HDMI
5 %
0402
COMMON
VVVV32010
DP
R817
R818
499ohm
499ohm
0402
0402
COMMON
COMMON
VVVV32010
VVVV32010
nv_ind_ noxne t
600ohm
COMMON
LB47
600ohm
COMMON
BEAD_040 2
VVVV32010
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
NV3V3
NV12V
R12
VVVV32010
10k
R16
0ohm
0402
COMMON
GND
VVVV32010
nv_res
5.1ohm
COMMON
nv_res
5 %
5.1ohm
COMMON
nv_res
5 %
5.1ohm
COMMON
nv_res
5 %
5.1ohm
5 %
HPD
18
AUXN
17
AUXP
15
LANE_3N
12
LANE_3P
10
LANE_2N
LANE_2P
LANE_1N
LANE_1P
LANE_0N
LANE_0P
5 %
0402
COMMON
VVVV32010
Q4A
@discrete.q_npn(s ym_1):pag e18_i20 3
SOT363
COMMON
GND
C969
100pF
50V
5%
C0G
0402
DNI
I2CW_SDA_C
I2CW_SCL_C
VVVV32010
IFPC_TXC_RC1*
VVVV32010
IFPC_TXC_RC1
VVVV32010
IFPC_TXD0_RC1*
VVVV32010
IFPC_TXD0_RC1
VVVV32010
IFPC_TXD1_RC1*
VVVV32010
IFPC_TXD1_RC1
VVVV32010
IFPC_TXD2_RC1*
VVVV32010
IFPC_TXD2_RC1
DP FOR QUADRO
J2
@electro_mechanic.c on_disp laypor t(sym_1 ):page18_ i118
RECEPTACL E
NORM
COMMON
9
7
6
4
3
1
USE NVPN 080-0424-000
VVVV32010
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
HDMI
VVVV32010
DDC_5V
nv_res
R1663
5.1ohm
1 2
0402
COMMON
nv_res
5 %
R1666
1 2
0402
R1661
5.1ohm
1 2
COMMON0402
nv_res
5 %
R1667
1 2
0402
R1662
5.1ohm
1 2
COMMON
0402
nv_res
5 %
R1665
1 2
0402
R1660
5.1ohm
1 2
0402 C OMMO N
5 %
R1664
1 2
0402 COMM ON
R816
499ohm
0402
COMMON
VVVV32010
I2CW_SDA_C
I2CW_SCL_C
NV3V3
VVVV32010
6
1B1C1E
C
B
IFPC_MODE*
2
E
1
VVVV32010
GND
GND
SHIELD6
21
SHIELD5
23
SHIELD4
25
PWR
20
PWR_RET
19
GND
16
CEC
14
MODE
13
GND
11
GND
8
GND
5
GND
2
SHIELD3
22
SHIELD2
24
SHIELD1
26
GND
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
18_IFPC HD MI_DP
18_IFPC HD MI_DP
18_IFPC HD MI_DP
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
DP-SKU ONLY
R8
10k
5 %
0402
COMMON
3
C
Q4B
@discrete.q_npn(s ym_1):pag e18_i20 1
SOT363
COMMON
E
4
VVVV32010
J5
19
HP_DET
18
+5V
17
GND
16
SDA
15
SCL
14
NC
13
CE Remote
12
CK-
11
CK_Shield
10
CK+
9
D0-
8
D0_Shield
7
D0+
6
D1-
5
D1_Shield
4
D1+
3
D2-
2
D2_Shield
1
D2+
HDMI19PSM_BLACK-RH-5
HDMI_S19_16
COMMON
VVVV32010
N5Y-19M0590-A43
DP_PWR
C9
12
10uF
6.3V
20%
0805
DNI
VVVV32010
DPC_MODE_C
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
DPC_MODE_R
R832
10k
5 %
0402
COMMON
MEC1
MEC2
DP_PWR
12
GND
18 34
18 34
18 34
1
2
X1
X2
MEC1
MEC2
X3
X4
GND
3
C10
0.1uF
16V
10%
0402
COMMON
4
VVVV32010
5
10
10
10
1B1C1E
B
5
VVVV32010
SHELL1
SHELL2
SHELL3
SHELL4
R15
1M
5 %
0402
COMMON
VVVV32010
GND
Page 19
IFPD DP
smd.db-x7.ru
A B C D E F G H
R800
100k
5 %
0402
COMMON
VVVV32010
GND
GENERIC_DEZ1IFPD_AUX_C
GENERIC_DEZ1IFPD_AUX_C
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
Two cases to be considered:
1. DP AUX to DP connect or: AUX AC coupled
2. DP AUX to DP-DVI dongle: AUX pass t hrough
IFPD_AUX_BYP*
Q7A
1
6
@discrete.q_fet_n_enh(s ym_2) :page19_i34 3
SOT363
S
D
COMMON
G
2
VVVV32010
G
2
Q8A
@discrete.q_fet_n_enh(s ym_2) :page19_i34 8
S6D
SOT363
COMMON
1
IFPD_AUX_BYP
VVVV32010
R796
100k
5 %
0402
COMMON
VVVV32010
GND
C19
0.1uF
1 2
COMMON
C21
0.1uF
1 2
VVVV32010
COMMON
C23
0.1uF
1 2
VVVV32010
COMMON
C25
0.1uF
1 2
VVVV32010
COMMON
VVVV32010
NV3V3
R10
10k
5 %
0402
Hotplug Detection
COMMON
3
1B1C1E
C
VVVV32010
Q3
B
@discrete.q_npn(s ym_1):pag e19_i30 7
1
SOT23_1 B1C 1E
COMMON
E
2
R14
100k
VVVV32010
5 %
0402
COMMON
GND
VVVV32010
GND GND GND
C20
1 2
C22
1 2
C24
1 2
C26
1 2
VVVV32010
VVVV32010
VVVV32010
VVVV32010
C38
1 2
0402
GENERIC_DEZ1
GENERIC_DEZ1
C39
1 2
0402
0.1uF
COMMON
0.1uF
COMMON
0.1uF
COMMON
0.1uF
COMMON
R20
1 2
0402
VVVV32010
0.1uF
16V
10%
X7R
COMMON
VVVV32010
0.1uF
16V
10%
X7R
COMMON
VVVV32010
5 %
Q7B
4
@discrete.q_fet_n_enh(s ym_2) :page19_i34 5
SOT363
COMMON
S3D
G
5
VVVV32010
G
5
Q8B
@discrete.q_fet_n_enh(s ym_2) :page19_i34 7
D
S
SOT363
COMMON
4
3
VVVV32010
100k
COMMON
R24
DP_D_HPD_RDP_D_HPD_R_Q
0ohm
1 2
COMMON0603
VVVV32010
C17
12
220pF
50V
5%
C0G
0402
COMMON
VVVV32010
C15
12
220pF
50V
5%
C0G
0402
COMMON
VVVV32010
1
2
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1N
@digital.u_gpu_gb2b_192( sym_8 ):page19_ i337
BGA1428
COMMON
8/18 IFPD
R602
1k
1 2
GND
COMMON0402
1 %
FB_IFP_ABCDEF_PLLVDD
3
4
VVVV32010
R175
IN
1 2
VVVV32010
PEX_VDD
GM206 GK106
IFPD_RSET
AT10
RSET
NC
0ohm
AT9
PLLVDD
NC
IFPD_PLLVDD
COMMON0402
C758
12
0.1uF
16V
10%
X7R
0402
COMMON
IFPD
VVVV32010
GND
AP9
IFPD_IOVDD
AR9
IFPD_IOVDD
VVVV32010
DPDVI/HDMI
IFPD_AUX*
AW3
IFPD_AUX_SDA
IFPD_AUX
AW2
IFPD_AUX_SCL
IFPD_L3*
BA4
IFPD_L3
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
OUT21
IFPD_L3
BB4
IFPD_L3
IFPD_L2*
AY6
IFPD_L2
IFPD_L2
BA6
IFPD_L2
IFPD_L1*
BB6
IFPD_L1
IFPD_L1
BB7
IFPD_L1
IFPD_L0*
BA7
IFPD_L0
IFPD_L0
AY7
IFPD_L0
GPIO17_IFPD_HPD
DP_D_HPD_C
IFPD_AUX_C*
IFPD_AUX_C
IFPD_L3_C*
IFPD_L3_C
IFPD_L2_C*
IFPD_L2_C
IFPD_L1_C*
IFPD_L1_C
IFPD_L0_C*
IFPD_L0_C
DP_PWR
R834
100k
5 %
COMMON
COMMON
D509
@discrete.d_3pin_ac (sy m_1):page1 9_i249
VVVV32010
3
0.1A
100V
SOT23
DNI
1 2
VVVV32010
GND
D510
@discrete.d_3pin_ac (sy m_1):page1 9_i244
3
0.1A
100V
DNI
1 2
R835
100k
5 %
VVVV32010
0402
VVVV32010
GND
GENERIC_DEZ1
GENERIC_DEZ1
C43
12
0.1uF
16V
10%
X7R
0402
DNI
VVVV32010
GND
DP_MODE
12
C1
10nF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
5
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CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
BA
C
NV12V
R1
10k
5 %
0402
COMMON
VVVV32010
Q1A
@discrete.q_npn(s ym_1):pag e19_i34 6
COMMON
GND GND
1
NV3V3
1
R4
4.7k
5 %
6
1
VVVV32010
18
17
15
12
10
13
14
0402
1B1C1E
COMMON
C
DP_MODE*
B
2
3
1B1C1E
C
Q1B
E
@discrete.q_npn(s ym_1):pag e19_i34 4
VVVV32010
SOT363
COMMON
E
4
VVVV32010
DP_PWR
J1
Hot_De t
20
DP_PWR
AUX_CH n
AUX_CH p
ML_Lan e_3 n
ML_Lan e_3 p
ML_Lan e_2 n
9
ML_Lan e_2 p
7
ML_Lan e_1 n
6
ML_Lan e_1 p
4
ML_Lan e_0 n
3
ML_Lan e_0 p
1
MODE
_
VVVV32010
N5W-20M0610-A43
MEC1
MEC1
19
PWR_R TN
X1
X1
X2
X2
X3
X3
X4
X4
2
GND_0
5
GND_1
8
GND_2
11
GND_3
16
CEC
GND_6
DP_W/GASKET
MSI
MSI
MSI
R3
B
5
DP_MODE_R
GND
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
4.7k
1 2
COMMON0402
5 %
VVVV32010
DP_PWR
12
C11
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
DP_MODE_C
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
19_IFPD DP
19_IFPD DP
19_IFPD DP
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
R6
1M
5 %
0402
COMMON
VVVV32010
GND
19 34
19 34
19 34
2
3
4
10
10
10
Page 20
MIOA/SLI Interface
smd.db-x7.ru
1
2
3
4
A B C D E F G H
stereo header
J7
1
@electro_mechanic.hd r_1x4 (sy m_1):page2 0_i917
2
MALE
3
2.0MM
90
4
NORM
COMMON
GND
MIOD8_REFCLK2
MIOD7_REFCLK2*
MIOD3_REFCLK1*
R1910ohm
1 2
1
COMMON0402
R782
0ohm
1 2
COMMON
0402
DDC_5V
12
GND
R28
0ohm
1 2
0402
COMMON
R789
1 2
0402 COMM ON
R34
1 2
0402
R794 0ohm
1 2
MIOD0_I2C_SDA1
MIOD1_RASTER_SYNC2
MIOD2_REFCLK1
MIOD4_STEREO2
MIOD6_STEREO1
MIOD9_RASTER_SYNC1
MIOA_RASTER_SYNC0_FL_SYNCMIOA_RASTER_SYNC0_FL_SYNC_R
MIOA_SWAPRDY_FL_INT2
MIOA_CTL3_FL_INT1
MIOHSYNC_SWAPRDY_OUT2
MIOVSYNC_SWAPRDY_OUT1
MIODE_FL_SYNC
MIOA_CLKOUT_SWAPRDY_IN2
MIOCLKIN_I2C_SCL2
0ohm
0ohm
COMMON
COMMON0402
C114
0.1uF
16V
X7R
0402
COMMON
MIO_FLREFCLK_R
R26
100ohm
5 %
0402
COMMON
MIOHSYNC_FLREFCLK_R*
3
4
ADD TI NPR PART
3V3_F
12
U509
@analog.u_lvds_rc vr( sym_1 ):page20_ i923
SOT23_5
COMMON
5
RCVR
GND
A2
B4
A4
A5
B6
A6
A8
B9
B10
A10
B12
A12
A13
B5
A9
B13
B8
A1
B1
B2
C959
12
10nF
16V
10%
X7R
COMMON
GND
XTALSSIN_R
CN1
@electro_mechanic.c on_mio_26( sym_1 0):page2 0_i786
NONPH Y_4G ND _L ED
COMMON
SLI-FL_A - EMI SHIELD
DR<0> | SDA
DR<1> | RSTR_SY NC
DR<2> | REFCLK
DR<3> | REFCLK*
DR<4> | STEREO
DR<5> | SWAPRDY_ IN
DR<6> | STEREO
DR<7> | REFCLK*
DR<8> | REFCLK
DR<9> | RSTR_SY NC
DR<10>| SDA
DR<11>| SCL
DR<12>| FL_INT
DR<13>| SWAPRDY _OUT*
DR<14>| SWAPRDY _OUT*
DR_CMD| FL_SYNC
DR_CLK| SWAP RDY_IN
RSTR_SYNC | FL_SYNC
SWAP_RDY | FL_INT
EXT_REFCLK | SCL
GND
IOVDD
IN21
BI21
IN21
BI21
IN21
BI21
R582 49.9ohm
1 2
0402
1 %
R584 49.9ohm
1 2
0402
1 %
GPIO19_STEREO_OUT
GPIO5_FRAME_LOCK_INT
I2CB_SCL_R
I2CB_SDA_R
COMMON
COMMON
C685
12
0.1uF
16V
10%
0402
COMMON
GND
GPIO24_SWAPRDY_OUT
GPIO23_RASTER_SYNC1
MIOA_CAL_PD_VDDQ
MIOA_CAL_PU_GND
R592
1k
1 %
COMMON
MIOA_VREF
R589
1k
1 %
0402
COMMON
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1O
@digital.u_gpu_gb2b_192( sym_1 0):page20 _i956
BGA1428
COMMON
AD5
AE5
AH5
3.3V
10/18 MIOA
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
MIOA_VREF
MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC
MIOA_CLKOUT
MIOA_CLKOUT
MIOA_CLKIN
R165 33ohm
1 2
COMMON
0402
5 %
DDC_5V
5
U7
1
@logic.u_and_2in(sy m_1):page 20_i870
STEREO_HDR_R
MIOD4_STEREO2_R
GND
R32
1 2
0402 COMM ON
R166 33ohm
1 2
0402
5 %
R38 0ohm
1 2
R803
1 2
0402
R48
1 2
0402
R828
1 2
R42
1 2
R806 0ohm
1 2
R811 0ohm
1 2
R44 0ohm
1 2
R46
1 2
0402
R815
1 2
0402
R23 0ohm
1 2
R785
1 2
R17
1 2
R781
1 2
0402
R784
1 2
0402
R788
1 2
0402 C OMMO N
R37
1 2
0402
R802 0ohm
1 2
R27
1 2
0402
R22
1 2
0402
R798
1 2
0402 C OMMO N
R36
1 2
0ohm
R25
1 2
0402
R827
1 2
0402
R805
1 2
0402 C OMMO N
R35 0ohm
1 2
R45
1 2
0402
COMMON
0ohm
COMMON
0ohm
COMMON
0ohm
COMMON0402
0ohm
COMMON0402
COMMON0402
COMMON0402
0ohm
COMMON
0ohm
COMMON
0ohm
COMMON0402
0ohm
COMMON0402
0ohm
COMMON
0ohm
COMMON
0ohm
0ohm
COMMON
COMMON0402
0ohm
COMMON
0ohm
COMMON
MIOD5_SWAPRDY_IN1
0ohm
0ohm
COMMON0402
33ohm
COMMON
5 %
0ohm
COMMON
0ohm
COMMON0402
0ohm
COMMON
4
2
SC70-5
COMMON
3
GND
R169 0ohm
1 2
NV3V3
R168
4.7k
5 %
0402
COMMON
MIO_SIGNALS
MIOA_D[11..0]
AD4
MIOAD0
AD2
MIOAD1
AD1
MIOAD2
AD3
MIOAD3
AF3
MIOAD4
AG4
MIOAD5
AG2
MIOAD6
AF4
MIOAD7
AG5
MIOAD8
AG3
MIOAD9
AH4
MIOAD10
AH1
MIOAD11
21
MIOA_CTL3
AH3
MIOA_HSYNC
AE3
MIOA_VSYNC
AG1
MIOA_DE
AH2
MIOA_DE
MIOA_CLKOUT
AE2
AE1
MIOA_CLKIN
AE4
0
1
2
3
4
5
6
7
8
9
10
11
GPIO21_RASTER_SYNC0
GPIO22_SWAPRDY_IN
BI21
MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
COMMON0402
NV3V3
C120
0.1uF
1 2
16V
0402
10%
X7R
COMMON
5
U9
1
@logic.u_and_2in(sy m_1):page 20_i864
4
2
SC70-5
COMMON
3
GND
4
7
0
1
2
3
NV3V3
4
5
6
7
R179
8
1k
9
10
0402
11
COMMON
DDC_5V
3
1 2
GND
R43 0ohm
1 2
R793
1 2
0402
R797
1 2
0402
R33
1 2
0402 COMM ON
R810
1 2
0402
R814
1 2
0402
R47
1 2
0402
R41
1 2
0402 COMM ON
R18 0ohm
1 2
R39
1 2
0402
MIOD11_I2C_SCL1
MIOD10_I2C_SDA2
STEREO_HDR
D4
C115
12
@discrete.d_3pin_ac (sy m_1):page2 0_i889
0.1uF
0.1A
16V
100V
SOT23
10%
DNI
X7R
0402
COMMON
COMMON0402
0ohm
COMMON
0ohm
COMMON
0ohm
0ohm
COMMON
0ohm
COMMON
0ohm
COMMON
0ohm
COMMON0402
0ohm
COMMON
C116
12
22pF
50V
5%
C0G
0402
COMMON
GND
1
PEX_RST_BUF*
IN3,32
3V3_F
R40
22ohm
5 %
0402
OUT 22
GND
0.381
2
3
4
C45
12
10nF
U1
16V
@logic.u_buf_3_state(sy m_9):page2 0_i932
10%
DFN06 _OEH
X7R
0402
COMMON
6
1
VCC
OE
GND
A
O
2
4
XTALSSIN_GPU_TRISTATE
NC
GND
5
3
GND
XTALSSIN_GPU
B3
GND
B7
GND
B11
GND
A3
GND
A11
GND
1
GND
2
GND
3
GND
4
GND
A7
LED | GND
SLI_LED
IN32
5
NET VOLTAGE MAX_CURRENT MIN_WIDTH
MIOA_VREF
IN
MIOA_CAL_PD_VDDQ
IN
MIOA_CAL_PU_GND
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
3.3V
2.5V
0.0V
0.305
0.305
0.305
BA
C
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MSI
MSI
MSI
MS-V320
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
20_MIOA
20_MIOA
20_MIOA
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
5
10
10
10
Sheet ofDate:
20 34
Sheet ofDate:
20 34
Sheet ofDate:
20 34
Page 21
A B C D E F G H
smd.db-x7.ru
MISC1: Fan, Thermal, JTAG, GPIO
1
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1P
@digital.u_gpu_gb2b_192( sym_1 1):page21 _i416
BGA1428
COMMON
11/18 MISC_1
AN3
OVERT
GPIO8
C702
pads for deadbugging
OUT3
OUT3
OUT3
OUT3
12
GPU_THERMDN
0.2pF
50V
GPU_THERMDP
0.1pF
C0G
0402
COMMON
JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST*
2
3
3
4
GM206 GK106
AM8
THERMDN
AL8
THERMDP
GK106 GM206
BA18
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
GPIO8_NC
GPIO25_NC
GPIO26_NC
GPIO27_NC
IOVDD
* JTAG
R131
10k
5 %
0402
DNI
R687
10k
5 %
0402
COMMON
AW16
AW18
AY18
AY16
I2CS_SCL
AV6
I2CS_SCL
I2CS_SDA
AU6
I2CS_SDA
I2CC_SCL I2CC_SCL_GPU
AW7
I2CC_SCL
I2CC_SDA I2CC_SDA_GPU
AV7
I2CC_SDA
I2CB_SCL I2CB_SCL_GPU
AW5
I2CB_SCL
I2CB_SDA I2CB_SDA_GPU
AW6
I2CB_SDA
GPIO0_NVAPI_1_PWM_VID
AT6
GPIO0
AT7
GPIO1
AL1
GPIO2
GPIO3_OC_WARN*
AL2
GPIO3
GPIO4_GPU_IFPF_HPD_GK106
AP3
GPIO4
GPIO5_FRAME_LOCK_INT
AP4
GPIO5
GPIO6_GPU_PSI*
AK1
GPIO6
GPIO7_FBVDD_SEL
AK2
GPIO7
GPIO8_GPU_IFPF_HPD GPIO8_IFPF_HPD
AG7
GPIO8
AR6
GPIO9
GPIO10_FBVREF_SEL
AM3
GPIO10
GPIO11_LOGO_LED
AM4
GPIO11
GPIO12_GPU_LOW_PERF*
AR3
GPIO12
AJ3
GPIO13
GPIO14_IFPA_HPD
AL3
GPIO14
GPIO15_IFPC_HPD
AL4
GPIO15
GPIO16_FAN_PWM
AR4
GPIO16
GPIO17_IFPD_HPD
AP5
GPIO17
GPIO18_IFPE_HPD
AN5
GPIO18
GPIO19_STEREO_OUT
AK3
GPIO19
GPIO20_SLI_LED_DIM
AK4
GPIO20
GPIO21_RASTER_SYNC0
AL5
GPIO21
GPIO22_SWAPRDY_IN
AK5
GPIO22
GPIO23_RASTER_SYNC1
AJ4
GPIO23
GPIO24_SWAPRDY_OUT
AN4
GPIO24
AK8
GPIO25
AH6
GPIO26
GPIO27
AG6
GPIO27
R121
10k
5 %
0402
DNI
GND
R586
10k
0402
COMMON
GND
R112
180ohm
5 %
0402
DNI
R736
270ohm
5 %
0402
DNI
R644
1 2
0402
1G1D1 S
R182
10k
5 %
DNI
GND
IN 3
BI 3
33ohm
COMMON
5 %
R642
1 2
0402
5 %
R595
1 2
R198
1 2
IN 21
IN 15
IN 18
IN 19
IN 16
D
G
1
S
Use Low Vth device for 16nm
R643
1 2
0402
R641
1 2
33ohm
0402
5 %
COMMON
FOR GK106 ONLY
0ohm
COMMON0402
0ohm
COMMON0402
3
Q31
@discrete.q_fet_n_enh(s ym_2) :page21_i39 4
SOT23_1 G1D 1S
DNI
2
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
NV3V3 NV3V3
R178
R601
10k
10k
5 %
5 %
0402
0402
COMMON
33ohm
COMMON
5 %
33ohm
COMMON
COMMON
OUT 25,29
IN 30
OUT 20
OUT 21
OUT 24
IN 17
1
1
R202
10k
5 %
0402
COMMON
R590
R616
R599
10k
10k
10k
5 %
5 %
5 %
0402
0402
0402
DNI
DNI
DNI
I2CC_SDA_GPU I2CC_SDA_R
OUT21
I2CB_SCL_GPU I2CB_SCL_R
OUT21
I2CB_SDA_GPU I2CB_SDA_R
OUT21
32
R607
10k
5 %
0402
COMMON
R593
10k
5 %
0402
COMMON
GND
OUT 20
IN 32
BI 20
BI 20
OUT 20
NV3V3
NV3V3
1
R668
2.2k
5 %
COMMON
NV3V3
R649
2.2k
5 %
0402
COMMON
NV3V3
R650
2.2k
0402
COMMON
NV3V3 NV3V3
R545
10k
5 %
0402
COMMON
20
R537
10k
5 %
0402
COMMON
R541
10k
5 %
0402
DNI
NV3V3
5
S3D
4
R164
1 2
NV3V3
4
R652
1 2
0402
R651
1 2
IOVDD
R184
10k
5 %
0402
COMMON
NV3V3
3
1
Q30B
G
@discrete.q_fet_n_enh(s ym_2) :page21_i50 2
SOT363
COMMON
0ohm
COMMON0402
Q516B
G
5
@discrete.q_fet_n_enh(s ym_2) :page21_i50 4
SOT363
S3D
COMMON
0ohm
COMMON
NV3V3
G
2
S6D
1
0ohm
COMMON0402
12V_F
D501
@discrete.d_3pin_cc (sy m_2):page 21_i301
30V
0.2A
COMMON
2
12
21
3V3_F
1
R1656
2.2k
5 %
0402
COMMON
3V3_F
1
21
Q516A
@discrete.q_fet_n_enh(s ym_2) :page21_i50 5
SOT363
COMMON
GPIO9_GPU_THERM_ALERT*
12V_PEX6_F1
R210
R555
0ohm
0ohm
0805
0805
COMMON
COMMON
C536
1nF
16V
10%
0402
COMMON
R1657
2.2k
5 %
0402
COMMON
3V3_F
1
R1658
2.2k
5 %
0402
COMMON
FDBA
GPIO13_FAN_TACH
FAN_PWR
25MIL
12V
C542
12
1uF
16V
10%
0603
COMMON
GPIO12_GPU_LOW_PERF* GPIO12_LOW_PERF*
OUT21
BI 30
GPIO9_GPU_THERM_ALERT* GPIO9_THERM_ALERT*
OUT 20
OUT21
BI 20
21
J9
1
@electro_mechanic.hd r_1x4 (sy m_1):page2 1_i307
2
MALE
3
2.0MM
N/A
4
NORM
COMMON
NV3V3
R522
10k
5 %
0402
COMMON
NV3V3
NV3V3
Q32A
G
2
@discrete.q_fet_n_enh(s ym_2) :page21_i50 7
SOT363
S6D
COMMON
THERM_OVERT*THERM_OVERT_GPU*
1
R185
0ohm
1 2
COMMON0402
NV3V3
G
2
S6D
1
R502
0ohm
1 2
0402 C OMMO N
R501
10k
5 %
0402
COMMON
NV3V3
R188
10k
5 %
0402
COMMON
NV3V3
R671
2.2k
5 %
0402
COMMON
G
NV3V3
G
5
S3D
4
R521
0ohm
1 2
COMMON
0402
NV3V3
G
5
S3D
4
R189 0ohm
1 2
NV3V3
G
2
S6D
1
R161
1 2
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
21_MISC1_ Fan, Thermal, J TAG,
21_MISC1_ Fan, Thermal, J TAG,
21_MISC1_ Fan, Thermal, J TAG,
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Q504A
@discrete.q_fet_n_enh(s ym_2) :page21_i50 9
SOT363
COMMON
Q504B
@discrete.q_fet_n_enh(s ym_2) :page21_i50 8
SOT363
COMMON
Q32B
@discrete.q_fet_n_enh(s ym_2) :page21_i50 6
SOT363
COMMON
COMMON0402
Q30A
@discrete.q_fet_n_enh(s ym_2) :page21_i50 3
SOT363
COMMON
0ohm
COMMON0402
MS-V320
MS-V320
MS-V320
OUT 31
NV3V3
R183
10k
5 %
0402
COMMON
BI 21
OUT 21
BI 21
OUT 21
OUT 5,7,10
GND
GPIO6_GPU_PSI* GPIO6_PSI*
I2CC_SCL_GPU I2CC_SCL_R
1
2
3
25,29,31
IN 30,31
3V3_F
4
R190
10k
5 %
0402
COMMON
3V3_F
1
R1659
2.2k
5 %
0402
COMMON
OUT 30
5
10
10
10
Sheet ofDate:
21 34
Sheet ofDate:
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Sheet ofDate:
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H
Page 22
A B C D E F G H
smd.db-x7.ru
MISC2: ROM, XTAL, Straps
STRAP0
STRAP1
1
STRAP2
STRAP3
STRAP4
USER_BIT [3:0]*
3GIO_PADCFG_LUT_ADR*
PCI_DEVID [3:0]*
SOR_EXPOSED [3:0]*
DP_PLL_VDD_33V*
MAXWELLKEPLER
PEX_MAX_SPEED*
PEX_SPD_CHANGE_GEN3*
*
2
ROM_SI
RAMCFG[0]*
RAMCFG[1]*
RAMCFG[3]*
VGA_DEVICE*
ROM_SO
SMB_ALT_ADDR*
FB[0]_APERTURE_SIZE*
FB[1]_APERTURE_SIZE*
3
ROM_SCLK
PEX_PLL_EN_TERM100*
PCI_DEVID_EXT[5]*
SUB_VENDOR*
PCI_DEVID_EXT[4]*
MULTI_STRAP_REF0_GND
BINARY PRODUCTION
BINARY BRINGUP
MULTI-LEVEL
4
R604
R611
4.99k
4.99k
0402
0402
DNI
STRAP0
STRAP1
STRAP2
STRAP3
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
STRAP4
DNI
R603
R610
4.99k
4.99k
0402
0402
COMMON
COMMON
RAMCFG[0]*
RAMCFG[1]*
RAMCFG[2]*RAMCFG[2]*
RAMCFG[3]*
VGA_DEVICE*
SMB_ALT_ADDR*
PCIE_CFG*
DEVID_SEL*
SOR0_EXPOSED*
SOR1_EXPOSED*
SOR2_EXPOSED*
SOR3_EXPOSED*
MAXWELL
STRAP0
NC
NC
40.2k 1% TO GND
IOVDD
R598
R624
4.99k
0402
DNI
R597
24.9k
0402
COMMON
R618
45.3k
4.99k
0402
0402
COMMON
DNI
R623
R617
34.8k
45.3k
0402
0402
DNI
COMMON
GND
3.3V
GC6+ ISLAND
ENABLED
ROM_SI
ROM_SO
ROM_SCLK
ROM_SI
SAMSUNG
HYNIX ELPI DA
45.3k
PD
34.8k PD 30.1k PD
C E
GC6+ DEBUG
0V
1.65V
GC6+ ISLAND
DISABLED
MODE
IOVDD
R197
R193
4.99k
0402
DNI
R200
45.3k
1 %
0402
COMMON
R195
10k
4.99k
0402
0402
DNI
DNI
R194
R199
30.1k
24.9k
1 %
1 %
0402
0402
COMMON
COMMON
GND
LB503
30ohm
1V_PLL
COMMONBEAD_060 3
12
12
12
C650
C661
22uF
0.1uF
6.3V
16V
20%
10%
X5R
X7R
0805
0402
COMMON
COMMON
R587
1 2
IOVDD
GND
PEX_VDD
VID_PLL
12
C730
0.1uF
16V
10%
X7R
0402
COMMON
GND
12
C660
C680
0.1uF
0.1uF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
IOVDD
GND
XTALSSIN_GPU
IN20
C740
18pF
50V
5%
C0G
0402
DNI
0402
12
1 %
GND
LB504
R588
1 2
PEX_VDD
R1641
10k
5 %
0402
DNI
FL_REFCLK_T
40.2k
COMMON
R627
1 2
0402
5 %
C696 0.1uF
1 2
0402 16V
300ohm
COMMONBEAD_0 603
0ohm
COMMON0402
R591
1 2
R572
1 2
LB505
BEAD_060 3
100k
COMMON
GND
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
MULTISTRAP_REF0_GND
10%
X7R
0ohm
COMMON0402
0ohm
COMMON0402
30ohm
COMMON
R628
10k
5 %
0402
DNI
GND
R638
10k
5 %
0402
DNI
C683
1 2
SP_PLLVDD
GPU_PINAL34
10uF
0603
6.3V
20%
X5R
COMMON
FB_PLL_DLL_AVDD
C599
12
0.1uF
16V
10%
X7R
0402
COMMON
GND
12
GND
20k
25k
30k
35k
45k
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1R
@digital.u_gpu_gb2b_192( sym_1 3):page22 _i172
BGA1428
COMMON
13/18 MISC_2
AK7
STRAP0
AL6
STRAP1
AK6
STRAP2
AP6
STRAP3
AN6
STRAP4
AH7
MULTISTRAP_REF0_GND
U_GPU_GB2B_ 192 _BG A142 8-T EST_G M206 _G PU_GM2 06- INT-A1- GM2 06- INT-A1
G1Q
@digital.u_gpu_gb2b_192( sym_1 2):page22 _i171
BGA1428
COMMON
12/18 XTAL/PLL
AR12
SP_PLLVDD
AR13
VID_PLLVDD
GM206 GK106
AL34
NC
H19
FB_PLL_DLL_AVDD
AH34
GPCPLL0_AVDD
AD9
GPCPLL2_AVDD
AE9
LSX_PLLVDD
AP2
XTALSSIN
AN2
XTALIN
GENERIC_SEZ1
XTALIN
C143
18pF
50V
5%
GND GND
0402
COMMON
FDBA
GND 3V3
0000 10005k
001015k
0100
0101
0110
0111
Y1
@clocks.xtal_4pin( sym_2 ):page22_ i83
27MHz
COMMON
123
4
DLL_AVDD0
DLL_AVDD2
1001000110k
1010
10110011
1100
1101
1110
1111
XTALOUTBUFF
ROM_SCLK
GENERIC_SEZ1
AU5
ROM_CS
AT5
ROM_SI
AT4
ROM_SO
AU4
AL7
BUFRST
AP1
AN1
XTALOUT
XTALOUT
GND
IOVDD
R192
33ohm
ROM_CS* ROM_CS_R
1 2
COMMON0402
5 %
R201
33ohm
ROM_SI ROM_SI_R
1 2
ROM_SO
COMMON0402
5 %
R196
33ohm
ROM_SCLK ROM_SCLK_R
1 2
COMMON0402
5 %
GPU_BUFRST*
Smart Fan
XTALSSIN XTALOUTBUFF
PU
PU
PD
PD
3.3V
66%
R615
XTALOUTBUFF
12
C144
18pF
50V
5%
0402
COMMON
100k
1 2
COMMON
0402
5 %
R606
330ohm
5 %
0402
DNI
GND
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
G
R191
U501
10k
@memory.u_mem_fl_ser_256k x8( sym_1 ):page22_ i66
SO8
5 %
SO8
0402
COMMON
COMMON
7
HOLD8VCC
3
WP
1
CS
5
SI
2
SO
6
SCK
OUT 32
KEPLER
Inverted PWM %
PU
66 (33% HIGH)
PD
50 (50% HIGH)
PU
33 (66% HIGH)
PD
0 (100% HIGH)
MAXWELL
XTALOUTBUFF
1.65V
33%
DISABLED
IOVDD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
Custom
Custom
Custom
22_MISC2_ ROM , XTAL, St raps
22_MISC2_ ROM , XTAL, St raps
22_MISC2_ ROM , XTAL, St raps
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
1
2
IOVDD
C146
12
0.1uF
16V
X7R
4
0402
GND
COMMON
GND
3
0V
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
22 34
22 34
22 34
4
5
10
10
10
Page 23
PS: 5V, PEX_VDD
smd.db-x7.ru
1
A B C D E F G H
C91
12
0.1uF
16V
10%
X7R
0402
COMMON
5V / DDC SUPPLY
@power_supply .u_vre g_3pin(s ym_2) :page23_i2 7
SOT223_ GOI
U505
GOI,IGOI,TO263
1.25V
COMMON
2
OUT3IN
4
TAB
GND/ADJ
1
5V_ADJ
R110
12
124ohm
1 %
0402
COMMON
R114
PLACE 0603 10UF FOOTPRINT
383ohm
ON TOP OF 0805 FOOTPRINT
1 %
0402
COMMON
Vref=1.256V
Vo_Typ=1.256*(1+383/124)+60uA*383=5.16V
GND
5V
F501
0.75A
5V
0.2A
C923
10uF
16V
20%
X5R
0603
COMMON
20MIL
C924
12
C898
12
10uF
4.7uF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0603
COMMON
COMMON
1206
COMMON
1 2
POLYSWITCH
C897
12
0.1uF
16V
10%
X7R
0402
COMMON
GND
12V_PEX6_F1
12V_F
R85
R91
0ohm
0ohm
COMMON
COMMON
R102
1 2
* DDC backdrive
12V
@discrete.d_scho ttky(sy m_3):page 23_i8
0.400
5V_VIN_D2
PLACE 0603 10UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
0ohm
COMMON
0603
D1
12
SOD323
20V
1A
COMMON
0.400
5V_VIN_D
C88
12
10uF
16V
20%
X5R
0603
COMMON
12V
C89
12
10uF
16V
10%
X5R
0805
COMMON
GND
DDC_5V
5V
0.2A
0.400
1
C94
12
470pF
50V
5%
C0G
0603
COMMON
GND
2
3
FBVDDQ
C755
12
C760
12
10uF
4.7uF
6.3V
6.3V
20%
20%
X5R
VID PLL SUPPLY
BYPASS
U8
1.05V
SC705
COMMON
315-0217-000
1
IN
3
EN4GND/NC
PEX_VDD
5
OUT
GND1
2
GND
4
3V3_F
PS_VIDPLL_EN
IN31
C119
12
1uF
10%
X5R
0402
COMMON
GND
LB3
30ohm
BEAD_060 3
COMMON
1.0V
0.406
GND GND
VID_PLL
C126
12
C122
12
1uF
10uF
10%
20%
X5R
X5R
0402
0603
COMMON
COMMON
GND
5V
C756
12
1uF
16V
10%
X5R
0603
COMMON
GND
0805
COMMON
GND
PS_PEXVDD_EN
IN31
PS_PEXVDD_PGOOD
OUT31
ADD TESTPOINT VIA TO PEXVDD_PGOOD
X5R
0603
COMMON
GND
Vref=0.8V
Vout = Vref * (1+Rtop/ Rbot)
1.047V = 0.8 * (1+3.09K/10.0K)
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
PEXVDD - PEXVDD - LINEAR OPTION
EM5103GE: 315-0612-000
GS7103NVSO-R: 315-0614-0 00
U10
@power_supply .u_vre g_apl591 0(sy m_1):page2 3_i168
SOP8
COMMON
3
6
VIN
VOUT
4
VCNTL
2
EN
PS1_1V_FB
7
FB
1
POK
9
GND
5
8
NC
GND
GND
C753
12
R648
1nF
0ohm
16V
0402
10%
COMMON
X7R
local sense
0402
COMMON
PS1_1V_RS
R653
3.09k
1 %
0402
COMMON
R656
10k
1 %
0402
COMMON
GND
FDBA
remote sense
C134
12
0.1uF
16V
10%
X7R
0402
COMMON
R605 0ohm
1 2
1V PLL SUPPLY
PEX_VDD
1.0V
2.7A
0.400
C135
12
10uF
6.3V
20%
X5R
0805
COMMON
PEX_VDD
COMMON0402
1V_PLL
1.05V
LB506 30ohm
COMMONBEAD_0 603
0.400
PEX_VDD
C745
12
C131
12
22uF
4.7uF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0603
COMMON
COMMON
GND
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MSI
MSI
MSI
MS-V320
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
23_PS_ 5V, PEX_VDD, VID_PLL
23_PS_ 5V, PEX_VDD, VID_PLL
23_PS_ 5V, PEX_VDD, VID_PLL
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
2
3
4
5
10
10
10
Sheet ofDate:
23 34
Sheet ofDate:
23 34
Sheet ofDate:
23 34
Page 24
A B C D E F G H
smd.db-x7.ru
PS: FBVDDQ
1
PHASE
C85
1 2
0402
GND
Vref
accuracy
1%
1% 300kHz
12V_F
D507
@discrete.d(sym_1 ):page24_ i27
SOD323
75V
0.3A
1 2
PS_FB_HDRV PS_FB_HDRV_R
R745
0ohm
1 2
0.300
0603
0ohm
PS_FB_BST_R
0603 C OMMO N
PS_FB_SW
0.500 22A
0.300
APW8720KE
PS_FB_FB
0.300
Vout = Vref * (1 + Rtop / Rbot)
Vout = Vref * (1 + Rtop / (Rbot ll R bot1))
COMMON
0.300
12
1
BOOT
2
HDRV
8
6
FB
220pF
50V
5%
C0G
COMMON
R108
1 2
R98
10k
1 %
0402
COMMON
Fosc
300kHz
1 2
0.300
PS_FB_LDRV
RT8101
3.92k
COMMON0402
1 %
GPIO7
0
1
Vout = .5*(1+1.78k/(1k||5.62k)) = 1.548V
0
Vout = .8*(1+1k/1.37k) = 1.384V
1
Vout = .8*(1+1k/(1.37k||4.87k)) = 1.549V
R722
PS_FB_BST
12V_F
R723
2.2ohm
5 %
0603
COMMON
C831
12
1uF
10%
2
3
X5R
0402
COMMON
GND
PS_FB_COMP
12
3
D
Q519B
PS_FBVDDQ_EN*
IN
31
4
G
5
S
@discrete.q_fet_n_enh(s ym_2) :page24_i92
SOT363
4
GND
GND
U506
@power_supply .u_swr eg_up6 101(s ym_1):pa ge24_i16 6
0.5V
PSOP8
COMMON
PS_FB_VCC5
5
VCC
0.300
12V
COMP/EN
7
3
GND4LDRV/OCS
9
GND
GND
R105
30k
1 2
0402
COMMON
5 %
Rocp2
for voltage-mode error amp
C86
47nF
1 2
PS_FB_RC_CP
0402
6.3V
0.100
X5R
COMMON
C80
100pF
50V
5%
C0G
0402
APW8720KE
for transconductanc e error amp
Vref
0.5V
APW8720KE Vout = .5*(1+1.78k/1k) = 1.39V
0.8V
RT8101GSP
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
12V_F
PLACE CLOSE TO TOP FET
C75
12
0.47uF
16V
10%
X7R
0603
COMMON
R746
10k
5 %
0402
COMMON
D
G
4
S
D
G
4
S
GND
5
Q17
@discrete.q_fet_n_enh(s ym_5) :page24_i39
LFPAK
COMMON
1
2
3
5
Q24
@discrete.q_fet_n_enh(s ym_5) :page24_i40
LFPAK
COMMON
1
2
3
GND
GPIO7
0
1
FBVDDQ
IN21
C845
12
2.2nF
50V
X7R
0603
R703
10k
5 %
0402
COMMON
GND
R708
1 2
0402
5 %
C100
330uF
COMMON
20%
2V
AL-Polyme r
3.5A@105 deg C,10 0KH z
0.006oh m
SMD_734 3
COMMON
PS_FB_SW_RC
0.300
R739
2.2ohm
5 %
COMMON
GND
PS_FB_VSEL
10k
COMMON
C816
12
1nF
16V
10%
X7R
0402
COMMON
GND
5
LFPAK
D
Q23
@discrete.q_fet_n_enh(s ym_5) :page24_i10 0
LFPAK
G
4
COMMON
S
1
2
3
GND
FBVDDQ
can be colayouted with output bulks
C808
330uF
COMMON
20%
2V
AL-Polyme r
3.5A@105 deg C,10 0KH z
0.006oh m
SMD_734 3
FDBA
NV3V3
1.38V
<= DEFAULT1.55V
GPIO7_FBVDD_SEL
0.300
LFPAK
C844
0.1uF
10%
X7R
0402
COMMON
LFPAK
1G1D1 S
L10 1uH
0.00307 ohm
24A
23.5A
G
2
D
S
COMMONSMD_420 X40 0
R729
5.62k
1 %
0402
COMMON
Rbot1 Rbot
PS_FB_RBOT
6
Q519A
@discrete.q_fet_n_enh(s ym_2) :page24_i93
COMMON
1
GND
output ripple: 4.55A p-p, 1uH, 300kHz
R577
0ohm
0402
COMMON
PS_FB_R
0.300
R728
1.78k
1 %
0402
COMMON
Rtop
R730
1k
1 %
0402
COMMON
GND
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
1.5V 0.50016A
C796
12
C797
12
10uF
10uF
6.3V
6.3V
X5R
X5R
0805
0805
COMMON
COMMON
FBVDDQ
R1651
0ohm
0402
COMMON
R712
150ohm
1 %
0402
COMMON
PS_FB_C
0.3000.100
C836
12
10nF
16V
10%
X7R
0402
COMMON
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
24_PS_ FBVDD_Q
24_PS_ FBVDD_Q
24_PS_ FBVDD_Q
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
C103
560uF
20%
2.5V
AL-Polyme r
4.18A@10 5de gC ,100 KHz
0.007oh m
TH_D5 0P20
R1652
0ohm
0402
COMMON
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
FBVDDQ
GND
24 34
24 34
24 34
C104
560uF
20%
2.5V
AL-Polyme r
4.18A@10 5de gC ,100 KHz
0.007oh m
TH_D5 0P20
10
10
10
1
2
3
4
Page 25
A B C D E F G H
smd.db-x7.ru
PS: NVVDD Controller
1
GPIO6_PSI*
2
R_VREF2
0.300
0.300
R_REFADJ
R124
1 2
0402
R123
1 2
0402 COMM ON
6.04k6.04k
0ohm
COMMON
0ohm
R_VREF1
6.98k
3
4
NVVDD_SENSE
IN3,29
GND_SENSE
IN3,29
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
IN21,29,31
Vmin
Vmax
Vboot
0.95V
RDRP1
dont care
NVVDD
R125
100ohm
1 %
0402
COMMON
C84
12
220pF
50V
5%
C0G
0402
DNI
R122
100ohm
1 %
0402
COMMON
GND
0.604V C_VREF
1.302V
IN25
IN25
RDRP2 CDRP
dont care
dont careopen circuit
1.91k
4.7nF
PS_NTC_P
OUT 25
PS_NTC_N
OUT 25
IN 25
NVVDD_VS
OUT 25
NVVDD_VS*
OUT 25
GND
OUT25
C90
2.2nF
1 2
16V
0402
X7R
10%
DNI
0 ohm
DC Loadline
1.3mOhm AC Loadline, 9us rec overy
12
R735
C837
10k
100pF
1 %
50V
0402
5%
COMMON
C0G
0402
COMMON
RESERVE FOR NTC
R1635%100k,B25/85@[ ]
PS_NTC_P
PLACE NTC_N RESISTOR CLOSE TO PHASE 1 INDUCTOR AND
ON THE SAME OF THE BOARD AS T HE INDUCTOR
C E
NVVDD_VS*
NVVDD_VS
R107
1 2
1 %
PS_TYPE2_B
12
DNI0603
R762
1 2
0402
OUT
DNI1k0402
C829
15pF
50V
5%
C0G
0402
COMMON
12V_F
R760
1 2
0402
10k
COMMON
5 %
0.300
0.300
PS_NTC_MID
5V
3V3_F
0ohm
COMMON
R106
1 2
0402 D NI
R111
1 2
3V3_F
R761
1 2
0402 COMM ON
GND
0ohm
R714
1 2
0402 C OMMO N
1 %
0402
1 %
R775 499ohm
1 2
0603
R772 499ohm
1 2
R67 750ohm
1 2
R66 750ohm
1 2
0603
R68
1 2
0603
R774 750ohm
1 2
0603 C OMMO N
R773
1 2
0603
10k
5 %
12
13k
4.02k
COMMON
1 %
1 %
5 %
5 %
5 %
5 %
750ohm
COMMON
5 %
C72
1uF
6.3V
10%
X5R
0402
COMMON
R83
0ohm
0402
COMMON
R716
1 2
0402
DNI
DNI0603
COMMON0603
COMMON
750ohm
COMMON
R100
10k
1 %
0402
COMMON
13k
COMMON
1 %
C65
12
1uF
6.3V
10%
X7R
0603
COMMON
GND GND
R76
4.22k
R_VREF2
1 %
0402
COMMON
PS_GND
R94 1.87k
1 2
0402 C OMMO N
1 %
C828 2.2nF
1 2
0402 16V
COMMON
X7R
10%
RDRP2
R115
4.99k
1 2
0402
COMMON
1 %
C82
15pF
1 2
50V
0402
5%
COMMON
12V_F
R719
10k
5 %
0402
COMMON
R755
1k
1 %
0402
COMMON
1 2
C0G
PS_COMP_RC
PS_TYPE2_A
R732 1k
1 2
R731
1 2
0402
1 %
RDRP1
PS_DRP_RC
PS_NTC_N
R768
1 2
0402
C81 120pF
0402 50V
0402 C OMMO N
1 %
5.49k
COMMON
GND
OUT 25
4.75k
COMMON
1 %
R_VREF1
12
R86
10k
1 %
0402
DNI
5%
COMMON
0402 COMM ON
C830
12
10nF
10V
10%
X5R
0402
COMMON
GND
IN29,30,31
IN21,29
C74
10nF
C_REFIN
6.3V
10%
0402
COMMON
C78
2.2nF
1 2
0402 16V
X7R
10%
R718 0ohm
1 2
R117
1 2
0402 C OMMO N
1 %
C92
1 2
0402
X7R
R104
12.7k
1 2
0402
1 %
IN 25
IN 25
2.2nF
16V
10%
COMMON
4.99k
R_REFADJ
CDRP
R767 6.04k
1 2
COMMON
0.381
NVVDD_GPIO6_PSI*
NVVDD_EN
GPIO0_NVAPI_1_PWM_VID
0402
COMMON
1 %
BI 25
R101
34k
1 %
0402
DNI
GND GND
PS_VCC5V
PS_VCC5V
PS_DRP_TCOMP
PS_VDFB_TCOMP
PS_CSSUM_SS
PS_12VMON
PS_VIDBUF
PS_DIFFOUT
PS_VREF
PS_REFIN
PS_COMP
PS_VFB
R743
34k
1 %
0402
COMMON
R70
9.09k
0402
COMMON
R75
1k
1 %
0402
COMMON
GND GND
U507
@power_supply .u_openv reg_ty pe4(s ym_1):pag e25_i31 7
2V
QFN32
COMMON
OPEN VREG
30
VCC
6
12VMON
5
PSI*
4
EN
2
VID
31
VREF
32
REFIN
1
REFADJ
10
VSN/FBRTN
9
VSP/NC
12
COMP/VDROOP
25
13
VFB
11
VSDIFF/STRAP1
14
CS_TCOMP1
15
CS_TCOMP2
16
CSSUM/STRAP2
33
GND
Overshoot Recov ery Enhanc ement
PS_BASE_OSE
C71
12
0.1uF
16V
10%
0402
COMMON
PWM1
PWM2
PWM3
PWM4
CS1P
CS1N
CS2P
CS2N
CS3P
CS3N
CS4P
CS4N
DRV_EN
VR_RDY
ILIM
FS
ROSC F sw
34k
FDBA
3
1B1C1E
C
Q18
B
@discrete.q_npn(s ym_1):pag e25_i32 5
1
SOT23_1 B1C 1E
COMMON
E
2
R78
33.2k
1 %
0402
COMMON
GND
25
26
27
28
NVVDD_CS1_R
18
17
NVVDD_CS2_R
20
19
NVVDD_CS3_R
22
21
NVVDD_CS4_R
24
NVVDD_CS4N_R
23
NVVDD_DRVON
29
PS_NVVDD_PGOOD
3
PS_ILIM
8
PS_ROSC
7
R721
34k
ROSC
1 %
0402
COMMON
GND
300kHz
NVVDD_GATE1
NVVDD_GATE2
NVVDD_GATE3
NVVDD_GATE4
R720
1 2
0402
1 2
R749
1 2
0402
R742
1 2
0402
R744
1 2
R751 0ohm
1 2
R756
1 2
R752
1 2
0402
R769
1 2
0402 C OMMO N
R771
1 2
0402 C OMMO N
34k
DNI
1 %
R80
49.9k
0402
COMMON
1 %
C73
150pF
1 2
0402
50V
5%
C0G
COMMON
C77
10nF
1 2
0402
16V
10%
X7R
0.300
0.300
0.300
0.300
0ohm
COMMON
0ohm
COMMON
0ohm
0402 C OMMO N
COMMON0402
0ohm
0402
COMMON
0ohm
COMMON
0ohm
0ohm
OUT 29,31
RLIM1
12V_F
RLIM2
GND
OUT 26
OUT 26
OUT 27
OUT 27
NVVDD_CS4
R770
0ohm
1 2
stuff both these as 0ohm for 3phase NVVDD
0402
COMMON
NVVDD_CS4N
3V3_F
R73
10k
5 %
0402
PS_VREF
R81
12.1k
1 %
COMMON
R87
4.99k
1 %
0402
COMMON
GND
G
COMMON
0.300
IN 25
GND
C79
12
100pF
50V
5%
C0G
0402
GND
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
PS_VFBPS_VFB_OSE
BI 25
PS_COMPPS_COMP_OSE
BI 25
NVVDD_CS1
IN 26
NVVDD_CS1NNVVDD_CS1N_R
IN 26
NVVDD_CS2
IN 26
NVVDD_CS2NNVVDD_CS2N_R
IN 26
NVVDD_CS3
IN 27
NVVDD_CS3NNVVDD_CS3N_R
IN 27
NVVDD
R701 0ohm
1 2
COMMON0402
RLIM2
8.06k
MS-V320
MS-V320
MS-V320
IN 27
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
R72
10k
5 %
0402
COMMON
OUT 26,27
RLIM1
12.1k
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
25_PS_ NVVDD C ontroller OVR4
25_PS_ NVVDD C ontroller OVR4
25_PS_ NVVDD C ontroller OVR4
OCP
240A
25 34
25 34
25 34
1
2
27
3
4
5
10
10
10
Page 26
PS: NVVDD Phase 1,2
smd.db-x7.ru
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
A B C D E F G H
12V_F
C70
12
0.1uF
D
G
4
S
VVVV32010
5
D
Q28
@discrete.q_fet_n_enh(s ym_5) :page26_i58
LFPAK
G
4
COMMON
S
1
2
3
VVVV32010
12V_PEX6_F1
5
D
Q13
@discrete.q_fet_n_enh(s ym_5) :page26_i20 4
LFPAK
G
4
COMMON
S
1
2
3
VVVV32010
5
D
Q20
@discrete.q_fet_n_enh(s ym_5) :page26_i20 1
LFPAK
COMMON
S
1
2
3
300-0787-000
GND
VVVV32010
GND
* place clos e to drain of T op FET
5
Q15
@discrete.q_fet_n_enh(s ym_5) :page26_i13 0
COMMON
1
2
3
300-0788-000
300-0787-000
GND
C68
12
0.1uF
16V
10%
0402
COMMON
VVVV32010
GND
* place clos e to drain of T op FET
300-0788-000
LFPAK
16V
10%
X7R
0402
COMMON
LFPAK
G
4
PS_NVVDD_PHASE1
D
G
4
S
VVVV32010
PS_NVVDD_PHASE2
5
D
Q26
@discrete.q_fet_n_enh(s ym_5) :page26_i30 8
LFPAK
COMMON
S
1
2
3
VVVV32010
GND
5
Q22
@discrete.q_fet_n_enh(s ym_5) :page26_i30 6
LFPAK
COMMON
1
2
3
300-0787-000
GND
300-0787-000
R1678
1 2
0402
XXXV32010
R1679 0ohm
1 2
XXXV32010
VVVV32010
12
C856
1nF
16V
10%
X7R
0402
COMMON
XXXV32010
0ohm
COMMON
R748
10k
1 2
0402
COMMON
5 %
XXXV32010
C847 0.22u F
1 2
COMMON16V0402
VVVV32010
R694
3.48k
0402
COMMON
VVVV32010
C833
12
1nF
16V
10%
X7R
0402
COMMON
XXXV32010
COMMON0402
R697
3.48k
0402
COMMON
12
PS_NVVDD_NVVDD_RC2
0.406
XXXV32010
R738
1ohm
1206
COMMON
XXXV32010
GND
PS_NVVDD_OVR2P1_PH2
12
XXXV32010
XXXV32010
GND
PS_NVVDD_OVR2P1_PH1
C850
1nF
16V
10%
X7R
0402
COMMON
C834
1nF
16V
10%
X7R
0402
COMMON
PS_NVVDD_NVVDD_RC1
0.406
R715
1ohm
5 %
1206
COMMON
0.381
R750
1 2
0402 C OMMO N
C853 0.22u F
L7
0.381
XXXV32010
1 2
VVVV32010
TH C OMM ON
VVVV32010
5 %
L9
16V040 2 C OMMO N
VVVV32010
10k
0.22uH
TH C OMM ON
0.22uH
OUT 29
OUT 29
NVVDD_CS1
NVVDD_CS1N
R695
0ohm
0402
COMMON
VVVV32010
20MIL
12
VVVV32010
NVVDD
C111
C110
820uF
820uF
20%
20%
2.5V
2.5V
AL-Polyme r
AL-Polyme r
0.007oh m
0.007oh m
TH_D6 3P25
TH_D6 3P25
VVVV32010
VVVV32010
NVVDD
NVVDD_CS2
OUT 25
NVVDD_CS2N
OUT 25
R698
0ohm
0402
COMMON
VVVV32010
C772
12
C746
12
22uF
22uF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV32010
VVVV32010
FDBA
5V
R77
210k
12V_F
1 %
COMMON
NVVDD_GATE1
IN
XXXV32010
R74
100k
R71
2.2ohm
NVVDD_DRVON
IN
PLACE 0603 1UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
NVVDD_GATE2
IN
PLACE 0603 1UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
5 %
0402
COMMON
XXXV32010
GND
PS_NVVDD_VCC1
C872
12
1uF
16V
10%
X5R
0603
COMMON
VVVV32010
5V
12V_F
R92
210k
1 %
0402
COMMON
XXXV32010
R88
100k
5 %
0402
COMMON
XXXV32010
VVVV32010
GND
NVVDD_DRVON
IN25,26,27
0.305
C854
12
1uF
16V
X5R
0603
COMMON
VVVV32010
GND
IN29
VVVV32010
GND
5 %
0603
COMMON
R95
2.2ohm
5 %
0402
COMMON
PS_NVVDD_VCC2
0.305
PS_NVVDD_BOOT12
2
3
4
6
9
PS_NVVDD_OVR2P1_LG2
U2
@power_supply .u_swr eg_adp 3110(s ym_1) :page26_i3 15
NCP81062MNTWG
DFN8
COMMON
2
IN
3
OD*/NC
4
VCC
6
PGND
9
TP
VVVV32010
PS_NVVDD_OVR2P1_LG1
IN29
12V_F
R726
2.2ohm
5 %
0402
COMMON
XXXV32010
0.381
C818
12
12
10uF
16V
20%
X5R
0603
COMMON
XXXV32010
XXXV32010
GND
IN29
IN27
U3
@power_supply .u_swr eg_adp 3110(s ym_1) :page26_i3 16
NCP81062MNTWG
DFN8
COMMON
IN
DRVH
OD*/NC
VCC
PGND
TP
VVVV32010
8
DRVH
7
SWN
0.381
1
PS_NVVDD_BOOT1
BST
5
DRVL
D505
@discrete.d_3pin_aa( sym_1 ):page26 _i294
30V
0.2A
SOT23
COMMON
1
3
2
C825
10uF
16V
20%
X5R
0603
COMMON
XXXV32010
PS_NVVDD_OVR2P1_UG2
PS_NVVDD_BOOT2_R
0.381
8
7
SWN
1
PS_NVVDD_BOOT2
BST
0.381
5
PS_NVVDD_LG2
DRVL
IN29
0.381
0.500
0.381
PS_NVVDD_LG1
PS_NVVDD_BOOT4_R
PS_NVVDD_BOOT1_R
0.500
0.381
colayout
resistors
PS_NVVDD_OVR2P1_UG1
R1673 0ohm
1 2
0.381
PS_NVVDD_UG2
R84
1 2
0402
COMMON
VVVV32010
R1672
1 2
0402 C OMMO N
XXXV32010
0.381
colayout
XXXV32010
0ohm
PS_NVVDD_UG1
R79
1 2
0603
COMMON
VVVV32010
COMMON0402
1ohm
XXXV32010
0.381
0.381
resistors
colayout
0402
C857
R1674
1ohm
5 %
0402
COMMON
1ohm
R763
1 2
COMMON
VVVV32010
1 2
0603
VVVV32010
PS_NVVDD_OVR2P1_BOOT2
R1677
0ohm
1 2
0402 C OMMO N
XXXV32010
0.381
PS_NVVDD_UG1_R
R747
0ohm
1 2
COMMON
0603
VVVV32010
R741
10k
C865 0.1uF
1 2
5 %
16V
0603
0402
10%
COMMON
X7R
COMMON
VVVV32010
VVVV32010
R1675
1ohm
5 %
0402
COMMON
PS_NVVDD_OVR2P1_BOOT1
XXXV32010
0.381
12
XXXV32010
GND
OUT 27
R1676
0ohm
0.05 ohm
0402
COMMON
XXXV32010
0ohm
R757
0.1uF
10k
16V
5 %
10%
0402
X7R
COMMON
COMMON
VVVV32010
0.381
C842
12
1nF
16V
10%
0402
COMMON
XXXV32010
GND
C E
OUT 29
C841
1nF
16V
10%
X7R
0402
COMMON
0.381
PS_NVVDD_UG2_R
OUT 29
LFPAK
LFPAK
LFPAK
LFPAK
G
4
VVVV32010
OUT 25
OUT 25
C775
C784
12
22uF
22uF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV32010
C113
820uF
20%
2.5V
AL-Polyme r
0.007oh m
TH_D6 3P25
VVVV32010
C793
12
22uF
6.3V
20%
X5R
0805
COMMON
XXXV32010
1
NVVDD
1.05V
125A
C785
12
C774
12
22uF
22uF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
XXXV32010
XXXV32010
NVVDD
GND
C112
820uF
20%
2.5V
AL-Polyme r
0.007oh m
TH_D6 3P25
VVVV32010
C117
330uF
COMMON
20%
2V
AL-Polyme r
0.006oh m
SMD_734 3
XXXV32010
NVVDD
GND
NVVDD
GND
C734
330uF
COMMON
20%
2V
AL-Polyme r
0.006oh m
SMD_734 3
XXXV32010
GND
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MSI
MSI
MSI
MS-V320
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
26_PS_ NVVDD Phas e 1,2
26_PS_ NVVDD Phas e 1,2
26_PS_ NVVDD Phas e 1,2
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
26 34
26 34
26 34
2
3
4
10
10
10
Page 27
A B C D E F G H
smd.db-x7.ru
PS: NVVDD Phase 3,4
1
25
PLACE 0603 1UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
2
3
stuff 0ohm for 3phas e
4
NVVDD_GATE3
NVVDD_DRVON
IN25,26,27
12
NVVDD_GATE4
IN25
IN25,26,27
PLACE 0603 1UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
NVVDD_DRVON
C823
1uF
16V
10%
X5R
0603
COMMON
R1680
1 2
0.05 ohm
5V
R120
210k
1 %
0402
COMMON
R116
100k
5 %
0402
COMMON
GND
5V
R99
210k
1 %
0402
COMMON
R103
100k
5 %
COMMON
GND
12
nv_res
0ohm
NVVDD_OVR2P1_GATE3
COMMON0402
12V_F
R126
2.2ohm
5 %
0402
COMMON
PS_NVVDD_VCC3
GND
12V_F
R97
2.2ohm
5 %
COMMON
0.305
PS_NVVDD_VCC4
C843
1uF
16V
10%
X5R
0603
COMMON
GND
0.305
PS_NVVDD_BOOT34
2
3
4
6
9
2
3
4
6
9
IN 29
U5
@power_supply .u_swr eg_adp 3110(s ym_1) :page27_i3 32
NCP81062MNTWG
DFN8
COMMON
IN
DRVH
SWN
OD*/NC
BST
VCC
PGND
DRVL
TP
12V_F
R758
2.2ohm
5 %
0402
COMMON
0.381
C819
12
12
10uF
20%
X5R
0603
COMMON
GND
PS_NVVDD_BOOT4_R
IN26
U4
NCP81062MNTWG
DFN8
COMMON
IN
DRVH
SWN
OD*/NC
BST
VCC
PGND
DRVL
TP
0.381
8
PS_NVVDD_UG3
0.500
7
0.381
1
PS_NVVDD_BOOT3
0.381
5
PS_NVVDD_LG3
D506
@discrete.d_3pin_aa( sym_1 ):page27 _i307
30V
0.2A
SOT23
COMMON
1
3
2
C826
10uF
20%
X5R
0603
COMMON
0.381
8
0.500
7
0.381
1
PS_NVVDD_BOOT4
PS_NVVDD_LG4
5
1 2
0402
PS_NVVDD_BOOT2_R
PS_NVVDD_BOOT3_R
0.381
COMMON
PS_NVVDD_UG4
1 2
0402
COMMON
R113
1ohm
0.381
R109
1ohm
R717
1 2
0603 C OMMO N
0ohm
R764 0ohm
1 2
C827 0.1uF
1 2
0603 16V
10%
X7R
COMMON
0.381
R734 0ohm
1 2
0402 C OMMO N
C832
1 2
COMMON0402
OUT 26
0.1uF
16V060 3
10%
COMMON
0.381
PS_NVVDD_UG3_R
R765
10k
5 %
0402
COMMON
12
GND
PS_NVVDD_UG4_R
R753
10k
5 %
COMMON
PS_NV_SV_LG4
12
GND
C824
1nF
16V
X7R
0402
COMMON
0.381
C820
1nF
16V
10%
X7R
0402
COMMON
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
12V_PEX6_F1
12
12
C67
C66
0.1uF
0.1uF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
GND
* place clos e to drain of T op FET
5
LFPAK
D
Q12
@discrete.q_fet_n_enh(s ym_5) :page27_i33 6
LFPAK
G
4
COMMON
S
1
2
3
300-0788-000
PS_NVVDD_PHASE3
5
LFPAK
D
Q25
@discrete.q_fet_n_enh(s ym_5) :page27_i33 7
LFPAK
G
4
COMMON
S
1
2
3
GND
12V_PEX6_F1
5
LFPAK
D
Q14
@discrete.q_fet_n_enh(s ym_5) :page27_i33 5
LFPAK
G
4
COMMON
S
1
2
3
5
LFPAK
D
Q27
@discrete.q_fet_n_enh(s ym_5) :page27_i33 9
LFPAK
G
4
1S
0.381
2
3
300-0787-000
GND
LFPAK
300-0787-000
C69
12
0.1uF
16V
X7R
0402
COMMON
GND
* place clos e to drain of T op FET
300-0788-000
PS_NVVDD_PHASE4
LFPAK
D
G
4
S
D
G
4
5
Q19
@discrete.q_fet_n_enh(s ym_5) :page27_i33 8
LFPAK
COMMON
1
2
3
300-0787-000
GND
5
Q21
@discrete.q_fet_n_enh(s ym_5) :page27_i34 0
LFPAK
1S
2
3
300-0787-000
GND
R1681 0ohm
1 2
12
C855
12
1nF
16V
10%
X7R
0402
COMMON
COMMON0402
R702
3.48k
0402
COMMON
C846
1nF
16V
X7R
0402
COMMON
R710
3.48k
0402
COMMON
C851
12
1nF
16V
X7R
0402
COMMON
PS_NVVDD_NVVDD_RC4
0.406
R759
1ohm
5 %
1206
COMMON
GND
12
GND
NVVDD_OVR2P1_PH3
C848
1nF
16V
10%
X7R
0402
COMMON
PS_NVVDD_NVVDD_RC3
0.406
R737
1ohm
5 %
1206
COMMON
R754
1 2
0402
C852 0.22u F
1 2
L8
5 %
C849 0.22uF
1 2
L6
0402 COM MON16V
10k
COMMON
0.22uH
COMMONTH
R740
1 2
0402
5 %
0.22uH
COMMONTH
COMMON0402 16V
10k
COMMON
R709
0ohm
0402
COMMON
OUT 29
R699
0ohm
0402
COMMON
FDBA
NVVDD_CS3N
NVVDD_CS3
C786
12
C792
12
22uF
22uF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
NVVDD_CS4
NVVDD_CS4N
OUT 25
OUT 25
NVVDD
C791
12
22uF
6.3V
20%
X5R
0805
COMMON
GND
OUT 25
C789
12
22uF
6.3V
X5R
0805
COMMON
25
NVVDD
C788
12
C773
12
22uF
22uF
6.3V
6.3V
X5R
X5R
0805
0805
COMMON
COMMON
GND
MSI
MSI
MSI
Size Document Description Rev
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Custom
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Custom
Wednesday, November 12, 201 4
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MIC RO-STA R INT 'L CO .,LTD
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MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
27_PS_ NVVDD Phas e 3,4
27_PS_ NVVDD Phas e 3,4
27_PS_ NVVDD Phas e 3,4
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IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
FDBA
MIC RO-STA R INT 'L CO .,LTD
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MS-V320
MS-V320
MSI
MSI
MSI
MS-V320
Size Document Description Rev
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Size Document Description Rev
Custom
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Custom
28_[RESERVED]
28_[RESERVED]
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A B C D E F G H
smd.db-x7.ru
PS: NVVDD OVR2+1 POWER
1
499k
1 2
12V_F
0402
DNI
1 %
~300KHz
52.3k
1 2
GND
0402
COMMON
Frequency Selection
1 %
0.1uF
1 2
0402 16 V
10%
X7R
DNI
3V3_F
R689
10k
5 %
0402
COMMON
PS_NVVDD_OVR2P1_VID
10k
5 %
0402
COMMON
nv_cap
GND
nv_cap
C1699
12
C1695
12
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
PS_NVVDD_OVR2P1_PH2
IN26,29
NVVDD_OVR2P1_PH3 NVVDD_OVR2P1_PH3_R
IN27
NVVDD_OVR2P1_GATE3 NVVDD_OVR2P1_GATE3_R
OUT27
2
R684
GPIO0_NVAPI_1_PWM_VID
3
4
0ohm
1 2
0402 C OM MON
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
PS_NVVDD_OVR2P1_FREQ
OUT25,31
IN25,30,31
IN21,25,31
IN26,29
PS_NVVDD_PGOOD
NVVDD_EN
GPIO6_PSI*
PS_NVVDD_OVR2P1_REFIN_R2
R1687
1 2
0402 C OMMO N
R1688
1 2
R1689
1 2
PS_NVVDD_OVR2P1_PH1
R1691 0ohm
1 2
0402 C OMMO N
R1692
1 2
0402 C OMMO N
R1693
1 2
0402
PS_NVVDD_OVR2P1_REFIN_R
nv_res
R1684
0ohm
0.05 ohm
0402
COMMON
nv_res
R1685
0ohm
0.05 ohm
0402
COMMON
nv_res
R1686
9.76k
1 %
COMMON
0.381
nv_res
PS_NVVDD_OVR2P1_PH2_R
6.81k
nv_res
6.81k
0402 C OMMO N
0ohm
0402 C OMMO N
C E
12V_F
5V
R135
0ohm
0ohm
0603
0603
COMMON
COMMON
12
1uF
16V
X5R
0603
COMMON
GND
nv_res
R1696
6.81k
1 2
COMMON0402
1 %
3V3_F
R1695
10k
0402
COMMON
0ohm
R1697
10k
1 2
0402
COMMON
5 %
0ohm
COMMON
nv_res
PS_NVVDD_OVR2P1_VREF
R1690
11.8k
1 %
0402
COMMON
nv_cap
12
4.7nF
16V
10%
X7R
0402
R1698 0ohm
1 2
PS_NVVDD_OVR2P1_REFIN
GND_LOCAL_NVVDD_OVR2P1
C1698
1 2
R1704 10k
1 2
COMMON0402
PS_NVVDD_OVR2P1_VCC
0.381
0.1uF
GND
0402
16V
10%
X7R
DNI
COMMON0402
5 %
GND
PS_NVVDD_OVR2P1_PSI*
nv_cap
12
nv_res
R1694
1 2
0402
nv_res
5 %
R1699
100k
COMMON
R1700
100k
150k,B25/50@[ ]
5 %
5%
0402
COMMON
nv_cap
C1697
1 2
0402
PS_NVVDD_OVR2P1_PGOOD
PS_NVVDD_OVR2P1_EN
nv_res
R1701
10.5k
1 2
0402
COMMON
1 %
3V3_F
nv_res
R1702
2.2k
5 %
0402
C1696
0.1uF
25V
10%
X7R
0603
COMMON
GND
0.1uF
16V
10%
X5R
PS_NVVDD_OVR2P1_REFADJPS _NVVDD_OVR2P 1_REFADJ_R
nv_res
R1703
100k
5 %
0402
COMMON
GND
OPEN VREG TYPE-2+1
U504
2V
@power_supply .u_openv reg_ty pe2plus 1(sy m_1):page 29_i150
QFN24
OPENVREG
OPT1
15
VCC
9
FS
GND
16
PGOOD
3
EN
4
PSI
5
VID
8
VREF
7
REFIN
6
REFADJ
OPT1 OPT 2
14
TALERT
13
TSNS
22
GND
25
THERM/GND
GND
5V
12V_F
R119
0ohm
0ohm
0603
0603
COMMON
OPT2
PS_NVVDD_OVR2P1_PVCC
21
PVCC
ISEN1
PS_NVVDD_OVR2P1_UG1
2
HGATE1
1
BOOT1
PS_NVVDD_OVR2P1_PH1
24PHA SE1
PS_NVVDD_OVR2P1_LG1
23
LGATE1
HGATE2
BOOT2
PHASE2
LGATE2
GNDSNS
VSNS
COMP
ISEN2
ISEN3
PWM3
nv_res
R1705
10k
1 2
0402
5 %
PS_NVVDD_OVR2P1_UG2
17
18
PS_NVVDD_OVR2P1_PH2
19
PS_NVVDD_OVR2P1_LG2
20
R1706
1 2
0402
10
11
12
PS_NVVDD_OVR2P1_COMP
0ohm
0402
COMMON
0ohm
0402
COMMON
GND
0.381
0.381
C1700
1 2
0.381
0.381
0.381
COMMON
0.381
C1701
1 2
0.100
0.381
nv_res
0.381
10k
COMMON
5 %
PS_NVVDD_OVR2P1_GND_SENSE
nv_res
R1644
1 2
0402
1 %
DNI
nv_cap
BI 26
place cap clos e to cont roller
0.1uF
0402 16V
10%
BI 26,29
X5R
COMMON
BI 26
GND
nv_cap
BI 26
place cap clos e to cont roller
0.1uF
16V040 2
10%
BI 26,29
X5R
COMMON
BI 26
GND
PS_NVVDD_OVR2P1_SENSE
1 2
0402 50V
75k
PS_NVVDD_OVR2P1_COMP_RC
COMMON
12
1nF
16V
10%
X7R
0402
COMMON
GND
PS_NVVDD_OVR2P1_BOOT1PS_NVVDD_OVR2P1_BOOT1_C
PS_NVVDD_OVR2P1_BOOT2PS_NVVDD_OVR2P1_BOOT2_C
22pF
5%
C0G
GM Amplifier
Compensation
FDBA
BI 26
BI 26
0.250
0.100 0.250
12
1nF
16V
10%
X7R
0402
COMMON
GND
1 2
0402
1
12
1uF
16V
10%
X5R
0603
COMMON
GND
DEFAULT_RESISTOR_10 0.000 00 0OHM_ 2_1
R680
0ohm
1 2
1 2
0402 C OM MON
12
1nF
16V
10%
X7R
0402
COMMON
1 2
0402 C OM MON
1 2
nv_res
R1645
10k
1 2
0402
COMMON
1 %
49.9ohm
1 2
0402
COMMON
1 %
150pF
50V
5%
C0G
COMMON
MSI
MSI
MSI
GND_SENSE
NVVDD
NVVDD_SENSE
GND
1 2
220pF
0402 50 V
5%
COMMON
IN 3,25
IN 3,25
COMMON0402
0.05 ohm
DEFAULT_RESISTOR_0.00 1OHM_ 2_ 1
100ohm
DEFAULT_RESISTOR_0.00 1OHM_ 2_ 1
100ohm
DEFAULT_RESISTOR_10 0.000 00 0OHM_ 2_1
0ohm
COMMON0402
0.05 ohm
OpAMP Compensation
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MS-V320
MS-V320
MS-V320
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
29_PS_ NVVDD OVR 2+1 option
29_PS_ NVVDD OVR 2+1 option
29_PS_ NVVDD OVR 2+1 option
Wednesday, November 12, 201 4
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A B C D E F G H
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PS: Inputs, Filtering, and Monitoring
3V3_F
C799
12
0.1uF
U6
16V
1
GND
VVVV32010
21
OUT31
IN21,31
2
3
12
C917
12
C916
12
10uF
10uF
16V
16V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
XXXV32010
XXXV32010
VVVV32010
C879
12
C887
12
1uF
10uF
16V
16V
X5R
X5R
0603
4
5
0805
COMMON
COMMON
XXXV32010
XXXV32010
12V_F
C867
12
10uF
16V
10%
X5R
0805
COMMON
XXXV32010
VVVV32010
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
I2CC_SCL_R
I2CC_SDA_R
BI21
PS_PCIE_PGOOD
GPIO12_LOW_PERF*
1 2
R158
VVVV32010
12V_F
C858
12
10uF
16V
10%
X5R
COMMON
VVVV32010
12V_PEX6_F1
C914
C880
12
12
10uF
10uF
16V
16V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV32010
VVVV32010
12V_PEX6_F1
C885
12
10uF
16V
X5R
0805
COMMON
VVVV32010
12V_PEX6_F1
C873
12
10uF
16V
10%
X5R
0805
COMMON
XXXV32010
C868
12
C871
12
12
10uF
10uF
16V
16V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV32010
VVVV32010
C76 must be low profile component if st uff ed with FET heat sink
0ohm
INA3221_VPU
COMMON0402
C860
12
10uF
16V
10%
X5R
COMMON
XXXV32010
C875
12
10uF
16V
10%
X5R
0805
COMMON
XXXV32010
C905
12
10uF
16V
X5R
0603
COMMON
XXXV32010
C862
12
10uF
16V
10%
X5R
0805
COMMON
VVVV32010
10%
X7R
0402
COMMON
12
XXXV32010
C877
12
10uF
16V
10%
X5R
0805
COMMON
XXXV32010
C921
12
10uF
16V
X5R
0603
COMMON
XXXV32010
C882
12
10uF
16V
10%
X5R
COMMON
VVVV32010
colayout 603 on 805s
C904
12
10uF
16V
10%
X5R
0805
COMMON
VVVV32010
GND
GND
C892
10uF
16V
10%
X5R
COMMON
C883
10uF
16V
10%
X5R
0805
COMMON
C903
10uF
16V
10%
X5R
0805
COMMON
4
6
7
5
10
13
16
3
TP
I2C Address:(1000 000b)
VVVV32010
12
VVVV32010
colayout 603 on 805s
12
XXXV32010
colayout 603 on 805s
C919
12
10uF
16V
X5R
0603
COMMON
XXXV32010
colayout 603 on 805s
12
VVVV32010
@digital.u_pwrmtr_ina3221(s ym_1):pag e30_i159
QFN16
COMMON
VS
SCL
SDA
VIN1N
A0
VIN2N
PV
TC
VPU
VIN3N
WARN
GND
PAD
C893
C895
12
10uF
10uF
16V
16V
10%
10%
X5R
X5R
COMMON
COMMON
XXXV32010
C890
C906
12
10uF
10uF
16V
16V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
XXXV32010
C918
12
12
10uF
16V
X5R
0603
COMMON
XXXV32010
XXXV32010
C876
12
1uF
16V
10%
X5R
COMMON
XXXV32010
C902
C76
12
10uF
10uF
16V
16V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV32010
12
VIN1P
VIN2P
VIN3P
CRIT
9
C922
12
10uF
16V
10%
X5R
0805
COMMON
XXXV32010
C915
10uF
16V
X5R
0603
COMMON
XXXV32010
11
15
14
2
1
8
12
XXXV32010
C888
12
10uF
16V
20%
X5R
0603
COMMON
INA3221_WARN*
GPIO9_THERM_ALERT_R*
12
XXXV32010
C920
12
10uF
16V
10%
X5R
0805
COMMON
XXXV32010
C913
12
10uF
16V
X5R
0603
COMMON
XXXV32010
GND
place caps close to INA3221
INA3221_VIN1P
C812
12
10uF
16V
10%
X5R
0805
INA3221_VIN1N
COMMON
VVVV32010
INA3221_VIN2P
C805
12
10uF
16V
10%
X5R
0805
INA3221_VIN2N
COMMON
VVVV32010
INA3221_VIN3
12
C891
10uF
16V
20%
X5R
COMMON
XXXV32010
C908
12
10uF
16V
10%
X5R
0805
COMMON
XXXV32010
12
C911
10uF
16V
X5R
0603
COMMON
XXXV32010
R134 20ohm
1 2
0402
VVVV32010
R670
1 2
0402
5 %
VVVV32010
C102 1uF
1 2
GND
16V
0402
10%
COMMON
VVVV32010
R692 0ohm
NVVDD_EN
1 2
0402 D NI
R139 0ohm
1 2
XXXV32010
0402 DNI
R693 0ohm
1 2
XXXV32010
COMMON0402
VVVV32010
R138 0ohm
1 2
0402 C OMMO N
VVVV32010
C894
C896
12
C859
12
10uF
10uF
16V
20%
X5R
COMMON
12
XXXV32010
C909
10uF
16V
X5R
0603
COMMON
10uF
16V
16V
20%
20%
X5R
X5R
COMMON
COMMON
XXXV32010
XXXV32010
C912
C910
12
10uF
10uF
16V
16V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV32010
C907
12
10uF
16V
X5R
0603
COMMON
XXXV32010
XXXV32010
C870
12
C869
12
10uF
10uF
16V
16V
20%
20%
X5R
X5R
0603
0603
COMMON
COMMON
XXXV32010
XXXV32010
COMMON
1 %
R133 20ohm
1 2
0402
1 %
VVVV32010
R154
1 2
0402
1 %
VVVV32010
R149
1 2
0402
1 %
VVVV32010
100ohm
COMMON
GPIO9_THERM_ALERT*
GPIO3_OC_WARN*
C889
12
10uF
16V
20%
X5R
0603
COMMON
XXXV32010
C881
12
10uF
16V
X5R
0603
COMMON
12
XXXV32010
COMMON
20ohm
COMMON
20ohm
COMMON
OUT 25,29,31
C863
12
1uF
16V
10%
X5R
COMMON
XXXV32010
XXXV32010
C878
12
1uF
16V
10%
X5R
0603
COMMON
XXXV32010
C884
12
10uF
16V
X5R
0603
COMMON
XXXV32010
C899
12
10uF
16V
20%
X5R
0603
COMMON
XXXV32010
12V_PEX6_1_INP
12V_PEX6_1_INN
12
XXXV32010
C900
10uF
16V
20%
X5R
0603
COMMON
12V_INP
12V_INN
C861
10uF
16V
20%
X5R
COMMON
C874
12
10uF
16V
20%
X5R
0603
COMMON
C886
12
10uF
16V
X5R
0603
COMMON
XXXV32010
XXXV32010
IN 30
IN 30
OUT 21
OUT 21
C48
220uF
COMMON
20%
16V
AL-Polyme r
0.013oh m
COMBI_TH _D 80_ D5 0
VVVV32010
GND
C160
220uF
COMMON
20%
16V
AL-Polyme r
4.3A@105 deg C,10 0KH z
0.013oh m
COMBI_TH _D 80_ D5 0
VVVV32010
GND
C47
220uF
COMMON
16V
AL-Polyme r
4.3A@105 deg C,10 0KH z
0.013oh m
COMBI_TH _D 80_ D5 0
VVVV32010
GND
C901
12
12
10uF
16V
20%
X5R
0603
COMMON
XXXV32010
C864
10uF
16V
20%
X5R
0603
COMMON
C E
30
30
C866
12
10uF
16V
20%
X5R
0603
COMMON
XXXV32010
GND
PEX6 INPUT - 2x3 PCIE CON 75W
@electro_mechanic.hd r_2x3 (sy m_4):page3 0_i157
RECEPTACL E
30
J10
4.2MM
90
PCIEPWR
COMMON
PEX_12V INPUT - 66W
12V
C840
12
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
PLACE ON NORTH SIDE
PCI_Express Power
4
6
GND
GND
VVVV32010
GND
PEX 3V3 INPUT - 10W
3V3
C821
12
0.1uF
16V
10%
X7R
0402
COMMON
VVVV32010
GND
C839
12
1uF
16V
10%
X5R
0603
COMMON
XXXV32010
12V_INP
12V_INN
OUT30
TRUE
12V
PEX6_12V PEX6_12V_R
1
6.25A
12V
2
0.400 12V
12V
3
PRSNT*
5
XXXV32010
XXXV32010
GND
LB507
LB508
VVVV32010
BEAD_080 5
VVVV32010
1
RS501
LB4
COMMON
BEAD_080 5
LB5 220ohm
VVVV32010
COMMONBEAD_080 5
LB6 220ohm
VVVV32010
BEAD_080 5 COMMON
LB8
VVVV32010
COMMONBEAD_080 5
LB9 220ohm
VVVV32010
COMMONBEAD_080 5
LB7 220ohm
VVVV32010
COMMONBEAD_080 5
VVVV32010
INPUT_PEX6_DT1_Q
220ohm
12V 0.400
220ohm
2 3
COMMON
VVVV32010
OUT30
OUT30
1G1D1 S
G
1
VVVV32010
XXXV32010
C838
12
10uF
16V
10%
X5R
0805
COMMON
XXXV32010
GND
R542
10k
5 %
0402
COMMON
R544
3.9k
5 %
0402
COMMON
FDBA
220ohm
COMMONBEAD_080 5
220ohm
COMMON
2512_2 PIN_ KELVIN
4
0.005ohm
12V_PEX6_1_INN
12V_PEX6_1_INP
C164
12
0.1uF
16V
10%
X7R
0402
COMMON
3
D
Q513
@discrete.q_fet_n_enh(s ym_2) :page30_i29 7
SOT23_1 G1D 1S
COMMON
S
2
GND
PLACE 0603 10UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
12V_IN_R
C165
12
10uF
16V
10%
X5R
0805
COMMON
XXXV32010
GND
12V
5.5A
0.400
3.3V
3A
0.400
C810
12
C811
12
10uF
10uF
16V
6.3V
20%
20%
X5R
X5R
0603
0805
COMMON
COMMON
XXXV32010
VVVV32010
LB509 220ohm
COMMONBEAD_080 5
LB512
220ohm
VVVV32010
COMMON
BEAD_080 5
LB510 220ohm
VVVV32010
COMMONBEAD_080 5
LB511 220ohm
VVVV32010
COMMONBEAD_080 5
VVVV32010
2 3
RS2
0.005ohm
1
4
2512_2 PIN_ KELVIN
VVVV32010
INPUT_PEX6_DT1*
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
3V3_F
C118
12
12
1uF
16V
10%
X5R
0402
COMMON
VVVV32010
VVVV32010
GND
12V
5.5A
0.400
OUT 31
MS-V320
MS-V320
MS-V320
30_PS_ Inputs, Filtering, and
30_PS_ Inputs, Filtering, and
30_PS_ Inputs, Filtering, and
C814
0.1uF
16V
10%
X7R
0402
COMMON
12V_F
1
2
3
12V_PEX6_F1
12V
6.25A
0.400
4
5
10
10
10
Sheet ofDate:
30 34
Sheet ofDate:
30 34
Sheet ofDate:
30 34
Page 31
PS: Sequence and Shutdown
smd.db-x7.ru
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
A B C D E F G H
3V3_F 3V3_F
R147
R144
10k
10k
5 %
5 %
0402
0402
COMMON
PS_PCIE_PGOOD
IN
PS_IOVDD_PGOOD
IN
INPUT_PEX6_DT1*
IN
COMMON
R156
1 2
R151 0ohm
1 2
0402 C OMMO N
R143
1 2
R142
1 2
0402
12V_F
R517
10k
5 %
COMMON
GND
R511
3.24k
1 %
0402
COMMON
NVVDD_EN
0ohm
COMMON0402
C101
12
10nF
16V
10%
0402
COMMON
GND
0ohm
PS_IOVDD_EN
COMMON0402
0ohm
DNI
3V3_F
R518
1k
PEX Input Present
1 %
DNI
R512 1k
1 2
COMMON
0402
1 %
THERM OVERT SHUTDOWN LATCH
IN21
OUT 25,29,30
33
OUT
POWER CONNECTOR HOT-UNPLUG DETECT
R525
10k
INPUT_HOT_UNPLUG_DT_R
1 2
COMMON
0402
5 %
C503
12
0.1uF
25V
10%
X7R
0603
COMMON
GND
THERM_OVERT*
1 2
1 2
0402
R523
1B1C1E
10k
COMMON
0402
5 %
C501
12
0.1uF
16V
10%
X7R
0402
COMMON
R524
GND
10k
COMMON
5 %
R157 0ohm
1 2
B
1
COMMON0402
IN25,29
3V3_F
3
not found
C
Q507
@discrete.q_npn(s ym_1):pag e31_i23 6
SOT23_1 B1C 1E
COMMON
E
2
INPUT_NVVDD_EN_HPD
GND
3V3_F
R89
10k
5 %
0402
COMMON
PS_NVVDD_PGOOD
3V3_F
R527
10k
5 %
0402
COMMON
not found
INPUT_HOTUNPLUG*
3
1B1C1E
C
Q512
B
@discrete.q_npn(s ym_1):pag e31_i24 0
1
SOT23_1 B1C 1E
COMMON
E
2
INPUT_EN_HPD
R507
10k
5 %
not found
0402
COMMON
1B1C1E
INPUT_HOT_UNPLUG_QINPUT_HOT_UNPLUG_R
GND
1G1D1 S
C504
12
0.1uF
16V
10%
X7R
0402
COMMON
C E
C
B
1
E
D
G
1
S
3
Q508
@discrete.q_npn(s ym_1):pag e31_i23 9
SOT23_1 B1C 1E
COMMON
2
INPUT_EN_HPD_Q
3
Q510
@discrete.q_fet_n_enh(s ym_2) :page31_i23 5
SOT23_1 G1D 1S
COMMON
2
GND
R528 0ohm
1 2
0402 COMM ON
POWER OFF
ON HOTPLUG EVENT
STUFF TO LATCH
INPUT_PEX6_DT1_R*
PEX Input - Power Level/PSI* Control
3
1G1D1 S
D
Q505B
@discrete.q_fet_n_enh(s ym_2) :page31_i37 3
G
5
COMMON
S
4
GND
12V_F
R96
1 2
3V3_F
R516
10k
5 %
0402
COMMON
1G1D1 S
3V3_F
3
1G1D1 S
D
Q29B
@discrete.q_fet_n_enh(s ym_2) :page31_i37 5
SOT363
G
5
4
S
3V3_FET
R1650
10k
5 %
COMMON
0ohm
COMMON0402
C93
12
10nF
16V
10%
X5R
0402
COMMON
GND
3V3_F
R515
10k
5 %
0402
COMMON
LOWPWR_MODE LOWPWR_MODE_R
6
D
Q505A
@discrete.q_fet_n_enh(s ym_2) :page31_i37 4
SOT363
G
2
COMMON
S
1
GND
FDBA
PS_CORE_PGOOD PS_FBVDDQ_EN
R128
10k
5 %
0402
DNI
GND
R519
1 2
0402
1 %
R509
100k
5 %
0402
COMMON
GND
12V_F
R127
10k
5 %
0402
COMMON
PS_FBVDDQ_EN*
5 %
1k
COMMON
GPIO12_LOW_PERF*
COMMON0402
MS-V320
MS-V320
MS-V320
COMMON
PS_VIDPLL_EN
PEX VDD
GPIO6_PSI*GPIO6_PSI_R*
12
GND
PS_PEXVDD_EN
R655
1 2
0402
5 %
OUT 21,30
OUT 21,25,29
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
6
1G1D1 S
D
Q29A
@discrete.q_fet_n_enh(s ym_2) :page31_i37 6
R137
1 2
COMMON1k0402
5 %
R145
1k
1 2
DNI0402
5 %
12
GND
GPIO12_LOW_PERF*
0 Slow
1
3V3_F
not found
3
1B1C1E
C
100ohm
COMMON
B
1
Q506
@discrete.q_npn(s ym_1):pag e31_i27 1
SOT23_1 B1C 1E
2E
GND
MSI
MSI
MSI
SOT363
G
2
COMMON
S
1
GND
R140 1k
1 2
0402
VID PLL
R136
1 2
0402
5 %
C97
10nF
16V
10%
X5R
0402
COMMON
PS_PEXVDD_PGOOD
IN23
GPU SPEED
Normal
R510
10k
5 %
0402
DNI
R520 0ohm
1 2
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
MIC RO-STA R INT 'L CO .,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
31_PS_ Sequence and Shutdown
31_PS_ Sequence and Shutdown
31_PS_ Sequence and Shutdown
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
C95
10nF
16V
10%
X5R
0402
COMMON
10k
COMMON
31 34
31 34
31 34
1
OUT 24
OUT 23
2
OUT 23
3V3_F
3
4
5
10
10
10
Page 32
LEDs
smd.db-x7.ru
A B C D E F G H
1
2
IFP_IOVDD (backdrive prevention)
GPU_RST_R*
12
GND
R860
1 2
0402
5 %
NV3V3
Kepler Only
IFP_IOVDD_EN
3
1G1D1 S
D
Q502
@discrete.q_fet_n_enh(s ym_2) :page32_i75 2
SOT23_1 G1D 1S
G
1
COMMON
S
R505
10k
5 %
DNI
GND
NV3V3
R853
3.3k
0402
COMMON
D
G
5
S
2
GND
Quadro LED
DS1
@discrete.led(sym_ 1):page32 _i792
20mA
12V_F
2.5V
Default
0805
R854
COMMON
27k
5 %
0402
COMMON
GPIO5_LED_Q
3
Q532B
@discrete.q_fet_n_enh(s ym_2) :page32_i78 0
SOT363
COMMON
4
GND
3V3_F
1 2
1G1D1 S
R2
470ohm
5 %
0402
QUADRO_LED
G
2
12V_F
R861
27k
5 %
0402
COMMON
6
D
Q532A
@discrete.q_fet_n_enh(s ym_2) :page32_i78 1
SOT363
COMMON
S
1
SOT23_1 G1D 1S
GND
12V_F
R864
44.2ohm
1 %
0603
COMMON
SLI_LED_Q
GPIO5_LED_Q_N
3
Q533
@discrete.q_fet_n_enh(s ym_2) :page32_i25 6
COMMON
2
C502
100pF
50V
C0G
0402
DNI
10k
COMMON
R503
GPIO20_SLI_LED_DIM
1 2
R504
1 2
and Quadro LED
0402 D NI
1 %
04021kCOMMON
1 %
not found
1B1C1E
B
1k
C
1
E
3
Q525
@discrete.q_npn(s ym_1):pag e32_i24 8
SOT23_1 B1C 1E
COMMON
2
GPU_BUFRST*
3
COMMON0402
1 %
LED HEADER
(C0MM0N)
R177
604ohm
1 %
0603
DNI
1G1D1 S
LED_ON
C764
12
0.1uF
16V
10%
X7R
0402
COMMON
GND GND
R180
680ohm
5 %
0603
COMMON
D
G
1
S
R660
1k
5 %
0603
COMMON
3
Q517
@discrete.q_fet_n_enh(s ym_2) :page32_i23 4
SOT23_1 G1D 1S
COMMON
2
12V_F
R657
1k
5 %
0603
COMMON
LED
LED_Q*
J8
1
2
@electro_mechanic.hd r_1x2 (sy m_1):page3 2_i173
MALE
2.5MM
0
NORM
COMMON
GeForce Logo LED
4
NV3V3
R666
10k
5 %
GPIO11_LOGO_LED GPIO 11_LOGO_LED_R
IN21
R667 0ohm
1 2
COMMON0402
0402
COMMON
R665 1k
IN22
IN3,20
SLI LED
PEX_RST_BUF*
IN21
5
R506 10k
1 2
0402
D
G
1
S
1G1D1 S
5 %
G
1
COMMON
R857
44.2ohm
1 %
0603
COMMON
SLI_LED_R
3V3_F
3
D
Q503
@discrete.q_fet_p_enh(s ym_2) :page32_i75 0
SOT23_1 G1D 1S
COMMON
S
2
1
2
3V3_BLK
3.3V
16MIL
SLI_LED
2S
3
Q534
SOT23_1 G1D1S
COMMON
D
G
1
@discrete.q_fet_p_enh(sy m_2):page32_i784
GND
OUT 20
R856
0ohm
0402
DNI
3
4
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
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MS-V320
MS-V320
MSI
MSI
MSI
FDBA
MS-V320
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Custom
Custom
32_LEDs
32_LEDs
32_LEDs
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A B C D E F G H
smd.db-x7.ru
PS: IOVDD, NV3V3, NV12V
1
OUT
2
3
4
PS_IOVDD_PGOOD
PS_PG_IOVDD_R2
R514
3V3_F
5V
XXXV32010
XXXV32010
R1646
R1647
0ohm
0ohm
0.05 ohm
0.05 ohm
0402
12
GND
C139
1k
1 %
XXXV32010
GND
D
S
Q509
R1647
1uF
10%
X5R
0603
XXXV32010
PS_IOVDD_EN
PS_IOVDD_VCC
XXXV32010
15nF
16V
10%
X7R
C737
3
Q509
@discrete.q_fet_n_enh(s ym_2) :page33_i73
SOT23_1 G1D 1S
XXXV32010
2
GND
0402
PS_FF_FB_OVR0
12
0402
R1648
1 2
PS_PG_IOVDD*
PS_FB_IOVDD
0402
R1648
0.381
nv_res
1 2
0402
1 %
XXXV32010
XXXV32010
0ohm
2k
R622
10k
5 %
0402
XXXV32010
R513
R1646
R612
XXXV32010
R514
10k
5 %
0402
1G1D1 S
G
1
12V_F
XXXV32010
R187
@power_supply .u_openv reg_ty pe0(s ym_1):pag e33_i17
0.6V
DFN10
XXXV32010
9
PGOOD
OpenVReg
10
EN/FS
BOOT/NC
2
VCC
1
FB
U11
12V_F
1G1D1 S
S
G 2
1
SOT323_ 1G1 D1 S
D
@discrete.q_fet_p_enh(s ym_2) :page33_i29
3
Q501
100k
5 %
0402
XXXV32010
R508
GND
3V3_F
5V
0ohm
0ohm
0402
PS_VIN_IOVDD
XXXV32010
R186
12
22uF
25V
10%
X5R
1206
.4
GND
3A
XXXV32010
3
VIN
C142
8
0.381
6
SW
7
SW
4
GND
5
GND
11
THERM
GND
XXXV32010
12
0.1uF
16V
10%
X7R
0402
GND
XXXV32010
C505
0ohm
0603
0603
XXXV32010
R630
nv_res
3V3_F
5V
R1649
0ohm
10k
5 %
0402
0402
PS_BOOT_IOVDD
XXXV32010
R631
0.065oh m
XXXV32010
1.3A
1.9A
0.1uF
L19
16V
10%
X7R
1G1D1 S
R1649
D
G
1
S
XXXV32010
Q511
1uH
SMD_3X3
XXXV32010
L19
0.508
3V3_F
3
@discrete.q_fet_n_enh(s ym_2) :page33_i32
SOT23_1 G1D 1S
2
C705
12
22uF
6.3V
20%
X5R
0805
XXXV32010
GND
C705
100k
5 %
0402
XXXV32010
R526
GND
1 2
0402
PS_SW_IOVDD
XXXV32010
0.381
C727
NV12V
OVR0 1.8V REGULATOR. STUFF FOR 16nm
IOVDD
12
22uF
Special Note:
6.3V
1. Place [C_OUT] cl ose to [L_OUT]
20%
2. Use local FB s ense (refer to design guide for detals )
X5R
3. Place PLL/IO fil ter ferrite bead to the same position as FB loca l sense p oint
0805
XXXV32010
C686
GND
NV3V3
12
0.1uF
16V
10%
X7R
0402
GND
XXXV32010
C506
Gated rails require d for 16nm
NV3V3
12
@discrete.d_zener (sy m_2):page3 3_i58
SOD123
1.89V
IOVDD
0.5W
XXXV32010
D502
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIA TIONS OF INDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKES NO WARRANTIE S, EXPRE SSED, IMPLIED, ST ATUT ORY OR OTHERWISE WIT H RESPECT TO THE MAT ERIALS OR OTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
FDBA
BYPASS. STUFF FOR 28nm
3V3_F
0ohm
1 2
0805
VVVV32010
0ohm
1 2
R585
0805
VVVV32010
R581
0ohm
1 2
0805
VVVV32010
R141
12V_F
0ohm
1 2
0402
VVVV32010
R9
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MS-V320
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Custom
Custom
33_PS_ IOVDD R egulator
33_PS_ IOVDD R egulator
33_PS_ IOVDD R egulator
Wednesday, November 12, 201 4
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1
2
IOVDD
3.3V
NV3V3
3.3V
NV12V
12V
Sheet ofDate:
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33 34
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3
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A B C D E F G H
smd.db-x7.ru
Mechanical: Bracket/Thermal Solution
1
MEC2-15
2
Brackets:
BKT1
@mechanic.brack et(sym_4 ):page34 _i31
ATX_2X_2P
COMMON
1
MECH. MOUNTING ALL
3
4
2
GND
VVVV32010
FAN1
SPECIAL ME CHANIC
No connected mounting pins
SPECIAL ME CHANIC
No connected mounting pins
VVVV 32010
OE3-V070010
VVVV 32010
OE3-V070020
MECH_PEX_ BREAKOF F_R ETENT ION_ B
DNI
MOS_SINK1
MECH_PEX_ BREAKOF F_R ETENT ION_ B
DNI
PCB
109-GN982-00A
COMMON
VVVV32010
PK0-0V32010-G37
PCB
HDMI_FEE
HDMI
$$ $$$$
HDMI_FEE
COMMON
VVVV32010
Y01-RHDMI03-000
HDMISCREW1
MEC_SCR EW_ PH1
COMMON
M3_SCREW
E43-1303012-H75
VVVV32010
MECS1
MEC_SCR EW_ HEX_ JAC K
COMMON
E42-5047001-H75
VVVV32010
MECS2
MEC_SCR EW_ HEX_ JAC K
COMMON
E42-5047001-H75
VVVV32010
5
ALL NVIDIA DESIGN SPECIFICAT IONS, REFERENCE SP ECIFICATIONS, REFERENCE BOARDS, FILES, DRAWI NGS, DIAGNOSTICS, LIST S AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEP ARATEL Y, 'MATERIALS') ARE BE ING PROVIDED 'AS IS'. THE MAT ERIALS MAY
CONTAINK NOWNA ND UNKNOWN VIOLATIONS OR DEVIA TIONS OFI NDUSTRY ST ANDARDS AND SP ECIFICATIONS. NVIDIA MAKESNO WARRA NTIES, E XPRESSE D, IMPLIED, STAT UTORY OR OTHERWISE WITH RESPECT TOT HE MATERIALS OROTHERWIS E, AND EXP RESSLY DISCLA IMS ALL
IMPLIED WARRANTIES INCLUDING, WIT HOUT LIMITATION, T HE WARRANT IES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNE SS FOR A PARTICULA R PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, T RADE PRACT ICE, OR INDUSTRY ST ANDARDS.
C E
FDBA
@mechanic.mounting_hole(s ym_1) :page34_i6 1
X15
COMMON
15
MEC2-14
@mechanic.mounting_hole(s ym_1) :page34_i6 2
X15
COMMON
14
MEC2-13
@mechanic.mounting_hole(s ym_1) :page34_i6 3
X15
COMMON
13
MEC2-12
@mechanic.mounting_hole(s ym_1) :page34_i6 5
X15
12
MEC2-11
@mechanic.mounting_hole(s ym_1) :page34_i6 6
X15
COMMON
11
MEC2-10
@mechanic.mounting_hole(s ym_1) :page34_i6 7
X15
COMMON
10
MEC2-9
@mechanic.mounting_hole(s ym_1) :page34_i6 8
X15
COMMON
9
MEC2-8
@mechanic.mounting_hole(s ym_1) :page34_i6 9
X15
COMMON
8
MEC2-7
@mechanic.mounting_hole(s ym_1) :page34_i7 0
X15
COMMON
7
MEC2-6
@mechanic.mounting_hole(s ym_1) :page34_i7 1
X15
COMMON
6
MEC2-5
@mechanic.mounting_hole(s ym_1) :page34_i7 2
X15
5
MEC2-4
@mechanic.mounting_hole(s ym_1) :page34_i7 3
X15
COMMON
4
MEC2-3
X15
COMMON
3
MEC2-2
@mechanic.mounting_hole(s ym_1) :page34_i7 5
X15
COMMON
2
MEC2-1
@mechanic.mounting_hole(s ym_1) :page34_i7 6
X15
COMMON
1
GND
FET HS
34 34
34 34
34 34
1
2
3
4
5
10
10
10
MEC1
COOLING SOLUT ION
2 connected mounting pins
1
2
XXXV32010
GND
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
XXXV32010
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, November 12, 201 4
Wednesday, November 12, 201 4
G
Wednesday, November 12, 201 4
@mechanic.heatsink( sym_3) :page34_ i43
2PIN
COMMON
MIC RO-STA R INT 'L CO .,LTD
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MS-V320
MS-V320
MS-V320
34_MECH_ Brack et_Thermal
34_MECH_ Brack et_Thermal
34_MECH_ Brack et_Thermal
Sheet ofDate:
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H
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