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MS-V317
Schematics
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MSI MS-V317 Schematics

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Page 1
A B
D
HGFEC
PG401 A02
4GB GDDR5, 256b, 128Mx32
1
Tall DVI-I + DP + DP + DP/HDMI + DP
TABLE OF CONTENTS
Page
2
3
Description
Table of Contents
1
Block Diagram
2
PCI Express
3
MEMORY: GPU Partition A/B
4
MEMORY: FBA[31:0]
5
MEMORY: FBA[63:32]
6
MEMORY: FBB[31:0]
7
MEMORY: FBB[63:32]
8
MEMORY: GPU Partition C/D
9
MEMORY: FBC[31:0]
10
MEMORY: FBC[63:32]
11
MEMORY: FBD[31:0]
12
MEMORY: FBD[63:32]
13
GPU PWR and GND
14
GPU Decoupling
15
DACA Interface
16 17
IFPAB DVI-I-DL
18
IFPEF with IFPE DP IFPF DP
19
Page
20 IFPC HDMI/DP
IFPD DP
21
MIOA/B Interface and Frame Lock
22
MISC1: Fan, Thermal, JTAG, GPIO, Stereo
23
MISC2: ROM, XTAL, Straps
24
PS: 5V, PEX_VDD
4
25
Description
PS: FBVDD/Q
26
PS: NVVDD Controller
27 28
PS: NVVDD Phase 1,2 PS: NVVDD Phase 3,4
29
PS: NVVDD Phase 5, 6
30 31
PS: Dynamic Power Balance Logic
32 PS: Dynamic Power Balance Phases
PS: Inputs, Filtering, and Monitoring
33
PS: Shutdown
34
PS: 12V Current Steering PSI Control and LED
35
MECH: Bracket/Thermal
36
MICROCONTROLLER
37
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A B D F H
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY Table of Contents
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
EC
BOM REV
G
MS-V317
Table of contents
Table of contents
Table of contents
Sheet ofDate:
137
Sheet ofDate:
137
Sheet ofDate:
137
PAGE DATE
1 OF 37
04-AUG-2014
5
1.0
1.0
1.0
Page 2
A B C D E F G H
Page2: Block Diagram
1
Power Supply
NVVDD-PH3
EXT_12V 2x3 PWR 1
(NORTH)
1
Power Supply
NVVDD-PH4
4-WAY SLI/
2
DPDP
QD:2-WAY SLI with FRAME LOCK
Power Supply
NVVDD-PH1
Power Supply
NVVDD-PH2
MEM
MEM
D
MEM
HI
QD:DP
HDMI/
MEM
3
D
LO
DP
C
LO
FB X32
GM204
C
HI
MEM
LO
B
Power Supply
NVVDD-PH5
MEM
MEM
B
HI
Power Supply
NVVDD-PH6
A
LO
Power Supply
5V Linear
Power Supply
FBVDD/FBVDDQ
DVI-I
MEM
A
HI
EXT_12V 2x3 PWR 2/ EXT_12V 2x4 PWR 2
(NORTH)
DYNAMIC OPTION
PEX_12V Finger DYNAMIC OPTION
EXT_12V 2x3 PWR 2/ EXT_12V 2x4 PWR 2
(NORTH)
QD:EXT_12V 2x4 PWR 2
(EAST)
PEX_12V Finger
PEX_12V 2x4 PWR
2
3
4
QD:STEREO
QUADRO OPTIONS SHOWN IN YELLOW and prefix "QD:"
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY Block Diagram
PEX_VDD
Open_Vreg option
Fan
PEX_3V3 Finger
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
Block Diagram
Block Diagram
Block Diagram
MS-V317
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
PAGE DATE
H
237
237
237
2 OF 37
04-AUG-2014
4
1.0
1.0
1.0
5
Page 3
A B C D E F G H
Page3: PCI Express
12V
C223
4.7uF
16V 10% X5R 0603 DNI
1
OUT
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C908
4.7uF
16V 10% X5R 0603 DNI
STUFF FOR TESLA ONLY
POWER_BRAKE*
UNSTUFF FOR DT/QUADRO
PLACE 0603 4.7UF FOOTPRINT ON TOP OF 0805 FOOTPRINT
C50
4.7uF
16V 10% X5R 0805 COMMON
3V3
C843
4.7uF
6.3V 20% X5R 0603 COMMON
GND
R109 0ohm
0.05 ohm 0402 DNI
R110 0ohm
0.05 ohm 0402 DNI
C857
4.7uF
16V 10% X5R 0805LP COMMON
C842
0.1uF
16V 10% X7R 0402 COMMON
RSVD2_POWER_BRAKE
RSVD4_POWER_BRAKE
GND
C850
0.1uF
16V 10% X7R 0402 COMMON
PEX_PRSNT*
CN2NONPHY-X16
CON_X16 COMMON
@electro_mechanic.con_pci_express(sym_1):page3_i662
B1
+12V
B2
+12V
A2
+12V
A3
+12V
B3
+12V/RSVD
B8
+3V3
A9
+3V3
A10
+3V3
B10
+3V3AUX
A1
PRSNT1
B17
PRSNT2
B12
RSVD
B4
GND
A4
GND
B7
GND
A12
GND
B13
GND
A15
GND
B16
GND
B18
GND
A18
GND
GND
GND
GND
GND
END OF X1
B31
PRSNT2
A19
RSVD
B30
RSVD
A32
RSVD
A20
GND
B21
GND
B22
GND
A23
GND
A24
GND
B25
GND
B26
GND
A27
GND
A28
GND
B29
GND
A31
GND
B32
GND
END OF X4
B48
PRSNT2
A33
RSVD
A34
GND
B35
GND
B36
GND
A37
GND
A38
GND
B39
GND
B40
GND
A41
GND
A42
GND
B43
GND
B44
GND
A45
GND
A46
GND
B47
GND
B49
GND
A49
GND
END OF X8
B81
PRSNT2
A50
RSVD
B82
RSVD
A51
GND
B52
GND
B53
GND
A54
GND
A55
GND
B56
GND
B57
GND
A58
GND
A59
GND
B60
GND
B61
GND
A62
GND
A63
GND
B64
GND
B65
GND
A66
GND
A67
GND
B68
GND
B69
GND
A70
GND
A71
GND
B72
GND
B73
GND
A74
GND
A75
GND
B76
GND
B77
GND
A78
GND
A79
GND
B80
GND
A82
GND
END OF X16
TRST* JTAG1
TCLK JTAG2
TDI JTAG3 TDO JTAG4 TMS JTAG5
SMCLK
SMDAT
PERST
REFCLK REFCLK
PERP0 PERN0
PETP0 PETN0
PERP1 PERN1
PETP1 PETN1
PERP2 PERN2
PETP2 PETN2
PERP3 PERN3
PETP3 PETN3
PERP4 PERN4
PETP4 PETN4
PERP5 PERN5
PETP5 PETN5
PERP6 PERN6
PETP6 PETN6
PERP7 PERN7
PETP7 PETN7
PERP8 PERN8
PETP8 PETN8
PERP9 PERN9
PETP9 PETN9
PERP10 PERN10
PETP10 PETN10
PERP11 PERN11
PETP11 PETN11
PERP12 PERN12
PETP12 PETN12
PERP13 PERN13
PETP13 PETN13
PERP14 PERN14
PETP14 PETN14
PERP15 PERN15
PETP15 PETN15
R709
0ohm
B9 A5 A6
PEX_TDO
A7 A8
PEX_SMCLK
B5
PEX_SMDAT
B6
B11
WAKE
PEX_RST* PEX_RST_BUF*
A11
PEX_REFCLK
A13
PEX_REFCLK*
A14
PEX_TXX0
A16
PEX_TXX0*
A17
PEX_RX0
B14
PEX_RX0*
B15
PEX_TXX1
A21
PEX_TXX1*
A22
PEX_RX1
B19
PEX_RX1*
B20
PEX_TXX2
A25
PEX_TXX2*
A26
PEX_RX2
B23
PEX_RX2*
B24
PEX_TXX3
A29
PEX_TXX3*
A30
PEX_RX3
B27
PEX_RX3*
B28
PEX_TXX4
A35
PEX_TXX4*
A36
PEX_RX4
B33
PEX_RX4*
B34
PEX_TXX5
A39
PEX_TXX5*
A40
PEX_RX5
B37
PEX_RX5*
B38
PEX_TXX6
A43
PEX_TXX6*
A44
PEX_RX6
B41
PEX_RX6*
B42
PEX_TXX7
A47
PEX_TXX7*
A48
PEX_RX7
B45
PEX_RX7*
B46
PEX_TXX8
A52
PEX_TXX8*
A53
PEX_RX8
B50
PEX_RX8*
B51
PEX_TXX9
A56
PEX_TXX9*
A57
PEX_RX9
B54
PEX_RX9*
B55
PEX_TXX10
A60
PEX_TXX10*
A61
PEX_RX10
B58
PEX_RX10*
B59
PEX_TXX11
A64
PEX_TXX11*
A65
PEX_RX11
B62
PEX_RX11*
B63
PEX_TXX12
A68
PEX_TXX12*
A69
PEX_RX12
B66
PEX_RX12*
B67
PEX_TXX13
A72
PEX_TXX13*
A73
PEX_RX13
B70
PEX_RX13*
B71
PEX_TXX14
A76
PEX_TXX14*
A77
PEX_RX14
B74
PEX_RX14*
B75
PEX_TXX15
A80
PEX_TXX15*
A81
PEX_RX15
B78
PEX_RX15*
B79
0402
COMMON
R61
0402
0.05 ohm
PEX_REFCLK PEX_REFCLK
PEX_TXX0 PEX_TXX0
PEX_RX0 PEX_RX0
PEX_TXX1 PEX_TXX1
PEX_RX1 PEX_RX1
PEX_TXX2 PEX_TXX2
PEX_RX2 PEX_RX2
PEX_TXX3 PEX_TXX3
PEX_RX3 PEX_RX3
PEX_TXX4 PEX_TXX4
PEX_RX4 PEX_RX4
PEX_TXX5 PEX_TXX5
PEX_RX5 PEX_RX5
PEX_TXX6 PEX_TXX6
PEX_RX6 PEX_RX6
PEX_TXX7 PEX_TXX7
PEX_RX7 PEX_RX7
PEX_TXX8 PEX_TXX8
PEX_RX8 PEX_RX8
PEX_TXX9 PEX_TXX9
PEX_RX9 PEX_RX9
PEX_TXX10 PEX_TXX10
PEX_RX10 PEX_RX10
PEX_TXX11 PEX_TXX11
PEX_RX11 PEX_RX11
PEX_TXX12 PEX_TXX12
PEX_RX12 PEX_RX12
PEX_TXX13 PEX_TXX13
PEX_RX13 PEX_RX13
PEX_TXX14 PEX_TXX14
PEX_RX14 PEX_RX14
PEX_TXX15 PEX_TXX15
PEX_RX15 PEX_RX15
0.05 ohm
3V3_F
R65
R66
2.2k
2.2k
5 %
5 % 0402
0402
COMMON
0ohm
DNI
COMMON
R62
0ohm
DNI
0402
0.05 ohm
I2CS_SCL I2CS_SDA
34
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
C815 0.22uF
6.3V
0402
10%
X7R
C796
0.22uF
6.3V0402 10%
X7R
C792 0.22uF
6.3V0402 10%
X7R
C776 0.22uF
6.3V0402 10%
X7R
C750 0.22uF
6.3V0402 10%
X7R
C738 0.22uF
6.3V
0402
10%
X7R
C727 0.22uF
6.3V0402 10%
X7R
C714 0.22uF
6.3V
0402
10%
X7R
C699 0.22uF
6.3V
0402
10%
X7R
C688 0.22uF
6.3V
0402
10%
X7R
C674 0.22uF
6.3V
0402
10%
X7R
C655 0.22uF
6.3V
0402
10%
X7R
C649 0.22uF
6.3V
0402
10%
X7R
C647 0.22uF
6.3V
0402
10%
X7R
C645 0.22uF
6.3V0402 10%
X7R
C641 0.22uF
6.3V
0402
10%
X7R
C816
0402
C797
C793
C777
0402
C748 0.22uF
C731
0402
C722
C710
C697
0402
C683
0402
C669
C652
0402
C648
0402
C646
C643
0402
C640
0402
C E
0.22uF
6.3V
0.22uF
6.3V0402
0.22uF
6.3V0402
0.22uF
6.3V
6.3V0402
0.22uF
6.3V
0.22uF
6.3V0402
0.22uF
6.3V0402
0.22uF
6.3V
0.22uF
6.3V
0.22uF
6.3V0402
0.22uF
6.3V
0.22uF
6.3V
0.22uF
6.3V0402
0.22uF
6.3V
0.22uF
6.3V
ASSEMBLY PAGE DETAIL
OUT OUT
IN
PEX_TX0 PEX_TX0*
10%
COMMON
X7R
PEX_TX1 PEX_TX1*
10%
COMMON
X7R
PEX_TX2 PEX_TX2*
10%
COMMON
X7R
PEX_TX3 PEX_TX3*
10%
COMMON
X7R
PEX_TX4 PEX_TX4*
10%
COMMON
X7R
PEX_TX5 PEX_TX5*
10%
COMMON
X7R
PEX_TX6 PEX_TX6*
10%
COMMON
X7R
PEX_TX7 PEX_TX7*
10%
COMMON
X7R
PEX_TX8 PEX_TX8*
10%
COMMON
X7R
PEX_TX9 PEX_TX9*
10%
COMMON
X7R
PEX_TX10 PEX_TX10*
10%
COMMON
X7R
PEX_TX11 PEX_TX11*
10%
COMMON
X7R
PEX_TX12 PEX_TX12*
10%
COMMON
X7R
PEX_TX13 PEX_TX13*
10%
COMMON
X7R
PEX_TX14 PEX_TX14*
10%
COMMON
X7R
PEX_TX15 PEX_TX15*
10%
COMMON
X7R
23 23
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
BASE LEVEL GENERIC SCHEMATIC ONLY PCI Express
3V3_F
R1132 10k
5 % 0402 DNI
G1A
@digital.u_gpu_gb3b_256(sym_1):page3_i849 BGA1745 COMMON
1/21 PCI_EXPRESS
BJ21
PEX_WAKE
BE20
PEX_RST
BB20
PEX_CLKREQ
BD20
PEX_REFCLK
BC20
PEX_REFCLK
BC21
PEX_TX0
BD21
PEX_TX0
BH21
PEX_RX0
BG21
PEX_RX0
BE22
PEX_TX1
BE23
PEX_TX1
BG23
PEX_RX1
BH23
PEX_RX1
BD23
PEX_TX2
BC23
PEX_TX2
BJ23
PEX_RX2
BJ24
PEX_RX2
BC24
PEX_TX3
BD24
PEX_TX3
BH24
PEX_RX3
BG24
PEX_RX3
BE26
PEX_TX4
BE25
PEX_TX4
BG26
PEX_RX4
BH26
PEX_RX4
BD26
PEX_TX5
BC26
PEX_TX5
BJ26
PEX_RX5
BJ27
PEX_RX5
BC27
PEX_TX6
BD27
PEX_TX6
BH27
PEX_RX6
BG27
PEX_RX6
BE28
PEX_TX7
BE29
PEX_TX7
BG29
PEX_RX7
BH29
PEX_RX7
BD29
PEX_TX8
BC29
PEX_TX8
BJ29
PEX_RX8
BJ30
PEX_RX8
BC30
PEX_TX9
BD30
PEX_TX9
BH30
PEX_RX9
BG30
PEX_RX9
BE31
PEX_TX10
BE32
PEX_TX10
BG32
PEX_RX10
BH32
PEX_RX10
BD32
PEX_TX11
BC32
PEX_TX11
BJ32
PEX_RX11
BJ33
PEX_RX11
BC33
PEX_TX12
BD33
PEX_TX12
BH33
PEX_RX12
BG33
PEX_RX12
BE34
PEX_TX13
BE35
PEX_TX13
BG35
PEX_RX13
BH35
PEX_RX13
BD35
PEX_TX14
BC35
PEX_TX14
BJ35
PEX_RX14
BJ36
PEX_RX14
BC36
PEX_TX15
BD36
PEX_TX15
BH36
PEX_RX15
BG36
PEX_RX15
PEX_RST*
PEX_RST_MCU*
3V3_F
5
1 2
3
GND
PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
PEX_PLL_HVDD
PEX_SVDD_3V3
NVVDD_SENSE
GND_SENSE
PEX_TSTCLK_OUT PEX_TSTCLK_OUT
PEX_PLLVDD
TESTMODE
PEX_TERMP
R1146
FDBA
0402
0.05 ohm
U52
INS16823418
4
SC70-5 DNI
0ohm
COMMON
MSI
MSI
C715
4.7uF
6.3V 20% X5R 0603 COMMON
C718
4.7uF
6.3V 20% X5R 0603 COMMON
MSI
C1189
0.1uF
16V 10% X7R
PEX_RST_BUF*
0402 DNI
GND
R1152 10k
5 % 0402 DNI
GND
Place near balls
AW33 AY32
C709
C694
AY33
1uF
AY35
6.3V
BA33
10%
BA35
X5R
BB33
0402 COMMON
AY24 AY26
C707
AY27
1uF
AY29
6.3V
AY30
10%
BA24
X5R
BA26
0402 COMMON
BA27 BA29 BA30 BA32 BB24 BB27 BB30
1uF
6.3V 10% X5R 0402 COMMON
C684 1uF
6.3V 10% X5R 0402 COMMON
C696 1uF
6.3V 10% X5R 0402 COMMON
C682 1uF
6.3V 10% X5R 0402 COMMON
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
PCIE
PCIE
PCIE
Place between GPU and PS
MS-V317
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
PEX_VDD
C102 10uF
6.3V 20% X5R 0805 COMMON
C634 10uF
6.3V 20% X5R 0805LP COMMON
C108 22uF
6.3V 20% X5R 0805 COMMON
C630 22uF
6.3V 20% X5R 0805LP COMMON
C109 10uF
6.3V 20% X5R 0805 COMMON
C100 10uF
6.3V 20% X5R 0805 COMMON
GND
PEX_VDD
GND
C642 22uF
6.3V 20% X5R 0805LP COMMON
C633 22uF
6.3V 20% X5R 0805LP COMMON
1.0
1.0
1.0
337
337
337
1
2
3V3_RUN
AW30 AW32
AY23 AW23
NVVDD_SENSE
GND_SENSE
C687
0.1uF
16V 10% X7R 0402 COMMON
C693
C808
4.7uF
6.3V 20% X5R 0603 COMMON
C822
4.7uF
6.3V 20% X5R 0603 COMMON
GND
27 27
0.1uF
16V 10% X7R 0402 COMMON
OUT
OUT
3
4
R631
BH38 BG38
AW26
BA23
BJ38
PEX_PLL_CLK_OUT PEX_PLL_CLK_OUT*
GPU_TESTMODE
PEX_TERMP
PEX_PLL_CLK PEX_PLL_CLK
PLLVDD now requires decap only
R83 10k
COMMON
0402
5 %
R630 2.49k
COMMON
0402
1 %
PEXGEN3_SIGNALS PEXGEN3_SIGNALS
GND
GND
G
200ohm
5 % 0402 DNI
C85
C84 1uF
0.1uF
16V
6.3V
10%
10%
X7R
X5R
0402
0402
COMMON
COMMON
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
BOM REV
PEX_VDD
GND
C91
4.7uF
6.3V 20% X5R 0603 COMMON
5
3 OF 37
PAGE DATE
04-AUG-2014
H
Page 4
A B C D E F G H
Page4: MEMORY: GPU Partition A/B
1
5
Fba_D<0>
5
Fba_D<1>
5
Fba_D<2>
5
Fba_D<3>
5
Fba_D<4>
5
Fba_D<5>
5
Fba_D<6>
5
Fba_D<7>
5
Fba_D<8>
5
Fba_D<9>
5
Fba_D<10>
5
Fba_D<11>
5
Fba_D<12>
5
Fba_D<13>
5
Fba_D<14>
5
Fba_D<15>
5
Fba_D<16>
5
Fba_D<17>
5
Fba_D<18>
5
Fba_D<19>
5
Fba_D<20>
5
Fba_D<21>
5
2
3
5 5 5 5 06 06
4
06 06
Fba_D<22>
5
Fba_D<23>
5
Fba_D<24>
5
Fba_D<25>
5
Fba_D<26>
5
Fba_D<27>
5
Fba_D<28>
5
Fba_D<29>
5
Fba_D<30>
5
Fba_D<31>
06
Fba_D<32>
06
Fba_D<33>
06
Fba_D<34>
06
Fba_D<35>
06
Fba_D<36>
06
Fba_D<37>
06
Fba_D<38>
06
Fba_D<39>
06
Fba_D<40>
06
Fba_D<41>
06
Fba_D<42>
06
Fba_D<43>
06
Fba_D<44>
06
Fba_D<45>
06
Fba_D<46>
06
Fba_D<47>
06
Fba_D<48>
06
Fba_D<49>
06
Fba_D<50>
06
Fba_D<51>
06
Fba_D<52>
06
Fba_D<53>
06
Fba_D<54>
06
Fba_D<55>
06
Fba_D<56>
06
Fba_D<57>
06
Fba_D<58>
06
Fba_D<59>
06
Fba_D<60>
06
Fba_D<61>
06
Fba_D<62>
06
Fba_D<63>
5 5 5 5 06 06 06 06
1V_PLL
C653
0.1uF
16V 10% X7R 0402 COMMON
OUT OUT OUT OUT OUT OUT OUT OUT
BI BI BI BI BI BI BI BI
FBA_D<0>
0
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_D<5>
5
FBA_D<6>
6
FBA_D<7>
7
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_D<16>
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
20
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_D<32>
32
FBA_D<33>
33
FBA_D<34>
34
FBA_D<35>
35
FBA_D<36>
36
FBA_D<37>
37
FBA_D<38>
38
FBA_D<39>
39
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50>
50
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DBI<0>
0
FBA_DBI<1>
1
FBA_DBI<2>
2
FBA_DBI<3>
3
FBA_DBI<4>
4
FBA_DBI<5>
5
FBA_DBI<6>
6
FBA_DBI<7>
7
FBA_EDC<0>
0
FBA_EDC<1>
1
FBA_EDC<2>
2
FBA_EDC<3>
3
FBA_EDC<4>
4
FBA_EDC<5>
5
FBA_EDC<6>
6
FBA_EDC<7>
7
C725
0.1uF
16V 10% X7R 0402 COMMON
GND
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
G1B
@digital.u_gpu_gb3b_256(sym_2):page4_i1879 BGA1745 COMMON
2/21 FBA
V43
FBA_D0
V41
FBA_D1
V44
FBA_D2
V42
FBA_D3
U43
FBA_D4
U44
FBA_D5
U41
FBA_D6
U42
FBA_D7
AA46
FBA_D8
AC46
FBA_D9
AA45
FBA_D10
AA47
FBA_D11
Y46
FBA_D12
Y49
FBA_D13
Y45
FBA_D14
Y48
FBA_D15
AJ46
FBA_D16
AG47
FBA_D17
AG46
FBA_D18
AG45
FBA_D19
AF44
FBA_D20
AF45
FBA_D21
AD46
FBA_D22
AD45
FBA_D23
AD44
FBA_D24
AD43
FBA_D25
AD42
FBA_D26
AC42
FBA_D27
AA44
FBA_D28
AA43
FBA_D29
AA42
FBA_D30
AA40
FBA_D31
AT48
FBA_D32
AT46
FBA_D33
AT49
FBA_D34
AT47
FBA_D35
AW47
FBA_D36
AW48
FBA_D37
BA47
FBA_D38
AW46
FBA_D39
AR46
FBA_D40
AN45
FBA_D41
AR49
FBA_D42
AR48
FBA_D43
AT45
FBA_D44
AR44
FBA_D45
AN41
FBA_D46
AN42
FBA_D47
AG40
FBA_D48
AG43
FBA_D49
AG41
FBA_D50
AJ43
FBA_D51
AJ40
FBA_D52
AK40
FBA_D53
AK42
FBA_D54
AK41
FBA_D55
AK45
FBA_D56
AK43
FBA_D57
AK48
FBA_D58
AK49
FBA_D59
AM45
FBA_D60
AM44
FBA_D61
AK44
FBA_D62
AM43
FBA_D63
U40
FBA_DQM0
AC45
FBA_DQM1
AG44
FBA_DQM2
AA41
FBA_DQM3
AV45
FBA_DQM4
AR45
FBA_DQM5
AG42
FBA_DQM6
AM46
FBA_DQM7
U45
FBA_DQS_WP0
Y43
FBA_DQS_WP1
AF42
FBA_DQS_WP2
AC44
FBA_DQS_WP3
AV47
FBA_DQS_WP4
AN43
FBA_DQS_WP5
AJ42
FBA_DQS_WP6
AK47
FBA_DQS_WP7
U46
FBA_DQS_RN0
Y44
FBA_DQS_RN1
AF43
FBA_DQS_RN2
AC43
FBA_DQS_RN3
AV46
FBA_DQS_RN4
AN44
FBA_DQS_RN5
AJ41
FBA_DQS_RN6
AK46
FBA_DQS_RN7
AC39
FB_REFPLL_DLL_AVDD0
L21
FB_REFPLL_DLL_AVDD1
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31 FBA_CMD32 FBA_CMD33 FBA_CMD34 FBA_CMD35
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
FBA_WCK01 FBA_WCK01
FBA_WCKB01 FBA_WCKB01
FBA_WCK23 FBA_WCK23
FBA_WCKB23 FBA_WCKB23
FBA_WCK45 FBA_WCK45
FBA_WCKB45 FBA_WCKB45
FBA_WCK67 FBA_WCK67
FBA_WCKB67 FBA_WCKB67
U48 U49 V48 V49 V47 AA49 AA48 AC48 AC49 AC47 AD49 AD48 AD47 AF47 AF48 BB49 BA48 BA49 AW49 AV48 AV49 AN48 AN49 AM47 AM49 AM48 AJ47 AJ49 AJ48 AG48 AG49 AF49 AF46 Y47 AR47
AF41 AF40 AJ44 AJ45
V46 V45 Y42 Y41 AD41 AD40 AC41 AC40 AT44 AT43 AR43 AR42 AM42 AM41 AN47 AN46
FBA_CMD<1> FBA_CMD<2> FBA_CMD<3> FBA_CMD<4> FBA_CMD<5> FBA_CMD<6> FBA_CMD<7> FBA_CMD<8> FBA_CMD<9> FBA_CMD<10> FBA_CMD<11> FBA_CMD<12> FBA_CMD<13> FBA_CMD<14> FBA_CMD<15> FBA_CMD<16> FBA_CMD<17> FBA_CMD<18> FBA_CMD<19> FBA_CMD<20> FBA_CMD<21> FBA_CMD<22> FBA_CMD<23> FBA_CMD<24> FBA_CMD<25> FBA_CMD<26> FBA_CMD<27> FBA_CMD<28> FBA_CMD<29> FBA_CMD<30> FBA_CMD<31>
FBA_DEBUG0 FBA_DEBUG1
FBA_CLK0 FBA_CLK0* FBA_CLK1 FBA_CLK1*
FBA_WCK01 FBA_WCK01*
FBA_WCK23 FBA_WCK23*
FBA_WCK45 FBA_WCK45*
FBA_WCK67 FBA_WCK67*
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R622 60.4ohm
0402 DNI
1 %
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
FBA_WCK01 FBA_WCK01
FBA_WCK23 FBA_WCK23
FBA_WCK45 FBA_WCK45
FBA_WCK67 FBA_WCK67
FB_CLK FB_CLK FB_CLK FB_CLK
FB_WCK FB_WCK
FB_WCK FB_WCK
FB_WCK FB_WCK
FB_WCK FB_WCK
FBA_CMD<0> FBA_CMD<1> FBA_CMD<2> FBA_CMD<3> FBA_CMD<4> FBA_CMD<5> FBA_CMD<6> FBA_CMD<7> FBA_CMD<8> FBA_CMD<9> FBA_CMD<10> FBA_CMD<11> FBA_CMD<12> FBA_CMD<13> FBA_CMD<14> FBA_CMD<15> FBA_CMD<16> FBA_CMD<17> FBA_CMD<18> FBA_CMD<19> FBA_CMD<20> FBA_CMD<21> FBA_CMD<22> FBA_CMD<23> FBA_CMD<24> FBA_CMD<25> FBA_CMD<26> FBA_CMD<27> FBA_CMD<28> FBA_CMD<29> FBA_CMD<30> FBA_CMD<31>
R623
0402
1 %
60.4ohm
DNI
FBA_CMD<0>
U47
3V3_RUN
LB501 30ohm
COMMON BEAD_0603
FBA_PLL_AVDD
AJ39
C820
0.1uF
16V 10% X7R 0402 COMMON
3V3_PLL 3V3_PLL
C823
22uF
6.3V
20%
X5R
0805LP
COMMON
GND
R596 10k
5 % 0402
FBA_CMD<1> FBA_CMD<17>
FBA_CMD<2> FBA_CMD<18>
COMMON
R616 10k
5 % 0402 COMMON
C E
OUT OUT OUT OUT
OUT OUT
OUT OUT
OUT OUT
OUT OUT
OUT
ASSEMBLY PAGE DETAIL
GDDR5 CMD Mapping
CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6
CMD8 CMD9 CMD10 WE* CMD11 CMD12
5
CMD13
5
CMD14
5
CMD15
5
CMD16
5
CMD17
5
CMD18
5
CMD19
5
CMD20
5
CMD21
5
CMD22
5
CMD23
5
CMD24
5
CMD25
5
CMD26
5
CMD27
5
CMD28
06
CMD29
06
CMD30
06
CMD31
06 06 06 06 06 06 06 06 06 06 06 06
FBVDDQ
06
FBVDDQ
R595 10k
5 % 0402 COMMON
R614 10k
5 % 0402 COMMON
GND
CAS* CKE* RST* RAS* A1_A9 A0_A10 A12_RFU ABI*CMD7 A6_A11 A7_A8
A5_BA1 A4_BA2 A2_BA0 A3_BA3 CS*
32..630..31CMD
CAS* CKE* RST* RAS* A1_A9 A0_A10 A12_RFU ABI* A6_A11 A7_A8 WE* A5_BA1 A4_BA2 A2_BA0 A3_BA3 CS*
5 5 06 06
5 5
5 5
06 06
06 06
4,09,16,17,18,20,21
R635 10k
5 % 0402
FBB_CMD<1> FBB_CMD<17>
FBB_CMD<2> FBB_CMD<18>
BASE LEVEL GENERIC SCHEMATIC ONLY MEMORY: GPU Partition A/B
COMMON
R617 10k
5 % 0402 COMMON
G1C
@digital.u_gpu_gb3b_256(sym_3):page4_i1880 BGA1745 COMMON
07
Fbb_D<0>
07
Fbb_D<1>
07
Fbb_D<2>
07
Fbb_D<3>
07
Fbb_D<4>
07
Fbb_D<5>
07
Fbb_D<6>
07
Fbb_D<7>
07
Fbb_D<8>
07
Fbb_D<9>
07
Fbb_D<10>
07
Fbb_D<11>
07
Fbb_D<12>
07
Fbb_D<13>
07
Fbb_D<14>
07
Fbb_D<15>
07
Fbb_D<16>
07
Fbb_D<17>
07
Fbb_D<18>
07
Fbb_D<19>
07
Fbb_D<20>
07
Fbb_D<21>
07
Fbb_D<22>
07
Fbb_D<23>
07
Fbb_D<24>
07
Fbb_D<25>
07
Fbb_D<26>
07
Fbb_D<27>
07
Fbb_D<28>
07
Fbb_D<29>
07
Fbb_D<30>
07
Fbb_D<31>
8
Fbb_D<32>
8
Fbb_D<33>
8
Fbb_D<34>
8
Fbb_D<35>
8
Fbb_D<36>
8
Fbb_D<37>
8
Fbb_D<38>
8
Fbb_D<39>
8
Fbb_D<40>
8
Fbb_D<41>
8
Fbb_D<42>
8
Fbb_D<43>
8
Fbb_D<44>
8
Fbb_D<45>
8
Fbb_D<46>
8
Fbb_D<47>
8
Fbb_D<48>
8
Fbb_D<49>
8
Fbb_D<50>
8
Fbb_D<51>
8
Fbb_D<52>
8
Fbb_D<53>
8
Fbb_D<54>
8
Fbb_D<55>
8
Fbb_D<56>
8
Fbb_D<57>
8
Fbb_D<58>
8
Fbb_D<59>
8
Fbb_D<60>
8
Fbb_D<61>
8
Fbb_D<62>
8
Fbb_D<63>
07 07 07 07 8 8 8 8
07 07 07 07 8 8 8 8
OUT OUT OUT OUT OUT OUT OUT OUT
BI BI BI BI BI BI BI BI
FBB_D<0>
0
FBB_D<1>
1
FBB_D<2>
2
FBB_D<3>
3
FBB_D<4>
4
FBB_D<5>
5
FBB_D<6>
6
FBB_D<7>
7
FBB_D<8>
8
FBB_D<9>
9
FBB_D<10>
10
FBB_D<11>
11
FBB_D<12>
12
FBB_D<13>
13
FBB_D<14>
14
FBB_D<15>
15
FBB_D<16>
16
FBB_D<17>
17
FBB_D<18>
18
FBB_D<19>
19
FBB_D<20>
20
FBB_D<21>
21
FBB_D<22>
22
FBB_D<23>
23
FBB_D<24>
24
FBB_D<25>
25
FBB_D<26>
26
FBB_D<27>
27
FBB_D<28>
28
FBB_D<29>
29
FBB_D<30>
30
FBB_D<31>
31
FBB_D<32>
32
FBB_D<33>
33
FBB_D<34>
34
FBB_D<35>
35
FBB_D<36>
36
FBB_D<37>
37
FBB_D<38>
38
FBB_D<39>
39
FBB_D<40>
40
FBB_D<41>
41
FBB_D<42>
42
FBB_D<43>
43
FBB_D<44>
44
FBB_D<45>
45
FBB_D<46>
46
FBB_D<47>
47
FBB_D<48>
48
FBB_D<49>
49
FBB_D<50>
50
FBB_D<51>
51
FBB_D<52>
52
FBB_D<53>
53
FBB_D<54>
54
FBB_D<55>
55
FBB_D<56>
56
FBB_D<57>
57
FBB_D<58>
58
FBB_D<59>
59
FBB_D<60>
60
FBB_D<61>
61
FBB_D<62>
62
FBB_D<63>
63
FBB_DBI<0>
0
FBB_DBI<1>
1
FBB_DBI<2>
2
FBB_DBI<3>
3
FBB_DBI<4>
4
FBB_DBI<5>
5
FBB_DBI<6>
6
FBB_DBI<7>
7
FBB_EDC<0>
0
FBB_EDC<1>
1
FBB_EDC<2>
2
FBB_EDC<3>
3
FBB_EDC<4>
4
FBB_EDC<5>
5
FBB_EDC<6>
6
FBB_EDC<7>
7
FBVDDQ
R594 10k
5 % 0402 COMMON
R634 10k
5 % 0402 COMMON
GND
3/21 FBB
D30 G30 E30
F30
G29
F29
J29 H29 C33 E33
F33 D33 C30 K33 E32 D32 H39 G39
F39 D41
F38 G38 D38 E38
F36 K35 E36 D36 G35
F35 D35 E35 M44 P42 M43 P43 R45 R46 R43 R44 M47 P44 M46 M45 P47 P49 P45 P46
F46 E47 D47 D48
F48 H46 H47 H48
L45
L44
J46 H49
L47
J49
L48
L49
E29 G33 H38 C36 P41 P48
F47
L46
J30 H33 D39
J35 R42 M48
F49
J47
H30
J33 E39 H35 R41 M49
E49
J48
FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63
FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7
FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7
FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7
FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8
FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31 FBB_CMD32 FBB_CMD33 FBB_CMD34 FBB_CMD35
FBB_CLK0 FBB_CLK0 FBB_CLK1 FBB_CLK1
FBB_WCK01 FBB_WCK01
FBB_WCKB01 FBB_WCKB01
FBB_WCK23 FBB_WCK23
FBB_WCKB23 FBB_WCKB23
FBB_WCK45 FBB_WCK45
FBB_WCKB45 FBB_WCKB45
FBB_WCK67 FBB_WCK67
FBB_WCKB67 FBB_WCKB67
FBB_PLL_AVDD
FDBA
FBB_CMD<0>
C29
FBB_CMD<1>
B29
FBB_CMD<2>
A29
FBB_CMD<3>
A30
FBB_CMD<4>
B30
FBB_CMD<5>
B32
FBB_CMD<6>
A32
FBB_CMD<7>
C32
FBB_CMD<8>
A33
FBB_CMD<9>
B33
FBB_CMD<10>
B35
FBB_CMD<11>
A35
FBB_CMD<12>
C35
FBB_CMD<13>
A36
FBB_CMD<14>
B36
FBB_CMD<15>
B38
FBB_CMD<16>
D49
FBB_CMD<17>
C48
FBB_CMD<18>
B46
FBB_CMD<19>
A46
FBB_CMD<20>
A45
FBB_CMD<21>
C44
FBB_CMD<22>
A44
FBB_CMD<23>
B44
FBB_CMD<24>
C42
FBB_CMD<25>
B42
FBB_CMD<26>
A42
FBB_CMD<27>
A41
FBB_CMD<28>
B41
FBB_CMD<29>
C39
FBB_CMD<30>
B39
FBB_CMD<31>
A39 A38 C38
FBB_DEBUG0
D29
FBB_DEBUG1
C41
FBB_CLK0
E41
FBB_CLK0*
F41
FBB_CLK1
E42
FBB_CLK1*
D42
FBB_WCK01
F32
FBB_WCK01*
G32 H32 J32
FBB_WCK23
G36
FBB_WCK23*
H36 K36 J36
FBB_WCK45
M42
FBB_WCK45*
M41 L42 L43
FBB_WCK67
H45
FBB_WCK67*
H44 J45 J44
L36
GND
MSI
MSI
MSI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
G
Fbb_Cmd<0> Fbb_Cmd<1> Fbb_Cmd<2> Fbb_Cmd<3> Fbb_Cmd<4> Fbb_Cmd<5> Fbb_Cmd<6> Fbb_Cmd<7> Fbb_Cmd<8> Fbb_Cmd<9> Fbb_Cmd<10> Fbb_Cmd<11> Fbb_Cmd<12> Fbb_Cmd<13> Fbb_Cmd<14> Fbb_Cmd<15> Fbb_Cmd<16> Fbb_Cmd<17> Fbb_Cmd<18> Fbb_Cmd<19> Fbb_Cmd<20> Fbb_Cmd<21> Fbb_Cmd<22> Fbb_Cmd<23> Fbb_Cmd<24> Fbb_Cmd<25> Fbb_Cmd<26> Fbb_Cmd<27> Fbb_Cmd<28> Fbb_Cmd<29> Fbb_Cmd<30> Fbb_Cmd<31>
1 %
FB_CLK FB_CLK FB_CLK FB_CLK
FB_WCK FB_WCK
FB_WCK FB_WCK
FB_WCK FB_WCK
FB_WCK FB_WCK
MS-V317
MS-V317
MS-V317
07 07 07 07 07 07 07 07 07 07 07 07 07 07 07 07 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
R629 60.4ohm
0402 DNI
1 %
4,09,16,17,18,20,21
H
FBVDDQ
OUT OUT OUT OUT
OUT OUT
OUT OUT
OUT OUT
OUT OUT
Sheet ofDate:
437
Sheet ofDate:
437
Sheet ofDate:
437
PAGE DATE
4 OF 37
04-AUG-2014
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R641 60.4ohm
0402 DNI
FBB_CLK0 FBB_CLK0 FBB_CLK1 FBB_CLK1
FBB_WCK01 FBB_WCK01
FBB_WCK23 FBB_WCK23
FBB_WCK45 FBB_WCK45
FBB_WCK67 FBB_WCK67
IN
C654
0.1uF
16V 10% X7R 0402 COMMON
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
MEMORY: GPU Partition A/B
MEMORY: GPU Partition A/B
MEMORY: GPU Partition A/B
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
600-1G401-BASE-QS1
PG401-A02 A
1
2
07 07 8 8
3
07 07
07 07
8 8
8 8
4
1.0
1.0
1.0
5
Page 5
A B C D E F G H
Page5: MEMORY: FBA Partition 31..0
1
GND
M7C
@memory.u_mem_sd_ddr5_x32(sym_7):page5_i361 BGA170_MIRR COMMON
Mirrored
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
SOE*/MF_VDD
add 1k to VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
FBVDDQ
R600
FBA_MF1_A
J1 C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3
1k
0402 COMMON
1 %
FBVDDQ
M7B
@memory.u_mem_sd_ddr5_x32(sym_5):page5_i360 BGA170_MIRR
M7D
@memory.u_mem_sd_ddr5_x32(sym_2):page5_i358 BGA170_MIRR
2
4
Fba_D<0>
4
Fba_D<1>
4
Fba_D<2>
4
Fba_D<3>
4
Fba_D<4>
4
Fba_D<5>
4
Fba_D<6>
4
Fba_D<7>
4 4
4
Fba_D<8>
4
Fba_D<9>
4
Fba_D<10>
4
Fba_D<11>
4
Fba_D<12>
4
Fba_D<13>
4
Fba_D<14>
4
Fba_D<15>
4 4
3
4 4
FBA_D<0>
0
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_D<5>
5
FBA_D<6>
6
FBA_D<7>
7
FBA_EDC<0>
BI
FBA_DBI<0>
BI
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_EDC<1>
BI
FBA_DBI<1>
BI
FBA_WCK01
IN
FBA_WCK01*
IN
COMMON
MIRRORED
x16x32
V4
DQ0
NC
4
V2
DQ1
NC
T4
DQ2
NC
T2
DQ3
NC
N4
DQ4
NC
N2
DQ5
NC
M4
DQ6
NC
M2
DQ7
NC
R2
EDC0
NC
P2
DBI0
NC
V10
VREFD
V11
DQ8
V13
DQ9
T11
DQ10
T13
DQ11
N11
DQ12
N13
DQ13
M11
DQ14
M13
DQ15
R13
EDC1
P13
DBI1
P4
WCK01
P5
WCK01
Fba_D<16>
4
Fba_D<17>
4
Fba_D<18>
4
Fba_D<19>
4
Fba_D<20>
4
Fba_D<21>
4
Fba_D<22>
4
Fba_D<23>
4 4
FBA_VREFD
4
Fba_D<24>
4
Fba_D<25>
4
Fba_D<26>
4
Fba_D<27>
4
Fba_D<28>
4
Fba_D<29>
4
Fba_D<30>
4
Fba_D<31>
4 4
4 4
FBA_D<16>
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
20
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_EDC<2>
BI
FBA_DBI<2>
BI
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_EDC<3>
BI
FBA_DBI<3>
BI
FBA_WCK23
IN
FBA_WCK23*
IN
07,10,12,23
IN
M7A
@memory.u_mem_sd_ddr5_x32(sym_4):page5_i359 BGA170_MIRR COMMON
MIRRORED
x32 x16
A11
DQ16
A13
DQ17
B11
DQ18
B13
DQ19
E11
DQ20
E13
DQ21
F11
DQ22
F13
DQ23
C13
EDC2
D13
DBI2
A4
DQ24
A2
DQ25
B4
DQ26
B2
DQ27
E4
DQ28
E2
DQ29
F4
DQ30
F2
DQ31
C2
EDC3
D2
DBI3
D4
WCK23
D5
WCK23
GPIO10_FBVREF_SEL
VREFD
NC NC NC NC NC NC NC NC
GND
NC
A10
GND GND
C137 820pF
50V 10% X7R 0402 COMMON
0.140A1.05V
1G1D1S
FBVDDQ
R103 549ohm
1 % 0402 COMMON
R104
1.33k
1 % 0402 COMMON
3
D
Q15
@discrete.q_fet_n_enh(sym_2):page5_i328 SOT23_1G1D1S
G
1
COMMON
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
FBA_VREFD
R102 931ohm
1 % 0402 COMMON
FBA_CMD<3>
4
C116 820pF
50V 10% X7R 0402 COMMON
3
FBA_CMD<0>
4
0
FBA_CMD<10>
4
10
FBA_CMD<15>
4
15
FBA_CMD<7>
4
7
FBA_CMD<5>
4
5
FBA_CMD<4>
4
4
FBA_CMD<13>
4
13
FBA_CMD<14>
4
14
FBA_CMD<12>
4
12
FBA_CMD<11>
4
11
FBA_CMD<8>
4
8
FBA_CMD<9>
4
9
FBA_CMD<6>
4
6
FBA_CMD<2>
4
2
FBA_CMD<1>
4
1
R615
40.2ohm
1 % 0402 COMMON
C609 10nF
16V 10% X7R 0402 COMMON
GND
OUT
FBA_VREFC
R605
0402 COMMON
R591
0402 COMMON
FBA_ZQ_1_B
121ohm
1 %
FBA_SEN_1
1k
1 %
GND
FBA_CMD<3> FBA_CMD<0> FBA_CMD<10> FBA_CMD<15>
FBA_CMD<7> FBA_CMD<5>
FBA_CMD<4> FBA_CMD<13> FBA_CMD<14> FBA_CMD<12> FBA_CMD<11> FBA_CMD<8> FBA_CMD<9> FBA_CMD<6>
FBA_CMD<2> FBA_CMD<1>
FBA_CLK0
IN
FBA_CLK0*
IN
R611
40.2ohm
1 % 0402 COMMON
FBA_CLK0_RC
0.350 1.05V
R94 931ohm
1 % 0402 COMMON
GND
4 4
FBA_VREF_Q
06
FBVDDQ
R93 549ohm
1 % 0402 COMMON
R89
1.33k
1 % 0402 COMMON
GND
OUT
1.05V
0.350
COMMON
L3
RAS
G3
CAS
G12
WE
L12
CS
J4
ABI
K4
A0_A10
K5
A1_A9
K11
A2_BA0
K10
A3_BA3
H11
A4_BA2
H10
A5_BA1
H5
A6_A11
H4
A7_A8
J5
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
06
J14
VREFC
J13
ZQ
J10
SEN
4
1
FBVDDQ
2
3
4
FBVDDQ
C601
C603
C586
C596
C624
10uF
4.7uF
6.3V
6.3V
20%
20%
X5R
X5R
0805LP
0603
COMMON
COMMON
FBVDDQ
C587
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
10uF
6.3V 20% X5R 0805LP COMMON
C130
4.7uF
6.3V 20% X5R 0603 COMMON
4.7uF
6.3V 20% X5R 0603 COMMON
C127
4.7uF
6.3V 20% X5R 0603 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C120 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C125 1uF
6.3V 10% X5R 0402 COMMON
C619 1uF
6.3V 10% X5R 0402 COMMON
C113 1uF
6.3V 10% X5R 0402 COMMON
C613 1uF
6.3V 10% X5R 0402 COMMON
C110 1uF
6.3V 10% X5R 0402 COMMON
C614 1uF
6.3V 10% X5R 0402 COMMON
GND
C592 1uF
6.3V 10% X5R 0402 COMMON
GND
C916 47uF
4V 20% X5R 0805LP DNI
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY MEMORY: FBA[31:0]
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
MS-V317
5: MEMORY: FBA Partition 31..0
5: MEMORY: FBA Partition 31..0
5: MEMORY: FBA Partition 31..0
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
H
537
537
537
5 OF 37
PAGE DATE
04-AUG-2014
10
10
10
5
Page 6
A B C D E F G H
Page6: MEMORY: FBA Partition 63..32
1
GND
M8C
@memory.u_mem_sd_ddr5_x32(sym_6):page6_i109 BGA170 COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
M8B
@memory.u_mem_sd_ddr5_x32(sym_5):page6_i55 BGA170
2
M8D
@memory.u_mem_sd_ddr5_x32(sym_1):page6_i11 BGA170 COMMON
4
Fba_D<32>
4
Fba_D<33>
4
Fba_D<34>
4
Fba_D<35>
4
Fba_D<36>
4
Fba_D<37>
4
Fba_D<38>
4
Fba_D<39>
4 4
4
Fba_D<40>
4
Fba_D<41>
4
Fba_D<42>
4
Fba_D<43>
4
Fba_D<44>
4
3
Fba_D<45>
4
Fba_D<46>
4
Fba_D<47>
4 4
4 4
FBA_D<32>
32
FBA_D<33>
33
FBA_D<34>
34
FBA_D<35>
35
FBA_D<36>
36
FBA_D<37>
37
FBA_D<38>
38
FBA_D<39>
39
FBA_EDC<4>
BI
FBA_DBI<4>
BI
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_EDC<5>
BI
FBA_DBI<5>
BI
FBA_WCK45
IN
FBA_WCK45*
IN
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0
VREFD
x16
x32
A11
DQ8
A13
DQ9
B11
DQ10
B13
DQ11
E11
DQ12
E13
DQ13
F11
DQ14
F13
DQ15
C13
EDC1
D13
DBI1
D4
WCK01
D5
WCK01
FBA_VREFD FBA_VREFD
A10
NC NC NC NC NC NC NC NC
GND
NC
4
Fba_D<48>
4
Fba_D<49>
4
Fba_D<50>
4
Fba_D<51>
4
Fba_D<52>
4
Fba_D<53>
4
Fba_D<54>
4
Fba_D<55>
4 4
IN
4 4
5
4
Fba_D<56>
4
Fba_D<57>
4
Fba_D<58>
4
Fba_D<59>
4
Fba_D<60>
4
Fba_D<61>
4
Fba_D<62>
4
Fba_D<63>
4 4
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50>
50
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_EDC<6>
BI
FBA_DBI<6>
BI
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_EDC<7>
BI
FBA_DBI<7>
BI
FBA_WCK67
IN
FBA_WCK67*
IN
M8A
@memory.u_mem_sd_ddr5_x32(sym_3):page6_i51 BGA170 COMMON
NORMAL
V11
DQ16
V13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2
VREFD
x16
x32
V4
DQ24
V2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3
P4
WCK23
P5
WCK23
V10
NC NC NC NC NC NC NC NC
NC NC
C138 820pF
50V
4
10% X7R
4
0402 COMMON
GND
5
IN
4
IN IN
C119 820pF
50V 10% X7R 0402 COMMON
GND GND
FBA_CMD<19> FBA_CMD<16> FBA_CMD<26> FBA_CMD<31>
FBA_CMD<23> FBA_CMD<21>
FBA_CMD<20> FBA_CMD<29> FBA_CMD<30> FBA_CMD<28> FBA_CMD<27> FBA_CMD<24> FBA_CMD<25> FBA_CMD<22>
FBA_CMD<18> FBA_CMD<17>
FBA_CLK1 FBA_CLK1*
R613
40.2ohm
1 % 0402 COMMON
FBA_CLK1_CM
GND
R604 121ohm
R593
C608 10nF
16V 10% X7R 0402 COMMON
FBA_CMD<19>
4
19
FBA_CMD<16>
4
16
FBA_CMD<26>
4
26
FBA_CMD<31>
4
31
FBA_CMD<23>
4
23
FBA_CMD<21>
4
21
FBA_CMD<20>
4
20
FBA_CMD<29>
4
29
FBA_CMD<30>
4
30
FBA_CMD<28>
4
28
FBA_CMD<27>
4
27
FBA_CMD<24>
4
24
FBA_CMD<25>
4
25
FBA_CMD<22>
4
22
FBA_CMD<18>
4
18
FBA_CMD<17>
4
17
R610
40.2ohm
1 % 0402 COMMON
FBA_VREFC
FBA_ZQ_2B
COMMON0402
1 %
1 %
FBA_SEN_2
1k
COMMON0402
COMMON
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
J13
ZQ
J10
SEN
FBA_MF2_A
R602
1k
COMMON0402
1 %
FBVDDQ
FBVDDQ
1
2
3
4
FBVDDQ
C620
C615
C606
GND
1uF
6.3V 10% X5R 0402 COMMON
C126 1uF
6.3V 10% X5R 0402 COMMON
GND
C915 47uF
4V 20% X5R 0805LP DNI
C E
C600
C589 10uF
6.3V 20% X5R 0805LP COMMON
FBVDDQ
C588 10uF
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
6.3V 20% X5R 0805LP COMMON
4.7uF
6.3V 20% X5R 0603 COMMON
C135
4.7uF
6.3V 20% X5R 0603 COMMON
C625
4.7uF
6.3V 20% X5R 0603 COMMON
C132
4.7uF
6.3V 20% X5R 0603 COMMON
C604 1uF
6.3V 10% X5R 0402 COMMON
C112 1uF
6.3V 10% X5R 0402 COMMON
C595 1uF
6.3V 10% X5R 0402 COMMON
C129 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C123 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C115 1uF
6.3V 10% X5R 0402 COMMON
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY MEMORY: FBA[63:32]
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
6: MEMORY: FBA Partition 63..32
6: MEMORY: FBA Partition 63..32
6: MEMORY: FBA Partition 63..32
600-1G401-BASE-QS1
PG401-A02 A
1.0
1.0
1.0
Sheet ofDate:
06 37
Sheet ofDate:
06 37
Sheet ofDate:
06 37
6 OF 37
PAGE DATE
04-AUG-2014
H
5
Page 7
A B C D E F G H
Page7: MEMORY: FBB Partition 31..0
1
GND
M5C
@memory.u_mem_sd_ddr5_x32(sym_7):page7_i381 BGA170_MIRR COMMON
Mirrored
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
SOE*/MF_VDD
add 1k to VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
FBB_MF1_A
J1 C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3
R636 1k
1 %
FBVDDQ
COMMON0402
M5B
@memory.u_mem_sd_ddr5_x32(sym_5):page7_i380 BGA170_MIRR
M5D
@memory.u_mem_sd_ddr5_x32(sym_2):page7_i378 BGA170_MIRR COMMON
2
4
Fbb_D<0>
4
Fbb_D<1>
4
Fbb_D<2>
4
Fbb_D<3>
4
Fbb_D<4>
4
Fbb_D<5>
4
Fbb_D<6>
4
Fbb_D<7>
4 4
4
Fbb_D<8>
4
Fbb_D<9>
4
Fbb_D<10>
4
Fbb_D<11>
4
Fbb_D<12>
4
Fbb_D<13>
4
Fbb_D<14>
4
Fbb_D<15>
4 4
4 4
3
FBB_D<0>
0
FBB_D<1>
1
FBB_D<2>
2
FBB_D<3>
3
FBB_D<4>
4
FBB_D<5>
5
FBB_D<6>
6
FBB_D<7>
7
FBB_EDC<0>
BI
FBB_DBI<0>
BI
FBB_D<8>
8
FBB_D<9> FBB_D<25>
9
FBB_D<10>
10
FBB_D<11>
11
FBB_D<12>
12
FBB_D<13>
13
FBB_D<14>
14
FBB_D<15>
15
FBB_EDC<1>
BI
FBB_DBI<1>
BI
FBB_WCK01
IN
FBB_WCK01*
IN
MIRRORED
x16x32
V4
DQ0
NC
4
V2
DQ1
NC
T4
DQ2
NC
T2
DQ3
NC
N4
DQ4
NC
N2
DQ5
NC
M4
DQ6
NC
M2
DQ7
NC
R2
EDC0
NC
P2
DBI0
NC
VREFD
V11
DQ8
V13
DQ9
T11
DQ10
T13
DQ11
N11
DQ12
N13
DQ13
M11
DQ14
M13
DQ15
R13
EDC1
P13
DBI1
P4
WCK01
P5
WCK01
Fbb_D<16>
4
Fbb_D<17>
4
Fbb_D<18>
4
Fbb_D<19>
4
Fbb_D<20>
4
Fbb_D<21>
4
Fbb_D<22>
4
Fbb_D<23>
4 4
FBB_VREFD
V10
4
Fbb_D<24>
4
Fbb_D<25>
4
Fbb_D<26>
4
Fbb_D<27>
4
Fbb_D<28>
4
Fbb_D<29>
4
Fbb_D<30>
4
Fbb_D<31>
4 4
4 4
FBB_D<16>
16
FBB_D<17>
17
FBB_D<18>
18
FBB_D<19>
19
FBB_D<20>
20
FBB_D<21>
21
FBB_D<22>
22
FBB_D<23>
23
FBB_EDC<2>
BI
FBB_DBI<2>
BI
FBB_D<24>
24 25
FBB_D<26>
26
FBB_D<27>
27
FBB_D<28>
28
FBB_D<29>
29
FBB_D<30>
30
FBB_D<31>
31
FBB_EDC<3>
BI
FBB_DBI<3>
BI
FBB_WCK23
IN
FBB_WCK23*
IN
5,10,12,23
M5A
@memory.u_mem_sd_ddr5_x32(sym_4):page7_i379 BGA170_MIRR COMMON
MIRRORED
x32 x16
A11
DQ16
NC
A13
DQ17
NC
B11
DQ18
NC
B13
DQ19
NC
E11
DQ20
NC
E13
DQ21
NC
F11
DQ22
NC
F13
DQ23
NC
C13
EDC2
GND
D13
DBI2
NC
VREFD
A4
DQ24
A2
DQ25
B4
DQ26
B2
DQ27
E4
DQ28
E2
DQ29
F4
DQ30
F2
DQ31
C2
EDC3
D2
DBI3
D4
WCK23
D5
WCK23
GPIO10_FBVREF_SEL
IN
A10
GND GND
C644 820pF
50V 10% X7R 0402 COMMON
0.140A1.05V
FBVDDQ
1G1D1S
1
R100 549ohm
1 % 0402 COMMON
R101
1.33k
1 % 0402 COMMON
3
D
Q16
@discrete.q_fet_n_enh(sym_2):page7_i328 SOT23_1G1D1S
G
COMMON
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
FBB_VREFD
R99 931ohm
1 % 0402 COMMON
FBB_CMD<3>
4
C104 820pF
50V 10% X7R 0402 COMMON
3
FBB_CMD<0>
4
0
FBB_CMD<10>
4
10
FBB_CMD<15>
4
15
FBB_CMD<7>
4
7
FBB_CMD<5>
4
5
FBB_CMD<4>
4
4
FBB_CMD<13>
4
13
FBB_CMD<14>
4
14
FBB_CMD<12>
4
12
FBB_CMD<11>
4
11
FBB_CMD<8>
4
8
FBB_CMD<9>
4
9
FBB_CMD<6>
4
6
FBB_CMD<2>
4
2
FBB_CMD<1>
4
1
R627
40.2ohm
1 % 0402 COMMON
C632 10nF
16V 10% X7R 0402 COMMON
GND
OUT
FBB_VREFC
FBB_ZQ_1_B
R625 121ohm
COMMON0402
1 %
R628 1k
FBB_SEN_1
COMMON0402
1 %
GND
Fbb_Cmd<3> Fbb_Cmd<0> Fbb_Cmd<10> Fbb_Cmd<15>
Fbb_Cmd<7> Fbb_Cmd<5>
Fbb_Cmd<4> Fbb_Cmd<13> Fbb_Cmd<14> Fbb_Cmd<12> Fbb_Cmd<11> Fbb_Cmd<8> Fbb_Cmd<9> Fbb_Cmd<6>
Fbb_Cmd<2> Fbb_Cmd<1>
FBB_CLK0
IN
FBB_CLK0*
IN
R626
40.2ohm
1 % 0402 COMMON
FBB_CLK0_RC
0.350 1.05V
R91 931ohm
1 % 0402 COMMON
GND
4 4
FBB_VREF_Q
8
FBVDDQ
R85 549ohm
1 % 0402 COMMON
R86
1.33k
1 % 0402 COMMON
GND
OUT
1.05V
0.350
COMMON
L3
RAS
G3
CAS
G12
WE
L12
CS
J4
ABI
K4
A0_A10
K5
A1_A9
K11
A2_BA0
K10
A3_BA3
H11
A4_BA2
H10
A5_BA1
H5
A6_A11
H4
A7_A8
J5
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
8
J14
VREFC
J13
ZQ
J10
SEN
4
1
FBVDDQ
FBVDDQ
2
3
4
FBVDDQ
C638
C670
C671
GND
1uF
6.3V 10% X5R 0402 COMMON
C602 1uF
6.3V 10% X5R 0402 COMMON
GND
C914 47uF
4V 20% X5R 0805LP DNI
C E
C631
C636
C673
C637
10uF
4.7uF
6.3V 20% X5R 0603 COMMON
C107
4.7uF
6.3V 20% X5R 0603 COMMON
4.7uF
6.3V 20% X5R 0603 COMMON
C98
4.7uF
6.3V 20% X5R 0603 COMMON
6.3V 20% X5R 0805LP COMMON
FBVDDQ
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C635 10uF
6.3V 20% X5R 0805LP COMMON
1uF
6.3V 10% X5R 0402 COMMON
C106 1uF
6.3V 10% X5R 0402 COMMON
C639 1uF
6.3V 10% X5R 0402 COMMON
C99 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C105 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C103 1uF
6.3V 10% X5R 0402 COMMON
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY MEMORY: FBB[31:0]
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
MS-V317
7: MEMORY: FBB Partition 31..0
7: MEMORY: FBB Partition 31..0
7: MEMORY: FBB Partition 31..0
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
PAGE DATE
H
07 37
07 37
07 37
7 OF 37
04-AUG-2014
5
1.0
1.0
1.0
Page 8
A B C D E F G H
Page8: MEMORY: FBB Partition 63..32
1
GND
M6C
@memory.u_mem_sd_ddr5_x32(sym_6):page8_i109 BGA170 COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
M6B
@memory.u_mem_sd_ddr5_x32(sym_5):page8_i55 BGA170 COMMON
FBB_VREFC
FBB_SEN_2
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
J13
ZQ
J10
SEN
FBB_CMD<19>
4
GND
C607 10nF
16V 10% X7R 0402 COMMON
R603
0402
1 %
R592 1k
1 %
19 16 26 31
23
21 20 29 30 28 27 24 25 22
18 17
121ohm
COMMON
COMMON0402
R609
40.2ohm
1 % 0402 COMMON
FBB_CMD<16> FBB_CMD<26> FBB_CMD<31>
FBB_CMD<23>
FBB_CMD<21> FBB_CMD<20> FBB_CMD<29> FBB_CMD<30> FBB_CMD<28> FBB_CMD<27> FBB_CMD<24> FBB_CMD<25> FBB_CMD<22>
FBB_CMD<18> FBB_CMD<17>
FBB_ZQ_2B
4 4 4
4 4
4 4 4 4 4 4 4 4
4 4
Fbb_Cmd<19> Fbb_Cmd<16> Fbb_Cmd<26> Fbb_Cmd<31>
Fbb_Cmd<23>
IN IN
C118 820pF
50V 10% X7R 0402 COMMON
GND GND
Fbb_Cmd<21> Fbb_Cmd<20> Fbb_Cmd<29> Fbb_Cmd<30> Fbb_Cmd<28> Fbb_Cmd<27> Fbb_Cmd<24> Fbb_Cmd<25> Fbb_Cmd<22>
Fbb_Cmd<18> Fbb_Cmd<17>
FBB_CLK1 FBB_CLK1*
R612
40.2ohm
1 % 0402 COMMON
FBB_CLK1_CM
2
4
Fbb_D<32>
4
Fbb_D<33>
4
Fbb_D<34>
4
Fbb_D<35>
4
Fbb_D<36>
4
Fbb_D<37>
4
Fbb_D<38>
4
Fbb_D<39>
4 4
4
Fbb_D<40>
4
Fbb_D<41>
4
Fbb_D<42>
4
Fbb_D<43>
4
Fbb_D<44>
4
Fbb_D<45>
4
Fbb_D<46>
4
3
Fbb_D<47>
4 4
4 4
FBB_D<32>
32
FBB_D<33>
33
FBB_D<34>
34
FBB_D<35>
35
FBB_D<36>
36
FBB_D<37>
37
FBB_D<38>
38
FBB_D<39>
39
FBB_EDC<4>
BI
FBB_DBI<4>
BI
FBB_D<40>
40
FBB_D<41>
41
FBB_D<42>
42
FBB_D<43>
43
FBB_D<44>
44
FBB_D<45>
45
FBB_D<46>
46
FBB_D<47>
47
FBB_EDC<5>
BI
FBB_DBI<5>
BI
FBB_WCK45
IN
FBB_WCK45*
IN
M6D
@memory.u_mem_sd_ddr5_x32(sym_1):page8_i11 BGA170 COMMON
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0
VREFD
x16
x32
A11
DQ8
A13
DQ9
B11
DQ10
B13
DQ11
E11
DQ12
E13
DQ13
F11
DQ14
F13
DQ15
C13
EDC1
GND
D13
DBI1
D4
WCK01
D5
WCK01
M6A
FBB_D<48>
4
Fbb_D<48>
4
Fbb_D<49>
4
Fbb_D<50>
4
Fbb_D<51>
4
Fbb_D<52>
4
Fbb_D<53>
4
Fbb_D<54>
4
Fbb_D<55>
4 4
FBB_VREFD FBB_VREFD
A10
NC NC NC NC NC NC NC NC
NC
IN
4
Fbb_D<56>
4
Fbb_D<57>
4
Fbb_D<58>
4
Fbb_D<59>
4
Fbb_D<60>
4
Fbb_D<61>
4
Fbb_D<62>
4
Fbb_D<63>
4 4
4 4
48 49 50 51 52 53 54 55
FBB_EDC<6>
BI
FBB_DBI<6>
BI
07
56 57 58 59 60 61 62 63
FBB_EDC<7>
BI
FBB_DBI<7>
BI
FBB_WCK67
IN
FBB_WCK67*
IN
FBB_D<49> FBB_D<50> FBB_D<51> FBB_D<52> FBB_D<53> FBB_D<54> FBB_D<55>
FBB_D<56> FBB_D<57> FBB_D<58> FBB_D<59> FBB_D<60> FBB_D<61> FBB_D<62> FBB_D<63>
V11 V13 T11
T13 N11 N13 M11 M13
R13
P13
V4 V2 T4 T2 N4 N2 M4 M2
R2
P2 P4
P5
@memory.u_mem_sd_ddr5_x32(sym_3):page8_i51 BGA170 COMMON
NORMAL
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
EDC2 DBI2
V10
VREFD
x16
x32
DQ24
NC
DQ25
NC
DQ26
NC
DQ27
NC
DQ28
NC
DQ29
NC
DQ30
NC
DQ31
NC
EDC3
NC
DBI3
NC
WCK23 WCK23
4 4
C136 820pF
50V 10% X7R 0402 COMMON
GND
07
IN
R601
0402 COMMON
1 %
FBB_MF2_A
1k
1
FBVDDQ
2
FBVDDQ
3
4
FBVDDQ
C618
C623
C584 10uF
6.3V 20% X5R 0805LP COMMON
FBVDDQ
C585
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
10uF
6.3V 20% X5R 0805LP COMMON
4.7uF
6.3V 20% X5R 0603 COMMON
C131
4.7uF
6.3V 20% X5R 0603 COMMON
C599
4.7uF
6.3V 20% X5R 0603 COMMON
C134
4.7uF
6.3V 20% X5R 0603 COMMON
C594 1uF
6.3V 10% X5R 0402 COMMON
C111 1uF
6.3V 10% X5R 0402 COMMON
C617 1uF
6.3V 10% X5R 0402 COMMON
C114 1uF
6.3V 10% X5R 0402 COMMON
C612 1uF
6.3V 10% X5R 0402 COMMON
C122 1uF
6.3V 10% X5R 0402 COMMON
C605 1uF
6.3V 10% X5R 0402 COMMON
C128 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
GND
C124 1uF
6.3V 10% X5R 0402 COMMON
GND
C913 47uF
4V 20% X5R 0805LP DNI
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY MEMORY: FBB[63:32]
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
MEMORY: FBB Partition 63..32
MEMORY: FBB Partition 63..32
MEMORY: FBB Partition 63..32
600-1G401-BASE-QS1
PG401-A02 A
Sheet ofDate:
837
Sheet ofDate:
837
Sheet ofDate:
837
PAGE DATE
H
8 OF 37
04-AUG-2014
1.0
1.0
1.0
5
Page 9
A B C D E F G H
Page9: MEMORY: GPU Partition C/D
1
10
Fbc_D<0>
10
Fbc_D<1>
10
Fbc_D<2>
10
Fbc_D<3>
10
Fbc_D<4>
10
Fbc_D<5>
10
Fbc_D<6>
10
Fbc_D<7>
10
Fbc_D<8>
10
Fbc_D<9>
10
Fbc_D<10>
10
Fbc_D<11>
10
Fbc_D<12>
10
Fbc_D<13>
10
Fbc_D<14>
10
Fbc_D<15>
10
Fbc_D<16>
10
Fbc_D<17>
10
Fbc_D<18>
10
Fbc_D<19>
10
Fbc_D<20>
10
Fbc_D<21>
10
2
3
10 10 10 10 11 11
4
11 11
Fbc_D<22>
10
Fbc_D<23>
10
Fbc_D<24>
10
Fbc_D<25>
10
Fbc_D<26>
10
Fbc_D<27>
10
Fbc_D<28>
10
Fbc_D<29>
10
Fbc_D<30>
10
Fbc_D<31>
11
Fbc_D<32>
11
Fbc_D<33>
11
Fbc_D<34>
11
Fbc_D<35>
11
Fbc_D<36>
11
Fbc_D<37>
11
Fbc_D<38>
11
Fbc_D<39>
11
Fbc_D<40>
11
Fbc_D<41>
11
Fbc_D<42>
11
Fbc_D<43>
11
Fbc_D<44>
11
Fbc_D<45>
11
Fbc_D<46>
11
Fbc_D<47>
11
Fbc_D<48>
11
Fbc_D<49>
11
Fbc_D<50>
11
Fbc_D<51>
11
Fbc_D<52>
11
Fbc_D<53>
11
Fbc_D<54>
11
Fbc_D<55>
11
Fbc_D<56>
11
Fbc_D<57>
11
Fbc_D<58>
11
Fbc_D<59>
11
Fbc_D<60>
11
Fbc_D<61>
11
Fbc_D<62>
11
Fbc_D<63>
10 10 10 10 11 11 11 11
FBC_D<0>
0
FBC_D<1>
1
FBC_D<2>
2
FBC_D<3>
3
FBC_D<4>
4
FBC_D<5>
5
FBC_D<6>
6
FBC_D<7>
7
FBC_D<8>
8
FBC_D<9>
9
FBC_D<10>
10
FBC_D<11>
11
FBC_D<12>
12
FBC_D<13>
13
FBC_D<14>
14
FBC_D<15>
15
FBC_D<16>
16
FBC_D<17>
17
FBC_D<18>
18
FBC_D<19>
19
FBC_D<20>
20
FBC_D<21>
21
FBC_D<22>
22
FBC_D<23>
23
FBC_D<24>
24
FBC_D<25>
25
FBC_D<26>
26
FBC_D<27>
27
FBC_D<28>
28
FBC_D<29>
29
FBC_D<30>
30
FBC_D<31>
31
FBC_D<32>
32
FBC_D<33>
33
FBC_D<34>
34
FBC_D<35>
35
FBC_D<36>
36
FBC_D<37>
37
FBC_D<38>
38
FBC_D<39>
39
FBC_D<40>
40
FBC_D<41>
41
FBC_D<42>
42
FBC_D<43>
43
FBC_D<44>
44
FBC_D<45>
45
FBC_D<46>
46
FBC_D<47>
47
FBC_D<48>
48
FBC_D<49>
49
FBC_D<50>
50
FBC_D<51>
51
FBC_D<52>
52
FBC_D<53>
53
FBC_D<54>
54
FBC_D<55>
55
FBC_D<56>
56
FBC_D<57>
57
FBC_D<58>
58
FBC_D<59>
59
FBC_D<60>
60
FBC_D<61>
61
FBC_D<62>
62
FBC_D<63>
63
FBC_DBI<0>
OUT
0
FBC_DBI<1>
OUT
1
FBC_DBI<2>
OUT
2
FBC_DBI<3>
OUT
3
FBC_DBI<4>
OUT
4
FBC_DBI<5>
OUT
5
FBC_DBI<6>
OUT
6
FBC_DBI<7>
OUT
7
FBC_EDC<0>
BI
0
FBC_EDC<1>
BI
1
FBC_EDC<2>
BI
2
FBC_EDC<3>
BI
3
FBC_EDC<4>
BI
4
FBC_EDC<5>
BI
5
FBC_EDC<6>
BI
6
FBC_EDC<7>
BI
7
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
G1D
@digital.u_gpu_gb3b_256(sym_4):page9_i2030 BGA1745 COMMON
4/21 FBC
A8
FBC_D0
D8
FBC_D1
B8
FBC_D2
C8
FBC_D3
C5
FBC_D4
B5
FBC_D5
D5
FBC_D6
C4
FBC_D7
B9
FBC_D8
E11
FBC_D9
D9
A9
H11
F9
J11
E8
K17
G17
J17
G15
K15
K14
H14
J14
E14
F14
A14
B14
E12
F12
G12
G14
G26
J26
F26
H26
G27
F27
J27
H27
E23
D21
D23
C23
A24
B24
E24
D24
D15
C17
D17
E17
F18
E18
D20
E20
G20
H20
F20
H21
F23
G23
H23
K23
E6
FBC_DQM0
E9
FBC_DQM1
H17
FBC_DQM2
D12
FBC_DQM3
K27
FBC_DQM4
E21
FBC_DQM5
F17
FBC_DQM6
J23
FBC_DQM7
D6
FBC_DQS_WP0
F11
FBC_DQS_WP1
H15
FBC_DQS_WP2
C14
FBC_DQS_WP3
E27
FBC_DQS_WP4
F24
FBC_DQS_WP5
H18
FBC_DQS_WP6
G21
FBC_DQS_WP7
C6
FBC_DQS_RN0
G11
FBC_DQS_RN1
J15
FBC_DQS_RN2
D14
FBC_DQS_RN3
D27
FBC_DQS_RN4
G24
FBC_DQS_RN5
G18
FBC_DQS_RN6
F21
FBC_DQS_RN7
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8 FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30 FBC_CMD31 FBC_CMD32 FBC_CMD33 FBC_CMD34 FBC_CMD35
FBC_CLK0 FBC_CLK0 FBC_CLK1 FBC_CLK1
FBC_WCK01
FBC_WCK01 FBC_WCKB01 FBC_WCKB01
FBC_WCK23
FBC_WCK23 FBC_WCKB23 FBC_WCKB23
FBC_WCK45
FBC_WCK45 FBC_WCKB45 FBC_WCKB45
FBC_WCK67
FBC_WCK67 FBC_WCKB67 FBC_WCKB67
FBC_PLL_AVDD
A4
FBC_CMD<1>
FBC_CMD<2>
B4
FBC_CMD<3>
A5
FBC_CMD<4>
A6
FBC_CMD<5>
B6
FBC_CMD<6>
B11
FBC_CMD<7>
A11
FBC_CMD<8>
C12
FBC_CMD<9>
A12
FBC_CMD<10>
B12
FBC_CMD<11>
C15
FBC_CMD<12>
A15
FBC_CMD<13>
B15
FBC_CMD<14>
B17
FBC_CMD<15>
A17
FBC_CMD<16>
C27
FBC_CMD<17>
B27
FBC_CMD<18>
A27
FBC_CMD<19>
C26
FBC_CMD<20>
A26
FBC_CMD<21>
B26
FBC_CMD<22>
A23
FBC_CMD<23>
B23
FBC_CMD<24>
B21
FBC_CMD<25>
A21
FBC_CMD<26>
C21
FBC_CMD<27>
A20
FBC_CMD<28>
B20
FBC_CMD<29>
C20
FBC_CMD<30>
C18
FBC_CMD<31>
B18 D18 A18
FBC_DEBUG0
C9
FBC_DEBUG1
C24
FBC_CLK0
F15
FBC_CLK0*
E15
FBC_CLK1
J18
FBC_CLK1*
K18
FBC_WCK01
F8
FBC_WCK01*
G8 H9 G9
FBC_WCK23
H12
FBC_WCK23*
J12 C11 D11
FBC_WCK45
D26
FBC_WCK45*
E26 H24 J24
FBC_WCK67
J20
FBC_WCK67*
K20 J21 K21
L26
0
Fbc_Cmd<0>
1
Fbc_Cmd<1>
2
Fbc_Cmd<2>
3
Fbc_Cmd<3>
4
Fbc_Cmd<4>
5
Fbc_Cmd<5>
6
Fbc_Cmd<6>
7
Fbc_Cmd<7>
8
Fbc_Cmd<8>
9
Fbc_Cmd<9>
10
Fbc_Cmd<10>
11
Fbc_Cmd<11>
12
Fbc_Cmd<12>
13
Fbc_Cmd<13>
14
Fbc_Cmd<14>
15
Fbc_Cmd<15>
16
Fbc_Cmd<16>
17
Fbc_Cmd<17>
18
Fbc_Cmd<18>
19
Fbc_Cmd<19>
20
Fbc_Cmd<20>
21
Fbc_Cmd<21>
22
Fbc_Cmd<22>
23
Fbc_Cmd<23>
24
Fbc_Cmd<24>
25
Fbc_Cmd<25>
26
Fbc_Cmd<26>
27
Fbc_Cmd<27>
28
Fbc_Cmd<28>
29
Fbc_Cmd<29>
30
Fbc_Cmd<30>
31
Fbc_Cmd<31>
R661
60.4ohm R642
DNI
0402
1 %
FBC_CLK0 FBC_CLK0 FBC_CLK1 FBC_CLK1
FBC_WCK01 FBC_WCK01
FBC_WCK23 FBC_WCK23
FBC_WCK45 FBC_WCK45
FBC_WCK67 FBC_WCK67
3V3_PLL 3V3_PLL
C713
0.1uF
16V 10% X7R 0402 COMMON
1 %
FB_CLK FB_CLK FB_CLK FB_CLK
FB_WCK FB_WCK
FB_WCK FB_WCK
FB_WCK FB_WCK
FB_WCK FB_WCK
IN
FBC_CMD<0>
B3
GND
R672 10k
5 % 0402
FBC_CMD<1> FBC_CMD<17>
FBC_CMD<2> FBC_CMD<18>
COMMON
R640 10k
5 % 0402 COMMON
C E
GDDR5 CMD Mapping
CMD
CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6
10
CMD7
10
CMD8
10
CMD9
10
CMD10
10
CMD11
10
CMD12
10
CMD13
10
CMD14
10
CMD15
10
CMD16
10
CMD17
10
CMD18
10
CMD19
10
CMD20
10
CMD21
10
CMD22
11
CMD23
11
CMD24
11
CMD25
11
CMD26
11
CMD27
11
CMD28
11
CMD29
11
CMD30
11
CMD31
11 11 11 11 11 11 11
60.4ohm
DNI0402
OUT OUT OUT OUT
OUT OUT
OUT OUT
OUT OUT
OUT OUT
4,09,16,17,18,20,21
ASSEMBLY PAGE DETAIL
0..31 32..63
CAS* CKE* RST* RAS* A1_A9 A0_A10 A12_RFU ABI* A6_A11 A7_A8 WE* A5_BA1 A4_BA2 A2_BA0 A3_BA3 CS*
FBVDDQ
FBVDDQ
R637 10k
5 % 0402 COMMON
R675 10k
5 % 0402 COMMON
GND
BASE LEVEL GENERIC SCHEMATIC ONLY MEMORY: GPU Partition C/D
10 10 11 11
10 10
10 10
11 11
11 11
FBD_CMD<1> FBD_CMD<17>
FBD_CMD<2> FBD_CMD<18>
CAS* CKE* RST* RAS* A1_A9 A0_A10 A12_RFU ABI* A6_A11 A7_A8 WE* A5_BA1 A4_BA2 A2_BA0 A3_BA3 CS*
R704 10k
5 % 0402 COMMON
R690 10k
5 % 0402 COMMON
G1E
@digital.u_gpu_gb3b_256(sym_5):page9_i2031 BGA1745 COMMON
12
Fbd_D<0>
12
Fbd_D<1>
12
Fbd_D<2>
12
Fbd_D<3>
12
Fbd_D<4>
12
Fbd_D<5>
12
Fbd_D<6>
12
Fbd_D<7>
12
Fbd_D<8>
12
Fbd_D<9>
12
Fbd_D<10>
12
Fbd_D<11>
12
Fbd_D<12>
12
Fbd_D<13>
12
Fbd_D<14>
12
Fbd_D<15>
12
Fbd_D<16>
12
Fbd_D<17>
12
Fbd_D<18>
12
Fbd_D<19>
12
Fbd_D<20>
12
Fbd_D<21>
12
Fbd_D<22>
12
Fbd_D<23>
12
Fbd_D<24>
12
Fbd_D<25>
12
Fbd_D<26>
12
Fbd_D<27>
12
Fbd_D<28>
12
Fbd_D<29>
12
Fbd_D<30>
12
Fbd_D<31>
13
Fbd_D<32>
13
Fbd_D<33>
13
Fbd_D<34>
13
Fbd_D<35>
13
Fbd_D<36>
13
Fbd_D<37>
13
Fbd_D<38>
13
Fbd_D<39>
13
Fbd_D<40>
13
Fbd_D<41>
13
Fbd_D<42>
13
Fbd_D<43>
13
Fbd_D<44>
13
Fbd_D<45>
13
Fbd_D<46>
13
Fbd_D<47>
13
Fbd_D<48>
13
Fbd_D<49>
13
Fbd_D<50>
13
Fbd_D<51>
13
Fbd_D<52>
13
Fbd_D<53>
13
Fbd_D<54>
13
Fbd_D<55>
13
Fbd_D<56>
13
Fbd_D<57>
13
Fbd_D<58>
13
Fbd_D<59>
13
Fbd_D<60>
13
Fbd_D<61>
13
Fbd_D<62>
13
Fbd_D<63>
12 12 12 12 13 13 13 13
12 12 12 12 13 13 13 13
OUT OUT OUT OUT OUT OUT OUT OUT
BI BI BI BI BI BI BI BI
FBD_D<0>
0
FBD_D<1>
1
FBD_D<2>
2
FBD_D<3>
3
FBD_D<4>
4
FBD_D<5>
5
FBD_D<6>
6
FBD_D<7>
7
FBD_D<8>
8
FBD_D<9>
9
FBD_D<10>
10
FBD_D<11>
11
FBD_D<12>
12
FBD_D<13>
13
FBD_D<14>
14
FBD_D<15>
15
FBD_D<16>
16
FBD_D<17>
17
FBD_D<18>
18
FBD_D<19>
19
FBD_D<20>
20
FBD_D<21>
21
FBD_D<22>
22
FBD_D<23>
23
FBD_D<24>
24
FBD_D<25>
25
FBD_D<26>
26
FBD_D<27>
27
FBD_D<28>
28
FBD_D<29>
29
FBD_D<30>
30
FBD_D<31>
31
FBD_D<32>
32
FBD_D<33>
33
FBD_D<34>
34
FBD_D<35>
35
FBD_D<36>
36
FBD_D<37>
37
FBD_D<38>
38
FBD_D<39>
39
FBD_D<40>
40
FBD_D<41>
41
FBD_D<42>
42
FBD_D<43>
43
FBD_D<44>
44
FBD_D<45>
45
FBD_D<46>
46
FBD_D<47>
47
FBD_D<48>
48
FBD_D<49>
49
FBD_D<50>
50
FBD_D<51>
51
FBD_D<52>
52
FBD_D<53>
53
FBD_D<54>
54
FBD_D<55>
55
FBD_D<56>
56
FBD_D<57>
57
FBD_D<58>
58
FBD_D<59>
59
FBD_D<60>
60
FBD_D<61>
61
FBD_D<62>
62
FBD_D<63>
63
FBD_DBI<0>
0
FBD_DBI<1>
1
FBD_DBI<2>
2
FBD_DBI<3>
3
FBD_DBI<4>
4
FBD_DBI<5>
5
FBD_DBI<6>
6
FBD_DBI<7>
7
FBD_EDC<0>
0
FBD_EDC<1>
1
FBD_EDC<2>
2
FBD_EDC<3>
3
FBD_EDC<4>
4
FBD_EDC<5>
5
FBD_EDC<6>
6
FBD_EDC<7>
7
FBVDDQ
R708 10k
5 % 0402 COMMON
R691 10k
5 % 0402 COMMON
GND
5/21 FBD
AF7
FBD_D0
AF9
FBD_D1
AF6
FBD_D2
AF8
FBD_D3
AG7
FBD_D4
AG6
FBD_D5
AG9
FBD_D6
AG8
FBD_D7
AC5
FBD_D8
AA4
FBD_D9
AC4
AC3
AD4
AD2
AD5
AD1
R4
U3
U4
U5
V6
V5
Y4
Y5
Y6
Y7
Y8
AC9
AC7
AC6
AC8
AC10
H2
H4
H1
H3
F5
E2
E4
D3
J4
L5
J2
J1
J6
H5
L9
L8
U10
U7
U9
R7
R10
P10
P8
P9
P5
P6
P2
P1
M5
M6
M7
P7
AG10
FBD_DQM0
AA5
FBD_DQM1
U6
FBD_DQM2
AA8
FBD_DQM3
E3
FBD_DQM4
J5
FBD_DQM5
U8
FBD_DQM6
M4
FBD_DQM7
AG5
FBD_DQS_WP0
AD7
FBD_DQS_WP1
V8
FBD_DQS_WP2
AA7
FBD_DQS_WP3
F4
FBD_DQS_WP4
L7
FBD_DQS_WP5
R8
FBD_DQS_WP6
P3
FBD_DQS_WP7
AG4
FBD_DQS_RN0
AD6
FBD_DQS_RN1
V7
FBD_DQS_RN2
AA6
FBD_DQS_RN3
F3
FBD_DQS_RN4
L6
FBD_DQS_RN5
R9
FBD_DQS_RN6
P4
FBD_DQS_RN7
FBD_CMD0 FBD_CMD1 FBD_CMD2 FBD_CMD3 FBD_CMD4 FBD_CMD5 FBD_CMD6 FBD_CMD7 FBD_CMD8
FBD_CMD9 FBD_CMD10 FBD_CMD11 FBD_CMD12 FBD_CMD13 FBD_CMD14 FBD_CMD15 FBD_CMD16 FBD_CMD17 FBD_CMD18 FBD_CMD19 FBD_CMD20 FBD_CMD21 FBD_CMD22 FBD_CMD23 FBD_CMD24 FBD_CMD25 FBD_CMD26 FBD_CMD27 FBD_CMD28 FBD_CMD29 FBD_CMD30 FBD_CMD31 FBD_CMD32 FBD_CMD33 FBD_CMD34 FBD_CMD35
FBD_CLK0 FBD_CLK0 FBD_CLK1 FBD_CLK1
FBD_WCK01 FBD_WCK01
FBD_WCKB01 FBD_WCKB01
FBD_WCK23 FBD_WCK23
FBD_WCKB23 FBD_WCKB23
FBD_WCK45 FBD_WCK45
FBD_WCKB45 FBD_WCKB45
FBD_WCK67 FBD_WCK67
FBD_WCKB67 FBD_WCKB67
FBD_PLL_AVDD
FDBA
FBD_CMD<0>
AG3
FBD_CMD<1>
AG2
FBD_CMD<2>
AG1
FBD_CMD<3>
AF3
FBD_CMD<4>
AF1
FBD_CMD<5>
AF2
FBD_CMD<6>
AC1
FBD_CMD<7>
AC2
FBD_CMD<8>
AA2
FBD_CMD<9>
AA1
FBD_CMD<10>
AA3
FBD_CMD<11>
Y1
FBD_CMD<12>
Y2
FBD_CMD<13>
Y3
FBD_CMD<14>
V3
FBD_CMD<15>
V2
FBD_CMD<16>
C2
FBD_CMD<17>
D1
FBD_CMD<18>
D2
FBD_CMD<19>
E1
FBD_CMD<20>
F2
FBD_CMD<21>
F1
FBD_CMD<22>
L2
FBD_CMD<23>
L1
FBD_CMD<24>
M3
FBD_CMD<25>
M1
FBD_CMD<26>
M2
FBD_CMD<27>
R3
FBD_CMD<28>
R1
FBD_CMD<29>
R2
FBD_CMD<30>
U2
FBD_CMD<31>
U1 V1 V4
FBD_DEBUG0
AD3
FBD_DEBUG1
J3
FBD_CLK0
V9
FBD_CLK0*
V10
FBD_CLK1
R6
FBD_CLK1*
R5
FBD_WCK01
AF4
FBD_WCK01*
AF5 AD8 AD9
FBD_WCK23
Y9
FBD_WCK23*
Y10 AA9 AA10
FBD_WCK45
H6
FBD_WCK45*
H7 J8 J7
FBD_WCK67
M8
FBD_WCK67*
M9 L3 L4
AA11
GND
MSI
MSI
MSI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
G
Fbd_Cmd<0> Fbd_Cmd<1> Fbd_Cmd<2> Fbd_Cmd<3> Fbd_Cmd<4> Fbd_Cmd<5> Fbd_Cmd<6> Fbd_Cmd<7> Fbd_Cmd<8> Fbd_Cmd<9> Fbd_Cmd<10> Fbd_Cmd<11> Fbd_Cmd<12> Fbd_Cmd<13> Fbd_Cmd<14> Fbd_Cmd<15> Fbd_Cmd<16> Fbd_Cmd<17> Fbd_Cmd<18> Fbd_Cmd<19> Fbd_Cmd<20> Fbd_Cmd<21> Fbd_Cmd<22> Fbd_Cmd<23> Fbd_Cmd<24> Fbd_Cmd<25> Fbd_Cmd<26> Fbd_Cmd<27> Fbd_Cmd<28> Fbd_Cmd<29> Fbd_Cmd<30> Fbd_Cmd<31>
60.4ohm
DNI0402
1 %
MS-V317
MS-V317
MS-V317
R668
FB_CLK FB_CLK FB_CLK FB_CLK
FB_WCK FB_WCK
FB_WCK FB_WCK
FB_WCK FB_WCK
FB_WCK FB_WCK
4,09,16,17,18,20,21
12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13
FBVDDQ
13
60.4ohm
DNI0402
1 %
OUT OUT OUT OUT
OUT OUT
OUT OUT
OUT OUT
OUT OUT
Sheet ofDate:
09 37
Sheet ofDate:
09 37
Sheet ofDate:
09 37
9 OF 37
PAGE DATE
04-AUG-2014
H
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R669
FBD_CLK0 FBD_CLK0 FBD_CLK1 FBD_CLK1
FBD_WCK01 FBD_WCK01
FBD_WCK23 FBD_WCK23
FBD_WCK45 FBD_WCK45
FBD_WCK67 FBD_WCK67
IN
C766
0.1uF
16V 10% X7R 0402 COMMON
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
9: MEMORY: GPU Partition C/D
9: MEMORY: GPU Partition C/D
9: MEMORY: GPU Partition C/D
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
600-1G401-BASE-QS1
PG401-A02 A
1
2
12 12 13 13
3
12 12
12 12
13 13
13 13
4
1.0
1.0
1.0
5
Page 10
A B C D E F G H
Page10: MEMORY: FBC Partition 31..0
1
GND
M3C
@memory.u_mem_sd_ddr5_x32(sym_7):page10_i381 BGA170_MIRR COMMON
Mirrored
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
SOE*/MF_VDD
add 1k to VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
FBVDDQ
FBC_MF1_A
R673
J1 C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3
1k
0402 COMMON
1 %
FBVDDQ
M3B
@memory.u_mem_sd_ddr5_x32(sym_5):page10_i380 BGA170_MIRR
M3D
@memory.u_mem_sd_ddr5_x32(sym_2):page10_i378 BGA170_MIRR COMMON
MIRRORED
2
09
Fbc_D<0>
09
Fbc_D<1>
09
Fbc_D<2>
09
Fbc_D<3>
09
Fbc_D<4>
09
Fbc_D<5>
09
Fbc_D<6>
09
Fbc_D<7>
09 09
09
Fbc_D<8>
09
Fbc_D<9>
09
Fbc_D<10>
09
Fbc_D<11>
09
Fbc_D<12>
09
Fbc_D<13>
09
Fbc_D<14>
09
Fbc_D<15>
09 09
09 09
3
FBC_D<0>
0
FBC_D<1>
1
FBC_D<2>
2
FBC_D<3>
3
FBC_D<4>
4
FBC_D<5>
5
FBC_D<6>
6
FBC_D<7>
7
FBC_EDC<0>
BI
FBC_DBI<0>
BI
FBC_D<8>
8
FBC_D<9>
9
FBC_D<10>
10
FBC_D<11>
11
FBC_D<12>
12
FBC_D<13>
13
FBC_D<14>
14
FBC_D<15>
15
FBC_EDC<1>
BI
FBC_DBI<1>
BI
FBC_WCK01
IN
FBC_WCK01*
IN
x16x32
V4
DQ0
NC
09
V2
DQ1
NC
T4
DQ2
NC
T2
DQ3
NC
N4
DQ4
NC
N2
DQ5
NC
M4
DQ6
NC
M2
DQ7
NC
R2
EDC0
NC
P2
DBI0
NC
V10
VREFD
V11
DQ8
V13
DQ9
T11
DQ10
T13
DQ11
N11
DQ12
N13
DQ13
M11
DQ14
M13
DQ15
R13
EDC1
P13
DBI1
P4
WCK01
P5
WCK01
Fbc_D<16>
09
Fbc_D<17>
09
Fbc_D<18>
09
Fbc_D<19>
09
Fbc_D<20>
09
Fbc_D<21>
09
Fbc_D<22>
09
Fbc_D<23>
09 09
FBC_VREFD
09
Fbc_D<24>
09
Fbc_D<25>
09
Fbc_D<26>
09
Fbc_D<27>
09
Fbc_D<28>
09
Fbc_D<29>
09
Fbc_D<30>
09
Fbc_D<31>
09 09
09 09
FBC_D<16>
16
FBC_D<17>
17
FBC_D<18>
18
FBC_D<19>
19
FBC_D<20>
20
FBC_D<21>
21
FBC_D<22>
22
FBC_D<23>
23
FBC_EDC<2>
BI
FBC_DBI<2>
BI
FBC_D<24>
24
FBC_D<25>
25
FBC_D<26>
26
FBC_D<27>
27
FBC_D<28>
28
FBC_D<29>
29
FBC_D<30>
30
FBC_D<31>
31
FBC_EDC<3>
BI
FBC_DBI<3>
BI
FBC_WCK23
IN
FBC_WCK23*
IN
5,07,12,23
M3A
@memory.u_mem_sd_ddr5_x32(sym_4):page10_i379 BGA170_MIRR COMMON
MIRRORED
x32 x16
A11
DQ16
NC
A13
DQ17
NC
B11
DQ18
NC
B13
DQ19
NC
E11
DQ20
NC
E13
DQ21
NC
F11
DQ22
NC
F13
DQ23
NC
C13
EDC2
GND
D13
DBI2
NC
VREFD
A4
DQ24
A2
DQ25
B4
DQ26
B2
DQ27
E4
DQ28
E2
DQ29
F4
DQ30
F2
DQ31
C2
EDC3
D2
DBI3
D4
WCK23
D5
WCK23
GPIO10_FBVREF_SEL
IN
A10
GND GND
C76 820pF
50V 10% X7R 0402 COMMON
0.140A1.05V
1G1D1S
FBVDDQ
R82 549ohm
1 % 0402 COMMON
R84
1.33k
1 % 0402 COMMON
D
Q14
@discrete.q_fet_n_enh(sym_2):page10_i328 SOT23_1G1D1S
G
1
COMMON
S
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
FBC_CMD<3>
09
C88 820pF
50V 10% X7R 0402 COMMON
3
FBC_CMD<0>
09
0
FBC_CMD<10>
09
10
FBC_CMD<15>
09
15
FBC_CMD<7>
09
7
FBC_CMD<5>
09
5
FBC_CMD<4>
09
4
FBC_CMD<13>
09
13
FBC_CMD<14>
09
14
FBC_CMD<12>
09
12
FBC_CMD<11>
09
11
FBC_CMD<8>
09
8
FBC_CMD<9>
09
9
FBC_CMD<6>
09
6
FBC_CMD<2>
09
2
FBC_CMD<1>
09
1
R659
40.2ohm
1 % 0402 COMMON
C772 10nF
16V 10% X7R 0402 COMMON
GND
OUT
FBC_VREFC
R657
0402 COMMON
R660
0402 COMMON
FBC_ZQ_1_B
121ohm
1 %
FBC_SEN_1
1k
1 %
GND
Fbc_Cmd<3> Fbc_Cmd<0> Fbc_Cmd<10> Fbc_Cmd<15>
Fbc_Cmd<7> Fbc_Cmd<5>
Fbc_Cmd<4> Fbc_Cmd<13> Fbc_Cmd<14> Fbc_Cmd<12> Fbc_Cmd<11> Fbc_Cmd<8>
FBC_VREFD
OUT
R81 931ohm
1 % 0402 COMMON
3
1.05V
0.350
2
09 09
FBC_VREF_Q
11
FBVDDQ
R77 549ohm
1 % 0402 COMMON
R78
1.33k
1 % 0402 COMMON
GND
Fbc_Cmd<9> Fbc_Cmd<6>
Fbc_Cmd<2> Fbc_Cmd<1>
FBC_CLK0
IN
FBC_CLK0*
IN
R658
40.2ohm
1 % 0402 COMMON
FBC_CLK0_RC
0.350 1.05V
R79 931ohm
1 % 0402 COMMON
GND
COMMON
L3
RAS
G3
CAS
G12
WE
L12
CS
J4
ABI
K4
A0_A10
K5
A1_A9
K11
A2_BA0
K10
A3_BA3
H11
A4_BA2
H10
A5_BA1
H5
A6_A11
H4
A7_A8
J5
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
11
J14
VREFC
J13
ZQ
J10
SEN
4
1
FBVDDQ
2
3
4
FBVDDQ
C814
C821 10uF
6.3V 20% X5R 0805LP COMMON
FBVDDQ
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C799 10uF
6.3V 20% X5R 0805LP COMMON
4.7uF
6.3V 20% X5R 0603 COMMON
C83
4.7uF
6.3V 20% X5R 0603 COMMON
C780
4.7uF
6.3V 20% X5R 0603 COMMON
C74
4.7uF
6.3V 20% X5R 0603 COMMON
C784 1uF
6.3V 10% X5R 0402 COMMON
C81 1uF
6.3V 10% X5R 0402 COMMON
C813 1uF
6.3V 10% X5R 0402 COMMON
C82 1uF
6.3V 10% X5R 0402 COMMON
C785 1uF
6.3V 10% X5R 0402 COMMON
C79 1uF
6.3V 10% X5R 0402 COMMON
C786 1uF
6.3V 10% X5R 0402 COMMON
C75 1uF
6.3V 10% X5R 0402 COMMON
C811 1uF
6.3V 10% X5R 0402 COMMON
GND
C812 1uF
6.3V 10% X5R 0402 COMMON
GND
C912 47uF
4V 20% X5R 0805LP DNI
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY MEMORY: FBC[31:0]
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
10: MEMORY: FBC Partition 31..0
10: MEMORY: FBC Partition 31..0
10: MEMORY: FBC Partition 31..0
600-1G401-BASE-QS1
PG401-A02 A
1.0
1.0
1.0
Sheet ofDate:
10 37
Sheet ofDate:
10 37
Sheet ofDate:
10 37
10 OF 37
PAGE DATE
04-AUG-2014
H
5
Page 11
A B C D E F G H
Page11: MEMORY: FBC Partition 63..32
1
GND
M4C
@memory.u_mem_sd_ddr5_x32(sym_6):page11_i109 BGA170 COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
M4B
@memory.u_mem_sd_ddr5_x32(sym_5):page11_i55 BGA170 COMMON
FBC_VREFC
FBC_ZQ_2B
FBC_SEN_2
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
J13
ZQ
J10
SEN
FBC_CMD<19>
09
C753 10nF
16V 10% X7R 0402 COMMON
GND
R649 121ohm
R646 1k
19
FBC_CMD<16>
09
16
FBC_CMD<26>
09
26
FBC_CMD<31>
09
31
FBC_CMD<23>
09
23
FBC_CMD<21>
09
21
FBC_CMD<20>
09
20
FBC_CMD<29>
09
29
FBC_CMD<30>
09
30
FBC_CMD<28>
09
28
FBC_CMD<27>
09
27
FBC_CMD<24>
09
24
FBC_CMD<25>
09
25
FBC_CMD<22>
09
22
FBC_CMD<18>
09
18
FBC_CMD<17>
09
17
R650
40.2ohm
1 % 0402 COMMON
COMMON0402
1 %
COMMON0402
1 %
Fbc_Cmd<19> Fbc_Cmd<16> Fbc_Cmd<26> Fbc_Cmd<31>
Fbc_Cmd<23> Fbc_Cmd<21>
IN IN
C80 820pF
50V 10% X7R 0402 COMMON
GND GND
Fbc_Cmd<20> Fbc_Cmd<29> Fbc_Cmd<30> Fbc_Cmd<28> Fbc_Cmd<27> Fbc_Cmd<24> Fbc_Cmd<25> Fbc_Cmd<22>
Fbc_Cmd<18> Fbc_Cmd<17>
FBC_CLK1 FBC_CLK1*
R651
40.2ohm
1 % 0402 COMMON
FBC_CLK1_CM
2
09
Fbc_D<32>
09
Fbc_D<33>
09
Fbc_D<34>
09
Fbc_D<35>
09
Fbc_D<36>
09
Fbc_D<37>
09
Fbc_D<38>
09
Fbc_D<39>
09 09
09
Fbc_D<40>
09
Fbc_D<41>
09
Fbc_D<42>
09
Fbc_D<43>
09
Fbc_D<44>
09
Fbc_D<45>
09
Fbc_D<46>
09
3
Fbc_D<47>
09 09
09 09
FBC_D<32>
32
FBC_D<33>
33
FBC_D<34>
34
FBC_D<35>
35
FBC_D<36>
36
FBC_D<37>
37
FBC_D<38>
38
FBC_D<39>
39
FBC_EDC<4>
BI
FBC_DBI<4>
BI
FBC_D<40>
40
FBC_D<41>
41
FBC_D<42>
42
FBC_D<43>
43
FBC_D<44>
44
FBC_D<45>
45
FBC_D<46>
46
FBC_D<47>
47
FBC_EDC<5>
BI
FBC_DBI<5>
BI
FBC_WCK45
IN
FBC_WCK45*
IN
M4D
@memory.u_mem_sd_ddr5_x32(sym_1):page11_i11 BGA170 COMMON
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0
VREFD
x16
x32
A11
DQ8
NC
A13
DQ9
NC
B11
DQ10
NC
B13
DQ11
NC
E11
DQ12
NC
E13
DQ13
NC
F11
DQ14
NC
F13
DQ15
NC
C13
EDC1
GND
D13
DBI1
NC
D4
WCK01
D5
WCK01
09
Fbc_D<48>
09
Fbc_D<49>
09
Fbc_D<50>
09
Fbc_D<51>
09
Fbc_D<52>
09
Fbc_D<53>
09
Fbc_D<54>
09
Fbc_D<55>
09 09
FBC_VREFD FBC_VREFD
A10
IN
09 09
09 09
10
09
Fbc_D<56>
09
Fbc_D<57>
09
Fbc_D<58>
09
Fbc_D<59>
09
Fbc_D<60>
09
Fbc_D<61>
09
Fbc_D<62>
09
Fbc_D<63>
FBC_D<48>
48
FBC_D<49>
49
FBC_D<50>
50
FBC_D<51>
51
FBC_D<52>
52
FBC_D<53>
53
FBC_D<54>
54
FBC_D<55>
55
FBC_EDC<6>
BI
FBC_DBI<6>
BI
FBC_D<56>
56
FBC_D<57>
57
FBC_D<58>
58
FBC_D<59>
59
FBC_D<60>
60
FBC_D<61>
61
FBC_D<62>
62
FBC_D<63>
63
FBC_EDC<7>
BI
FBC_DBI<7>
BI
FBC_WCK67
IN
FBC_WCK67*
IN
M4A
@memory.u_mem_sd_ddr5_x32(sym_3):page11_i51 BGA170 COMMON
NORMAL
V11
DQ16
V13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2
VREFD
x16
x32
V4
DQ24
NC
V2
DQ25
NC
T4
DQ26
NC
T2
DQ27
NC
N4
DQ28
NC
N2
DQ29
NC
M4
DQ30
NC
M2
DQ31
NC
R2
EDC3
NC
P2
DBI3
NC
P4
WCK23
P5
WCK23
09 09
V10
C94 820pF
50V 10% X7R 0402 COMMON
GND
10
IN
R638
0402 COMMON
1 %
FBC_MF2_A
1k
1
FBVDDQ
2
FBVDDQ
3
4
FBVDDQ
C760
C678
C745
C749
C680
C679
C681
C672
10uF
4.7uF
4.7uF
1uF
1uF
1uF
6.3V
6.3V 20% X5R 0805LP COMMON
FBVDDQ
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C728 10uF
6.3V 20% X5R 0805LP COMMON
20% X5R 0603 COMMON
C86
4.7uF
6.3V 20% X5R 0603 COMMON
6.3V 20% X5R 0603 COMMON
C97
4.7uF
6.3V 20% X5R 0603 COMMON
6.3V 10% X5R 0402 COMMON
C96 1uF
6.3V 10% X5R 0402 COMMON
6.3V 10% X5R 0402 COMMON
C89 1uF
6.3V 10% X5R 0402 COMMON
6.3V 10% X5R 0402 COMMON
C90 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C87 1uF
6.3V 10% X5R 0402 COMMON
C95
1uF
1uF
6.3V
6.3V 10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
C911 47uF
4V 20% X5R 0805LP DNI
GND
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: FBC[63:32]
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
11: MEMORY: FBC Partition 63..32
11: MEMORY: FBC Partition 63..32
11: MEMORY: FBC Partition 63..32
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
600-1G401-BASE-QS1
PG401-A02 A
1.0
1.0
1.0
Sheet ofDate:
11 37
Sheet ofDate:
11 37
Sheet ofDate:
11 37
11 OF 37
PAGE DATE
04-AUG-2014
H
5
Page 12
A B C D E F G H
Page12: MEMORY: FBD Partition 31..0
1
GND
M2C
@memory.u_mem_sd_ddr5_x32(sym_7):page12_i381 BGA170_MIRR COMMON
Mirrored
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
SOE*/MF_VDD
add 1k to VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
FBVDDQ
FBD_MF1_A
J1 C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3
R705 1k
1 %
FBVDDQ
COMMON0402
M2B
@memory.u_mem_sd_ddr5_x32(sym_5):page12_i380 BGA170_MIRR
M2D
@memory.u_mem_sd_ddr5_x32(sym_2):page12_i378 BGA170_MIRR COMMON
MIRRORED
2
09
Fbd_D<0>
09
Fbd_D<1>
09
Fbd_D<2>
09
Fbd_D<3>
09
Fbd_D<4>
09
Fbd_D<5>
09
Fbd_D<6>
09
Fbd_D<7>
09 09
09
Fbd_D<8>
09
Fbd_D<9>
09
Fbd_D<10>
09
Fbd_D<11>
09
Fbd_D<12>
09
Fbd_D<13>
09
Fbd_D<14>
09
Fbd_D<15>
09 09
09 09
FBD_D<0>
0
FBD_D<1>
1
FBD_D<2>
2
FBD_D<3>
3
FBD_D<4>
4
FBD_D<5>
5
FBD_D<6>
6
FBD_D<7>
7
FBD_EDC<0>
BI
FBD_DBI<0>
BI
FBD_D<8>
8
FBD_D<9>
9
FBD_D<10>
10
FBD_D<11>
11
FBD_D<12>
12
FBD_D<13>
13
FBD_D<14>
14
FBD_D<15>
15 31
FBD_EDC<1>
BI
FBD_DBI<1>
BI
FBD_WCK01
IN
FBD_WCK01*
IN
x16x32
V4
DQ0
NC
09
V2
DQ1
NC
T4
DQ2
NC
T2
DQ3
NC
N4
DQ4
NC
N2
DQ5
NC
M4
DQ6
NC
M2
DQ7
NC
R2
EDC0
NC
P2
DBI0
NC
V10
VREFD
V11
DQ8
V13
DQ9
T11
DQ10
T13
DQ11
N11
DQ12
N13
DQ13
M11
DQ14
M13
DQ15
R13
EDC1
P13
DBI1
P4
WCK01
P5
WCK01
Fbd_D<16>
09
Fbd_D<17>
09
Fbd_D<18>
09
Fbd_D<19>
09
Fbd_D<20>
09
Fbd_D<21>
09
Fbd_D<22>
09
Fbd_D<23>
09 09
FBD_VREFD
09
Fbd_D<24>
09
Fbd_D<25>
09
Fbd_D<26>
09
Fbd_D<27>
09
Fbd_D<28>
09
Fbd_D<29>
09
Fbd_D<30>
09
Fbd_D<31>
09 09
09 09
FBD_D<16>
16
FBD_D<17>
17
FBD_D<18>
18
FBD_D<19>
19
FBD_D<20>
20
FBD_D<21>
21
FBD_D<22>
22
FBD_D<23>
23
FBD_EDC<2>
BI
FBD_DBI<2>
BI
FBD_D<24>
24
FBD_D<25>
25
FBD_D<26>
26
FBD_D<27>
27
FBD_D<28>
28
FBD_D<29>
29
FBD_D<30>
30
FBD_D<31>
FBD_EDC<3>
BI
FBD_DBI<3>
BI
FBD_WCK23
IN
FBD_WCK23*
IN
3
5,07,10,23
M2A
@memory.u_mem_sd_ddr5_x32(sym_4):page12_i379 BGA170_MIRR COMMON
MIRRORED
x32 x16
A11
DQ16
NC
A13
DQ17
NC
B11
DQ18
NC
B13
DQ19
NC
E11
DQ20
NC
E13
DQ21
NC
F11
DQ22
NC
F13
DQ23
NC
C13
EDC2
GND
D13
DBI2
NC
VREFD
A4
DQ24
A2
DQ25
B4
DQ26
B2
DQ27
E4
DQ28
E2
DQ29
F4
DQ30
F2
DQ31
C2
EDC3
D2
DBI3
D4
WCK23
D5
WCK23
GPIO10_FBVREF_SEL
IN
1.05V 0.140A
A10
GND GND
C55 820pF
50V 10% X7R 0402 COMMON
FBVDDQ
1G1D1S
G
1
R58 549ohm
1 % 0402 COMMON
FBD_VREFD
R57
1.33k
1 % 0402 COMMON
3
D
Q11
@discrete.q_fet_n_enh(sym_2):page12_i328 SOT23_1G1D1S COMMON
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
R59 931ohm
1 % 0402 COMMON
FBD_CMD<3>
09
C68 820pF
50V 10% X7R 0402 COMMON
3
FBD_CMD<0>
09
0
FBD_CMD<10>
09
10
FBD_CMD<15>
09
15
FBD_CMD<7>
09
7
FBD_CMD<5>
09
5
FBD_CMD<4>
09
4
FBD_CMD<13>
09
13
FBD_CMD<14>
09
14
FBD_CMD<12>
09
12
FBD_CMD<11>
09
11
FBD_CMD<8>
09
8
FBD_CMD<9>
09
9
FBD_CMD<6>
09
6
FBD_CMD<2>
09
2
FBD_CMD<1>
09
1
R692
40.2ohm
1 % 0402 COMMON
C844 10nF
16V 10% X7R 0402 COMMON
GND
OUT
FBD_VREFC
R699 121ohm
R713 1k
FBD_ZQ_1_B
COMMON0402
1 %
FBD_SEN_1
COMMON0402
1 %
GND
Fbd_Cmd<3> Fbd_Cmd<0> Fbd_Cmd<10> Fbd_Cmd<15>
Fbd_Cmd<7> Fbd_Cmd<5>
Fbd_Cmd<4> Fbd_Cmd<13> Fbd_Cmd<14> Fbd_Cmd<12> Fbd_Cmd<11> Fbd_Cmd<8> Fbd_Cmd<9> Fbd_Cmd<6>
Fbd_Cmd<2> Fbd_Cmd<1>
FBD_CLK0
IN
FBD_CLK0*
IN
R694
40.2ohm
1 % 0402 COMMON
FBD_CLK0_RC
0.350 1.05V
R69 931ohm
1 % 0402 COMMON
GND
09 09
FBD_VREF_Q
13
FBVDDQ
R70 549ohm
1 % 0402 COMMON
R71
1.33k
1 % 0402 COMMON
GND
OUT
1.05V
0.350
COMMON
L3
RAS
G3
CAS
G12
WE
L12
CS
J4
ABI
K4
A0_A10
K5
A1_A9
K11
A2_BA0
K10
A3_BA3
H11
A4_BA2
H10
A5_BA1
H5
A6_A11
H4
A7_A8
J5
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
13
J14
VREFC
J13
ZQ
J10
SEN
1
FBVDDQ
2
3
4
FBVDDQ
C830
C831
C854
C841
C848
10uF
4.7uF
4.7uF
1uF
6.3V
6.3V
20%
20%
X5R
X5R
0805LP
0603
COMMON
COMMON
FBVDDQ
C62
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C849 10uF
6.3V 20% X5R 0805LP COMMON
4.7uF
6.3V 20% X5R 0603 COMMON
6.3V 20% X5R 0603 COMMON
C60
4.7uF
6.3V 20% X5R 0603 COMMON
6.3V 10% X5R 0402 COMMON
C66 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C64 1uF
6.3V 10% X5R 0402 COMMON
C840 1uF
6.3V 10% X5R 0402 COMMON
C70 1uF
6.3V 10% X5R 0402 COMMON
C835 1uF
6.3V 10% X5R 0402 COMMON
C72 1uF
6.3V 10% X5R 0402 COMMON
GND
C855 1uF
6.3V 10% X5R 0402 COMMON
C851 1uF
6.3V 10% X5R 0402 COMMON
GND
C910 47uF
4V 20% X5R 0805LP DNI
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: FBD[31:0]
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
12: MEMORY: FBD Partition 31..0
12: MEMORY: FBD Partition 31..0
12: MEMORY: FBD Partition 31..0
600-1G401-BASE-QS1
PG401-A02 A
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
12 37
12 37
12 37
PAGE DATE
H
12 OF 37
04-AUG-2014
1.0
1.0
1.0
5
Page 13
A B C D E F G H
Page13: MEMORY: FBD Partition 63..32
1
GND
M1C
@memory.u_mem_sd_ddr5_x32(sym_6):page13_i109 BGA170 COMMON
Normal
J1
MF_VSS/SOE*
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
V1
VSSQ
V12
VSSQ
V14
VSSQ
V3
VSSQ
C10
VDD
C5
VDD
D11
VDD
G1
VDD
G11
VDD
G14
VDD
G4
VDD
L1
VDD
L11
VDD
L14
VDD
L4
VDD
P11
VDD
R10
VDD
R5
VDD
B1
VDDQ
B12
VDDQ
B14
VDDQ
B3
VDDQ
D1
VDDQ
D12
VDDQ
D14
VDDQ
D3
VDDQ
E10
VDDQ
E5
VDDQ
F1
VDDQ
F12
VDDQ
F14
VDDQ
F3
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
K12
VDDQ
K3
VDDQ
L13
VDDQ
L2
VDDQ
M1
VDDQ
M12
VDDQ
M14
VDDQ
M3
VDDQ
N10
VDDQ
N5
VDDQ
P1
VDDQ
P12
VDDQ
P14
VDDQ
P3
VDDQ
T1
VDDQ
T12
VDDQ
T14
VDDQ
T3
VDDQ
M1B
@memory.u_mem_sd_ddr5_x32(sym_5):page13_i55 BGA170 COMMON
FBD_VREFC
FBD_SEN_2
G3
RAS
L3
CAS
L12
WE
G12
CS
J4
ABI
H4
A0_A10
H5
A1_A9
H11
A2_BA0
H10
A3_BA3
K11
A4_BA2
K10
A5_BA1
K5
A6_A11
K4
A7_A8
J5
J2
RESET
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
J14
VREFC
J13
ZQ
J10
SEN
FBD_CMD<19>
09
Fbd_Cmd<19> Fbd_Cmd<16> Fbd_Cmd<26> Fbd_Cmd<31>
Fbd_Cmd<23>
IN IN
C67 820pF
50V 10% X7R 0402 COMMON
GND GND
Fbd_Cmd<21> Fbd_Cmd<20> Fbd_Cmd<29> Fbd_Cmd<30> Fbd_Cmd<28> Fbd_Cmd<27> Fbd_Cmd<24> Fbd_Cmd<25> Fbd_Cmd<22>
Fbd_Cmd<18> Fbd_Cmd<17>
FBD_CLK1 FBD_CLK1*
R693
40.2ohm
1 % 0402 COMMON
FBD_CLK1_CM
2
09
Fbd_D<32>
09
Fbd_D<33>
09
Fbd_D<34>
09
Fbd_D<35>
09
Fbd_D<36>
09
Fbd_D<37>
09
Fbd_D<38>
09
Fbd_D<39>
09 09
09
Fbd_D<40>
09
Fbd_D<41>
09
Fbd_D<42>
09
Fbd_D<43>
09
Fbd_D<44>
09
Fbd_D<45>
09
Fbd_D<46>
09
Fbd_D<47>
09
3
09
09 09
FBD_D<32>
32
FBD_D<33>
33
FBD_D<34>
34
FBD_D<35>
35
FBD_D<36>
36
FBD_D<37>
37
FBD_D<38>
38
FBD_D<39>
39
FBD_EDC<4>
BI
FBD_DBI<4>
BI
FBD_D<40>
40
FBD_D<41>
41
FBD_D<42>
42
FBD_D<43>
43
FBD_D<44>
44
FBD_D<45>
45
FBD_D<46>
46
FBD_D<47>
47
FBD_EDC<5>
BI
FBD_DBI<5>
BI
FBD_WCK45
IN
FBD_WCK45*
IN
M1D
@memory.u_mem_sd_ddr5_x32(sym_1):page13_i11 BGA170 COMMON
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0
VREFD
x16
x32
A11
DQ8
NC
A13
DQ9
NC
B11
DQ10
NC
B13
DQ11
NC
E11
DQ12
NC
E13
DQ13
NC
F11
DQ14
NC
F13
DQ15
NC
C13
EDC1
GND
D13
DBI1
NC
D4
WCK01
D5
WCK01
09
Fbd_D<48>
09
Fbd_D<49>
09
Fbd_D<50>
09
Fbd_D<51>
09
Fbd_D<52>
09
Fbd_D<53>
09
Fbd_D<54>
09
Fbd_D<55>
09 09
FBD_VREFD FBD_VREFD
A10
IN
09 09
12
09
Fbd_D<56>
09
Fbd_D<57>
09
Fbd_D<58>
09
Fbd_D<59>
09
Fbd_D<60>
09
Fbd_D<61>
09
Fbd_D<62>
09
Fbd_D<63>
09 09
FBD_D<48>
48
FBD_D<49>
49
FBD_D<50>
50
FBD_D<51>
51
FBD_D<52>
52
FBD_D<53>
53
FBD_D<54>
54
FBD_D<55>
55
FBD_EDC<6>
BI
FBD_DBI<6>
BI
FBD_D<56>
56
FBD_D<57>
57
FBD_D<58>
58
FBD_D<59>
59
FBD_D<60>
60
FBD_D<61>
61
FBD_D<62>
62
FBD_D<63>
63
FBD_EDC<7>
BI
FBD_DBI<7>
BI
FBD_WCK67
IN
FBD_WCK67*
IN
M1A
@memory.u_mem_sd_ddr5_x32(sym_3):page13_i51 BGA170 COMMON
NORMAL
V11
DQ16
V13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2
VREFD
x16
x32
V4
DQ24
V2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3
P4
WCK23
P5
WCK23
V10
NC NC NC NC NC NC NC NC
NC NC
09 09
C54 820pF
50V 10% X7R 0402 COMMON
GND
12
IN
19
FBD_CMD<16>
09
16
FBD_CMD<26>
09
26
FBD_CMD<31>
09
31
FBD_CMD<23>
09
23
FBD_CMD<21>
09
21
FBD_CMD<20>
09
20
FBD_CMD<29>
09
29
FBD_CMD<30>
09
30
FBD_CMD<28>
09
28
FBD_CMD<27>
09
27
FBD_CMD<24>
09
24
FBD_CMD<25>
09
25
FBD_CMD<22>
09
22
FBD_CMD<18>
09
18
FBD_CMD<17>
09
17
R695
40.2ohm
1 % 0402 COMMON
C845 10nF
16V 10% X7R 0402 COMMON
GND
FBD_ZQ_2B
R698
121ohm
COMMON0402
1 %
R712
1k
COMMON0402
1 %
R700 1k
0402 COMMON
1 %
FBD_MF2_A
1
FBVDDQ
2
FBVDDQ
3
4
FBVDDQ
C853
C828
C852
C847
C839
C834
C838
C65
10uF
4.7uF
4.7uF
1uF
6.3V 20% X5R 0603 COMMON
C59
4.7uF
6.3V 20% X5R 0603 COMMON
6.3V 10% X5R 0402 COMMON
C61 1uF
6.3V 10% X5R 0402 COMMON
6.3V
6.3V 20%
20% X5R
X5R 0603
0805LP
COMMON
COMMON
FBVDDQ
C826
C56
10uF
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
6.3V
20% X5R 0805LP COMMON
4.7uF
6.3V 20% X5R 0603 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C63 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C69 1uF
6.3V 10% X5R 0402 COMMON
1uF
6.3V 10% X5R 0402 COMMON
C71 1uF
6.3V 10% X5R 0402 COMMON
C836
1uF
1uF
6.3V
6.3V 10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
C909 47uF
4V 20% X5R 0805LP DNI
GND
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: FBD[63:32]
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
13: MEMORY: FBD Partition 63..32
13: MEMORY: FBD Partition 63..32
13: MEMORY: FBD Partition 63..32
600-1G401-BASE-QS1
PG401-A02 A
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
13 37
13 37
13 37
PAGE DATE
H
13 OF 37
04-AUG-2014
1.0
1.0
1.0
5
Page 14
A B C D E F G H
Page14: GPU PWR and GND
G1F
@digital.u_gpu_gb3b_256(sym_16):page14_i68 BGA1745 COMMON
16/21 GND_1/2
A2
GND
A3
GND
A47
GND
A48
1
2
3
4
5
GND
AA15
GND
AA17
GND
AA19
GND
AA21
GND
AA23
GND
AA25
GND
AA27
GND
AA29
GND
AA31
GND
AB11
GND
AB14
GND
AB16
GND
AB18
GND
AB2
GND
AB20
GND
AB22
GND
AB24
GND
AB26
GND
AB28
GND
AB30
GND
AB32
GND
AB39
GND
AB4
GND
AB41
GND
AB42
GND
AB45
GND
AB46
GND
AB48
GND
AB5
GND
AB8
GND
AB9
GND
AC15
GND
AC17
GND
AC19
GND
AC21
GND
AC23
GND
AC25
GND
AC27
GND
AC29
GND
AC31
GND
AD14
GND
AD16
GND
AD18
GND
AD20
GND
AD22
GND
AD24
GND
AD26
GND
AD28
GND
AD30
GND
AD32
GND
AE11
GND
AE15
GND
AE17
GND
AE19
GND
AE2
GND
AE21
GND
AE23
GND
AE25
GND
AE27
GND
AE29
GND
AE31
GND
AE39
GND
AE4
GND
AE41
GND
AE42
GND
AE45
GND
AE46
GND
AE48
GND
AE5
GND
AE8
GND
AE9
GND
AF14
GND
AF16
GND
AF18
GND
AF20
GND
AF22
GND
AF24
GND
AF26
GND
AF28
GND
AF30
GND
AF32
GND
AG15
GND
AG17
GND
AG19
GND
AG21
GND
AG23
GND
AG25
GND
AG27
GND
AG29
GND
AG31
GND
AH11
GND
AH14
GND
AH16
GND
AH18
GND
AH2
GND
AH20
GND
AH22
GND
AH24
GND
AH26
GND
AH28
GND
AH30
GND
AH32
GND
AH39
GND
AH4
GND
AH41
GND
AH42
GND
AH45
GND
AH46
GND
AH48
GND
AH5
GND
AH8
GND
AH9
GND
AJ15
GND
AJ17
GND
AJ19
GND
AJ21
GND
AJ23
GND
AJ25
GND
AJ27
GND
AJ29
GND
AJ31
GND
AK14
GND
AK16
GND
AK18
GND
AK20
GND
AK22
GND
AK24
GND
AK26
GND
AK28
GND
AK30
GND
AK32
GND
AL11
GND
AL15
GND
AL17
GND
AL19
GND
AL2
GND
AL21
GND
AL23
GND
AL25
GND
AL27
GND
AL29
GND
AL31
GND
AL39
GND
AL4
GND
AL41
GND
AL42
GND
AL45
GND
AL46
GND
AL48
GND
AL5
GND
AL8
GND
AL9
GND
AM14
GND
AM16
GND
AM18
GND
AM20
GND
AM22
GND
AM24
GND
AM26
GND
AM28
GND
AM30
GND
AP11
GND
AP2
GND
AP4
GND
AP41
GND
AP42
GND
AP45
GND
AP46
GND
AP48
GND
AP5
GND
AP8
GND
AP9
GND
AT42
GND
AU11
GND
AU2
GND
AU4
GND
AU45
GND
AU46
GND
AU48
GND
AU5
GND
AU8
GND
AU9
GND
AW13
GND
AW16
GND
AW19
GND
AW22
GND
AW25
GND
AW29
GND
AW31
GND
AW34
GND
AY2
GND
AY4
GND
AY46
GND
AY48
GND
AY5
GND
AY8
GND
B1
GND
B10
GND
B13
GND
B16
GND
B19
GND
B2
GND
B22
GND
B25
GND
B28
GND
B31
GND
B34
GND
B37
GND
B40
GND
B43
GND
B45
GND
B48
GND
B49
GND
B7
GND
BA13
GND
BA16
GND
BA19
GND
BA22
GND
BA25
GND
BA28
GND
BA31
GND
BA34
GND
BB10
GND
BB13
GND
BB16
GND
BB19
GND
BB22
GND
BB23
GND
BB25
GND
BB26
GND
BB28
GND
BB29
GND
BB31
GND
Y32
GND
AW24
GND
BB21
GND
G1G
@digital.u_gpu_gb3b_256(sym_17):page14_i69 BGA1745 COMMON
17/21 GND_2/2
BB32
GND
BB34
GND
BB35
GND
BB36
GND
BB8
GND
BC2
GND
BC4
GND
BC48
GND
BC5
GND
BE10
GND
BE13
GND
BE16
GND
BE19
GND
BE2
GND
BE21
GND
BE24
GND
BE27
GND
BE30
GND
BE33
GND
BE36
GND
BE37
GND
BE4
GND
BE7
GND
BF10
GND
BF13
GND
BF16
GND
BF19
GND
BF22
GND
BF23
GND
BF24
GND
BF25
GND
BF26
GND
BF27
GND
BF28
GND
BF29
GND
BF30
GND
BF31
GND
BF32
GND
BF33
GND
BF34
GND
BF35
GND
BF36
GND
BF37
GND
BF5
GND
BF7
GND
BG1
GND
BH1
GND
BH10
GND
BH13
GND
BH16
GND
BH19
GND
BH2
GND
BH22
GND
BH25
GND
BH28
GND
BH31
GND
BH34
GND
BH37
GND
BH5
GND
BH7
GND
BJ2
GND
BJ3
GND
C1
GND
C3
GND
C49
GND
D10
GND
D13
GND
D16
GND
D19
GND
D22
GND
D25
GND
D28
GND
D31
GND
D34
GND
D37
GND
D4
GND
D40
GND
D43
GND
D7
GND
E10
GND
E13
GND
E16
GND
E19
GND
E22
GND
E25
GND
E28
GND
E31
GND
E34
GND
E37
GND
E40
GND
E43
GND
E46
GND
E48
GND
E5
GND
E7
GND
F6
GND
G2
GND
G4
GND
G45
GND
G46
GND
G48
GND
G5
GND
H10
GND
H13
GND
H16
GND
H19
GND
H22
GND
H25
GND
H28
GND
H31
GND
H34
GND
H37
GND
H40
GND
H8
GND
J13
GND
J16
GND
J19
GND
J22
GND
J25
GND
J28
GND
J31
GND
K2
GND
K4
GND
K42
GND
K45
GND
K46
GND
K48
GND
K5
GND
K8
GND
L13
GND
L16
GND
L19
GND
L22
GND
L25
GND
L28
GND
L31
GND
L34
GND
L37
GND
N11
GND
N2
GND
N39
GND
N4
GND
N41
GND
N42
GND
N45
GND
N46
GND
N48
GND
N5
GND
N8
GND
N9
GND
P14
GND
P16
GND
P18
GND
P20
GND
P22
GND
P24
GND
P26
GND
P28
GND
P30
GND
P32
GND
R15
GND
R17
GND
R19
GND
R21
GND
R23
GND
R25
GND
R27
GND
R29
GND
R31
GND
T11
GND
T14
GND
T16
GND
T18
GND
T2
GND
T20
GND
T22
GND
T24
GND
T26
GND
T28
GND
T30
GND
T32
GND
T39
GND
T4
GND
T41
GND
T42
GND
T45
GND
T46
GND
T48
GND
T5
GND
T8
GND
T9
GND
U15
GND
U17
GND
U19
GND
U21
GND
U23
GND
U25
GND
U27
GND
U29
GND
U31
GND
V14
GND
V16
GND
V18
GND
V20
GND
V22
GND
V24
GND
V26
GND
V28
GND
V30
GND
V32
GND
W11
GND
W15
GND
W17
GND
W19
GND
W2
GND
W21
GND
W23
GND
W25
GND
W27
GND
W29
GND
W31
GND
W39
GND
W4
GND
W41
GND
W42
GND
W45
GND
W46
GND
W48
GND
W5
GND
W8
GND
W9
GND
Y14
GND
Y16
GND
Y18
GND
Y20
GND
Y22
GND
Y24
GND
Y26
GND
Y28
GND
Y30
GND
J34
GND
J37
GND
GND GND GND GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
G1H
@digital.u_gpu_gb3b_256(sym_18):page14_i70
NVVDD NVVDD NVVDD NVVDD FBVDDQ
BGA1745 COMMON
18/21 VDD_1/2
AA14
VDD
AA16
VDD
AA18
VDD
AA20
VDD
AA22
VDD
AA24
VDD
AA26
VDD
AA28
VDD
AA30
VDD
AA32
VDD
AB15
VDD
AB17
VDD
AB19
VDD
AB21
VDD
AB23
VDD
AB25
VDD
AB27
VDD
AB29
VDD
AB31
VDD
AC14
VDD
AC16
VDD
AC18
VDD
AC20
VDD
AC22
VDD
AC24
VDD
AC26
VDD
AC28
VDD
AC30
VDD
AC32
VDD
AD15
VDD
AD17
VDD
AD19
VDD
AD21
VDD
AD23
VDD
AD25
VDD
AD27
VDD
AD29
VDD
AD31
VDD
AE14
VDD
AE16
VDD
AE18
VDD
AE20
VDD
AE22
VDD
AE24
VDD
AE26
VDD
AE28
VDD
AE30
VDD
AE32
VDD
AF15
VDD
AF17
VDD
AF19
VDD
AF21
VDD
AF23
VDD
AF25
VDD
AF27
VDD
AF29
VDD
AF31
VDD
AG14
VDD
AG16
VDD
AG18
VDD
AG20
VDD
AG22
VDD
AG24
VDD
AG26
VDD
AG28
VDD
AG30
VDD
AG32
VDD
AH15
VDD
AH17
VDD
AH19
VDD
AH21
VDD
AH23
VDD
AH25
VDD
AH27
VDD
AH29
VDD
ASSEMBLY PAGE DETAIL
AH31
VDD
AJ14
VDD
AJ16
VDD
AJ18
VDD
AJ20
VDD
AJ22
VDD
AJ24
VDD
AJ26
VDD
AJ28
VDD
AJ30
VDD
AJ32
VDD
AK15
VDD
AK17
VDD
AK19
VDD
AK21
VDD
AK23
VDD
AK25
VDD
AK27
VDD
AK29
VDD
AK31
VDD
AL14
VDD
AL16
VDD
AL18
VDD
AL20
VDD
AL22
VDD
AL24
VDD
AL26
VDD
AL28
VDD
AL30
VDD
AL32
VDD
AM15
VDD
AM17
VDD
AM19
VDD
AM21
VDD
AM23
VDD
AM25
VDD
AM27
VDD
AM29
VDD
AM31
VDD
AM32
VDD
AN39
VDD
AP39
VDD
AR39
VDD
AR40
VDD
AR41
VDD
AT39
VDD
AT40
VDD
AT41
VDD
AU39
VDD
AU41
VDD
AU42
VDD
AV41
VDD
AV42
VDD
AV43
VDD
AV44
VDD
AW35
VDD
AW36
VDD
AW37
VDD
AW41
VDD
AW42
VDD
AW43
VDD
AW44
VDD
AW45
VDD
AY36
VDD
AY42
VDD
AY45
VDD
BA36
VDD
BA37
VDD
BA38
VDD
Y31
VDD
BASE LEVEL GENERIC SCHEMATIC ONLY
GPU PWR and GND
G1I
@digital.u_gpu_gb3b_256(sym_19):page14_i71 BGA1745 COMMON
19/21 VDD_2/2
BA39
VDD
BA42
VDD
BA43
VDD
BA44
VDD
BA45
VDD
BA46
VDD
BB37
VDD
BB38
VDD
BB39
VDD
BB40
VDD
BB41
VDD
BB42
VDD
BB43
VDD
BB44
VDD
BB45
VDD
BB46
VDD
BB47
VDD
BC38
VDD
BC39
VDD
BC41
VDD
BC42
VDD
BC45
VDD
BC46
VDD
BD38
VDD
BD39
VDD
BD41
VDD
BD42
VDD
BD44
VDD
BD45
VDD
BD46
VDD
BD47
VDD
BD48
VDD
BD49
VDD
BE38
VDD
BE39
VDD
BE40
VDD
BE41
VDD
BE42
VDD
BE43
VDD
BE44
VDD
BE45
VDD
BE46
VDD
BE47
VDD
BE48
VDD
BE49
VDD
BF38
VDD
BF39
VDD
BF40
VDD
BF41
VDD
BF42
VDD
BF43
VDD
BF44
VDD
BF45
VDD
BF46
VDD
BF47
VDD
BF48
VDD
BF49
VDD
BG39
VDD
BG41
VDD
BG42
VDD
BG44
VDD
BG45
VDD
BG46
VDD
BG47
VDD
BG48
VDD
BG49
VDD
BH39
VDD
BH40
VDD
BH41
VDD
BH42
VDD
BH43
VDD
BH44
VDD
BH45
VDD
BH46
VDD
BH47
VDD
G1K
@digital.u_gpu_gb3b_256(sym_20):page14_i72 BGA1745 COMMON
BH48
VDD
BH49
VDD
BJ39
VDD
BJ41
VDD
BJ42
VDD
BJ44
VDD
BJ45
VDD
BJ46
VDD
BJ47
VDD
BJ48
VDD
P15
VDD
P17
VDD
P19
VDD
P21
VDD
P23
VDD
P25
VDD
P27
VDD
P29
VDD
P31
VDD
R14
VDD
R16
VDD
R18
VDD
R20
VDD
R22
VDD
R24
VDD
R26
VDD
R28
VDD
R30
VDD
R32
VDD
T15
VDD
T17
VDD
T19
VDD
T21
VDD
T23
VDD
T25
VDD
T27
VDD
T29
VDD
T31
VDD
U14
VDD
U16
VDD
U18
VDD
U20
VDD
U22
VDD
U24
VDD
U26
VDD
U28
VDD
U30
VDD
U32
VDD
V15
VDD
V17
VDD
V19
VDD
V21
VDD
V23
VDD
V25
VDD
V27
VDD
V29
VDD
V31
VDD
W14
VDD
W16
VDD
W18
VDD
W20
VDD
W22
VDD
W24
VDD
W26
VDD
W28
VDD
W30
VDD
W32
VDD
Y15
VDD
Y17
VDD
Y19
VDD
Y21
VDD
Y23
VDD
Y25
VDD
Y27
VDD
Y29
VDD
FDBA
20/21 FBVDDQ
AA39
FBVDDQ
AC11
FBVDDQ
AD10
FBVDDQ
AD39
FBVDDQ
AF11
FBVDDQ
AF39
FBVDDQ
AG39
FBVDDQ
AK39
FBVDDQ
AM39
FBVDDQ
AM40
FBVDDQ
AN40
FBVDDQ
B47
FBVDDQ
C45
FBVDDQ
C46
FBVDDQ
C47
FBVDDQ
D44
FBVDDQ
D45
FBVDDQ
D46
FBVDDQ
E44
FBVDDQ
E45
FBVDDQ
F42
FBVDDQ
F44
FBVDDQ
F45
FBVDDQ
G41
FBVDDQ
G42
FBVDDQ
H41
FBVDDQ
H42
FBVDDQ
H43
FBVDDQ
J38
FBVDDQ
J39
FBVDDQ
J42
FBVDDQ
G1J
INS16852651 BGA1745 COMMON
21/21 NC/3V3
AK10
NC
AM10
NC
AY14
NC
BC11
NC
BF12
NC
BF18
NC
GK104 GM204 3V3MISC 3V3MISC
FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBVDDQ_SENSE
FB_CLAMP
FB_VREF
PROBE_FBVDDQ
PROBE_FB_GND
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
3V3_AON 3V3_AON
3V3AUX_NC
VDD33 VDD33
J43 K24 K26 K29 K30 K32 L14 L15 L17 L18 L20 L23 L24 L27 L29 L30 L32 L33 L35 L41 P11 P39 R11 R40 U11 U39 V11 V39 V40 Y11 Y40
R49 BB48 R39
AG11 AF10
P40 R48 R47
AW15 AY15
AW17 AY17
AW14
MSI
MSI
MSI
G
FBVDDQ
16MIL
FBVDDQ_SENSE_GPU
FBVDDQ
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
3V3_RUN
3V3_RUN
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
OUT
Testpoint this net
* Connect Probe_XXXX
to Pwr/Gnd
GND
R632 40.2ohm
0402 COMMON
R87
0402
R88 60.4ohm
0402 COMMON
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
GPU PWR and GND
GPU PWR and GND
GPU PWR and GND
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
600-1G401-BASE-QS1
PG401-A02 A
GND
1 %
40.2ohm
COMMON
1 %
1 %
MS-V317
MS-V317
MS-V317
31
FBVDDQ
GND
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
PAGE DATE
H
14 37
14 37
14 37
14 OF 37
04-AUG-2014
1
2
3
4
1.0
1.0
1.0
5
Page 15
A B C D E F G H
Page15: GPU Decoupling
Based on GB2-X GDDR5 FBVDDQ Decap Guideline
1
1
FBVDDQ
FBVDDQ
Partition A
C666
0.1uF
16V 10% X7R 0402
2
COMMON
Partition B
C658
0.1uF
16V 10% X7R 0402 COMMON
Partition C
C708
0.1uF
16V 10% X7R 0402
3
COMMON
Partition D
C759
0.1uF
16V 10% X7R 0402 COMMON
VDD33
3V3_RUN
C819
4
4.7uF
6.3V 20% X5R 0603 COMMON
0.1uF, 0.47uF & 1uF, 0402 (Place Under GPU)
4.7uF, 0603 (Place Near GPU) 10uF, 0805 (Place Near GPU) 22uF, 0805 (Place Near GPU)
2x 0.1uF, 2x 1uF, 2x 4.7uF, 1x 10uF, and 1x 22uF
C665
C660
C667
1uF
1uF
6.3V
6.3V 10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C686
C661
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C744
C729
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C755
C756 1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C765
0.1uF
16V 10% X7R 0402 COMMON
GND
C803 1uF
6.3V 10% X5R 0402 COMMON
0.1uF
16V 10% X7R 0402 COMMON
2x 0.1uF, 2x 1uF, 2x 4.7uF, 1x 10uF, and 1x 22uF
C675
0.1uF
16V 10% X7R 0402 COMMON
2x 0.1uF, 2x 1uF, 2x 4.7uF, 1x 10uF, and 1x 22uF
C741
0.1uF
16V 10% X7R 0402 COMMON
2x 0.1uF, 2x 1uF, 2x 4.7uF, 1x 10uF, and 1x 22uF
C754
0.1uF
16V 10% X7R 0402 COMMON
C773
0.1uF
16V 10% X7R 0402 COMMON
C769
0.1uF
16V 10% X7R 0402 COMMON
NVVDD Decoupling caps. Place under GPU.
NVVDD
NVVDD
C685
C739
C650
C2004
C163
C628
C662
C656
4.7uF
4.7uF
6.3V
6.3V
20%
20%
X5R
X5R
0603
0603
COMMON
COMMON
C627
10uF
22uF
6.3V
6.3V
20%
20%
X5R
X5R
0805LP
0805LP
COMMON
COMMON
330uF
COMMON 20% 2V AL-Polymer
3.5A@105degC,100KHz
0.006ohm SMD_7343
330uF
COMMON 20% 2V AL-Polymer
3.5A@105degC,100KHz
0.006ohm SMD_7343
330uF
COMMON 20% 2V AL-Polymer
3.5A@105degC,100KHz
0.006ohm SMD_7343
330uF
COMMON 20% 2V AL-Polymer
3.5A@105degC,100KHz
0.006ohm SMD_7343
GND
C651
C695
C668
4.7uF
4.7uF
6.3V
6.3V
20%
20%
X5R
X5R
0603
0603
COMMON
COMMON
C719
C807
4.7uF
4.7uF
6.3V
6.3V
20%
20%
X5R
X5R
0603
0603
COMMON
COMMON
C767
C768
4.7uF
4.7uF
6.3V
6.3V 20%
20%
X5R
X5R
0603
0603 COMMON
COMMON
3V3_F
LB24
BEAD_0805 COMMON
LB25
BEAD_0805 COMMON
C626
10uF
22uF
6.3V
6.3V 20%
20%
X5R
X5R
0805LP
0805LP
COMMON
COMMON
GND
C779
C700
10uF
22uF
6.3V
6.3V
20%
20%
X5R
X5R
0805LP
0805LP
COMMON
COMMON
GND
C829
C827
10uF
22uF
6.3V
6.3V
20%
20%
X5R
X5R
0805LP
0805LP
COMMON
COMMON
GND
3V3_RUN
220ohm
220ohm
C712 47uF
4V 20% X5R 0805LP COMMON
C717 22uF
6.3V 20% X5R 0805LP COMMON
C692 1uF
6.3V 10% X5R 0402 COMMON
C732 1uF
6.3V 10% X5R 0402 COMMON
C705 47uF
4V 20% X5R 0805LP COMMON
C716 22uF
6.3V 20% X5R 0805LP COMMON
C663 1uF
6.3V 10% X5R 0402 COMMON
C733 1uF
6.3V 10% X5R 0402 COMMON
C676 47uF
4V 20% X5R 0805LP COMMON
C720 22uF
6.3V 20% X5R 0805LP COMMON
C724 1uF
6.3V 10% X5R 0402 COMMON
C702 1uF
6.3V 10% X5R 0402 COMMON
C747 47uF
4V 20% X5R 0805LP COMMON
GND
C711 22uF
6.3V 20% X5R 0805LP COMMON
C723 1uF
6.3V 10% X5R 0402 COMMON
C664 1uF
6.3V 10% X5R 0402 COMMON
330uF
COMMON 20% 2V AL-Polymer
3.5A@105degC,100KHz
0.006ohm SMD_7343
C721 22uF
6.3V 20% X5R 0805LP COMMON
C690 1uF
6.3V 10% X5R 0402 COMMON
C757 1uF
6.3V 10% X5R 0402 COMMON
GND
C162 330uF
COMMON 20% 2V AL-Polymer
3.5A@105degC,100KHz
0.006ohm SMD_7343
C706 22uF
6.3V 20% X5R 0805LP COMMON
C734 1uF
6.3V 10% X5R 0402 COMMON
C703 1uF
6.3V 10% X5R 0402 COMMON
C735 22uF
6.3V 20% X5R 0805LP COMMON
C691 1uF
6.3V 10% X5R 0402 COMMON
C657 1uF
6.3V 10% X5R 0402 COMMON
6x 330uF, 7343
2
4x 47uF, 0805
C689 22uF
6.3V 20% X5R 0805LP COMMON
GND
C701
C758
1uF
1uF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C677
C736 1uF
1uF
6.3V
6.3V 10%
10%
X5R
X5R 0402
0402
COMMON
COMMON
C746 1uF
6.3V 10% X5R 0402 COMMON
C730 1uF
6.3V 10% X5R 0402 COMMON
8x 22uF, 0805
C629 1uF
6.3V 10% X5R 0402 COMMON
GND
23x 1uF, 0402
C622 1uF
6.3V 10% X5R 0402 COMMON
3
C621 1uF
6.3V 10% X5R 0402 COMMON
4
GND
3V3_AON
3V3_RUN
C593
C616
C894
1uF
6.3V 10% X5R 0402 COMMON
0.1uF
16V 10% X7R 0402 COMMON
GND
C E
4.7uF
6.3V 20% X5R 0603 COMMON
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
GPU Decoupling
MICRO-STAR INT'L CO.,LTD
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MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
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Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
GPU Decoupling
GPU Decoupling
GPU Decoupling
600-1G401-BASE-QS1
PG401-A02 A
1.0
1.0
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15 37
15 37
PAGE DATE
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1.0
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Sheet ofDate:
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Sheet ofDate:
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Page 16
A B C D E F G H
Page16: DACA Interface
1
50OHM_NETCLASS1
50OHM_NETCLASS1
R46 56ohm
COMMON0402
5 %
R47
56ohm
COMMON
0402
5 %
50OHM_NETCLASS1
DACA_I2C_SCL_R
50OHM_NETCLASS1
DACA_I2C_SDA_R
DDC_5V
LB1 0.068uH
R43
2.2k
5 % 0402 COMMON
R44
2.2k
5 % 0402 COMMON
LB2
COMMON0603
COMMON
0603
0.068uH
C43
2.2pF
50V
0.1pF C0G 0402 COMMON
GND
C44
2.2pF
50V
0.1pF C0G 0402 COMMON
GND
2
50OHM_NETCLASS1
50OHM_NETCLASS1
G1L
@digital.u_gpu_gb3b_256(sym_6):page16_i527 BGA1745 COMMON
3
4,09,17,18,20,21
3V3_PLL
IN
C782
C743
C781
0.1uF
0.1uF
16V 10% X7R 0402 COMMON
16V 10% X7R 0402 COMMON
0.1uF
16V 10% X7R 0402 COMMON
GND
C737 1uF
6.3V 10% X5R 0402 COMMON
DACA_VREF
DACA_RSET
R643 124ohm
1 % 0402 COMMON
GND
4
AW18 AW20
6/21 DACA
DACA_VDD
DACA_VREF
AY20
DACA_RSET
I2CA_SCL I2CA_SDA
DACA_HSYNC DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
BD4 BD3
BA20 AY18
AY21 BA21 AW21
DACA_I2C_SCL DACA_I2C_SDA
DACA_HSYNC DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DAC_RGB
DAC_RGB
DAC_RGB
R735 75ohm
0.1 % 0402 COMMON
GND
R758 75ohm
0.1 % 0402 COMMON
GND
R729 75ohm
0.1 % 0402 COMMON
GND
L501 0.027uH
L504
C867
4.7pF
50V
0.25pF C0G 0402 COMMON
GND
C874
4.7pF
50V
0.25pF C0G 0402 COMMON
GND
C862
4.7pF
50V
0.25pF C0G 0402 COMMON
GND
0603 COMMON
0.027uH
0603 COMMON
L503 0.047uH
COMMON0603
L505 0.047uH
COMMON0603
L502 0.047uH
COMMON0603
C866
2.2pF
50V
0.1pF C0G 0402 COMMON
GND
C869
2.2pF
50V
0.1pF C0G 0402 COMMON
GND
C890
2.2pF
50V
0.1pF C0G 0402 COMMON
GND
C892
2.2pF
50V
0.1pF C0G 0402 COMMON
GND
C889
2.2pF
50V
0.1pF C0G 0402 COMMON
GND
50OHM_NETCLASS1
DACA_I2C_SCL_DVI
50OHM_NETCLASS1
DACA_I2C_SDA_DVI
50OHM_NETCLASS1
DACA_HS_DVI
DACA_VS_DVI
DAC_RGB
DACA_RED_DVI
DAC_RGB
DACA_GREEN_DVI
DAC_RGB
DACA_BLUE_DVI
BI
BI
17
17
1
2
OUT
OUT
17
17
3
OUT
OUT
17
17
4
OUT
17
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
DACA Interface
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V31714ci203
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
DACA Interface
DACA Interface
DACA Interface
MS-V317
16 37
16 37
16 37
16 OF 37
04-AUG-2014
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5
1.0
1.0
Page 17
A B C D E F G H
Page17: IFPAB DVI-I-DL
1
2
4,09,16,18,20,21
3
PEX_VDD
R130 0ohm
0.05 ohm 0402 COMMON
16 16
G1M
@digital.u_gpu_gb3b_256(sym_7):page17_i378 BGA1745 COMMON
7/21 IFPAB
PEX_VDD
R696 0ohm
0.05 ohm 0402 DNI
IFPAB_IOVDD
C795 1uF
6.3V 10% X5R 0402 COMMON
GND
C78
4.7uF
6.3V 20% X5R 0603 COMMON
3V3_PLL
R697
R703 0ohm
0.05 ohm 0402 DNI
0ohm
0402 COMMON
0.05 ohm
C791
4.7uF
6.3V 20% X5R 0603 COMMON
IN
IFP_IOVDD
R644
0402
1 %
IFPAB_PLLVDD
C742
0.1uF
16V 10% X7R 0402 COMMON
IFPAB_RSET
1k
COMMON
C751 1uF
6.3V 10% X5R 0402 COMMON
GND
GND
C740
0.1uF
16V 10% X7R 0402 COMMON
C77
0.1uF
16V 10% X7R 0402 COMMON
BE18
BB15
BB17 BA17
BA18 BB18
IFPAB_RSET
IFPAB_PLLVDD
IFPAB_IOVDD IFPAB_IOVDD
IFPB_IOVDD IFPB_IOVDD
GK104 GM204
NC NC
NC NC
DPA_L3
DPA_L2
DPA_L1
DPA_L0
DPB_L3
DPB_L2
DPB_L1
DPB_L0
DP
LVDS/DVI/HDMI
IFPA_AUX_SDA IFPA_AUX_SCL
IFPB_AUX_SDA IFPB_AUX_SCL
IFPA_TXC IFPA_TXC
IFPA_TXD0 IFPA_TXD0
IFPA_TXD1 IFPA_TXD1
IFPA_TXD2 IFPA_TXD2
IFPA_TXD3 IFPA_TXD3
IFPB_TXC IFPB_TXC
IFPB_TXD4 IFPB_TXD4
IFPB_TXD5 IFPB_TXD5
IFPB_TXD6 IFPB_TXD6
IFPB_TXD7 IFPB_TXD7
BI
BI
BG5 BJ5
BF15 BE15
IFPAB_TXC*
BD18
IFPAB_TXC
BC18
IFPAB_TXD0*
BG14
IFPAB_TXD0
BH14
IFPAB_TXD1*
BC15
IFPAB_TXD1
BD15
IFPAB_TXD2*
BE17
IFPAB_TXD2
BF17
BC17 BD17
BG18 BH18
IFPAB_TXD4*
BJ14
IFPAB_TXD4
BJ15
IFPAB_TXD5*
BH15
IFPAB_TXD5
BG15
IFPAB_TXD6*
BG17
IFPAB_TXD6
BH17
BJ18 BJ17
IFPAB_TXC IFPAB_TXC
IFPAB_TXD0 IFPAB_TXD0
IFPAB_TXD1 IFPAB_TXD1
IFPAB_TXD2 IFPAB_TXD2
IFPAB_TXD4 IFPAB_TXD4
IFPAB_TXD5 IFPAB_TXD5
IFPAB_TXD6 IFPAB_TXD6
IFPAB
3V3_F
R795 10k
5 % 0402
4
23
OUT
GPIO14_IFPA_HPD
COMMON
3
Q529
@discrete.q_npn(sym_1):page17_i376
SOT23_1B1C1E
COMMON
2
GND
1B1C1E
C
B
1
E
R821 100k
R822 100k
5 % 0402 COMMON
GND GND GND
0402 COMMON
5 %
DVIA_HPD_RDVIA_HPD_R_Q
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
C893 220pF
50V 5% C0G 0402 COMMON
PLACE CLOSE TO CONNECTOR
R823
0.05 ohm
0ohm
COMMON0603
C896 220pF
50V 5% C0G 0402 DNI
DP_SIGNALS DP_SIGNALS
ASSEMBLY PAGE DETAIL
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
3V3_F
C891
0.1uF
COMMON
C887
0.1uF
COMMON
C877 0.1uF
COMMON
C875 0.1uF
COMMON
C868 0.1uF
COMMON
C865
0.1uF
COMMON
C864
0.1uF
COMMON
IFPAB_TERM_CM
0.406 0V
3
1G1D1S
D
Q44
@discrete.q_fet_n_enh(sym_2):page17_i384 SOT23_1G1D1S
G
1
COMMON
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
BASE LEVEL GENERIC SCHEMATIC ONLY
IFPAB DVI-I-DL
C859
C856
C832 0.1uF
C818
C810
C794
C790 0.1uF
0.1uF
COMMON
0.1uF
COMMON
COMMON
0.1uF
COMMON
0.1uF
COMMON
0.1uF
COMMON
COMMON
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
499ohm
1 %
COMMON
1 %
1 %
499ohm
COMMON
1 %
COMMON
1 %
COMMON 0402
1 %
COMMON
1 %
499ohm
COMMON
1 %
1 %
1 %
COMMON
1 %
499ohm
COMMON
1 %
499ohm
COMMON
1 %
1 %
90DIFF_NETCLASS1
90DIFF_NETCLASS1
DDC_5V
C38 1uF
6.3V 10% X5R 0402
U100
1 2
4 5
U102
1 2
4 5
IFPAB_TXD0_C* IFPAB_TXD0_C IFPAB_TXD1_C* IFPAB_TXD1_C IFPAB_TXD2_C* IFPAB_TXD2_C
IFPAB_TXD4_C* IFPAB_TXD4_C IFPAB_TXD5_C* IFPAB_TXD5_C IFPAB_TXD6_C* IFPAB_TXD6_C DACA_I2C_SCL_DVI DACA_I2C_SDA_DVI
IFPAB_TXC_C* IFPAB_TXC_C DACA_VS_DVI DVIA_HPD_C
DACA_RED_DVI DACA_GREEN_DVI DACA_BLUE_DVI
DACA_HS_DVI
COMMON
GND
10
NC
9
NC
7
NC
6
NC
ESD-ESD3V3U4ULC-RH
3
8
VVVV284260
D0G-05A0300-I14
ESD_2_5X1
COMMON
10
NC
9
NC
7
NC
6
NC
ESD-ESD3V3U4ULC-RH
3
8
VVVV284260
D0G-05A0300-I14
ESD_2_5X1
COMMON
MSI
MSI
MSI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
G
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS DP_SIGNALS DP_SIGNALS DP_SIGNALS DP_SIGNALS
16
16 16 16
16
R606
0402COMMON
R599499ohm
0402
R598499ohm
0402COMMON
R537
0402
R536499ohm
0402
R535499ohm
R534499ohm
0402
R530
0402
R608499ohm
0402COMMON
R607499ohm
0402COMMON
R526499ohm
0402
R528
0402
R532
0402
R533499ohm
0402COMMON
IFPAB_TXD0_C* IFPAB_TXD0_C
IFPAB_TXD1_C* IFPAB_TXD1_C
IFPAB_TXD5_C* IFPAB_TXD5_C
IFPAB_TXD6_C* IFPAB_TXD6_C
IN
IN IN IN
IN
FDBA
SHIELD1
25
SHIELD2
26
SHIELD3
27
SHIELD4
28
TX0-
17
TX0+
18
TX1-
9
TX1+
10
TX2-
1
TX2+
2
SHLD24
3
SHLD13
11
SHLD05
19
TX3-
12
TX3+
13
TX4-
4
TX4+
5
TX5-
20
TX5+
21
DDCC
6
DDCD
7
VDDC
14
GND
15
SHLDC
22
TXC-
24
TXC+
23
VSYNC
8
HPD
16
R
C1
G
C2
B
C3
AGND1
C5
AGND2
C5A
HSYNC
C4
SHIELD5
29
SHIELD6
30
SHIELD7
31
SHIELD8
32
SHIELD9
33
TOWS_con_dvii
GND
IFPAB_TXD0_C* IFPAB_TXD0_C
IFPAB_TXD1_C* IFPAB_TXD1_C
IFPAB_TXD5_C* IFPAB_TXD5_C
IFPAB_TXD6_C* IFPAB_TXD6_C
IFPAB_TXD2_C* IFPAB_TXD2_C
IFPAB_TXD4_C* IFPAB_TXD4_C
IFPAB_TXC_C* IFPAB_TXC_C
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
IFPAB DVI-I-DL
IFPAB DVI-I-DL
IFPAB DVI-I-DL
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
600-1G401-BASE-QS1
PG401-A02 A
917
1
24
816
C3
C1
C5AC5
C4
C2
U101
1 2
4 5
U103
1 2
4 5
MS-V317
MS-V317
MS-V317
J5
@design_lib.con_dvi_i(sym_8):page17_i506
DVI_I_(SLIM_)SHLD_B DVI_I_TALL_9SHLD COMMON
NC NC
NC NC
ESD-ESD3V3U4ULC-RH
3
8
VVVV284260
D0G-05A0300-I14
ESD_2_5X1
COMMON
NC NC
NC NC
ESD-ESD3V3U4ULC-RH
3
8
VVVV284260
D0G-05A0300-I14
ESD_2_5X1
COMMON
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
PAGE DATE
H
10
IFPAB_TXD2_C*
9
IFPAB_TXD2_C
7
IFPAB_TXD4_C*
6
IFPAB_TXD4_C
10
IFPAB_TXC_C*
9
IFPAB_TXC_C
7 6
17 37
17 37
17 37
17 OF 37
04-AUG-2014
1
2
3
4
5
1.0
1.0
1.0
Page 18
A B C D E F G H
Page18: IFPEF with IFPE DP
Fused DP_PWR
4,09,16,17,20,21
PEX_VDD
3V3_F
C726
0.1uF
16V 10% X7R 0402 COMMON
GND
C817
4.7uF
6.3V 20% X5R 0603 COMMON
R95 10k
GND
IN
C809 1uF
6.3V 10% X5R 0402 COMMON
1
2
3
4
3V3_PLL
5 %
COMMON
COMMON0402
R653
0402
3V3_DP_PWR_EF_EN
1k
1 %
C787
0.1uF
16V 10% X7R 0402 COMMON
IFPEF_RSET
GND
[R_AUX_CONN_PD_DP]
90DIFF_NETCLASS1 90DIFF_NETCLASS1
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
C611 220pF
50V 5% C0G 0402 COMMON
GND
COMMON
COMMON
R29 100k
5 %
0402
R30 100k
5 %
0402
PLACE CLOSE TO CONNECTOR
DP_PWR_EF
R597
0.05 ohm
GND
3
3
IFPE_AUX_C IFPE_AUX_C
IFPE_L3_C IFPE_L3_C
IFPE_L2_C IFPE_L2_C
IFPE_L1_C IFPE_L1_C
IFPE_L0_C IFPE_L0_C
0ohm
[D_AUX_CLAMP*_DP]
D9
@discrete.d_3pin_ac(sym_1):page18_i380
0.1A 100V SOT23 DNI
1 2
GND
[D_AUX_CLAMP_DP]
D10
@discrete.d_3pin_ac(sym_1):page18_i373
0.1A 100V SOT23 DNI
1 2
COMMON0603
GND
GND
IFPE_C_HPD_C
IFPE_AUX_C* IFPE_AUX_C
IFPE_L3_C* IFPE_L3_C
IFPE_L2_C* IFPE_L2_C
IFPE_L1_C* IFPE_L1_C
IFPE_L0_C* IFPE_L0_C
C598 220pF
50V 5% C0G 0402 DNI
IFPE_MODE
[C_AUX_GATE_DP]
C902 10nF
16V 10% X7R 0402 COMMON
[C_AUX_CLAMP*_DP]
C26
0.1uF
16V 10% X7R 0402 DNI
GND
12V_F
[R_MODE_BJT_PU1_DP]
R769 10k
5 % 0402 COMMON
Hot_Det
18 17
AUX_CHn AUX_CHp
15
ML_Lane_3n
12
ML_Lane_3p
10
ML_Lane_2n
9
ML_Lane_2p
7
ML_Lane_1n
6
ML_Lane_1p
4
ML_Lane_0n
3
ML_Lane_0p
1
MODE
13
14
CEC
_ VVVV314_10 N5W-20M0610-A43
[Q_MODE_BJT2_DP]
J4
3
C
Q511
@discrete.q_npn(sym_1):page18_i378
SOT23_1B1C1E
COMMON
E
2
GND
PWR_RTN
GND_2
DP_W/GASKET
1
DP_PWR
1
3V3_F
[R_MODE_BJT_PU2_DP]
R767
4.7k
5 % 0402
IFPE_MODE*
COMMON
[Q_MODE_BJT1_DP]
3
C
Q513
@discrete.q_npn(sym_1):page18_i392
SOT23_1B1C1E
COMMON
E
2
GND
1
1B1C1E
B
IFPE_MODE_R
[R_MODE_DP]
R765
0402 COMMON
5 %
4.7k
1B1C1E
B
2
DP_PWR_EF
DP_PWR_EF
[C_DP_PWR_DP]
C895
0.1uF
16V 10% X7R 0402 DNI
20
MEC1
MEC1
19 X1
X1
X2
X2
X3
X3
X4
X4
2
GND_0
5
GND_1
8 11
GND_3
16
GND_6
GND
GND
IFPE_MODE_C
GND
[R_MODE_PD_DP]
R763 1M
5 % 0402 COMMON
3
4
Two cases to be considered:
1. DP AUX to DP connector: AUX AC coupled
DP-SKU
U14
@analog.u_sw_pwr_tps2031(sym_1):page18_i338 SO8 COMMON
2
IN
3
IN
4
EN
5
OC*
3.3V
1.0A
8
OUT OUT OUT
GND
0.406
7 6
1
GND
GND
R620
4.7k
5 % 0402 COMMON
C789
0.1uF
16V 10% X7R 0402 COMMON
GND GND
C591 22uF
6.3V 20% X5R 0805LP COMMON
DP_PWR_EF
GND
C28 560uF
COMMON 20%
6.3V AL-Polymer
4.7A@105.05degC,100KHz
0.008ohm TH_D63P25
DP_PWR_EF
C970
C971
C972
C973
C974 22UF
6.3V 20% X5R 0805 COMMON
VVVV284260
C11-2267014-T04
G1N
@digital.u_gpu_gb3b_256(sym_10):page18_i306 BGA1745 COMMON
10/21 IFPEF
BF11
IFPEF_RSET
BB9
BC8 BD8
BC9 BD9
IFPEF_PLLVDD
IFPEF_IOVDD IFPEF_IOVDD
IFPF_IOVDD IFPF_IOVDD
IFPE
IFPF
TXD3 TXD3
TXD4 TXD4
TXD5 TXD5
C802
0.1uF
16V 10% X7R 0402 COMMON
C788
0.1uF
16V 10% X7R 0402 COMMON
GND
22UF
6.3V 20% X5R 0805 COMMON
VVVV284260
C11-2267014-T04
VVVV284260
C11-2267014-T04
DVI/HDMI
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
DVI/HDMIDVI-DL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
22UF
6.3V 20% X5R 0805 COMMON
22UF
6.3V 20% X5R 0805 COMMON
VVVV284260
C11-2267014-T04
IFPE_AUX_SDA IFPE_AUX_SCL
IFPF_AUX_SDA IFPF_AUX_SCL
DP
DP
GNDGNDGNDGNDGND
IFPE_L3 IFPE_L3
IFPE_L2 IFPE_L2
IFPE_L1 IFPE_L1
IFPE_L0 IFPE_L0
IFPF_L3 IFPF_L3
IFPF_L2 IFPF_L2
IFPF_L1 IFPF_L1
IFPF_L0 IFPF_L0
22UF
6.3V 20% X5R 0805 COMMON
VVVV284260
C11-2267014-T04
BH3 BG3
BE5 BD5
BE6 BD6
BG6 BF6
BF8 BE8
BH4 BJ4
BH6 BJ6
BG8 BH8
BJ8 BJ9
BE9 BF9
IFPE_AUX* IFPE_AUX
IFPE_L3* IFPE_L3
IFPE_L2* IFPE_L2
IFPE_L1* IFPE_L1
IFPE_L0* IFPE_L0
IFPF_AUX* IFPF_AUX
IFPF_L3* IFPF_L3
IFPF_L2* IFPF_L2
IFPF_L1* IFPF_L1
IFPF_L0* IFPF_L0
2. DP AUX to DP-DVI dongle: AUX pass through
[R_AUX_PD*_DP]
R92 100k
5 % 0402
COMMON
GND
IFPE_AUX_C
90DIFF_NETCLASS1
IFPE_AUX_C
90DIFF_NETCLASS1
IFPE_L3_C
DP_SIGNALS
IFPE_L3_C
DP_SIGNALS
IFPE_L2_C
DP_SIGNALS
IFPE_L2_C
DP_SIGNALS
IFPE_L1_C
DP_SIGNALS
IFPE_L1_C
DP_SIGNALS
IFPE_L0_C
DP_SIGNALS
IFPE_L0_C
DP_SIGNALS
3V3_F
BI BI
BI BI
BI BI
BI BI
BI BI
19 19
19 19
19 19
19 19
19 19
D
2S3
G
1
1
G
D
2S3
R652 10k
5 % 0402 COMMON
@discrete.q_npn(sym_1):page18_i326
SOT23_1B1C1E
COMMON
IFPE_AUX_BYP*
[Q_AUX_FET1*_DP] COMMON
@discrete.q_fet_n_enh(sym_6):page18_i355
Q527
SOT23_1G1D1S
[Q_AUX_FET1_DP] SOT23_1G1D1S
Q515
@discrete.q_fet_n_enh(sym_6):page18_i354 COMMON
IFPE_AUX_BYP
[R_AUX_PD_DP]
R90 100k
5 % 0402 DNI
GND
C33 0.1uF
COMMON
C35
0.1uF
COMMON
C40
0.1uF
COMMON
C48 0.1uF
COMMON
3
1B1C1E
C
Q530
B
1
E
2
GND
[C_AUX_COUP*_DP]
C31
0.1uF
0402
16V 10% X7R COMMON
90DIFF_NETCLASS1
90DIFF_NETCLASS1
[C_AUX_COUP_DP]
C30
0.1uF
16V
0402
10% X7R COMMON
C34 0.1uF
COMMON
C36
0.1uF
COMMON
C41 0.1uF
COMMON
C101
0.1uF
COMMON
Hotplug Detection
R676 100k
5 % 0402 COMMON
GND
G
G
R684
5 %
[R_AUX_CONN_PU*_DP]
S3D
2
[Q_AUX_FET2*_DP] COMMON SOT23_1G1D1S @discrete.q_fet_n_enh(sym_7):page18_i358
Q9
1
[Q_AUX_FET2_DP]
1
Q10
@discrete.q_fet_n_enh(sym_7):page18_i357 SOT23_1G1D1S COMMON
S3D
2
IFPE_C_HPD_RIFPE_C_HPD_R_Q
100k
COMMON0402
23
GPIO18_IFPE_HPD
OUT
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
IFPEF with IFPE DP
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
MS-V317
IFPEF with IFPE DP
IFPEF with IFPE DP
IFPEF with IFPE DP
1.0
1.0
1.0
Sheet ofDate:
18 37
Sheet ofDate:
18 37
Sheet ofDate:
18 37
18 OF 37
PAGE DATE
04-AUG-2014
H
5
Page 19
A B C D E F G H
Page19: IFPF DP
R97 100k
5 %
0402
COMMON
[R_AUX_CONN_PD_DP]
R96 100k
5 %
0402
COMMON
IFPF_HPD_C
IFPF_AUX_C* IFPF_AUX_C
IFPF_L3_C* IFPF_L3_C
IFPF_L2_C* IFPF_L2_C
IFPF_L1_C* IFPF_L1_C
IFPF_L0_C* IFPF_L0_C
DP_PWR_EF
GND
IFPF_AUX_C IFPF_AUX_C
IFPF_TXC_C_DP IFPF_TXC_C_DP
IFPF_TXD0_C_DP IFPF_TXD0_C_DP
IFPF_TXD1_C_DP IFPF_TXD1_C_DP
IFPF_TXD2_C_DP IFPF_TXD2_C_DP
[D_AUX_CLAMP*_DP]
D12
@discrete.d_3pin_ac(sym_1):page19_i45
3
0.1A 100V SOT23 DNI
1 2
GND
[D_AUX_CLAMP_DP]
D11
@discrete.d_3pin_ac(sym_1):page19_i38
3
0.1A 100V SOT23 DNI
1 2
90DIFF_NETCLASS1 90DIFF_NETCLASS1
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
GND
IFPF_MODE
[C_AUX_GATE_DP]
C897 10nF
16V 10% X7R 0402 COMMON
[C_AUX_CLAMP*_DP]
GND
C903
0.1uF
16V 10% X7R 0402 DNI
12V_F
J7
Hot_Det
18 17
AUX_CHn AUX_CHp
15
ML_Lane_3n
12
ML_Lane_3p
10
ML_Lane_2n
9
ML_Lane_2p
7
ML_Lane_1n
6
ML_Lane_1p
4
ML_Lane_0n
3
ML_Lane_0p
1
MODE
13
14
CEC
_ VVVV314_10 N5W-20M0610-A43
[R_MODE_BJT_PU1_DP]
R768 10k
5 % 0402 COMMON
[Q_MODE_BJT2_DP]
DP_W/GASKET
3
1B1C1E
C
Q510
IFPF_MODE*
B
@discrete.q_npn(sym_1):page19_i43
1
SOT23_1B1C1E
COMMON
E
2
GND GND
20
DP_PWR
MEC1
MEC1
19
PWR_RTN
X1
X1
X2
X2
X3
X3
X4
X4
2
GND_0
5
GND_1
8
GND_2
11
GND_3
16
GND_6
GND
3V3_F
[R_MODE_BJT_PU2_DP]
R766
4.7k
5 % 0402 COMMON
[Q_MODE_BJT1_DP]
3
C
Q512
@discrete.q_npn(sym_1):page19_i55
SOT23_1B1C1E
COMMON
E
2
1B1C1E
B
1
DP_PWR_EF
IFPF_MODE_R
[R_MODE_DP]
DP_PWR_EF
GND
R764
0402 COMMON
5 %
[C_DP_PWR_DP]
C27
0.1uF
16V 10% X7R 0402 DNI
4.7k
IFPF_MODE_C
GND
[R_MODE_PD_DP]
R743 1M
5 % 0402 COMMON
1
2
3
4
Two cases to be considered:
1
2
18
3
18
18 18
18 18
18 18
18 18
23
BI BI
BI BI
BI BI
BI BI
BI BI
OUT
IFPF_AUX* IFPF_AUX
IFPF_L3* IFPF_L3
IFPF_L2* IFPF_L2
IFPF_L1* IFPF_L1
IFPF_L0* IFPF_L0
GPIO8_IFPF_HPD
4
1. DP AUX to DP connector: AUX AC coupled
2. DP AUX to DP-DVI dongle: AUX pass through
[R_AUX_PD*_DP]
R771
100k
5 %
0402
COMMON
GND
IFPF_AUX_C IFPF_AUX_C
IFPF_TXC_C_DP IFPF_TXC_C_DP
IFPF_TXD0_C_DP IFPF_TXD0_C_DP
IFPF_TXD1_C_DP IFPF_TXD1_C_DP
IFPF_TXD2_C_DP IFPF_TXD2_C_DP
90DIFF_NETCLASS1 90DIFF_NETCLASS1
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
3V3_F
R648 10k
5 % 0402 COMMON
3
C
Q531
@discrete.q_npn(sym_1):page19_i5
SOT23_1B1C1E
COMMON
2
GND
E
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
1
1B1C1E
B
2S3
G
1
1
G
2S3
Hotplug Detection
R683
0402
R674 100k
5 % 0402 COMMON
GND
IFPF_AUX_BYP*
D
[Q_AUX_FET1*_DP] COMMON
@discrete.q_fet_n_enh(sym_6):page19_i26
Q516
SOT23_1G1D1S
[Q_AUX_FET1_DP] SOT23_1G1D1S
Q514
@discrete.q_fet_n_enh(sym_6):page19_i25 COMMON
D
IFPF_AUX_BYP
[R_AUX_PD_DP]
R770 100k
5 % 0402 DNI
GND
C117 0.1uF
COMMON
C139 0.1uF
COMMON
C160 0.1uF
COMMON
C37
0.1uF
COMMON
100k
COMMON
5 %
[R_AUX_CONN_PU*_DP]
[C_AUX_COUP*_DP]
C237
0.1uF
0402 16V
10% X7R COMMON
90DIFF_NETCLASS1
90DIFF_NETCLASS1
[C_AUX_COUP_DP]
C239
0402
C133 0.1uF
COMMON
C140
0.1uF
COMMON
C161
0.1uF
COMMON
C39
0.1uF
COMMON
IFPF_HPD_RIFPF_HPD_R_Q
C610 220pF
50V 5% C0G 0402 COMMON
GND
0.1uF
16V 10% X7R COMMON
R569
0603 COMMON
0.05 ohm
PLACE CLOSE
TO CONNECTOR
S3D
2
G
1
1
G
S3D
2
0ohm
[Q_AUX_FET2*_DP] COMMON SOT23_1G1D1S @discrete.q_fet_n_enh(sym_7):page19_i30
Q46
[Q_AUX_FET2_DP]
Q45
@discrete.q_fet_n_enh(sym_7):page19_i29 SOT23_1G1D1S COMMON
C597 220pF
50V 5% C0G 0402 DNI
GND
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
IFPF DP
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
IFPF DP
IFPF DP
IFPF DP
MS-V317
19 37
19 37
19 37
19 OF 37
04-AUG-2014
1.0
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
PAGE DATE
H
5
1.0
1.0
Page 20
Page20: IFPC HDMI
1
2
4,09,16,17,18,21
PEX_VDD
3
A B C D E F G H
C833
4.7uF
6.3V 20% X5R 0603 COMMON
* I2C to DDC level switching
HDMI
DP
HDMI
DP
R18 10k
5 % 0402 COMMON
Q1
1G1D1S
1G1D1S
3
C
E
2
ALL
G
1
D
2S3
60V
0.3A 2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A
0.35W 20V
ALL
G
1
D
2S3
60V
0.3A 2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A
0.35W 20V
1B1C1E
B
1
Q519
@discrete.q_fet_n_enh(sym_2):page20_i158 SOT23_1G1D1S COMMON
I2CW_SDA_Q
Q522
@discrete.q_fet_n_enh(sym_2):page20_i159 SOT23_1G1D1S COMMON
I2CW_SCL_Q
C879
0.1uF
0402
COMMON
C881
0.1uF
0402 COMMON
C883
0.1uF
0402 COMMON
C885
0.1uF
0402
COMMON
R2 100k
5 % 0402 COMMON
GND GND
3V3_F
R728 10k
5 %
DVI_HDMI_SIGNALS
G1O
@digital.u_gpu_gb3b_256(sym_8):page20_i99 BGA1745 COMMON
C771
0.1uF
16V 10% X7R 0402 COMMON
BB14
BB12
BA11 BA12
8/21 IFPC
IFPCD_RSET
IFPCD_PLLVDD
IFPC
IFPCD_IOVDD IFPCD_IOVDD
DVI/HDMI
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
DP
IFPC_AUX_SDA IFPC_AUX_SCL
IFPC_L3 IFPC_L3
IFPC_L2 IFPC_L2
IFPC_L1 IFPC_L1
IFPC_L0 IFPC_L0
23
IFPC_RSET
R645
1k
0402
COMMON
1 %
GND
3V3_PLL
IN
GND
C825
C752
0.1uF
16V 10% X7R 0402 COMMON
C1211
0.1uF
16V 10% X7R 0402 COMMON
GND
1uF
6.3V 10% X5R 0402 COMMON
DVI_HDMI_SIGNALS
I2CW_AUX*
BF2
I2CW_AUX
BG2
IFPC_TXC*
BE11
IFPC_TXC
BD11
IFPC_TXD0*
BC12
IFPC_TXD0
BD12
IFPC_TXD1*
BE14
IFPC_TXD1
BF14
IFPC_TXD2*
BD14
IFPC_TXD2
BC14
IFPC_TXD2_C_DP DVI_HDMI_SIGNALS
GPIO15_IFPC_HPD
OUT
0402 COMMON
3V3_F
R734 10k
5 % 0402 COMMON
DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALSIFPC_TXD2_C_DP
3V3_F
@discrete.q_npn(sym_1):page20_i88
SOT23_1B1C1E
COMMON
GND
0402
R5
DP
DP
C880 0.1uF
0402 COMMON
C882 0.1uF
C884
0402 COMMON
C886
0402
100k
COMMON
5 %
IFPC_MODE_Q*
DP
HDMI
DP
COMMON0402
0.1uF
0.1uF
COMMON
DDC_5V
R786 0ohm
HDMI
0.05 ohm 0402 DNI
IFPC_ESD
DDC_5V
D507
@discrete.d_3pin_ac(sym_1):page20_i47
3
0.1A
100V
SOT23
DNI
1 2
HDMI
IFPC_TXC_C1* IFPC_TXC_C1
IFPC_TXD0_C1* IFPC_TXD0_C1
IFPC_TXD1_C1* IFPC_TXD1_C1
IFPC_TXD2_C1* IFPC_TXD2_C1
C8 220pF
50V 5% C0G 0402 COMMON
GND
R9
0.05 ohm
D506
@discrete.d_3pin_ac(sym_1):page20_i58
3
0.1A 100V SOT23 DNI
1 2
GND
DP
DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
HDMI_C_HPD_CHDMI_C_HPD_RHDMI_C_HPD_R_Q
0ohm
COMMON0603
C5 220pF
50V 5% C0G 0402 DNI
GND
DEFAULT_CAPACITOR_10000pF_2_1
C870 10nF
16V 10% X7R 0402 COMMON
GND
R801 2k
5 %
HDMI
0402 COMMON
R802 2k
5 %
HDMI
0402 COMMON
3V3_F
R752 0ohm
0.05 ohm
HDMI
0402 COMMON
DDC_5V
C1 1uF
6.3V 10% X5R 0402 COMMON
J2501
19
HP_DET
I2CW_SDA_C I2CW_SCL_C
GND
GND
18
+5V
17
GND
16
SDA
15
SCL
14
NC
13
CE Remote
12
CK-
11
CK_Shield
10
CK+
9
D0-
8
D0_Shield
7
D0+
6
D1-
5
D1_Shield
4
D1+
3
D2-
2
D2_Shield
1
D2+
HDMI19PSM_BLACK-RH-5
HDMI_S19_16 COMMON
VVVV30316S1
N5Y-19M0760-W06
SHELL1 SHELL2
SHELL3 SHELL4
MEC1
MEC2
X1 X2 MEC1
MEC2 X3 X4
1
2
GND
3
3V3_F
4
Fused DP_PWR
3V3_F
C32
0.1uF
16V 10% X7R 0402 COMMON
GND
R647
3V3_DP_PWR_EN
10k
0402
COMMON
5 %
DP-SKU
U5
@analog.u_sw_pwr_tps2031(sym_1):page20_i164 SO8 COMMON
2
IN
3
IN
4
EN
5
OC*
3.3V
1.0A
8
OUT OUT OUT
GND
0.406
7
R619
6
4.7k
5 % 0402 COMMON
1
GND GND GND GND
GND
C783
0.1uF
16V 10% X7R 0402 COMMON
C590 22uF
6.3V 20% X5R 0805LP COMMON
DP_PWR
C29 470uF
COMMON 20%
6.3V TA-Polymer
7.3A@45degC,100KHz
0.005ohm SMD_7343
C969 22UF
6.3V 20% X5R 0805 COMMON
VVVV284260
C11-2267014-T04
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
1G1D1S
VVVV284260
C11-2267014-T04
ASSEMBLY PAGE DETAIL
D
Q524
@discrete.q_fet_n_enh(sym_2):page20_i104 SOT23_1G1D1S
G
1
COMMON
S
GND
C968 22UF
6.3V 20% X5R 0805 COMMON
3
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
IFPC_TERM_EN_D
DP_PWR
C966
C967
22UF
22UF
6.3V
6.3V 20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV284260
VVVV284260
C11-2267014-T04
C11-2267014-T04
BASE LEVEL GENERIC SCHEMATIC ONLY
IFPC HDMI/DP
GND
GNDGNDGNDGND
C965 22UF
6.3V 20% X5R 0805 COMMON
VVVV284260
C11-2267014-T04
R816 499ohm
1 % 0402 COMMON
1
R815 499ohm
1 % 0402 COMMON
1
R808 499ohm
1 % 0402 COMMON
1
IFPC_TXC_C1* IFPC_TXC_C1
IFPC_TXD0_C1* IFPC_TXD0_C1
1 2
4 5
R807 499ohm
1 % 0402 COMMON
1
U105
R814 499ohm
1 % 0402 COMMON
1
10
NC
9
NC
7
NC
6
NC
ESD-ESD3V3U4ULC-RH
3
8
VVVV30321S
D0G-05A0300-I14
ESD_2_5X1
COMMON
FDBA
R813 499ohm
1 % 0402 COMMON
1
IFPC_TXC_C1* IFPC_TXC_C1
IFPC_TXD0_C1* IFPC_TXD0_C1
R812 499ohm
1 % 0402 COMMON
1
IFPC_TXD1_C1* IFPC_TXD1_C1
IFPC_TXD2_C1* IFPC_TXD2_C1
1
REMOVE DP / Change HDMI connect
R811 499ohm
1 % 0402 COMMON
U106
1 2
4 5
3
10
IFPC_TXD1_C1*
NC
9
IFPC_TXD1_C1
NC
7
IFPC_TXD2_C1*
NC
6
IFPC_TXD2_C1
NC
ESD-ESD3V3U4ULC-RH
8
VVVV30321S
D0G-05A0300-I14
ESD_2_5X1
COMMON
G
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
BOM REV
IFPC HDMI
IFPC HDMI
IFPC HDMI
MS-V317
H
14ci203
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
PAGE DATE
20 37
20 37
20 37
20 OF 37
04-AUG-2014
4
5
1.0
1.0
1.0
Page 21
A B C D E F G H
Page21: IFPD DP
1
2
3
16,17,18,20
4
PEX_VDD
R788
COMMON
R789
COMMON
DP_D_HPD_C
IFPD_AUX_C* IFPD_AUX_C
IFPD_L3_C* IFPD_L3_C
IFPD_L2_C* IFPD_L2_C
IFPD_L1_C* IFPD_L1_C
IFPD_L0_C* IFPD_L0_C
DP_PWR
1
100k
5 % 0402
100k
5 % 0402
3
3
GND
D508
@discrete.d_3pin_ac(sym_1):page21_i249
0.1A 100V SOT23 DNI
1 2
GND
D509
@discrete.d_3pin_ac(sym_1):page21_i244
0.1A 100V SOT23 DNI
1 2
90DIFF_NETCLASS1 90DIFF_NETCLASS1
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
C873
0.1uF
16V 10% X7R 0402 DNI
GND
12V_F
R36 10k
5 % 0402 COMMON
DP_MODE
C42 10nF
16V 10% X7R 0402 COMMON
GND
Q8
@discrete.q_npn(sym_1):page21_i280
SOT23_1B1C1E
COMMON
GND GND
J1
Hot_Det
18 17
AUX_CHn AUX_CHp
15
ML_Lane_3n
12
ML_Lane_3p
10
ML_Lane_2n
9
ML_Lane_2p
7
ML_Lane_1n
6
ML_Lane_1p
4
ML_Lane_0n
3
ML_Lane_0p
1
MODE
13
14
CEC
DP_W/GASKET
_ VVVV314_10 N5W-20M0610-A43
3
C
1
E
2
DP_PWR
MEC1
PWR_RTN
X1 X2 X3
X4 GND_0 GND_1
GND_2
GND_3 GND_6
3V3_F
R37
4.7k
5 %
DP_MODE*
GND
0402 COMMON
3
C
Q3
@discrete.q_npn(sym_1):page21_i284
SOT23_1B1C1E
COMMON
E
2
1B1C1E
B
1
DP_MODE_R
DP_PWR
DP_PWR
GND
R11
4.7k
0402
COMMON
C3
0.1uF
16V 10% X7R 0402 DNI
5 %
DP_MODE_C
R12 1M
5 % 0402 COMMON
GND
2
3
4
1B1C1E
B
20
MEC1
19 X1 X2 X3 X4 2 5 8 11 16
Two cases to be considered:
1. DP AUX to DP connector: AUX AC coupled
2. DP AUX to DP-DVI dongle: AUX pass through
C871 0.1uF
16V0402 10% X7R
C15 0.1uF
C10
C17 0.1uF
C12 0.1uF
90DIFF_NETCLASS1
90DIFF_NETCLASS1
C872 0.1uF
0402
COMMON
0.1uF
COMMON
COMMON
COMMON
R10
0402
COMMON
S3D
2
COMMON SOT23_1G1D1S
G
@discrete.q_fet_n_enh(sym_7):page21_i247
Q4
1
1
G
Q5
@discrete.q_fet_n_enh(sym_7):page21_i241 SOT23_1G1D1S COMMON
S3D
2
16V 10% X7R COMMON
DP_D_HPD_RDP_D_HPD_R_Q
100k
COMMON
5 %
C13 220pF
50V 5% C0G 0402 COMMON
R4
0ohm
COMMON
0603
0.05 ohm
C6 220pF
50V 5% C0G 0402 DNI
IFPD_AUX_BYP*
D
2S3
COMMON
G
@discrete.q_fet_n_enh(sym_6):page21_i219
Q6
SOT23_1G1D1S
1
SOT23_1G1D1S
1
G
Q7
@discrete.q_fet_n_enh(sym_6):page21_i218 COMMON
D
2S3
IFPD_AUX_BYP
G1P
@digital.u_gpu_gb3b_256(sym_9):page21_i315 BGA1745 COMMON
9/21 IFPD
C775
0.1uF
16V 10% X7R 0402 COMMON
C770
0.1uF
16V 10% X7R 0402 COMMON
GM204 GK104
BE12
NC
RSET
BB11
BA14 BA15
NC
IFPD
IFPD_IOVDD IFPD_IOVDD
PLLVDD
IFPD_AUX_SDA IFPD_AUX_SCL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
IFPD_L3 IFPD_L3
IFPD_L2 IFPD_L2
IFPD_L1 IFPD_L1
IFPD_L0 IFPD_L0
DVI/HDMI DP
IFPD_AUX*
BF4
IFPD_AUX
BG4
IFPD_L3*
BH9
IFPD_L3
BG9
IFPD_L2*
BG11
IFPD_L2
BH11
IFPD_L1*
BJ11
IFPD_L1
BJ12
IFPD_L0*
BH12
IFPD_L0
BG12
IFPD_RSET
R654
1k
COMMON
0402
1 %
GND
3V3_PLL
IN
GND
C1212
C1213
C1214
1uF
6.3V 10% X5R 0402 COMMON
0.1uF
16V 10% X7R 0402 COMMON
4.7uF
6.3V 20% X5R 0603 COMMON
GND
23
GPIO17_IFPD_HPD
OUT
IFPD_AUX_C IFPD_AUX_C
IFPD_L3_C IFPD_L3_C
IFPD_L2_C IFPD_L2_C
IFPD_L1_C IFPD_L1_C
IFPD_L0_C IFPD_L0_C
R745
100k
5 %
0402
COMMON
90DIFF_NETCLASS1 90DIFF_NETCLASS1
GND
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
DP_SIGNALS DP_SIGNALS
3V3_F
R26 10k
5 % 0402 COMMON
3
C
Q2
@discrete.q_npn(sym_1):page21_i307
SOT23_1B1C1E
COMMON
E
2
GND
R746 100k
5 % 0402 DNI
GND
C14 0.1uF
COMMON
C9 0.1uF
COMMON
C16 0.1uF
COMMON
C11 0.1uF
COMMON
Hotplug Detection
1B1C1E
B
1
R17 100k
5 % 0402 COMMON
GND GND GND
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
IFPD DP
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
IFPD DP
IFPD DP
IFPD DP
MS-V317
5
1.0
1.0
21 37
21 37
21 37
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04-AUG-2014
1.0
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
PAGE DATE
H
Page 22
A B C D E F G H
Page22: MIOA/B Interface and FRAME LOCK
1
2
3V3_RUN
GND
C804
4.7uF
6.3V 20% X5R 0603 COMMON
C762 1uF
16V 10% X5R 0402 COMMON
C800
0.1uF
16V 10% X7R 0402 COMMON
C764
0.1uF
16V 10% X7R 0402 COMMON
GND
R670
49.9ohm
0402
COMMON
1 %
R671 49.9ohm
0402 COMMON
1 %
GND
C824
0.1uF
16V 10% X7R 0402 COMMON
0.305
2.5V
MIOA_CAL_PD_VDDQ
MIOA_CAL_PU_GND
0.0V
R677 1k
1 % 0402 COMMON
MIOA_VREF
R678 1k
1 % 0402 COMMON
CN1B
MIOA_D4_DE
C2 D4 C4 C5 D6 C6 C8
D9 D10 C10 D12 C12 C13
D5
C9 D13
D8
C1
D1
D2
@design_lib.con_mio_26(sym_9):page22_i665
NONPHY_DUAL_6GND COMMON
SLI_B - EMI SHIELD 2/2
DR<0> DR<1> DR<2> DR<3> DR<4> DR<5> DR<6> DR<7> DR<8> DR<9> DR<10> DR<11> DR<12> DR<13> DR<14>
DR_CMD DR_CLK
RASTER_SYNC SWAP_RDY
EXT_REFCLK
SLI_LED
1
SLI_LED
C7 D3
GND
D7
GND
D11
GND
C3
GND
C11
GND
IN
22,35
GND
5
GND
6
GND
4
GND
GND
2
G1R
@digital.u_gpu_gb3b_256(sym_11):page22_i635 BGA1745 COMMON
11/21 MIOA
AJ10
VDD33
AJ11
VDD33
AK11
VDD33
AJ9
MIOACAL_PD_VDDQ
AJ8
AM1
MIOACAL_PU_GND
MIOA_VREF
0.305
0.305
1.65V
MIOAD0 MIOAD1 MIOAD2 MIOAD3 MIOAD4 MIOAD5 MIOAD6 MIOAD7 MIOAD8
MIOAD9 MIOAD10 MIOAD11
MIOA_CTL3 MIOA_HSYNC MIOA_VSYNC
MIOA_DE
MIOA_CLKOUT MIOA_CLKOUT
MIOA_CLKIN
AJ7 AJ2 AJ6 AJ5 AK4 AJ4 AK9 AK3 AM3 AK7 AM2 AK6
23
22,23
MIOA_CTL3
AK5
MIOA_HSYNC
AJ1
MIOA_VSYNC
AK8
MIOA_DE
AM4
MIOA_CLKOUT
AK1 AK2
MIOA_CLKIN
AJ3
BI
BI
MIO_SIGNALS
MIOA_D[11..0]
MIOA_D0
0
MIOA_D1
1
MIOA_D2
2
MIOA_D3
3
MIOA_D4
4
MIOA_D5
5
MIOA_D6
6
MIOA_D7
7
MIOA_D8
8
MIOA_D9
9
MIOA_D10
10
MIOA_D11
11
GPIO23_RASTER_SYNC1
MIO_SIGNALS
GPIO22_SWAPRDY_IN
MIO_SIGNALS MIO_SIGNALS MIO_SIGNALS MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
3V3_RUN
R749 1k
1 % 0402 COMMON
MIOA_D0
0
MIOA_D1
1
MIOA_D2
2
MIOA_D3
3
MIOA_D4
4
MIOA_D5
5
MIOA_D6
6
MIOA_D7
7
MIOA_D8
8
MIOA_D9
9
MIOA_D10
10
MIOA_D11
11
R732
33ohm
0402
COMMON
5 %
MIOA_RASTER_SYNC1
MIOA_DE_D4
3
G1Q
@digital.u_gpu_gb3b_256(sym_12):page22_i636 BGA1745
3V3_RUN
C805
C801
C763
C774
4.7uF
1uF
16V
6.3V 20%
10%
X5R
X5R
0603
0402 COMMON
COMMON
4
GND
0.1uF
16V 10% X7R 0402 COMMON
0.1uF
16V 10% X7R 0402 COMMON
GND
R681 49.9ohm
COMMON
0402
1 %
R665 49.9ohm
COMMON
0402
1 %
GND
C837
0.1uF
16V 10% X7R 0402 COMMON
MIOB_CAL_PD_VDDQ
MIOB_CAL_PU_GND
0.0V
R682 1k
1 % 0402 COMMON
MIOB_VREF
R686 1k
1 % 0402 COMMON
0.305
1.65V
COMMON
12/21 MIOB
AM11
VDD33
AN11
VDD33
AR11
VDD33
0.305
3.3V
AR5
MIOBCAL_PD_VDDQ
AR4
MIOBCAL_PU_GND
0.305
AR1
MIOB_VREF
MIOBD0 MIOBD1 MIOBD2 MIOBD3 MIOBD4 MIOBD5 MIOBD6 MIOBD7 MIOBD8
MIOBD9 MIOBD10 MIOBD11
MIOB_D0
AM8
MIOB_D1
AM6
MIOB_D2
AM9
MIOB_D3
AN9
MIOB_D4 MIOB_D4
AN5
MIOB_D5
AN8
MIOB_D6
AR7
MIOB_D7 MIOB_D7
AN4
MIOB_D8
AN1
MIOB_D9
AR6
MIOB_D10
AN6
MIOB_D11
AR2
22,23
MIOB_CTL3
MIOB_HSYNC
MIOB_VSYNC
MIOB_DE
MIOB_CLKOUT MIOB_CLKOUT
MIOB_CLKIN
MIOB_HSYNC
AM7
MIOB_VSYNC
AN7
MIOB_DE
AR3
MIOB_CLKOUT
AN3 AN2
MIOB_CLKIN
AM5
MIOB_CTL3
AR8
23
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
BI
BI
ASSEMBLY PAGE DETAIL
MIO_SIGNALS
MIOB_D[11..0]
0 1 2 3 4 5 6 7 8
9 10 11
GPIO22_SWAPRDY_IN
MIO_SIGNALS
MIO_SIGNALS MIO_SIGNALS MIO_SIGNALS MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
GPIO21_RASTER_SYNC0
BASE LEVEL GENERIC SCHEMATIC ONLY
MIOA/B Interface and Frame Lock
3
CN1A
@design_lib.con_mio_26(sym_10):page22_i664
NONPHY_DUAL_6GND COMMON
SLI - EMI SHIELD
MIOB_D0
0
MIOB_D1
1
MIOB_D2
2
MIOB_D3
3 4
MIOB_D5
5
MIOB_D6
6 7
MIOB_D8
8
MIOB_D9
9
MIOB_D10
10
MIOB_D11
11
MIOB_DE
1/2
A2
DR<0>
B4
DR<1>
A4
DR<2>
A5
DR<3>
B6
DR<4>
A6
DR<5>
A8
DR<6>
B9
DR<7>
B10
DR<8>
A10
DR<9>
B12
DR<10>
A12
DR<11>
A13
DR<12>
B5
DR<13>
A9
DR<14>
B13
DR_CMD
B8
DR_CLK
A1
RSTR_SYNC
B1
SWAP_RDY
B2
EXT_REFCLK
SLI_LED
SLI_LED
A7 B3
GND
B7
GND
B11
GND
A3
GND
A11
GND
IN
GND
1
GND
2
GND
3
GND
22,35
4
GND
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
R738 33ohm
5 %
COMMON0402
FDBA
MSI
MSI
MSI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
G
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
600-1G401-BASE-QS1
PG401-A02 A
MS-V317
MIOA/B Interface and FRAME LOCK
MIOA/B Interface and FRAME LOCK
MIOA/B Interface and FRAME LOCK
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
PAGE DATE
H
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22 37
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5
1.0
1.0
1.0
Page 23
A B C D E F G H
Page23: MISC1: Fan, Thermal, JTAG, GPIO, STEREO
1
G1S
@digital.u_gpu_gb3b_256(sym_13):page23_i344 BGA1745 COMMON
13/21 MISC_1
AV7
OVERT
GPIO8
0.254
2
3
C860
2.2nF
16V 10% X7R 0402 DNI
0.254
PLACE NEAR U505
R687 10k
5 % 0402 COMMON
GND
GM204 GK104
BE1
THERMDN
BF1
THERMDP
BJ20
JTAG_TCK
BF20
JTAG_TMS
BG20
JTAG_TDI
BH20
JTAG_TDO
BF21
JTAG_TRST
GK104 GM204
GPIO8_NC
GPIO25_NC GPIO26_NC GPIO27_NC
I2CS_SCL I2CS_SDA
I2CC_SCL
I2CC_SDA
I2CB_SCL I2CB_SDA
GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27
3V3_RUN
C46
0.1uF
16V 10% X7R 0402
R779
2.2k
5 % 0402 COMMON
1 4
6 5
GND
R804 10k
5 % 0402 DNI
DNI
GND
THERM_OVERT*
GPIO9_THERM_ALERT*
3V3_RUN
R756
2.2k
5 % 0402 COMMON
27
33
27,35 31 19
35
R666 10k
5 % 0402 COMMON
3V3_RUN
3V3_RUN
IN BI BI BI
U505
@analog.u_temp_ad1032(sym_1):page23_i354 SO8_122MIL DNI
THERM_DP THERM_DN
2 3
8 7
VDD
D+ D-
THERM ALERT
SCL
GND
SDA
3V3_RUN 3V3_RUN
R780
R817 1k
5 % 0402 COMMON
2.2k
5 % 0402 COMMON
OUT
OUT
OUT OUT
IN
OUT
R818 10k
5 % 0402 DNI
I2CS_SCL
BF3
I2CS_SDA
BE3
I2CC_SCL I2CC_SCL_R
BD2
I2CC_SDA I2CC_SDA_R
BD1
I2CB_SCL I2CB_SCL_R
BB5
I2CB_SDA I2CB_SDA_R
BB4
GPIO0_NVAPI_1_PWM_VID
AT9
GPIO0
AT7
GPIO1
AV1
GPIO2
GPIO3_NVAPI_4_WARN
AW4
GPIO3
AW1
GPIO4
GPIO5_FRAME_LOCK_INT
AT4
GPIO5
GPIO6_PSI*
AT1
GPIO6
GPIO7_FBVDD_SEL
AT10
GPIO7
GPIO8_IFPF_HPD
AV8
GPIO8
GPIO9_THERM_ALERT*
AW7
GPIO9
AT6
GPIO11_LOGO_LED
AV2
GPIO12_LOW_PERF*
AV4
GPIO13_FAN_TACH
AT5
GPIO14_IFPA_HPD
AW5
GPIO15_IFPC_HPD
AV6 AW2
GPIO16_FAN_PWM
GPIO17_IFPD_HPD
AW6
GPIO18_IFPE_HPD
AW3 AT8
GPIO20_SLI_LED_DIM
AV5
GPIO21_RASTER_SYNC0
AT3
GPIO22_SWAPRDY_IN
AR9
GPIO23_RASTER_SYNC1
AV3
GPIO24_SWAPRDY_OUT
AT2 AV9 AR10
GPIO27_FLASH_PROTECT
AN10
R1281
R1276 10k
10k
3V3_RUN
5 %
5 %
0402
0402
COMMON
COMMON
GND
R797
GND
5 %
R757
0402
50OHM_NETCLASS1
50OHM_NETCLASS1
MIO_SIGNALS 50OHM_NETCLASS1 50OHM_NETCLASS1
50OHM_NETCLASS1
MIO_SIGNALS MIO_SIGNALS MIO_SIGNALS
1G1D1S
R747 10k
5 % 0402 DNI
33ohm
G
1
IN
BI
COMMON0402
5 %
IN
IN IN
IN IN
D
S
R798
33ohm
0402 COMMON
5 %
R759
33ohm
33ohm
0402
COMMON
5 %
COMMON
50OHM_NETCLASS1
3
Q523
@discrete.q_fet_n_enh(sym_2):page23_i394 SOT23_1G1D1S DNI
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
3
3
33,35 17
20 21
18
R73 10k
1 % 0402 COMMON
R753
2.2k
5 % 0402 COMMON
3V3_RUN
3V3_RUN
R41
R741 10k
10k
5 %
5 %
0402
0402
COMMON
DNI
R667 10k
5 %
3V3_RUN
0402 COMMON
GND
35
22 22 22
R163 10k
5 % 0402 COMMON
3V3_RUN 3V3_RUN
R164 1k
5 % 0402 COMMON
R165 10k
5 % 0402 DNI
GPIO9_THERM_ALERT* GPIO10_FBVREF_SEL
D8
3
@discrete.d_3pin_cc(sym_2):page23_i301 30V
0.2A SOT23 COMMON
1
2
1
OUT
12V_F
R509
R505
0ohm
0ohm
0.05 ohm
0.05 ohm 0805
0805
COMMON
COMMON
25MIL
C501 820pF
50V 10% X7R 0402 COMMON
34
GPIO16_FAN_PWM
FAN_PWR
C502 1uF
16V 10% X5R 0603 COMMON
33
33
32
32
33,34 5,07,10,12
J200
GPIO13_FAN_TACH
GND
1 2 3 4
TOWS_TIN_BHEAD1X4_2MM
J201
6 5
FOR DT SKU
4 3 2 1
BH1X6H-2PITCH-RH-1
FOR WS SKU
TOWS_BHEAD1X6_1
7511_FAN_TACH 7511_FAN_PWM
MALE
2.0MM N/A
COMMON
IN
IN
2
3
32 32
OUT
BI
OUT
BI
OUT OUT
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
MISC1: Fan, Thermal, JTAG, GPIO, Stereo
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
MISC1: Fan, Thermal, JTAG, GPIO, STEREO
MISC1: Fan, Thermal, JTAG, GPIO, STEREO
MISC1: Fan, Thermal, JTAG, GPIO, STEREO
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
600-1G401-BASE-QS1
PG401-A02 A
Sheet ofDate:
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23 37
23 37
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PAGE DATE
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1.0
23 OF 37
04-AUG-2014
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Page 24
A B C D E F G H
Page24: MISC2: ROM, XTAL, Straps
KEPLER
STRAP0
STRAP1
1
STRAP2
STRAP3
STRAP4
USER_BIT [3:0]*
3GIO_PADCFG_LUT_ADR*
PCI_DEVID [3:0]*
SOR_EXPOSED [3:0]*
DP_PLL_VDD_33V*
PEX_MAX_SPEED*
PEX_SPD_CHANGE_GEN3*
0000*
0000*
0100 - (0x1184)*
1111*
1* FOR 3_3V*
1*
FOR GEN2/3*
1* ENABLED*
5K PD*
5K PD Desktop*
25K PD -425 GPU*
45K PU*
45K PD*
GC6
*
RAMCFG[0]*
2
ROM_SI
RAMCFG[1]*
RAMCFG[2]*
RAMCFG[3]*
VGA_DEVICE*
ROM_SO
SMB_ALT_ADDR*
FB[0]_APERTURE_SIZE*
FB[1]_APERTURE_SIZE*
3
ROM_SCLK
PEX_PLL_EN_TERM100*
PCI_DEVID_EXT[5]*
SUB_VENDOR*
PCI_DEVID_EXT[4]*
MULTI_STRAP_REF0_GND
BINARY PRODUCTION
BINARY BRINGUP
MULTI-LEVEL
4
R60
R63
4.99k
49.9k
1 %
1 %
0402
0402
DNI
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
5
COMMON
R722
4.99k
1 % 0402 DNI
R721
4.99k
1 % 0402 DNI
1*
0111 for 64Mx32 256 bit SAMSUNG
1*
SAMSUNG for SKU 0 primary memory
For 128MB*
For 0x1184*
R67
45.3k
1 % 0402 DNI
R716
34.8k
1 % 0402 DNI
45K PD*
3V3_RUN
R68
4.99k
1 % 0402 DNI
R714
45.3k
1 % 0402 DNI
30k PD*
25K PD*
1* 0*
0*
1* 1*
0*
1* For 128MB*
0*
0* DISABLED*
0* For 0x1184*
1* Dedicated BIOS*
0*
NC
NC
40.2k 1% TO GND
R64
4.99k
1 % 0402 DNI
R718
24.9k
1 % 0402 DNI
GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
RAMCFG[0]*
RAMCFG[1]*
RAMCFG[2]*
RAMCFG[3]*
VGA_DEVICE*
SMB_ALT_ADDR*
PCIE_CFG*
DEVID_SEL*
SOR0_EXPOSED*
SOR1_EXPOSED*
SOR2_EXPOSED*
SOR3_EXPOSED*
3.3V
GC6+ ISLAND
ENABLED
MAXWELL
SEE TABLE BELOW
1*
R55
45.3k
1 % 0402 COMMON
R56
24.9k
1 % 0402 DNI
20K PD*
10K PD*
45K PU*
0x13C0
1*
0*
0*
0*
0*
1*
1*
1*
1*
MAXWELL
STRAP0
1.65V 0V
GC6+ DEBUG
ROM_SI
ROM_SO
ROM_SCLK
GC6+ ISLAND
DISABLED
MODE
3V3_RUN
R54
R48
4.99k
10k
1 %
5 %
0402
0402 DNI
DNI
R53
R49
20k
10k
1 %
1 % 0402
0402
COMMON
COMMON
GND
C E
ASSEMBLY PAGE DETAIL
1V_PLL
C704
0.1uF
16V 10% X7R 0402 COMMON
GND
C806 22uF
6.3V 20% X5R 0805LP COMMON
remove 跳頁
BASE LEVEL GENERIC SCHEMATIC ONLY
MISC2: ROM, XTAL, Straps
GND
R172 0ohm
0402
0.05 ohm
C778
0.1uF
16V 10% X7R 0402 COMMON
3V3
GND
1000
0000
5k 10k
20k 25k 30k 35k 45k
R710
0402
1 %
VID_PLL
DNI
GND
3V3_RUN
XTALSSIN_GPU
R72
10k
5 % 0402 DNI
FL_REFCLK_T
C73 18pF
50V
5% C0G 0402
DNI
1001
0001 0001 32Mx32 256-bit Elpida 0010
1011
0011
1100
0100
1101
0101
1110
0110
1111
0111
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
MULTISTRAP_REF0_GND
40.2k
COMMON
C92
C93
47uF
4V 20% X5R 0805 COMMON
C761
0.1uF
16V 10% X7R 0402 COMMON
R679 100k
0402 COMMON
5 %
C698
10uF
0.1uF
16V
6.3V 10%
20% X5R
X7R
0603
0402
COMMON
COMMON
GND
GND
C659
0.1uF
16V 10% X7R 0402 COMMON
GND
R680 10k
5 % 0402 DNI
GND
R74 10k
5 % 0402 DNI
GND
KEPLER
CFG[3:0] Config Width Vendor
0000 Reserved
0010 32Mx32 256-bit Hynix101015k 0011 32Mx32 256-bit Samsung 0100 Reserved 0101 64Mx32 256-bit Elpida 0110 64Mx32 256-bit Hynix 0111 64Mx32 256-bit Samsung 1000 Reserved 1001 32Mx32 192-bit Elpida 1010 32Mx32 192-bit Hynix 1011 32Mx32 192-bit Samsung 1100 Reserved 1101 64Mx32 192-bit Elpida 1110 64Mx32 192-bit Hynix 1111 64Mx32 192-bit Samsung
G1U
@digital.u_gpu_gb3b_256(sym_15):page24_i149 BGA1745 COMMON
15/21 MISC_2
BA6
STRAP0
AW8
STRAP1
BA7
STRAP2
BA8
STRAP3
BB6
STRAP4
BB7
MULTISTRAP_REF0_GND
G1T
@digital.u_gpu_gb3b_256(sym_14):page24_i150 BGA1745 COMMON
14/21 XTAL/PLL
AW27
SP_PLLVDD
AW28
VID_PLLVDD
Y39
GPCPLL_AVDD0
AD11
GPCPLL_AVDD1
AT11
LXS_PLLVDD
BB3
XTALSSIN
BB2
XTALIN
50OHM_NETCLASS1
XTALIN
C58 18pF
50V 5% C0G 0402
GND GND
COMMON
GND
FDBA
ROM_SCLK
XTALOUTBUFF
Y1
@clocks.xtal_4pin(sym_2):page24_i83
SMD_60X35
50OHM_NETCLASS1
27MHz
COMMON
123 4
ROM_CS
ROM_SI
ROM_SO
BUFRST
XTALOUT
XTALOUT
CFG[3:0] Config Width Vendor
0000 Reserved 0001 128Mx32 256-bit Elpida 0010 128Mx32 256-bit Hynix 0011 128Mx32 256-bit Samsung 0100 Reserved 0101 64Mx32 256-bit Elpida 0110 64Mx32 256-bit Hynix 0111 64Mx32 256-bit Samsung
ROM_CS* ROM_CS_R
BA3 BA5
BA4 BA2
AW9
BB1 BA1
GND
R519
ROM_SI ROM_SI_R
R724 33ohm
ROM_SO
0402 COMMON
ROM_SCLK ROM_SCLK_R
R723 33ohm
GPU_BUFRST*
XTALSSIN XTALOUTBUFF
XTALOUTBUFF
R688
49.9k
1 % 0402 COMMON
GND
C57 18pF
50V 5% C0G 0402 COMMON
G
MAXWELL
3V3_RUN
R51 10k
5 % 0402 COMMON
33ohm
COMMON0402
5 %
5 %
COMMON0402
5 %
Smart Fan
PU PU
PU
PD
PU
PD
PD
PD
MAXWELL
XTALOUTBUFF
3.3V
33% PWM66% PWM
3V3_RUN
R685
49.9k
0402 COMMON
1 %
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
BOM REV
U4
@memory.u_mem_fl_ser_256kx8(sym_1):page24_i66 SO8 SO8 COMMON
7
HOLD8VCC
3
WP
1
CS
5
SI
2
SO
6
SCK
OUT
KEPLER
Inverted PWM %
66 (33% HIGH)
50 (50% HIGH)
33 (66% HIGH)
0 (100% HIGH)
1.65V
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
0V
DISABLED
MS-V317
MS-V317
MS-V317
MISC2: ROM, XTAL, Straps
MISC2: ROM, XTAL, Straps
MISC2: ROM, XTAL, Straps
1
2
3V3_RUN
C49
0.1uF
16V 10% X7R
4
0402
GND
COMMON
GND
34
Sheet ofDate:
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PAGE DATE
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H
3
4
5
1.0
1.0
1.0
Page 25
A B C D E F G H
Page25: PS: 5V, PEX_VDD
1
12V_F
PLACE 0603 10UF FOOTPRINT ON TOP OF 0805 FOOTPRINT
R6
12V 0.400
0ohm
DNI0603
0.05 ohm
@discrete.d_schottky(sym_3):page25_i8
D1
12
SOD323 20V 1A COMMON
* DDC backdrive
0.400
5V_VIN_D
C282 10uF
16V 20% X5R 0603 DNI
C7 10uF
16V 10% X5R 0805 COMMON
C4
0.1uF
16V 10% X7R 0402 COMMON
GND
@power_supply.u_vreg_3pin(sym_2):page25_i27
SOT223_GOI
U1
GOI,IGOI,TO263
1.25V
COMMON
315-0372-000
2
OUT3IN
4
TAB
GND/ADJ
1
5V_ADJ
R1
C280
124ohm
10uF
1 %
16V
0402
20%
COMMON
X5R 0603 DNI
R3 383ohm
PLACE 0603 10UF FOOTPRINT
1 %
ON TOP OF 0805 FOOTPRINT
0402 COMMON
Vref=1.256V Vo_Typ=1.256*(1+383/124)+60uA*383=5.16V
GND
C900 10uF
16V 10% X5R 0805 COMMON
C901
4.7uF
6.3V 20% X5R 0603 COMMON
5V
0.2A 20MIL
5V
F501
0.75A
1206 COMMON
1 2
C899
0.1uF
16V 10% X7R 0402 COMMON
GND
POLYSWITCH
DDC_5V
5V
0.2A
C898 10uF
6.3V 20% X5R 0603 COMMON
GND
1
2
25,27,31
3
1.053 = 0.8 * (1+7.5K/23.7K) Vout = Vref * (1+Rtop/Rbot)
PLACE 0603 10UF FOOTPRINT ON TOP OF 0805 FOOTPRINT
5V
R5014 0ohm
0.05 ohm 0805 COMMON
C907 10uF
16V 20% X5R 0603 DNI
GND
PS_NVVDD_PG
OUT
3V3_RUN
R5006 0ohm
0.05 ohm 0402 DNI
C5001
4.7uF
16V 10% X5R 0805LP COMMON
GND
RFB1
R5010
5 %
R5011 1k
5 %
R5007
23.7k
1 % 0402 COMMON
GND
10k
COMMON0402
COMMON0402
PEX_OVREG_PGOOD
PEX_OVREG_EN
PEX_OVREG_VCC
PEX_OVREG_FB
U5000
@power_supply.u_openvreg_type0(sym_1):page25_i109
0.8V
DFN10 COMMON
9
PGOOD
10
EN/FS
2
VCC
1
FB
CCP
C5002 680pF
PEX_OVREG_FB_RC
0402 50V
10% X7R COMMON
RFB2 STUFF R5000 FOR REMOTE SENSE
OpenVReg
315-0829-000
R5008
0402 COMMON
BOOT/NC
1 %
7.5k
THERM
PLACE 0603 10UF FOOTPRINT ON TOP OF 0805 FOOTPRINT
PEX_OVREG_VIN
C245
C2008
10uF
10uF
16V
16V
20%
10%
X5R
X5R 0805
0603 DNI
PEX_OVREG_BOOT
PEX_OVREG_SW
RCP
0402
0.05 ohm
0ohm
COMMON
GND
COMMON
3
VIN
GND
8
6
SW
7
SW
4
GND
5
GND
11
GND
R5009
4
25,27,31
3V3_RUN
PS_NVVDD_PG
OUT
R132 1k
0402 COMMON
5 %
C242 1uF
6.3V 10% X5R 0402 COMMON
GND
PS_1V_EN
U15
1.05V
@power_supply.u_vreg_5pin(sym_15):page25_i132 SC705 COMMON
315-0217-000
1
IN
EN4GND/NC
GND1
2
GND
OUT
3
VID_PLL
5
C243 1uF
6.3V 10% X5R 0402
GND
COMMON
GND
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
12V_F
R5005 0ohm
0.05 ohm 0805 COMMON
C2012 10uF
16V 10% X5R 0805 COMMON
039-0098-000
GND
1.0V0.400 2.7A
PEX_OVREG_FB_R
ASSEMBLY PAGE DETAIL
3V3_RUN
R5003 0ohm
0.05 ohm 0805 DNI
C244
R5013
10uF
10k
5 %
16V
0402
20%
DNI
X5R 0603 DNI
GND
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: 5V, PEX_VDD
C5003 0.1uF
0402
16V 10% X7R COMMON
131-0832-000
L2
1uH
SMD_045_041
COMMON
STUFF R621 FOR LOCAL SENSE
R621 0ohm
0.05 ohm 0402 DNI
2
PEX_VDD
1.0V
C2007
0.1uF
16V 10% X7R 0402 COMMON
2.7A
C2006 10uF
6.3V 20% X5R 0805LP COMMON
039-0123-000
C2005 22uF
6.3V 20% X5R 0805LP COMMON
039-0122-000
GND
<<OCC_ONLY>>
PEX_VDD
R5000
0ohm
COMMON0402
0.05 ohm
PEX_VDD 1V_PLL
LB5 30ohm
COMMONBEAD_0603
3
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
MS-V317
PS: 5V, PEX_VDD
PS: 5V, PEX_VDD
PS: 5V, PEX_VDD
1.0
1.0
1.0
Sheet ofDate:
25 37
Sheet ofDate:
25 37
Sheet ofDate:
25 37
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H
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A B C D E F G H
1
2
3
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY PS: FBVDD/Q
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
NA
NA
NA
600-1G401-BASE-QS1
PG401-A02 A
1.0
1.0
1.0
Sheet ofDate:
26 37
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PAGE DATE
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H
5
Page 27
A B C D E F G H
Page27: PS: NVVDD Controller
1
1
12V_F
R286 100K
1% 0402
R229 470
0805 +0.05R COMMON
30
6
VCC
12VMON
ROSC
GND
7
33
81174_ROSC
COMMON
R282 11K
1% 0402 COMMON
NCP81174MNTXG
GND
U20
29
DRVON
25
G1
17
CS1N
18
CS1
26
G2
19
CS2N
20
CS2
27
G3
21
CS3N
22
CS3
28
G4
23
CS4N
24
CS4
9
VSP
10
VSN
BOTTOM PAD CONNECT TO GND Through 4 VIAs
C301
0.1UF
16V 10% X7R 0402 COMMON
GND
5x5 QFN
CS1N CS1GPIO6_PSI*
CSP1 CSP4
CS2N CS2
CSP2 CSP5
CS3N CS3
CSP3 CSP6
CS4N CS4
CSP7
CSP8
R224 X_100K/0402
28,29
R2054.7K/0402 R1204.7K/0402
R2064.7K/0402 R2034.7K/0402
R1214.7K/0402
R2324.7K/0402
C284
28,29
0.1U/X7R/0402
R204 X_100K/0402
28,30
C293
28,30
0.1U/X7R/0402
R225 X_100K/0402
R207
28,30
4.7K/0402
28,30
C286
0.1U/X7R/0402
R236 X_100K/0402
R233
28,29
4.7K/0402
28,29
C302
0.1U/X7R/0402
VSN GND_SENSE
5V_PWM
R216 X_470K/0402
C290
1000P/0402
0.1U/X7R/0402
0.1U/X7R/0402
R848
0402 COMMON
R847
0402 COMMON
C287
C291
C294
0.1U/X7R/0402
C303
0.1U/X7R/0402
0
+0.05R
0
+0.05R
28,29,30
DRVON
28
PWM1
28,29
R295 100
5% 0402 COMMON
R296 100
CSN1 CSN4
PWM2 CSN2 CSN5
PWM3 CSN3 CSN6
PWM4 CSN7 CSN8
5% 0402 COMMON
28,29
28 28,30 28,30
28 28,30 28,30
28 28,29 28,29
NVVDD
IN
3
IN
3
R20820/0402
R21020/0402 R21120/0402
R21220/0402 R21320/0402
R234 20/0402 R235 20/0402
NVVDD_SENSEVSP
2
3
4
R230
R231
R228
470
470
3V3_F
R214
1K/0402
R1221K/0402
470P/0402
1 2
R127 0/0402
R201 39K/0402
NTC1
47KR 1%
_
0.1U/0402
C292
3V3_F 3V3_F
R117 1K/0402
C295
R223
3.3K/0402
R226 16.9K/0402
R220 1K/0402
R221 1K/0402
R119 39K/0402
REFIN
C298 1500P/0402
R858 1K/0402
5% 0402 COMMON
C296
0.1U/0402
DIFFOUT
C285
1800P/0402
C299 47P/0402
R125 1K/0402
81174_VDFB
R222 680/0402
R217
45.3K/0402
VFB VDRP
VREFVREF
C297
0.01U/0402
81174_VIDBUF
VREF
R124
39K/0402
3V3_F
R227
1K/0402
2
25,31 28,33,34 23 23,35
OUT IN
OUT
IN
PS_NVVDD_PG
NVVDD_EN
GPIO0_NVAPI_1_PWM_VID
R215 1K/0402 R20920/0402
R20275/0402
5V_PWM
STUFF FOR WS
12V_F
R854
750
0603 COMMON
5%
R853
750
0603 COMMON
5%
R852
750
0603
COMMON
3
4
5%
R851 750
06035%COMMON
R850
0603 DNI
5%
750
C300
0.1UF
16V 10% X7R 0402 DNI
GND
2013/03/12 del C211
431CA_5V
23
GND
U515
1
ADJ_VR2.5
SOT23 COMMON
0.032A
5V
0.4MM
C941 1000PF
25V 10% X5R 0402 COMMON
PS_5V_PWM_FB
R855 1K
5% 0402 COMMON
R857 1K
5% 0402 COMMON
GND
R772
0
0603
COMMON
+0.05R
R773
0
0603
COMMON
+0.05R
R774
0
0603
COMMON
+0.05R
C926 10UF
25V 10% X5R 0603 DNI
5V_PWM
5V
R219
X_20K/0402
R218
X_100K/0402
C283X_1800P/0402
VBOOT SET AT 1V
R126
0/0402
To cover both 3-R and 5-R configuartions from nVIDIA, the external resistor can cap network at pin VREF, REFIN and VIDBUF needs to be modified.
470
0805
0805
0805
+0.05R
+0.05R
+0.05R
COMMON
COMMON
COMMON
C288
4.7U/0603
3
VR_RDY
4
EN
2
VID
5
PSI
11
DIFFOUT
12
COMP
81174_COMP
13
VFB
14
VDRP
C289
22P/0402
15
VDFB
16
81174_CSSUM
CSSUM
31
VREF
1
VIDBUF
32
REFIN
ILIM
8
R123
8.2K/0402
81174_ILIM
R118
11K/0402
OCP ~ 300A Work F=400Khz LOADLINE~0.3m OHM
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: NVVDD Controller
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
PS: NVVDD Controller
PS: NVVDD Controller
PS: NVVDD Controller
600-1G401-BASE-QS1
PG401-A02 A
1.0
1.0
1.0
Sheet ofDate:
27 37
Sheet ofDate:
27 37
Sheet ofDate:
27 37
27 OF 37
PAGE DATE
04-AUG-2014
H
5
Page 28
A B C D E F G H
Page28: NVVDD PHASE DOUBLERS
1
5V_PWM 5V_PWM
R11-0103T12-R01
5V_PWM
R578
5%
_
R11-0103T12-R01 VVVV314_10
5V_PWM
R775
5%
VVVV314_10 R11-0000012-W08
_
VVVV314_10
0R
X
R11-0000013-R01 XXXV314_10
0R
XXXV314_10 R11-0000013-R01
X
5V_PWM
_
27
27,28,29,30 27,28,33,34
R269 X_0
5V_PWM
27
27,28,29,30 27,28,33,34
R303 X_0
R128 10K
R194 10K
R242
_
4.7/0603
R11-047AT13-R01
VVVV314_10
R111
_
10K
VVVV314_10 R11-0103T12-R01
1
7
5V_PWM
5%
_
R11-0000012-W08 VVVV314_10
_
R11-0103T12-R01 VVVV314_10
5V_PWM
5%
VVVV314_10 R11-0000012-W08
_
R571
X
R11-0000013-R01 XXXV314_10
R776
0R
XXXV314_10 R11-0000013-R01
X
0R
27
27,28,29,30 27,28,33,34
27
27,28,29,30 27,28,33,34
R266 X_0
5V_PWM
R129 10K
R271 X_0
8 6
4 5
13
3 2
I33-811620C-O05
VVVV314_10
VVVV314_10 R11-047AT13-R01
_
7
PWM_IN
8
PWM_BP
6
DRVON
4
EN
5
RDY
13
MIDA_B
3
DBL_EN
2
MID_HL
_
I33-811620C-O05
VVVV314_10
PWM_IN PWM_BP
DRVON EN RDY
MIDA_B DBL_EN MID_HL
_
5V_PWM
1
VCCA
R258
4.7/0603
16
17
PWM3
DRVON
2
3
NVVDD_EN
5V_PWM
PWM1
DRVON
NVVDD_EN
5V_PWM
4
16
VCCA
17
VCCD
PAD_GND
U17 NCP81162
PWMA
CSPA
VCCD
CSNA
PWMB
CSPB
CSNB
PAD_GND
U9 NCP81162
PWMA
CSPA
CSNA
PWMB
CSPB
CSNB
C165 1U
14 10
9 15 12
11
C184 1U
14 10
9 15 12
11
C195 X_10n
C11-1053024 XXXV314_10
_
C11-1057023-T04 VVVV314_10
_
C11-1047512-S02 VVVV314_10
C193 X_10n
X
C11-1053024 XXXV314_10
_
C11-1057023-T04 VVVV314_10
_
C11-1047512-S02 VVVV314_10
X
C144
0.1U
C148
0.1U
X
C11-1053024 XXXV314_10
_
C11-1047512-S02 VVVV314_10
C145
0.1U
C171 X_10n
X
C11-1053024 XXXV314_10
_
C11-1047512-S02 VVVV314_10
C149
0.1U
C185 X_10n
R274 2.4K
R259
X_100K
R275 2.4K
R267
X_100K
R240 2.4K
R270
X_100K
R241 2.4K
R268
X_100K
PWM3_A CSP3
CSN3 PWM6_B CSP6
CSN6
PWM1_A CSP1
CSN1 PWM4_B CSP4
CSN4
_
30
R11-0242T12-R01
27,30
VVVV314_10
X
<New PN>
27,30
XXXV314_10
30
_
27,30
R11-0242T12-R01 VVVV314_10
X
27,30
<New PN> XXXV314_10
_
29
R11-0242T12-R01
27,29
VVVV314_10
X
<New PN>
27,29
XXXV314_10
29
_
27,29
R11-0242T12-R01 VVVV314_10
X
27,29
<New PN> XXXV314_10
NVVDD_EN
DRVON
NVVDD_EN
DRVON
PWM2
PWM4
5V_PWM
VVVV314_10 R11-0000012-W08
_
5V_PWM
R11-047AT13-R01
VVVV314_10
7
PWM_IN
8
PWM_BP
6
DRVON
4
EN
5
RDY
13
MIDA_B
3
DBL_EN
2
MID_HL
VVVV314_10 I33-811620C-O05
_
VVVV314_10 R11-047AT13-R01
_
7
PWM_IN
8
PWM_BP
6
DRVON
4
EN
5
RDY
13
MIDA_B
3
DBL_EN
2
MID_HL
_
I33-811620C-O05
VVVV314_10
5V_PWM
_
R193
4.7/0603
_
C11-1057023-T04
C183
VVVV314_10
1U
1
VCCA
5V_PWM
1
VCCA
16
VCCD
PAD_GND
17
R300
4.7/0603
16
VCCD
PAD_GND
17
U18 NCP81162
PWMA
CSPA
CSNA
PWMB
CSPB
CSNB
U16 NCP81162
PWMA
CSPA
CSNA
PWMB
CSPB
CSNB
14 10
9 15 12
11
C190 X_10n
X
C11-1053024 XXXV314_10
C188 1U
14 10
9 15 12
11
C194 X_10n
C11-1053024 XXXV314_10
_
C11-1047512-S02 VVVV314_10
_
C11-1057023-T04 VVVV314_10
_
C11-1047512-S02 VVVV314_10
X
C146
0.1U
X
C11-1053024 XXXV314_10
C142
0.1U
X
C11-1053024 XXXV314_10
_
C11-1047512-S02 VVVV314_10
R239 2.4K
R262 R238 2.4K
C147
R260
0.1U
C1630 X_10n
_
C11-1047512-S02 VVVV314_10
R237 2.4K
R302 R276 2.4K
C143
R301
0.1U
C189 X_10n
X_100K
X_100K
X_100K
X_100K
PWM2_A CSP2
CSN2 PWM5_B CSP5
CSN5
PWM7_A CSP7
CSN7 PWM8_B CSP8
CSN8
_
R11-0242T12-R01 VVVV314_10
30
X
27,30
<New PN> XXXV314_10
_
27,30
R11-0242T12-R01
30
VVVV314_10
27,30
X
<New PN> XXXV314_10
27,30
_
29
R11-0242T12-R01
27,29
VVVV314_10
X
<New PN>
27,29
XXXV314_10
29
_
27,29
R11-0242T12-R01 VVVV314_10
X
27,29
<New PN> XXXV314_10
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: NVVDD Phase 1,2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
FDBA
BOM REV
G
MS-V317
NVVDD PHASE DOUBLERS
NVVDD PHASE DOUBLERS
NVVDD PHASE DOUBLERS
600-1G401-BASE-QS1
PG401-A02 A
1.0
1.0
28 37
28 37
28 37
PAGE DATE
28 OF 37
04-AUG-2014
1.0
5
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
H
Page 29
A B C D E F G H
Page29: PS: NVVDD Phase 1,4,7,8
10
1
VVVV314_10 C11-1047612-M09
_
VVVV314_10
_
1
PAD_GND
5
17
VVVV314_10
_
BOTTOM PAD CONNECT TO GND Through 6 VIAs
C201
0.1U/25V/X5R
R316
2.2/0603
16
BST1
15
SW1
13
DRVL1
12
DRVH2
11
SW2
9
DRVL2
BST2
R317
2.2/0603
C224 0.1U/25V/X5R
VVVV314_10 C11-1047612-M09
_
12V_PEX8_F2
VVVV314_10
R298
R11-022A014-W08
PWM1_A
R314 51
DRVON
VVVV314_10 R11-0510T12-R01
2
3
PWM4_B
DRVON
_
R315 51
VVVV314_10 R11-0510T12-R01
_
10U/16V/X5R
VVVV314_10 C11-1067514-T04
_
C222
_
28 27,28,29,30
28 27,28,29,30
R11-022AT13-R01
2.2/0805
U19 NCP81061
VCC14DRVH1
2
PWM1
3
EN1
10
GND2
8
VCC2
6
PWM2
7
EN2
14
GND1
_
VVVV314_10
I33-810610C-O05
R11-022AT13-R01
VVVV314_10 R11-0010T13-R01
_
VVVV314_10 R11-0103T12-R01
_
R318 1/0603 R135 10K
TP9
XXXV314_10
X
N/A
VVVV314_10 R11-0010T13-R01
_
VVVV314_10 R11-0103T12-R01
_
R319 1/0603 R136 10K
TP11
XXXV314_10
X
N/A
LG4
TP10
XXXV314_10
X
N/A
TP12
XXXV314_10
X
N/A
5
S2_1
6
S2_2
7
S2_3
HG1
HG1
8
LG1
G2
DFN8_5X6
D03-7320E0C-ST8
VVVV31010S
GND
U4537
5
S2_1
6
S2_2
7
S2_3
HG4
8
G2
DFN8_5X6
D03-7320E0C-ST8
VVVV31010S
U4543
U4536
VVVV314_10 R11-0010T13-R01
_
VVVV314_10 R11-0103T12-R01
_
R325 1/0603 R195 10K
TP14
XXXV314_10
X
N/A
VVVV314_10 R11-0010T13-R01
_
VVVV314_10 R11-0103T12-R01
_
R326 1/0603 R196 10K
TP15
XXXV314_10
X
N/A
LG8
VVVV314_10
R11-022AT13-R01
_
U21 NCP81061
VCC14DRVH1
2
PWM1
3
EN1
10
GND2
8
VCC2
6
PWM2
7
EN2
14
GND1
_
VVVV314_10
I33-810610C-O05
17
VVVV314_10
R11-022AT13-R01
BOTTOM PAD CONNECT TO GND Through 6 VIAs
VVVV314_10 C11-1047612-M09
_
C202
0.1U/25V/X5R
R323
2.2/0603
1
BST1
SW1
DRVL1
DRVH2
SW2
DRVL2
PAD_GND
BST2
5
R324
2.2/0603
_
C227 0.1U/25V/X5R
VVVV314_10 C11-1047612-M09
16
15 13
12
11 9
_
12V_PEX6_F1
VVVV314_10
R299
R11-022A014-W08
2.2/0805
_
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PWM7_A
DRVON
PWM8_B
DRVON
R322 51
VVVV314_10 R11-0510T12-R01
_
R321 51
VVVV314_10 R11-0510T12-R01
_
10U/16V/X5R
VVVV314_10 C11-1067514-T04
_
C225
28
27,28,29,30
28
27,28,29,30
TP13
XXXV314_10
X
N/A
TP16
XXXV314_10
X
N/A
5
S2_1
6
S2_2
7
S2_3
HG7
8
LG7
G2
DFN8_5X6
D03-7320E0C-ST8
VVVV31010S
GND
U4544
5
S2_1
6
S2_2
7
S2_3
HG8
8
G2
DFN8_5X6
D03-7320E0C-ST8
VVVV31010S
4
D1_3
D_PAD
3
D1_2
2
D1_1
1
G1
SW
1
9
10
4
D1_3
D_PAD
3
D1_2
2
D1_1
1
G1
SW
1
9
10
4
D1_3
D_PAD
3
D1_2
2
D1_1
1
G1
SW
1
9
10
4
D1_3
D_PAD
3
D1_2
2
D1_1
1
G1
SW
1
9
C E
C255
0.47UF
16V 10% X7R 0603 COMMON
VVVV284260
C11-4742513-M09
GND
GND
C256
0.47UF
16V 10% X7R 0603 COMMON
VVVV284260
C11-4742513-M09
GND
PHASE1
12V_PEX8_F2
R312
2.2/0805 C151
2200P
27,28 27,28
GND
12V_PEX6_F1
C263
0.47UF
16V 10% X7R 0603 COMMON
VVVV284260
C11-4742513-M09
2.2/0805
2200P
12V_PEX8_F2
C921 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
PHASE4
VVVV314_10 R11-022AT14-R01
_
VVVV314_10 C11-2222012-W08
_
12V_PEX6_F1
C264
0.47UF
16V 10% X7R 0603 COMMON
VVVV284260
C11-4742513-M09
PHASE7
C925 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
PHASE8
R320
C153
27,28 27,28
C923 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
C260
0.47UF
16V 10% X7R 0603 COMMON
VVVV284260
C11-4742513-M09
CSP4 CSN4
C928 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
C262
0.47UF
16V 10% X7R 0603 COMMON
VVVV284260
C11-4742513-M09
VVVV314_10 R11-022AT14-R01
_
VVVV314_10 C11-2222012-W08
_
CSP8 CSN8
+
12
2.2/0805
2200P
27,28 27,28
12
EC152 C270u16v
VVVV284260
C71-27117D1-AO5
R311
C150
C922 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
EL22 0.2UH
12
NS518
XXXV314_10 <New PN>
X
+
R313
2.2/0805 C152
2200P
27,28 27,28
NS522
VVVV314_10 R11-022AT14-R01
_
VVVV314_10 C11-2222012-W08
_
EC154 C270u16v
VVVV284260
C71-27117D1-AO5
C927 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
EL24 0.2UH
12
XXXV314_10 <New PN>
X
ASSEMBLY PAGE DETAIL
C221 1UF
16V 10% X5R 0603 COMMON
VVVV284260
C11-1057023-T04
CSP1 CSN1
VVVV31501S
12
NS519
XXXV314_10 <New PN>
X
C226 1UF
16V 10% X5R 0603 COMMON
VVVV284260
C11-1057023-T04
VVVV314_10 R11-022AT14-R01
_
VVVV314_10 C11-2222012-W08
_
CSP7 CSN7
12
NS523
NS516
VVVV31501S
XXXV314_10 <New PN>
X
C920 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
VVVV31501S
EL21 0.2UH
12
12
NS517
X
X
XXXV314_10
XXXV314_10
<New PN>
<New PN>
C924
+
12
10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
EL23 0.2UH
12
NS520
X
XXXV314_10 <New PN>
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: NVVDD Phase 3,4
EC150 C270u16v
C71-27117D1-AO5
VVVV31501S
12
NS521
X
XXXV314_10 <New PN>
VVVV284260
1
NVVDD
2
3
C950 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
NVVDD
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
1420314ci203
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
MS-V317
NVVDD Phase 1 & 4/ 7 & 8
NVVDD Phase 1 & 4/ 7 & 8
NVVDD Phase 1 & 4/ 7 & 8
1.0
1.0
1.0
Sheet ofDate:
29 37
Sheet ofDate:
29 37
Sheet ofDate:
29 37
29 OF 37
PAGE DATE
04-AUG-2014
H
5
Page 30
A B C D E F G H
Page30: PS: NVVDD Phase 3,6,2,5
C249
10
LG3
TP2
XXXV314_10
X
N/A
LG6
TP4
XXXV314_10
X
N/A
U4538
5
S2_1
6
S2_2
7
S2_3
8
G2
DFN8_5X6
U4539
5
S2_1
6
S2_2
7
S2_3
8
G2
DFN8_5X6
D1_3
D_PAD
D1_2
D1_1
G1
SW
1
9
HG3
10
D1_3
D_PAD
D1_2
D1_1
G1
SW
1
9
HG6
1
VVVV314_10 C11-1047612-M09
_
12V_PEX6_F1
_
VVVV314_10 R11-022AT14-R01
PWM3_A
DRVON
_
R285 51
DRVON
VVVV314_10 R11-0510T12-R01
_
R287 51
VVVV314_10 R11-0510T12-R01
C220
10U/16V/X5R
2
PWM6_B
28 27,28,29,30
28 27,28,29,30
_
VVVV314_10 C11-1067514-T04
R11-022AT13-R01
R289
2.2/0805
U22 NCP81061
2 3
10
8
6 7
14
VVVV314_10 I33-810610C-O05
_
_
VVVV314_10 R11-022AT13-R01
0.1U/25V/X5R
VVVV314_10
R291
_
2.2/0603
1
VCC14DRVH1
BST1
PWM1
DRVL1
EN1 GND2 VCC2
DRVH2
PWM2 EN2 GND1
DRVL2
PAD_GND
BST2
5
17
R279
2.2/0603
C218 0.1U/25V/X5R
BOTTOM PAD CONNECT TO GND Through 6 VIAs
C196
SW1
SW2
16
15 13
12
11 9
VVVV314_10 C11-1047612-M09
_
_
VVVV314_10 R11-0010T13-R01
_
VVVV314_10 R11-0103T12-R01
R288 1/0603 R139 10K
TP1
XXXV314_10
X
N/A
_
VVVV314_10 R11-0010T13-R01
_
VVVV314_10 R11-0103T12-R01
R281 1/0603 R197 10K
TP3
XXXV314_10
X
N/A
3
10
_
VVVV314_10 R11-0010T13-R01
_
VVVV314_10
VVVV314_10 C11-1047612-M09
C228
28 27,28,29,30
28 27,28,29,30
VVVV314_10 R11-022AT13-R01
R277
_
2.2/0805
U23 NCP81061
2 3
10
8
6 7
14
VVVV314_10 I33-810610C-O05
_
R11-022AT13-R01
_
0.1U/25V/X5R
R278
2.2/0603
1
VCC14DRVH1
BST1
PWM1
DRVL1
EN1 GND2 VCC2
DRVH2
PWM2 EN2 GND1
DRVL2
PAD_GND
BST2
5
17
VVVV314_10
R280
2.2/0603
_
C219 0.1U/25V/X5R
BOTTOM PAD CONNECT TO GND Through 6 VIAs
SW1
SW2
16
15 13
12
11 9
VVVV314_10 C11-1047612-M09
_
12V_PEX8_F2
VVVV314_10
R11-022AT13-R01
_
4
PWM2_A
DRVON
PWM5_B
DRVON
R292 51
_
VVVV314_10 R11-0510T12-R01
R290 51
_
VVVV314_10 R11-0510T12-R01
C229
10U/16V/X5R
_
VVVV314_10 C11-1067514-T04
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
R11-0103T12-R01
R283 1/0603 R243 10K
TP5
XXXV314_10
X
N/A
_
VVVV314_10 R11-0010T13-R01
_
VVVV314_10 R11-0103T12-R01
R284 1/0603 R244 10K
TP7
XXXV314_10
X
N/A
U4540
D1_3
D_PAD
D1_2
D1_1
G1
SW
1
9
HG2
10
D1_3
D_PAD
D1_2
D1_1
G1
SW
1
9
HG5
LG2
TP6
XXXV314_10
X
N/A
LG5
TP8
XXXV314_10
X
N/A
5
S2_1
6
S2_2
7
S2_3
8
G2
DFN8_5X6
U4541
5
S2_1
6
S2_2
7
S2_3
8
G2
DFN8_5X6
C E
0.47UF
16V 10%
4
X7R 0603 COMMON
VVVV284260
C11-4742513-M09
3
GND
2
1
PHASE3
4
3
2
1
PHASE6
C217
0.47UF
16V 10%
4
X7R 0603 COMMON
VVVV284260
C11-4742513-M09
3
2
1
PHASE2
C246
0.47UF
16V 10%
4
X7R 0603 COMMON
VVVV284260
C11-4742513-M09
3
2
1
PHASE5
C251 1UF
16V 10% X5R 0603 COMMON
VVVV284260
C11-1057023-T04
12V_PEX8_F2
C931 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
GND
ASSEMBLY PAGE DETAIL
12V_PEX6_F1
C934
C935
10UF
10UF
16V
16V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
VVVV284260
C11-1067514-T04
VVVV284260
C11-1067514-T04
27,28
12V_PEX6_F1
27,28
C247
C937
1UF
10UF
16V
16V
10%
20%
X5R
X5R
0603
0805
COMMON
COMMON
VVVV284260
VVVV284260
C11-1057023-T04
C11-1067514-T04
GND
27,28 27,28
C932 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
12V_PEX8_F2
+
12
C929 10UF
EC151
16V
C270u16v
20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
VVVV284260
C71-27117D1-AO5
GND
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: NVVDD Phase 5, 6
27,28 27,28
27,28 27,28
C933 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
R293
2.2/0805
C156 2200P
C930 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
C250
0.47UF
16V 10% X7R 0603 COMMON
VVVV284260
C11-4742513-M09
_
VVVV314_10 R11-022AT14-R01
_
VVVV314_10 C11-2222012-W08
CSP3 CSN3
R294
2.2/0805 C157
2200P
_
VVVV314_10 C11-2222012-W08
CSP6 CSN6
R308
2.2/0805
C154 2200P
VVVV314_10 C11-2222012-W08
_
CSP2 CSN2
R310
2.2/0805 C155
2200P
CSP5 CSN5
EL17 0.2UH
12
NS506
X
XXXV314_10 <New PN>
_
VVVV314_10 R11-022AT14-R01
VVVV314_10 R11-022AT14-R01
_
C936 10UF
16V 20% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
VVVV314_10 R11-022AT14-R01
_
VVVV314_10 C11-2222012-W08
_
EL18 0.2UH
12
NS508
X
XXXV314_10 <New PN>
EL19 0.2UH
12
NS510
X
XXXV314_10 <New PN>
EL20 0.2UH
12
NS514
X
XXXV314_10 <New PN>
VVVV31501S
12
NS507
X
XXXV314_10 <New PN>
NS509
NS513
VVVV31501S
12
X
XXXV314_10 <New PN>
VVVV31501S
12
X
XXXV314_10 <New PN>
VVVV31501S
12
NS515
X
XXXV314_10 <New PN>
NVVDD
C991 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
C960 820uF_2.5V
VVVV284260
C71-8210351-AO5
C981 820uF_2.5V
VVVV284260
C71-8210351-AO5
VVVV284260
C11-1067313-S02
C987 10UF
6.3V 20% X5R 0603 COMMON
C985
C983 820uF_2.5V
VVVV284260
C71-8210351-AO5
C979
C980
820uF_2.5V
820uF_2.5V
VVVV284260
VVVV284260
C71-8210351-AO5
C71-8210351-AO5
NVVDD
C988 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
GND GND
820uF_2.5V
VVVV284260
C71-8210351-AO5
NVVDD
GND
C989 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
C984 820uF_2.5V
VVVV284260
C71-8210351-AO5
C978 820uF_2.5V
VVVV284260
C71-8210351-AO5
C990 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
FDBA
C986 820uF_2.5V
VVVV284260
C71-8210351-AO5
C996 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
G
C982 820uF_2.5V
VVVV284260
C71-8210351-AO5
MSI
MSI
MSI
C959
C863 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
C963 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
VVVV284260
C11-1067313-S02
NVVDD
C964 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
GND
C994 10UF
6.3V 20% X5R 0603 COMMON
MS-V317
MS-V317
MS-V317
C876 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
C995 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
VVVV284260
C11-1067313-S02
C975 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
PAGE DATE
H
10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
C977 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
C992
C993
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0603
0603
COMMON
COMMON
VVVV284260
VVVV284260
C11-1067313-S02
C11-1067313-S02
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
PS: NVVDD Phase 3,6,2,5
PS: NVVDD Phase 3,6,2,5
PS: NVVDD Phase 3,6,2,5
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
BOM REV
C878 10UF
6.3V 20% X5R 0603 COMMON
NVVDD
125A
C888 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
GND
C976 10UF
6.3V 20% X5R 0603 COMMON
VVVV284260
C11-1067313-S02
30 37
30 37
30 37
30 OF 37
04-AUG-2014
1
2
3
4
1.0
1.0
1.0
5
Page 31
A B C D E F G H
Page31: FBVDDQ
STUFF FOR APW8700
R249
R247
0402 DNI
R2461%232K
0402 COMMON
RT8809:
SLEW SET
APW8700:
CURRENT BALANCE
R737
R245
0402 DNI
XXXV284260
<New PN>
5.76K
VVVV284260
R11-5761T12-W08
0.01UF
COMMON
10%
COMMON
0402
5%
XXXV284260
<New PN>
R248 300K
0402
5%
VVVV284260
R11-0304T12-W08
25.5K
1%
10K
COMMON0402
5%
VVVV284260
R11-0103012-W08
4.7K
5%
10K
DNI
COMMON
XXXV284260
<New PN>
VVVV284260
R11-2323T12-Y01
R251
R250
0402
C168
X7R
1%
R3
R1
1%
R252 0
0402
+0.05R
XXXV284260
<New PN>
7.15K
COMMON0402
VVVV284260
R11-7151T12-W08
1.43K
COMMON
0.1UF
16V 10%0402 COMMON
DNI
R253 0
+0.05R 0402 DNI
PS_FBVDDQ_PSI
PS_FBVDDQ_IOFS
PS_FBVDDQ_FS
PS_FBVDDQ_VID
PS_FBVDDQ_VREF_SET
PS_FBVDDQ_VREFIN
VVVV284260
R11-1431T22-W08
PS_FBVDDQ_VREFOUT
VVVV284260
C11-1042012-M09
PS_FBVDDQ_VAMP
PS_FBVDDQ_SS
PS_FBVDDQ_CP
PS_FBVDDQ_PVCC
12V
0.3MM
XXXV284260
<New PN>
PS_FBVDDQ_VCC
12V
0.3MM
C170 1000PF
X5R
VVVV284260
R11-0000012-W08
1
GPIO12_PWR_LVL GPIO12_PWR_LVL
2
FBVDD/Q Power Sequencing
25,27
3
4
23
GPIO7 = 1 FBVDD/Q = 1.383V GPIO7 = 0 FBVDD/Q = 1.503V
VID =1 SHORTS RSET AND FBRTN VREFIN = VREF X ((R2//R3) / ( R1+(R2//R3))) VREFIN = 2.0 X ((4.99//14.3)/ ( 1.65+(4.99//14.3))) VREFIN = 1.383V
VID =0 DISCONNECTS RSET AND FBRTN VREFIN = VREF X (R2 / ( R1+R2)) VREFIN = 2.0 X (4.99 / ( 1.65+4.99)) VREFIN = 1.503V
PS_FBVDDQ_VREFOUT
PS_FBVDDQ_PSI*
35
1 PHASE OPERATION 2 PHASE OPERATION
0 1
PS_FBVDDQ_PSI* PS_FBVDDQ_PSI*
floating
IN
0
Under power Normal
PS_FBVDDQ_VREFOUT
GND
12V_F
PS_FBVDDQ_PVCC
R168 10K
VVVV284260
5%
R11-0103012-W08
0402 COMMON
PS_FBVDDQ_EN*
3
1B1C1E
C
R736
100K
0402
5%
VVVV284260
R11-0104042-Y01
COMMON
NVVDD_PGOOD_RC
C904
0.1UF
16V 10% X7R 0402 DNI
XXXV284260
<New PN>
GND
RT8809:
Roc=DCR*Isum*6/8u Set OCP trigger current=95A
3.9m ohm: Roc = 280K ohm
2.5m ohm: Roc = 178K ohm Set OCP trigger current=65A
1.25m ohm: Roc = 60.4K ohm
APW8700:
Css SS = Vout/(22uA/Css)
PS_NVVDD_PG
OUT
GPIO7_FBVDD_SEL
IN
E
R169
0402
5%
VVVV284260
R11-0102032-W08
5
1K
COMMON
Q533B
VVVV284260
SC70_6
D02-03904G9-O05
COMMON
B
4
GND
R167 10K
5% 0402 COMMON
VVVV284260
R11-0103012-W08
GND
1B1C1E
C
E
2
B
RT8809:
>4.2V -- DEM >1.2V & <3V -- ASM
APW8700:
Focs(kHz) = 10000/Rrt(KR) 300 (kHz) = 10000/30(KR)
GND
6
Q533A
SC70_6 COMMON
1
GND
VVVV284260
D02-03904G9-O05
R190
0402 COMMON
1%
R2
C167
0402 16V
X7R
VVVV284260
C11-1032012-W08
Roc/Css
R188 60.4K
0402
1%
VVVV284260
R11-6042T12-W08
PS_FBVDDQ_VSEN
C169 1500PF
X7R
VVVV284260
C11-1522832-T04
R256
+0.05R
Connect at far side of the FBVDDQ shape
R255
VVVV284260
R11-0000012-W08
VVVV284260
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
R11-0471012-Y01
GND
25V0402 COMMON
50V COMMON
5%
10%
10%0402
0
COMMON0402
470
COMMON0402
C172 1UF
16V 10% X5R 0603 COMMON
VVVV284260
C11-1057023-T04
U6 VR_SW=2V
QFN024Q_P050_I0179_TI108X108 COMMON
18
VCC12
17
PS_FBVDDQ_PVCC
VCC9
12
PSI
4
IOFS
3
RE/EN
23
VID
24
RSET
1
REFIN
2
VREF
8
EAP
9
SS
7
FBRTN
5
COMP
VVVV284260
I32-8809B1C-R11
12V_F
C906
0603 16V X5R COMMON
VVVV284260
C11-1057023-T04
R739 2.2
04025%COMMON
C905
X5R
2 PHASE PWM
PS_FBVDDQ_RC_CP
R261 1K
PS_FBVDDQ_RC
FBVDDQ_SENSE_GPU
R257 232K
1% 0402 COMMON
VVVV284260
R11-2323T12-Y01
PS_FBVDDQ_VAMP
1UF
10%
1UF
10%
16V0603
COMMON
C173
680PF
50V0402 COMMON
X7R
VVVV284260
C11-6812812-T04
1%
VVVV284260
R11-0102T12-R01
ASSEMBLY PAGE DETAIL
Rton=232Kohm => Fsw=300KHz Rton= Rrmp
Rton
VVVV284260
R11-022A012-W08
VVVV284260
C11-1057023-T04
14
HG1
13
BOOT1
15
SW1
16
LG1
21
HG2
22
BOOT2
20
SW2
19
LG2
10
CSN
11
CSP
25
PGND
6
FB
R264 4.99K
VVVV284260
R11-4991T12-W08
PS_FBVDDQ_FB
10%
PS_FBVDDQ_FB
COMMON0402
R263
0402
+0.05R
VVVV284260
R11-0000012-W08
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: Dynamic Power Balance Logic
GND
12V_F
GND
0.5MM
PS_FBVDDQ_UG1
0.5MM
PS_FBVDDQ_BOOT1
R309 0R/0603
VVVV284260
R11-0000013-W08
0.5MM
PS_FBVDDQ_PH1
0.5MM
PS_FBVDDQ_LG1
0.5MM
PS_FBVDDQ_UG2
0.5MM
PS_FBVDDQ_BOOT2
R327 0R/0603
VVVV284260
R11-0000013-W08
0.5MM
PS_FBVDDQ_PH2
0.5MM
PS_FBVDDQ_LG2
PS_FBVDDQ_ISEN_N
PS_FBVDDQ_ISEN_P
COMMON0402
1%
0
COMMON
IN
FBVDDQ
VVVV284260
R11-0000013-W08
R265
0
COMMON
0603
+0.05R
C175
0.1UF
16V0402 COMMON
X7R
VVVV284260
C11-1042012-M09
VVVV284260
R11-0000013-W08
R272
0
0603 COMMON
+0.05R
C174
0.1UF
16V
0402 10%
COMMON
X7R
VVVV284260
C11-1042012-M09
R305
0402 COMMON
R304 4.99K
04021%COMMON
R273
0402
C176 0.22UF
0402 10% X5R
GND
Place near IC.
14
0.5MM
PS_FBVDDQ_UG1_R
10%
0.5MM
PS_FBVDDQ_UG2_R
4.99K
1%
0
COMMON
+0.05R
6.3V COMMON
VVVV284260
R11-4991T12-W08
VVVV284260
R11-4991T12-W08
VVVV284260
R11-0000012-W08
VVVV284260
C11-2247332-M09
GND
XXXV284260
<New PN>
GND
XXXV284260
<New PN>
GND
PS_FBVDDQ_ISEN_F
C178
0.1UF
16V 10% X7R 0402 DNI
XXXV284260
<New PN>
Input ripple (Irms)/phase = 6.8A@1.6V/32A
5
Q47
4
NTMFS4C10NT1G
VVVV284260
D03-616BA0C-N03
123
5
Q48
4
NTMFS4C05NT1G
VVVV284260
D03-632BA0C-N03
123
C181 1000PF
25V 10% X5R 0402 DNI
GND
5
Q49
4
NTMFS4C10NT1G
VVVV284260
D03-616BA0C-N03
123
5
Q50
4
NTMFS4C05NT1G
VVVV284260
D03-632BA0C-N03
123
C180 1000PF
25V 10% X5R 0402 DNI
GND
12V_F
GND
C191
0.1UF
16V 10% X7R 0402 COMMON
VVVV284260
C11-1042012-M09
GND
C919 1000PF
25V 10% X5R 0603 DNI
R740
C186
0.1UF
16V 10% X7R 0402 COMMON
VVVV284260
C11-1042012-M09
GND
C918 1000PF
25V 10% X5R 0603 DNI
R706
R307 1
0402 COMMON
5%
R306 1
04025%COMMON
FBVDDQ
C942 10UF
16V 10% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
GND
C940 1000PF
25V
XXXV284260
<New PN>
1206 COMMON
VVVV284260
R11-0010027-R01
XXXV284260
<New PN>
1206
VVVV284260
R11-0010027-R01
VVVV284260
10%
C11-1022013-W08
X5R 0603 COMMON
PS_FBVDDQ_PH_RC1
1
0.5MM
5%
C939 10UF
16V 10% X5R 0805 COMMON
VVVV284260
C11-1067514-T04
GND
C938 1000PF
25V
VVVV284260
10%
C11-1022013-W08
X5R 0603 COMMON
PS_FBVDDQ_PH_RC2
1
0.5MM
COMMON
5%
VVVV284260
R11-0010012-W08
VVVV284260
R11-0010012-W08
For single slot Place on the bottom side of Power supply.
GND
FDBA
+
12
EC153 C270u16v
VVVV284260
C71-27117D1-AO5
GND
GND
C944 10UF
16V 10% X5R 0805 DNI
XXXV284260
C11-1067514-T04
C943 10UF
16V 10% X5R 0805 DNI
XXXV284260
C11-1067514-T04
XXXV284260
C11-2267014-W08
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
FBVDDQ
FBVDDQ
FBVDDQ
MS-V317
1.0
1.0
31 37
31 37
31 37
1.0
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
1
12V_F
2
3
GND
12V_F
GND
VVVV284260
C11-1067514-T04
VVVV284260
C11-1067514-T04
C946 10UF
16V 10% X5R 0805 COMMON
VVVV31501S
L702
1 2
0.3uH
C945 10UF
16V 10% X5R 0805 COMMON
VVVV31501S
1 2
0.3uH
L703
FBVDD/Q = 1.6V @ 32A
Alternated Part
1.6V
C948 10UF
6.3V 20% X5R 0805 COMMON
VVVV284260
C11-1067314-M09
GND
FBVDDQ
C958 820uF_2.5V
VVVV284260
C71-8210351-AO5
GND
C949 10UF
6.3V 20% X5R 0805 COMMON
VVVV284260
C11-1067314-M09
GND GND
FBVDDQ
GND
FBVDDQ
C956 820uF_2.5V
VVVV284260
C71-8210351-AO5
C957 820uF_2.5V
VVVV284260
C71-8210351-AO5
4
C566
C569
C947
C567 22UF
6.3V 20% X5R 0805 DNI
C568 22UF
6.3V 20% X5R 0805 DNI
XXXV284260
C11-2267014-W08
22UF
6.3V 20% X5R 0805 DNI
XXXV284260
C11-2267014-W08
22UF
6.3V 20% X5R 0805 DNI
XXXV284260
C11-2267014-W08
22UF
6.3V 20% X5R 0805 DNI
XXXV284260
C11-2267014-W08
C578 22UF
6.3V 20% X5R 0805 DNI
XXXV284260
C11-2267014-W08
5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
BOM REV
G
31 OF 37
PAGE DATE
04-AUG-2014
H
Page 32
Page32: 7511-FAN
1
2
3
Thermal IC : NCT7511Y
Layout notice : *Add ground shielding for D+ and Dtraces. *D+/D- route has to be away from the high noise area. *The recommended traces width and ground shielding spacing are 10mils.
Thermal Diode
NVVDD
FBVDDQ
A B C D E F G H
3V3_F
D500
R1018
BAS32L_LL34
10K
COMMON
RES1005
5%
VVVV277C10
COMMON
_
VVVV277C10
_
D
Q61
G
N-2N7002P_SOT23-3-HF
S
R11-0103012-W08
COMMON
VVVV277C10
D01-4148S00-N47
R1019 510R
RES10055%COMMON
VVVV277C10
_
R11-0511012-W08
7511_FAN_PWM
_
D03-7002E49-O05
12V_F
R1052
D510
4.7K
BAS32L_LL34 COMMON
RES1005
5%
VVVV277C10
COMMON
VVVV277C10
_
_
D01-4148S00-N47
R11-0472012-W08
OUT
OUT
23
23
7511_FAN_TACH
EEPROM
3V3_F
(Not)
R720 4.7K
RES10051%COMMON
R742 4.7K
RES10051%COMMON
R750 4.7K
RES10051%COMMON
R701 4.7K
RES10051%COMMON
(Not)
EEPROM_A0 EEPROM_A1 EEPROM_A2
XXXV277C10
VVVV277C10
X _
VVVV277C10
R11-0472T12-W08
XXXV277C10
R11-0472T12-W08
_ X
R11-0472T12-W08 R11-0472T12-W08
GND
EEPROM_A0 EEPROM_A1 EEPROM_A2 EEPROM_WP
U511
1
VCC
A0
2
WP
A1
3
SCL
A2
4
SDA
GND
AT24C02C-SSHM-T-HF COMMON
VVVV277C10
M33-0240203-H28
_
Fan connector option
8 7 6 5
R751 4.7K
RES10051%COMMON
VVVV277C10
_
R7369 4.7K
R11-0472T12-W08
RES10051%COMMON
VVVV277C10
_
R11-0472T12-W08
EEPROM_WP 7511_SCL 7511_SDA
GND
GND
3V3_F
C1075
0.1UF
16V 10% X5R CAP1005
COMMON
VVVV277C10
GND
_
C11-1042012-M09
23
1
_
D02-03904C9-O05
23
1
3V3_F
_
D02-03904C9-O05
C1079
0.1UF
16V 10% X5R CAP1005
COMMON
VVVV277C10
C11-1042012-M09
_
7511_TD2- T_CRIT_SET
Q221 MMBT3904
SOT323
COMMON
VVVV277C10
Q222 MMBT3904
SOT323
COMMON
VVVV277C10
C11-1067313-T04
_
C1076 2200PF
16V 10%
7511_TD2+
X7R CAP1005
COMMON
_
7511_TD1-
C1077
C11-2222022-W08
2200PF
16V 10% X7R
7511_TD1+
CAP1005
VVVV277C10
COMMON
_
R1053 0R
RES16085%COMMON
VVVV277C10
C11-2222022-W08
C1078 10UF
6.3V
_
20%
R11-0000013-W08
X5R CAP1608
COMMON
VVVV277C10
R1030
4.7K
RES1005
(Not)
1%
R11-0472T12-W08
DNI
XXXV277C10
X
R1051
4.7K
RES1005
1%
(Not) (Not)
DNI
XXXV277C10
R11-0472T12-W08
X
VVVV277C10
17
U512
1
GND2
TD1-
2
TD1+
3
7511_VCC
VCC
4
GPIO1
3V3_F3V3_F
_
R1039
4.7K
RES1005
D0F-7511Y0C-N62
1%
(Not) (Not)
DNI
XXXV277C10
X
R719
4.7K
R11-0472T12-W08
RES1005
1%
DNI
XXXV277C10
X
R11-0472T12-W08
GPIO25ALERT#6T_CRIT#7SDA
16
TD2+
14
15
TD2-
T_CRIT#_SET
FANCTL1
FANIN1
R7367 4.7K
RES10051%DNI
XXXV277C10XR11-0472T12-W08
R7368 4.7K
RES10051%DNI
XXXV277C10XR11-0472T12-W08
Please refer datasheet TCRIT_SET Table If floating,shutdown temp. set to 65℃
R7364 7.5K
1%
RES1005
XXXV277C10
X
R11-0752T12-W08
X
R11-0752T12-W08
_
R11-0223T12-W08
FANCTL1
FANIN1
3V3_F
3V3_F
XXXV277C10
VVVV277C10
XXXV277C10
(Not)
1%
(Not)
SNSR-NCT7511Y-HF
X
R11-0103012-W08
13
GND1
8
SHDL_SEL
SCL
DNI
R7363 7.5K
RES1005 DNI
R715 22K
RES10051%COMMON
12
11
10
9
7511_SCL
7511_SDA
(Not)
設定EEPROM
3V3_F3V3_F
R7366 10K
RES1005
5%
DNI
(Not)
X
R11-0103012-W08
3V3_F
3V3_F
R7365
XXXV277C10
10K
RES1005
5%
DNI
(Not)
R1029 0R
RES1005
COMMON
R1028 0R
RES1005
COMMON
VVVV277C10
_
VVVV277C10
R11-0000012-W08
_
R11-0000012-W08
3V3_F
R1016
4.7K
RES1005
5%
COMMON
VVVV277C10
_
D
FANCTL1
Q60
G
N-2N7002P_SOT23-3-HF
S
R11-0472012-W08
COMMON
VVVV277C10
_
D03-7002E49-O05
FANIN1
R1015 1K
RES10051%COMMON
VVVV277C10
R1017
_
10K
R11-0102T12-W08
RES1005
5%
COMMON
VVVV277C10
_
R11-0103012-W08
5%
5%
I2CB_SCL_R
I2CB_SDA_R
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: Dynamic Power Balance Phases
7511_FAN_PWM
IN23
7511_FAN_TACH
IN23
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
7511-FAN
7511-FAN
7511-FAN
MS-V317
1.0
1.0
1.0
Sheet ofDate:
32 37
Sheet ofDate:
32 37
Sheet ofDate:
32 37
32 OF 37
PAGE DATE
04-AUG-2014
H
5
Page 33
A B C D E F G H
Page33: PS: Inputs, Filtering, and Monitoring
3V3_RUN
C231
0.1uF
I2CC_SCL_R I2CC_SDA_R
R171 0ohm
0.05 ohm 0402 COMMON
0.05 ohm
R187
0ohm
COMMON
GND
INA3221_PV
INA3221_VPU
16V 10% X7R 0402 COMMON
1
23
23
27,28,33,34
23,35
IN
NVVDD_EN
OUT
GPIO12_LOW_PERF*
IN BI
0402
2
U13
@digital.u_pwrmtr_ina3221(sym_1):page33_i159
QFN16 COMMON
4
VS
6
SCL
7
SDA
5
A0
GND
10
PV
13
TC
16
VPU
3
GND
TP
PAD
I2C Address:(1000 000b)
GND
VIN1N
VIN2N
VIN3N
WARN
VIN1P
VIN2P
VIN3P
CRIT
12
11
15
14
2
1
INA3221_WARN
8
GPIO9_THERM_ALERT_R*
9
place caps close to INA3221
INA3221_VIN1P
C236 10uF
6.3V 10% X7R 0805
INA3221_VIN1N
COMMON
INA3221_VIN2P
C238 10uF
6.3V 10% X7R 0805
INA3221_VIN2N
COMMON
INA3221_VIN3P
C235 10uF
6.3V 10% X7R 0805 COMMON
INA3221_VIN3N
R184 20ohm
0402
1 %
R179
0402
R191
0402
R192
0402
R178
0402
R183 20ohm
R1271
0.05 ohm
R1272
0402
0.05 ohm
R1273 0ohm
0402
0.05 ohm
R170
0402
0.05 ohm
COMMON
1 %
1 %
1 %
1 %
1 %
20ohm
20ohm
20ohm
0ohm
0ohm
0ohm
COMMON
COMMON
COMMON
COMMON
COMMON0402
DNI0402
DNI
DNI
COMMON
20ohm
12V_INP
12V_INN
12V_PEX6_1_INP
12V_PEX6_1_INN
12V_PEX8_2_INP
12V_PEX8_2_INN
GPIO3_NVAPI_4_WARN
GPIO9_THERM_ALERT*
PULLED-UP TO 3.3V ON GPIO PAGE
NVVDD_EN
PEX 3V3 INPUT - 10W
3V3
3V3
C846
0.1uF
16V 10% X7R 0402 COMMON
GND
Alternate
L1 1uH
DNISMD
LB3 220ohm
COMMONBEAD_0805
LB4 220ohm
COMMONBEAD_0805
PEX_12V INPUT - 66W
12V
C241
OUT
OUT
OUT
27,28,33,34
23
23,34
0.1uF
16V 10% X7R 0402 COMMON
C240 1uF
16V 10% X5R 0603 COMMON
C158 47uF_25V
VVVV284260
C71-4702540-N07
GND
2512_2PIN_KELVIN
RS1 0.005ohm
12V_INP
COMMON
PLACE 0603 10UF FOOTPRINT ON TOP OF 0805 FOOTPRINT
12V
5.5A
0.400
12V_INN
C230 10uF
16V 20% X5R 0603 DNI
3.3V 3A
0.400
C53 10uF
6.3V 20% X5R 0805 COMMON
L24
0.5uH
CHK_D2_7X7
L04-05A7321-L65
C51 1uF
16V 10% X5R 0402 COMMON
3V3_F
C52
0.1uF
16V 10% X7R 0402 COMMON
GND
12V_F
12V
5.5A
1
2
PEX6 INPUT 1 - 2x3 PCIE CON 75W
J8
6
3
4
PLACE ON NORTH SIDE
XXXV314_10 X N93-08M0361-W06
J10
+12V +12V +12V
GND GND GND
SENSE_1 SENSE_2
POWER_HEADER
POWCONN_D8_10 COMMON
6 7 8
1 2 4
3 5
GND
INPUT_PEX8_DT1* INPUT_PEX8_DT2*
VVVV284260
C11-4701012-W08
GND
C962 47PF
50V 5% C0G 0402 COMMON
PEX8_2_12V
XXXV314_10 X N93-08M0361-W06
+12V +12V +12V
GND GND GND
SENSE_1 SENSE_2
POWER_HEADER
POWCONN_D8_10 COMMON
7 8
1 2 4
3 5
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
VVVV284260
C11-4701012-W08
GND
C961 47PF
50V 5% C0G 0402 COMMON
GND
J1002/J1004 Co-lay
6P_SENSE_A INPUT_PEX6_DT1*
ASSEMBLY PAGE DETAIL
PLACE ON NORTH SIDE
R166
0
COMMON
0402
+0.05R
VVVV284260
R11-0000012-W08
0.254
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: Inputs, Filtering, and Monitoring
PEX6_12V
C506
0.1uF
16V 10% X7R 0402 COMMON
C505 1uF
16V 10% X5R 0603 COMMON
12V_INP
12V_INN
12V_PEX6_1_INN
12V_PEX6_1_INP
C166 47uF_25V
VVVV284260
C71-4702540-N07
GND
12V_PEX8_2_INP 12V_PEX8_2_INN
TRUE
6.25A12V
0.400
C511
0.1uF
16V 10% X7R 0402 COMMON
STUFF FOR 6-PIN CONNECTOR OR REVERSE CPU 8-PIN CONNECTOR
COMMON
RS502
COMMON
2512_2PIN_KELVIN
0.005ohm
2512_2PIN_KELVIN
C510 1uF
C159
16V
47uF_25V
10%
VVVV284260
X5R
C71-4702540-N07
0603 COMMON
GND
PEX8 INPUT 2 - 2x4 PCIE CON 150W
12.5A12V0.400 0.400
R5015
0402
0.05 ohm
RS501
0ohm
COMMON
FDBA
0.005ohm
12V
6.25A
0.400
INPUT_PEX6_DT1*
12V
12.5A
MSI
MSI
MSI
INPUT_PEX8_DT2*
NVIDIA CORPORATION
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NV_PN
G
12V_PEX6_F1
34
12V
12.5A
0.400
MS-V317
MS-V317
MS-V317
34
12V
6.25A
0.400
12V_PEX8_F2
Sheet ofDate:
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PAGE DATE
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33 37
33 37
33 37
33 OF 37
04-AUG-2014
L22
0.5uH
CHK_D2_7X7
L04-05A7321-L65
OUT
L23
0.5uH
CHK_D2_7X7
L04-05A7321-L65
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
PS: Inputs, Filtering, and Monitoring
PS: Inputs, Filtering, and Monitoring
PS: Inputs, Filtering, and Monitoring
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
OUT
600-1G401-BASE-QS1
PG401-A02 A
3
4
1.0
1.0
1.0
5
Page 34
A B C D E F G H
Page34: PS: Shutdown
1
THERM OVERT SHUTDOWN LATCH
23
IFP_IOVDD (backdrive prevention)
3V3_RUN
12V_F
R730
R744
1k
10k
1 %
5 %
0402
0402
COMMON
THERM_OVERT*
IN
no stuff for power supply bring-up
R731
0.05 ohm
NVVDD_EN
0ohm
COMMON0402
C858
0.1uF
16V 10% X5R 0402 DNI
GND
DNI
R725
3.24k
1 %
0402
DNI
GND
OUT
27,28,33,34
1
2
PEX Input - NVVDD Power Sequence
3
33
33
4
3
INPUT_PEX6_DT1* INPUT_PEX6_DT1_R*
IN
INPUT_PEX8_DT2* INPUT_PEX8_DT2_R*
IN
IN
R520
3.24k
1 % 0402 DNI
GND
POWER_BRAKE*
24
3
12V_F
3V3_F
R522
R523
10k
1k
5 % 0402 DNI
12V_F
R531 10k
5 % 0402 DNI
GND
PEX Input Present 1
1 % 0402 COMMON
R521
1k
COMMON
0402
1 %
C5005
0.1uF
25V 10% X7R 0603
3V3_F
R527 1k
1 % 0402 COMMON
R5016
0402
R529
3.24k
1 % 0402 DNI
GND
PEX Input Present 2
1k
COMMON
1 %
GND
COMMON
C5004
0.1uF
25V 10% X7R 0603 COMMON
TP18
XXXV314_10
X
N/A
TP17
XXXV314_10
X
N/A
GPU_BUFRST*
IN
PEX_RST_BUF*
IN
0.254
OUT
0.254
OUT
GND
R664
1k
0402 DNI
1 %
R662
0402
GPU_RST_R*
1k
DNI
1 %
C798
R663
100pF
10k
5 %
50V
0402
5%
DNI
C0G 0402 DNI
GND
GND
35
35
3V3_RUN
5
U50
1
@logic.u_and_2in(sym_1):page34_i255
POWER_BRAKE_R
4
2
SC70-5 DNI
3
GND
R1119 0ohm
0402 DNI
0.05 ohm
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
1G1D1S
G
1
ASSEMBLY PAGE DETAIL
IFP_IOVDD_EN
3
D
Q13
@discrete.q_fet_n_enh(sym_2):page34_i57 SOT23_1G1D1S DNI
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
27,28,33,34
R1120 0ohm
0402 DNI
0.05 ohm
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: Shutdown
INPUT_PEX6_DT1_R*
INPUT_PEX8_DT2_R*
IN
1G1D1S
D
G
1
S
R75
10k
DNI
0402
5 %
D501
@discrete.d_3pin_cc(sym_1):page34_i241
30V
0.2A
SOT23
COMMON
2
3
1
NVVDD_EN
GPIO9_THERM_ALERT*
3V3_F
3
Q12
@discrete.q_fet_p_enh(sym_2):page34_i61
SOT23_1G1D1S DNI
3V3_F_SW
2
-20V
-3A
-1000mohm@10V / 70mohm@4.5V / 115mohm@2.5V
-9A [ ] 12V
LB19
220ohm
16MIL3.3V
BEAD_0805
DNI
POWER CONNECTOR HOT-UNPLUG DETECT
3V3_F
3
C
Q506
@discrete.q_npn(sym_1):page34_i236
1
SOT23_1B1C1E COMMON
E
2
INPUT_NVVDD_EN_HPD
GND
23,33
R514 10k
5 % 0402 COMMON
INPUT_HOT_UNPLUG_QINPUT_HOT_UNPLUG_R
1B1C1E
GND
C507
0.1uF
16V 10% X7R 0402 COMMON
FDBA
R511
INPUT_HOT_UNPLUG_DT_R
10k
COMMON0402
5 %
INPUT_HOT_UNPLUG_DT
R510
1B1C1E
10k
B
COMMON0402
5 %
C504
0.1uF
16V 10% X7R 0402 COMMON
R513
GND
10k
0402
COMMON
5 %
OUT
IFP_IOVDD
3
C
Q507
B
@discrete.q_npn(sym_1):page34_i240
1
SOT23_1B1C1E COMMON
E
2
INPUT_HOTUNPLUG*
INPUT_EN_HPD
1B1C1E
B
1G1D1S
G
1
3
C
Q509
@discrete.q_npn(sym_1):page34_i239
1
SOT23_1B1C1E COMMON
E
2
INPUT_EN_HPD_Q
3
D
Q508
@discrete.q_fet_n_enh(sym_2):page34_i235 SOT23_1G1D1S COMMON
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
R515 0ohm
0.05 ohm
POWER OFF ON HOTPLUG EVENT STUFF TO LATCH
2
NVVDD_EN
COMMON0402
3
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
G
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
MS-V317
PS: Shutdown
PS: Shutdown
PS: Shutdown
600-1G401-BASE-QS1
PG401-A02 A
1.0
1.0
1.0
Sheet ofDate:
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PAGE DATE
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H
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Page 35
A B C D E F G H
Page35: PS: 12V Current Steering, PSI Control, and LED
PEX Input - 12V Current Steering FETs
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
MS-V317
12V Current Steering, PSI Control, and LED
12V Current Steering, PSI Control, and LED
12V Current Steering, PSI Control, and LED
1.0
1.0
35 37
35 37
35 37
1.0
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
1
IN
INPUT_PEX8_DT2_R*
R189 1k
0402
1 %
COMMON
INPUT_PEX8_DT2_RC*
2
3
GeForce Logo LED
4
23
GPIO11_LOGO_LED GPIO11_LOGO_LED_R
IN
3V3_RUN
R146 10k
5 % 0402
0.05 ohm
COMMON
0ohm
COMMON0402
R141
12V_PEX8_F2
PEX Input - Power Level/PSI* Control
1G1D1S
1G1D1S
GPIO20_SLI_LED_DIM
1B1C1E
B
1
3
D
Q37
@discrete.q_fet_n_enh(sym_2):page35_i101 SOT23_1G1D1S
G
1
COMMON
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
3
D
Q39
@discrete.q_fet_n_enh(sym_2):page35_i102 SOT23_1G1D1S
G
1
COMMON
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
R501
0402
3
C
Q504
@discrete.q_npn(sym_1):page35_i248 SOT23_1B1C1E COMMON
E
2
3V3_F
R181 10k
5 % 0402 COMMON
1G1D1S
G
1
3V3_RUN
R503
3.3k
5 % 0402 COMMON
10k
COMMON
5 %
3V3_RUN
1G1D1S
G
1
12V_F
R502 27k
5 % 0402 COMMON
3
D
Q502
@discrete.q_fet_n_enh(sym_2):page35_i250 SOT23_1G1D1S COMMON
S
2
GND
R185
20k
5 %
12V_PEX8_F2_STEER_RC
C233
4.7uF
16V0805 10% X5R COMMON
100k
COMMON0402
5 %
12V_F_STEER_N_R
3
D
Q42
@discrete.q_fet_n_enh(sym_2):page35_i100 SOT23_1G1D1S
G
1
COMMON
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
R525 1k
5 % 0603 COMMON
3
Q35
@discrete.q_fet_n_enh(sym_2):page35_i234 SOT23_1G1D1S COMMON
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
12V_PEX8_F2_STEER_N
0402
COMMON
12V_F_STEER_N
R173
20k
5 %
R524 1k
5 % 0603 COMMON
LED LED_Q*
1G4D3S
1G4D3S
0402
COMMON
12V_F
J6
1 2
HEADER_1X2_SHROUDED
N32-1020511-J11
VVVV284260
25V
3
3.4W
S
-80A
2
18mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
-10.8A
1
G
-30V
4
COMMON DFN3X3
D
@discrete.q_fet_p_enh(sym_8):page35_i741
Q41
5
12V_STEER_C
5
D
Q40
@discrete.q_fet_p_enh(sym_8):page35_i132
DFN3X3
G
4
COMMON
1
-30V
S
-10.8A
2
18mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
-80A
3
3.4W 25V
34
C232 1uF
16V 10% X5R 0603 COMMON
GND
34,35
SLI LED (GEFORCE ONLY)
23
IN
IN
INPUT_PEX6_DT1_R*
INPUT_PEX8_DT2_R*
IN
C234
4.7uF
16V
0805
10% X5R COMMON
R182
100k
0402 COMMON
5 %
3
1G1D1S
D
Q43
@discrete.q_fet_n_enh(sym_2):page35_i72 SOT23_1G1D1S
G
1
COMMON
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
12V_F
R186
1G1D1S
LED HEADER
(C0MM0N)
R160
R159
604ohm
680ohm
1 %
5 %
0603
0603
DNI
COMMON
1G1D1S
16V 10% X7R
0402
COMMON
D
G
1
S
C197
0.1uF
R142
1k
LED_ON
COMMON0402
1 %
GND
GPIO12_LOW_PERF* GPU SPEED
3V3_F
R176 10k
5 % 0402 DNI
LOWPWR_MODE
3
D
Q38
@discrete.q_fet_n_enh(sym_2):page35_i77 SOT23_1G1D1S DNI
S
2
60V
0.26A 3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A
0.3W 20V
GND
GPIO5_LED_Q
1G1D1S
D
G
1
S
0
1
R175 100k
5 % 0402 DNI
GND
12V_F
R508
44.2ohm
1 %
12V_F
0603 COMMON
R506 27k
5 % 0402 COMMON
SLI_LED_Q
3
Q501
@discrete.q_fet_n_enh(sym_2):page35_i259 SOT23_1G1D1S COMMON
GPIO5_LED_Q_N
2
3
Q503
@discrete.q_fet_n_enh(sym_2):page35_i256
SOT23_1G1D1S
COMMON
2
GND
Slow
Normal
GPIO12_LOW_PERF*
3V3_F
3
1B1C1E
C
R174
100ohm
0402
DNI
1 %
R507
44.2ohm
1 % 0603 COMMON
25V
SLI_LED_R
3
1G1D1S
D
G
1
S
Q36
B
@discrete.q_npn(sym_1):page35_i116
1
SOT23_1B1C1E DNI
E
2
GND
1B1C1E
C
B
1
E
Q505
18mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
-80A
3.4W
-30V
-10.8A
1S2
5
COMMON
DFN3X3
D
G
4
1G4D3S
@discrete.q_fet_p_enh(sym_8):page35_i737
R180 10k
5 % 0402 DNI
3
Q51
INS16739696 SOT23_1B1C1E DNI
2
GND
GND
PS_FBVDDQ_PSI*
R504 0ohm
0.05 ohm 0402 DNI
OUT
R177
0402 DNI
SLI_LED
0.05 ohm
23,33
GPIO6_PSI*GPIO6_PSI_R*
0ohm
OUT
OUT
OUT
31
22
1
2
23,27
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
PS: 12V Current Steering PSI Control and LED
5
NVIDIA CORPORATION
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600-1G401-BASE-QS1
PG401-A02
A
FDBA
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35 OF 37
PAGE DATE
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H
Page 36
A B C D E F G H
Page36: Mechanical: Bracket/Thermal Solution
1
MEC4-1
INS16973167 X8 DNI
2
Brackets:
BKT1
@design_lib.p2005bracket(sym_4):page36_i26 ATX_2X_2P DNI
1
MECH. MOUNTING ALL
3
2
Bracket Screw
MEC6
@mechanic.mec_screw(sym_2):page36_i3 STD DNI
new LF screw --155-0001-000. ROHS screw --154-0003-700.
GND
1
2
3
4
6
7
MEC4-2
INS16973156 X8 DNI
MEC4-3
INS16973145 X8 DNI
MEC4-4
INS16973134 X8 DNI
MEC4-6
INS16973112 X8 DNI
MEC4-7
INS16973101 X8 DNI
Mechanical Holes Symbol
1
DNI
1
DNI
1
DNI
1
DNI
1
DNI
MEC1
H_R220D125
MEC2
H_R220D125
MEC7
H_R220D125
MEC8
H_R220D125
MEC9
H_R220D125
1
DNI
1
DNI
1
DNI
1
DNI
1
DNI
MEC10
H_R220D125
MEC11
H_R220D125
MEC12
H_R220D125
MEC13
H_R220D125
MEC14
H_R220D125
1
2
3
GNDGND
X_PIN1*2
X_PIN1*2
J17
PCB
PCB
109-GN982-00A
COMMON
VVVV27729S
J16
PD0-0V27711-E48
HDMI_FEE
HDMI
$$ $$$$
HDMI_FEE
COMMON
VVVV27729S
Y01-RHDMI03-000
FM5
OPT
F_PAD_X
FM1
OPT
F_PAD_X
FM2
OPT
F_PAD_X
FM6
OPT
F_PAD_X
FM3
OPT
F_PAD_X
FM7
OPT
F_PAD_X
FM4
OPT
F_PAD_X
FM8
OPT
F_PAD_X
4
J11
341
2
impedence
4
J12
341
2
impedence
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
MECH: Bracket/Thermal
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
Wednesday, August 20, 2014
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
MS-V317
Mechanical: Bracket/Thermal Solution
Mechanical: Bracket/Thermal Solution
Mechanical: Bracket/Thermal Solution
Sheet ofDate:
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1.0
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A B C D E F G H
Page37:
1.P17 增加DVI ESD
2.P18~P21 修改HDMI,DP footprint,　增加HDMI ESD
3.簡化ＳＬＩ線路
4.移除原本FBVDDQ線路
5.P27~P30 更換NVVD 線路
1
6.P31~32 移除dynamic power circuit/增加風扇7511線路
7.P33 更換反插8PIN,Input choke
8.P35 增加MEM PSI 晶體
9.Remove MICROCONTROLLER
1
2
3
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-V317
MS-V317
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Wednesday, August 20, 2014
Wednesday, August 20, 2014
5
Wednesday, August 20, 2014
MS-V317
1.0
1.0
NA
NA
NA
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
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37 37
37 37
1.0
2
3
4
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY
MICROCONTROLLER
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
600-1G401-BASE-QS1
PG401-A02
A
FDBA
BOM REV
G
37 OF 37
PAGE DATE
04-AUG-2014
H
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