Page 1
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
ASSEMBLYNVPNVARIANT
B
1
2
SKU
3
4
5
6
12
13
14
7
8
9
10
11
15
P897 - GT200/NVIO2
P897, GT200-100, 896MB/1792MB - GDDR3 BGA136 16M/32Mx32
DVI-I + DVI-I + HD/SD/TVout, SPDIF, Dual SLI
Table of Contents
Page 1: Title Page
Page 2: Block Diagram
Page 3: PCI Express / JTAG
Page 4: Framebuffer A,B: GPU Section + Calibration
Page 5: Framebuffer C,D: GPU Section
Page 6: Framebuffer E,F: GPU Section
Page 7: Framebuffer G,H: GPU Section
BASE
SKU0053
SKU0054
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
600-10897-BASE-B01
600-10897-0053-300
600-10897-0054-300
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
DT, GT200-103-B3, 640/1440/1200, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
Page 8: Framebuffer A: Memory Section
Page 9: Framebuffer B: Memory Section
Page 10: Framebuffer C: Memory Section
Page 11: Framebuffer D: Memory Section
Page 12: Framebuffer E: Memory Section
Page 13: Framebuffer F: Memory Section
Page 14: Framebuffer G: Memory Section
Page 15: Decoupling: Memory Section A-D
Page 16: Decoupling: Memory Section E-G
Page 17: Decoupling: GPU (NVVDD, FBVDDQ)
Page 18: GPU-NVIO Interconnect: GV Bus / PLL
Page 19: Display: DACA (Middle DVI-I)
Page 20: Display: DACC (South DVI-I)
Page 21: Display: DACB (North MiniDIN) SD/HDTV out
Page 22: Display: IFPAB for south DVI-I (with DACC)
Page 23: Display: IFPCD for middle DVI-I (with DACA)
Page 24: Connectors: DR Interface (Dual SLI) / SPDIF
Page 25: MISC: GPIO / XTAL / VBIOS / HDCP / I2C
Page 26: MISC: FAN / THERM / IFP_IOVDD
Page 27: MISC: MIO / DVI / STRAPS / Hybrid
Page 28: Power and GND (GPU and NVIOx)
Page 29: Power Supply: 2V5 / PEX_PLLVDD / 1V15 (PEX_VDD, GV_VDD)
Page 30: Power Supply: Combined FBVDD/Q
Page 31: NVVDD Regulator
Page 32: Power Supply: NVVDD Phase 1-3 of 6
Page 33: Power Supply: NVVDD Phase 4-6 of 6
Page 34: Power: Input Rail Filter
Page 35: Thermal/Mechanical
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Title Page
www.vinafix.vn
600-10897-0053-300 A
p897
misun
1 OF 41
31-DEC-2008
Page 2
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Block Diagram
Power Sequence
5V - Always On
3V3 - Always On
12V_F - Always On
12V_PEX6_F1 - Always On
12V_PEX6_F2 - Always On
FBVDD/FBVDDQ NVVDD 2V5 1V15 -
NVVDD Enabled
Input_PEX_Enable
+ Therm Shutdown Latch
SPDIF 2x3 Pwr 2x3 Pwr
Dual SLI
Power Supply
NVVDD-PH1
MEM
MEM E
MEM D
Power Supply
FBVDD/FBVDDQ Combined
F
Power Supply
TV
Power Supply
5V Linear
MEM
C
MEM
G
NVVDD-PH2
Power Supply
NVVDD-PH3
NVIO2
GT200
MEM
B
MEM H
(N/A)
Power Supply
DVI-I DVI-I
1V15 (pex,gv)
MEM
Power Supply
NVVDD-PH4
Power Supply
NVVDD-PH5
Power Supply
A
2V5
Hybrid
Power Filter
12V_F
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Block Diagram
www.vinafix.vn
Power Supply
NVVDD-PH6
Power Supply
NVVDD-Controller
600-10897-0053-300 A
p897
misun
2 OF 41
31-DEC-2008
Page 3
PCI Express / JTAG
17/17 JTAG
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST
C
E
B
C
E
B
17/21 JTAG
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST
OUT
KEY
TRST*
TCK
GND
TMS
TDO
VCC
TDI
OUT
1/21 PCIex
PEX_IO_VDDQ
PEX_IO_VDDQ
PEX_IO_VDDQ
PEX_IO_VDDQ
PEX_IO_VDDQ
PEX_IO_VDDQ
PEX_IO_VDDQ
PEX_IO_VDDQ
PEX_IO_VDDQ
PEX_IO_VDD
PEX_IO_VDD
PEX_IO_VDD
PEX_IO_VDD
PEX_IO_VDD
PEX_IO_VDD
PEX_PLL_VDD
BUF_PCI_RESET
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
I2CS_SCL
I2CS_SDA
PEX_REFCLK
PEX_REFCLK
PEX_TX3
PEX_TX2
PEX_TX2
PEX_TX1
PEX_TX1
PEX_TX0
PEX_TX0
PEX_RX2
PEX_RX2
PEX_RX1
PEX_RX1
PEX_RX0
PEX_RX0
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_TX4
PEX_TX4
PEX_TX3
PEX_RX4
PEX_RX4
PEX_RX3
PEX_RX3
PEX_RX6
PEX_TX9
PEX_TX9
PEX_TX8
PEX_TX8
PEX_TX7
PEX_TX7
PEX_RX9
PEX_RX9
PEX_RX8
PEX_RX8
PEX_RX7
PEX_RX7
PEX_RX6
PEX_TX13
PEX_TX13
PEX_TX12
PEX_TX12
PEX_TX11
PEX_TX11
PEX_TX10
PEX_TX10
PEX_RX12
PEX_RX12
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_TX15
PEX_TX15
PEX_TX14
PEX_TX14
PEX_RX15
PEX_RX15
PEX_RX14
PEX_RX14
PEX_RX13
PEX_RX13
END OF X8
END OF X16
END OF X1
END OF X4
TCLK JTAG2
TMS JTAG5
TDO JTAG4
TDI JTAG3
WAKE
SMDAT
SMCLK
PERN0
PERP0
REFCLK
PERST
REFCLK
PETN1
PERP2
PETN0
PERP1
PERN1
PETP0
PETP1
PERN3
PETP3
PETN3
PETP2
PERP3
PETN2
PERN2
PERP4
PERN4
PETN4
PERP5
PETP4
PERN5
PETP5
PETP6
PERN6
PERP6
PETN5
PERP7
PETN6
PERN7
PETN8
PETP8
PERP8
PETN7
PETP7
PERN8
PERN9
PERP9
PERP10
PERN10
PETP10
PETP9
PETN9
PETN10
PETN11
PERP12
PERN12
PERP11
PERN11
PETP11
PETN12
PETP12
PETN13
PERP13
PERN13
PETP13
PERP14
PERN15
PETP15
PETN15
PERN14
PETN14
PETP14
PERP15
TRST* JTAG1+12V
+12V/RSVD
+3V3AUX
+12V
+12V
+12V
+3V3
+3V3
+3V3
PRSNT2
PRSNT1
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT2
RSVD
RSVD
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT2
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT2
GND
RSVD
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
12V
16MIL
12V
NV_SOURCE_POWER_NET=TRUE
C27
10UF
16V
10%
X5R
1206
NO STUFF
3V3
16MIL
NV_SOURCE_POWER_NET=TRUE
C1125
4.7UF
6.3V
10% 10%
X5R
0603
COMMON
3V3_AUX
3.3V
.5A
16MIL
NV_SOURCE_POWER_NET=TRUE
C1123
.1UF
6.3V
10%
X7R
0402
NO STUFF
GND
5.5A
C26
10UF
16V
10%
X5R
1206
NO STUFF
3.3V
3A
C1124
.1UF
6.3V
X7R
0402
COMMON
GND
C24
.1UF
50V
10%
X7R
0603
COMMON
GND
3V3_AUX
PEX_PRSNT1*
SNN_PEX_20
SNN_PEX_10
SNN_PEX_11
SNN_PEX_12
SNN_PEX_13
SNN_PEX_14
SNN_PEX_15
SNN_PEX_16
SNN_PEX_17
SNN_PEX_18
GND
GND
GND
GND
CN2
NONPHY-X16-B
CON_X16
CON_PCIEXP_X16_EDGE
NO STUFF
B1
B2
A2
A3
B3
B8
A9
A10
B10
A1
B17
B12
B4
A4
B7
A12
B13
A15
B16
B18
A18
B31
A19
B30
A32
A20
B21
B22
A23
A24
B25
B26
A27
A28
B29
A31
B32
B48
A33
A34
B35
B36
A37
A38
B39
B40
A41
A42
B43
B44
A45
A46
B47
B49
A49
B81
A50
B82
A51
B52
B53
A54
A55
B56
B57
A58
A59
B60
B61
A62
A63
B64
B65
A66
A67
B68
B69
A70
A71
B72
B73
A74
A75
B76
B77
A78
A79
B80
A82
SNN_PEX_TRST*
B9
SNN_PEX_TCK
A5
SNN_PEX_TDI
A6
SNN_PEX_TDO
A7
SNN_PEX_TMS
A8
SNN_PEX_I2CS_SCL
B5
SNN_PEX_I2CS_SDA
B6
SNN_PEX_08
B11
PEX_RST*
A11
PEX_REFCLK
A13
PEX_REFCLK*
A14
A16
A17
PEX_RX0
B14
PEX_RX0*
B15
A21
A22
PEX_RX1
B19
PEX_RX1*
B20
A25
A26
PEX_RX2
B23
PEX_RX2*
B24
A29
A30
PEX_RX3
B27
PEX_RX3*
B28
A35
A36
PEX_RX4
B33
PEX_RX4*
B34
A39
A40
PEX_RX5
B37
PEX_RX5*
B38
A43
A44
PEX_RX6
B41
PEX_RX6*
B42
A47
A48
PEX_RX7
B45
PEX_RX7*
B46
A52
A53
PEX_RX8
B50
PEX_RX8*
B51
A56
A57
PEX_RX9
B54
PEX_RX9*
B55
A60
A61
PEX_RX10
B58
PEX_RX10*
B59
A64
A65
PEX_RX11
B62
PEX_RX11*
B63
A68
A69
PEX_RX12
B66
PEX_RX12*
B67
A72
A73
PEX_RX13
B70
PEX_RX13*
B71
A76
A77
PEX_RX14
B74
PEX_RX14*
B75
A80
A81
PEX_RX15
B78
PEX_RX15*
B79
PEX_REFCLK
PEX_REFCLK
PEX_RX0
PEX_RX0
PEX_RX1
PEX_RX1
PEX_RX2
PEX_RX2
PEX_RX3
PEX_RX3
PEX_RX4
PEX_RX4
PEX_RX5
PEX_RX5
PEX_RX6
PEX_RX6
PEX_RX7
PEX_RX7
PEX_RX8
PEX_RX8
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_RX12
PEX_RX12
PEX_RX13
PEX_RX13
PEX_RX14
PEX_RX14
PEX_RX15
PEX_RX15
PEX_TX_C0
PEX_TX_C0*
PEX_TX_C1
PEX_TX_C1*
PEX_TX_C2
PEX_TX_C2*
PEX_TX_C3
PEX_TX_C3*
PEX_TX_C4
PEX_TX_C4*
PEX_TX_C5
PEX_TX_C5*
PEX_TX_C6
PEX_TX_C6*
PEX_TX_C7
PEX_TX_C7*
PEX_TX_C8
PEX_TX_C8*
PEX_TX_C9
PEX_TX_C9*
PEX_TX_C10
PEX_TX_C10*
PEX_TX_C11
PEX_TX_C11*
PEX_TX_C12
PEX_TX_C12*
PEX_TX_C13
PEX_TX_C13*
PEX_TX_C14
PEX_TX_C14*
PEX_TX_C15
PEX_TX_C15*
1V151V15
R834
10K
5%
0402
COMMON
50OHM 1
90DIFF 1
90DIFF 1
90DIFF
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF
90DIFF
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF
90DIFF 1
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
1
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
1
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
1
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
1
190DIFF
190DIFF
190DIFF
190DIFF .1UFC864
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
190DIFF
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
C1117
0402
C1108
0402
C1070
0402
C1042
0402
C1019
0402
C1002
0402
C997
0402
C994
0402 6.3V
C987
0402
C982
0402
C974
0402
C960
0402
C934
0402
C897
0402
C829
0402
27.5E<
.1UF
6.3V
.1UF
6.3V
.1UF
6.3V
.1UF
6.3V
.1UF
6.3V
.1UF
6.3V
.1UF
6.3V
.1UF
.1UF
6.3V
.1UF
6.3V
.1UF
6.3V
.1UF
6.3V
.1UF
6.3V
.1UF
6.3V0402
6.3V
.1UF
6.3V
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
3V3
J501
1
3
5
7
HDR_2F4
FEMALE
1.274MM
0
KEY6_JTAG_SMALL
NO STUFF
R827
10K
0402
COMMON
5%
2
4
GND
8
JTAG_TRST*
R31
0402
5%
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
10K
COMMON
R836
10K
5%
0402
COMMON
1V15
R42
COMMON
0402
5%
10%
X7R
10%
C1095
0402
X7R
10%
C1058
0402
X7R
10%
C1036
0402
X7R
10%
C1014
0402
X7R
10%
C1001
0402
X7R
10%
C996
0402
X7R
10%
C993
0402
X7R
10%
C986
0402
X7R
10%
C978
0402
X7R
10%
C971
0402
X7R
10%
C956
0402
X7R
10%
C919
0402
X7R
10%
C890
0402
X7R
10%
C865
0402
X7R
10%
C830
0402
X7R
.1UFC1116
COMMON
6.3V0402
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
.1UF
COMMON
6.3V
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
PEX_TX0
PEX_TX0*
PEX_TX4 PEX_TX4
PEX_TX4* PEX_TX4
PEX_TX5 PEX_TX5
PEX_TX5*
PEX_TX6 PEX_TX6
PEX_TX6* PEX_TX6
PEX_TX7 PEX_TX7
PEX_TX7* PEX_TX7
PEX_TX8 PEX_TX8
PEX_TX9* PEX_TX9
PEX_TX10 PEX_TX10
PEX_TX10* PEX_TX10
PEX_TX11 PEX_TX11
PEX_TX11* PEX_TX11
PEX_TX12* PEX_TX12
PEX_TX13
PEX_TX13* PEX_TX13
PEX_TX14 PEX_TX14
PEX_TX14* PEX_TX14
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
PCI Express / JTAG
PEX_TX0
PEX_TX0
PEX_TX1PEX_TX1
PEX_TX1PEX_TX1*
PEX_TX2PEX_TX2
PEX_TX2PEX_TX2*
PEX_TX3PEX_TX3
PEX_TX3PEX_TX3*
PEX_TX5
PEX_TX8PEX_TX8*
PEX_TX9PEX_TX9
PEX_TX12PEX_TX12
PEX_TX13
PEX_TX15PEX_TX15
PEX_TX15PEX_TX15*
5%
R41
0402
68K
www.vinafix.vn
JTAG
GND
350OHM
GND
3
50OHM
3
50OHM
3
50OHM
3
50OHM
68K
COMMON
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
R838
0
5%
0402
COMMON
R839
I2CS_SCL
I2CS_SDA
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 BM34
1
1
1
1
1
1
1
1
1
1
1
1
1 BN40
1
1
1
0402
5%
BH33
BJ33
BM23
BM24
BL25
BM25
BN23
BP23
BM26
BM27
BR23
BR24
BL28
BM28
BN24
BN25
BM29
BM30
BR26
BR27
BL31
BM31
BN27
BN28
BN31
BN32
BR29
BR30
BM32
BM33
BP30
BN30
BL34
BR32
BR33
BN34
BN35
BP33
BN33
BM35
BM36
BR35
BR36
BL37
BM37
BP36
BN36
BN37
BN38
BR38
BR39
BM38
BM39
BP39
BN39
BL40
BM40
BR41
BR42
BN41
BP42
BN42
BM41
BM42
BR44
BR45
JTAG_TDI_GPU
JTAG_TDO_GPU
R841
0
5%
0402
COMMON
0
NO STUFF
G1
G200-100-B1
BGA2236
COMMON
R842
0
5%
0402
NO STUFF
R843
0402
50OHM
50OHM
5%
0
COMMON
G1
G200-100-B1
BGA2236
COMMON
BL33
BJ29
BK30
3
BL30
3
BJ32
JTAG_TDI_NVIO
JTAG_TDO_NVIO
R826
3.3K
5%
0402
COMMON
JTAG_TRST2
350OHM
350OHM
3 150OHM
1B1C1E
R835
3.3K
5%
0402
COMMON
JTAG_TRST_3V3
3
Q508
MMBT2222A
SOT23_1B1C1E
COMMON
2
GND
350OHM
1B1C1E
3V3
R837
3.3K
5%
0402
COMMON
JTAG_TRST_3V3*
350OHM
3
Q510
MMBT2222A
1
SOT23_1B1C1E
COMMON
2
GND
AE19
AD19
AG18
AF19
AC19
U2
NVIO2-P-A2
BGA533
COMMON
1V15
BE30
BE33
BG29
BG32
BH26
BH30
BK26
BK29
BK32
C858
.1UF
6.3V
10%
X7R X5RX7R
0402
COMMON
C832
.1UF
6.3V
10%
0402
COMMON
C839
1UF
6.3V
10%
0402
COMMON
C817
1UF
6.3V
10%
0402
COMMON
C767
4.7UF
6.3V
10%
0603
COMMON
C966
10UF
10V
10%
X5RX5R X5R
0805
COMMON
C730
10UF
10V
10%
X5R
0805
COMMON
C874
10UF
10V
10%
X5R
0805
COMMON
GND
C842
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
X7R
0402
COMMON
.1UF
6.3V
10%10%
X7R
0402
COMMON
C922
C859
C824
C818
1V15
BE36
BE37
BF33
BF35
BG35
BK33
.1UF 1UF 1UF.1UF 4.7UF 10UF
6.3V
10%
X7R
0402
COMMON
C804
.1UF
6.3V
10%
X7R
0402
COMMON
6.3V
10%
X7R
0402
COMMON
C781
.1UF
6.3V
10%
X7R
0402
COMMON
6.3V
10%
X5R
0402
COMMON
C825
C761
C938
C792
6.3V
10%
X5R
0402
COMMON
GND
C731
C732
10V
6.3V
10%
10%
X5R
X5R
0805
0603
COMMON
COMMON
GND
GND
PEX_PLLVDD_OP
LB502
BEAD_0603
Note: Possible filter option for 10nH inductor
220R@100MHz
NO STUFF
29.1C>
1V15
16MIL
BK35
BN43
BJ27
PEX_PLLVDD
C789
.1UF
6.3V
10%
X7R
0402
COMMON
PEX_TSTCLK_OUTBM43
PEX_TSTCLK_OUT*
SNN_GPU_BUFRST*
C788
1UF
6.3V
10%
X5R
0402
COMMON
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
1.15V
C787
1UF
6.3V
10%
X5R
0402
COMMON
LB503
BEAD_0603
C779
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
90DIFF
90DIFF
220R@100MHz
COMMON
1
1
R709
0402
C798
1UF
6.3V
10%
X5R
0402
COMMON
GND
200
NO STUFF
5%
600-10897-0053-300 A
p897
misun
3 OF 41
31-DEC-2008
Page 4
OUT
OUTBIBIBIBIBIBIBIBIINININININININOUT
OUTINOUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTBIBIBIBIBIBIBIBIININININININININ
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
3/21 MEM_B
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D55
FBB_D54
FBB_D53
FBB_D52
FBB_D51
FBB_D50
FBB_D49
FBB_D48
FBB_D47
FBB_D46
FBB_D45
FBB_D44
FBB_D43
FBB_D42
FBB_D41
FBB_D40
FBB_D39
FBB_D38
FBB_D37
FBB_D36
FBB_DQS_RN7
FBB_DQS_RN6
FBB_DQS_RN5
FBB_DQS_RN4
FBB_DQM7
FBB_DQM6
FBB_DQM5
FBB_DQM4
FBB_D63
FBB_D62
FBB_D61
FBB_D60
FBB_D59
FBB_D58
FBB_D57
FBB_D56
FBB_DQS_WP4
FBB_DEBUG
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7
FBB1_CLK0
FBB1_CLK0
FBB1_CLK1
FBB1_CLK1
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D23
FBB_D22
FBB_D21
FBB_D20
FBB_D19
FBB_D18
FBB_D17
FBB_D16
FBB_D15
FBB_D14
FBB_D13
FBB_D12
FBB_D11
FBB_D10
FBB_D9
FBB_D8
FBB_D7
FBB_D6
FBB_D5
FBB_D4
FBB_DQS_RN3
FBB_DQS_RN2
FBB_DQS_RN1
FBB_DQS_RN0
FBB_DQM3
FBB_DQM2
FBB_DQM1
FBB_DQM0
FBB_D31
FBB_D30
FBB_D29
FBB_D28
FBB_D27
FBB_D26
FBB_D25
FBB_D24
FBB_DQS_WP0
FBB_DQS_WP3
FBB_DQS_WP2
FBB_DQS_WP1
FBB_CMD14
FBB_CMD13
FBB_CMD12
FBB_CMD11
FBB_CMD10
FBB_CMD9
FBB_CMD8
FBB_CMD7
FBB_CMD6
FBB_CMD5
FBB_CMD4
FBB_CMD3
FBB_CMD2
FBB_CMD1
FBB_CMD0
FBB_CMD32
FBB_CMD26
FBB_CMD25
FBB_CMD24
FBB_CMD23
FBB_CMD22
FBB_CMD21
FBB_CMD20
FBB_CMD18
FBB_CMD17
FBB_CMD16
FBB_CMD15
FBB_CMD19
FBB_CMD31
FBB_CMD30
FBB_CMD29
FBB_CMD28
FBB_CMD27
FBB0_CLK1
FBB0_CLK1
FBB0_CLK0
FBB0_CLK0
OUTININ
10/21 FBCAL
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
FB_VREF0
FB_VREF1
2/21 MEM_A
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D55
FBA_D54
FBA_D53
FBA_D52
FBA_D51
FBA_D50
FBA_D49
FBA_D48
FBA_D47
FBA_D46
FBA_D45
FBA_D44
FBA_D43
FBA_D42
FBA_D41
FBA_D40
FBA_D39
FBA_D38
FBA_D37
FBA_D36
FBA_DQS_RN7
FBA_DQS_RN6
FBA_DQS_RN5
FBA_DQS_RN4
FBA_DQM7
FBA_DQM6
FBA_DQM5
FBA_DQM4
FBA_D63
FBA_D62
FBA_D61
FBA_D60
FBA_D59
FBA_D58
FBA_D57
FBA_D56
FBA_DQS_WP4
FBAB_REFCLK
FBAB_REFCLK
FBA_DEBUG
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA1_CLK0
FBA1_CLK0
FBA1_CLK1
FBA1_CLK1
FBAB_MPLL_AVDD
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D6
FBA_D20
FBA_D12
FBA_D11
FBA_D9
FBA_D8
FBA_D7
FBA_D5
FBA_D23
FBA_D22
FBA_D21
FBA_D19
FBA_D18
FBA_D17
FBA_D16
FBA_D15
FBA_D14
FBA_D13
FBA_D10
FBA_DQS_RN3
FBA_DQS_RN2
FBA_DQS_RN1
FBA_DQS_RN0
FBA_DQM3
FBA_DQM2
FBA_DQM1
FBA_D30
FBA_D29
FBA_D28
FBA_D27
FBA_D26
FBA_D25
FBA_D24
FBA_D31
FBA_DQM0
FBA_DQS_WP0
FBA_DQS_WP3
FBA_DQS_WP2
FBA_DQS_WP1
FBA_CMD14
FBA_CMD13
FBA_CMD12
FBA_CMD11
FBA_CMD10
FBA_CMD9
FBA_CMD8
FBA_CMD7
FBA_CMD6
FBA_CMD5
FBA_CMD4
FBA_CMD3
FBA_CMD2
FBA_CMD1
FBA_CMD0
FBA_CMD32
FBA_CMD31
FBA_CMD30
FBA_CMD29
FBA_CMD28
FBA_CMD27
FBA_CMD26
FBA_CMD25
FBA_CMD24
FBA_CMD23
FBA_CMD22
FBA_CMD21
FBA_CMD20
FBA_CMD19
FBA_CMD18
FBA_CMD17
FBA_CMD16
FBA_CMD15
FBA0_CLK1
FBA0_CLK1
FBA0_CLK0
FBA0_CLK0
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer A,B: GPU Section + Calibration
AV52
AU51
AT52
AT50
AT49
AR49
AR50
AR52
AW48
AV46
AU47
AT47
AT46
AR46
AP47
AP48
AP52
AN52
AN51
AN50
AK49
AK50
AK51
AK52
AM49
AN49
AN48
AN47
AN46
AL47
AK47
AK48
AT51
AV47
AL52
AM46
AU53
AU48
AL51
AL48
AU52
AT48
AM50
AM47
BB54
BB55
BA53
BA55
AW53
AW54
AW55
AV53
AV55
AT53
AT54
AT55
AR53
AR55
AP53
AN55
AN53
AN54
AM53
AM55
AL53
AK53
AK54
AJ53
AJ55
AH53
AG55
AG53
AF55
AF54
AF53
AD55
AW47
AW46
AT45
AU45
G1
G200-100-B1
BGA2236
COMMON
FBB_D<32>
AJ50
FBB_D<33>
AJ52
FBB_D<34>
AH52
FBB_D<35>
AG52
FBB_D<36>
AF52
FBB_D<37>
AF51
FBB_D<38>
AF50
FBB_D<39>
AF49
FBB_D<40>
AJ46
FBB_D<41>
AJ47
FBB_D<42>
AH47
FBB_D<43>
AG47
FBB_D<44>
AF48
FBB_D<45>
AE48
FBB_D<46>
AE47
FBB_D<47>
AD47
FBB_D<48>
AE53
FBB_D<49>
AE52
FBB_D<50>
AE51
FBB_D<51>
AD52
FBB_D<52>
AC52
FBB_D<53>
AC51
FBB_D<54>
AB52
FBB_D<55>
AB51
FBB_D<56>
AD46
FBB_D<57>
AC46
FBB_D<58>
AC48
FBB_D<59>
AB48
FBB_D<60>
Y48
FBB_D<61>
W48
FBB_D<62>
Y46
FBB_D<63>
V46
FBB_DQM4
AG49
FBB_DQM5
AH48
FBB_DQM6
AC50
FBB_DQM7
Y47
FBB_DQS_RN4
AH51
FBB_DQS_RN5
AF47
FBB_DQS_RN6
AD50
FBB_DQS_RN7
AC47
FBB_DQS_WP4
AG50
FBB_DQS_WP5
AF46
FBB_DQS_WP6
AC49
FBB_DQS_WP7AB47
FBB_DEBUG
AU43
AK45
FBB1_CLK0* FBB1_CLK0
AK46
SNN_FBB1_CLK1 FBB1_CLK1
AP45
SNN_FBB1_CLK1* FBB1_CLK1
AN45
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer A,B: GPU Section + Calibration
G1
G200-100-B1
BGA2236
COMMON
FBA_D<32>
G1
G200-100-B1
BGA2236
COMMON
BK50
FBA_D<33>
BJ51
FBA_D<34>
BH51
FBA_D<35>
BH50
FBA_D<36>
BH49
FBA_D<37>
BG49
FBA_D<38>
BG50
FBA_D<39>
BG52
FBA_D<40>
BD49
FBA_D<41>
BC48
FBA_D<42>
BD47
FBA_D<43>
BC47
FBA_D<44>
BA47
FBA_D<45>
BA46
FBA_D<46>
AY47
FBA_D<47>
AY48
FBA_D<48>
BB52
FBA_D<49>
BE50
FBA_D<50>
BB51
FBA_D<51>
BE51
FBA_D<52>
BC52
FBA_D<53>
BC51
FBA_D<54>
BF52
FBA_D<55>
BE52
FBA_D<56>
BA52
FBA_D<57>
BA50
FBA_D<58>
BA49
FBA_D<59>
AW49
FBA_D<60>
AW50
FBA_D<61>
AW51
FBA_D<62>
AV50
FBA_D<63>
AV49
FBA_DQM4
BH52
FBA_DQM5
BB47
FBA_DQM6
BD50
FBA_DQM7
AW52
FBA_DQS_RN4
BK52
FBA_DQS_RN5
BB49
FBA_DQS_RN6
BC53
FBA_DQS_RN7
AY53
FBA_DQS_WP4
BJ52
FBA_DQS_WP5
BB48
FBA_DQS_WP6
BD52
FBA_DQS_WP7
AY52
FBA_DEBUG
AY43
FBAB_REFCLK
BF39
FBAB_REFCLK*
BE39
FBABCD_MPLL_AVDD
BC45
C759
.1UF
6.3V
10%
X7R
0402
COMMON
GNDGND GND
FBA1_CLK0 FBA1_CLK0
BB45
BB46
AW45
SNN_FBA1_CLK1* FBA1_CLK1
AY45
C747
1UF
6.3V
10%
X5R
0402
COMMON
FBA1_CLK0FBA1_CLK0*
FBA1_CLK1SNN_FBA1_CLK1
FBVDDQ
16MIL
LB501
R716
60.4
1%
0402
NO STUFF
1.15V
0402
C751
4.7UF
6.3V
10%
X5R
0603
COMMON
18.5D>
18.5D>
COMMON
10nH
0.042A
GND
C776
1UF
6.3V
10%
X5R
0402
COMMON
5.4C<
1V15
FBB0_CLK0
FBB0_CLK0*
SNN_FBB0_CLK1
FBA_D<0>
FBA_D<1>
FBA_D<2>
FBA_D<3>
FBA0_CLK0
FBA0_CLK0*
SNN_FBA0_CLK1
SNN_FBA0_CLK1*
FBA_D<4>
FBA_D<5>
FBA_D<6>
FBA_D<7>
FBA_D<8>
FBA_D<9>
FBA_D<10>
FBA_D<11>
FBA_D<12>
FBA_D<13>
FBA_D<14>
FBA_D<15>
FBA_D<16>
FBA_D<17>
FBA_D<18>
FBA_D<19>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_D<24>
FBA_D<25>
FBA_D<26>
FBA_D<27>
FBA_D<28>
FBA_D<29>
FBA_D<30>
FBA_D<31>
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_CMD<0>
FBA_CMD<1>
FBA_CMD<2>
FBA_CMD<3>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
FBA_CMD<7>
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<12>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<15>
FBA_CMD<16>
FBA_CMD<17>
FBA_CMD<18>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<21>
SNN_FBA_CMD<22>
FBA_CMD<23> BH55
FBA_CMD<24>
FBA_CMD<25>
FBA_CMD<26>
FBA_CMD<27>
FBA_CMD<28>
SNN_FBA_CMD<29>
SNN_FBA_CMD<30>
SNN_FBA_CMD<31>
SNN_FBA_CMD<32>
FBA0_CLK0
FBA0_CLK0
FBA0_CLK1
FBA0_CLK1
FBVDDQ
GND
BL39
BK38
BK39
BJ39
BK42
BJ41
BJ42
BH42
BN44
BM45
BL43
BK44
BK45
BJ45
BJ44
BH45
BN46
BM46
BM47
BL48
BL49
BM51
BL51
BL52
BK47
BJ47
BH46
BG46
BG47
BH48
BF48
BE47
BH39
BM44
BM48
BF47
BL42
BP45
BM50
BK48
BK41
BN45
BM49
BJ48
BR47
BN47
BR48
BP48
BN48
BN49
BR50
BN50
BR51
BP51
BN51
BP53
BN52
BN54
BM53
BL55
BL53
BL54
BK53
BK55
BJ53
BH53
BH54
BG53
BG55
BF53
BE53
BE54
BE55
BD53
BD55
BB53
BF45
BF44
BF41
BF42
R721
0402
R720
0402
R713
0402
48.7
COMMON
1%
40.2
COMMON
1%
40.2
COMMON
1%
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
SNN_FB_VREF0
SNN_FB_VREF1
L39
L40
L42
AG46
AH11
FB CAL and Vref
FBB_D<0>
FBB_D<1>
FBB_D<2>
FBB_D<3>
FBB_D<4>
FBB_D<5>
FBB_D<6>
FBB_D<7>
FBB_D<8>
FBB_D<9>
FBB_D<10>
FBB_D<11>
FBB_D<12>
FBB_D<13>
FBB_D<14>
FBB_D<15>
FBB_D<16>
FBB_D<17>
FBB_D<18>
FBB_D<19>
FBB_D<20>
FBB_D<21>
FBB_D<22>
FBB_D<23>
FBB_D<24>
FBB_D<25>
FBB_D<26>
FBB_D<27>
FBB_D<28>
FBB_D<29>
FBB_D<30>
FBB_D<31>
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_CMD<0>
FBB_CMD<1>
FBB_CMD<2>
FBB_CMD<3>
FBB_CMD<4>
FBB_CMD<5>
FBB_CMD<6>
FBB_CMD<7>
FBB_CMD<8>
FBB_CMD<9>
FBB_CMD<10>
FBB_CMD<11>
FBB_CMD<12>
FBB_CMD<13>
FBB_CMD<14>
FBB_CMD<15>
FBB_CMD<16>
FBB_CMD<17>
FBB_CMD<18>
FBB_CMD<19>
FBB_CMD<20>
FBB_CMD<21>
SNN_FBB_CMD<22>
FBB_CMD<23> AK55
FBB_CMD<24>
FBB_CMD<25>
FBB_CMD<26>
FBB_CMD<27>
FBB_CMD<28>
SNN_FBB_CMD<29>
SNN_FBB_CMD<30>
SNN_FBB_CMD<31>
SNN_FBB_CMD<32>
FBB0_CLK0
FBB0_CLK0
FBB0_CLK1
FBB0_CLK1SNN_FBB0_CLK1*
www.vinafix.vn
FBVDDQ
FBB1_CLK0FBB1_CLK0
R717
60.4
1%
0402
NO STUFF
50OHMFBA_D<0>
50OHMFBA_D<1>
50OHMFBA_D<2>
50OHMFBA_D<3>
FBA_D<4>
FBA_D<5>
FBA_D<6>
FBA_D<7>
FBA_D<8>
FBA_D<9>
FBA_D<10>
FBA_D<11>
FBA_D<12>
FBA_D<13>
FBA_D<14>
FBA_D<15>
FBA_D<16>
FBA_D<17>
FBA_D<18>
FBA_D<19>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_D<24>
FBA_D<25>
FBA_D<26>
FBA_D<27>
FBA_D<28>
FBA_D<29>
FBA_D<30>
FBA_D<31>
FBA_D<32>
FBA_D<33>
FBA_D<34>
FBA_D<35>
FBA_D<36>
FBA_D<37>
FBA_D<38>
FBA_D<39>
FBA_D<40>
FBA_D<41>
FBA_D<42>
FBA_D<43>
FBA_D<45>
FBA_D<46>
FBA_D<47>
FBA_D<48>
FBA_D<49>
FBA_D<50>
FBA_D<51>
FBA_D<52>
FBA_D<53>
FBA_D<54>
FBA_D<55>
FBA_D<56>
FBA_D<57>
FBA_D<58>
FBA_D<59>
FBA_D<60>
FBA_D<61>
FBA_D<62>
FBA_D<63>
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_CMD<0>
FBA_CMD<1>
FBA_CMD<2>
FBA_CMD<3>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
FBA_CMD<7>
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<12>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<15>
FBA_CMD<16>
FBA_CMD<17>
FBA_CMD<18>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<21>
FBA_CMD<23>
FBA_CMD<24>
FBA_CMD<25>
FBA_CMD<26>
FBA_CMD<27>
FBA_CMD<28>
FBA0_CLK0
FBA1_CLK0* 80DIFF
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHMFBA_D<44>
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHMFBA_DQS_WP2
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
80DIFF
80DIFFFBA0_CLK0*
80DIFFFBA1_CLK0
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
22
2
23
2
24
2
25
2
26
2
27
2
28
2
29
2
30
2
31
2
32
2
33
2
34
2
35
2
36
2
37
2
38
2
39
2
40
2
41
2
42
2
43
2
44
2
45
2
46
2
47
2
48
2
49
2
50
2
51
2
52
2
53
2
54
2
55
2
56
2
57
2
58
2
59
2
60
2
61
2
62
2
63
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
23
2
24
2
25
2
26
2
27
2
28
1
1
1
1
8.2A<>
FBA_D<0..63>
8.4A<>
8.5A<>
8.5A<>
8.5A<>
8.5A<>
8.5A<>
8.5A<>
8.5A<>
8.5A<
8.5A<
8.5A<
8.5A<
8.5A<
8.5A<
8.5A<
8.5A<
8.5A>
8.5A>
8.5A>
8.5A>
8.5A>
8.5A>
8.5A>
8.5A>
8.1A<
FBA_CMD<0..28>
8.2A<
8.2A<
8.2A<
8.2A<
2
FBB_D<0>
FBB_D<1>
FBB_D<2>
FBB_D<3>
FBB_D<4>
FBB_D<5>
FBB_D<6>
FBB_D<7>
FBB_D<8>
FBB_D<9>
FBB_D<10>
FBB_D<11>
FBB_D<12>
FBB_D<13>
FBB_D<14>
FBB_D<15>
FBB_D<16>
FBB_D<17>
FBB_D<18>
FBB_D<19>
FBB_D<20>
FBB_D<21>
FBB_D<22>
FBB_D<23>
FBB_D<24>
FBB_D<25>
FBB_D<26>
FBB_D<27>
FBB_D<28>
FBB_D<29>
FBB_D<30>
FBB_D<31>
FBB_D<32>
FBB_D<33>
FBB_D<34>
FBB_D<35>
FBB_D<36>
FBB_D<37>
FBB_D<38>
FBB_D<39>
FBB_D<40>
FBB_D<41>
FBB_D<42>
FBB_D<43>
FBB_D<44>
FBB_D<45>
FBB_D<46>
FBB_D<47>
FBB_D<48>
FBB_D<49>
FBB_D<50>
FBB_D<51>
FBB_D<52>
FBB_D<53>
FBB_D<54>
FBB_D<55>
FBB_D<56>
FBB_D<57>
FBB_D<58>
FBB_D<59>
FBB_D<60>
FBB_D<61>
FBB_D<62>
FBB_D<63>
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7
FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7
FBB_CMD<0>
FBB_CMD<1>
FBB_CMD<2>
FBB_CMD<3>
FBB_CMD<4>
FBB_CMD<5>
FBB_CMD<6>
FBB_CMD<7>
FBB_CMD<8>
FBB_CMD<9>
FBB_CMD<10>
FBB_CMD<11>
FBB_CMD<12>
FBB_CMD<13>
FBB_CMD<14>
FBB_CMD<15>
FBB_CMD<16>
FBB_CMD<17>
FBB_CMD<18>
FBB_CMD<19>
FBB_CMD<20>
FBB_CMD<21>
FBB_CMD<23>
FBB_CMD<24>
FBB_CMD<25>
FBB_CMD<26>
FBB_CMD<27>
FBB_CMD<28>
FBB0_CLK0
FBB0_CLK0*
FBB1_CLK0
FBB1_CLK0*
50OHM
50OHM
50OHM
50OHM 2
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM 2
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM 1
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
80DIFF
80DIFF
80DIFF
0
2
1
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
22
2
23
2
24
2
25
2
26
2
27
2
28
2
29
2
30
2
31
2
32
2
33
2
34
2
35
2
36
2
37
2
38
2
39
2
40
2
41
2
42
2
43
44
2
45
2
46
2
47
2
48
2
49
2
50
2
51
2
52
2
53
2
54
2
55
2
56
2
57
2
58
2
59
2
60
2
61
2
62
2
63
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
23
2
24
2
25
2
26
2
27
2
28
1
180DIFF
1
1
FBB_D<0..63>
FBB_CMD<0..28>
600-10897-0053-300 A
p897
misun
9.4A<>
9.5A<>
9.5A<>
9.5A<>
9.5A<>
9.5A<>
9.5A<>
9.5A<>
9.5A<
9.5A<
9.5A<
9.5A<
9.5A<
9.5A<
9.5A<
9.5A<
9.5A>
9.5A>
9.5A>
9.5A>
9.5A>
9.5A>
9.5A>
9.5A>
9.2A<
9.2A<
9.2A<
9.2A<
9.2A<>
9.1A<
4 OF 41
31-DEC-2008
Page 5
OUT
OUTBIBIBIBIBIBIBIBIINININININININOUT
OUTINOUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTBIBIBIBIBIBIBIBIININININININININ
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
5/21 MEM_D
FBD_D34
FBD_D33
FBD_D32
FBD_D35
FBD_D36
FBD_D37
FBD_D38
FBD_D39
FBD_D40
FBD_D41
FBD_D42
FBD_D43
FBD_D44
FBD_D45
FBD_D46
FBD_D47
FBD_D48
FBD_D49
FBD_D50
FBD_D51
FBD_D52
FBD_D53
FBD_D54
FBD_D55
FBD_D56
FBD_D57
FBD_D58
FBD_D59
FBD_D60
FBD_D61
FBD_D62
FBD_D63
FBD_DQM4
FBD_DQM5
FBD_DQM6
FBD_DQM7
FBD_DQS_RN4
FBD_DQS_RN5
FBD_DQS_RN6
FBD_DQS_RN7
FBD_DQS_WP4
FBD_DQS_WP7
FBD_DQS_WP6
FBD_DQS_WP5
FBD_DEBUG
FBD1_CLK1
FBD1_CLK1
FBD1_CLK0
FBD1_CLK0
FBD_D2
FBD_D1
FBD_D0
FBD_D3
FBD_D4
FBD_D5
FBD_D6
FBD_D7
FBD_D8
FBD_D9
FBD_D10
FBD_D11
FBD_D12
FBD_D13
FBD_D14
FBD_D15
FBD_D16
FBD_D17
FBD_D18
FBD_D19
FBD_D20
FBD_D21
FBD_D22
FBD_D23
FBD_D24
FBD_D25
FBD_D26
FBD_D27
FBD_D28
FBD_D29
FBD_D30
FBD_D31
FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQS_RN0
FBD_DQS_RN1
FBD_DQS_RN2
FBD_DQS_RN3
FBD_DQS_WP0
FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD7
FBD_CMD8
FBD_CMD9
FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
FBD_CMD26
FBD_CMD27
FBD_CMD28
FBD_CMD29
FBD_CMD30
FBD_CMD31
FBD_CMD32
FBD0_CLK0
FBD0_CLK0
FBD0_CLK1
FBD0_CLK1
INININ
4/21 MEM_C
FBC_D34
FBC_D33
FBC_D32
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
FBC_DQS_WP4
FBC_DEBUG
FBC_DQS_WP5
FBCD_REFCLK
FBCD_REFCLK
FBC_DQS_WP7
FBC_DQS_WP6
FBC1_CLK1
FBC1_CLK1
FBC1_CLK0
FBC1_CLK0
FBCD_MPLL_AVDD
FBC_D2
FBC_D1
FBC_D0
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_WP0
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_CMD25
FBC_CMD26
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_CMD32
FBC0_CLK0
FBC0_CLK0
FBC0_CLK1
FBC0_CLK1
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer C,D: GPU Section
E46
E45
F45
H45
G44
F44
D44
E43
L43
K42
J43
J42
G41
H40
G39
F39
C43
D43
E42
D41
D40
D39
E39
J40
K41
J39
H39
G38
H37
H36
K36
D45
H43
C40
L37
D46
G42
E40
J36
C46
H42
F41
J37
C54
B53
C51
C50
B51
A51
A50
C48
B48
C47
A47
C45
B45
A45
A44
C44
C42
B42
A42
C41
A41
C39
B39
A39
C38
A38
C36
B36
A36
C35
A35
C33
K44
J44
L34
L33
G1
G200-100-B1
BGA2236
COMMON
FBD_D<32>
C37
FBD_D<33>
D38
FBD_D<34>
F38
FBD_D<35>
E37
FBD_D<36>
F36
FBD_D<37>
G35
FBD_D<38>
F35
FBD_D<39>
D35
FBD_D<40>
J34
FBD_D<41>
H33
FBD_D<42>
J33
FBD_D<43>
K33
FBD_D<44>
K32
FBD_D<45>
J32
FBD_D<46>
J31
FBD_D<47>
H31
FBD_D<48>
C31
FBD_D<49>
C34
FBD_D<50>
D30
FBD_D<51>
D32
FBD_D<52>
E34
FBD_D<53>
D34
FBD_D<54>
D31
FBD_D<55>
D33
FBD_D<56>
F29
FBD_D<57>
F30
FBD_D<58>
D26
FBD_D<59>
D27
FBD_D<60>
D28
FBD_D<61>
E28
FBD_D<62>
E30
FBD_D<63>
E26
FBD_DQM4
E36
FBD_DQM5
J35
FBD_DQM6
F32
FBD_DQM7
C28
FBD_DQS_RN4
D36
FBD_DQS_RN5
H34
FBD_DQS_RN6
E33
FBD_DQS_RN7
D29
FBD_DQS_WP4
D37
FBD_DQS_WP5
G33
FBD_DQS_WP6
F33
FBD_DQS_WP7
C29
FBD_DEBUG
N42
FBD1_CLK0
J38
FBD1_CLK0*
K38
SNN_FBD1_CLK1
L30
SNN_FBD1_CLK1*
L31
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer C,D: GPU Section
G1
G200-100-B1
BGA2236
COMMON
FBC_D<32>
FBC_D<0>
FBC_D<1>
FBC_D<2>
FBC_D<3>
FBC_D<4>
FBC_D<5>
FBC_D<6>
FBC_D<7>
FBC_D<8>
FBC_D<9>
FBC_D<10>
FBC_D<11>
FBC_D<12>
FBC_D<13>
FBC_D<14>
FBC_D<15>
FBC_D<16>
FBC_D<17>
FBC_D<18> U50
FBC_D<19>
FBC_D<20>
FBC_D<21>
FBC_D<22>
FBC_D<23>
FBC_D<24>
FBC_D<25>
FBC_D<26>
FBC_D<27>
FBC_D<28>
FBC_D<29>
FBC_D<30>
FBC_D<31>
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_CMD<0>
FBC_CMD<1>
FBC_CMD<2>
FBC_CMD<3>
FBC_CMD<4>
FBC_CMD<5>
FBC_CMD<6>
FBC_CMD<7>
FBC_CMD<8>
FBC_CMD<9> V55
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<12>
FBC_CMD<13>
FBC_CMD<14>
FBC_CMD<15>
FBC_CMD<16>
FBC_CMD<17>
FBC_CMD<18>
FBC_CMD<19>
FBC_CMD<20>
FBC_CMD<21>
SNN_FBC_CMD<22>
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
FBC_CMD<26>
FBC_CMD<27>
FBC_CMD<28>
SNN_FBC_CMD<29>
SNN_FBC_CMD<30>
SNN_FBC_CMD<31>
SNN_FBC_CMD<32>
FBC0_CLK0
FBC0_CLK0
FBC0_CLK1
FBC0_CLK1
FBC0_CLK0
FBC0_CLK0*
SNN_FBC0_CLK1
SNN_FBC0_CLK1*
AB53
AA52
AA50
AA49
AD53
AC55
AC54
AC53
AA55
AA53
AA47
AA46
AC45
AB45
W53
W52
Y52
Y51
V49
U48
U47
T47
U46
U45
T45
R46
U52
U51
R50
P50
P51
P52
R52
P45
P46
P47
N47
P48
N48
L48
L49
W51
U49
T51
P49
Y49
R47
T52
M50
Y50
T48
T53
M49
Y55
Y54
Y53
V53
U55
U54
U53
R55
R53
P53
P54
P55
M55
M53
L55
L54
L53
J55
J53
H55
H54
H53
F55
F53
E55
E54
N51
FBC_D<33>
N52
FBC_D<34>
M52
FBC_D<35>
L50
FBC_D<36>
K51
FBC_D<37>
K52
FBC_D<38>
J52
FBC_D<39>
J50
FBC_D<40>
L45
FBC_D<41>
L46
FBC_D<42>
L47
FBC_D<43>
K48
FBC_D<44>
H48
FBC_D<45>
H46
FBC_D<46>
G47
FBC_D<47>
J49
FBC_D<48>
H49
FBC_D<49>
H50
FBC_D<50>
F50
FBC_D<51>
H51
FBC_D<52>
H52
FBC_D<53>
F52
FBC_D<54>
E53
FBC_D<55>
D53
FBC_D<56>
C52
FBC_D<57>
D51
FBC_D<58>
E52
FBC_D<59>
E51
FBC_D<60>
D48
FBC_D<61>
D47
FBC_D<62>
E48
FBC_D<63>
F47
FBC_DQM4
K53
FBC_DQM5
G48
FBC_DQM6
G51
FBC_DQM7
C49
FBC_DQS_RN4
L52
FBC_DQS_RN5
K47
FBC_DQS_RN6
G52
FBC_DQS_RN7
E49
FBC_DQS_WP4
L51
FBC_DQS_WP5
J47
FBC_DQS_WP6
G53
FBC_DQS_WP7
D49
FBC_DEBUG
P43
FBCD_REFCLK
AE45
FBCD_REFCLK*
AF45
FBABCD_MPLL_AVDD
N45
GND
M46
M47
Y45
W45
C748
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
GND
FBC1_CLK0FBC1_CLK0
FBC1_CLK0FBC1_CLK0*
FBC1_CLK1SNN_FBC1_CLK1
FBC1_CLK1SNN_FBC1_CLK1*
R714
60.4
1%
0402
NO STUFF
18.5D>
18.5D>
C754
4.7UF
6.3V
10%
X5R
0603
COMMON
4.3C>
FBD0_CLK0
FBD0_CLK0*
SNN_FBD0_CLK1
SNN_FBD0_CLK1*
FBD_D<0>
FBD_D<1>
FBD_D<2>
FBD_D<3>
FBD_D<4>
FBD_D<5>
FBD_D<6>
FBD_D<7>
FBD_D<8>
FBD_D<9>
FBD_D<10>
FBD_D<11>
FBD_D<12>
FBD_D<13>
FBD_D<14>
FBD_D<15>
FBD_D<16>
FBD_D<17>
FBD_D<18> D42
FBD_D<19>
FBD_D<20>
FBD_D<21>
FBD_D<22>
FBD_D<23>
FBD_D<24>
FBD_D<25>
FBD_D<26>
FBD_D<27>
FBD_D<28>
FBD_D<29>
FBD_D<30>
FBD_D<31>
FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQS_RN0
FBD_DQS_RN1
FBD_DQS_RN2
FBD_DQS_RN3
FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_CMD<0>
FBD_CMD<1>
FBD_CMD<2>
FBD_CMD<3>
FBD_CMD<4>
FBD_CMD<5>
FBD_CMD<6>
FBD_CMD<7>
FBD_CMD<8>
FBD_CMD<9> A48
FBD_CMD<10>
FBD_CMD<11>
FBD_CMD<12>
FBD_CMD<13>
FBD_CMD<14>
FBD_CMD<15>
FBD_CMD<16>
FBD_CMD<17>
FBD_CMD<18>
FBD_CMD<19>
FBD_CMD<20>
FBD_CMD<21>
SNN_FBD_CMD<22>
FBD_CMD<23>
FBD_CMD<24>
FBD_CMD<25>
FBD_CMD<26>
FBD_CMD<27>
FBD_CMD<28>
SNN_FBD_CMD<29>
SNN_FBD_CMD<30>
SNN_FBD_CMD<31>
SNN_FBD_CMD<32>
FBD0_CLK0
FBD0_CLK0
FBD0_CLK1
FBD0_CLK1
www.vinafix.vn
FBVDDQ
FBD1_CLK0
FBD1_CLK0
FBD1_CLK1
FBD1_CLK1
R711
60.4
1%
0402
NO STUFF
FBC_D<0>
FBC_D<1>
FBC_D<2>
FBC_D<3>
FBC_D<4>
FBC_D<5>
FBC_D<6>
FBC_D<7>
FBC_D<8>
FBC_D<9>
FBC_D<10>
FBC_D<11>
FBC_D<12>
FBC_D<13>
FBC_D<14>
FBC_D<15>
FBC_D<16>
FBC_D<17>
FBC_D<18>
FBC_D<19>
FBC_D<20>
FBC_D<21>
FBC_D<22>
FBC_D<23>
FBC_D<24>
FBC_D<25>
FBC_D<26>
FBC_D<27>
FBC_D<28>
FBC_D<29>
FBC_D<30>
FBC_D<31>
FBC_D<32>
FBC_D<33>
FBC_D<34>
FBC_D<35>
FBC_D<36>
FBC_D<37>
FBC_D<38>
FBC_D<39>
FBC_D<40>
FBC_D<41>
FBC_D<42>
FBC_D<43>
FBC_D<44>
FBC_D<45>
FBC_D<46>
FBC_D<47>
FBC_D<48>
FBC_D<49>
FBC_D<50>
FBC_D<51>
FBC_D<52>
FBC_D<53>
FBC_D<54>
FBC_D<55>
FBC_D<56>
FBC_D<57>
FBC_D<58>
FBC_D<59>
FBC_D<60>
FBC_D<61>
FBC_D<62>
FBC_D<63>
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_CMD<0>
FBC_CMD<1>
FBC_CMD<2>
FBC_CMD<3>
FBC_CMD<4>
FBC_CMD<5>
FBC_CMD<6>
FBC_CMD<7>
FBC_CMD<8>
FBC_CMD<9>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<12>
FBC_CMD<13>
FBC_CMD<14>
FBC_CMD<15>
FBC_CMD<16>
FBC_CMD<17>
FBC_CMD<18>
FBC_CMD<19>
FBC_CMD<20>
FBC_CMD<21>
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
FBC_CMD<26>
FBC_CMD<27>
FBC_CMD<28>
FBC0_CLK0
FBC0_CLK0*
FBC1_CLK0
FBC1_CLK0*
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
80DIFF
80DIFF
80DIFF
80DIFF
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
22
2
23
2
24
2
25
2
26
2
27
2
28
2
29
2
30
2
31
2
32
2
33
2
34
2
35
2
36
2
37
2
38
2
39
2
40
2
41
2
42
2
43
2
44
2
45
2
46
2
47
2
48
2
49
2
50
2
51
2
52
2
53
2
54
2
55
2
56
2
57
2
58
2
59
2
60
2
61
2
62
2
63
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
23
2
24
2
25
2
26
2
27
2
28
1
1
1
1
10.2A<>
FBC_D<0..63>
10.4A<>
10.5A<>
10.5A<>
10.5A<>
10.5A<>
10.5A<>
10.5A<>
10.5A<>
10.5A<
10.5A<
10.5A<
10.5A<
10.5A<
10.5A<
10.5A<
10.5A<
10.5A>
10.5A>
10.5A>
10.5A>
10.5A>
10.5A>
10.5A>
10.5A>
10.1A<
FBC_CMD<0..28>
10.2A<
10.2A<
10.2A<
10.2A<
2
FBD_D<0>
FBD_D<1>
FBD_D<2>
FBD_D<3>
FBD_D<4>
FBD_D<5>
FBD_D<6>
FBD_D<7>
FBD_D<8>
FBD_D<9>
FBD_D<10>
FBD_D<11>
FBD_D<12>
FBD_D<13>
FBD_D<14>
FBD_D<15>
FBD_D<16>
FBD_D<17>
FBD_D<18>
FBD_D<19>
FBD_D<20>
FBD_D<21>
FBD_D<22>
FBD_D<23>
FBD_D<24>
FBD_D<25>
FBD_D<26>
FBD_D<27>
FBD_D<28>
FBD_D<29>
FBD_D<30>
FBD_D<31>
FBD_D<32>
FBD_D<33>
FBD_D<34>
FBD_D<35>
FBD_D<36>
FBD_D<37>
FBD_D<38>
FBD_D<39>
FBD_D<40>
FBD_D<41>
FBD_D<42>
FBD_D<43>
FBD_D<44>
FBD_D<45>
FBD_D<46>
FBD_D<47>
FBD_D<48>
FBD_D<49>
FBD_D<50>
FBD_D<51>
FBD_D<52>
FBD_D<53>
FBD_D<54>
FBD_D<55>
FBD_D<56>
FBD_D<57>
FBD_D<58>
FBD_D<59>
FBD_D<60>
FBD_D<61>
FBD_D<62>
FBD_D<63>
FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQM4
FBD_DQM5
FBD_DQM6
FBD_DQM7
FBD_DQS_RN0
FBD_DQS_RN1
FBD_DQS_RN2
FBD_DQS_RN3
FBD_DQS_RN4
FBD_DQS_RN5
FBD_DQS_RN6
FBD_DQS_RN7
FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_DQS_WP4
FBD_DQS_WP5
FBD_DQS_WP6
FBD_DQS_WP7
FBD_CMD<0>
FBD_CMD<1>
FBD_CMD<2>
FBD_CMD<3>
FBD_CMD<4>
FBD_CMD<5>
FBD_CMD<6>
FBD_CMD<7>
FBD_CMD<8>
FBD_CMD<9>
FBD_CMD<10>
FBD_CMD<11>
FBD_CMD<12>
FBD_CMD<13>
FBD_CMD<14>
FBD_CMD<15>
FBD_CMD<16>
FBD_CMD<17>
FBD_CMD<18>
FBD_CMD<19>
FBD_CMD<20>
FBD_CMD<21>
FBD_CMD<23>
FBD_CMD<24>
FBD_CMD<25>
FBD_CMD<26>
FBD_CMD<27>
FBD_CMD<28>
FBD0_CLK0
FBD0_CLK0*
FBD1_CLK0
FBD1_CLK0*
50OHM
50OHM
50OHM
50OHM 2
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM 2
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM 1
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
80DIFF
80DIFF 1
80DIFF
80DIFF
0
2
1
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
22
2
23
2
24
2
25
2
26
2
27
2
28
2
29
2
30
2
31
2
32
2
33
2
34
2
35
2
36
2
37
2
38
2
39
2
40
2
41
2
42
2
43
44
2
45
2
46
2
47
2
48
2
49
2
50
2
51
2
52
2
53
2
54
2
55
2
56
2
57
2
58
2
59
2
60
2
61
2
62
2
63
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
150OHM
1
1
1
1
1
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
23
2
24
2
25
2
26
2
27
2
28
1
1
1
FBD_D<0..63>
FBD_CMD<0..28>
600-10897-0053-300 A
p897
misun
11.4A<>
11.5A<>
11.5A<>
11.5A<>
11.5A<>
11.5A<>
11.5A<>
11.5A<>
11.5A<
11.5A<
11.5A<
11.5A<
11.5A<
11.5A<
11.5A<
11.5A<
11.5A>
11.5A>
11.5A>
11.5A>
11.5A>
11.5A>
11.5A>
11.5A>
11.2A<
11.2A<
11.2A<
11.2A<
11.2A<>
11.1A<
5 OF 41
31-DEC-2008
Page 6
OUT
OUTBIBIBIBIBIBIBIBIININININININININ
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTBIBIBIBIBIBIBIBIININININININININ
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
7/21 MEM_F
FBF_D34
FBF_D33
FBF_D32
FBF_D35
FBF_D36
FBF_D37
FBF_D38
FBF_D39
FBF_D40
FBF_D41
FBF_D42
FBF_D43
FBF_D44
FBF_D45
FBF_D46
FBF_D47
FBF_D48
FBF_D49
FBF_D50
FBF_D51
FBF_D52
FBF_D53
FBF_D54
FBF_D55
FBF_D56
FBF_D57
FBF_D58
FBF_D59
FBF_D60
FBF_D61
FBF_D62
FBF_D63
FBF_DQM4
FBF_DQM5
FBF_DQM6
FBF_DQM7
FBF_DQS_RN4
FBF_DQS_RN5
FBF_DQS_RN6
FBF_DQS_RN7
FBF_DQS_WP4
FBF_DQS_WP7
FBF_DQS_WP6
FBF_DQS_WP5
FBF_DEBUG
FBF1_CLK1
FBF1_CLK1
FBF1_CLK0
FBF1_CLK0
FBF_D2
FBF_D1
FBF_D0
FBF_D3
FBF_D4
FBF_D5
FBF_D6
FBF_D7
FBF_D8
FBF_D9
FBF_D10
FBF_D11
FBF_D12
FBF_D13
FBF_D14
FBF_D15
FBF_D16
FBF_D17
FBF_D18
FBF_D19
FBF_D20
FBF_D21
FBF_D22
FBF_D23
FBF_D24
FBF_D25
FBF_D26
FBF_D27
FBF_D28
FBF_D29
FBF_D30
FBF_D31
FBF_DQM0
FBF_DQM1
FBF_DQM2
FBF_DQM3
FBF_DQS_RN0
FBF_DQS_RN1
FBF_DQS_RN2
FBF_DQS_RN3
FBF_DQS_WP0
FBF_CMD0
FBF_CMD1
FBF_CMD2
FBF_CMD3
FBF_CMD4
FBF_CMD5
FBF_CMD6
FBF_CMD7
FBF_CMD8
FBF_CMD9
FBF_CMD10
FBF_CMD11
FBF_CMD12
FBF_CMD13
FBF_CMD14
FBF_DQS_WP1
FBF_DQS_WP2
FBF_DQS_WP3
FBF_CMD28
FBF_CMD29
FBF_CMD30
FBF_CMD15
FBF_CMD16
FBF_CMD17
FBF_CMD18
FBF_CMD19
FBF_CMD20
FBF_CMD21
FBF_CMD22
FBF_CMD23
FBF_CMD24
FBF_CMD25
FBF_CMD26
FBF_CMD27
FBF_CMD31
FBF_CMD32
FBF0_CLK0
FBF0_CLK0
FBF0_CLK1
FBF0_CLK1
IN
IN
6/21 MEM_E
FBE_D32
FBE_D33
FBE_D34
FBE_D35
FBE_D55
FBE_D54
FBE_D53
FBE_D52
FBE_D51
FBE_D50
FBE_D49
FBE_D48
FBE_D47
FBE_D46
FBE_D45
FBE_D44
FBE_D43
FBE_D42
FBE_D41
FBE_D40
FBE_D39
FBE_D38
FBE_D37
FBE_D36
FBE_DQS_RN7
FBE_DQS_RN6
FBE_DQS_RN5
FBE_DQS_RN4
FBE_DQM7
FBE_DQM6
FBE_DQM5
FBE_DQM4
FBE_D63
FBE_D62
FBE_D61
FBE_D60
FBE_D59
FBE_D58
FBE_D57
FBE_D56
FBE_DQS_WP4
FBEF_REFCLK
FBEF_REFCLK
FBE_DEBUG
FBE_DQS_WP5
FBE_DQS_WP6
FBE_DQS_WP7
FBE1_CLK0
FBE1_CLK0
FBE1_CLK1
FBE1_CLK1
FBEF_MPLL_AVDD
FBE_D0
FBE_D1
FBE_D2
FBE_D3
FBE_D23
FBE_D22
FBE_D21
FBE_D20
FBE_D19
FBE_D18
FBE_D17
FBE_D16
FBE_D15
FBE_D14
FBE_D13
FBE_D12
FBE_D11
FBE_D10
FBE_D9
FBE_D4
FBE_D8
FBE_D7
FBE_D6
FBE_D5
FBE_DQS_RN3
FBE_DQS_RN2
FBE_DQS_RN1
FBE_DQS_RN0
FBE_DQM3
FBE_DQM2
FBE_DQM1
FBE_DQM0
FBE_D31
FBE_D30
FBE_D29
FBE_D28
FBE_D27
FBE_D26
FBE_D25
FBE_D24
FBE_DQS_WP0
FBE_DQS_WP3
FBE_DQS_WP2
FBE_DQS_WP1
FBE_CMD14
FBE_CMD13
FBE_CMD12
FBE_CMD11
FBE_CMD10
FBE_CMD9
FBE_CMD8
FBE_CMD7
FBE_CMD6
FBE_CMD5
FBE_CMD4
FBE_CMD3
FBE_CMD2
FBE_CMD1
FBE_CMD0
FBE_CMD32
FBE_CMD31
FBE_CMD30
FBE_CMD29
FBE_CMD28
FBE_CMD27
FBE_CMD26
FBE_CMD25
FBE_CMD24
FBE_CMD23
FBE_CMD22
FBE_CMD21
FBE_CMD20
FBE_CMD19
FBE_CMD18
FBE_CMD17
FBE_CMD16
FBE_CMD15
FBE0_CLK1
FBE0_CLK1
FBE0_CLK0
FBE0_CLK0
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer E,F: GPU Section
K14
H13
J12
G12
G11
H11
H10
J10
N11
P11
P10
N9
P8
P7
M7
M6
E7
F8
H8
J9
K8
J7
J6
D8
C7
D7
D6
C4
D3
E4
F4
J11
N8
F6
C5
L11
L7
H7
E5
K11
L8
H6
D5
A12
C12
A11
B11
C11
A9
C9
A8
B8
A6
C6
A5
B5
B3
C2
E3
E2
E1
F3
F1
H3
H2
H1
J3
J1
L3
L2
L1
M3
M1
P3
P2
M10
M9
W11
Y11FBF0_CLK1
G1
G200-100-B1
BGA2236
COMMON
FBF_D<32>
G3
FBF_D<33>
G4
FBF_D<34>
G5
FBF_D<35>
H4
FBF_D<36>
K3
FBF_D<37>
K4
FBF_D<38>
L4
FBF_D<39>
L5
FBF_D<40>
N3
FBF_D<41>
M4
FBF_D<42>
N4
FBF_D<43>
N5
FBF_D<44>
R4
FBF_D<45>
T4
FBF_D<46>
T3
FBF_D<47>
U4
FBF_D<48>
P6
FBF_D<49>
R6
FBF_D<50>
U6
FBF_D<51>
R7
FBF_D<52>
T8
FBF_D<53>
U10
FBF_D<54>
T11
FBF_D<55>
U11
FBF_D<56>
W3
FBF_D<57>
V4
FBF_D<58>
V6
FBF_D<59>
Y7
FBF_D<60>
AA7
FBF_D<61>
AA6
FBF_D<62>
Y5
FBF_D<63>
AA4
FBF_DQM4
K5
FBF_DQM5
T5
FBF_DQM6
T9
FBF_DQM7
Y6
FBF_DQS_RN4
H5
FBF_DQS_RN5
P4
FBF_DQS_RN6
U7
FBF_DQS_RN7
Y4
FBF_DQS_WP4
J4
FBF_DQS_WP5
P5
FBF_DQS_WP6
U8
FBF_DQS_WP7
W4
FBF_DEBUG
P13
FBF1_CLK0
R9
FBF1_CLK0*
R10
SNN_FBF1_CLK1
AB11
SNN_FBF1_CLK1*
AC11
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer E,F: GPU Section
G1
G200-100-B1
BGA2236
COMMON
FBE_D<32>
FBE_D<0>
FBE_D<1>
FBE_D<2>
FBE_D<3>
FBE_D<4>
FBE_D<5>
FBE_D<6>
FBE_D<7>
FBE_D<8>
FBE_D<9>
FBE_D<10>
FBE_D<11>
FBE_D<12>
FBE_D<13>
FBE_D<14>
FBE_D<15>
FBE_D<16>
FBE_D<17>
FBE_D<18> F26
FBE_D<19>
FBE_D<20>
FBE_D<21>
FBE_D<22>
FBE_D<23>
FBE_D<24>
FBE_D<25>
FBE_D<26>
FBE_D<27>
FBE_D<28>
FBE_D<29>
FBE_D<30>
FBE_D<31>
FBE_DQM0
FBE_DQM1
FBE_DQM2
FBE_DQM3
FBE_DQS_RN0
FBE_DQS_RN1
FBE_DQS_RN2
FBE_DQS_RN3
FBE_DQS_WP0
FBE_DQS_WP1
FBE_DQS_WP2
FBE_DQS_WP3
FBE_CMD<0>
FBE_CMD<1>
FBE_CMD<2>
FBE_CMD<3>
FBE_CMD<4>
FBE_CMD<5>
FBE_CMD<6>
FBE_CMD<7>
FBE_CMD<8>
FBE_CMD<9> C27
FBE_CMD<10>
FBE_CMD<11>
FBE_CMD<12>
FBE_CMD<13>
FBE_CMD<14>
FBE_CMD<15>
FBE_CMD<16>
FBE_CMD<17>
FBE_CMD<18>
FBE_CMD<19>
FBE_CMD<20>
FBE_CMD<21>
SNN_FBE_CMD<22>
FBE_CMD<23>
FBE_CMD<24>
FBE_CMD<25>
FBE_CMD<26>
FBE_CMD<27>
FBE_CMD<28>
SNN_FBE_CMD<30>
SNN_FBE_CMD<31>
SNN_FBE_CMD<32>
FBE0_CLK0
FBE0_CLK0
FBE0_CLK1
FBE0_CLK1
FBE0_CLK0
FBE0_CLK0*
SNN_FBE0_CLK1
SNN_FBE0_CLK1*
G29
G30
H30
J30
K30
K27
J27
G27
H26
J26
K26
J25
J24
K23
J23
H23
C25
E25
F24
D23
F23
D22
C22
G23
H22
G21
J21
J20
H20
G20
H19
J29
G26
E22
K21
J28
G24
D25
J19
K29
H25
D24
K20
B33
A33
C32
A32
B30
A30
C30
A29
A27
A26
B26
C26
A24
C24
A23
B23
C23
A21
C21
A20
B20
C20
A18
C18
A17
B17
C17
A15
C15SNN_FBE_CMD<29>
A14
B14
C14
L25
L26
L22
L23
D21
FBE_D<33>
D20
FBE_D<34>
E20
FBE_D<35>
F20
FBE_D<36>
E19
FBE_D<37>
F18
FBE_D<38>
G18
FBE_D<39>
D17
FBE_D<40>
J18
FBE_D<41>
K18
FBE_D<42>
K17
FBE_D<43>
J17
FBE_D<44>
G15
FBE_D<45>
G14
FBE_D<46>
H14
FBE_D<47>
J14
FBE_D<48>
F17
FBE_D<49>
E17
FBE_D<50>
D16
FBE_D<51>
D15
FBE_D<52>
D14
FBE_D<53>
E14
FBE_D<54>
F14
FBE_D<55>
D13
FBE_D<56>
C13
FBE_D<57>
D12
FBE_D<58>
F12
FBE_D<59>
F11
FBE_D<60>
D10
FBE_D<61>
D9
FBE_D<62>
F9
FBE_D<63>
G9
FBE_DQM4
D18
FBE_DQM5
H16
FBE_DQM6
C16
FBE_DQM7
C10
FBE_DQS_RN4
C19
FBE_DQS_RN5
H17
FBE_DQS_RN6
F15
FBE_DQS_RN7
E11
FBE_DQS_WP4
D19
FBE_DQS_WP5
G17
FBE_DQS_WP6
E16
FBE_DQS_WP7
D11
FBE_DEBUG
N14
FBEF_REFCLK
L19
FBEF_REFCLK*
L20
FBEFGH_MPLL_AVDD
K12
C942
.1UF
6.3V
10%
X7R
0402
COMMON
GND
FBE1_CLK0 FBE1_CLK0
K15
J15
L17
L16
GND
C936
1UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
16MIL
LB505
FBE1_CLK0FBE1_CLK0*
FBE1_CLK1SNN_FBE1_CLK1
FBE1_CLK1SNN_FBE1_CLK1*
GND
R744
60.4
1%
0402
NO STUFF
18.5D>
18.5D>
1.15V
0402
C959
4.7UF
6.3V
10%
X5R
0603
COMMON
COMMON
0.042A
10nH
7.4C<
1V15
C921
1UF
6.3V
10%
X5R
0402
COMMON
GND
FBF0_CLK0
FBF0_CLK0*
SNN_FBF0_CLK1
SNN_FBF0_CLK1*
FBF_D<0>
FBF_D<1>
FBF_D<2>
FBF_D<3>
FBF_D<4>
FBF_D<5>
FBF_D<6>
FBF_D<7>
FBF_D<8>
FBF_D<9>
FBF_D<10>
FBF_D<11>
FBF_D<12>
FBF_D<13>
FBF_D<14>
FBF_D<15>
FBF_D<16>
FBF_D<17>
FBF_D<18> G8
FBF_D<19>
FBF_D<20>
FBF_D<21>
FBF_D<22>
FBF_D<23>
FBF_D<24>
FBF_D<25>
FBF_D<26>
FBF_D<27>
FBF_D<28>
FBF_D<29>
FBF_D<30>
FBF_D<31>
FBF_DQM0
FBF_DQM1
FBF_DQM2
FBF_DQM3
FBF_DQS_RN0
FBF_DQS_RN1
FBF_DQS_RN2
FBF_DQS_RN3
FBF_DQS_WP0
FBF_DQS_WP1
FBF_DQS_WP2
FBF_DQS_WP3
FBF_CMD<0>
FBF_CMD<1>
FBF_CMD<2>
FBF_CMD<3>
FBF_CMD<4>
FBF_CMD<5>
FBF_CMD<6>
FBF_CMD<7>
FBF_CMD<8>
FBF_CMD<9> C8
FBF_CMD<10>
FBF_CMD<11>
FBF_CMD<12>
FBF_CMD<13>
FBF_CMD<14>
FBF_CMD<15>
FBF_CMD<16>
FBF_CMD<17>
FBF_CMD<18>
FBF_CMD<19>
FBF_CMD<20>
FBF_CMD<21>
SNN_FBF_CMD<22>
FBF_CMD<23>
FBF_CMD<24>
FBF_CMD<25>
FBF_CMD<26>
FBF_CMD<27>
FBF_CMD<28>
SNN_FBF_CMD<29>
SNN_FBF_CMD<30>
SNN_FBF_CMD<31>
SNN_FBF_CMD<32>
FBF0_CLK0
FBF0_CLK0
FBF0_CLK1
www.vinafix.vn
FBVDDQ
FBF1_CLK0
FBF1_CLK0
FBF1_CLK1
FBF1_CLK1
R748
60.4
1%
0402
NO STUFF
FBE_D<0>
FBE_D<1>
FBE_D<2>
FBE_D<3>
FBE_D<4>
FBE_D<5>
FBE_D<6>
FBE_D<7>
FBE_D<8>
FBE_D<9>
FBE_D<10>
FBE_D<11>
FBE_D<12>
FBE_D<13>
FBE_D<14>
FBE_D<15>
FBE_D<16>
FBE_D<17>
FBE_D<18>
FBE_D<19>
FBE_D<20>
FBE_D<21>
FBE_D<22>
FBE_D<23>
FBE_D<24>
FBE_D<25>
FBE_D<26>
FBE_D<27>
FBE_D<28>
FBE_D<29>
FBE_D<30>
FBE_D<31>
FBE_D<32>
FBE_D<33>
FBE_D<34>
FBE_D<35>
FBE_D<36>
FBE_D<37>
FBE_D<38>
FBE_D<39>
FBE_D<40>
FBE_D<41>
FBE_D<42>
FBE_D<43>
FBE_D<44>
FBE_D<45>
FBE_D<46>
FBE_D<47>
FBE_D<48>
FBE_D<49>
FBE_D<50>
FBE_D<51>
FBE_D<52>
FBE_D<53>
FBE_D<54>
FBE_D<55>
FBE_D<56>
FBE_D<57>
FBE_D<58>
FBE_D<59>
FBE_D<60>
FBE_D<61>
FBE_D<62>
FBE_D<63>
FBE_DQM0
FBE_DQM1
FBE_DQM2
FBE_DQM3
FBE_DQM4
FBE_DQM5
FBE_DQM6
FBE_DQM7
FBE_DQS_RN0
FBE_DQS_RN1
FBE_DQS_RN2
FBE_DQS_RN3
FBE_DQS_RN4
FBE_DQS_RN5
FBE_DQS_RN6
FBE_DQS_RN7
FBE_DQS_WP0
FBE_DQS_WP1
FBE_DQS_WP2
FBE_DQS_WP3
FBE_DQS_WP4
FBE_DQS_WP5
FBE_DQS_WP6
FBE_DQS_WP7
FBE_CMD<0>
FBE_CMD<1>
FBE_CMD<2>
FBE_CMD<3>
FBE_CMD<4>
FBE_CMD<5>
FBE_CMD<6>
FBE_CMD<7>
FBE_CMD<8>
FBE_CMD<9>
FBE_CMD<10>
FBE_CMD<11>
FBE_CMD<12>
FBE_CMD<13>
FBE_CMD<14>
FBE_CMD<15>
FBE_CMD<16>
FBE_CMD<17>
FBE_CMD<18>
FBE_CMD<19>
FBE_CMD<20>
FBE_CMD<21>
FBE_CMD<23>
FBE_CMD<24>
FBE_CMD<25>
FBE_CMD<26>
FBE_CMD<27>
FBE_CMD<28>
FBE0_CLK0
FBE0_CLK0*
FBE1_CLK0
FBE1_CLK0*
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
80DIFF
80DIFF
80DIFF
80DIFF
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
22
2
23
2
24
2
25
2
26
2
27
2
28
2
29
2
30
2
31
2
32
2
33
2
34
2
35
2
36
2
37
2
38
2
39
2
40
2
41
2
42
2
43
2
44
2
45
2
46
2
47
2
48
2
49
2
50
2
51
2
52
2
53
2
54
2
55
2
56
2
57
2
58
2
59
2
60
2
61
2
62
2
63
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
23
2
24
2
25
2
26
2
27
2
28
1
1
1
1
12.2A<>
FBE_D<0..63>
12.4A<>
12.5A<>
12.5A<>
12.5A<>
12.5A<>
12.5A<>
12.5A<>
12.5A<>
12.5A<
12.5A<
12.5A<
12.5A<
12.5A<
12.5A<
12.5A<
12.5A<
12.5A>
12.5A>
12.5A>
12.5A>
12.5A>
12.5A>
12.5A>
12.5A>
12.1A<
FBE_CMD<0..28>
12.2A<
12.2A<
12.2A<
12.2A<
2
FBF_D<0>
FBF_D<1>
FBF_D<2>
FBF_D<3>
FBF_D<4>
FBF_D<5>
FBF_D<6>
FBF_D<7>
FBF_D<8>
FBF_D<9>
FBF_D<10>
FBF_D<11>
FBF_D<12>
FBF_D<13>
FBF_D<14>
FBF_D<15>
FBF_D<16>
FBF_D<17>
FBF_D<18>
FBF_D<19>
FBF_D<20>
FBF_D<21>
FBF_D<22>
FBF_D<23>
FBF_D<24>
FBF_D<25>
FBF_D<26>
FBF_D<27>
FBF_D<28>
FBF_D<29>
FBF_D<30>
FBF_D<31>
FBF_D<32>
FBF_D<33>
FBF_D<34>
FBF_D<35>
FBF_D<36>
FBF_D<37>
FBF_D<38>
FBF_D<39>
FBF_D<40>
FBF_D<41>
FBF_D<42>
FBF_D<43>
FBF_D<44>
FBF_D<45>
FBF_D<46>
FBF_D<47>
FBF_D<48>
FBF_D<49>
FBF_D<50>
FBF_D<51>
FBF_D<52>
FBF_D<53>
FBF_D<54>
FBF_D<55>
FBF_D<56>
FBF_D<57>
FBF_D<58>
FBF_D<59>
FBF_D<60>
FBF_D<61>
FBF_D<62>
FBF_D<63>
FBF_DQM0
FBF_DQM1
FBF_DQM2
FBF_DQM3
FBF_DQM4
FBF_DQM5
FBF_DQM6
FBF_DQM7
FBF_DQS_RN0
FBF_DQS_RN1
FBF_DQS_RN2
FBF_DQS_RN3
FBF_DQS_RN4
FBF_DQS_RN5
FBF_DQS_RN6
FBF_DQS_RN7
FBF_DQS_WP0
FBF_DQS_WP1
FBF_DQS_WP2
FBF_DQS_WP3
FBF_DQS_WP4
FBF_DQS_WP5
FBF_DQS_WP6
FBF_DQS_WP7
FBF_CMD<0>
FBF_CMD<1>
FBF_CMD<2>
FBF_CMD<3>
FBF_CMD<4>
FBF_CMD<5>
FBF_CMD<6>
FBF_CMD<7>
FBF_CMD<8>
FBF_CMD<9>
FBF_CMD<10>
FBF_CMD<11>
FBF_CMD<12>
FBF_CMD<13>
FBF_CMD<14>
FBF_CMD<15>
FBF_CMD<16>
FBF_CMD<17>
FBF_CMD<18>
FBF_CMD<19>
FBF_CMD<20>
FBF_CMD<21>
FBF_CMD<23>
FBF_CMD<24>
FBF_CMD<25>
FBF_CMD<26>
FBF_CMD<27>
FBF_CMD<28>
FBF0_CLK0
FBF0_CLK0*
FBF1_CLK0
FBF1_CLK0*
50OHM
50OHM
50OHM
50OHM 2
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM 2
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM 1
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
80DIFF
80DIFF 1
80DIFF
80DIFF
0
2
1
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
22
2
23
2
24
2
25
2
26
2
27
2
28
2
29
2
30
2
31
2
32
2
33
2
34
2
35
2
36
2
37
2
38
2
39
2
40
2
41
2
42
2
43
44
2
45
2
46
2
47
2
48
2
49
2
50
2
51
2
52
2
53
2
54
2
55
2
56
2
57
2
58
2
59
2
60
2
61
2
62
2
63
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
150OHM
1
1
1
1
1
1
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
23
2
24
2
25
2
26
2
27
2
28
1
1
1
FBF_D<0..63>
FBF_CMD<0..28>
600-10897-0053-300 A
p897
misun
13.4A<>
13.5A<>
13.5A<>
13.5A<>
13.5A<>
13.5A<>
13.5A<>
13.5A<>
13.5A<
13.5A<
13.5A<
13.5A<
13.5A<
13.5A<
13.5A<
13.5A<
13.5A>
13.5A>
13.5A>
13.5A>
13.5A>
13.5A>
13.5A>
13.5A>
13.2A<
13.2A<
13.2A<
13.2A<
13.2A<>
13.1A<
6 OF 41
31-DEC-2008
Page 7
OUTBIBIBIBIBIBIBIBIININININININ
OUT
OUTININ
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
9/21 MEM_H
FBH_D32
FBH_D33
FBH_D34
FBH_D35
FBH_D55
FBH_D54
FBH_D53
FBH_D52
FBH_D51
FBH_D50
FBH_D49
FBH_D48
FBH_D47
FBH_D46
FBH_D45
FBH_D44
FBH_D43
FBH_D42
FBH_D41
FBH_D40
FBH_D39
FBH_D38
FBH_D37
FBH_D36
FBH_DQS_RN7
FBH_DQS_RN6
FBH_DQS_RN5
FBH_DQS_RN4
FBH_DQM7
FBH_DQM6
FBH_DQM5
FBH_DQM4
FBH_D63
FBH_D62
FBH_D61
FBH_D60
FBH_D59
FBH_D58
FBH_D57
FBH_D56
FBH_DQS_WP4
FBH_DEBUG
FBH_DQS_WP5
FBH_DQS_WP6
FBH_DQS_WP7
FBH1_CLK0
FBH1_CLK0
FBH1_CLK1
FBH1_CLK1
FBH_D0
FBH_D1
FBH_D2
FBH_D3
FBH_D23
FBH_D22
FBH_D21
FBH_D20
FBH_D19
FBH_D18
FBH_D17
FBH_D16
FBH_D15
FBH_D14
FBH_D13
FBH_D12
FBH_D11
FBH_D10
FBH_D9
FBH_D8
FBH_D7
FBH_D6
FBH_D5
FBH_D4
FBH_DQS_RN3
FBH_DQS_RN2
FBH_DQS_RN1
FBH_DQS_RN0
FBH_DQM3
FBH_DQM2
FBH_DQM1
FBH_DQM0
FBH_D31
FBH_D30
FBH_D29
FBH_D28
FBH_D27
FBH_D26
FBH_D25
FBH_D24
FBH_DQS_WP0
FBH_DQS_WP3
FBH_DQS_WP2
FBH_DQS_WP1
FBH_CMD14
FBH_CMD13
FBH_CMD12
FBH_CMD11
FBH_CMD10
FBH_CMD9
FBH_CMD8
FBH_CMD7
FBH_CMD6
FBH_CMD5
FBH_CMD4
FBH_CMD3
FBH_CMD2
FBH_CMD1
FBH_CMD0
FBH_CMD32
FBH_CMD31
FBH_CMD30
FBH_CMD29
FBH_CMD28
FBH_CMD27
FBH_CMD26
FBH_CMD23
FBH_CMD22
FBH_CMD21
FBH_CMD19
FBH_CMD18
FBH_CMD17
FBH_CMD16
FBH_CMD15
FBH_CMD20
FBH_CMD25
FBH_CMD24
FBH0_CLK1
FBH0_CLK1
FBH0_CLK0
FBH0_CLK0
INININ
8/21 MEM_G
FBG_D32
FBG_D33
FBG_D34
FBG_D35
FBG_D55
FBG_D54
FBG_D53
FBG_D52
FBG_D51
FBG_D50
FBG_D49
FBG_D48
FBG_D47
FBG_D46
FBG_D45
FBG_D44
FBG_D43
FBG_D42
FBG_D41
FBG_D40
FBG_D39
FBG_D38
FBG_D37
FBG_D36
FBG_DQS_RN7
FBG_DQS_RN6
FBG_DQS_RN5
FBG_DQS_RN4
FBG_DQM7
FBG_DQM6
FBG_DQM5
FBG_DQM4
FBG_D63
FBG_D62
FBG_D61
FBG_D60
FBG_D59
FBG_D58
FBG_D57
FBG_D56
FBG_DQS_WP4
FBGH_REFCLK
FBGH_REFCLK
FBG_DEBUG
FBG_DQS_WP5
FBG_DQS_WP6
FBG_DQS_WP7
FBG1_CLK0
FBG1_CLK0
FBG1_CLK1
FBG1_CLK1
FBGH_NV_H_PLL_AVDD
FBG_D0
FBG_D1
FBG_D2
FBG_D3
FBG_D23
FBG_D22
FBG_D21
FBG_D19
FBG_D18
FBG_D17
FBG_D16
FBG_D12
FBG_D10
FBG_D8
FBG_D7
FBG_D6
FBG_D5
FBG_D4
FBG_D9
FBG_D11
FBG_D14
FBG_D13
FBG_D20
FBG_D15
FBG_DQS_RN3
FBG_DQS_RN2
FBG_DQS_RN1
FBG_DQS_RN0
FBG_DQM3
FBG_DQM2
FBG_DQM1
FBG_DQM0
FBG_D31
FBG_D30
FBG_D29
FBG_D28
FBG_D27
FBG_D26
FBG_D25
FBG_D24
FBG_DQS_WP0
FBG_DQS_WP3
FBG_DQS_WP2
FBG_DQS_WP1
FBG_CMD14
FBG_CMD13
FBG_CMD12
FBG_CMD11
FBG_CMD10
FBG_CMD9
FBG_CMD8
FBG_CMD7
FBG_CMD6
FBG_CMD5
FBG_CMD4
FBG_CMD3
FBG_CMD2
FBG_CMD1
FBG_CMD0
FBG_CMD32
FBG_CMD30
FBG_CMD28
FBG_CMD26
FBG_CMD25
FBG_CMD23
FBG_CMD21
FBG_CMD20
FBG_CMD15
FBG_CMD16
FBG_CMD17
FBG_CMD18
FBG_CMD19
FBG_CMD22
FBG_CMD24
FBG_CMD27
FBG_CMD29
FBG_CMD31
FBG0_CLK0
FBG0_CLK0
FBG0_CLK1
FBG0_CLK1
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer G,H: GPU Section
AW10
BA10
BB10
AT10FBH0_CLK0
AT11
AU11
AU3
AU4
AV4
AV6
AY3
AY4
BA4
BB6
AW7
AW8
AW9
AY9
AY8
BA9
BC3
BB4
BC5
BE4
BF4
BE5
BE6
BB9
BC9
BD7
BE8
BE9
BF8
BG7
AY5
AW6
BD6
BB8
AW5
BA7
BC4
BC8
AW4
BA6
BD4
BB7
AR1
AR3
AT1
AT2
AT3
AV1
AV3
AW1
AW2
BA1
BA3
BB1
BB2
BB3
BD1
BD3
BE1
BE2
BE3
BG1
BG3
BH1
BH2
BH3
BK1
BK3
BL1
BL2SNN_FBH_CMD<28>
BN2
BP3
BR5
BR6
AT9
G1
G200-100-B1
BGA2236
COMMON
SNN_FBH_D<32>BF11
SNN_FBH_D<33>
BF12
SNN_FBH_D<34>
BG11
SNN_FBH_D<35>
BG12
SNN_FBH_D<36>
BG13
SNN_FBH_D<37>
BG14
SNN_FBH_D<38>
BH14
SNN_FBH_D<39>
BJ14
SNN_FBH_D<40>
BG4
SNN_FBH_D<41>
BJ4
SNN_FBH_D<42>
BH7
SNN_FBH_D<43>
BJ5
SNN_FBH_D<44>
BK4
SNN_FBH_D<45>
BF3
SNN_FBH_D<46>
BG6
SNN_FBH_D<47>
BJ3
SNN_FBH_D<48>
BM3
SNN_FBH_D<49>
BL3
SNN_FBH_D<50>
BL4
SNN_FBH_D<51>
BL5
SNN_FBH_D<52>
BM5
SNN_FBH_D<53>
BM6
SNN_FBH_D<54>
BM7
SNN_FBH_D<55>
BN6
SNN_FBH_D<56>
BK12
SNN_FBH_D<57>
BK11
SNN_FBH_D<58>
BK9
SNN_FBH_D<59>
BK8
SNN_FBH_D<60>
BM8
SNN_FBH_D<61>
BN9
SNN_FBH_D<62>
BN8
SNN_FBH_D<63>
BN7
SNN_FBH_DQM4
BJ12
SNN_FBH_DQM5
BH4
SNN_FBH_DQM6
BP5
SNN_FBH_DQM7
BL11
SNN_FBH_DQS_RN4
BH11
SNN_FBH_DQS_RN5
BH6
SNN_FBH_DQS_RN6
BN4
SNN_FBH_DQS_RN7
BL8
SNN_FBH_DQS_WP4
BJ11
SNN_FBH_DQS_WP5
BH5
SNN_FBH_DQS_WP6
BN5
SNN_FBH_DQS_WP7
BM9
SNN_FBH_DEBUG
AW13
SNN_FBH1_CLK0
BD10
SNN_FBH1_CLK0*
BD9
SNN_FBH1_CLK1
AW11
SNN_FBH1_CLK1*
AY11
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer G,H: GPU Section
G1
G200-100-B1
BGA2236
COMMON
FBG_D<32>
AG4
FBG_D<33>
AH3
FBG_D<34>
AH4
FBG_D<35>
AJ4
FBG_D<36>
AL3
FBG_D<37>
AL4
FBG_D<38>
AL5
FBG_D<39>
AM4
FBG_D<40>
AL9
FBG_D<41>
AK10
FBG_D<42>
AK11
FBG_D<43>
AL11
FBG_D<44>
AM10
FBG_D<45>
AN9
FBG_D<46>
AN8
FBG_D<47>
AP8
FBG_D<48>
AM6
FBG_D<49>
AN6
FBG_D<50>
AN5
FBG_D<51>
AP5
FBG_D<52>
AR4
FBG_D<53>
AT4
FBG_D<54>
AT5
FBG_D<55>
AT6
FBG_D<56>
AN7
FBG_D<57>
AP9
FBG_D<58>
AR9
FBG_D<59>
AR7
FBG_D<60>
AT7
FBG_D<61>
AV7
FBG_D<62>
AV9
FBG_D<63>
AV10
FBG_DQM4
AK4
FBG_DQM5
AM9
FBG_DQM6
AP3
FBG_DQM7
AU9
FBG_DQS_RN4
AK6
FBG_DQS_RN5
AL8
FBG_DQS_RN6
AN4
FBG_DQS_RN7
AT8
FBG_DQS_WP4
AK5
FBG_DQS_WP5
AM7
FBG_DQS_WP6
AP4
FBG_DQS_WP7
AU8
FBG_DEBUG
AE13
FBGH_REFCLK
BC16
FBGH_REFCLK*
BC17
FBEFGH_MPLL_AVDD
BC11
C935
.1UF
6.3V
10%
X7R
0402
COMMON
GND
AF10
FBG1_CLK0* FBG1_CLK0
AF9
SNN_FBG1_CLK1 FBG1_CLK1
AN11
SNN_FBG1_CLK1* FBG1_CLK1
AP11
FBVDDQ
FBG1_CLK0FBG1_CLK0
R751
60.4
1%
0402
NO STUFF
18.5D>
18.5D>
GND
C955
4.7UF
6.3V
10%
X5R
0603
COMMON
6.4C>
SNN_FBH0_CLK0
SNN_FBH0_CLK0*
SNN_FBH0_CLK1
SNN_FBH0_CLK1*
AC10
AD10
AG10
AA10
AE11
AF11
Y8
W9
Y9
Y10
AA9
AB8
AC7
AC6
AC8
AC9
AE9
AF8
AF7
AF6
AB4
AB5
AC5
AD6
AE5
AF4
AF5
AG9
AH9
AJ9
AK9
AK7
AK8
AJ6
AD9
AE4
AJ7
W8
AD7
AD4
AH8
V7
AE8
AE3
AG7
P1
R3
R1
U3
U2
U1
V3
V1
Y3
Y1
AA3
AA1
AC3
AC2
AC1
AD3
AD1
AF3
AF2
AF1
AG3
AG1
AJ1
AJ3
AK1
AK2
AK3
AM1
AM3
AN1
AN2
AN3
V10
V9
FBG_D<0>
FBG_D<1>
FBG_D<2>
FBG_D<3>
FBG_D<4>
FBG_D<5>
FBG_D<6>
FBG_D<7>
FBG_D<8>
FBG_D<9>
FBG_D<10>
FBG_D<11>
FBG_D<12>
FBG_D<13>
FBG_D<14>
FBG_D<15>
FBG_D<16>
FBG_D<17>
FBG_D<18> AC4
FBG_D<19>
FBG_D<20>
FBG_D<21>
FBG_D<22>
FBG_D<23>
FBG_D<24>
FBG_D<25>
FBG_D<26>
FBG_D<27>
FBG_D<28>
FBG_D<29>
FBG_D<30>
FBG_D<31>
FBG_DQM0
FBG_DQM1
FBG_DQM2
FBG_DQM3
FBG_DQS_RN0
FBG_DQS_RN1
FBG_DQS_RN2
FBG_DQS_RN3
FBG_DQS_WP0
FBG_DQS_WP1
FBG_DQS_WP2
FBG_DQS_WP3
FBG_CMD<0>
FBG_CMD<1>
FBG_CMD<2>
FBG_CMD<3>
FBG_CMD<4>
FBG_CMD<5>
FBG_CMD<6>
FBG_CMD<7>
FBG_CMD<8>
FBG_CMD<9> Y2
FBG_CMD<10>
FBG_CMD<11>
FBG_CMD<12>
FBG_CMD<13>
FBG_CMD<14>
FBG_CMD<15>
FBG_CMD<16>
FBG_CMD<17>
FBG_CMD<18>
FBG_CMD<19>
FBG_CMD<20>
FBG_CMD<21>
SNN_FBG_CMD<22>
FBG_CMD<23>
FBG_CMD<24>
FBG_CMD<25>
FBG_CMD<26>
FBG_CMD<27>
FBG_CMD<28>
SNN_FBG_CMD<29>
SNN_FBG_CMD<30>
SNN_FBG_CMD<31>
SNN_FBG_CMD<32>
FBG0_CLK0
FBG0_CLK0
FBG0_CLK1
FBG0_CLK1
FBG0_CLK0
FBG0_CLK0*
SNN_FBG0_CLK1
SNN_FBG0_CLK1*
SNN_FBH_D<0>
SNN_FBH_D<1>
SNN_FBH_D<2>
SNN_FBH_D<3>
SNN_FBH_D<4>
SNN_FBH_D<5>
SNN_FBH_D<6>
SNN_FBH_D<7>
SNN_FBH_D<8>
SNN_FBH_D<9>
SNN_FBH_D<10>
SNN_FBH_D<11>
SNN_FBH_D<12>
SNN_FBH_D<13>
SNN_FBH_D<14>
SNN_FBH_D<15>
SNN_FBH_D<16>
SNN_FBH_D<17>
SNN_FBH_D<18> BB5
SNN_FBH_D<19>
SNN_FBH_D<20>
SNN_FBH_D<21>
SNN_FBH_D<22>
SNN_FBH_D<23>
SNN_FBH_D<24>
SNN_FBH_D<25>
SNN_FBH_D<26>
SNN_FBH_D<27>
SNN_FBH_D<28>
SNN_FBH_D<29>
SNN_FBH_D<30>
SNN_FBH_D<31>
SNN_FBH_DQM0
SNN_FBH_DQM1
SNN_FBH_DQM2
SNN_FBH_DQM3
SNN_FBH_DQS_RN0
SNN_FBH_DQS_RN1
SNN_FBH_DQS_RN2
SNN_FBH_DQS_RN3
SNN_FBH_DQS_WP0
SNN_FBH_DQS_WP1
SNN_FBH_DQS_WP2
SNN_FBH_DQS_WP3
SNN_FBH_CMD<0>
SNN_FBH_CMD<1>
SNN_FBH_CMD<2>
SNN_FBH_CMD<3>
SNN_FBH_CMD<4>
SNN_FBH_CMD<5>
SNN_FBH_CMD<6>
SNN_FBH_CMD<7>
SNN_FBH_CMD<8>
SNN_FBH_CMD<9> AW3
SNN_FBH_CMD<10>
SNN_FBH_CMD<11>
SNN_FBH_CMD<12>
SNN_FBH_CMD<13>
SNN_FBH_CMD<14>
SNN_FBH_CMD<15>
SNN_FBH_CMD<16>
SNN_FBH_CMD<17>
SNN_FBH_CMD<18>
SNN_FBH_CMD<19>
SNN_FBH_CMD<20>
SNN_FBH_CMD<21>
SNN_FBH_CMD<22>
SNN_FBH_CMD<23>
SNN_FBH_CMD<24>
SNN_FBH_CMD<25>
SNN_FBH_CMD<26>
SNN_FBH_CMD<27>
SNN_FBH_CMD<29>
SNN_FBH_CMD<30>
SNN_FBH_CMD<31>
SNN_FBH_CMD<32>
FBH0_CLK0
FBH0_CLK1
FBH0_CLK1
www.vinafix.vn
FBH1_CLK0
FBH1_CLK0
FBH1_CLK1
FBH1_CLK1
FBG_D<0>
FBG_D<1>
FBG_D<2>
FBG_D<3>
FBG_D<4>
FBG_D<5>
FBG_D<6>
FBG_D<7>
FBG_D<8>
FBG_D<9>
FBG_D<10>
FBG_D<11>
FBG_D<12>
FBG_D<13>
FBG_D<14>
FBG_D<15>
FBG_D<16>
FBG_D<17>
FBG_D<18>
FBG_D<19>
FBG_D<20>
FBG_D<21>
FBG_D<22>
FBG_D<23>
FBG_D<24>
FBG_D<25>
FBG_D<26>
FBG_D<27>
FBG_D<28>
FBG_D<29>
FBG_D<30>
FBG_D<31>
FBG_D<32>
FBG_D<33>
FBG_D<34>
FBG_D<35>
FBG_D<36>
FBG_D<37>
FBG_D<38>
FBG_D<39>
FBG_D<40>
FBG_D<41>
FBG_D<42>
FBG_D<43>
FBG_D<44>
FBG_D<45>
FBG_D<46>
FBG_D<47>
FBG_D<48>
FBG_D<49>
FBG_D<50>
FBG_D<51>
FBG_D<52>
FBG_D<53>
FBG_D<54>
FBG_D<55>
FBG_D<56>
FBG_D<57>
FBG_D<58>
FBG_D<59>
FBG_D<60>
FBG_D<61>
FBG_D<62>
FBG_D<63>
FBG_DQM0
FBG_DQM1
FBG_DQM2
FBG_DQM3
FBG_DQM4
FBG_DQM5
FBG_DQM6
FBG_DQM7
FBG_DQS_RN0
FBG_DQS_RN1
FBG_DQS_RN2
FBG_DQS_RN3
FBG_DQS_RN4
FBG_DQS_RN5
FBG_DQS_RN6
FBG_DQS_RN7
FBG_DQS_WP0
FBG_DQS_WP1
FBG_DQS_WP2
FBG_DQS_WP3
FBG_DQS_WP4
FBG_DQS_WP5
FBG_DQS_WP6
FBG_DQS_WP7
FBG_CMD<0>
FBG_CMD<1>
FBG_CMD<2>
FBG_CMD<3>
FBG_CMD<4>
FBG_CMD<5>
FBG_CMD<6>
FBG_CMD<7>
FBG_CMD<8>
FBG_CMD<9>
FBG_CMD<10>
FBG_CMD<11>
FBG_CMD<12>
FBG_CMD<13>
FBG_CMD<14>
FBG_CMD<15>
FBG_CMD<16>
FBG_CMD<17>
FBG_CMD<18>
FBG_CMD<19>
FBG_CMD<20>
FBG_CMD<21>
FBG_CMD<23>
FBG_CMD<24>
FBG_CMD<25>
FBG_CMD<26>
FBG_CMD<27>
FBG_CMD<28>
FBG0_CLK0
FBG0_CLK0*
FBG1_CLK0
FBG1_CLK0*
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
80DIFF
80DIFF
80DIFF
80DIFF
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
22
2
23
2
24
2
25
2
26
2
27
2
28
2
29
2
30
2
31
2
32
2
33
2
34
2
35
2
36
2
37
2
38
2
39
2
40
2
41
2
42
2
43
2
44
2
45
2
46
2
47
2
48
2
49
2
50
2
51
2
52
2
53
2
54
2
55
2
56
2
57
2
58
2
59
2
60
2
61
2
62
2
63
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
19
2
20
2
21
2
23
2
24
2
25
2
26
2
27
2
28
1
1
1
1
14.2A<>
FBG_D<0..63>
14.4A<>
14.5A<>
14.5A<>
14.5A<>
14.5A<>
14.5A<>
14.5A<>
14.5A<>
14.5A<
14.5A<
14.5A<
14.5A<
14.5A<
14.5A<
14.5A<
14.5A<
14.5A>
14.5A>
14.5A>
14.5A>
14.5A>
14.5A>
14.5A>
14.5A>
14.1A<
FBG_CMD<0..28>
14.2A<
14.2A<
14.2A<
14.2A<
600-10897-0053-300 A
p897
misun
7 OF 41
31-DEC-2008
Page 8
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININININ
BI
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBIBIBIBIININBIBIINININININ
OUT
OUTINOUT
OUT
OUT
OUT
OUT
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer A: Memory Section
H10
H11
K10
K11
J11
J10
R615
243
1%
0402
COMMON
K12
J12
GND
L10
M10
N11
M11
T11
T10
R11
R10
N10
P10
P11
B2
E2
B3
F2
C3
C2
G3
F3
E3
D3
D2
FBVDDQ
FBA_CMD<23>
FBA_CMD<24>
FBA_CMD<25>
FBA_CMD<28>
FBA_CMD<26>
FBA_CMD<27>
M13
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4
L9
G9
G4
H3
H9
J2
J3
V4
V9
A9
A4
K1
J1
M13
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M13
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
FBA_D<40>
FBA_D<41>
FBA_D<42>
FBA_D<43>
FBA_D<44>
FBA_D<45>
FBA_D<46>
FBA_D<47>
FBA_DQM5
FBA_DQS_RN5
FBA_DQS_WP5
FBA_D<56>
FBA_D<57>
FBA_D<58>
FBA_D<59>
FBA_D<60>
FBA_D<61>
FBA_D<62>
FBA_D<63>
FBA_DQM7
FBA_DQS_RN7
FBA_DQS_WP7
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
G10
F10
E11
F11
B10
C11
B11
C10
E10
D10
D11
R2
T2
T3
R3
M3
N2
L3
M2
N3
P3
P2
SubPartition 1 Termination Balancing A2..A7
R659
121
1%
0402
COMMON
R675
121
1%
0402
COMMON
R649
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
GND
FBA_VREF3
FBA_VREF4
M13
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M13
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R668
121
1%
0402
COMMON
R669
121
1%
0402
COMMON
R674
121
1%
0402
COMMON
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer A: Memory Section
www.vinafix.vn
4.4G>
4.5G>
4.5G>
4.5G>
4.5G>
4.1G>
4.3G<>
4.3G<>
4.3G<>
4.3G<>
4.3G<>
4.3G<>
4.3G<>
4.3G<>
4.3G<
4.3G<
4.3G<
4.3G<
4.3G<
4.3G<
4.3G<
4.3G<
4.3G>
4.3G>
4.3G>
4.4G>
4.4G>
4.4G>
4.4G>
4.4G>
FBA_CMD<0..28>
FBA_CMD<0>
0
FBA_CMD<1>
1
FBA_CMD<2>
2
FBA_CMD<3>
3
FBA_CMD<4>
4
FBA_CMD<5>
5
FBA_CMD<6>
6
FBA_CMD<7>
7
FBA_CMD<8>
8
FBA_CMD<9>
9
FBA_CMD<10>
10
FBA_CMD<11>
11
FBA_CMD<12>
12
FBA_CMD<13>
13
FBA_CMD<14>
14
FBA_CMD<15>
15
FBA_CMD<16>
16
FBA_CMD<17>
17
FBA_CMD<18>
18
FBA_CMD<19>
19
FBA_CMD<20>
20
FBA_CMD<21>
21
FBA_CMD<23>
23
FBA_CMD<24>
24
FBA_CMD<25>
25
FBA_CMD<26>
26
FBA_CMD<27>
27
FBA_CMD<28>
28
FBA0_CLK0
FBA0_CLK0*
FBA1_CLK0
FBA1_CLK0*
FBA_D<0..63>
FBA_D<0>
0
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_D<5>
5
FBA_D<6>
6
FBA_D<7>
7
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_D<16>
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
20
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_D<32>
32
FBA_D<33>
33
FBA_D<34>
34
FBA_D<35>
35
FBA_D<36>
36
FBA_D<37>
37
FBA_D<38>
38
FBA_D<39>
39
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50>
50
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_CMD<14>
FBA_CMD<17>
FBA_CMD<7>
FBA_CMD<16>
FBA_CMD<21>
FBA_CMD<12>
FBA_CMD<5>
FBA_CMD<4>
FBA_CMD<3>
FBA_CMD<0>
FBA_CMD<2>
FBA_CMD<1>
FBA_CMD<19>
FBA_CMD<18>
FBA_CMD<9>
FBA_CMD<20>
FBA_CMD<15>
FBA_CMD<11>
FBA_CMD<8>
FBA_CMD<6>
FBA0_CLK0
FBA0_CLK0*
SNN_FBA_NC01
FBA_CMD<13>
R44
0402
5%
1K for Qimonda
0 for others
FBA_CMD<10>
GND
FBA_D<0>
FBA_D<1>
FBA_D<2> M10
FBA_D<3>
FBA_D<4>
FBA_D<5>
FBA_D<6>
FBA_D<7>
FBA_DQM0
FBA_DQS_RN0
FBA_DQS_WP0
FBA_D<16>
FBA_D<17>
FBA_D<18>
FBA_D<19>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_DQM2
FBA_DQS_RN2
FBA_DQS_WP2
FBVDDQ
FBA_CMD<5>
FBA_CMD<4>
FBA_CMD<3>
FBA_CMD<0>
FBA_CMD<2>
FBA_CMD<1>
FBA_SEN1
0
CHANGED
GND
FBA_ZQ1
GND
FBVDDQ
M14
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R616
243
1%
0402
COMMON
GND
M11
L10
N11
R11
T11
T10
R10
N10
P10
P11
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
M14
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
5
M14
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
L3
M2
M3
N2
T3
T2
R3
R2
N3
P3
P2
FBA_D<8>
FBA_D<9>
FBA_D<10>
FBA_D<11>
FBA_D<12>
FBA_D<13>
FBA_D<14>
FBA_D<15>
FBA_DQM1
FBA_DQS_RN1
FBA_DQS_WP1
FBA_D<24>
FBA_D<25>
FBA_D<26>
FBA_D<27>
FBA_D<28>
FBA_D<29>
FBA_D<30>
FBA_D<31>
FBA_DQM3
FBA_DQS_RN3
FBA_DQS_WP3
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
C10
C11
G10
F10
B10
B11
E11
F11
E10
D10
D11
G3
E2
F3
C2
B2
F2
B3
C3
E3
D3
D2
SubPartition 0 Termination Balancing A2..A7
R692
121
1%
0402
COMMON
R693
121
1%
0402
COMMON
R694
121
1%
0402
COMMON
R683
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
R49
0402
GND
FBVDDQ
GND
FBA_VREF1
FBA_VREF2
M14
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M14
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R672
121
1%
0402
COMMON
FBA_CMD<14>
FBA_CMD<17>
FBA_CMD<7>
FBA_CMD<16>
FBA_CMD<21>
FBA_CMD<12>
FBA_CMD<23>
FBA_CMD<24>
FBA_CMD<25>
FBA_CMD<28>
FBA_CMD<26>
FBA_CMD<27>
FBA_CMD<19>
FBA_CMD<18>
FBA_CMD<9>
FBA_CMD<20>
FBA_CMD<15>
FBA_CMD<11>
FBA_CMD<8>
FBA_CMD<6>
FBA1_CLK0
FBA1_CLK0*
SNN_FBA_NC04
FBA_CMD<13>
0
CHANGED
5%
1K for Qimonda
0 for others
FBA_CMD<10>
FBA_D<32>
FBA_D<33>
FBA_D<34>
FBA_D<35>
FBA_D<36>
FBA_D<37>
FBA_D<38>
FBA_D<39>
FBA_DQM4
FBA_DQS_RN4
FBA_DQS_WP4
FBA_D<48>
FBA_D<49>
FBA_D<50>
FBA_D<51>
FBA_D<52>
FBA_D<53>
FBA_D<54>
FBA_D<55>
FBA_DQM6
FBA_DQS_RN6
FBA_DQS_WP6
R680
121
1%
0402
COMMON
FBA_SEN2
FBA_ZQ2
GND
FBVDDQ
TERMINATION SELECT
FBA_CMD<6>
R618
10K
5%
0402
COMMON
SINGLE BANK
GND
VREF = 68% FBVDDQ for Samsung memoey
VREF = 72% FBVDDQ for Hynix memoey
FBA_CMD<10>
R684
10K
5%
0402
COMMON
GND
RESETCKE
C641
6.3V
10%
X7R
0402
COMMON
C636
.1UF
6.3V
10%
X7R
0402
COMMON
C640
.1UF
6.3V
10%
X7R
0402
COMMON
C632
.1UF
6.3V
10%
X7R
0402
COMMON
FBA0_CLK0_R
R642
80.6
1%
0402
FBA0_CLK0
FBA0_CLK0*
FBA1_CLK0
FBA1_CLK0*
600-10897-0053-300 A
p897
misun
COMMON
FBA1_CLK0_R
R655
80.6
1%
0402
COMMON
FBVDDQ
R629
511
1%
0402
COMMON
FBA_VREF1
R650
1.1K.1UF
1%
0402
CHANGED
FBVDDQ
R622
511
1%
0402
COMMON
FBA_VREF2
R636
1.1K
1%
0402
CHANGED
FBVDDQ
R623
511
1%
0402
COMMON
FBA_VREF3
R624
1.1K
1%
0402
CHANGED
FBVDDQ
R662
511
1%
0402
COMMON
FBA_VREF4
R631
1.1K
1%
0402
CHANGED
GND
GND
GND
GND
R656
80.6
1%
0402
COMMON
R641
80.6
1%
0402
COMMON
C619
.01UF
16V
10%
X7R
0402
COMMON
GND
C611
.01UF
16V
10%
X7R
0402
COMMON
GND
8 OF 41
31-DEC-2008
Page 9
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININININ
BI
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBIBIBIBIBIBIINININININININ
OUT
OUT
OUTINOUT
OUT
OUT
OUT
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer B: Memory Section
H10
H11
K10
K11
J11
J10
R613
243
1%
0402
COMMON
K12
J12
GND
B11
B10
C10
C11
F11
G10
E11
F10
E10
D10
D11
R2
T3
T2
R3
N2
M3
M2
L3
N3
P3
P2
FBVDDQ
FBB_CMD<23>
FBB_CMD<24>
FBB_CMD<25>
FBB_CMD<28>
FBB_CMD<26>
FBB_CMD<27>
M11
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4
L9
G9
G4
H3
H9
J2
J3
V4
V9
A9
A4
K1
J1
3
M11
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
5
M11
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
FBB_D<40>
FBB_D<41>
FBB_D<42>
FBB_D<43>
FBB_D<44>
FBB_D<45>
FBB_D<46>
FBB_D<47>
FBB_DQM5
FBB_DQS_RN5
FBB_DQS_WP5
FBB_D<56>
FBB_D<57>
FBB_D<58>
FBB_D<59>
FBB_D<60>
FBB_D<61>
FBB_D<62>
FBB_D<63>
FBB_DQM7
FBB_DQS_RN7
FBB_DQS_WP7
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
M11
N11
L10
M10
T11
R11
R10
T10
N10
P10
P11
F3
G3
E2
F2
C3
C2
B2
B3
E3
D3
D2
SubPartition 1 Termination Balancing A2..A7
R658
121
1%
0402
COMMON
R676
121
1%
0402
COMMON
R646
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
GND
FBB_VREF3
FBB_VREF4
4
M11
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
2
M11
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R666
121
1%
0402
COMMON
R667
121
1%
0402
COMMON
R663
121
1%
0402
COMMON
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer B: Memory Section
www.vinafix.vn
4.4H>
4.5H>
4.5H>
4.5H>
4.5H>
4.1H>
4.3H<>
4.3H<>
4.3H<>
4.3H<>
4.3H<>
4.3H<>
4.3H<>
4.3H<>
4.3H<
4.3H<
4.3H<
4.3H<
4.3H<
4.3H<
4.3H<
4.3H<
4.3H>
4.3H>
4.3H>
4.4H>
4.4H>
4.4H>
4.4H>
4.4H>
FBB_CMD<0..28>
FBB_CMD<0>
0
FBB_CMD<1>
1
FBB_CMD<2>
2
FBB_CMD<3>
3
FBB_CMD<4>
4
FBB_CMD<5>
5
FBB_CMD<6>
6
FBB_CMD<7>
7
FBB_CMD<8>
8
FBB_CMD<9>
9
FBB_CMD<10>
10
FBB_CMD<11>
11
FBB_CMD<12>
12
FBB_CMD<13>
13
FBB_CMD<14>
14
FBB_CMD<15>
15
FBB_CMD<16>
16
FBB_CMD<17>
17
FBB_CMD<18>
18
FBB_CMD<19>
19
FBB_CMD<20>
20
FBB_CMD<21>
21
FBB_CMD<23>
23
FBB_CMD<24>
24
FBB_CMD<25>
25
FBB_CMD<26>
26
FBB_CMD<27>
27
FBB_CMD<28>
28
FBB0_CLK0
FBB0_CLK0*
FBB1_CLK0
FBB1_CLK0*
FBB_D<0..63>
FBB_D<0>
0
FBB_D<1>
1
FBB_D<2>
2
FBB_D<3>
3
FBB_D<4>
4
FBB_D<5>
5
FBB_D<6>
6
FBB_D<7>
7
FBB_D<8>
8
FBB_D<9>
9
FBB_D<10>
10
FBB_D<11>
11
FBB_D<12>
12
FBB_D<13>
13
FBB_D<14>
14
FBB_D<15>
15
FBB_D<16>
16
FBB_D<17>
17
FBB_D<18>
18
FBB_D<19>
19
FBB_D<20>
20
FBB_D<21>
21
FBB_D<22>
22
FBB_D<23>
23
FBB_D<24>
24
FBB_D<25>
25
FBB_D<26>
26
FBB_D<27>
27
FBB_D<28>
28
FBB_D<29>
29
FBB_D<30>
30
FBB_D<31>
31
FBB_D<32>
32
FBB_D<33>
33
FBB_D<34>
34
FBB_D<35>
35
FBB_D<36>
36
FBB_D<37>
37
FBB_D<38>
38
FBB_D<39>
39
FBB_D<40>
40
FBB_D<41>
41
FBB_D<42>
42
FBB_D<43>
43
FBB_D<44>
44
FBB_D<45>
45
FBB_D<46>
46
FBB_D<47>
47
FBB_D<48>
48
FBB_D<49>
49
FBB_D<50>
50
FBB_D<51>
51
FBB_D<52>
52
FBB_D<53>
53
FBB_D<54>
54
FBB_D<55>
55
FBB_D<56>
56
FBB_D<57>
57
FBB_D<58>
58
FBB_D<59>
59
FBB_D<60>
60
FBB_D<61>
61
FBB_D<62>
62
FBB_D<63>
63
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7
FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7
FBB_CMD<14>
FBB_CMD<17>
FBB_CMD<7>
FBB_CMD<16>
FBB_CMD<21>
FBB_CMD<12>
FBB_CMD<5>
FBB_CMD<4>
FBB_CMD<3>
FBB_CMD<0>
FBB_CMD<2>
FBB_CMD<1>
FBB_CMD<19>
FBB_CMD<18>
FBB_CMD<9>
FBB_CMD<20>
FBB_CMD<15>
FBB_CMD<11>
FBB_CMD<8>
FBB_CMD<6>
FBB0_CLK0
FBB0_CLK0*
SNN_FBB_NC01
FBB_CMD<13>
R48
0402
5%
1K for Qimonda
0 for others
FBB_CMD<10>
GND
FBB_D<0>
FBB_D<1>
FBB_D<2> E11
FBB_D<3>
FBB_D<4>
FBB_D<5>
FBB_D<6>
FBB_D<7>
FBB_DQM0
FBB_DQS_RN0
FBB_DQS_WP0
FBB_D<16>
FBB_D<17>
FBB_D<18>
FBB_D<19>
FBB_D<20>
FBB_D<21>
FBB_D<22>
FBB_D<23>
FBB_DQM2
FBB_DQS_RN2
FBB_DQS_WP2
FBVDDQ
FBB_CMD<5>
FBB_CMD<4>
FBB_CMD<3>
FBB_CMD<0>
FBB_CMD<2>
FBB_CMD<1>
0
CHANGED
GND
FBB_SEN1
FBB_ZQ1
GND
FBVDDQ
M12
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R614
243
1%
0402
COMMON
GND
B11
C11
F11
F10
C10
B10
G10
E10
D10
D11
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
3
M12
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
2
M12
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
B2
B3
C2
C3
E2
F2
F3
G3
E3
D3
D2
FBB_D<8>
FBB_D<9>
FBB_D<10>
FBB_D<11>
FBB_D<12>
FBB_D<13>
FBB_D<14>
FBB_D<15>
FBB_DQM1
FBB_DQS_RN1
FBB_DQS_WP1
FBB_D<24>
FBB_D<25>
FBB_D<26>
FBB_D<27>
FBB_D<28>
FBB_D<29>
FBB_D<30>
FBB_D<31>
FBB_DQM3
FBB_DQS_RN3
FBB_DQS_WP3
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
L3
N2
M3
T3
M2
R2
R3
T2
N3
P3
P2
R11
M11
L10
M10
N11
T11
T10
R10
N10
P10
P11
SubPartition 0 Termination Balancing A2..A7
R689
121
1%
0402
COMMON
R690
121
1%
0402
COMMON
R691
121
1%
0402
COMMON
R648
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
R47
0402
GND
GND
FBB_VREF1
FBB_VREF2
5
M12
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
4
M12
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R671
121
1%
0402
COMMON
FBB_CMD<14>
FBB_CMD<17>
FBB_CMD<7>
FBB_CMD<16>
FBB_CMD<21>
FBB_CMD<12>
FBB_CMD<23>
FBB_CMD<24>
FBB_CMD<25>
FBB_CMD<28>
FBB_CMD<26>
FBB_CMD<27>
FBB_CMD<19>
FBB_CMD<18>
FBB_CMD<9>
FBB_CMD<20>
FBB_CMD<15>
FBB_CMD<11>
FBB_CMD<8>
FBB_CMD<6>
FBB1_CLK0
FBB1_CLK0*
SNN_FBB_NC04
FBB_CMD<13>
0
CHANGED
5%
1K for Qimonda
0 for others
FBB_CMD<10>
FBVDDQ
FBB_D<32>
FBB_D<33>
FBB_D<34>
FBB_D<35>
FBB_D<36>
FBB_D<37>
FBB_D<38>
FBB_D<39>
FBB_DQM4
FBB_DQS_RN4
FBB_DQS_WP4
FBB_D<48>
FBB_D<49>
FBB_D<50>
FBB_D<51>
FBB_D<52>
FBB_D<53>
FBB_D<54>
FBB_D<55>
FBB_DQM6
FBB_DQS_RN6
FBB_DQS_WP6
R679
121
1%
0402
COMMON
FBB_SEN2
FBB_ZQ2
GND
FBVDDQ
TERMINATION SELECT
FBB_CMD<6>
R617
10K
5%
0402
COMMON
SINGLE BANK
GND
FBB_CMD<10>
R685
10K
5%
0402
COMMON
GND
FBVDDQ
R628
511
1%
0402
COMMON
FBB_VREF1
R647
C639
1.1K.1UF
1%
6.3V
0402
10%
CHANGED
X7R
0402
COMMON
C635
.1UF
6.3V
10%
X7R
0402
COMMON
C638
.1UF
6.3V
10%
X7R
0402
COMMON
C631
.1UF
6.3V
10%
X7R
0402
COMMON
FBB0_CLK0_R
FBB0_CLK0
FBB0_CLK0*
FBB1_CLK0
FBB1_CLK0*
RESETCKE
FBB1_CLK0_R
R640
80.6
1%
0402
COMMON
R637
80.6
1%
0402
COMMON
FBVDDQ
R621
511
1%
0402
COMMON
FBB_VREF2
R635
1.1K
1%
0402
CHANGED
FBVDDQ
R619
511
1%
0402
COMMON
FBB_VREF3
R627
1.1K
1%
0402
CHANGED
FBVDDQ
R661
511
1%
0402
COMMON
FBB_VREF4
R632
1.1K
1%
0402
CHANGED
GND
GND
GND
GND
R654
80.6
1%
0402
COMMON
R651
80.6
1%
0402
COMMON
C620
.01UF
16V
10%
X7R
0402
COMMON
GND
C608
.01UF
16V
10%
X7R
0402
COMMON
GND
600-10897-0053-300 A
p897
misun
9 OF 41
31-DEC-2008
Page 10
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININININ
BI
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBIBIBIBIBIBIININININININININOUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer C: Memory Section
H10
H11
K10
K11
J11
J10
R611
243
1%
0402
COMMON
K12
J12
GND
C10
B10
B11
C11
F10
E11
F11
G10
E10
D10
D11
L10
M11
R11
M10
N11
T11
T10
R10
N10
P10
P11
FBVDDQ
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
FBC_CMD<28>
FBC_CMD<26>
FBC_CMD<27>
M9
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4
L9
G9
G4
H3
H9
J2
J3
V4
V9
A9
A4
K1
J1
3
M9
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
4
M9
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
FBC_D<40>
FBC_D<41>
FBC_D<42>
FBC_D<43>
FBC_D<44>
FBC_D<45>
FBC_D<46>
FBC_D<47>
FBC_DQM5
FBC_DQS_RN5
FBC_DQS_WP5
FBC_D<56>
FBC_D<57>
FBC_D<58>
FBC_D<59>
FBC_D<60>
FBC_D<61>
FBC_D<62>
FBC_D<63>
FBC_DQM7
FBC_DQS_RN7
FBC_DQS_WP7
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
R3
M3
R2
T3
N2
L3
M2
T2
N3
P3
P2
F3
E2
G3
F2
C3
B3
C2
B2
E3
D3
D2
SubPartition 1 Termination Balancing A2..A7
R657
121
1%
0402
COMMON
R677
121
1%
0402
COMMON
R644
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
GND
FBC_VREF3
FBC_VREF4
5
M9
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M9
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R681
121
1%
0402
COMMON
R665
121
1%
0402
COMMON
R673
121
1%
0402
COMMON
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer C: Memory Section
www.vinafix.vn
5.4G>
5.5G>
5.5G>
5.5G>
5.5G>
5.1G>
5.3G<>
5.3G<>
5.3G<>
5.3G<>
5.3G<>
5.3G<>
5.3G<>
5.3G<>
5.3G<
5.3G<
5.3G<
5.3G<
5.3G<
5.3G<
5.3G<
5.3G<
5.3G>
5.3G>
5.3G>
5.4G>
5.4G>
5.4G>
5.4G>
5.4G>
FBC_CMD<0..28>
FBC_CMD<0>
0
FBC_CMD<1>
1
FBC_CMD<2>
2
FBC_CMD<3>
3
FBC_CMD<4>
4
FBC_CMD<5>
5
FBC_CMD<6>
6
FBC_CMD<7>
7
FBC_CMD<8>
8
FBC_CMD<9>
9
FBC_CMD<10>
10
FBC_CMD<11>
11
FBC_CMD<12>
12
FBC_CMD<13>
13
FBC_CMD<14>
14
FBC_CMD<15>
15
FBC_CMD<16>
16
FBC_CMD<17>
17
FBC_CMD<18>
18
FBC_CMD<19>
19
FBC_CMD<20>
20
FBC_CMD<21>
21
FBC_CMD<23>
23
FBC_CMD<24>
24
FBC_CMD<25>
25
FBC_CMD<26>
26
FBC_CMD<27>
27
FBC_CMD<28>
28
FBC0_CLK0
FBC0_CLK0*
FBC1_CLK0
FBC1_CLK0*
FBC_D<0..63>
FBC_D<0>
0
FBC_D<1>
1
FBC_D<2>
2
FBC_D<3>
3
FBC_D<4>
4
FBC_D<5>
5
FBC_D<6>
6
FBC_D<7>
7
FBC_D<8>
8
FBC_D<9>
9
FBC_D<10>
10
FBC_D<11>
11
FBC_D<12>
12
FBC_D<13>
13
FBC_D<14>
14
FBC_D<15>
15
FBC_D<16>
16
FBC_D<17>
17
FBC_D<18>
18
FBC_D<19>
19
FBC_D<20>
20
FBC_D<21>
21
FBC_D<22>
22
FBC_D<23>
23
FBC_D<24>
24
FBC_D<25>
25
FBC_D<26>
26
FBC_D<27>
27
FBC_D<28>
28
FBC_D<29>
29
FBC_D<30>
30
FBC_D<31>
31
FBC_D<32>
32
FBC_D<33>
33
FBC_D<34>
34
FBC_D<35>
35
FBC_D<36>
36
FBC_D<37>
37
FBC_D<38>
38
FBC_D<39>
39
FBC_D<40>
40
FBC_D<41>
41
FBC_D<42>
42
FBC_D<43>
43
FBC_D<44>
44
FBC_D<45>
45
FBC_D<46>
46
FBC_D<47>
47
FBC_D<48>
48
FBC_D<49>
49
FBC_D<50>
50
FBC_D<51>
51
FBC_D<52>
52
FBC_D<53>
53
FBC_D<54>
54
FBC_D<55>
55
FBC_D<56>
56
FBC_D<57>
57
FBC_D<58>
58
FBC_D<59>
59
FBC_D<60>
60
FBC_D<61>
61
FBC_D<62>
62
FBC_D<63>
63
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_CMD<14>
FBC_CMD<17>
FBC_CMD<7>
FBC_CMD<16>
FBC_CMD<21>
FBC_CMD<12>
FBC_CMD<5>
FBC_CMD<4>
FBC_CMD<3>
FBC_CMD<0>
FBC_CMD<2>
FBC_CMD<1>
FBC_CMD<19>
FBC_CMD<18>
FBC_CMD<9>
FBC_CMD<20>
FBC_CMD<15>
FBC_CMD<11>
FBC_CMD<8>
FBC_CMD<6>
FBC0_CLK0
FBC0_CLK0*
SNN_FBC_NC01
FBC_CMD<13>
R46
0402
5%
1K for Qimonda
0 for others
FBC_CMD<10>
GND
FBC_D<0>
FBC_D<1>
FBC_D<2> G10
FBC_D<3>
FBC_D<4>
FBC_D<5>
FBC_D<6>
FBC_D<7>
FBC_DQM0
FBC_DQS_RN0
FBC_DQS_WP0
FBC_D<16>
FBC_D<17>
FBC_D<18>
FBC_D<19>
FBC_D<20>
FBC_D<21>
FBC_D<22>
FBC_D<23>
FBC_DQM2
FBC_DQS_RN2
FBC_DQS_WP2
FBVDDQ
FBC_CMD<5>
FBC_CMD<4>
FBC_CMD<3>
FBC_CMD<0>
FBC_CMD<2>
FBC_CMD<1>
FBC_SEN1
0
CHANGED
GND
FBC_ZQ1
GND
FBVDDQ
M10
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R612
243
1%
0402
COMMON
GND
C11
E11
F10
C10
F11
B11
B10
E10
D10
D11
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
3
M10
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M10
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
C2
B3
B2
G3
F3
E2
F2
C3
E3
D3
D2
FBC_D<8>
FBC_D<9>
FBC_D<10>
FBC_D<11>
FBC_D<12>
FBC_D<13>
FBC_D<14>
FBC_D<15>
FBC_DQM1
FBC_DQS_RN1
FBC_DQS_WP1
FBC_D<24>
FBC_D<25>
FBC_D<26>
FBC_D<27>
FBC_D<28>
FBC_D<29>
FBC_D<30>
FBC_D<31>
FBC_DQM3
FBC_DQS_RN3
FBC_DQS_WP3
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
L10
M10
N11
R11
M11
T10
R10
T11
N10
P10
P11
L3
M2
M3
T3
N2
R3
R2
T2
N3
P3
P2
SubPartition 0 Termination Balancing A2..A7
R686
121
1%
0402
COMMON
R687
121
1%
0402
COMMON
R688
121
1%
0402
COMMON
R633
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
R45
0402
GND
GND
FBC_VREF1
FBC_VREF2
4
M10
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M10
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R670
121
1%
0402
COMMON
FBC_CMD<14>
FBC_CMD<17>
FBC_CMD<7>
FBC_CMD<16>
FBC_CMD<21>
FBC_CMD<12>
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
FBC_CMD<28>
FBC_CMD<26>
FBC_CMD<27>
FBC_CMD<19>
FBC_CMD<18>
FBC_CMD<9>
FBC_CMD<20>
FBC_CMD<15>
FBC_CMD<11>
FBC_CMD<8>
FBC_CMD<6>
FBC1_CLK0
FBC1_CLK0*
SNN_FBC_NC04
FBC_CMD<13>
0
CHANGED
5%
1K for Qimonda
0 for others
FBC_CMD<10>
FBVDDQ
FBC_D<32>
FBC_D<33>
FBC_D<34>
FBC_D<35>
FBC_D<36>
FBC_D<37>
FBC_D<38>
FBC_D<39>
FBC_DQM4
FBC_DQS_RN4
FBC_DQS_WP4
FBC_D<48>
FBC_D<49>
FBC_D<50>
FBC_D<51>
FBC_D<52>
FBC_D<53>
FBC_D<54>
FBC_D<55>
FBC_DQM6
FBC_DQS_RN6
FBC_DQS_WP6
R678
121
1%
0402
COMMON
FBC_SEN2
FBC_ZQ2
GND
FBVDDQ
TERMINATION SELECT
FBC_CMD<6>
R664
10K
5%
0402
COMMON
SINGLE BANK
GND
FBC_CMD<10>
R682
10K
5%
0402
COMMON
GND
FBVDDQ
R626
511
1%
0402
COMMON
FBC_VREF1
R645
C637
1.1K.1UF
1%
6.3V
0402
10%
CHANGED
X7R
0402
COMMON
C633
.1UF
6.3V
10%
X7R
0402
COMMON
C621
.1UF
6.3V
10%
X7R
0402
COMMON
C634
.1UF
6.3V
10%
X7R
0402
COMMON
FBC0_CLK0_R
FBC0_CLK0
FBC0_CLK0*
FBC1_CLK0
FBC1_CLK0*
RESETCKE
FBC1_CLK0_R
R639
80.6
1%
0402
COMMON
R638
80.6
1%
0402
COMMON
FBVDDQ
R620
511
1%
0402
COMMON
FBC_VREF2
R634
1.1K
1%
0402
CHANGED
FBVDDQ
R625
511
1%
0402
COMMON
FBC_VREF3
R643
1.1K
1%
0402
CHANGED
FBVDDQ
R660
511
1%
0402
COMMON
FBC_VREF4
R630
1.1K
1%
0402
CHANGED
GND
GND
GND
GND
R653
80.6
1%
0402
COMMON
R652
80.6
1%
0402
COMMON
C624
.01UF
16V
10%
X7R
0402
COMMON
GND
C623
.01UF
16V
10%
X7R
0402
COMMON
GND
600-10897-0053-300 A
p897
misun
10 OF 41
31-DEC-2008
Page 11
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININININ
BI
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBIBIBIBIBIBIINININININININ
OUT
OUT
OUTINOUT
OUT
OUT
OUT
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer D: Memory Section
H10
H11
K10
K11
J11
J10
R725
243
1%
0402
COMMON
K12
J12
GND
C11
C10
B11
B10
F11
G10
F10
E11
E10
D10
D11
N2
T3
L3
M3
R3
R2
M2
T2
N3
P3
P2
FBVDDQ
FBD_CMD<23>
FBD_CMD<24>
FBD_CMD<25>
FBD_CMD<28>
FBD_CMD<26>
FBD_CMD<27>
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4
L9
G9
G4
H3
H9
J2
J3
V4
V9
A9
A4
K1
J1
3
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
5
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
FBD_D<40>
FBD_D<41>
FBD_D<42>
FBD_D<43>
FBD_D<44>
FBD_D<45>
FBD_D<46>
FBD_D<47>
FBD_DQM5
FBD_DQS_RN5
FBD_DQS_WP5
FBD_D<56>
FBD_D<57>
FBD_D<58>
FBD_D<59>
FBD_D<60>
FBD_D<61>
FBD_D<62>
FBD_D<63>
FBD_DQM7
FBD_DQS_RN7
FBD_DQS_WP7
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
M10
N11
M11
L10
R11
T10
T11
R10
N10
P10
P11
E2
F2
B3
C3
C2
F3
G3
B2
E3
D3
D2
SubPartition 1 Termination Balancing A2..A7
R719
121
1%
0402
COMMON
R722
121
1%
0402
COMMON
R729
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
GND
FBD_VREF3
FBD_VREF4
4
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
2
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R733
121
1%
0402
COMMON
R730
121
1%
0402
COMMON
R726
121
1%
0402
COMMON
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer D: Memory Section
www.vinafix.vn
5.4H>
5.5H>
5.5H>
5.5H>
5.5H>
5.1H>
5.3H<>
5.3H<>
5.3H<>
5.3H<>
5.3H<>
5.3H<>
5.3H<>
5.3H<>
5.3H<
5.3H<
5.3H<
5.3H<
5.3H<
5.3H<
5.3H<
5.3H<
5.3H>
5.3H>
5.3H>
5.4H>
5.4H>
5.4H>
5.4H>
5.4H>
FBD_CMD<0..28>
FBD_CMD<0>
0
FBD_CMD<1>
1
FBD_CMD<2>
2
FBD_CMD<3>
3
FBD_CMD<4>
4
FBD_CMD<5>
5
FBD_CMD<6>
6
FBD_CMD<7>
7
FBD_CMD<8>
8
FBD_CMD<9>
9
FBD_CMD<10>
10
FBD_CMD<11>
11
FBD_CMD<12>
12
FBD_CMD<13>
13
FBD_CMD<14>
14
FBD_CMD<15>
15
FBD_CMD<16>
16
FBD_CMD<17>
17
FBD_CMD<18>
18
FBD_CMD<19>
19
FBD_CMD<20>
20
FBD_CMD<21>
21
FBD_CMD<23>
23
FBD_CMD<24>
24
FBD_CMD<25>
25
FBD_CMD<26>
26
FBD_CMD<27>
27
FBD_CMD<28>
28
FBD0_CLK0
FBD0_CLK0*
FBD1_CLK0
FBD1_CLK0*
FBD_D<0..63>
FBD_D<0>
0
FBD_D<1>
1
FBD_D<2>
2
FBD_D<3>
3
FBD_D<4>
4
FBD_D<5>
5
FBD_D<6>
6
FBD_D<7>
7
FBD_D<8>
8
FBD_D<9>
9
FBD_D<10>
10
FBD_D<11>
11
FBD_D<12>
12
FBD_D<13>
13
FBD_D<14>
14
FBD_D<15>
15
FBD_D<16>
16
FBD_D<17>
17
FBD_D<18>
18
FBD_D<19>
19
FBD_D<20>
20
FBD_D<21>
21
FBD_D<22>
22
FBD_D<23>
23
FBD_D<24>
24
FBD_D<25>
25
FBD_D<26>
26
FBD_D<27>
27
FBD_D<28>
28
FBD_D<29>
29
FBD_D<30>
30
FBD_D<31>
31
FBD_D<32>
32
FBD_D<33>
33
FBD_D<34>
34
FBD_D<35>
35
FBD_D<36>
36
FBD_D<37>
37
FBD_D<38>
38
FBD_D<39>
39
FBD_D<40>
40
FBD_D<41>
41
FBD_D<42>
42
FBD_D<43>
43
FBD_D<44>
44
FBD_D<45>
45
FBD_D<46>
46
FBD_D<47>
47
FBD_D<48>
48
FBD_D<49>
49
FBD_D<50>
50
FBD_D<51>
51
FBD_D<52>
52
FBD_D<53>
53
FBD_D<54>
54
FBD_D<55>
55
FBD_D<56>
56
FBD_D<57>
57
FBD_D<58>
58
FBD_D<59>
59
FBD_D<60>
60
FBD_D<61>
61
FBD_D<62>
62
FBD_D<63>
63
FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQM4
FBD_DQM5
FBD_DQM6
FBD_DQM7
FBD_DQS_RN0
FBD_DQS_RN1
FBD_DQS_RN2
FBD_DQS_RN3
FBD_DQS_RN4
FBD_DQS_RN5
FBD_DQS_RN6
FBD_DQS_RN7
FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_DQS_WP4
FBD_DQS_WP5
FBD_DQS_WP6
FBD_DQS_WP7
FBD_CMD<14>
FBD_CMD<17>
FBD_CMD<7>
FBD_CMD<16>
FBD_CMD<21>
FBD_CMD<12>
FBD_CMD<5>
FBD_CMD<4>
FBD_CMD<3>
FBD_CMD<0>
FBD_CMD<2>
FBD_CMD<1>
FBD_CMD<19>
FBD_CMD<18>
FBD_CMD<9>
FBD_CMD<20>
FBD_CMD<15>
FBD_CMD<11>
FBD_CMD<8>
FBD_CMD<6>
FBD0_CLK0
FBD0_CLK0*
SNN_FBD_NC01
FBD_CMD<13>
R43
0402
5%
1K for Qimonda
0 for others
FBD_CMD<10>
GND
FBD_D<0>
FBD_D<1>
FBD_D<2> B10
FBD_D<3>
FBD_D<4>
FBD_D<5>
FBD_D<6>
FBD_D<7>
FBD_DQM0
FBD_DQS_RN0
FBD_DQS_WP0
FBD_D<16>
FBD_D<17>
FBD_D<18>
FBD_D<19>
FBD_D<20>
FBD_D<21>
FBD_D<22>
FBD_D<23>
FBD_DQM2
FBD_DQS_RN2
FBD_DQS_WP2
FBVDDQ
FBD_CMD<5>
FBD_CMD<4>
FBD_CMD<3>
FBD_CMD<0>
FBD_CMD<2>
FBD_CMD<1>
FBD_SEN1
0
CHANGED
GND
FBD_ZQ1
GND
FBVDDQ
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R702
243
1%
0402
COMMON
GND
C10
C11
B11
F11
G10
E11
F10
E10
D10
D11
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
3
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
2
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
B2
C2
B3
C3
G3
F2
E2
F3
E3
D3
D2
FBD_D<8>
FBD_D<9>
FBD_D<10>
FBD_D<11>
FBD_D<12>
FBD_D<13>
FBD_D<14>
FBD_D<15>
FBD_DQM1
FBD_DQS_RN1
FBD_DQS_WP1
FBD_D<24>
FBD_D<25>
FBD_D<26>
FBD_D<27>
FBD_D<28>
FBD_D<29>
FBD_D<30>
FBD_D<31>
FBD_DQM3
FBD_DQS_RN3
FBD_DQS_WP3
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
L3
M2
M3
N2
T2
T3
R2
R3
N3
P3
P2
L10
M11
M10
N11
R11
T11
R10
T10
N10
P10
P11
SubPartition 0 Termination Balancing A2..A7
R705
121
1%
0402
COMMON
R704
121
1%
0402
COMMON
R703
121
1%
0402
COMMON
R696
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
R40
0402
GND
GND
FBD_VREF1
FBD_VREF2
5
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
4
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R701
121
1%
0402
COMMON
FBD_CMD<14>
FBD_CMD<17>
FBD_CMD<7>
FBD_CMD<16>
FBD_CMD<21>
FBD_CMD<12>
FBD_CMD<23>
FBD_CMD<24>
FBD_CMD<25>
FBD_CMD<28>
FBD_CMD<26>
FBD_CMD<27>
FBD_CMD<19>
FBD_CMD<18>
FBD_CMD<9>
FBD_CMD<20>
FBD_CMD<15>
FBD_CMD<11>
FBD_CMD<8>
FBD_CMD<6>
FBD1_CLK0
FBD1_CLK0*
SNN_FBD_NC04
FBD_CMD<13>
0
CHANGED
5%
1K for Qimonda
0 for others
FBD_CMD<10>
FBVDDQ
FBD_D<32>
FBD_D<33>
FBD_D<34>
FBD_D<35>
FBD_D<36>
FBD_D<37>
FBD_D<38>
FBD_D<39>
FBD_DQM4
FBD_DQS_RN4
FBD_DQS_WP4
FBD_D<48>
FBD_D<49>
FBD_D<50>
FBD_D<51>
FBD_D<52>
FBD_D<53>
FBD_D<54>
FBD_D<55>
FBD_DQM6
FBD_DQS_RN6
FBD_DQS_WP6
R700
121
1%
0402
COMMON
FBD_SEN2
FBD_ZQ2
GND
FBVDDQ
TERMINATION SELECT
FBD_CMD<6>
R708
10K
5%
0402
COMMON
SINGLE BANK
GND
FBD_CMD<10>
R710
10K
5%
0402
COMMON
GND
FBVDDQ
R706
511
1%
0402
COMMON
FBD_VREF1
R707
C722
1.1K.1UF
1%
6.3V
0402
10%
CHANGED
X7R
0402
COMMON
C704
.1UF
6.3V
10%
X7R
0402
COMMON
C831
.1UF
6.3V
10%
X7R
0402
COMMON
C738
.1UF
6.3V
10%
X7R
0402
COMMON
FBD0_CLK0_R
FBD0_CLK0
FBD0_CLK0*
FBD1_CLK0
FBD1_CLK0*
RESETCKE
FBD1_CLK0_R
R698
80.6
1%
0402
COMMON
R723
80.6
1%
0402
COMMON
FBVDDQ
R695
511
1%
0402
COMMON
FBD_VREF2
R697
1.1K
1%
0402
CHANGED
FBVDDQ
R731
511
1%
0402
COMMON
FBD_VREF3
R732
1.1K
1%
0402
CHANGED
FBVDDQ
R712
511
1%
0402
COMMON
FBD_VREF4
R715
1.1K
1%
0402
CHANGED
GND
GND
GND
GND
R699
80.6
1%
0402
COMMON
R724
80.6
1%
0402
COMMON
C715
.01UF
16V
10%
X7R
0402
COMMON
GND
C791
.01UF
16V
10%
X7R
0402
COMMON
GND
600-10897-0053-300 A
p897
misun
11 OF 41
31-DEC-2008
Page 12
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININININ
BI
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBIBIBIBIBIBIININININININININOUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer E: Memory Section
H10
H11
K10
K11
J11
J10
R762
243
1%
0402
COMMON
K12
J12
GND
B10
C10
C11
B11
F11
G10
E11
F10
E10
D10
D11
L10
M11
N11
M10
T10
R11
T11
R10
N10
P10
P11
FBVDDQ
FBE_CMD<23>
FBE_CMD<24>
FBE_CMD<25>
FBE_CMD<28>
FBE_CMD<26>
FBE_CMD<27>
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4
L9
G9
G4
H3
H9
J2
J3
V4
V9
A9
A4
K1
J1
3
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
4
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
FBE_D<40>
FBE_D<41>
FBE_D<42>
FBE_D<43>
FBE_D<44>
FBE_D<45>
FBE_D<46>
FBE_D<47>
FBE_DQM5
FBE_DQS_RN5
FBE_DQS_WP5
FBE_D<56>
FBE_D<57>
FBE_D<58>
FBE_D<59>
FBE_D<60>
FBE_D<61>
FBE_D<62>
FBE_D<63>
FBE_DQM7
FBE_DQS_RN7
FBE_DQS_WP7
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
R3
T3
R2
T2
N2
M2
M3
L3
N3
P3
P2
F2
G3
F3
E2
C2
C3
B2
B3
E3
D3
D2
SubPartition 1 Termination Balancing A2..A7
R758
121
1%
0402
COMMON
R759
121
1%
0402
COMMON
R760
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
GND
FBE_VREF3
FBE_VREF4
5
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
2
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R766
121
1%
0402
COMMON
R763
121
1%
0402
COMMON
R761
121
1%
0402
COMMON
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer E: Memory Section
www.vinafix.vn
6.4G>
6.5G>
6.5G>
6.5G>
6.5G>
6.1G>
6.3G<>
6.3G<>
6.3G<>
6.3G<>
6.3G<>
6.3G<>
6.3G<>
6.3G<>
6.3G<
6.3G<
6.3G<
6.3G<
6.3G<
6.3G<
6.3G<
6.3G<
6.3G>
6.3G>
6.3G>
6.4G>
6.4G>
6.4G>
6.4G>
6.4G>
FBE_CMD<0..28>
FBE_CMD<0>
0
FBE_CMD<1>
1
FBE_CMD<2>
2
FBE_CMD<3>
3
FBE_CMD<4>
4
FBE_CMD<5>
5
FBE_CMD<6>
6
FBE_CMD<7>
7
FBE_CMD<8>
8
FBE_CMD<9>
9
FBE_CMD<10>
10
FBE_CMD<11>
11
FBE_CMD<12>
12
FBE_CMD<13>
13
FBE_CMD<14>
14
FBE_CMD<15>
15
FBE_CMD<16>
16
FBE_CMD<17>
17
FBE_CMD<18>
18
FBE_CMD<19>
19
FBE_CMD<20>
20
FBE_CMD<21>
21
FBE_CMD<23>
23
FBE_CMD<24>
24
FBE_CMD<25>
25
FBE_CMD<26>
26
FBE_CMD<27>
27
FBE_CMD<28>
28
FBE0_CLK0
FBE0_CLK0*
FBE1_CLK0
FBE1_CLK0*
FBE_D<0..63>
FBE_D<0>
0
FBE_D<1>
1
FBE_D<2>
2
FBE_D<3>
3
FBE_D<4>
4
FBE_D<5>
5
FBE_D<6>
6
FBE_D<7>
7
FBE_D<8>
8
FBE_D<9>
9
FBE_D<10>
10
FBE_D<11>
11
FBE_D<12>
12
FBE_D<13>
13
FBE_D<14>
14
FBE_D<15>
15
FBE_D<16>
16
FBE_D<17>
17
FBE_D<18>
18
FBE_D<19>
19
FBE_D<20>
20
FBE_D<21>
21
FBE_D<22>
22
FBE_D<23>
23
FBE_D<24>
24
FBE_D<25>
25
FBE_D<26>
26
FBE_D<27>
27
FBE_D<28>
28
FBE_D<29>
29
FBE_D<30>
30
FBE_D<31>
31
FBE_D<32>
32
FBE_D<33>
33
FBE_D<34>
34
FBE_D<35>
35
FBE_D<36>
36
FBE_D<37>
37
FBE_D<38>
38
FBE_D<39>
39
FBE_D<40>
40
FBE_D<41>
41
FBE_D<42>
42
FBE_D<43>
43
FBE_D<44>
44
FBE_D<45>
45
FBE_D<46>
46
FBE_D<47>
47
FBE_D<48>
48
FBE_D<49>
49
FBE_D<50>
50
FBE_D<51>
51
FBE_D<52>
52
FBE_D<53>
53
FBE_D<54>
54
FBE_D<55>
55
FBE_D<56>
56
FBE_D<57>
57
FBE_D<58>
58
FBE_D<59>
59
FBE_D<60>
60
FBE_D<61>
61
FBE_D<62>
62
FBE_D<63>
63
FBE_DQM0
FBE_DQM1
FBE_DQM2
FBE_DQM3
FBE_DQM4
FBE_DQM5
FBE_DQM6
FBE_DQM7
FBE_DQS_RN0
FBE_DQS_RN1
FBE_DQS_RN2
FBE_DQS_RN3
FBE_DQS_RN4
FBE_DQS_RN5
FBE_DQS_RN6
FBE_DQS_RN7
FBE_DQS_WP0
FBE_DQS_WP1
FBE_DQS_WP2
FBE_DQS_WP3
FBE_DQS_WP4
FBE_DQS_WP5
FBE_DQS_WP6
FBE_DQS_WP7
FBE_CMD<14>
FBE_CMD<17>
FBE_CMD<7>
FBE_CMD<16>
FBE_CMD<21>
FBE_CMD<12>
FBE_CMD<5>
FBE_CMD<4>
FBE_CMD<3>
FBE_CMD<0>
FBE_CMD<2>
FBE_CMD<1>
FBE_CMD<19>
FBE_CMD<18>
FBE_CMD<9>
FBE_CMD<20>
FBE_CMD<15>
FBE_CMD<11>
FBE_CMD<8>
FBE_CMD<6>
FBE0_CLK0
FBE0_CLK0*
SNN_FBE_NC01
FBE_CMD<13>
R39
0402
5%
0 for others
FBE_CMD<10>
GND
FBE_D<0>
FBE_D<1>
FBE_D<2> C10
FBE_D<3>
FBE_D<4>
FBE_D<5>
FBE_D<6>
FBE_D<7>
FBE_DQM0
FBE_DQS_RN0
FBE_DQS_WP0
FBE_D<16>
FBE_D<17>
FBE_D<18>
FBE_D<19>
FBE_D<20>
FBE_D<21>
FBE_D<22>
FBE_D<23>
FBE_DQM2
FBE_DQS_RN2
FBE_DQS_WP2
FBVDDQ
FBE_CMD<5>
FBE_CMD<4>
FBE_CMD<3>
FBE_CMD<0>
FBE_CMD<2>
FBE_CMD<1>
FBE_SEN1
0
CHANGED
GND
FBE_ZQ1
GND
FBVDDQ
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R742
243
1%
0402
COMMON
GND
E11
C11
B11
B10
F10
G10
F11
E10
D10
D11
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
3
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
2
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
C2
B2
B3
C3
G3
E2
F2
F3
E3
D3
D2
FBE_D<8>
FBE_D<9>
FBE_D<10>
FBE_D<11>
FBE_D<12>
FBE_D<13>
FBE_D<14>
FBE_D<15>
FBE_DQM1
FBE_DQS_RN1
FBE_DQS_WP1
FBE_D<24>
FBE_D<25>
FBE_D<26>
FBE_D<27>
FBE_D<28>
FBE_D<29>
FBE_D<30>
FBE_D<31>
FBE_DQM3
FBE_DQS_RN3
FBE_DQS_WP3
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
N11
M10
M11
L10
R11
R10
T10
T11
N10
P10
P11
M3
M2
N2
L3
R2
T3
T2
R3
N3
P3
P2
SubPartition 0 Termination Balancing A2..A7
R747
121
1%
0402
COMMON
R746
121
1%
0402
COMMON
R743
121
1%
0402
COMMON
R735
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
R38
0402
GND
GND
FBE_VREF1
FBE_VREF2
4
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
5
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R741
121
1%
0402
COMMON
FBE_CMD<14>
FBE_CMD<17>
FBE_CMD<7>
FBE_CMD<16>
FBE_CMD<21>
FBE_CMD<12>
FBE_CMD<23>
FBE_CMD<24>
FBE_CMD<25>
FBE_CMD<28>
FBE_CMD<26>
FBE_CMD<27>
FBE_CMD<19>
FBE_CMD<18>
FBE_CMD<9>
FBE_CMD<20>
FBE_CMD<15>
FBE_CMD<11>
FBE_CMD<8>
FBE_CMD<6>
FBE1_CLK0
FBE1_CLK0*
SNN_FBE_NC04
FBE_CMD<13>
0
CHANGED
5%
1K for Qimonda1K for Qimonda
0 for others
FBE_CMD<10>
FBVDDQ
FBE_D<32>
FBE_D<33>
FBE_D<34>
FBE_D<35>
FBE_D<36>
FBE_D<37>
FBE_D<38>
FBE_D<39>
FBE_DQM4
FBE_DQS_RN4
FBE_DQS_WP4
FBE_D<48>
FBE_D<49>
FBE_D<50>
FBE_D<51>
FBE_D<52>
FBE_D<53>
FBE_D<54>
FBE_D<55>
FBE_DQM6
FBE_DQS_RN6
FBE_DQS_WP6
R738
121
1%
0402
COMMON
FBE_SEN2
FBE_ZQ2
GND
FBVDDQ
TERMINATION SELECT
FBE_CMD<6>
R752
10K
5%
0402
COMMON
SINGLE BANK
GND
FBE_CMD<10>
R753
10K
5%
0402
COMMON
GND
FBVDDQ
R749
511
1%
0402
COMMON
FBE_VREF1
R750
C931
1.1K.1UF
1%
6.3V
0402
10%
CHANGED
X7R
0402
COMMON
C852
.1UF
6.3V
10%
X7R
0402
COMMON
C991
.1UF
6.3V
10%
X7R
0402
COMMON
C962
.1UF
6.3V
10%
X7R
0402
COMMON
FBE0_CLK0_R
FBE0_CLK0
FBE0_CLK0*
FBE1_CLK0
FBE1_CLK0*
RESETCKE
FBE1_CLK0_R
R739
80.6
1%
0402
COMMON
R754
80.6
1%
0402
COMMON
FBVDDQ
R734
511
1%
0402
COMMON
FBE_VREF2
R736
1.1K
1%
0402
CHANGED
FBVDDQ
R765
511
1%
0402
COMMON
FBE_VREF3
R764
1.1K
1%
0402
CHANGED
FBVDDQ
R756
511
1%
0402
COMMON
FBE_VREF4
R757
1.1K
1%
0402
CHANGED
GND
GND
GND
GND
R740
80.6
1%
0402
COMMON
R755
80.6
1%
0402
COMMON
C906
.01UF
16V
10%
X7R
0402
COMMON
GND
C958
.01UF
16V
10%
X7R
0402
COMMON
GND
600-10897-0053-300 A
p897
misun
12 OF 41
31-DEC-2008
Page 13
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININININ
BI
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBIBIBIBIBIBIININININININININOUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer F: Memory Section
H10
H11
K10
K11
J11
J10
R830
243
1%
0402
COMMON
K12
J12
GND
B11
B10
C10
C11
F11
E11
G10
F10
E10
D10
D11
N11
R11
T10
T11
R10
M10
M11
L10
N10
P10
P11
FBVDDQ
FBF_CMD<23>
FBF_CMD<24>
FBF_CMD<25>
FBF_CMD<28>
FBF_CMD<26>
FBF_CMD<27>
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4
L9
G9
G4
H3
H9
J2
J3
V4
V9
A9
A4
K1
J1
3
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
4
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
FBF_D<40>
FBF_D<41>
FBF_D<42>
FBF_D<43>
FBF_D<44>
FBF_D<45>
FBF_D<46>
FBF_D<47>
FBF_DQM5
FBF_DQS_RN5
FBF_DQS_WP5
FBF_D<56>
FBF_D<57>
FBF_D<58>
FBF_D<59>
FBF_D<60>
FBF_D<61>
FBF_D<62>
FBF_D<63>
FBF_DQM7
FBF_DQS_RN7
FBF_DQS_WP7
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
R2
T3
T2
R3
M3
M2
N2
L3
N3
P3
P2
E2
F2
F3
C2
C3
B2
G3
B3
E3
D3
D2
SubPartition 1 Termination Balancing A2..A7
R790
121
1%
0402
COMMON
R776
121
1%
0402
COMMON
R806
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
GND
FBF_VREF3
FBF_VREF4
5
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
2
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R795
121
1%
0402
COMMON
R789
121
1%
0402
COMMON
R787
121
1%
0402
COMMON
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer F: Memory Section
www.vinafix.vn
6.4H>
6.5H>
6.5H>
6.5H>
6.5H>
6.1H>
6.3H<>
6.3H<>
6.3H<>
6.3H<>
6.3H<>
6.3H<>
6.3H<>
6.3H<>
6.3H<
6.3H<
6.3H<
6.3H<
6.3H<
6.3H<
6.3H<
6.3H<
6.3H>
6.3H>
6.3H>
6.4H>
6.4H>
6.4H>
6.4H>
6.4H>
FBF_CMD<0..28>
FBF_CMD<0>
0
FBF_CMD<1>
1
FBF_CMD<2>
2
FBF_CMD<3>
3
FBF_CMD<4>
4
FBF_CMD<5>
5
FBF_CMD<6>
6
FBF_CMD<7>
7
FBF_CMD<8>
8
FBF_CMD<9>
9
FBF_CMD<10>
10
FBF_CMD<11>
11
FBF_CMD<12>
12
FBF_CMD<13>
13
FBF_CMD<14>
14
FBF_CMD<15>
15
FBF_CMD<16>
16
FBF_CMD<17>
17
FBF_CMD<18>
18
FBF_CMD<19>
19
FBF_CMD<20>
20
FBF_CMD<21>
21
FBF_CMD<23>
23
FBF_CMD<24>
24
FBF_CMD<25>
25
FBF_CMD<26>
26
FBF_CMD<27>
27
FBF_CMD<28>
28
FBF0_CLK0
FBF0_CLK0*
FBF1_CLK0
FBF1_CLK0*
FBF_D<0..63>
FBF_D<0>
0
FBF_D<1>
1
FBF_D<2>
2
FBF_D<3>
3
FBF_D<4>
4
FBF_D<5>
5
FBF_D<6>
6
FBF_D<7>
7
FBF_D<8>
8
FBF_D<9>
9
FBF_D<10>
10
FBF_D<11>
11
FBF_D<12>
12
FBF_D<13>
13
FBF_D<14>
14
FBF_D<15>
15
FBF_D<16>
16
FBF_D<17>
17
FBF_D<18>
18
FBF_D<19>
19
FBF_D<20>
20
FBF_D<21>
21
FBF_D<22>
22
FBF_D<23>
23
FBF_D<24>
24
FBF_D<25>
25
FBF_D<26>
26
FBF_D<27>
27
FBF_D<28>
28
FBF_D<29>
29
FBF_D<30>
30
FBF_D<31>
31
FBF_D<32>
32
FBF_D<33>
33
FBF_D<34>
34
FBF_D<35>
35
FBF_D<36>
36
FBF_D<37>
37
FBF_D<38>
38
FBF_D<39>
39
FBF_D<40>
40
FBF_D<41>
41
FBF_D<42>
42
FBF_D<43>
43
FBF_D<44>
44
FBF_D<45>
45
FBF_D<46>
46
FBF_D<47>
47
FBF_D<48>
48
FBF_D<49>
49
FBF_D<50>
50
FBF_D<51>
51
FBF_D<52>
52
FBF_D<53>
53
FBF_D<54>
54
FBF_D<55>
55
FBF_D<56>
56
FBF_D<57>
57
FBF_D<58>
58
FBF_D<59>
59
FBF_D<60>
60
FBF_D<61>
61
FBF_D<62>
62
FBF_D<63>
63
FBF_DQM0
FBF_DQM1
FBF_DQM2
FBF_DQM3
FBF_DQM4
FBF_DQM5
FBF_DQM6
FBF_DQM7
FBF_DQS_RN0
FBF_DQS_RN1
FBF_DQS_RN2
FBF_DQS_RN3
FBF_DQS_RN4
FBF_DQS_RN5
FBF_DQS_RN6
FBF_DQS_RN7
FBF_DQS_WP0
FBF_DQS_WP1
FBF_DQS_WP2
FBF_DQS_WP3
FBF_DQS_WP4
FBF_DQS_WP5
FBF_DQS_WP6
FBF_DQS_WP7
FBF_CMD<14>
FBF_CMD<17>
FBF_CMD<7>
FBF_CMD<16>
FBF_CMD<21>
FBF_CMD<12>
FBF_CMD<5>
FBF_CMD<4>
FBF_CMD<3>
FBF_CMD<0>
FBF_CMD<2>
FBF_CMD<1>
FBF_CMD<19>
FBF_CMD<18>
FBF_CMD<9>
FBF_CMD<20>
FBF_CMD<15>
FBF_CMD<11>
FBF_CMD<8>
FBF_CMD<6>
FBF0_CLK0
FBF0_CLK0*
SNN_FBF_NC01
FBF_CMD<13>
R36
0402
5%
1K for Qimonda
0 for others
FBF_CMD<10>
GND
FBF_D<0>
FBF_D<1>
FBF_D<2> B10
FBF_D<3>
FBF_D<4>
FBF_D<5>
FBF_D<6>
FBF_D<7>
FBF_DQM0
FBF_DQS_RN0
FBF_DQS_WP0
FBF_D<16>
FBF_D<17>
FBF_D<18>
FBF_D<19>
FBF_D<20>
FBF_D<21>
FBF_D<22>
FBF_D<23>
FBF_DQM2
FBF_DQS_RN2
FBF_DQS_WP2
FBVDDQ
FBF_CMD<5>
FBF_CMD<4>
FBF_CMD<3>
FBF_CMD<0>
FBF_CMD<2>
FBF_CMD<1>
FBF_SEN1
0
CHANGED
GND
FBF_ZQ1
GND
FBVDDQ
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R833
243
1%
0402
COMMON
GND
B11
C10
C11
F10
E11
F11
G10
E10
D10
D11
M10
N11
M11
R11
L10
R10
T10
T11
N10
P10
P11
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
3
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
4
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
FBF_D<8>
FBF_D<9>
FBF_D<10>
FBF_D<11>
FBF_D<12>
FBF_D<13>
FBF_D<14>
FBF_D<15>
FBF_DQM1
FBF_DQS_RN1
FBF_DQS_WP1
FBF_D<24>
FBF_D<25>
FBF_D<26>
FBF_D<27>
FBF_D<28>
FBF_D<29>
FBF_D<30>
FBF_D<31>
FBF_DQM3
FBF_DQS_RN3
FBF_DQS_WP3
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
T3
R3
R2
T2
N2
M3
M2
L3
N3
P3
P2
B2
C3
C2
B3
G3
F3
F2
E2
E3
D3
D2
SubPartition 0 Termination Balancing A2..A7
R770
121
1%
0402
COMMON
R773
121
1%
0402
COMMON
R782
121
1%
0402
COMMON
R801
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
R33
0402
GND
GND
FBF_VREF1
FBF_VREF2
5
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
2
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R784
121
1%
0402
COMMON
FBF_CMD<14>
FBF_CMD<17>
FBF_CMD<7>
FBF_CMD<16>
FBF_CMD<21>
FBF_CMD<12>
FBF_CMD<23>
FBF_CMD<24>
FBF_CMD<25>
FBF_CMD<28>
FBF_CMD<26>
FBF_CMD<27>
FBF_CMD<19>
FBF_CMD<18>
FBF_CMD<9>
FBF_CMD<20>
FBF_CMD<15>
FBF_CMD<11>
FBF_CMD<8>
FBF_CMD<6>
FBF1_CLK0
FBF1_CLK0*
SNN_FBF_NC04
FBF_CMD<13>
0
CHANGED
5%
1K for Qimonda
0 for others
FBF_CMD<10>
FBVDDQ
FBF_D<32>
FBF_D<33>
FBF_D<34>
FBF_D<35>
FBF_D<36>
FBF_D<37>
FBF_D<38>
FBF_D<39>
FBF_DQM4
FBF_DQS_RN4
FBF_DQS_WP4
FBF_D<48>
FBF_D<49>
FBF_D<50>
FBF_D<51>
FBF_D<52>
FBF_D<53>
FBF_D<54>
FBF_D<55>
FBF_DQM6
FBF_DQS_RN6
FBF_DQS_WP6
R775
121
1%
0402
COMMON
FBF_SEN2
FBF_ZQ2
GND
FBVDDQ
TERMINATION SELECT
FBF_CMD<6>
R825
10K
5%
0402
COMMON
SINGLE BANK
GND
FBF_CMD<10>
R772
10K
5%
0402
COMMON
GND
FBVDDQ
R820
511
1%
0402
COMMON
FBF_VREF1
R803
C1044
1.1K.1UF
1%
6.3V
0402
10%
CHANGED
X7R
0402
COMMON
C1043
.1UF
6.3V
10%
X7R
0402
COMMON
C1061
.1UF
6.3V
10%
X7R
0402
COMMON
C1048
.1UF
6.3V
10%
X7R
0402
COMMON
FBF0_CLK0_R
FBF0_CLK0
FBF0_CLK0*
FBF1_CLK0
FBF1_CLK0*
RESETCKE
FBF1_CLK0_R
R796
80.6
1%
0402
COMMON
R811
80.6
1%
0402
COMMON
FBVDDQ
R814
511
1%
0402
COMMON
FBF_VREF2
R800
1.1K
1%
0402
CHANGED
FBVDDQ
R822
511
1%
0402
COMMON
FBF_VREF3
R804
1.1K
1%
0402
CHANGED
FBVDDQ
R792
511
1%
0402
COMMON
FBF_VREF4
R813
1.1K
1%
0402
CHANGED
GND
GND
GND
GND
R808
80.6
1%
0402
COMMON
R799
80.6
1%
0402
COMMON
C1055
.01UF
16V
10%
X7R
0402
COMMON
GND
C1057
.01UF
16V
10%
X7R
0402
COMMON
GND
600-10897-0053-300 A
p897
misun
13 OF 41
31-DEC-2008
Page 14
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININININ
BI
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBIBIBIBIININBIBIINININININ
OUT
OUTINOUT
OUT
OUT
OUT
OUT
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Framebuffer G: Memory Section
H10
H11
K10
K11
J11
J10
R832
243
1%
0402
COMMON
K12
J12
GND
R11
N11
R10
T11
M10
M11
T10
L10
N10
P10
P11
B10
C10
C11
B11
F11
E11
F10
G10
E10
D10
D11
FBVDDQ
FBG_CMD<23>
FBG_CMD<24>
FBG_CMD<25>
FBG_CMD<28>
FBG_CMD<26>
FBG_CMD<27>
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4
L9
G9
G4
H3
H9
J2
J3
V4
V9
A9
A4
K1
J1
4
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
FBG_D<40>
FBG_D<41>
FBG_D<42>
FBG_D<43>
FBG_D<44>
FBG_D<45>
FBG_D<46>
FBG_D<47>
FBG_DQM5
FBG_DQS_RN5
FBG_DQS_WP5
FBG_D<56>
FBG_D<57>
FBG_D<58>
FBG_D<59>
FBG_D<60>
FBG_D<61>
FBG_D<62>
FBG_D<63>
FBG_DQM7
FBG_DQS_RN7
FBG_DQS_WP7
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
R2
T2
T3
R3
N2
L3
M2
M3
N3
P3
P2
F3
C2
B2
F2
E2
G3
C3
B3
E3
D3
D2
SubPartition 1 Termination Balancing A2..A7
R794
121
1%
0402
COMMON
R781
121
1%
0402
COMMON
R807
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
GND
FBG_VREF3
FBG_VREF4
5
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R785
121
1%
0402
COMMON
R788
121
1%
0402
COMMON
R783
121
1%
0402
COMMON
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Framebuffer G: Memory Section
www.vinafix.vn
7.4G>
7.5G>
7.5G>
7.5G>
7.5G>
7.1G>
7.3G<>
7.3G<>
7.3G<>
7.3G<>
7.3G<>
7.3G<>
7.3G<>
7.3G<>
7.3G<
7.3G<
7.3G<
7.3G<
7.3G<
7.3G<
7.3G<
7.3G<
7.3G>
7.3G>
7.3G>
7.4G>
7.4G>
7.4G>
7.4G>
7.4G>
FBG_CMD<0..28>
FBG_CMD<0>
0
FBG_CMD<1>
1
FBG_CMD<2>
2
FBG_CMD<3>
3
FBG_CMD<4>
4
FBG_CMD<5>
5
FBG_CMD<6>
6
FBG_CMD<7>
7
FBG_CMD<8>
8
FBG_CMD<9>
9
FBG_CMD<10>
10
FBG_CMD<11>
11
FBG_CMD<12>
12
FBG_CMD<13>
13
FBG_CMD<14>
14
FBG_CMD<15>
15
FBG_CMD<16>
16
FBG_CMD<17>
17
FBG_CMD<18>
18
FBG_CMD<19>
19
FBG_CMD<20>
20
FBG_CMD<21>
21
FBG_CMD<23>
23
FBG_CMD<24>
24
FBG_CMD<25>
25
FBG_CMD<26>
26
FBG_CMD<27>
27
FBG_CMD<28>
28
FBG0_CLK0
FBG0_CLK0*
FBG1_CLK0
FBG1_CLK0*
FBG_D<0..63>
FBG_D<0>
0
FBG_D<1>
1
FBG_D<2>
2
FBG_D<3>
3
FBG_D<4>
4
FBG_D<5>
5
FBG_D<6>
6
FBG_D<7>
7
FBG_D<8>
8
FBG_D<9>
9
FBG_D<10>
10
FBG_D<11>
11
FBG_D<12>
12
FBG_D<13>
13
FBG_D<14>
14
FBG_D<15>
15
FBG_D<16>
16
FBG_D<17>
17
FBG_D<18>
18
FBG_D<19>
19
FBG_D<20>
20
FBG_D<21>
21
FBG_D<22>
22
FBG_D<23>
23
FBG_D<24>
24
FBG_D<25>
25
FBG_D<26>
26
FBG_D<27>
27
FBG_D<28>
28
FBG_D<29>
29
FBG_D<30>
30
FBG_D<31>
31
FBG_D<32>
32
FBG_D<33>
33
FBG_D<34>
34
FBG_D<35>
35
FBG_D<36>
36
FBG_D<37>
37
FBG_D<38>
38
FBG_D<39>
39
FBG_D<40>
40
FBG_D<41>
41
FBG_D<42>
42
FBG_D<43>
43
FBG_D<44>
44
FBG_D<45>
45
FBG_D<46>
46
FBG_D<47>
47
FBG_D<48>
48
FBG_D<49>
49
FBG_D<50>
50
FBG_D<51>
51
FBG_D<52>
52
FBG_D<53>
53
FBG_D<54>
54
FBG_D<55>
55
FBG_D<56>
56
FBG_D<57>
57
FBG_D<58>
58
FBG_D<59>
59
FBG_D<60>
60
FBG_D<61>
61
FBG_D<62>
62
FBG_D<63>
63
FBG_DQM0
FBG_DQM1
FBG_DQM2
FBG_DQM3
FBG_DQM4
FBG_DQM5
FBG_DQM6
FBG_DQM7
FBG_DQS_RN0
FBG_DQS_RN1
FBG_DQS_RN2
FBG_DQS_RN3
FBG_DQS_RN4
FBG_DQS_RN5
FBG_DQS_RN6
FBG_DQS_RN7
FBG_DQS_WP0
FBG_DQS_WP1
FBG_DQS_WP2
FBG_DQS_WP3
FBG_DQS_WP4
FBG_DQS_WP5
FBG_DQS_WP6
FBG_DQS_WP7
FBG_CMD<14>
FBG_CMD<17>
FBG_CMD<7>
FBG_CMD<16>
FBG_CMD<21>
FBG_CMD<12>
FBG_CMD<5>
FBG_CMD<4>
FBG_CMD<3>
FBG_CMD<0>
FBG_CMD<2>
FBG_CMD<1>
FBG_CMD<19>
FBG_CMD<18>
FBG_CMD<9>
FBG_CMD<20>
FBG_CMD<15>
FBG_CMD<11>
FBG_CMD<8>
FBG_CMD<6>
FBG0_CLK0
FBG0_CLK0*
SNN_FBG_NC01
FBG_CMD<13>
R34
0402
5%
1K for Qimonda
0 for others
FBG_CMD<10>
GND
FBG_D<0>
FBG_D<1>
FBG_D<2> C10
FBG_D<3>
FBG_D<4>
FBG_D<5>
FBG_D<6>
FBG_D<7>
FBG_DQM0
FBG_DQS_RN0
FBG_DQS_WP0
FBG_D<16>
FBG_D<17>
FBG_D<18>
FBG_D<19>
FBG_D<20>
FBG_D<21>
FBG_D<22>
FBG_D<23>
FBG_DQM2
FBG_DQS_RN2
FBG_DQS_WP2
FBVDDQ
FBG_CMD<5>
FBG_CMD<4>
FBG_CMD<3>
FBG_CMD<0>
FBG_CMD<2>
FBG_CMD<1>
FBG_SEN1
0
CHANGED
GND
FBG_ZQ1
GND
FBVDDQ
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R831
243
1%
0402
COMMON
GND
C11
B11
B10
F11
G10
F10
E11
E10
D10
D11
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M3
L3
R3
R2
T3
M2
N2
T2
N3
P3
P2
FBG_D<8>
FBG_D<9>
FBG_D<10>
FBG_D<11>
FBG_D<12>
FBG_D<13>
FBG_D<14>
FBG_D<15>
FBG_DQM1
FBG_DQS_RN1
FBG_DQS_WP1
FBG_D<24>
FBG_D<25>
FBG_D<26>
FBG_D<27>
FBG_D<28>
FBG_D<29>
FBG_D<30>
FBG_D<31>
FBG_DQM3
FBG_DQS_RN3
FBG_DQS_WP3
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
M11
M10
L10
N11
R10
T10
T11
R11
N10
P10
P11
B3
C2
B2
C3
F3
E2
F2
G3
E3
D3
D2
SubPartition 0 Termination Balancing A2..A7
R769
121
1%
0402
COMMON
R768
121
1%
0402
COMMON
R767
121
1%
0402
COMMON
R791
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
R35
0402
GND
GND
FBG_VREF1
FBG_VREF2
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
COMMON
R786
121
1%
0402
COMMON
FBG_CMD<14>
FBG_CMD<17>
FBG_CMD<7>
FBG_CMD<16>
FBG_CMD<21>
FBG_CMD<12>
FBG_CMD<23>
FBG_CMD<24>
FBG_CMD<25>
FBG_CMD<28>
FBG_CMD<26>
FBG_CMD<27>
FBG_CMD<19>
FBG_CMD<18>
FBG_CMD<9>
FBG_CMD<20>
FBG_CMD<15>
FBG_CMD<11>
FBG_CMD<8>
FBG_CMD<6>
FBG1_CLK0
FBG1_CLK0*
SNN_FBG_NC04
FBG_CMD<13>
0
CHANGED
5%
1K for Qimonda
0 for others
FBG_CMD<10>
FBVDDQ
FBG_D<32>
FBG_D<33>
FBG_D<34>
FBG_D<35>
FBG_D<36>
FBG_D<37>
FBG_D<38>
FBG_D<39>
FBG_DQM4
FBG_DQS_RN4
FBG_DQS_WP4
FBG_D<48>
FBG_D<49>
FBG_D<50>
FBG_D<51>
FBG_D<52>
FBG_D<53>
FBG_D<54>
FBG_D<55>
FBG_DQM6
FBG_DQS_RN6
FBG_DQS_WP6
R780
121
1%
0402
COMMON
FBG_SEN2
FBG_ZQ2
GND
FBVDDQ
TERMINATION SELECT
FBG_CMD<6>
R823
10K
5%
0402
COMMON
SINGLE BANK
GND
FBG_CMD<10>
R771
10K
5%
0402
COMMON
GND
FBVDDQ
R819
511
1%
0402
COMMON
FBG_VREF1
R802
C1045
1.1K.1UF
1%
6.3V
0402
10%
CHANGED
X7R
0402
COMMON
C1047
.1UF
6.3V
10%
X7R
0402
COMMON
C1046
.1UF
6.3V
10%
X7R
0402
COMMON
C1049
.1UF
6.3V
10%
X7R
0402
COMMON
FBG0_CLK0_R
FBG0_CLK0
FBG0_CLK0*
FBG1_CLK0
FBG1_CLK0*
RESETCKE
FBG1_CLK0_R
R809
80.6
1%
0402
COMMON
R810
80.6
1%
0402
COMMON
FBVDDQ
R824
511
1%
0402
COMMON
FBG_VREF2
R812
1.1K
1%
0402
CHANGED
FBVDDQ
R821
511
1%
0402
COMMON
FBG_VREF3
R805
1.1K
1%
0402
CHANGED
FBVDDQ
R793
511
1%
0402
COMMON
FBG_VREF4
R815
1.1K
1%
0402
CHANGED
GND
GND
GND
GND
R797
80.6
1%
0402
COMMON
R798
80.6
1%
0402
COMMON
C1054
.01UF
16V
10%
X7R
0402
COMMON
GND
C1056
.01UF
16V
10%
X7R
0402
COMMON
GND
600-10897-0053-300 A
p897
misun
14 OF 41
31-DEC-2008
Page 15
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Decoupling: Memory Section A-D
Combined Distributed Capacitance
Banks A-D FBVDD/Q
280 uF
Decoupling for FBVDDQ
FBVDDQ
Partition A0
C682
C595
C80
C599
1UF
1UF
6.3V
10%
X5R
0402
COMMON
C654
.1UF
6.3V
10%
X7R
0402
COMMON
C670
.1UF
6.3V
10%
X7R
0402
COMMON
C675
1UF
6.3V
10%
X5R
0402
COMMON
C79
.1UF
6.3V
10%
0402
COMMON
C586
.1UF
6.3V
10%
X7R
0402
COMMON
1UF
6.3V
10%
X5R
0402
COMMON
C605
.1UF
6.3V
10%
X7R
0402
COMMON
C666
.1UF
6.3V
10%
X7R
0402
COMMON
C588
1UF
6.3V
10%
X5R
0402
COMMON
C78
.1UF
6.3V
10%
X7RX7R X7RX7R X7RX7R X7R
0402
COMMON
C89
.1UF
6.3V
10%
X7R
0402
COMMON
6.3V
10%
X5R
0402
COMMON
FBVDDQ
C82
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
C674
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
Partition B0
C592
1UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
C577
.1UF
6.3V
10%
0402
COMMON
FBVDDQ
C665
.1UF
6.3V
10%
X7R
0402
COMMON
1UF
6.3V
10%
X5R
0402
COMMON
C594
.1UF
6.3V
10%
X7R
0402
COMMON
C684
.1UF
6.3V
10%
X7R
0402
COMMON
C681
1UF
6.3V
10%
X5R
0402
COMMON
C601
.1UF
6.3V
10%
0402
COMMON
C609
.1UF
6.3V
10%
X7R
0402
COMMON
C683
1UF
6.3V
10%
X5R
0402
COMMON
C569
.1UF
6.3V
10%
X7R
0402
COMMON
C669
.1UF
6.3V
10%
X7R
0402
COMMON
C680
1UF
6.3V
10%
X5R
0402
COMMON
C565
.1UF
6.3V
10%
0402
COMMON
C92
.1UF
6.3V
10%
X7R
0402
COMMON
C686
1UF
6.3V
10%
X5R
0402
COMMON
C578
.1UF
6.3V
10%
X7R
0402
COMMON
C600
.1UF
6.3V
10%
X7R
0402
COMMON
C646
1UF
6.3V
10%
X5R
0402
COMMON
C551
.1UF
6.3V
10%
0402
COMMON
C657
4700PF
25V
10%
X7R
0402
COMMON
C598
.1UF
6.3V
10%
X7R
0402
COMMON
C83
.1UF
6.3V
10%
X7R
0402
COMMON
C572
.1UF
6.3V
10%
0402
COMMON
C604
4700PF
25V
10%
X7R
0402
COMMON
C567
.1UF
6.3V
10%
X7R
0402
COMMON
C574 C573
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C597
C596
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON COMMON
C563
.1UF
6.3V
10%
X7R
0402
COMMON
C571
C587
.1UF
.1UF
6.3V
6.3V
10%
10%
0402
0402
COMMON
COMMON
C590
C685
4700PF
4700PF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
change 5 caps to 4.7nf per SI
C671
.1UF
6.3V
10%
X7R
0402
COMMON
C642
.1UF
6.3V
10%
X7R
0402
COMMON
C593
.1UF
6.3V
10%
X7R
0402
COMMON
C81
.1UF
6.3V
10%
X7R
0402
COMMON
C667
.1UF
6.3V
10%
0402
COMMON
C591
4700PF
25V
10%
X7R
0402
COMMON
C699
10UF
10V
10%
X5R
0805
COMMON
C543
10UF
GND
10V
10%
X5R
0805
COMMON
C549
10UF
GND
10V
10%
X5R
0805
COMMON
GND
C541
10UF
10V
10%
X5R
0805
COMMON
C548
10UF
GND
10V
10%
X5RX7R X7R X7R X7R X7RX7R X7RX7R X7R
0805
COMMON
C696
10UF
GND
10V
10%
X5R
0805
COMMON
GND
FBVDDQ
Partition C0
C585
1UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
C561
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
C676
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
Partition D0
C707
1UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
C705
.1UF
6.3V
10%
0402
COMMON
FBVDDQ
C714
.1UF
6.3V
10% 10%
X7R
0402
COMMON
C607
C91
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C664C576
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C570
C662
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON COMMON
C703
C69
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON COMMON
C726
C720
.1UF
.1UF
6.3V
6.3V
10%
10%
0402
0402
COMMON COMMON
C711
C706
.1UF
.1UF
6.3V
6.3V
10%
X7R
X7R
0402
0402
COMMON
COMMON
C581
1UF
6.3V
10%
X5R
0402
COMMON
C583
.1UF
6.3V
10%
X7R
0402
COMMON
C86
.1UF
6.3V
10%
X7R
0402
COMMON
C744
1UF
6.3V
10%
X5R
0402
COMMON
C713
.1UF
6.3V
10%
0402
COMMON
C71
.1UF
6.3V
10%
X7R
0402
COMMON
C679
1UF
6.3V
10%
X5R
0402
COMMON
C77
.1UF
6.3V
10%
X7R
0402
COMMON
C584
.1UF
6.3V
10%
X7R
0402
COMMON
C756
1UF
6.3V
10%
X5R
0402
COMMON
C724
.1UF
6.3V
10%
0402
COMMON
C712
.1UF
6.3V
10%
X7R
0402
COMMON
C678
1UF
6.3V
10%
X5R
0402
COMMON
C677
C582
4700PF
4700PF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C663
C559
.01UF
.01UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
change 5 caps to 10nf per SI
change 5 caps to 4.7nf per SI
C778
1UF
6.3V
10%
X5R
0402
COMMON
C827
C793
.1UF
.1UF
6.3V
6.3V
10%
10%
0402
0402
COMMON
COMMON
C65
C777
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C76
4700PF
25V
10%
X7R
0402
COMMON
C603
.01UF
16V
10%
X7R
0402
COMMON
C66
.1UF
6.3V
10%
X7R X5RX7RX7RX7R
0402
COMMON
C67
.1UF
6.3V
10%
X7R
0402
COMMON
C546
.1UF
6.3V
10%
X7R
0402
COMMON
C602
4700PF
25V
10%
X7R
0402
COMMON
C580
.01UF
16V
10%
X7R
0402
COMMON
C812
.1UF
6.3V
10%
X7R
0402
COMMON
C758
.1UF
6.3V
10%
0402
COMMON
C734
.1UF
6.3V
10%
X7R
0402
COMMON
C575
.1UF
6.3V
10%
X7R
0402
COMMON
C668
4700PF
25V
10%
X7R
0402
COMMON
C672
.01UF
16V
10%
X7R
0402
COMMON
C745
.1UF
6.3V
10%
X7R
0402
COMMON
C749
.1UF
6.3V
10% 10%
0402
COMMON
C716
.1UF
6.3V
10%
X7R
0402
COMMON
C547
10UF
10V
10%
X5R
0805
COMMON
C644
10UF
10V
10%
X5R
0805
COMMON
C695
10UF
10V
10%
X5R
0805
COMMON
C701
10UF
10V
10%
X5R
0805
COMMON
C698
10UF
10V
0805
COMMON
GND
GND
GND
GND
GND
GND
Decoupling for FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
Partition A0
C612
C88
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C568
C693
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
Partition B0
C690
C673
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C610
C564
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C566
1UF
6.3V
10%
X5R
0402
COMMON
C694
1UF
6.3V
10%
X5R
0402
COMMON
C656
1UF
6.3V
10%
X5R
0402
COMMON
C87
1UF
6.3V
10%
X5R
0402
COMMON
C691
1UF
6.3V
10%
X5R
0402
COMMON
C658
1UF
6.3V
10%
X5R
0402
COMMON
C562
1UF
6.3V
10%
X5R
0402
COMMON
C689
1UF
6.3V
10%
X5R
0402
COMMON
C629
.1UF
6.3V
10%
X7R
0402
COMMON
C613
.1UF
6.3V
10%
X7R
0402
COMMON
C555
.1UF
6.3V
10%
X7R
0402
COMMON
C589
.1UF
6.3V
10%
X7R
0402
COMMON
C661
.1UF
6.3V
10%
X7R
0402
COMMON
C692
.1UF
6.3V
10%
X7R
0402
COMMON
C650
.1UF
6.3V
10%
X7R
0402
COMMON
C628
.1UF
6.3V
10%
X7R
0402
COMMON
C652
.1UF
6.3V
10%
X7R
0402
COMMON
C659
.1UF
6.3V
10%
X7R
0402
COMMON
C615
.1UF
6.3V
10%
X7R
0402
COMMON
C554
.1UF
6.3V
10%
X7R
0402
COMMON
C653
C557
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
04020402
COMMON COMMON
C630
C556
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C651
C660
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C84
C643
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C617
.1UF
6.3V
10%
X7R
0402
COMMON
C618
.1UF
6.3V
10%
X7R
0402
COMMON
C627
.1UF
6.3V
10%
X7R
0402
COMMON
C616
.1UF
6.3V
10%
X7R
0402
COMMON
C544
10UF
10V
10%
X5R
0805
COMMON
C550
10UF
10V
10%
X5R
0805
COMMON
C540
10UF
10V
10%
X5R
0805
COMMON
C542
10UF
10V
10%
X5R
0805
COMMON
GND
GND
GND
GND
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
Partition C0
C648
1UF
6.3V
10%
X5R
0402
COMMON
C560
1UF
6.3V
10%
X5R
0402
COMMON
C558 C655
1UF
6.3V
10%
X5R
0402 0402
COMMON
C90
1UF
6.3V
10%
X5R
0402
COMMON
1UF
6.3V
10%
X5R
COMMON
C687
1UF
6.3V
10%
X5R
0402
COMMON
C688
1UF
6.3V
10%
X5R
0402
COMMON
C606
1UF
6.3V
10%
X5R
0402
COMMON
Partition D0
C719
C64
C729
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C760
C806
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Decoupling: Memory Section A-D
1UF
6.3V
10%
X5R
0402
COMMON
C790
1UF
6.3V
10%
X5R
0402
COMMON
C710
1UF
6.3V
10%
X5R
0402
COMMON
C763
1UF
6.3V
10%
X5R
0402
COMMON
www.vinafix.vn
C645
.1UF
6.3V
10%
X7R
COMMON
C626
.1UF
6.3V
10%
X7R
0402
COMMON
C708
.1UF
6.3V
10%
X7R
0402
COMMON
C70
.1UF
6.3V
10%
X7R
0402
COMMON
C75
.1UF
6.3V
10%
X7R
04020402
COMMON
C552
.1UF
6.3V
10%
X7R
0402
COMMON
C826
.1UF
6.3V
10%
X7R
0402
COMMON
C813
.1UF
6.3V
10%
X7R
0402
COMMON
C625
.1UF
6.3V
10%
X7R
0402
COMMON
C647
.1UF
6.3V
10%
X7R
0402
COMMON
C723
.1UF
6.3V
10%
X7R
0402
COMMON
C735
.1UF
6.3V
10%
X7R
0402
COMMON
C85
.1UF
6.3V
10%
X7R
0402
COMMON
C614
.1UF
6.3V
10%
X7R
0402
COMMON
C743
.1UF
6.3V
10%
X7R
0402
COMMON
C718
.1UF
6.3V
10%
X7R
0402
COMMON
C553
.1UF
6.3V
10%
X7R
0402
COMMON
C649
.1UF
6.3V
10%
X7R
0402
COMMON
C742
.1UF
6.3V
10%
X7R
0402
COMMON
C757
.1UF
6.3V
10%
X7R
0402
COMMON
C579
.1UF
6.3V
10%
X7R
0402
COMMON
C622
.1UF
6.3V
10%
X7R
0402
COMMON
C721
.1UF
6.3V
10%
X7R
0402
COMMON
C725
.1UF
6.3V
10%
X7R
0402
COMMON
C539
10UF
10V
10%
X5R
0805
COMMON
C545
10UF
10V
10%
X5R
0805
COMMON
C995
10UF
10V
10%
X5R
0805
COMMON
C73
10UF
10V
10%
X5R
0805
COMMON
GND
GND
GND
GND
600-10897-0053-300 A
p897
misun
15 OF 41
31-DEC-2008
Page 16
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Decoupling: Memory Section E-G
Combined Distributed Capacitance
Banks E-G FBVDD/Q
210 uF
Decoupling for FBVDDQ
FBVDDQ
Partition E0
C968
C868
C980
C62
1UF
1UF
6.3V
10%
X5R
0402
COMMON
C838
.1UF
6.3V
10%
X7R
0402
COMMON
C947
.1UF
6.3V
10%
X7R
0402
COMMON
C1021
1UF
6.3V
10%
X5R
0402
COMMON
C1097
.1UF
6.3V
10%
0402
COMMON
C1068
.1UF
6.3V
10%
X7R
0402
COMMON
1UF
6.3V
10%
X5R
0402
COMMON
C61
.1UF
6.3V
10%
X7R
0402
COMMON
C929
.1UF
6.3V
10%
X7R
0402
COMMON
C1071
1UF
6.3V
10%
X5R
0402
COMMON
C42
.1UF
6.3V
10%
X7R X7R X7RX7RX7R X7RX7R
0402
COMMON
C43
.1UF
6.3V
10%
X7R
0402
COMMON
6.3V
10%
X5R
0402
COMMON
FBVDDQ
C905
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
C822
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
Partition F0
C1075
1UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
C1076
.1UF
6.3V
10%
0402
COMMON
FBVDDQ
C1093
.1UF
6.3V
10%
X7R
0402
COMMON
1UF
6.3V
10%
X5R
0402
COMMON
C946
.1UF
6.3V
10%
X7R
0402
COMMON
C898
.1UF
6.3V
10%
X7R
0402
COMMON
C48
1UF
6.3V
10%
X5R
0402
COMMON
C1007
.1UF
6.3V
10%
0402
COMMON
C1077
.1UF
6.3V
10%
X7R
0402
COMMON
C63
1UF
6.3V
10%
X5R
0402
COMMON
C944
.1UF
6.3V
10%
X7R
0402
COMMON
C907
.1UF
6.3V
10%
X7R
0402
COMMON
C1023
1UF
6.3V
10%
X5R
0402
COMMON
C1078
.1UF
6.3V
10%
0402
COMMON
C1018
.1UF
6.3V
10%
X7R
0402
COMMON
C963
1UF
6.3V
10%
X5R
0402
COMMON
C975
.1UF
6.3V
10%
X7R
0402
COMMON
C990
4700PF
25V
10%
X7R
0402
COMMON
C970
.1UF
6.3V
10%
X7R
0402
COMMON
C989
4700PF
25V
10%
X7R
0402
COMMON
C977
.1UF
6.3V
10%
X7R
0402
COMMON
C984C60
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C961
C979
4700PF
4700PF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON COMMON
change 5 caps to 4.7nf per SI
C1011
1UF
6.3V
10%
X5R
0402
COMMON
C50
.1UF
6.3V
10%
0402
COMMON
C1003
.01UF
16V
10%
X7R
0402
COMMON
C1004
.1UF
6.3V
10%
0402
COMMON
C1079
.01UF
16V
10%
X7R
0402
COMMON
C1109
.1UF
6.3V
10%
X7R
0402
COMMON
C1096
C1064
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R X7RX7R X5R
0402
0402
COMMON
COMMON
C1090
C1074
.01UF
.01UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
change 5 caps to 10nf per SI
C988
.1UF
6.3V
10%
X7R
0402
COMMON
C58
.1UF
6.3V
10%
X7R
0402
COMMON
C964
4700PF
25V
10%
X7R
0402
COMMON
C1089
.1UF
6.3V
10%
X7R
0402
COMMON
C1088
.1UF
6.3V
10%
0402
COMMON
C1026
.01UF
16V
10%
X7R
0402
COMMON
C850
10UF
10V
10%
X5R
0805
COMMON
C74
10UF
10V
10%
X5R
0805
COMMON
C992
10UF
10V
10%
X5R
0805
COMMON
C1107
10UF
10V
10%
X5R
0805
COMMON
C1110
10UF
10V
10%
0805
COMMON
C1115
10UF
10V
10%
X5R
0805
COMMON
GND
GND
GND
GND
GND
GND
FBVDDQ
Partition G0
C1013
1UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
C1092
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
C1094
.1UF
6.3V
10%
X7R
0402
COMMON
C52
C1080
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C1065 C1025
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C53
C1009
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON COMMON
C1084
1UF
6.3V
10%
X5R
0402
COMMON
C1087
.1UF
6.3V
10%
X7R
0402
COMMON
C1081
.1UF
6.3V
10%
X7R
0402
COMMON
C1012
1UF
6.3V
10%
X5R
0402
COMMON
C1082
.1UF
6.3V
10%
X7R
0402
COMMON
C1069
.1UF
6.3V
10%
X7R
0402
COMMON
C41
1UF
6.3V
10%
X5R
0402
COMMON
C54
.1UF
6.3V
10%
X7R
0402
COMMON
C1040
.1UF
6.3V
10%
X7R
0402
COMMON
C1085
.1UF
6.3V
10%
X7R
0402
COMMON
C1083
.1UF
6.3V
10%
X7R
0402
COMMON
C1086
.1UF
6.3V
10%
X7R
0402
COMMON
C1022
.1UF
6.3V
10%
X7R
0402
COMMON
C1066
.1UF
6.3V
10%
X7R
0402
COMMON
C55
.1UF
6.3V
10%
X7R
0402
COMMON
C1072
.1UF
6.3V
10%
X7R
0402
COMMON
C1101
.1UF
6.3V
10%
X7R
0402
COMMON
C40
.1UF
6.3V
10%
X7R
0402
COMMON
C1091
.1UF
6.3V
10%
X7R
0402
COMMON
C1112
10UF
10V
10%
X5R
0805
COMMON
C1111
10UF
10V
10%
X5R
0805
COMMON
C1114
10UF
10V
10%
X5R
0805
COMMON
GND
GND
GND
Decoupling for FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
Partition E0
C973
C976
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C933
C917
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
Partition F0
C1034
C1098
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C51
C1100
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C892
1UF
6.3V
10%
X5R
0402
COMMON
C972
1UF
6.3V
10%
X5R
0402
COMMON
C1067
1UF
6.3V
10%
X5R
0402
COMMON
C1020
1UF
6.3V
10%
X5R
0402
COMMON
C918
1UF
6.3V
10%
X5R
0402
COMMON
C983
1UF
6.3V
10%
X5R
0402
COMMON
C1106
1UF
6.3V
10%
X5R
0402
COMMON
C1099
1UF
6.3V
10%
X5R
0402
COMMON
C945
.1UF
6.3V
10%
X7R
0402
COMMON
C891
.1UF
6.3V
10%
X7R
0402
COMMON
C1027
.1UF
6.3V
10%
X7R
0402
COMMON
C1060
.1UF
6.3V
10%
X7R
0402
COMMON
C985
.1UF
6.3V
10%
X7R
0402
COMMON
C981
.1UF
6.3V
10%
X7R
0402
COMMON
C1051
.1UF
6.3V
10%
X7R
0402
COMMON
C1033
.1UF
6.3V
10%
X7R
0402
COMMON
C59
.1UF
6.3V
10%
X7R
0402
COMMON
C877
.1UF
6.3V
10%
X7R
0402
COMMON
C1039
.1UF
6.3V
10%
X7R
0402
COMMON
C1010
.1UF
6.3V
10%
X7R
0402
COMMON
C930
.1UF
6.3V
10%
X7R
COMMON
C969
.1UF
6.3V
10%
X7R
0402
COMMON
C46
.1UF
6.3V
10%
X7R
0402
COMMON
C1037
.1UF
6.3V
10%
X7R
0402
COMMON
C867
.1UF
6.3V
10%
X7R
04020402
COMMON
C932
.1UF
6.3V
10%
X7R
0402
COMMON
C1062
.1UF
6.3V
10%
X7R
0402
COMMON
C1050
.1UF
6.3V
10%
X7R
0402
COMMON
C965
.1UF
6.3V
10%
X7R
0402
COMMON
C916
.1UF
6.3V
10%
X7R
0402
COMMON
C1031
.1UF
6.3V
10%
X7R
0402
COMMON
C1038
.1UF
6.3V
10%
X7R
0402
COMMON
C57
10UF
10V
10%
X5R
0805
COMMON
C72
10UF
10V
10%
X5R
0805
COMMON
C1016
10UF
10V
10%
X5R
0805
COMMON
GND
GND
GND
GND
FBVDDQ
FBVDDQ
Partition G0
C1103
C1008 C1017
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402 0402
COMMON
COMMON COMMON
C1104
C1005
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Decoupling: Memory Section E-G
1UF
6.3V
10%
X5R
C1006
1UF
6.3V
10%
X5R
0402
COMMON
C1035
1UF
6.3V
10%
X5R
0402
COMMON
C1102
1UF
6.3V
10%
X5R
0402
COMMON
www.vinafix.vn
C1029
C1063
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402 0402
COMMON
COMMON
C44
C45
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C1030
.1UF
6.3V
10%
X7R
0402
COMMON
C1059
.1UF
6.3V
10%
X7R
0402
COMMON
C1041
.1UF
6.3V
10%
X7R
0402
COMMON
C1053
.1UF
6.3V
10%
X7R
0402
COMMON
C1028
.1UF
6.3V
10%
X7R
0402
COMMON
C1032
.1UF
6.3V
10%
X7R
0402
COMMON
C1105
.1UF
6.3V
10%
X7R
0402
COMMON
C1052
.1UF
6.3V
10%
X7R
0402
COMMON
C998
10UF
10V
10%
X5R
0805
COMMON
C1113
10UF
10V
10%
X5R
0805
COMMON
GND
GND
600-10897-0053-300 A
p897
misun
16 OF 41
31-DEC-2008
Page 17
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Decoupling: GPU (NVVDD, FBVDDQ)
Decoupling for NVVDD (under GPU)
C846
.1UF
6.3V
10%
X7R
0402
COMMON
GND
GPU - NVVDD
NVVDD
6 x 4700pF 0402
C871
4700PF
25V
10%
X7R
0402
COMMON
NVVDD
10 x 10nF 0402
C880
.01UF
16V
10%
X7R
0402
COMMON
NVVDD
10 x 22nF 0402
C911
.022UF
16V
10%
X7R
0402
COMMON
NVVDD
5 x 47nF 0402
C802
.047UF
16V
10%
X7R
0402
COMMON
NVVDD
22 x 0.1uF 0402
C904
.1UF
6.3V
10%
X7R
0402
COMMON
C773
4700PF
25V
10%
X7R
0402
COMMON
C879
.01UF
16V
10%
X7R
0402
COMMON
C836
.022UF
16V
10%
X7R
0402
COMMON
C828
.047UF
16V
10%
X7R
0402
COMMON
C853
.1UF
6.3V
10%
X7R
0402
COMMON
C903
4700PF
25V 25V
10%
X7R
0402
COMMON
C856
.01UF
16V
10%
X7R
0402
COMMON
.022UF
16V
10%
X7R
0402
COMMON
C887
.047UF
16V
10%
X7R
0402
COMMON
C834
.1UF
6.3V
10%
X7R
0402
COMMON
C878 C775
4700PF
4700PF
25V
10%
10%
X7R
X7R
0402
0402
COMMON COMMON
C766
C808
.01UF
.01UF
16V16V
10%
10%
X7R
X7R
0402
0402
COMMON COMMON
C912C844 C800
.022UF
.022UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
C774
C854
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
C811
C785
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C809
4700PF
25V
10%
X7R
0402
COMMON
GND
C914
C783 C765
.01UF
.01UF
16V
16V 16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C780
C889
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
Combined Distributed Capacitance
C835
.01UF
16V 16V
10%
X7R
0402
COMMON
GND
C870
.1UF
6.3V
10%
X7R
0402
COMMON
C810
.01UF
10%
X7R
0402
COMMON
C901
.1UF
6.3V
10%
X7R
0402
COMMON
C821
.1UF
6.3V
10%
X7R
0402
COMMON
.01UF
10%
X7R
0402
COMMON
C833
.1UF
6.3V
10%
X7R
0402
COMMON
C848
C869
C819
C764
.1UF
6.3V
10%
X7R
0402
COMMON
NVVDD
5 x 0.47uF 0402
C845
.47UF
6.3V
10%
X5R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C803
.47UF
6.3V
10%
X5R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C895
.47UF
6.3V
10%
X5R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C801
.47UF
6.3V
10%
X5R
COMMON
C888
.1UF
6.3V
10%
X7R
0402
COMMON
C913
.47UF
6.3V
10%
X5R
04020402
COMMON
C784
.1UF
6.3V
10%
X7R
0402
COMMON
C855
.1UF
6.3V
10%
X7R
0402
COMMON
C820
.1UF
6.3V
10%
X7R
0402
COMMON
C881
.1UF
6.3V
10%
X7R
0402
COMMON
C849
.1UF
6.3V
10%
X7R
0402
COMMON
GND
Decoupling for FBVDDQ (under GPU)
Combined Distributed Capacitance
FBVDDQ
8 x 0.1uF 0402
C902
C882
C753
C739
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
10 x 1uF 0402
C866
1UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
20 x 0.47uF 0402
C736
.47UF
6.3V
10%
X5R
0402
COMMON
C894
.47UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
5 x 4.7uF 0603
C951
4.7UF
6.3V
10%
X5R
0603
COMMON
FBVDDQ
9 x 10uF 0805
C954
10UF
10V
10%
X5R
0805
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C863
1UF
6.3V
10%
X5R
0402
COMMON
C799
.47UF
6.3V
10%
X5R
0402
COMMON
C950
.47UF
6.3V
10%
X5R
0402
COMMON
C941
4.7UF
6.3V
10%
X5R
0603
COMMON
C697
10UF
10V
10%
X5R
0805
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C755
1UF
6.3V
10%
X5R
0402
COMMON
C920
.47UF
6.3V
10%
X5R
0402
COMMON
C928
.47UF
6.3V
10%
X5R
0402
COMMON
C937
4.7UF
6.3V
10%
X5R
0603
COMMON
C762
10UF
10V
10%
X5R
0805
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C740
1UF
6.3V
10%
X5R
0402
COMMON
C943
.47UF
6.3V
10%
X5R
0402
COMMON
C952
.47UF
6.3V
10%
X5R
0402
COMMON
C728
4.7UF
6.3V
10%
X5R
0603
COMMON
C967
10UF
10V
10%
X5R
0805
COMMON
C741
.1UF
6.3V
10%
X7R
0402
COMMON
C737
1UF
6.3V
10%
X5R
0402
COMMON
C843
.47UF
6.3V
10%
X5R
0402
COMMON
C797
.47UF
6.3V
10%
X5R
0402
COMMON
C807
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
C750
10UF
10V
10%
X5R
0805
COMMON
C940
.1UF
6.3V
10%
X7R
0402
COMMON
C746
1UF
6.3V
10%
X5R
0402
COMMON
C927
.47UF
6.3V
10%
X5R
0402
COMMON
C752
.47UF
6.3V
10%
X5R
0402
COMMON
C939
10UF
10V
10%
X5R
0805
COMMON
C926
.1UF
6.3V
10%
X7R
0402
COMMON
C823
1UF
6.3V
10%
X5R
0402
COMMON
C805
.47UF
6.3V
10%
X5R
0402
COMMON
C727
.47UF
6.3V
10%
X5R
0402
COMMON
C1000
10UF
10V
10%
X5R
0805
COMMON
C925
.1UF
6.3V
10%
X7R
0402
COMMON
GND
C923
C771
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C875
C857
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C733
C924
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C999
C700
10UF
10UF
10V
10V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
GND
GPU - FBVDD/Q
230 uF
C782
1UF
6.3V
10%
X5R
0402
COMMON
GND
C949
.47UF
6.3V
10%
X5R
0402
COMMON
GND
C948
.47UF
6.3V
10%
X5R
0402
COMMON
GND
C816
22UF
20%
X5R
0805
CHANGED
C886
22UF
20%
X5R
0805
CHANGED
GND
C862
22UF
20%
X5R
0805
CHANGED
C841
22UF
6.3V6.3V
20%
X5R
0805
CHANGED
C840 C796
22UF
22UF 22UF
20%
20%
X5R
X5R
0805
0805
CHANGED
CHANGED
C768
C709
22UF
10UF
6.3V
20%
10%
X5R
X5R
0805
0805
CHANGED
COMMON
C794
C815
C885
22UF
6.3V6.3V6.3V 6.3V6.3V10V
20%
X5R
0805
CHANGED
C861
22UF
6.3V10V
20%
X5R
0805
CHANGED
22UF
6.3V 6.3V6.3V 6.3V
20%
20%
X5R
X5R
0805
0805
CHANGED
CHANGED
C770
C769
22UF
22UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
CHANGED
CHANGED
GND
C860
22UF
20%
X5R
0805
CHANGED
C909
22UF
20%
X5R
0805
CHANGED
GND
NVVDD
22 x 10uF 0805
C795
C814
22UF
6.3V
20%
X5R
0805
CHANGED
C910
22UF
6.3V
20%
X5R
0805
CHANGED
C702
10UF
10%
X5R
0805
COMMON
C884
22UF
6.3V
20%
X5R
0805
CHANGED
22UF
6.3V
20%
X5R
0805
CHANGED
C908
22UF
6.3V
20%
X5R
0805
CHANGED
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Decoupling: GPU (NVVDD, FBVDDQ)
www.vinafix.vn
600-10897-0053-300 A
p897
misun
17 OF 41
31-DEC-2008
Page 18
1/17 GV-INTERFACE
LDT_VDDQ
LDT_VDDQ
LDT_VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
PLL_GV_VDD
PLL_GV_AVDD
PMC_ISO_RESET
XTAL_OUT_BUF
GVDR_RX_RSET_GND
GVDR_TX_RSET_GND
GV_RX1
GV_RX1
GV_RX0
GV_RX0
GV_RX2
GV_RX5
GV_RX4
GV_RX4
GV_RX3
GV_RX3
GV_RX2
GV_RX5
GV_RX8
GV_RX8
GV_RX7
GV_RX7
GV_RX6
GV_RX6
GV_RX12
GV_RX11
GV_RX11
GV_RX10
GV_RX10
GV_RX9
GV_RX9
GV_RX12
GV_RX15
GV_RX15
GV_RX14
GV_RX14
GV_RX13
GV_RX13
GV_RX18
GV_RX18
GV_RX17
GV_RX17
GV_RX16
GV_RX16
GV_RX19
GV_RXCTL
GV_RXCTL
GV_RXCLK
GV_RXCLK
GV_RX19
GV_TX3
GV_TX2
GV_TX2
GV_TX1
GV_TX1
GV_TX0
GV_TX0
GV_TX3
GV_TXCTL
GV_TXCTL
GV_TXCLK
GV_TXCLK
BUFRST
HOT_RESET
12/21 GV Bus
GV_TX0
GV_TX0
GV_TX1
GV_TX1
GV_TX2
GV_TX2
GV_TX9
GV_TX8
GV_TX8
GV_TX7
GV_TX7
GV_TX6
GV_TX6
GV_TX5
GV_TX5
GV_TX4
GV_TX4
GV_TX3
GV_TX3
GV_TX15
GV_TX15
GV_TX14
GV_TX14
GV_TX13
GV_TX13
GV_TX12
GV_TX12
GV_TX11
GV_TX11
GV_TX10
GV_TX10
GV_TX9
GV_TX16
GV_TXCTL
GV_TXCTL
GV_TXCLK
GV_TXCLK
GV_TX19
GV_TX19
GV_TX18
GV_TX18
GV_TX17
GV_TX17
GV_TX16
GV_RX0
PMC_ISO_RESET
GV_RXCTL
GV_RXCTL
GV_RXCLK
GV_RXCLK
GV_RX3
GV_RX3
GV_RX2
GV_RX0
GV_RX1
GV_RX1
GV_RX2
BUFCLK_LDT_IN
HOT_RESET
PEX_PWR_GOOD
GV_IO_VDDQ
GV_IO_VDDQ
GV_IO_VDDQ
GV_IO_VDDQ
GV_IO_VDDQ
GV_IO_VDDQ
GV_IO_VDDQ
GV_PLL_AVDD
GV_RX_RSET_VDD
GV_TX_RSET_GND
NV_SS_REFCLK
NV_SS_REFCLK
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
2/17 CLOCK OUT
GPU_CLK
GPU_CLK
FB_CLK0
FB_CLK0
FB_CLK1
FB_CLK1
FB_CLK3
FB_CLK3
FB_CLK2
FB_CLK2
PLL_SP_AVDD
CLK_RSET_GND
PLL_SP_MON_OUT
PLL_V_VDD
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
GV_TX0
GV_TX0
GV_TX1
GV_TX1
GV_TX2
GV_TX2
GV_TX3
GV_TX3
GV_TX4
GV_TX4
GV_TX5
GV_TX5
GV_TX6
GV_TX6
GV_TX7
GV_TX7
GV_TX8
GV_TX8
GV_TX9
GV_TX9
GV_TX10
GV_TX10
GV_TX11
GV_TX11
GV_TX12
GV_TX13
GV_TX13
GV_TX14
GV_TX14
GV_TX15
GV_TX15
GV_TX16
GV_TX16
GV_TX17
GV_TX17
GV_TX18
GV_TX18
GV_TX19
GV_TX19
GV_TXCTL
GV_TXCTL
GV_TXCLK
GV_TXCLK
replace existing vias with labtestpoints
GV_RX0
GV_RX0
GV_RX1
GV_RX1
GV_RX2
GV_RX2
GV_RX3GV_RX3BK14
GV_RX3
GV_RXCTL
GV_RXCTL
GV_RXCLK
GV_RXCLK
replace existing vias with labtestpoints
1
50OHM
1
50OHM
1
50OHM
1
50OHM
GV_TX0BK24
GV_TX0*
BJ24
GV_TX1
BJ23
GV_TX1*
BK23
GV_TX2
BL22
GV_TX2*
BM22
GV_TX3
BK21
GV_TX3*
BJ21
GV_TX4
BM20
GV_TX4*
BM21
GV_TX5
BK20
GV_TX5*
BL20
GV_TX6
BN21
GV_TX6*
BN20
GV_TX7
BR20
GV_TX7*
BR21
GV_TX8
BL19
GV_TX8*
BM19
GV_TX9
BN19
GV_TX9*
BP20
GV_TX10
BM17
GV_TX10*
BM18
GV_TX11
BR17
GV_TX11*
BR18
GV_TX12 GV_TX12BN17
GV_TX12*
BN18
GV_TX13
BN16
GV_TX13*
BP17
GV_TX14
BM14
GV_TX14*
BM15
GV_TX15
BN13
GV_TX15*
BP14
GV_TX16
BN14
GV_TX16*
BN15
GV_TX17
BR11
GV_TX17*
BR12
GV_TX18
BL13
GV_TX18*
BM13
GV_TX19
BN10
GV_TX19*
BP11
GV_TXCTL
BR14
GV_TXCTL*BR15
GV_TXCLK
BL16
GV_TXCLK*
BM16
GV_RX0
BN11
GV_RX0*
BN12
GV_RX1
BK15
GV_RX1*
BJ15
GV_RX2
BL10
GV_RX2*
BM10
GV_RX3*
BL14
GV_RXCTL
BK17
GV_RXCTL*BL17
GV_RXCLK
BM11
GV_RXCLK*
BM12
GPU_PMC_ISO_RESET*
BG26
GPU_HOT_RESET*
BK27
GPU_PEX_PWR_GOOD*
BL26
GPU_BUFCLK_LDT_IN
BJ26
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
GPU-NVIO Interconnect: GV Bus / PLL
www.vinafix.vn
90DIFF
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
90DIFF 1
190DIFF
190DIFF
1
190DIFF
190DIFF
190DIFF
1
190DIFF AB24
190DIFF
190DIFF
190DIFF
190DIFF
1
190DIFF
190DIFF
190DIFF
190DIFF
1
190DIFF
190DIFF
190DIFF R25
190DIFF
.1UF
6.3V
10%
0402
COMMON
GND
C896
4.7UF
10%
X5R
0603
COMMON
C851C847
.1UF
6.3V
10%
X7RX7R
0402
COMMON
C872
.1UF
6.3V
10%
X7R X7R
0402
COMMON
12MIL
GV_PLLAVDD
C900
1UF
6.3V 6.3V
10%
X5R
0402
COMMON
GND
1.15V
GND
C837
.1UF
6.3V
10%
0402
COMMON
C893
.1UF
10%
X7R
0402
COMMON
BE16
BE23
BE26
BG20
BG23
BH17
BH23
BK18
G1
G200-100-B1
BGA2236
COMMON
GPU-NVIO Interconnect: GV Bus / PLL
1V15
C873
C899
C876
C68
C883
C953
C957
10UF
10V
10%
X5R
COMMON
10UF
10V
10%
X5R
08050805
COMMON
4.7UF
6.3V
10%
X5R X5R
0603 0603
COMMON
4.7UF
6.3V
10%
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
1V15
GND
GND
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
LB504
BEAD_0402
C915
1UF
6.3V 6.3V
10%
X5R
0402
COMMON
240R@100MHz
COMMON
3V3
LB515
1UF
6.3V
10%
X5R
0402
COMMON
GND
1V15
LB506
BEAD_0402
C1121
1UF
6.3V
10%
X5R
0402
COMMON
GND
240R@100MHz
COMMONBEAD_0402
240R@100MHz
COMMON
12MIL
NVIO_PLLVDD
C1221 C1223C1225C1230
.1UF
1UF
1UF
6.3V
10%
X5R
0402
COMMON
6.3V
10%
X5R
0402
COMMON
6.3V
10%
X7R
0402
COMMON
12MIL
C1129 C1131 C1134
1UF
6.3V
10%
X5R
0402
COMMON
1UF
6.3V
10%
X5R
0402
.1UF
6.3V
10%
X7R
0402
COMMONCOMMON
3.3V
1.15V
C1219
.01UF
16V
10%
X7R
0402
COMMON
C1141
.01UF
16V
10%
X7R
0402
COMMON
P4
H24NVIO_SP_PLLVDD
U2
NVIO2-P-A2
BGA533
COMMON
1V15
R745
150
1%
0402
COMMON
GV_RX_RSET_VDD
GV_TX_RSET_GND
R737
150
1%
0402
COMMON
GND
replace existing vias with labtestpoints
NET_NAME
GPU_CLKM26
GPU_CLK*
L26
FBAB_REFCLK
N24
FBAB_REFCLK*
N25
FBEF_REFCLK
M23
FBEF_REFCLK*
M22
FBCD_REFCLK
M25
FBCD_REFCLK*
M24
FBGH_REFCLK
N22
FBGH_REFCLK*N23
SNN_NVIO_PLL_SP_MON_OUT
K22
NVIO_CLK_RSET_GND
J22
GND
GPU_CLK
GPU_CLK
FBAB_REFCLK
FBAB_REFCLK
FBEF_REFCLK
FBEF_REFCLK
FBCD_REFCLK
FBCD_REFCLK
FBGH_REFCLK
FBGH_REFCLK
R864
1.5K
1%
0402
COMMON
NV_IMPDIFF_PAIR
90DIFF 1
90DIFF 1 BC19
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF 1
BJ17
BL23
BC20
1
4.3C<
1
4.3C<
1
6.3C<
1
6.3C<
1
5.3C<
1
5.3C<
1
7.3C<
7.3C<
AG22
AG21
AG25
AG24
AF23
AF22
AD21
AD20
AG26
AF26
AE27
AF27
AE24
AE25
AD23
AD22
AE21
AE22
AD25
AD24
AD26
AC26
AA27
AB27
AB25
AA23
AA22
AA26
AA25
AA24
AB22
AB23
AB19
AF20
Y26
V27
W27
W24
W25
V23
V22
W22
W23
V25
V24
T24
T25
R23
R22
T22
T23
R24
R27
T27
V26
U26
N27
K25
U2
NVIO2-P-A2
BGA533
COMMON
R19
T19
U19
J13
J15
L11
L12
L13
L14
L15
L16
L17
M11
M12
M14
M17
N17
R11
T11
T14
T16
T17
U11
U12
U13
U14
U15
U16
U17
W13
W15
J10
J18
K19
K9
V19
V9
W10
W18
NVIO_GVDR_RX_RSET_GND
P26
NVIO_GVDR_TX_RSET_GND
R26
NVIO_GV_PLLVDD
L24
NVIO_GV_PLLAVDD
P24
12MIL
12MIL
3.3V
1.15V
1V15
C1149
C1148
.1UF
6.3V
10%
X7R
0402
COMMON
C1147
.1UF
6.3V
10%
X7R
0402
COMMON
C1162
.1UF
6.3V
X7R X7R
0402
COMMON
C1161
.1UF
6.3V
10%10%
0402
COMMON
C1165
1UF
6.3V
10%
X5R
0402
COMMON
1UF
6.3V
10%
X5R
0402
COMMON
GND
1V15
C1122
C1164
.1UF
6.3V
10%
X7R
0402
COMMON
C1167
.1UF
6.3V
10%
X7R
0402
COMMON
C1175
.1UF
6.3V
10%
X7R
0402
COMMON
C1192
.1UF
6.3V
10%
X7R
0402
COMMON
C1163
.1UF
6.3V
10%
X7R
0402
COMMON
GND
C1160
.1UF
6.3V
10%
COMMON
C1183
.1UF
6.3V
10%
X7RX7R
04020402
COMMON
C1182
.1UF
6.3V
10%
X7R X7RX7R
0402
COMMON
C1168
.1UF
6.3V
10%
COMMON
C1176
.1UF
6.3V
10%
04020402
COMMON
C1169
1UF
6.3V
10%
X5R
0402
COMMON
1V15
C1191
1UF
6.3V
10%
X5R X5R
0402
4.7UF
6.3V
10%
X5R
0603
COMMON
C1138
4.7UF
6.3V
10%
0603
COMMONCOMMON
GND
3V3
C1158
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
GND
49.9
R849
COMMON
0402
1%
150
R846
COMMON
0402
1%
C1140
.01UF
16V
10%
X7R
0402
COMMON
C1136
.1UF
6.3V
10%
X7R
0402
COMMON
GND
C1130
1UF
6.3V
10%
X5R
0402
COMMON
LB508
BEAD_0402
C1133
1UF
6.3V
10%
X5R
0402
COMMON
240R@100MHz
COMMON
GND
C1142
.1UF
.01UF
6.3V
16V
10% 10%10% 10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
1UF
6.3V
X5R
0402
COMMON
1UF
6.3V
X5R
0402
COMMON
LB507
BEAD_0402
C1132
C1128
C1135
240R@100MHz
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C1127
1UF
6.3V
10%
X5R
0402
COMMON
C1126
1UF
6.3V
X5R
0402
COMMON
1UF
6.3V
10%
X5R
0402
COMMON
3V3
1V15
C1159
C1145
C1156
C1155
C1188
C1190
C1157
GND
600-10897-0053-300 A
p897
misun
18 OF 41
31-DEC-2008
Page 19
Display: DACA (Middle DVI-I)
OUTBIOUT
OUT
OUT
OUT
OUT
3/17 DAC_A
DACA_HSYNC
DACA_VSYNC
I2C_SCL1
I2C_SDA1
DACA_RED
DACA_BLUE
DACA_GREEN
DACA_IDUMP
DACA_VDD
DACA_RSET
DACA_VREF
DACA_AGND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
R932
2.2K
5%
0402
COMMON
R933
2.2K
5%
0402
COMMON
I2C1_SCL_R
I2C1_SDA_R
33
R928
COMMON
0402
5%
33
R929
COMMON
0402
5%
5V
NEAR VAIO
5V
14
7
GND
5V
14
7
GND
U514
74ACT08
6
R923
74ACT_SO
COMMON
U514
74ACT08
74ACT_SO
COMMON
0402
DACA_HSYNC_BUF_R
8
R926
0402
DACA_VSYNC_BUF_R
R935
150
1%
0402
COMMON
GND GND1
R936
150
1%
0402
COMMON
GND
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
4
5
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
U2
NVIO2-P-A2
BGA533
C1205
.1UF
6.3V
10%
X7R
0402
COMMON
COMMON
I2C1_SCL
R9
P6
R5
P9
GND
AD11
AD10
U2
T2
R1
T1
P2
T5
I2C1_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
GND
R921
150
1%
0402
COMMON
GND
NEAR NVIO
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
R927
R925
150
150
1%
1%
0402
0402
COMMON
COMMON
GND
GND
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
3V3
LB512
C1204
1UF
6.3V
10%
X5R
0402
COMMON
GND
240R@100MHz
COMMONBEAD_0402
C1202
1UF
6.3V
10%
X5R
0402
COMMON
12MIL
DACA_VREF
12MIL
C1213
.01UF
16V
10%
X7R
0402
COMMON
GND
DACA_RSET
R907
124
1%
0402
COMMON
GND
Additional resistor for RSET trim
Both values must change if used
C1207
1UF
6.3V
10%
X5R
0402
COMMON
12MIL
DACA_VDD
3.3V
10
9
5%
5%
3
3
3V3
2
GND
3V3
2
1
GND
33
COMMON
33
COMMON
D527
BAV99
SOT23
100V
100MA
COMMON
D528
BAV99
SOT23
100V
100MA
COMMON
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
DACA_HSYNC_BUF
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
DACA_VSYNC_BUF
L508
C1238
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
L509
C1239
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
3
3
3
3
33NH
CHANGED0603
33NH
0603 CHANGED
5V
LB517
2
D524
BAV99
SOT23
100V
100MA
COMMON
1
GND
5V
LB518
2
D525
BAV99
SOT23
100V
100MA
COMMON
1
GND
5V
2
D3
BAV99
SOT23
100V
100MA
COMMON
1
GND
5V
2
D1
BAV99
SOT23
100V
100MA
COMMON
1
GND
GND
GND
L2
0603
L1
0603
C1241
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
C1242
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
27NH
CHANGED0402
27NH
CHANGED0402
0
CHANGED
0
CHANGED
C1247
22PF
50V
5%
C0G
0402
NO STUFF
GND
C1248
22PF
50V
5%
C0G
0402
NO STUFF
GND
C5
22PF
50V
5%
C0G
0402
NO STUFF
GND
C7
22PF
50V
5%
C0G
0402
NO STUFF
GND
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
I2C1_SCL_CON
I2C1_SDA_CON
DACA_HSYNC_CON
DACA_VSYNC_CON
DACA_RED_CON
DACA_GREEN_CON
23.3G<
23.3G<
23.4G<
23.3G<
23.3G<
23.3G<
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
R934
150
1%
0402
COMMON
GND
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Display: DACA (Middle DVI-I)
www.vinafix.vn
NV_CRITICAL_NET=1
3V3
2
D526
BAV99
3
SOT23
100V
100MA
COMMON
1
GND
L507
C1237
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
33NH
CHANGED0603
C1243
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
NV_IMPEDANCE=75OHM
DACA_BLUE_CON
23.3G<
600-10897-0053-300 A
p897
misun
19 OF 41
31-DEC-2008
Page 20
Display: DACC (South DVI-I)
OUTBIOUT
OUT
OUT
OUT
OUT
5/17 DAC_C
DACC_HSYNC
DACC_VSYNC
I2C_SCL2
I2C_SDA2
DACC_RED
DACC_BLUE
DACC_GREEN
DACC_IDUMP
DACC_VDD
DACC_RSET
DACC_VREF
DACC_AGND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
R3
2.2K
5%
0402
COMMON
R4
2.2K
5%
0402
COMMON
I2C2_SCL_R
I2C2_SDA_R
33
R10
COMMON
0402
5%
33
R9
COMMON
0402
5%
5V
NEAR VAIO
5V
14
7
GND
5V
14
7
GND
U514
74ACT08
3
74ACT_SO
COMMON
DACC_HSYNC_BUF_R
U514
74ACT08
11
74ACT_SO
COMMON
DACC_VSYNC_BUF_R
R940
150
1%
0402
COMMON
R941
150
1%
0402
COMMON
GND
R912
0402
R914
0402
3
3
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
1
2
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
U2
NVIO2-P-A2
BGA533
C1196
.1UF
6.3V
10%
X7R
0402
COMMON
COMMON
I2C2_SCL
AC9
AC13
AB12
AF7
GND
AG10
AF10
AE9
AD9
AF8
AG9
AG7
AD8
I2C2_SDA
DACC_HSYNC
DACC_VSYNC
DACC_RED
DACC_GREEN
DACC_BLUE
GND
GND
R905
150
1%
0402
COMMON
NEAR NVIO
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
R903
R901
150
150
1%
1%
0402
0402
COMMON
COMMON
GND
GND
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
3V3
12MIL
3.3V
GND
C1194
1UF
6.3V
10%
X5R
0402
COMMON
12MIL
DACC_VREF
12MIL
DACC_RSET
R884
124
1%
0402
COMMON
DACC_VDD
LB510
C1177
1UF
6.3V
10%
X5R
0402
COMMON
GND
240R@100MHz
COMMONBEAD_0402
C1193
1UF
6.3V
10%
X5R
0402
COMMON
C1180
.01UF
16V
10%
X7R
0402
COMMON
GND
Additional resistor for RSET trim
Both values must change if used
13
12
5%
5%
3V3
2
GND
3V3
2
1
GND
33
COMMON
33
COMMON
D522
BAV99
SOT23
100V
100MA
COMMON
D523
BAV99
SOT23
100V
100MA
COMMON
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
DACC_HSYNC_BUF
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
DACC_VSYNC_BUF
L505
C1234
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GNDGND 1
L506
C1235
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
3
3
3
3
33NH
CHANGED0603
33NH
0603 CHANGED
5V
2
D5
BAV99
SOT23
100V
100MA
COMMON
1
GND
5V
2
D4
BAV99
SOT23
100V
100MA
COMMON
1
GND
5V
2
D7
BAV99
SOT23
100V
100MA
COMMON
1
GND
5V
2
D6
BAV99
SOT23
100V
100MA
COMMON
1
GND
GND
GND
LB1
LB2
0402
0402
L4
0603
L3
0603
C1250
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
C1251
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
27NH
CHANGED
CHANGED
0
CHANGED
0
CHANGED
27NH
C2
22PF
50V
5%
C0G
0402
NO STUFF
GND
C3
22PF
50V
5%
C0G
0402
NO STUFF
GND
C1
22PF
50V
5%
C0G
0402
NO STUFF
GND
C4
22PF
50V
5%
C0G
0402
NO STUFF
GND
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=1
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
I2C2_SCL_CON
I2C2_SDA_CON
DACC_HSYNC_CON
DACC_VSYNC_CON
DACC_RED_CON
DACC_GREEN_CON
22.3G<
22.3G<
22.4G<
22.3G<
22.3G<
22.3G<
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
R939
150
1%
0402
COMMON
GND
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Display: DACC (South DVI-I)
www.vinafix.vn
NV_CRITICAL_NET=1
3V3
2
D521
BAV99
3
SOT23
100V
100MA
COMMON
1
GND
L504
C1236
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
33NH
CHANGED0603
C1249
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
NV_IMPEDANCE=75OHM
DACC_BLUE_CON
22.3G<
600-10897-0053-300 A
p897
misun
20 OF 41
31-DEC-2008
Page 21
out
7P_COMP_10P
out
out NC
Y/CVBS
GND
NC
Pb out
C/Pr
GND
4/17 DAC_B
DACB_VSYNC
DACB_HSYNC
DACB_OUT0
DACB_OUT3
DACB_OUT2
DACB_OUT1
DACB_IDUMP
DACB_VDD
DACB_VREF
DACB_RSET
DACB_AGND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Display: DACB (North MiniDIN) SD/HDTV out
HDTV = 82pF, 0.56uH || 8.2pF, 82pF
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
3V3
U2
NVIO2-P-A2
BGA533
C1195
1K
6.3V
5%
X7R
0402
CHANGED
GND
COMMON
A9
SNN_DACB_HSYNC
C3
SNN_DACB_VSYNC
B1
SVID_LUM
DACB_Y
A2
COMPOSITE
DACB_PB
B2
SVID_CHROM
DACB_PR
A3
SNN_DACB_CSYNC
B5
A7DACB_RSET
B9
A4
R917 R913
R911
GND
150
1%
0402
NO STUFF
GND
C7
GND
150
1%
0402
NO STUFF
GND
150
1%
0402
NO STUFF
PLACE NEAR NVIO
3V3
12MIL
3.3V
LB511
C1178
1UF
6.3V
10%
X5R
0402
NO STUFF
GND
240R@100MHz
NO STUFFBEAD_0402
GND
C1198
1UF
6.3V
10%
X5R
0402
NO STUFF
C1215
.01UF
16V
10%
X7R
0402
NO STUFF
DACB_VDD
C1197
1UF
6.3V
10%
X5R
0402
NO STUFF
12MIL
DACB_VREF
12MIL
R894
121
1%
0402
NO STUFF
GND
Additional resistor for RSET trim
Both values must change if used
GND
GND
GND
R937
150
1%
0402
NO STUFF
R943
150
1%
0402
NO STUFF
R938
150
1%
0402
NO STUFF
2
3
1
GND
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
3V3
2
3
1
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
3V3
2
3
1
GND
SDTV = 270pF, 1.8uH || 22pF, 330pF
L503
D530
BAV99
SOT23
100V
100MA
NO STUFF
C1233
82PF
50V
5%
C0G
0402
NO STUFF
GND
L501
D531
BAV99
SOT23
100V
100MA
NO STUFF
C1231
82PF
50V
5%
C0G
0402
NO STUFF
GNDGND
L502
D532
BAV99
SOT23
100V
100MA
NO STUFF
C1232
82PF
50V
5%
C0G
0402
NO STUFF
GND
C1246
0402 50V
0603
C1244
0402
0603
C1245
NO STUFF0603
8.2PF
+/-0.5PF
C0G
NO STUFF
NO STUFF
8.2PF
50V
+/-0.5PF
C0G
NO STUFF
NO STUFF
8.2PF
50V0402
+/-0.5PF
C0G
NO STUFF
0.56uH
0.56uH
0.56uH
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
C1254
82PF
50V
5%
C0G
0402
NO STUFF
GND
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
C1252
82PF
50V
5%
C0G
0402
NO STUFF
GND
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
C1253
82PF
50V
5%
C0G
0402
NO STUFF
GND
DACB_Y_F
DACB_PB_F
DACB_PR_F
SNN_TV_NC7
7
6
4
2
GND
J1
CON_MINIDIN_7_W_SPRING
7P_COMP_10P
NO STUFF
5
3
1
SNN_TV_NC5
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Display: DACB (North MiniDIN) SD/HDTV out
www.vinafix.vn
600-10897-0053-300 A
p897
misun
21 OF 41
31-DEC-2008
Page 22
1917
81624
C1
C5A
C2
C3
C5
C4
SHLD24
SHLD13
SHLD05
SHIELD8
SHIELD5
SHIELD6
SHIELD7
SHIELD1
SHIELD2
SHIELD3
SHIELD4
TX0TX1-
TX1+
TX2-
TX0+
TX2+
TX3TX3+
TX4+
TX4-
DDCC
TX5+
TX5-
GND
VDDC
SHLDC
TXC-
DDCD
HPD
R
VSYNC
TXC+
G
AGND2
AGND1
B
HSYNC
INININININININ
OUT
6/17 IFP_AB
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC
IFPB_TXC
IFPB_TXD4
IFPB_TXD4
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
IFPAB_VPROBE
IFPAB_RSET
IFPAB_PLL_VDD
IFPAB_PLL_GND
IFPB_IO_GND
IFPB_IO_VDD
IFPA_IO_VDD
IFPA_IO_GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Display: IFPAB for South DVI-I (with DACC)
SNN_IFPAB_VPROBE
12MIL
IFPAB_RSET
1K
R900
COMMON
0402
C1171
4.7UF
6.3V
X5R
0603
COMMON
C1209
.1UF
6.3V
10%
X7R
0402
COMMON
5%
3.3V
12MIL
IFPAB_PLLVDD
C1179
1UF
6.3V
X5R
0402
COMMON
C1217
.01UF
16V
10%
X7R
0402
COMMON
GND
C1201
.1UF
6.3V
10%10%10%10%
X7R
0402
COMMON
3.3V
12MILGND
IFPAB_IOVDD
C1210
.01UF
16V
10%
X7R
0402
COMMON
3V3
GND
IFP_IOVDD
C1170
1UF
6.3V
X5R
0402
COMMON
LB509
LB514
240R@100MHz
COMMONBEAD_0402
240R@100MHz
COMMONBEAD_0402
C1214
1UF
6.3V
10%
X5R
0402
COMMON
GND
U2
NVIO2-P-A2
BGA533
COMMON
25.2F<
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
GPIO0_DVIAB_HPD
NV_IMPEDANCE=90DIFF
AB11
AB7
AC10
AB10
AA6
Y6
AD7
AE7
GND
V4
V5
W4
Y4
AA4
AA5
AB4
AC4
AB6
AB5
AD6
AC6
AD4
AD5
AG2
AG3
AG4
AF4
AF5
AG6
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
SNN_IFPA_TXD3*
SNN_IFPA_TXD3
SNN_IFPB_TXC*
SNN_IFPB_TXC
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
SNN_IFPB_TXD7*
SNN_IFPB_TXD7
DIFF_PAIR NET_NAMENV_CRITICAL_NETNV_IMPEDANCE
3
IFPA_TXC*IFPA_TXC
IFPA_TXD0*IFPA_TXD0
IFPA_TXD0IFPA_TXD0
IFPA_TXD1*IFPA_TXD1
IFPA_TXD2*IFPA_TXD2
IFPA_TXD2IFPA_TXD2
IFPB_TXD4*
IFPB_TXD4IFPB_TXD4
IFPB_TXD5*
IFPB_TXD5IFPB_TXD5
IFPB_TXD6*
IFPB_TXD6IFPB_TXD6
3V3
2
D529
BAV99
SOT23
100V
100MA
COMMON
1
GND
GPIO0_DVIAB_HPD_R
10K
R942
COMMON
0402
5%
R944
100K 220PF
5%
0402
COMMON
GND
IFPA_TXC IFPA_TXC
IFPA_TXD1 IFPA_TXD1
IFPB_TXD4
IFPB_TXD5
IFPB_TXD6
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Display: IFPAB for south DVI-I (with DACC)
www.vinafix.vn
DDC_5V
4700PF
LB519
BEAD_0402
240R@100MHz
COMMON
GPIO0_DVIAB_HPD_CON
20.1H>
20.1H<>
20.3H>
20.3H>
20.4H>
20.4H>
20.2H>
I2C2_SCL_CON
I2C2_SDA_CON
DACC_VSYNC_CON
DACC_RED_CON
DACC_GREEN_CON
DACC_BLUE_CON
DACC_HSYNC_CON
GND
C1255
25V0402
10%
X7R
COMMON
25
26
27
28
17
18
9
10
1
2
3
11
19
12
13
4
5
20
21
6
7
14
15
22
24
23
8
16
C1
C2
C3
C5
C5A
C4
29
30
31
32
GND
J3
36QR24-073T
DVI_I_(SLIM_)SHLD_M
DVI_I_SLIM_SHLD_M
CHANGED
C1240
50V
5%
C0G
0402
COMMON
GND
600-10897-0053-300 A
p897
misun
22 OF 41
31-DEC-2008
Page 23
1917
81624
C1
C5A
C2
C3
C5
C4
SHLD24
SHLD13
SHLD05
SHIELD8
SHIELD5
SHIELD6
SHIELD7
SHIELD1
SHIELD2
SHIELD3
SHIELD4
TX0TX1-
TX1+
TX2-
TX0+
TX2+
TX3TX3+
TX4+
TX4-
DDCC
TX5+
TX5-
GND
VDDC
SHLDC
TXC-
DDCD
HPD
R
VSYNC
TXC+
G
AGND2
AGND1
B
HSYNC
INININININININ
OUT
7/17 IFP_CD
IFPC_TXC
IFPC_TXC
IFPC_TXD0
IFPC_TXD0
IFPC_TXD1
IFPC_TXD1
IFPC_TXD2
IFPC_TXD2
IFPC_TXD3
IFPC_TXD3
IFPD_TXC
IFPD_TXC
IFPD_TXD4
IFPD_TXD4
IFPD_TXD5
IFPD_TXD5
IFPD_TXD6
IFPD_TXD6
IFPD_TXD7
IFPD_TXD7
IFPCD_VPROBE
IFPCD_RSET
IFPCD_PLL_VDD
IFPCD_PLL_GND
IFPD_IO_GND
IFPD_IO_VDD
IFPC_IO_VDD
IFPC_IO_GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Display: IFPCD for middle DVI-I (with DACA)
DDC_5V
4700PF
SNN_IFPCD_VPROBE
12MIL
IFPCD_RSET
1K
R904
COMMON
0402
C1226
4.7UF
6.3V
X5R
0603
COMMON
C1208
.1UF
6.3V
10%
X7R
0402
COMMON
5%
3.3V
12MIL
IFPCD_PLLVDD
C1212
C1220
.1UF
1UF
6.3V
6.3V
X7R
X5R
0402
0402
COMMON
COMMON
3.3V
12MIL
GND
IFPCD_IOVDD
C1206
C1218
.01UF
.01UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
3V3
LB516
C1227
1UF
6.3V
10% 10% 10% 10%
X5R
0402
COMMON
GND
IFP_IOVDD
LB513
240R@100MHz
COMMONBEAD_0402
240R@100MHz
COMMONBEAD_0402
C1222
1UF
6.3V
10%
X5R
0402
COMMON
GND
U2
NVIO2-P-A2
BGA533
COMMON
NV_IMPEDANCE=90DIFF
N4
G6
J6
H6
A6
B8
H4
G4
GND
B6
C6
D6
D5
D4
E4
F4
F5
E6
F6
K6
K5
J4
J5
K4
L4
M4
M5
M6
L6
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
SNN_IFPC_TXD3*
SNN_IFPC_TXD3
SNN_IFPD_TXC*
SNN_IFPD_TXC
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
NV_IMPEDANCE=90DIFF
SNN_IFPD_TXD7*
SNN_IFPD_TXD7
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
IFPC_TXD0 IFPC_TXD0*
IFPC_TXD0 IFPC_TXD0
IFPC_TXD1 IFPC_TXD1*
IFPC_TXD1 IFPC_TXD1
IFPC_TXD2 IFPC_TXD2*
IFPD_TXD4
IFPD_TXD4 IFPD_TXD4
IFPD_TXD5
IFPD_TXD5 IFPD_TXD5
IFPD_TXD6
NET_NAMEDIFF_PAIRNV_CRITICAL_NETNV_IMPEDANCE
IFPC_TXC*IFPC_TXC
IFPC_TXCIFPC_TXC
IFPC_TXD2IFPC_TXD2
IFPD_TXD4*
IFPD_TXD5*
IFPD_TXD6*
IFPD_TXD6IFPD_TXD6
19.1H>
19.1H<>
19.3H>
19.3H>
19.4H>
19.4H>
19.2H>
I2C1_SCL_CON
I2C1_SDA_CON
DACA_VSYNC_CON
GPIO1_DVICD_HPD_CON
DACA_RED_CON
DACA_GREEN_CON
DACA_BLUE_CON
DACA_HSYNC_CON
C6
25V0402
10%
X7R
COMMON
25
26
27
28
17
18
9
10
1
2
3
11
19
12
13
4
5
20
21
6
7
14
15
22
24
23
8
16
C1
C2
C3
C5
C5A
C4
29
30
31
32
GND
GND
J2
36QR24-073T
DVI_I_(SLIM_)SHLD_M
DVI_I_SLIM_SHLD_M
CHANGED
25.2F<
GPIO1_DVICD_HPD
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Display: IFPCD for middle DVI-I (with DACA)
www.vinafix.vn
3V3
2
D2
BAV99
3
SOT23
100V
100MA
COMMON
1
GND
GND
0402
R2
100K
5%
0402
COMMON
R1
GPIO1_DVICD_HPD_R
10K
COMMON
5%
220R@100MHz
LB3
COMMON
BEAD_0603
C9
220PF
50V
5%
C0G
0402
COMMON
GND
GPIO1_DVICD_HPD_CON
600-10897-0053-300 A
p897
misun
23 OF 41
31-DEC-2008
Page 24
SLI - EMI SHIELD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RASTER_SYNC
DR<0>
DR<1>
DR<5>
DR<2>
DR<3>
DR<4>
DR<9>
DR<8>
DR<7>
DR<6>
DR<10>
DR<11>
DR<12>
DR<13>
DR<14>
DR_CMD
DR_CLK
SWAP_RDY
EXT_REFCLK
BI
SLI - EMI SHIELD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RASTER_SYNC
DR<0>
DR<1>
DR<5>
DR<2>
DR<3>
DR<4>
DR<9>
DR<8>
DR<7>
DR<6>
DR<10>
DR<11>
DR<12>
DR<13>
DR<14>
DR_CMD
DR_CLK
SWAP_RDY
EXT_REFCLK
BIBIBI
BI
10/17 DR Interface
DRA_D0
DRA_D1
DRA_D2
DRA_D3
DRA_D4
DRA_D5
DRA_D6
DRA_D7
DRA_D8
DRA_D9
DRA_CLK
DRA_CMD
DRA_D10
DRA_D11
DRA_D12
DRA_D13
DRA_D14
DRB_D0
DRB_D1
DRB_D2
DRB_D3
DRB_D4
DRB_D5
DRB_D6
DRB_D7
DRB_D8
DRB_CLK
DRB_CMD
DRB_D9
DRB_D10
DRB_D11
DRB_D12
DRB_D13
DRB_D14
DR_CAL_PD_VDDQ
DR_CAL_PU_GND
DR_VDDQ
DR_VDDQ
DR_VDDQ
DR_VREF
OUT
POLYSWITCH
S
DGC
E
B
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Connectors: DR Interface (Dual SLI) / SPDIF
U2
NVIO2-P-A2
BGA533
L19
M19
N19
D22
G22
D23
C532
0402
COMMON
.01UF
16V
10%
X7R
COMMON
NV_CRITICAL_NET=1
NV_IMPEDANCE=56OHM
SPDIF_IN_GPU
NV_CRITICAL_NETNV_IMPEDANCENET
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
NV_CRITICAL_NET=1
25.3F<>
25.3G<>
25.3F<>
25.3F<>
25.3F<>
NVIO_EXT_REFCLKA_R
GPIO15_SWAPRDY
NVIO_EXT_REFCLKB_R
GPIO11_RASTERSYNC1
GPIO14_RASTERSYNC2
R840
0402
R861
0402
33
COMMON
5%
33
COMMON
5%
R608
180K
5%
0402
NO STUFF
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
25.2F<
DRA_D0
J26
DRA_D1
H26
DRA_D2
G27
DRA_D3
F27
DRA_D4
F26
DRA_D5
E26
DRA_D6
D27
DRA_D7
C27
DRA_D8
C26
DRA_D9
B27
DRA_D10
J25
DRA_D11
J24
DRA_D12
G25
DRA_D13
G24
DRA_D14
F25
DRA_CMD
F24
DRA_CLK
D25
DRB_D0
B26
DRB_D1
A26
DRB_D2
C25
DRB_D3
A25
DRB_D4
A24
DRB_D5
B24
DRB_D6
B23
DRB_D7A22
DRB_D8
B21
DRB_D9
A21
DRB_D10
E24
DRB_D11
D24
DRB_D12
C24
DRB_D13
F23
DRB_D14
E22
DRB_CMD
C22
DRB_CLK
D21
3V3
2
D518
BAV99
3
SOT23
3V3
100V
100MA
COMMON
1
GND
R607
180K
5%
0402
NO STUFF
GND
2V5
C1151
1UF
6.3V
10%
X5R
0402
COMMON
GND
2V5
R851
1K
1%
0402
COMMON
R852
1K
1%
0402
COMMON
C1146
1UF
6.3V
10%
X5R
0402
COMMON
12MIL
DR_VREF
C1137
.1UF
6.3V
10%
X7R
0402
COMMON
GND
C1150
.1UF
6.3V
10%
X7R
0402
COMMON
2V5
R854
49.9
1%
0402
COMMON
DR_CAL_PD_VDDQ
DR_CAL_PU_GND
R859
49.9
1%
0402
COMMON
GND
12MIL
12MIL
SPDIF INPUT / Level Detection
Black, RA, 2.0mm, SPDIF connector
HDR_1M2
2.0MM
SPDIF
COMMON
MALE
J4
90
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
1
SPDIF_IN
2
SPDIF_GND
R596
0
5%
0402
COMMON
1
2
16MIL
0V
F501
200mA
1206
NO STUFF
CN3
CON_MIO_26_EDGE_4GND
NONPHY_EXT
NO STUFF
A2
B4
A4
A5
B6
A6
A8
B9
B10
A10
B12
A12
A13
B5
A9
B13
B8
A1
B1
B2
GPIO11_RASTERSYNC1_R
CN1
CON_MIO_26_EDGE_4GND
NONPHY_EXT
NO STUFF
A2
B4
A4
A5
B6
A6
A8
B9
B10
A10
B12
A12
A13
B5
A9
B13
B8
A1
B1
B2
GPIO14_RASTERSYNC2_R
B3
B7
B11
A3
A7
A11
1
2
3
4
B3
B7
B11
A3
A7
A11
1
2
3
4
GND
GND
short circuit protection
if 3.3V connects to GND.
12V_PEX6_F1
R605
0402
SPDIF_IN_C
2.2K
COMMON
5%
3V3
R64
33K
5%
0402
COMMON
10K
R63
COMMON
0402
5%
C115
.1UF
6.3V
10%
X7R
0402
COMMON
GND
1B1C1E
SPDIF_IN_R 1
R65
10K
5%
0402
COMMON
SPDIF_IN_COMP2_D
3
Q12
MMBT2222A
SOT23_1B1C1E
COMMON
2
GND GND
GND
SPDIF_IN_COMP2_Q
NV_CRITICAL_NET=1
NV_IMPEDANCE=75OHM
1G1D1S
1
C116
.01UF
16V
10%
X7R
0402
COMMON
R604
75
1%
0402
COMMON
3
Q503
BSS138
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
GND
R603
75
1%
0402
NO STUFF
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Connectors: DR Interface (Dual SLI) / SPDIF
www.vinafix.vn
600-10897-0053-300 A
p897
misun
24 OF 41
31-DEC-2008
Page 25
VCC
VCC
GND
GND
SCL
SDA
NC
SDA
IN
OUT
BI
S
D
G
BIBIBI
OUTINININOUT
OUT
OUT
OUTINOUTBIBI
IN
VCC
GND
HOLD
WP
CS
SI
SCK
SO
11/17 MISC
I2C0_SCL
I2C0_SDA
I2C3_SCL
I2C4_SCL
I2C3_SDA
I2C4_SDA
SPDIF
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10
GPIO15
EXT_REFCLKA
EXT_REFCLKB
FAN
GPIO16
EXTDEV_RST
XTAL_OUT
STRAP2_ROM_SI
STRAP1_ROM_SO
STRAP0_ROM_SCK
RFU must be GND!
PEX_PWR_GOOD
ROM_CS
STRAP3
TESTMODE
XTAL_SSIN
XTAL_IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
MISC: GPIO / XTAL / VBIOS / HDCP / I2C
VBIOS
C1199
.1UF
6.3V
10%
X7R
0402
COMMON
3V3
3V3
R11
R12
2.2K
2.2K
5%
5%
0402
U2
NVIO2-P-A2
BGA533
COMMON
R855
10K
5%
0402
COMMON
GND
AD18
AD13
AF13
AE13
AF14
AG13
AB13
AE18
M27
K27
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=1
XTAL_IN
C32
22PF
50V
5%
C0G
0402
COMMON
XTAL_HOSONIC
Y1
HC49SMD
27MHZ_TV
+/-10PPM
COMMON
XTAL_OUT
26.3F< 26.5E<
27.4H>
U513
3V3
GND
MX25L512
SO8
SO8
COMMON
8
4
7
3
1
5
2
6
3V3
3V3
R13
10K
5%
0402
COMMON
GPU_RST*
ROM_CS*
STRAP1
STRAP2
STRAP0
SNN_STRAP3
NVIO_TESTMODE
FL_REFCLK_VAIO
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=1
R845
10K
5%
0402
COMMON
GND
GND
I2C
SNN_I2C0_SCL
AC12
SNN_I2C0_SDA
AD12
I2C3_SCL
AF11
I2C3_SDA
AE10
I2C4_SCL
AG12
I2C4_SDA
AE12
SPDIF
SPDIF_IN_GPU
AG19
GPIOs
GPIO0_DVIAB_HPD
AF17
GPIO1_DVICD_HPD
AF16
SNN_GPIO2_SWAPRDY_OUT
AG16
SNN_GPIO3_RASTERSYNC0
AE16
GPIO4_PS5_NVVDD_VID4
AG15
GPIO5_PS5_NVVDD_VID1
AD16
GPIO6_PS5_NVVDD_VID2
AB17
GPIO7_PS5_NVVDD_VID3
AC16
GPIO8_FAN_TACH
AB16
GPIO9_THERM_ALERT*
AE15
GPIO10_PS5_NVVDD_VID4
AB15
GPIO11_RASTERSYNC1
AB14
SNN_GPIO12_POWERALERT*
AC15
SNN_GPIO13_STEREO
AD15
GPIO14_RASTERSYNC2
AD14
GPIO15_SWAPRDY
AB18
SNN_GPIO16_DP_INT*
AB20
FAN_PWM_NVIO
AD17
NVIO_EXT_REFCLKA
R4
NVIO_EXT_REFCLKB
A13
NVIO_EXTDEV_RST*
AC18
J27
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=1
C31
22PF
50V
5%
C0G
0402
COMMON
GND
R15
0402
R14
0402
NV_CRITICAL_NET=3
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=3
NV_IMPEDANCE=50OHM
R868
10K
5%
0402
COMMON
GND
5%
5%
0402
COMMON
33
COMMON
33
COMMON
NV_IMPEDANCE=50OHM
NV_IMPEDANCE=50OHM
R908
0402
5%
R892
0402
5%
33
COMMON
33
COMMON
I2C3_SCL_R
I2C3_SDA_R
NV_CRITICAL_NET=3
NV_CRITICAL_NET=3
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=3
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=3COMMON
26.4C<
26.4C<>
NVIO_EXT_REFCLKA_R
NVIO_EXT_REFCLKB_R
27.4E>
27.4E<>
24.3E>
22.4D>
23.4D>
31.3B<
31.2B<
31.2B<
31.3B<
26.3F>
31.3B<
24.3F<>
24.3F<>
24.2F<>
24.3F<>
3V3
R844
10K
5%
0402
COMMON
GPIO15_SWAPRDY
HDCP ROM
GND
3V3
26.4E>
3V3
R862
10K
5%
0402
1G1D1S
COMMON
R871
10K
5%
0402
COMMON
Q512
BSS138
SOT23_1G1D1S
1
COMMON
R850
2.2K
5%
0402
COMMON
R853
10K
5%
0402
NO STUFF
FAN_PWM_NVIO_R
3
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
R847
0402
3V3
R848
2.2K
5%
0402
COMMON
0
NO STUFF
5%
SNN_HDCP_NC
I2C ROM: 190-00007-0000-000
CRYPTO ROM: 190-00001-0001-002
U511
HDCP_I2CROM_PROGD
SO8
CHANGED
6
5
3I2C4_SDA_R
2
24.3F<> 25.3G<> 25.3G<> 24.3F<>
26.4F<
3V3
8
7
4
1
C1139
.1UF
6.3V
10%
X7R
0402
COMMON
GND
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
MISC: GPIO / XTAL / VBIOS / HDCP / I2C
www.vinafix.vn
600-10897-0053-300 A
p897
misun
25 OF 41
31-DEC-2008
Page 26
OUT
D
SGS
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
ININOUT
S
D
G
IN
VDD
THERM
ALERT
GND
D+
D-
SDA
SCL
OUT
PWM1/XTO
TACH1
VCC
PWM3
TACH3
TACH2
PWM2/ALERT*
GPIO/THERM*
D1+
SDA
VCCP
SCL
D1-
D2+
GND
D2-
IN
BI
13/21 THERMAL
TSENSE_1V5_SEL
TSENSE_OVERT
THERM_DN -> D-
THERM_DP -> D+
TS_OBS
TSENSE_AVDD
TSENSE_VREF
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
MISC: FAN / THERM / IFP_IOVDD
THERM OVERT SHUTDOWN LATCH
THERM_SHDN*
THERM_SHDN_D*1
3
Q507
2N7002
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GPU_RST_R_MOS
R829
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
Stuff for
ADT7473-1
0402
5%
10K
NO STUFF
3V3
R818
Q505
2N7002
SOT23_1G1D1S
NO STUFF
MAX_VOLTAGE=60V
R_DS_ON=7.5R
V_BE_GS=20V
THERM_SHDN_Q
1K
NO STUFF
GND
GND
10K
5%
0402
NO STUFF
3
2
C1073
1000PF
16V
10%
X7R
0402
NO STUFF
1G1D1S
1G1D1S
1G1D1S
1
3
Q509
2N7002
SOT23_1G1D1S
1
NO STUFF
2
3
CONTINUOUS_CURRENT=0.115A
2N7002
SOT23_1G1D1S
NO STUFF
MAX_VOLTAGE=60V
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
3V3
R817
10K
5%
0402
NO STUFF
3
Q504
2N7002
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
THERM_SHDN*
3V3
R777
10K
5%
0402
NO STUFF
R778
0402
5%
1K
NO STUFF
THERM_SHDN_R
1G1D1S
1
Q506
2
GND
THERM_SHDN
1G1D1S
THERM_LATCH1
CONTINUOUS_CURRENT=0.115A
R816
0402
5%
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
GND
MAX6649 option
R779
0
3V3
5%
0402
C1024
1000PF
16V
10%
X7R
0402
NO STUFF
COMMON
R828
10K
5%
0402
COMMON
29.5B<
31.1G<
GND
3V3
3V3
R774
200
5%
0402
16MIL
NO STUFF
THERM_VDD
U510
MAX6649MUA
SO8_122MIL
NO STUFF
2
THERM_DP
3
THERM_DN
8
I2C3_SCL_R
7
I2C3_SDA_R
C1015
1UF
6.3V
10%
X5R
0402
NO STUFF
1
GND
THERM_SHDN*
4
GPIO9_THERM_ALERT*
6
5
IFP_IOVDD (backdrive prevention)
GND
3V3
C47
.1UF
G1
G200-100-B1
BGA2236
COMMON
SNN_TSENSE_AVDD
SNN_TSENSE_VREF
SNN_TS_OBS
SNN_TS_1V5_SEL
SNN_TSENSE_OVERT
AK34
AJ33
AK29
BE20
BE19
ROUTE DIFFERENTIALLY
GUARD GND AROUND IF POSSIBLE
10MIL
THERM_DP
BR9
THERM_DN
BR8
10MIL
25.2F>
27.4E>
27.4E<>
25.2F<>
26.4C<>
C56
1000PF
16V
10%
X7R
0402
COMMON
1000pf for ADT7473-1
2200pf for MAX6649
6.3V
10%
X7R
0402
COMMON
I2C3_SCL_R
I2C3_SDA_R
THERM_DP
THERM_DN
U4
ADT7473ARQZ_1
XSOP16
COMMON
14
GND
1
16
13
12
11
10
2
GND
3V3
C49
.1UF
6.3V
10%
X7R
0402
COMMON
3
GND
FAN_PWM
15
FAN_TACH
6
THERM_SHDN*
5
GPIO9_THERM_ALERT*
9
SNN_TACH2
7
THERM_PWM_ADDR_EN*
8
SNN_7473_24
R37
0402
5%
25.3G< 26.4E>
10K
COMMON
3V3
ADT7473
25.2B<
26.3F< 27.4H>
At power on (not warm boot) stops fan for ~0.8sec
MISC: FAN / THERM / IFP_IOVDD
www.vinafix.vn
GPU_RST*
Vout =V*(1-e^-t/(R*C))
V=3.3, R=100K, C=22uF
Vout=1V, t=0.8s
R519
0402
5%
100K
NO STUFF
IFP_IOVDD
3V3
1G1D1S
1G1D1S
25.2B< 26.5E< 27.4H>
GPU_RST*
R891
0402
GPU_RST_R*
100
COMMON
5%
C1173
22PF
50V
5%
C0G
0402
COMMON
3
Q511
2N7002
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
IFP_IOVDD_EN
R910
0402
3
Q517
SI2305DS
SOT23_1G1D1S
1
COMMON
5%
10K
COMMON
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
16MIL
3.3V
GND
GPU Driven Fan and Tach
1
R554
10K
5%
0402
NO STUFF
GND
3
Q501
2N7002
SOT23_1G1D1S
NO STUFF
2
GPIO8_FAN_TACH
FAN_PWM_NVIO_R
3V3
3
D501
BAT54C
25V
200MA
SOT23
2
COMMON
GND
3V3
R510
10K
5%
0402
NO STUFF
FAN_CUTOFF_RC_Q
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
3V3
C519
1000PF
16V
10%
X7R
0402
NO STUFF
For EMI
R544
10K
5%
0402
COMMON
GND
GND
C504
.1UF
6.3V
10%
X7R
0402
NO STUFF
1G1D1S
C513
22UF
6.3V
20%
X5R
0805
NO STUFF
25.3F<
25.3H>
1GPU_RST_RC*
GND
0402
R872
0402
3V3
C518
1000PF
16V
10%
X7R
0402
NO STUFF
1G1D1S
1
R536
10K
5%
0402
COMMON
1%
1%
100R32
COMMON
100
COMMON
3
Q502
2N7002
SOT23_1G1D1S
NO STUFF
2
GND
12V_PEX6_F2
FAN_PWM
FAN_TACH
FAN Connector
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
1000PF
C502
0402
16V
10%
X7R
COMMON
1
2
3
4
J7
HDR_1M4
MALE
2.0MM
N/A
NORM
COMMON
GND
GND
600-10897-0053-300 A
misun 31-DEC-2008
26 OF 41p897
Page 27
OUT
OUTBIIN
PIC16F690
I2CA_SCL
HOTPLUG_DETECT_C
I2CB_SDA
I2CB_SCL
I2CA_SDA
HOTPLUG_DETECT_D
POWER_ENABLE
HOTPLUG_DETECT_F
FAN_ENABLE
HOTPLUG_DETECT_E
GPU_RESET*
PEX_REF_CLK_ENABLE
VDD
IICC_SDA
SMB_SDA
SMB_SCL
IICC_SCL
PCI_E_RESET*
VPP
GND
8/17 MIO_A
MIOA_D0
MIOA_D1
MIOA_D2
MIOA_D3
MIOA_D4
MIOA_D5
MIOA_D6
MIOA_D7
MIOA_D8
MIOA_D9
MIOA_D10
MIOA_D11
MIOA_D12
MIOA_D13
MIOA_D14
MIOA_CLKOUT
MIOA_CLKOUT
MIOA_CTL3
MIOA_DE
MIOA_VSYNC
MIOA_HSYNC
MIOA_CAL_PD_VDDQ
MIOA_CAL_PU_GND
MIOA_VDDQ
MIOA_VDDQ
MIOA_VREF
9/17 MIO_B
MIOB_D0
MIOB_D1
MIOB_D2
MIOB_D3
MIOB_D4
MIOB_D5
MIOB_D6
MIOB_D7
MIOB_D8
MIOB_D9
MIOB_D10
MIOB_D11
MIOB_D12
MIOB_D13
MIOB_D14
MIOB_CLKOUT
MIOB_CLKOUT
MIOB_CTL3
MIOB_DE
MIOB_HSYNC
MIOB_VSYNC
MIOB_CAL_PD_VDDQ
MIOB_CAL_PU_GND
MIOB_VDDQ
MIOB_VDDQ
MIOB_VREF
13/16 DVIA
DVIA_D0
DVIA_D1
DVIA_D5
DVIA_D4
DVIA_D3
DVIA_D2
DVIA_D6
DVIA_D7
DVIA_CTL2
DVIA_CTL1
DVIA_CTL0
DVIA_CLK
DVI_VDDQ
DVI_VDDQ
DVI_VDDQ
DVI_VDDQ
14/17 DVIB
DVIB_D0
DVIB_D1
DVIB_D5
DVIB_D4
DVIB_D3
DVIB_D2
DVIB_D6
DVIB_D7
DVIB_CTL2
DVIB_CTL1
DVIB_CTL0
DVIB_CLK
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
MISC: MIO / DVI / STRAPS / Hybrid
STRAPS
U2
NVIO2-P-A2
T9
T4
U6
L9
M9
G5
C1
D17
D20
F17
F20
BGA533
COMMON
U2
NVIO2-P-A2
BGA533
COMMON
U2
NVIO2-P-A2
BGA533
COMMON
U2
NVIO2-P-A2
BGA533
COMMON
W3
Y2U9
AA1
AA3
AB1
AB2
AD1
AD3
AE1
AE2
AF1
AE3
AF2
AE4
AE6
W1
V3
W2
V1
AB3
AC2
F1
F3
G1
G2
G3
H2
K1
K2
K3
L2
M1
M3
N1
N2
N3
D3
D2
E2
D1
J1
J3
C21
B20
A19
C19
A18
B18
B17
A16
C16
A15
B15
C15
F15
F16
E15
D15
E16
D16
E18
D18
F18
F19
E19
D19
SNN_MIOA<0>
SNN_MIOA<1>
SNN_MIOA<2>
SNN_MIOA<3>
SNN_MIOA<4>
SNN_MIOA<5>
SNN_MIOA<6>
SNN_MIOA<7>
SNN_MIOA<8>
SNN_MIOA<9>
SNN_MIOA<10>
SNN_MIOA<11>
SNN_MIOA<12>
SNN_MIOA<13>
SNN_MIOA<14>
SNN_MIOA_HSYNC
SNN_MIOA_VSYNC
SNN_MIOA_DE
MIOA_CTL3
SNN_MIOA_CLKOUT
SNN_MIOA_CLKOUT*
SNN_MIOB<0>
SNN_MIOB<1>
SNN_MIOB<2>
SNN_MIOB<3>
SNN_MIOB<4>
SNN_MIOB<5>
SNN_MIOB<6>
SNN_MIOB<7>
SNN_MIOB<8>
SNN_MIOB<9>
SNN_MIOB<10>
SNN_MIOB<11>
SNN_MIOB<12>
SNN_MIOB<13>
SNN_MIOB<14>
SNN_MIOB_HSYNC
SNN_MIOB_VSYNC
SNN_MIOB_DE
MIOB_CTL3
SNN_MIOB_CLKOUT
SNN_MIOB_CLKOUT*
DVIA_D0
DVIA_D1
DVIA_D2
DVIA_D3
SNN_DVIA_D4
SNN_DVIA_D5
SNN_DVIA_D6
DVIA_D7
SNN_DVIA_CTL0
SNN_DVIA_CTL1
SNN_DVIA_CTL2
SNN_DVIA_CLK
SNN_DVIB_D0
SNN_DVIB_D1
SNN_DVIB_D2
SNN_DVIB_D3
DVIB_D4
DVIB_D5
SNN_DVIB_D6
SNN_DVIB_D7
SNN_DVIB_CTL0
SNN_DVIB_CTL1
SNN_DVIB_CTL2
SNN_DVIB_CLK
3V3
R23
68K
5%
0402
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
MISC: MIO / DVI / STRAPS / Hybrid
www.vinafix.vn
3V3
C1216
.1UF
6.3V
10%
X7R
0402
COMMON
GND
SNN_MIOA_CAL_PD_VDDQ
SNN_MIOA_CAL_PU_GND
3V3
R7
1K
1%
0402
NO STUFF
MIOA_VREF W5
R8
1K
1%
0402
NO STUFF
GND
3V3
C1203
.1UF
6.3V
10%
X7R
0402
COMMON
GND
SNN_MIOB_CAL_PD_VDDQ
SNN_MIOB_CAL_PU_GND
3V3
R909
1K
1%
0402
NO STUFF
MIOB_VREF B3
R906
1K
1%
0402
NO STUFF
GND
3V3
C1189
C1153
4700PF
1UF
25V
6.3V
10%
10%
X7R
X5R
0402
0402
COMMON
COMMON
GND
3V3
R25
68K
5%
0402
NO STUFFNO STUFF
R18
68K
5%
0402
NO STUFF
DVIA_D0
DVIA_D1
DVIA_D2
DVIA_D3
DVIA_D7
DVIB_D5
MIOB_CTL3
MIOA_CTL3
DVIB_D4
26.4C<>
R857
0402
5%
R865
0402
5%
R870
0402
5%
R875
0402
5%
R5
0402
5%
R882
0402
5%
GND
C16
C17
.1UF
1UF
6.3V
6.3V
10%
10%
X7R
X5R
0402
0402
NO STUFF
NO STUFF
GND
SNN_U4_PEX_REFCLK_EN_PIN2
25.2F>
26.4C<
25.2F<>
3.2D>
STRAP BITS BOOT0 = 0x101000
3V3
NR_:_USAGE______________________COMMENT________________________
00 : GV_WIDTH DEFAULT=0x0 (WIDE)
01 : SUB_VENDOR DEFAULT=0x1 (FROM BIOS)
10K
NO STUFF
10K
NO STUFF
10K
COMMON
10K
NO STUFF
0402
R866
0402
R869
0402
R876
0402
5%
5%
5%
5%
COMMON
10K
COMMON
10K
NO STUFF
10K
COMMON
02 : RAM_CFG[0]
03 : RAM_CFG[1]
04 : RAM_CFG[2]
05 : RAM_CFG[3]
10K
R858
06 : CRYSTAL DEFAULT=0x0 (27MHz)
07 : TV_MODE[0] DEFAULT=0x1 (NTSC_J)
08 : TV_MODE[1]
09 : TV_MODE[2]
10 : PCI_DEVID[0] SET BY BIOS
11 : PCI_DEVID[1]
R883
0402
R874
0402
R916
0402
5%
5%
5%
10K
NO STUFF
10K
NO STUFF
10K
NO STUFF
12 : PCI_DEVID[2]
13 : PCI_DEVID[3] DEFAULT=0x0
14 : FB_SIZE[0] DEFAULT=0x2 (256MB ??)
15 : FB_SIZE[1]
16 : FB_SIZE[2]
17 : PEX_PLL_EN_TERM100 DEFAULT=0x0 (ENABLED)
18 : 3GIO_PAD_CFG_LUT_ADR[0] DEFAULT=0x3 (DESKTOP_DEFAULT)
19 : 3GIO_PAD_CFG_LUT_ADR[1]
20 : 3GIO_PAD_CFG_LUT_ADR[2]
21 : 3GIO_PAD_CFG_LUT_ADR[3]
22 : ROMTYPE[0] DEFAULT=0x1 (AT25S)
23 : ROMTYPE[1]
24 : USER[0] SET BY BIOS
25 : USER[1]
26 : USER[2]
27 : USER[3]
28 : PCI_DEVID_EXT DEFAULT=0x0
STRAP BITS BOOT3 = 0x10100C
NR_:_USAGE______________________COMMENT________________________
10K
10K
COMMON
10K
NO STUFF
R6
NO STUFF
0402
5%
3V3
06 : XCLK_555 DEFAULT=0x0
16 : PCI_IOBAR DEFAULT=0x1
0=DISABLE, 1=ENABLE
Stuff uC only for 65nm GPU
U3
HYBRID_PIC16F690_REV0D
XSOP20
NO STUFF
1
2
I2C3_SCL_R
I2C3_SDA_R
I2CS_SCL_R
I2CS_SDA_R
PEX_RST*
3
17
11
13
7
4HYBRID_PRG_TP
20
GND
PEX_RST*
R19
0402
5%
Stuff only to bypass the micro-controller
0
COMMON
GPU_RST*
SNN_U4I2C1_SCL_UC_PIN15
15
I2C1_SDA_UC14
SNN_U4_I2C2_SCL_UC_PIN8
8
I2C2_SDA_UC
9
HYBRID_HPD_DVICD_DP
12
HYBRID_HPD_DVIAB
10
HYBRID_HPD_E
19
HYBRID_HPD_F
18
GPU_RST*
6
SNN_U4_HYBRID_PWR_EN_PIN16
16
SNN_U4_FAN_PWM_PIN5
5
CFG Config Width Vendor
0000 Reserved
0001 16Mx32 512-bit Qimonda
0010 16Mx32 512-bit Hynix*
0011 16Mx32 512-bit Samsung*
0100 Reserved
0101 32Mx32 512-bit Qimonda
0110 32Mx32 512-bit Hynix
0111 32Mx32 512-bit Samsung
1000 Reserved
1001 16Mx32 448-bit Qimonda
1010 16Mx32 448-bit Hynix
1011 16Mx32 448-bit Samsung
1100 Reserved
1101 32Mx32 448-bit Qimonda
1110 32Mx32 448-bit Hynix
1111 32Mx32 448-bit Samsung
10K
R863
NO STUFF
0402
5%
68K
R873
NO STUFF
0402
5%
68K
R24
NO STUFF
0402
5%
68K
R16
NO STUFF
0402
5%
68K
R21
NO STUFF
0402
5%
68K
R22
NO STUFF
0402
5%
10K
R17
NO STUFF
0402
5%
600-10897-0053-300 A
p897
misun
3V3
3V3
GND
GND
25.2B< 26.3F< 26.5E<
GND
27 OF 41
31-DEC-2008
Page 28
Power and GND (GPU and NVIOx)
15/17 _GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
16/17 NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
18/21 SPARE/MISC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
TESTMODE
RFU (GND)
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
SPARE
11/21 FBVDDQ/RFU
FBA_RFU2
FBA_RFU1
FBA_RFU0
FBA_RFU3
FBA_RFU4
FBB_RFU1
FBB_RFU2
FBB_RFU3
FBB_RFU4
FBB_RFU0
FBA_RFU7
FBA_RFU6
FBA_RFU5
FBB_RFU5
FBC_RFU5
FBC_RFU4
FBC_RFU3
FBC_RFU2
FBC_RFU1
FBC_RFU0
FBB_RFU7
FBB_RFU6
FBC_RFU6
FBD_RFU6
FBD_RFU5
FBD_RFU4
FBD_RFU3
FBD_RFU2
FBD_RFU1
FBD_RFU0
FBC_RFU7
FBD_RFU7
FBE_RFU7
FBE_RFU6
FBE_RFU5
FBE_RFU4
FBE_RFU3
FBE_RFU2
FBE_RFU1
FBE_RFU0
FBF_RFU0
FBG_RFU0
FBF_RFU7
FBF_RFU6
FBF_RFU5
FBF_RFU4
FBF_RFU3
FBF_RFU2
FBF_RFU1
FBG_RFU1
FBH_RFU1
FBH_RFU0
FBG_RFU7
FBG_RFU6
FBG_RFU5
FBG_RFU4
FBG_RFU3
FBG_RFU2
FBH_RFU2
FBH_RFU6
FBH_RFU7
FBH_RFU5
FBH_RFU4
FBH_RFU3
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
15/21 NVVDD2
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
14/21 NVVDD1
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
NVVDD
21/21 GND3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
20/21 GND2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
19/21 GND1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
GPU SECTION POWERGPU SECTION GND
G1
G200-100-B1
BGA2236
COMMON
AA11
AA13
AA15
AA16
AA17
AA19
AA2
AA20
AA21
AA22
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AA31
AA32
AA33
AA34
AA35
AA36
AA43
AA45
AA48
AA5
AA51
AA54
AA8
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB31
AB32
AB33
AB34
AB35
AB36
AD11
AD13
AD2
AD43
AD45
AD48
AD5
AD51
AD54
AD8
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF30
AF31
AF32
AF33
AF34
AF35
AF36
AG11
AG13
AG15
AG16
GND
GND
GND
AG17
AG18
AG19
AG2
AG20
AG22
AG23
AG24
AG25
AG26
AG27
AG28
AG29
AG31
AG32
AG33
AG34
AG35
AG36
AG43
AG5
AG51
AG54
AG8
AH15
AH16
AH17
AH18
AH20
AH21
AH22
AH23
AH24
AH25
AH26
AH27
AH29
AH30
AH31
AH32
AH33
AH34
AH35
AH36
AJ2
AJ43
AJ45
AJ48
AJ5
AJ51
AJ54
AM13
AM15
AM16
AM17
AM18
AM19
AM2
AM20
AM22
AM23
AM24
AM25
AM26
AM27
AM28
AM29
AM30
AM32
AM33
AM34
AM35
AM36
AM43
AM45
AM48
G1
G200-100-B1
BGA2236
COMMON
AM54
AM8
AN15
AN16
AN17
AN18AG21AA18
AN19
AN20
AN21
AN22
AN23
AN24
AN25
AN26
AN27AG30
AN28
AN29
AN30
AN31
AN32
AN33
AN34
AN35AG45
AN36AG48
AP15
AP16
AP17
AP18
AP19
AP20
AP21
AP22
AP23AH19
AP24
AP25
AP26
AP27
AP28
AP29
AP30
AP31
AP32AH28
AP33
AP34
AP35
AP36
AR11
AR13
AR2
AR43
AR45AJ11
AR48AJ13
AR5
AR51
AR54
AR8
AT15
AT17
AT19
AT21AJ8
AT23AM11
AT25
AT26
AT28
AT30
AT32
AT34
AT36
AV11
AV13AM21
AV2
AV43
AV45
AV48
AV5
AV51
AV54
AV8
B12
B15AM31
B18
B21
B24
B27
B29
B32
B35
B38
B41AM5
B44AM51
GNDGND
0V
B47
B50
B6
B9
BA11
BA2
BA43
BA45
BA48
BA5
BA51
BA54
BA8
BC15
BC18
BC21
BC24
BC27
BC29
BC32
BC35
BC38
BD11
BD2
BD45
BD48
BD5
BD51
BD54
BD8
BE12
BE15
BE18
BE21
BE24
BE27
BE29
BE32
BE35
BE38
BE41
BE44
BG2
BG48
BG5
BG51
BG54
BG8
BH12
BH15
BH18
BH21
BH24
BH27
BH29
BH32
BH35
BH38
BH44
BH47
BH9
BK2
BK5
BK51
BK54
BL12
BL15
BL18
BL21
BL24
BL27
BL29
BL32
BL35
BL38
BL41
BL44
BL47
BL50
BL6
BL9
BM4
BM52
BN3
BN53
BP12
BP15
G1
G200-100-B1
BGA2236
COMMON
BP18
BP21
BP24
BP27
BP29
BP35
BP38
BP41
BP44
BP47
BP50
BP6
BP9
C3
C53
D4
D52
E12
E15
E18
E21
E24
E27BC41
E29
E32
E35
E38
E41
E44
E47
E50
E6
E9
F2
F5
F51
F54
H12
H15
H18
H21
H24
H27
H29
H32
H35
H38
H41
H44
H47
H9
J2
J48
J5
J51
J54
J8
L12
L15
L18BH41
L21
L24
L27
L29
L32
L35
L38
L41
L44
M11
M2
M45
M48
M5
M51
M54
M8
N15
N18
N21
N24
N27
N29
N32
N35
N38
N41
R11
R13
GNDGND
R16
R18
R2
R20
R22
R24BP32BA13 AC20
R27
R29
R31
R33
R35
R43
R45
R48
R5
R51
R54
R8
T15
T16
T17
T18
T19
T20 AD16
T21
T22
T23
T24
T25
T26
T27
T28
T29
T30
T31
T32
T33
T34
T35
T36
V11
V13
V2
V43
V45
V48
V5
V51
V54
V8
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y25 AE33
Y26
Y27
Y28
Y29
Y30
Y31
Y32
Y33
Y34
Y35
Y36
GND
NVVDD
AC15
AC16
AC17
AC18
AC19
AC21
AC22
AC23
AC24
AC25
AC26
AC27
AC28
AC29
AC30
AC31
AC32
AC33
AC34
AC35
AC36
AD15
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
AD32
AD33
AD34
AD35
AD36
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE27
AE28
AE29
AE30
AE31
AE32
AE34
AE35
AE36
AJ15
AJ16
AJ17
AJ18
AJ19
AJ20
G1
G200-100-B1
BGA2236
COMMON
AJ21
AJ22
AJ23
AJ24
AJ27
AJ29
AJ30
AJ31
AJ32
AJ34
AJ35
AJ36
AK15
AK16
AK17
AK18
AK19
AK20
AK21
AK22
AK23
AK24
AK25
AK26
AK27
AK28
AK30
AK31
AK32
AK33
AK35
AK36
AL15
AL16
AL17
AL18
AL19
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL28
AL29
AL30
AL31
AL32
AL33
AL34
AL35
AL36
AR15
AR16
AR17
AR18
AR19
AR20
AR21
AR22
AR23
AR24
AR25
AR26
AR27
AR28
AR29
G1
G200-100-B1
BGA2236
COMMON
NVVDDNVVDD
AR30
AR31
AR32
AR33
AR34
AR35AJ28
AR36
AT16
AT18
AT20
AT22
AT24
AT27
AT29
AT31
AT33
AT35
BB43
BC13
BC14
BC22
BC23
BC25
BC26
BC28
BC30
BC31
BC33
BC34
BC36
BC37
BC39
BC40
BC42
R15
R17
R19
R21
R23
R25
R26
R28
R30
R32
R34
R36
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
U27
U28
U29
U30
U31
U32
U33
U34
U35
U36
V15
V16
NVVDD
V17
V18
V19
V20
V21
V22
V23
V24
V25
V26
V27
V28
V29
V30
V31
V32
V33
V34
V35
V36
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
W26
W27
W28
W29
W30
W31
W32
W33
W34
W35
W36
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Power and GND (GPU and NVIOx)
G1
G200-100-B1
BGA2236
COMMON
FBVDDQ
AB13
AB43
AC13
AC43
AE43
AF13 BE48SNN_FBA_DBI5
AF43
AH13
AH43
AK13
AK43
AL13
AL43
AT13
AT43
AU13
AW43
AY13
L28
N16
N17
N19
N20
N22
N23
N25
N26
N28
N30
N31
N33
N34
N36
N37
N39
N40
T13
T43
U13
U43
W13
W43
Y13
Y43
BJ38
BG44
BL46
BG45
BE49
AY51
AP51
AR47
AM52
AL45
AJ49
AH45
AD49
W47
V52
V47
V50
R49
N53
J46
F48
G45
J41
F42
K39
G36
G32
E31
F27
H28
K24
E23
J22
F21
J16
E13
E10
J13
P9
K9
E8
L6
U5
U9
W5
AB9
AG6
AB3
AJ10
AH5
AN10
AR6
AR10
AU5
BB11
BF5
BJ8
BK6
BL7
SNN_FBA_DBI0
SNN_FBA_DBI1
SNN_FBA_DBI2
SNN_FBA_DBI3
SNN_FBA_DBI4BF51
SNN_FBA_DBI6
SNN_FBA_DBI7
SNN_FBB_DBI0
SNN_FBB_DBI1
SNN_FBB_DBI2
SNN_FBB_DBI3
SNN_FBB_DBI4
SNN_FBB_DBI5
SNN_FBB_DBI6
SNN_FBB_DBI7
SNN_FBC_DBI0
SNN_FBC_DBI1
SNN_FBC_DBI2
SNN_FBC_DBI3
SNN_FBC_DBI4
SNN_FBC_DBI5
SNN_FBC_DBI6
SNN_FBC_DBI7D50
SNN_FBD_DBI0
SNN_FBD_DBI1
SNN_FBD_DBI2
SNN_FBD_DBI3
SNN_FBD_DBI4
SNN_FBD_DBI5
SNN_FBD_DBI6
SNN_FBD_DBI7
SNN_FBE_DBI0
SNN_FBE_DBI1
SNN_FBE_DBI2
SNN_FBE_DBI3
SNN_FBE_DBI4
SNN_FBE_DBI5
SNN_FBE_DBI6
SNN_FBE_DBI7
SNN_FBF_DBI0
SNN_FBF_DBI1
SNN_FBF_DBI2
SNN_FBF_DBI3
SNN_FBF_DBI4
SNN_FBF_DBI5
SNN_FBF_DBI6
SNN_FBF_DBI7
SNN_FBG_DBI0
SNN_FBG_DBI1
SNN_FBG_DBI2
SNN_FBG_DBI3
SNN_FBG_DBI4
SNN_FBG_DBI5
SNN_FBG_DBI6
SNN_FBG_DBI7
SNN_FBH_DBI0
SNN_FBH_DBI1
SNN_FBH_DBI2
SNN_FBH_DBI3BE7
SNN_FBH_DBI4
SNN_FBH_DBI5
SNN_FBH_DBI6
SNN_FBH_DBI7BP8
www.vinafix.vn
SNN_SPARE_01
SNN_SPARE_02
SNN_SPARE_03
SNN_SPARE_04
SNN_SPARE_05
SNN_SPARE_06
SNN_SPARE_07
SNN_SPARE_08
SNN_SPARE_09
SNN_SPARE_10
SNN_SPARE_11
SNN_SPARE_12
SNN_SPARE_13
SNN_SPARE_14
SNN_SPARE_15
SNN_SPARE_16
SNN_SPARE_17
SNN_SPARE_18
SNN_SPARE_19
SNN_SPARE_20
SNN_SPARE_21
SNN_SPARE_22
SNN_SPARE_23
SNN_SPARE_24
SNN_SPARE_25
SNN_SPARE_26
SNN_SPARE_27
SNN_SPARE_28
SNN_SPARE_29
SNN_SPARE_30
SNN_SPARE_31
SNN_SPARE_32
SNN_SPARE_33
SNN_SPARE_34
SNN_SPARE_35
SNN_SPARE_36
SNN_SPARE_37
SNN_SPARE_38
SNN_SPARE_39
SNN_SPARE_40
SNN_SPARE_41
SNN_SPARE_42
SNN_SPARE_43
SNN_SPARE_44
SNN_SPARE_45
SNN_SPARE_46
SNN_SPARE_47
SNN_SPARE_48
SNN_SPARE_49
SNN_SPARE_50
SNN_SPARE_51
SNN_SPARE_52
SNN_SPARE_53
SNN_SPARE_54
SNN_SPARE_55
SNN_SPARE_56
SNN_SPARE_57
SNN_SPARE_58
SNN_SPARE_59
SNN_SPARE_60
SNN_SPARE_61
SNN_SPARE_62
SNN_SPARE_63
SNN_SPARE_64
SNN_SPARE_65
SNN_SPARE_66
SNN_SPARE_67
SNN_SPARE_68
SNN_SPARE_69
SNN_SPARE_70
SNN_SPARE_71
SNN_SPARE_72
SNN_SPARE_73
SNN_SPARE_74
G1
G200-100-B1
BGA2236
COMMON
SNN_GPU_NC_1
BB50
BD46
BE13
BE14
BE17
BE22 B2 SNN_GPU_NC_6
BE25
BE28
BE31
BE34
BF15
BF17
BF18
BF20
BF21
BF23
BF24
BF26
BF27
BF29
BF30
BF32
BF36
BF38
BF9
BG10
BG17
BG18
BG19
BG21
BG22
BG24
BG25
BG27
BG28
BG30
BG31
BG33
BG34
BG36
BG37
BG38
BG39
BG40
BG43
BG9
BH10
BH16
BH19
BH20
BH22
BH25
BH28
BH31
BH34
BH36
BH37
BH40
BH43
BH8
BJ18
BJ20
BJ30
BJ35
BJ36
BJ9
BK36
BL36
BL45
BN22
BN26
BN29
L13
L14
A2
A3
A53
A54
B54
B55
BB13
BC43
BE10
BE11
BE42
BE43
BE45
BE46
BF14
BG15
BG16
BH13
BN1
BN55
BP1
BP54
BP55
BR2
BR3
BR53
BR54
C1
C55
J45
K35
K45
L10
L36
L9
N13
N43
BP26
SNN_GPU_NC_2
SNN_GPU_NC_3
SNN_GPU_NC_4
SNN_GPU_NC_5B1
SNN_GPU_NC_7
SNN_GPU_NC_8
SNN_GPU_NC_9
SNN_GPU_NC_10
SNN_GPU_NC_11
SNN_GPU_NC_12
SNN_GPU_NC_13
SNN_GPU_NC_14
SNN_GPU_NC_15
SNN_GPU_NC_16
SNN_GPU_NC_17
SNN_GPU_NC_18
SNN_GPU_NC_19
SNN_GPU_NC_20
SNN_GPU_NC_21
SNN_GPU_NC_22
SNN_GPU_NC_23
SNN_GPU_NC_24BP2
SNN_GPU_NC_25
SNN_GPU_NC_26
SNN_GPU_NC_27
SNN_GPU_NC_28
SNN_GPU_NC_29
SNN_GPU_NC_30
SNN_GPU_NC_31
SNN_GPU_NC_32
SNN_GPU_NC_33
SNN_GPU_NC_34
SNN_GPU_NC_35
SNN_GPU_NC_36
SNN_GPU_NC_37
SNN_GPU_NC_38
SNN_GPU_NC_39
SNN_GPU_NC_40
GPU_TESTMODEBG42
R718
10K
5%
0402
COMMON
GNDGND
NVIOx SECTION GNDGPU SECTION MISC
U2
NVIO2-P-A2
BGA533
COMMON
AA2
AB26
AC11
AC14
AC17
AC20
AC23
AC5
AC8
AD2
AE26
AF12
AF15
AF18
AF21
AF24
AF3
AF6
AF9
B10
B13
B16
B19
B22
B25
B4
B7
C2
D12
D26
D8
E11
E14
E17
E20
E23
E5
E8
E9
F10
F2
G26
H23
H5
J11
J12
J14
J16
J17
J19
J2
J9
K26
L23
L5
M2
N26
P19
P23
P5
GND
U2
NVIO2-P-A2
BGA533
COMMON
SNN_NVIO_NC_01
SNN_NVIO_NC_02
SNN_NVIO_NC_03
SNN_NVIO_NC_04
SNN_NVIO_NC_05
SNN_NVIO_NC_06
SNN_NVIO_NC_07
SNN_NVIO_NC_08
SNN_NVIO_NC_09
SNN_NVIO_NC_10
SNN_NVIO_NC_11
SNN_NVIO_NC_12
SNN_NVIO_NC_13
SNN_NVIO_NC_14
SNN_NVIO_NC_15
SNN_NVIO_NC_16
SNN_NVIO_NC_17
SNN_NVIO_NC_18
SNN_NVIO_NC_19
SNN_NVIO_NC_20
SNN_NVIO_NC_21
SNN_NVIO_NC_22
SNN_NVIO_NC_23
SNN_NVIO_NC_24
SNN_NVIO_NC_25
SNN_NVIO_NC_26
SNN_NVIO_NC_27
SNN_NVIO_NC_28
SNN_NVIO_NC_29
SNN_NVIO_NC_30
A10
A12
AB21
AB8
AB9
AC21
AC22
AC24
AC7
AD27
AF25
B11
B12
B14
C10
C12
C13
C18
C4
C9
D10
D11
D13
D14
D7
D9
E10
E12
E13
E21
600-10897-0053-300 A
p897
misun
R2
T26
U23
U5
V2
W11
W12
W14
W16
W17
W19
W26
W9
Y23
Y5
M13
M15
M16
N11
N12
N13
N14
N15
N16
P11
P12
P13
P14
P15
P16
P17
R12
R13
R14
R15
R16
R17
T12
T13
T15
SNN_NVIO_NC_31
E7
SNN_NVIO_NC_32
F11
SNN_NVIO_NC_33
F12
SNN_NVIO_NC_34
F13
SNN_NVIO_NC_35
F14
SNN_NVIO_NC_36
F21
SNN_NVIO_NC_37
F22
SNN_NVIO_NC_38
F7
SNN_NVIO_NC_39
F8
SNN_NVIO_NC_40
F9
SNN_NVIO_NC_41
G23
SNN_NVIO_NC_42
H22
SNN_NVIO_NC_43
J23
SNN_NVIO_NC_44
K23
SNN_NVIO_NC_45
K24
SNN_NVIO_NC_46
L22
SNN_NVIO_NC_47
N5
SNN_NVIO_NC_48
N6
SNN_NVIO_NC_49
N9
SNN_NVIO_NC_50
P22
SNN_NVIO_NC_51
R3
SNN_NVIO_NC_52
R6
SNN_NVIO_NC_53
T3
SNN_NVIO_NC_54
T6
SNN_NVIO_NC_55
U22
SNN_NVIO_NC_56
U24
SNN_NVIO_NC_57
U4
SNN_NVIO_NC_58
V6
SNN_NVIO_NC_59
W6
SNN_NVIO_NC_60
Y22
SNN_NVIO_NC_61Y24
GND
28 OF 41
31-DEC-2008
Page 29
POLYSWITCH
S
D
G
OUT
TAB
GND/ADJ
IN
S
D
G
VCC5
UGATE
BOOT
PVCC5
PHASE
LGATE
SW_FB
COMP
LDO_FB
LDO_DR
FS_DIS
VCC12
PGND
GND
OUT
OUT
ADJ
GND
IN
EN
S
D
G
S
D
G
S
D
G
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Power Supply: 2V5 / PEX_PLLVDD / 1V15 (PEX_VDD, GV_VDD)
PEX PLLVDD optional Supply
5V Linear
3V3
GND
C786
1UF
16V
10%
X5R
0603
NO STUFF
1
3
U509
UP7707
ADJ_VR=0.8V
SOT23-5
SOT23-5
NO STUFF
2
GND
Will stuf UP7703
5
4
PEX_PLLVDD_OP_ADJ
120mA
R727
536
1%
0402
NO STUFF
R728
1.24K
1%
0402
NO STUFF
GND
PEX_PLLVDD_OP
Rtop
Rbot
C772
4.7UF
6.3V
10%
X5R
0603
NO STUFF
GND
Vref=0.8V
Vo_Typ=0.8*(1+536/1240)=1.146V
3.4H>
12V_PEX6_F1
DIODE_SMD_MELF_5_20X2_60
R606
0402
0
COMMON
5%
DL4001
D8
1
2
NO STUFF
20MIL5V_INPUT
C535
1UF
16V
10%
X7R
0805
GND
GND
C534
.1UF
50V
10%
X7R
0603
COMMONCOMMON
U508
APL1117UC
ADJ_VR=1.25V
GOI,IGOI,TO263
SOT223_GOI
CHANGED
3
5V @ 0.2A
2
4
1
5V_ADJ
C533
4.7UF
6.3V
10%
X5R
0603
COMMON
R610
124
Rt
1%
0402
COMMON
R609
383
1%
Rb
0402
COMMON
For RT9164AGL
Vref=1.256V
Vo_Typ=1.256*(1+383/124)+60uA*383=5.158V
GND
For APL1117
Vref=1.250V
Vo_Typ=1.250*(1+383/124)+60uA*383=5.134V
1V15 (PEX_VDD AND GV_VDD/Q) and 2V5
3V3
C15
C14
4.7UF
.1UF
6.3V
2V5 @ 1.7A
Vref=0.8V
Vo_Typ=0.8*(1+4.75/2.21)=2.519V
2V5
GND
2.5V
1.7A
16MIL
C10
100UF
NO STUFF
20%
6.3V
POSCAP
0.99A
70MR
SMD_3528
CONTINUOUS_CURRENT=25A@25C,21A@100C
R_DS_ON=0.022R@10V,0.029R@4.5V
C12
10UF
10V
10%
X5R
0805
COMMON
GND
31.1G<
AOD4120
COMBI_MONO_1G2D1S
MAX_VOLTAGE=30V
MAX_CURRENT=75A
MAX_WATTAGE=2.5W@25C,1.6W@70C
V_BE_GS=+/-16V
C13
10UF
10V
10%
X5R
0805
COMMON
GND
26.1H>
1G2D1S
4
2
Q1
COMMON
3
PS1_2V5_LDO_DR_AC
R897
4.75K
1%
Rt
0402
COMMON
R895
2.21K
1%
Rb
0402
COMMON
GND
THERM_SHDN_D*
6.3V
10%
10%
X5RX7R
0603
0402
COMMON
COMMON
GND
GND
1
R898
10K
5%
0402
COMMON
C1200
120PF
50V
5%
C0G
0402
COMMON
12V_F
R881
10K
5%
0402
COMMON
PS1_1V15_EN*
1
3
Q513
2N7002
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
1G1D1S
12V_F
R880
0402
12MIL
PS1_2V5_LDO_DR
12MIL
PS1_2V5_LDO_FB
1G1D1S
3
Q514
2N7002
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
FREQ_SET = 47.5K FOR 600KHz
FREQ_SET = 110K FOR 300KHz
5%
2.2
COMMON
10MIL
PS1_1V15_FS
16MIL
PS1_VCC12
GND
R889
47.5K
1%
0402
COMMON
GND
C1186
1UF
16V
10%
X5R
0603
COMMON
U1
P2349WF-B3
VR_SW=0.8V, VR_LD=0.8V
SO14
SO14
CHANGED12V
8
5
6
9
10
14
1
13
16MIL
PS1_VCC5
20MIL
PS1_PVCC5
20MIL
PS1_1V15_UG
20MIL
PS1_1V15_BOOT
20MIL 12V
PS1_1V15_PH
R899
10
1%
0402
COMMON
C1185
0603
0402
5%
1UF
16V
10%
X5R
COMMON
2
20MIL
PS1_1V15_LG
11
10MIL
PS1_1V15_FB
4
12
7
GND
10MIL
PS1_1V15_CP3
C1174
0402
Power Supply: 2V5 / PEX_PLLVDD / 1V15 (PEX_VDD, GV_VDD)
www.vinafix.vn
0R20
COMMON
.1UF
6.3V
10%
X7R
COMMON
C1184
1UF
16V
10%
X5R
0603
COMMON
20MIL
PS1_1V15_UG_R
10MIL
PS1_1V15_CP_RC
C1181
GND
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=7.5A
R_DS_ON=0.022R
MAX_CURRENT=7.5A
MAX_WATTAGE=2W
V_BE_GS=+/-20V
220PF
50V0402
5%
C0G
COMMON
C1154
0402
R887
0402
C536
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
16V
10%
X7R
COMMON
1%
806
CHANGED
C537
10UF
10V
10%
X5R
0805
COMMON
GNDGND
1G2D1S
4
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=7.5A
R_DS_ON=0.022R
MAX_CURRENT=7.5A
MAX_WATTAGE=2W
V_BE_GS=+/-20V
Rb
GND
5V
0.2A
20MIL
C538
10UF
10V
10%
X5R
0805
NO STUFF
GND
Input ripple Irms ~2.2A for 1.2V@6A
Stuff with 3x 10uF, X5R,0805, 16V RIPPLE ~ 2A@300..600kHZ
Please Close to TOP FET
.47UF
6
5
Q4
AO4842L
SO8_DUAL_1G2D1S
COMMON
3
1G2D1S
C1144
1000PF
16V
10%
X7R
0402
COMMON
GND
R893
1.13K
1%
0402
COMMON
C23
0603
2
16V
10%
X7R
COMMON
8
7
Q4
AO4842L
SO8_DUAL_1G2D1S
COMMON
1
R890
0402
1%
GND
100
CHANGED
GND
CONTINUOUS_CURRENT=14.5A
MAX_CURRENT=23A
DC_RESISTANCE=0.00605R
7_6X7_6
C1152
2200PF
50V
10%
X7R
0603
COMMON
16MIL
PS1_1V15_PH_RC
R867
5.6
5%
1206
COMMON
GND
R888
0402
1%
Rt
10MIL
PS1_1V15_FB_RC
Vref=0.8V
Vo_Typ=0.8*(1+0.499/1.13)=1.153V
DDC_5V
C33
10UF
16V
X5R
1206
0.68UH
L5
COMMON
PS1_1V15_FB_SEN
499
COMMON
C1172
0402
5V5V
CONTINUOUS_CURRENT=0.5A@20C
DC_RESISTANCE=0.15R-0.4R
C28
10UF
16V
10% 10%10%
X5R
1206
COMMONCOMMON
10MIL
.022UF
16V
10%
X7R
COMMON
5V @ 200mA
5V
0.2A
16MIL
DDC_5V
GND
12V_F
GND
C30
10UF
16V
X5R
1206
COMMON
F1
VALUE=500mA
1206
COMMON
1
2
PEX_VDD, GV
1V15 @ 4.5A
R879
0
5%
0402
COMMON
For Bandwidth Test
600-10897-0053-300 A
p897
misun
C8
1000PF
16V
10%
X7R
0402
COMMON
1.15V
6A
16MIL
C22
10UF
10V
10%
X5R
0805
COMMON
1V15
GND
C21
330UF
COMMON
20%
2.5V
POSCAP
3.0A
0.009R
SMD_7343
29 OF 41
31-DEC-2008
Page 30
IN
S
D
G
S
D
G
S
D
G
UGATE
VCC12
PVCC5
BOOT
PHASE
LGATE
SW_FB
COMP
LDO_FB
FS_DIS
LDO_DR
VCC5
GND
PGND
S
DGC
E
B
IN
OUT
OUT
OUT
16/21 POWER SENSE
FBVDDQ_GND_MSUR
FBVDDQ_MSUR
THERM_LD_STEP0
THERM_LD_STEP1
NVVDD_MSUR
NVVDD_GND_MSUR
FBVDDQ_GND_SENSE
FBVDDQ_SENSE
NVVDD_GND_SENSE
NVVDD_SENSE
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Power Supply: Combined FBVDD/Q
12V_F
Input ripple Irms ~9.5A
1
2
GND
.01UF
16V0402
10%
X7R
COMMON
GND
D519
RSX201L-30
SMA
30V
2A
NO STUFF
C11
270UF
COMMON
20%
16V
XCON
5A
0.013R
TH_D80P35
GND
C29
2200PF
50V
10%
X7R
0603
COMMON
PS3_FBVDDQ_RC
20MIL
R26
1
5%
1206
COMMON
CONTINUOUS_CURRENT=25A
MAX_CURRENT=30A
DC_RESISTANCE=0.00143R
0.56UHL6
COMMONSMD_420X400
PS3_FBVDDQ_VSEN
FBVDDQ = 1.9-2.1V @ 25A
2.1V
25A
14MIL
C39
10UF
10V
10%
X5R
0805
NO STUFF
C35
220UF
COMMON
+10/-35%
4V
POSCAP
0.015R0.015R
SMD_7343
GND
30.4B>
R930
470
5%
0402
NO STUFF
R931
0402
C1120
10UF
10V
10%
X5R
0805
COMMON
C36
220UF
COMMON
+10/-35%
4V
POSCAP
SMD_7343
FBVDDQ_SENSE
0
COMMON
5%
FBVDD/Q
C1119
10UF
10V
10%
X5R
0805
COMMON
C37
220UF
COMMON
+10/-35%
4V
POSCAP
2.7A@105C2.7A@105C 2.7A@105C
0.015R
SMD_7343
C1118
10UF
10V
10%
X5R
0805
COMMON
FBVDDQ
GND
C38
10UF
10V
10%
X5R
0805
NO STUFF
GND
2
Q3
NTD4858NT4G
COMBI_MONO_1G2D1S
CHANGED
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
GND
1.82K
COMMON
C18
270UF
COMMON
20%
16V
XCON
5A
0.013R
TH_D80P35
C1228PS3_FBVDDQ_FB_RC
12V_F
R902
2.2
5%
0603
COMMON
1UF
C1143
16V
0603
10%
X5R
COMMON
0603
PS3_FS_DIS
16V
10%
X5R
COMMON
PS3_VCC51UF
R915
59K
1%
0402
COMMON
PS3_LDO_RC
GND
31.5E>
PS5_NVVDD_PGOOD_R
1B1C1E
12V_F
R924
10K
5%
0402
COMMON
3
Q515
MMBT2222A
1
SOT23_1B1C1E
COMMON
2
1G1D1S
3
Q516
2N7002
SOT23_1G1D1S
1PS3_NVVDD_PGOOD*
COMMON
2
C1166
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
R885
10
1%
0402
COMMON
9
5
6
2
12
7
U512
UP6161NSAC
VR_SW=0.8V
SO14
SO14
COMMON
8
10
14
13
11
4
3
12V_PS3_R
PS3_PVCC5_DRV
PS3_FBVDDQ_BOOT1
PS3_FBVDDQ_UG
PS3_FBVDDQ_PHASE
PS3_FBVDDQ_LG
PS3_FBVDDQ_FB
PS3_FBVDDQ_CP
GND
GND
GND
GND
FREQ_SET = 80.6K FOR 400KHz
FREQ_SET = 59K FOR 500KHz
10MIL
C1229
0402
C1187
20MIL
20MIL
20MIL
10MIL
0603
.022UF
16V
10%
X7R
COMMON
1UF
16V
10%
X5R
COMMON
R896
0402
20MIL
R886
0402
R860
0402
PS3_FBVDDQ_LG_D
PS3_FBVDDQ_CP_RC
5%
5%
5%
0
COMMON
0603
0
COMMON
0
NO STUFF
C1224
GND
20MIL
PS3_FBVDDQ_UG_R
.1UFC1211
50V
10%
X7R
COMMON
PS3_FBVDDQ_LG_G
20MIL
3
20MIL
100PF
50V
0402
5%
C0G
COMMON
2
1
R920
0402
1G1D1S
D520
BAV99
SOT23
100V
100MA
NO STUFF
1%
1
1G1D1S
GND
3.01K
COMMON
1
R856
470
5%
0402
NO STUFF
C19
10UF
16V
10%
X5R
1206
COMMON
Place near HFET
.47UF
C20
16V
0603
10%
X7R
COMMON
HFET will stuff NTD4863
2
Q2
NTD4863NT4G
COMBI_MONO_1G2D1S
CHANGED
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3M@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
2
Q5
NTD4858NT4G
COMBI_MONO_1G2D1S
CHANGED
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
1G1D1S
1
GND
LFET will stuff NTD4858
100
R922
COMMON
0402
1%
R918
R919
1.33K
Rb
1%
0402
CHANGED
0402
Rt
1%
GND
Vref=0.8V
Vo_Typ=0.8*(1+1.82/1.15)=2.066V for Hynix memory
NVVDD & FBVDDQ SENSE/MSUR
G1
G200-100-B1
BGA2236
COMMON
AJ26
AJ25
AP43
AN43
AP13
AN13
AE25
AE26
BG41
BE40
10MIL
1.1V
NVVDD_SENSE
10MIL
0V
NVVDD_SENSE_GND
10MIL
2.05V
FBVDDQ_SENSE
SNN_FBVDDQ_GND_MSUR
SNN_FBVDDQ_MSUR
SNN_NVVDD_GND_MSUR
SNN_NVVDD_MSUR
SNN_THERM_LD_STEP0
SNN_THERM_LD_STEP1
TP502
TP503
TP501
GND
31.4H<
31.5H<
30.3G<
www.vinafix.vn
Vo_Typ=0.8*(1+1.82/1.33)=1.895V for Samsung memory
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Power Supply: Combined FBVDD/Q
600-10897-0053-300 A
p897
misun
30 OF 41
31-DEC-2008
Page 31
OUT
IN
C
EBS
D
G
S
D
G
ININININININININININOUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PWM3
PWM4
PWM6
PWM5
PWM2
SW6
OD1*
PWM1
ODN*
SW5
SW1
SW2
SW3
SW4
CSSUM
ILIMFS
CSCOMP
CSREF
LLSET
FB
COMP
IMON
FBRTN
VCC
VID1
VID2
VID3
VID0
VID6
VID7
VID5
VID4
PSI*
VRHOT
PSI_SET
TRDET
RAMPADJ
EN
PWRGD
RT
IREF
TTSENSE
VCC3
NC1
GND
NC4
NC3
NC2
TP
OUT
OUTININ
S
D
G
S
D
G
OUTININININ
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Power Supply: NVVDD Regulator
GPIO5
GPIO6
GPIO10
GPIO7
VOLTAGE
VID0
VID1
VID2
VID3
VID4
1 1.20625
0
0
0
0 0
0
0
0
0 0
00
1
0
0
0
0
0
1
0
0
1
0
1
1
1
1
1
1.20000
0
1.19375
1
1.18750
0
1.18125
1
1.17500
0
1 1.16875
0 1 00 0 1.16250
0
1
0
0 1
1
0
0 1
1
0
0
1
0
1
1
0
1 0 0
1
0
1
0
01
0
1
01
11
1
1
1
1
1
0
1
0
0
1
0
1
1
1
1
1
0
0
0
0
1
1
0
0
1
0
1
1
1
1
1
0
0
0
0
1
0
1.15000
0
1.14375
1
1.13750
0
1.13125
1
1.12500
0
1.11875
1
1.11250
0
1.10625
1
0 1.10000
1.09375
1
1.08750
0
1.08125
1
0
1.07500
1.06875
1
0
1.06250
1
1.05625
0 1.05000
1.15625
1
0
0
1
NVVDD Voltage Select
ADP4100 has VID offset controlled by Rb
Here VID code can set higher to counteract
this offset voltage.
GT200-103-A2
VB0
VB1
GT200-103-B2
VB0
VB1
VB0/VB1
GT200-103-B3
VB0
VB1
VB0/VB1
BOOT VOLTAGE
2D MODE, DOS;
3D MODE, P0 MODE;
2D MODE, P8 MODE;
2D MODE, P12 MODE;
2D MODE, DOS;
3D MODE, P0 MODE;
2D MODE, P8 MODE;
2D MODE, P12 MODE;
BOOT VOLTAGE
3D MODE, P0 MODE;
3D MODE, P0 MODE;
2D MODE, P8 MODE;
2D MODE, P12 MODE;
2D MODE, DOS;
BOOT VOLTAGE
3D MODE, P0 MODE;
3D MODE, P0 MODE;
2D MODE, P8 MODE;
2D MODE, P12 MODE;
2D MODE, DOS;
VOLTAGE
1.1875V
1.1250V
1.1125V
1.1500V
1.0625V
1.0500V
1.1875V
1.1250V
1.0625V
1.0500V
1.1875V
1.1875V
1.1000V
1.0500V
--Default
31.3D<
Option for PSI mode
for GT200-103-B2/B3
Stuff Q27 & R71
for GT200-103-B3
Stuff Q27, Q26 & R76
for GT200-103-B2
25.3F>
25.3F>
25.3F>
25.3F>
25.3F>
GPIO5_PS5_NVVDD_VID1
GPIO6_PS5_NVVDD_VID2
GPIO7_PS5_NVVDD_VID3
GPIO10_PS5_NVVDD_VID4
GPIO4_PS5_NVVDD_VID4
VID SETTING
1.20625V 0
1.14375V
1.13125V
1.16875V
1.08125V
1.06875V
1.20625V
1.14375V
1.08125V
1.06875V
1.20625V
1.20625V
1.11875V
1.06875V
PS5_NVVDD_STATUS_PSI*
3V3
R76
10K
5%
0402
NO STUFF
VID_PSI
R71
0
5%
0402
NO STUFF
GPIO7GPIO10
VID3
VID4
0
0
0
1
1
0
0
1
1
0
0
0
1
GND
R521
0402
5%
0402
5%
R530
0402
5%
R878
0402
5%
R877
0402
5%
GPIO6
VID2
1
1
0
0 1
0
0
0
1 1
3
Q27
2
3
Q26
2
0
COMMON
0R526
COMMON
0
COMMON
0
COMMON
0
NO STUFF
12V_PEX6_F1
00
0
1
1
1
0
01
10
10
0
00
1
CONTINUOUS_CURRENT=0.115A
PS5_NVVDD_VID4
1
1G1D1S
CONTINUOUS_CURRENT=0.115A
PS5_NVVDD_VID1
1
1G1D1S
GPIO5
VID1
0
1
0
1
0
1
0
1
0
1
0
0
1
10
2N7002
SOT23_1G1D1S
NO STUFF
MAX_VOLTAGE=60V
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
2N7002
SOT23_1G1D1S
NO STUFF
MAX_VOLTAGE=60V
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
R80
0402
5%
R518
10K
5%
0402
COMMON
1K
COMMON
GND
R527
R522
10K
10K
5%
5%
0402
0402
COMMON
COMMON
GND
PS5_NVVDD_SET_RAMPADJ_R
C146
1UF
16V
10%
X5R
0603
COMMON
GND
4 phase:
301K for 350KHz
6 phase:
196K for 350KHz
12V_PEX6_F1
D502
1
1N4148
SOT23
75V
200MA
3
COMMON
20MIL
GND
GND
GND
GND
R531
10K
5%
0402
COMMON
3V3
3V3
3V3
31.4H<
31.2B>
31.1H>
R532
10K
5%
0402
COMMON
R501
0402
R502
0402
C505
R504
0402
R503
0402
R513
0402
0603
1%
1%
1%
5%
5%
301K
COMMON
121K
COMMON
1UF
6.3V
10%
X7R
COMMON
R517
10K
5%
0402
COMMON
PS5_NVVDD_VID0
PS5_NVVDD_VID1
PS5_NVVDD_VID2
PS5_NVVDD_VID3
PS5_NVVDD_VID4
SNN_PS5_NVVDD_VID5
PS5_NVVDD_VID6
SNN_PS5_NVVDD_VID7
SNN_PS5_NVVDD_VRHOT
PS5_NVVDD_SET_RAMPADJ
453K
CHANGED
PS5_NVVDD_SET_TRDET
PS5_NVVDD_STATUS_PSI_SET
1K
COMMON
PS5_NVVDD_STATUS_PSI*
1K
COMMON
PS5_NVVDD_PGOOD
PS5_NVVDD_EN
PS5_NVVDD_FS
PS5_NVVDD_IDES
SNN_PS5_NVVDD_TTSENSE
PS5_NVVDD_VCC_VCC3
SNN_PS5_NVVDD_PIN1
SNN_PS5_NVVDD_PIN2
SNN_PS5_NVVDD_PIN3
SNN_PS5_NVVDD_PIN4
PS5_NVVDD_VIN_PWM
R555
680
5%
0603
COMMON
20MIL
PS5_NVVDD_VCC
C516
1UF
16V
10%
X5R
0603
COMMON
GND
R546
680
5%
0603
COMMON
C517
1UF
16V
10%
X5R
0603
COMMON
GND
U501
ADP4100
DYNAMIC VID(0.375V..1.6V)
QFN48
COMMON
37
45
44
43
42
41
40
39
38
11
14
15
7
46
47
5
13
12
10
48
1
3
2
4
6
49
R512
0402
Power Sequence Option
NVVDD
R511
3.3K
5%
0402
COMMON
0
COMMON
5%
3V3
R516
3.3K
5%
0402
NO STUFF
R506 C510
7.5K
5%
0402
NO STUFF
.1UF
6.3V
10%
X7R
0402
COMMON
GND
PS5_NVVDD_PGOOD_R
GND
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
NVVDD Regulator
www.vinafix.vn
30.3A<
PS5_NVVDD_PWM6
31
PS5_NVVDD_PWM5
32
PS5_NVVDD_PWM4
33
PS5_NVVDD_PWM3
34
PS5_NVVDD_PWM2
35
PS5_NVVDD_PWM1
36
PS5_NVVDD_DRV_ODN
23
PS5_NVVDD_DRV_OD1
24
PS5_NVVDD_ISEN6
25
PS5_NVVDD_ISEN5
26
PS5_NVVDD_ISEN4
27
PS5_NVVDD_ISEN3
28
PS5_NVVDD_ISEN2
29
PS5_NVVDD_ISEN1
30
PS5_NVVDD_VAMP_CSSUM
20
PS5_NVVDD_SET_ILIMFS
22
PS5_NVVDD_VAMP_CSCOMP
21
PS5_NVVDD_SET_LSSET
8
PS5_NVVDD_VAMP_CSREF
19
GND
PS5_NVVDD_FB
18
PS5_NVVDD_CP
17
PS5_NVVDD_SET_IMON
9
PS5_NVVDD_FBRTN16
Stuff for 4 phase config
5%
0402
COMMON
0
R543
NO STUFF
0402
5%
0
R542
NO STUFF
0402
5%
0
R541
COMMON
0402
5%
0
R540
COMMON
0402
5%
0
R539
COMMON
0402
5%
0
R538
COMMON
0402
5%
R529
0402
1000PFC512
16V0402
10%
X7R
COMMON
C506
1000PF
16V
10%
X7R
0402
COMMON
PS5_NVVDD_VAMP_CSREF
R507
4.99K
1%
0402
COMMON
GND
R537R547
00
5%
0402
COMMON
1%
1K
CHANGED
C507
.1UF
16V
10%
X7R
0402
COMMON
33.4B<
33.3B<
33.2B<
32.4B<
32.3B<
32.2B<
32.3B<
32.2B<
R533
0402
R535
0402
1%
1%
C509
22PF
5%
C0G
0402
CHANGED
12V_PEX6_F2
33.2A<
33.2A< 32.4A<
22.1K
COMMON
2.05K
COMMON
31.4F<
PS5_NVVDD_CP_RC
R75
10K
5%
0402
COMMON
PS5_NVVDD_EN_12V_F2
R70
3.3K
5%
0402
COMMON
12V_F
R83
10K
5%
0402
COMMON
PS5_NVVDD_EN_12V_F
R82
3.3K
5%
0402
COMMON
33.4B<
33.3B< 32.4A<
C515
4700PF
25V
10%
X7R
0402
CHANGED
32.2F> 32.3F>
R515
10K
1%
0402
CHANGED
.22UF
6.3V
10%
X5R
0402
CHANGED
29.5B<
GND
GND
32.5F>
R520
0
5%
0402
NO STUFF
C511C508
PS5_NVVDD_FB_RC
220PF
50V
5%
C0G
0402
NO STUFF
NVVDD_SENSE_R
26.1H>
PS5_NVVDD_EN*
1G1D1S
1
C142
.1UF
6.3V
10%
X7R
0402
COMMON
1G1D1S
1
C147
.1UF
6.3V
10%
X7R
0402
COMMON
R553
97.6K
1%
0402
NO STUFF
C514
.01UF
16V
10%
X7R
0402
CHANGED
R514
1.18K
1%50V
0402
COMMON
THERM_SHDN_D*
12V_PEX6_F1
R77
10K
5%
0402
COMMON
1B1C1E
3
Q28
2N7002
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
PS5_NVVDD_EN_Q
3
Q29
2N7002
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
1
3
Q25
MMBT2222A
SOT23_1B1C1E
COMMON
2
GND
3V3
Power sequence
R550
R551
R552
97.6K
1%
0402
NO STUFF
100KR50
NO STUFF
0603
5%
0
R534
CHANGED
0402
5%
33.5G>
33.3G> 33.2G>
69.8K
R525
COMMON
0402
1%
R524
0402
5%
R523
0402
5%
R508
0402
5%
R509
0402
5%
19.6K
19.6K
1%
1%
0402
0402
CHANGED
CHANGED
R528
PS5_NVVDD_VAMP_CSSUM_RC
PS5_NVVDD_SET_TRDET_RC
0402
R505
0402
C503
270PF
50V
5%
C0G
0402
COMMON
GND
10
NO STUFF
NVVDD_SENSE
0
COMMON
NVVDD_SENSE_GND
0
COMMON
10
NO STUFF
0
R81
COMMON
0402
5%
R79
10K
5%
0402
NO STUFF
PS5_NVVDD_EN
R78
8.2K
0402
NO STUFF
GND
PS5_NVVDD_PHASE6
PS5_NVVDD_PHASE5
PS5_NVVDD_PHASE4
PS5_NVVDD_PHASE3
PS5_NVVDD_PHASE2
PS5_NVVDD_PHASE1
R549
19.6K
1%
0402
CHANGED
19.6K
CHANGED
1%
10K
COMMON
1%
C501
1UF
6.3V5%
10%
X5R
0402
COMMON
GND
R548
19.6K
1%
0402
CHANGED
PLACE AS CLOSE AS POSSIBLE TO
NEAREST INDUCTOR
PS5_NVVDD_SET_TRDET
31.3D<
33.5G>
33.3G>
33.2G>
32.5F>
32.3F>
32.2F>
NVVDD
30.4B>
30.4B>
GND
600-10897-0053-300 A
p897
misun
31.3D>
31 OF 41
31-DEC-2008
Page 32
OUT
OUT
OUT
OUT
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
OUT
OUT
S
D
G
S
D
G
S
D
G
IN
DRVH
SWN
BST
DRVL
OD*
IN
VCC
PGND
TP
INININ
DRVH
SWN
BST
DRVL
OD*
IN
VCC
PGND
TP
OUT
IN
DRVH
SWN
BST
DRVL
OD*
IN
VCC
PGND
TP
IN
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Power Supply: NVVDD Phase 1,2,3 powered from external PEX 6PIN
NVVDD
1V
110A
16MIL
GND
GND
GND
GND
GNDGND GND
C106
390UF
COMMON
20%
2.5V
NPCAP
3.9A@105C
0.010R
SMD_D60
C108
390UF
COMMON
20%
2.5V
NPCAP
3.9A@105C
0.010R
SMD_D60
C107
390UF
COMMON
20%
2.5V
NPCAP
3.9A@105C
0.010R
SMD_D60
C105
390UF
NO STUFF
20%
2.5V
NPCAP
3.9A@105C
0.010R
SMD_D60
C98
10UF
10V
10%
X5R
0805
COMMON
GND
C101
10UF
10V
10%
X5R
0805
NO STUFF
C94
10UF
U502
ADP3110
MOSFET_DRIVE
DFN8
COMMON
2PS5_NVVDD_PWM1
3
33.2A<
32.4A<
31.3F>
31.3F>
PS5_NVVDD_DRV_OD1
12V_PEX6_F1
5%
C520
1UF
16V
10%
X5R
0603
COMMON
12V_PH1
2.2
R566
COMMON
0603
4
6
9
GND
12V_PEX6_F1
3
U503
ADP3110
MOSFET_DRIVE
DFN8
COMMON
31.2F>
31.3F>
32.4A<
33.2A< 33.3B< 33.4B<
PS5_NVVDD_DRV_ODN
2PS5_NVVDD_PWM2
3
D503
BAT54A
30V
200MA
SOT23
COMMON
PS5_NVVDD_UG18
20MIL
PS5_NVVDD_PHASE1
7
20MIL
PS5_NVVDD_BOOT1
1
20MIL
PS5_NVVDD_LG1
5
20MIL
PS5_NVVDD_BOOT1_RC
1
PS5_NVVDD_BOOT2_RC
2
PS5_NVVDD_UG2
8
PS5_NVVDD_PHASE2
7
PS5_NVVDD_BOOT2
1
20MIL
20MIL
20MIL
20MIL
20MIL
R560
0402
5%
PS5_NVVDD_BOOT1_RC
20MIL
R585
0402
5%
R579
0402
5%
R573
0402
5%
R561
0402
5%
12V_PEX6_F1
5%
C521
1UF
16V
10%
X5R
0603
COMMON
12V_PH2
2.2
R567
COMMON
0603
4
R586
0402
6
9
PS5_NVVDD_LG2
5
20MIL
5%
04025%COMMON
GND
U507
ADP3110
MOSFET_DRIVE
DFN8
COMMON
2
3
4
6
9
D505
BAT54A
30V
200MA
SOT23
COMMON
3
PS5_NVVDD_BOOT4_RC
1
PS5_NVVDD_BOOT3_RC
2
PS5_NVVDD_UG3
8
PS5_NVVDD_PHASE3
7
PS5_NVVDD_BOOT3
1
PS5_NVVDD_LG35
20MIL
20MIL
20MIL
20MIL
20MIL
R584
0402
R578
0402
0402
R565
0402
5%
5%
12V_PEX6_F1
Stuff R559 for 6 phase config
Stuff R558 for 4 phase config
Option for 4 phase config
33.2A<
31.3F>
32.2B<
33.4B<
33.2A<
31.3F>
32.3B<
33.3B<
PS5_NVVDD_DRV_OD1
PS5_NVVDD_DRV_ODN
R558
0402
R559
0402
5%
5%
0
COMMON
0
NO STUFF
12V_PEX6_F1
R571
0603
31.2F>
5%
PS5_NVVDD_DRV_PHASE3
2.2
COMMON
PS5_NVVDD_PWM3
12V_PH3
C525
1UF
16V
10%
X5R
0603
COMMON
GND
0R572
0
COMMON
PS5_NVVDD_LG1_D
0
NO STUFF
PS5_NVVDD_LG1_AC
0
COMMON
0
COMMON
0
COMMON
PS5_NVVDD_LG2_D
0
20MIL
NO STUFF
PS5_NVVDD_LG2_AC
0R583
20MIL
33.2C<
0R577
COMMON
5%
0
COMMON
5%
PS5_NVVDD_LG3_D
0
20MIL
NO STUFF
PS5_NVVDD_LG3_AC
0
20MIL
COMMON
PS5_NVVDD_UG1_R
20MIL04025%COMMON
.1UF
C526
50V
0603
10%
X7R
COMMON
1
3
20MIL
2
20MIL
.1UF
C527
50V0603
10%
X7R
COMMON
1
3
2
.1UF
C531
50V
0603
10%
X7R
COMMON
1
3
2
D507
BAV99
SOT23
100V
1G1D1S
100MA
NO STUFF
1
R597
470
5%
0402
NO STUFF
GND
HFET will stuff NTD4863
PS5_NVVDD_UG2_R
D508
BAV99
SOT23
100V
1G1D1S
100MA
NO STUFF
R598
470
5%
0402
NO STUFF
1
GND
PS5_NVVDD_UG3_R
D506
BAV99
SOT23
100V
1G1D1S
100MA
NO STUFF
R602
470
5%
0402
NO STUFF
20MIL
1
2
Q13
NTD4858NT4G
DPAK_1G1D1S
COMMON
3
GND
20MIL
1G1D1S
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
2
Q14
NTD4858NT4G
DPAK_1G1D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
GND
2
Q18
NTD4858NT4G
DPAK_1G1D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
GND
1
R590
10K
5%
0402
COMMON
1G1D1S
1G1D1S
1
R591
10K
5%
0402
COMMON
1
R595
10K
5%
0402
COMMON
1G1D1S
2
Q19
NTD4863NT4G
COMBI_MONO_1G2D1S
CHANGED
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3M@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
1
2
Q20
NTD4863NT4G
COMBI_MONO_1G2D1S
CHANGED
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3M@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
1G1D1S
1
2
Q24
NTD4863NT4G
COMBI_MONO_1G2D1S
CHANGED
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3M@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
1G1D1S
1
2
Q6
NTD4858NT4G
DPAK_1G1D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
GND
2
Q7
NTD4858NT4G
DPAK_1G1D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
GND
2
Q11
NTD4858NT4G
DPAK_1G1D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
GND
GND
Place near HFETHFET will stuff NTD4863
D512
1
RSX201L-30
SMA
30V
NO STUFF
60A
2
GND
Place near HFET
D513
1
RSX201L-30
SMA
30V
NO STUFF
60A
2
GND
Place near HFETHFET will stuff NTD4863
D517
1
RSX201L-30
SMA
30V
NO STUFF
60A
2
GND
GND
PS5_NVVDD_RC1
16MIL
R57
1
5%
1206
COMMON
GND
GND
GND
GND
GND
C122
.1UF
16V
10%
X7R
0402
NO STUFF
C127
10UF
16V
10%
X5R
1206
NO STUFF
GND
C109
2200PF
50V
10%
X7R
0603
COMMON
C121
.1UF
16V
10%
X7R
0402
COMMON
C126
10UF
16V
10%
X5R
1206
NO STUFF
GND GND GND
C110
2200PF
50V
10%
X7R
0603
COMMON
PS5_NVVDD_RC2
16MIL
R58
1
5%
1206
COMMON
C125
.1UF
16V
10%
X7R
0402
COMMON
C133
10UF
16V
10%
X5R
1206
NO STUFF
GND
C114
2200PF
50V
10%
X7R
0603
COMMON
PS5_NVVDD_RC3
16MIL
R62
1
5%
1206
COMMON
12V_PEX6_F1
C132
10UF
16V
10%
X5R
1206
NO STUFF
GND
SMD_420X400
DC_RESISTANCE=0.0009625R
MAX_CURRENT=68A
CONTINUOUS_CURRENT=35A
GND
0.22UH
L8
COMMON
12V_PEX6_F1
C131
10UF
16V
10%
X5R
1206
NO STUFF
L9
SMD_420X400
DC_RESISTANCE=0.0009625R
MAX_CURRENT=68A
CONTINUOUS_CURRENT=35A
COMMON
12V_PEX6_F2
C130
10UF
16V
10%
X5R
1206
NO STUFF
GND
L13
SMD_420X400 COMMON
DC_RESISTANCE=0.0009625R
MAX_CURRENT=68A
CONTINUOUS_CURRENT=35A
C140
270UF
COMMON
20%
16V
XCON
5A
0.013R
TH_D80P35
C143
270UF
COMMON
20%
16V
XCON
5A
0.013R
TH_D80P35
0.22UH
0.22UH
NVVDD
R53
10
1%
0402
NO STUFF
PS5_NVVDD_VAMP_CSREF
PS5_NVVDD_PHASE1
NVVDD
R52
10
1%
0402
COMMON
PS5_NVVDD_VAMP_CSREF
PS5_NVVDD_PHASE2
NVVDD
R51
10
1%
0402
COMMON
PS5_NVVDD_VAMP_CSREF
PS5_NVVDD_PHASE3
32.3F> 32.5F> 33.2G> 33.3G> 33.5G>
31.4F<
31.3H<
31.3H< 32.2F> 32.2F>
32.2F> 32.5F> 33.2G> 33.3G>
31.4F<
31.3H<
31.3H< 32.3F> 32.3F>
31.4F< 32.2F> 32.3F> 33.2G> 33.3G>
31.3H< 32.5F> 31.3H< 32.5F>
33.5G>
10V
10%
X5R
0805
COMMON
GND
C100
10UF
10V
10%
X5R
COMMON
GND
C102
10UF
10V
10%
X5R
0805
COMMON
GND
C95
10UF 10UF
10V
10%
X5R
0805
COMMON
GND
C99
10UF
10V
10%
X5R
0805
NO STUFF
For Transient Option
Put near GPU
33.5G>
C96
10UF
10V
10%
X5R
0805
COMMON
GND
C97
10UF
10V
10%
X5R
08050805
COMMON
GND
C93
10UF
10V
10%
X5R
0805
COMMON
GND
C104
10V
10%
X5R
0805
NO STUFF
GND
C103
10UF
10V
10%
X5R
0805
NO STUFF
NVVDD
C717
330UF
COMMON
20%
2.5V
POSCAP
3.0A
0.009R
SMD_7343
GND
The four current sense signals CSXN
are connected to the output inductor.
Route the four signals differential
with NVVDD_ISENX
www.vinafix.vn
Power Supply: NVVDD Phase 1-3 of 6
600-10897-0053-300 A
p897
misun
32 OF 41
31-DEC-2008
Page 33
OUT
OUT
OUT
OUT
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
OUT
OUT
S
D
G
S
D
G
S
D
G
IN
IN
DRVH
SWN
BST
DRVL
OD*
IN
VCC
PGND
TP
IN
IN
DRVH
SWN
BST
DRVL
OD*
IN
VCC
PGND
TP
INININ
IN
DRVH
SWN
BST
DRVL
OD*
IN
VCC
PGND
TP
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Power Supply: NVVDD Phase 4,5,6 powered from external PEX 6PIN
Stuff R557 for 4 phase config
Stuff R556 for 6 phase config
32.4A<
32.4A< 33.3B< 33.4B<
Option for 4 phase config
31.3F> 32.2B<
31.3F> 32.3B<
PS5_NVVDD_DRV_OD1
PS5_NVVDD_DRV_ODN
R556
0402
R557
0402
5%
5%
0
NO STUFF
0
COMMON
31.2F>
12V_PEX6_F1
R569
0603
5%
PS5_NVVDD_DRV_PHASE4
2.2
COMMON
PS5_NVVDD_PWM4
12V_PH4 4
C523
1UF
16V
10%
X5R
0603
COMMON
U505
ADP3110
MOSFET_DRIVE
DFN8
COMMON
2
3
6
9
PS5_NVVDD_UG4
8
20MIL
PS5_NVVDD_PHASE4
7
20MIL
PS5_NVVDD_BOOT4
1
20MIL
32.4C>
PS5_NVVDD_LG45
20MIL
0
R575
COMMON
0402
5%
0
R563
COMMON
0402
5%
PS5_NVVDD_BOOT4_RC
20MIL
PS5_NVVDD_LG4_D
0
R589
0402
5%
PS5_NVVDD_LG4_AC
0
R582
COMMON
0402
5%
20MILNO STUFF
20MIL
C529
0603
.1UF
50V
10%
X7R
COMMON
1
D511
BAV99
3
SOT23
100V
100MA
NO STUFF
2
GND
HFET will stuff NTD4863
PS5_NVVDD_UG4_R
20MIL
1
2
Q17
NTD4858NT4G
DPAK_1G1D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
R601
470
5%
0402
NO STUFF
1G1D1S
GND
1G1D1S
1
R593
10K
5%
0402
COMMON
2
Q23
NTD4863NT4G
COMBI_MONO_1G2D1S
CHANGED
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3M@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
1G1D1S
1
2
Q10
NTD4858NT4G
DPAK_1G1D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
GND
GND
U506
ADP3110
MOSFET_DRIVE
DFN8
NO STUFF
2
3
33.4B<
31.2F>
31.3F>
32.3B<
32.4A< 33.2A<
PS5_NVVDD_PWM5
PS5_NVVDD_DRV_ODN
12V_PEX6_F1
5%
C524
1UF
16V
10%
X5R
0603
NO STUFF
12V_PH5
2.2
R570
NO STUFF
0603
4
6
9
PS5_NVVDD_UG5
8
20MIL
PS5_NVVDD_PHASE5
7
20MIL
PS5_NVVDD_BOOT5
1
20MIL
PS5_NVVDD_LG5
5
20MIL
0
R576
NO STUFF
0402
5%
0
R564
NO STUFF
0402
5%
PS5_NVVDD_BOOT5_RC
20MIL
R588
0402
5%
R581
0402
5%
C530
0603
PS5_NVVDD_LG5_D
0
20MIL
NO STUFF
PS5_NVVDD_LG5_AC
0
20MIL
NO STUFF
.1UF
50V
10%
X7R
NO STUFF
3
1
2
GND
D504
BAT54A
U504
ADP3110
MOSFET_DRIVE
DFN8
NO STUFF
30V
200MA
SOT23
NO STUFF
3
PS5_NVVDD_BOOT5_RC
1
PS5_NVVDD_BOOT6_RC
2
PS5_NVVDD_UG6
8
PS5_NVVDD_PHASE6
7
PS5_NVVDD_BOOT61
PS5_NVVDD_LG6
5
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
R587
0402
R580
0402
R574
0402
R562
0402
0
NO STUFF
5%
0
NO STUFF
5%
PS5_NVVDD_LG6_D
0
5%
PS5_NVVDD_LG6_AC
0
NO STUFF
5%
20MILNO STUFF
20MIL
C528
0603
3
.1UF
50V
10%
X7R
NO STUFF
1
D509
BAV99
SOT23
100V
100MA
NO STUFF
2
12V_PEX6_F1
31.2F>
33.3B<
33.2A<
31.3F>
32.3B< 32.4A<
PS5_NVVDD_PWM6
PS5_NVVDD_DRV_ODN
2
3
12V_PEX6_F1
R568
0603
5%
2.2
NO STUFF
12V_PH6
C522
1UF
16V
10%
X5R
0603
NO STUFF
4
6
9
GND
HFET will stuff NTD4863
1G1D1S
PS5_NVVDD_UG5_R
20MIL
D510
BAV99
SOT23
100V
1G1D1S
100MA
NO STUFF
R600
470
5%
0402
NO STUFF
1
2
Q9
NTD4858NT4G
DPAK_1G1D1S
NO STUFF
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
GND
GND
HFET will stuff NTD4863
1G1D1S
PS5_NVVDD_UG6_R
20MIL
1
2
Q15
NTD4858NT4G
DPAK_1G1D1S
NO STUFF
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
R599
470
5%
0402
NO STUFF
1G1D1S
1
R594
10K
5%
0402
NO STUFF
1
R592
10K
5%
0402
NO STUFF
2
Q22
NTD4855NT4G
DPAK_1G1D1S
NO STUFF
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=18A@25C
R_DS_ON=0.0035R@10V
MAX_CURRENT=197A
MAX_WATTAGE=2.24W@25C
V_BE_GS=+/-20V
1G1D1S
1
2
Q21
NTD4855NT4G
DPAK_1G1D1S
NO STUFF
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=18A@25C
R_DS_ON=0.0035R@10V
MAX_CURRENT=197A
MAX_WATTAGE=2.24W@25C
V_BE_GS=+/-20V
1G1D1S
1
2
Q16
NTD4858NT4G
DPAK_1G1D1S
NO STUFF
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
2
Q8
NTD4858NT4G
DPAK_1G1D1S
NO STUFF
33
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=14A@25C
R_DS_ON=0.0052R@10V
MAX_CURRENT=146A
MAX_WATTAGE=2W@25C
V_BE_GS=+/-20V
GND
GND
Place near HFET
D516
1
RSX201L-30
SMA
30V
NO STUFF
60A
2
GND
Place near HFET
D515
1
RSX201L-30
SMA
30V
NO STUFF
60A
2
GNDGND
Place near HFET
D514
1
RSX201L-30
SMA
30V
NO STUFF
60A
2
GNDGND
GND
GND
GND
GND
GND
GND
C124
.1UF
16V
10%
X7R
0402
COMMON
C113
2200PF
50V
10%
X7R
0603
COMMON
PS5_NVVDD_RC4
16MIL
R61
1
5%
1206
COMMON
C123
.1UF
16V
10%
X7R
0402
NO STUFF
C112
2200PF
50V
10%
X7R
0603
NO STUFF
PS5_NVVDD_RC5
16MIL
R60
1
5%
1206
NO STUFF
C120
.1UF
16V
10%
X7R
0402
COMMON
C111
2200PF
50V
10%
X7R
0603
NO STUFF
PS5_NVVDD_RC6
16MIL
R59
1
5%
1206
NO STUFF
GND
GND
GND
C134
10UF
16V
10%
X5R
1206
NO STUFF
C128
10UF
10%
X5R
1206
NO STUFF
C136
10UF
16V
10%
X5R
1206
NO STUFF
12V_PEX6_F2
GND
COMMON
C141
270UF
COMMON
20%
16V
XCON
5A
0.013R
TH_D80P35
0.22UHL12
C135
10UF
16V
10%
X5R
1206
NO STUFF
GND
SMD_420X400
DC_RESISTANCE=0.0009625R
MAX_CURRENT=68A
CONTINUOUS_CURRENT=35A
12V_PEX6_F2
GND
NO STUFF
C139
270UF
COMMON
20%
16V
XCON
5A
0.013R
TH_D80P35
0.22UH
C129
10UF
16V16V
10%
X5R
1206
NO STUFF
GND
L11
SMD_420X400
DC_RESISTANCE=0.0009625R
MAX_CURRENT=68A
CONTINUOUS_CURRENT=35A
12V_PEX6_F1
C137
10UF
16V
10%
X5R
1206
NO STUFF
GND
0.22UH
L10
SMD_420X400
DC_RESISTANCE=0.0009625R
MAX_CURRENT=68A
CONTINUOUS_CURRENT=35A
NO STUFF
NVVDD
R55
10
1%
0402
COMMON
PS5_NVVDD_VAMP_CSREF
PS5_NVVDD_PHASE4
NVVDD
R56
10
1%
0402
COMMON
PS5_NVVDD_VAMP_CSREF
PS5_NVVDD_PHASE5
NVVDD
R54
10
1%
0402
NO STUFF
PS5_NVVDD_VAMP_CSREF
PS5_NVVDD_PHASE6
32.2F> 32.3F> 32.5F> 33.3G> 33.5G>
31.4F<
31.3H<
31.4F<
31.3H<
31.4F<
31.3H<
31.3H< 33.2G> 33.2G>
32.2F> 32.3F> 32.5F> 33.2G> 33.5G>
31.3H< 33.3G> 33.3G>
32.2F> 32.3F> 32.5F> 33.2G> 33.3G>
31.3H< 33.5G> 33.5G>
www.vinafix.vn
Power Supply: NVVDD Phase 4-6 of 6
600-10897-0053-300 A
p897
misun
33 OF 41
31-DEC-2008
Page 34
Power: Input Rail Filter
PCI_Express Power
PRSNT*
12V
12V
12V
GND
GND
PCI_Express Power
PRSNT*
12V
12V
12V
GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Connector Power State Table
2x3 Connector
Connected
Connected
Not Connected
Not Connected
2x3 Connector
Connected
Not Connected
Connected
Not Connected
Power
225W
150W
150W
75W
STATE
Full Perf
Board Off
Board Off
Board Off
PEX_12V INPUT - 66W
12V
L7
C25
10UF
16V
10%
X5R
1206
COMMON
GND
SMD_078X072
1.0uH
NO STUFF
DC_RESISTANCE=0.0072R
MAX_CURRENT=10A
CONTINUOUS_CURRENT=8A
600R@100MHZ
R27
CHANGED
1206
25%
600R@100MHZ
R28
CHANGED
1206
25%
600R@100MHZ
R29
CHANGED
1206
25%
600R@100MHZ
R30
CHANGED
1206
25%
12V
6.25A
16MIL
12V_F
GND
C34
10UF
16V
10%
X5R
1206
NO STUFF
Additional input filtering and Cin
moved to respective PS sheets
ALTERNATIVE
PEX6 INPUT 1 - 2x3 PCIE CON 75W
MUST BE ATTACHED AND POWERED TO START BOARD
J5
29-07022H-6-T-R
MALE
4.2MM
90
PCIEPWR
COMMON
12V_PEX6_F1
1
2
3
5
4
6
GND
NV_SOURCE_POWER_NET=TRUE
16MIL
INPUT_PEX6_IN1
SNN_INPUT_PEX6_DT1*
6.25A12V
C117
.1UF
50V
10%
X7R
0603
COMMON
GND
C118
10UF
16V
10%
X5R
1206
COMMON
GND
1.0uH
L14
NO STUFFSMD_078X072
DC_RESISTANCE=0.0072R
MAX_CURRENT=10A
CONTINUOUS_CURRENT=8A
600R@100MHZ
R69
CHANGED
1206
25%
600R@100MHZ
R66
CHANGED
1206
25%
600R@100MHZ
R67
CHANGED
1206
25%
600R@100MHZ
R68
CHANGED
1206
25%
12V
6.25A
16MIL
C119
10UF
16V
10%
X5R
1206
NO STUFF
GND
Additional input filtering and Cin
moved to respective PS sheets
ALTERNATIVE
PEX6 INPUT 2 - 2x3 PCIE CON 75W
MUST BE ATTACHED AND POWERED TO START BOARD
J6
29-07022H-6-T-R
MALE
4.2MM
90
PCIEPWR
COMMON
1.0uH
600R@100MHZ
CHANGED
600R@100MHZ
CHANGED
600R@100MHZ
CHANGED
600R@100MHZ
CHANGED
12V
6.25A
16MIL
NV_SOURCE_POWER_NET=TRUE
16MIL
1
2
3
5
4
6
GND
INPUT_PEX6_IN2
SNN_INPUT_PEX6_DT2*
12V6.25A
C144
.1UF
50V
10%
X7R
0603
COMMON
C145
10UF
16V
10%
X5R
1206
COMMON
GNDGND
L15
SMD_078X072
DC_RESISTANCE=0.0072R
MAX_CURRENT=10A
CONTINUOUS_CURRENT=8A
R73
1206
R545
1206
R72
1206
R74
1206
NO STUFF
25%
25%
25%
25%
ALTERNATIVE
12V_PEX6_F2
GND
C138
10UF
16V
10%
X5R
1206
NO STUFF
Additional input filtering and Cin
moved to respective PS sheets
www.vinafix.vn
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Power: Input Rail Filter
600-10897-0053-300 A
p897
34 OF 41
31-DEC-2008misun
Page 35
Thermal/Mechanical/ID
EMI CLIP
GND
EMI CLIP
GND
EMI CLIP
GND
EMI CLIP
GND
EMI CLIP
GND
MECH. MOUNTING TOP
7 connected mounting pins
BOARD STIFFENER
No connected mounting pins
SPECIAL MECHANIC
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
EMI Gnd ClipsBracket and Assembly
MEC1
PH_4_40X.1875_SCREW
STD
BKT1
P653_DVI_DVI_MDIN
ATX_2X_TOP
COMMON
1
GND
GPU Stiffener
MEC11
GPU_STIFFENER_GT200
7PIN
COMMON
COMMON
MEC501
HEX_JACK_SCREW
STD
COMMON
MEC503
HEX_JACK_SCREW
STD
COMMON
MEC502
HEX_JACK_SCREW
STD
COMMON
MEC504
HEX_JACK_SCREW
STD
COMMON
1
1
GND
THERMAL/MECHANICAL HOLES
6754312
GND
MEC3
P651_C125_MOUNTING_HOLES
X1
COMMON
1
Top Side Clips
MEC8
MEC_SPRING_P157
SMD
NO STUFF
4.0MM
MEC7
MEC_SPRING_P157
SMD
NO STUFF
4.0MM
1
1
GND
MEC15
MEC_SPRING_P157
SMD
NO STUFF
4.0MM
MEC14
MEC_SPRING_P157
SMD
NO STUFF
4.0MM
MEC5
P651_C125_MOUNTING_HOLES
X1
COMMON
1
GND
MEC21
MEC_SPRING_P157
SMD
NO STUFF
4.0MM
1
MEC12
P651_C98_MOUNTING_HOLES
X1
COMMON
1
MEC9
P651_C98_MOUNTING_HOLES
X1
COMMON
1
MEC17
P651_C125_MOUNTING_HOLES
X1
COMMON
1
MEC20
P651_C125_MOUNTING_HOLES
X1
COMMON
1
MEC19
P651_C125_MOUNTING_HOLES
X1
COMMON
1
MEC6
P651_C125_MOUNTING_HOLES
X1
COMMON
1
GND
MEC10
P651_C98_MOUNTING_HOLES
X1
COMMON
1
GND
Hockey Stick Retention Mechanism
MEC2
PEX_RET_BRKOFF_P651
NOPIN
COMMON
MEC4
P651_C125_MOUNTING_HOLES
X1
COMMON
1
GND
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
Thermal/Mechanical
www.vinafix.vn
MEC13
P651_C98_MOUNTING_HOLES
X1
COMMON
1
GND
MEC18
P651_C125_MOUNTING_HOLES
X1
COMMON
1
GND
MEC16
P651_C125_MOUNTING_HOLES
X1
COMMON
1
GND
600-10897-0053-300 A
p897
misun
35 OF 41
31-DEC-2008
Page 36
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Title: Basenet Report
Design: p897
Date: Dec 2 14:57:45 2008
Base nets and synonyms for
p897_b00_lib.P897(@p897_b00_lib.p897(sch
_1))
Base Signal Location([Zone][dir])
5V_ADJ 29.2E
5V_INPUT 29.1D
12V_PH1 32.2B
12V_PH2 32.3B
12V_PH3 32.4B
12V_PH4 33.2B
12V_PH5 33.3B
12V_PH6 33.4B
12V_PS3_R 30.2C
DACA_BLUE 19.3C
DACA_BLUE_CON 19.4H> 23.3G<
DACA_GREEN 19.3C
DACA_GREEN_CON 19.4H> 23.3G<
DACA_HSYNC 19.3C
DACA_HSYNC_BUF 19.2F
DACA_HSYNC_BUF_R 19.2E
DACA_HSYNC_CON 19.2H> 23.4G<
DACA_RED 19.3C
DACA_RED_CON 19.3H> 23.3G<
DACA_RSET 19.3B
DACA_VDD 19.3B
DACA_VREF 19.3B
DACA_VSYNC 19.3C
DACA_VSYNC_BUF 19.3F
DACA_VSYNC_BUF_R 19.3E
DACA_VSYNC_CON 19.3H> 23.3G<
DACB_PB 21.3C
DACB_PB_F 21.2F
DACB_PR 21.3C
DACB_PR_F 21.3F
DACB_RSET 21.3B
DACB_VDD 21.3B
DACB_VREF 21.3B
DACB_Y 21.3C
DACB_Y_F 21.2F
DACC_BLUE 20.3C
DACC_BLUE_CON 20.4H> 22.3G<
DACC_GREEN_CON 20.4H> 22.3G<
DACC_HSYNC 20.3C
DACC_HSYNC_BUF 20.2F
DACC_HSYNC_BUF_R 20.2E
DACC_HSYNC_CON 20.2H> 22.4G<
DACC_RED 20.3C
DACC_RED_CON 20.3H> 22.3G<
DACC_RSET 20.3B
DACC_VDD 20.3B
DACC_VREF 20.3B
DACC_VSYNC 20.3C
DACC_VSYNC_BUF 20.3F
DACC_VSYNC_BUF_R 20.3E
DACC_VSYNC_CON 20.3H> 22.3G<
DRA_CLK 24.2D
DRA_CMD 24.2D
DRA_D0 24.1D
DRA_D1 24.1D
DRA_D2 24.1D
DRA_D3 24.1D
DRA_D4 24.1D
DRA_D5 24.1D
DRA_D6 24.1D
DRA_D7 24.1D
DRA_D8 24.1D
DRA_D9 24.1D
DRA_D10 24.1D
DRA_D11 24.2D
DRA_D12 24.2D
DRA_D13 24.2D
DRA_D14 24.2D
DRB_CLK 24.2D
DRB_CMD 24.2D
DRB_D0 24.2D
DRB_D1 24.2D
DRB_D2 24.2D
DRB_D3 24.2D
DRB_D4 24.2D
DRB_D5 24.2D
DRB_D6 24.2D
DRB_D7 24.2D
DRB_D8 24.2D
DRB_D9 24.2D
DRB_D10 24.2D
DRB_D11 24.2D
DRB_D12 24.2D
DRB_D13 24.2D
DRB_D14 24.2D
DR_CAL_PD_VDDQ 24.2C
DR_CAL_PU_GND 24.2C
DR_VREF 24.2C
DVIA_D0 27.1E 27.4C
DVIA_D1 27.1E 27.4C
DVIA_D2 27.1E 27.4C
DVIA_D3 27.1E 27.4C
DVIA_D7 27.2E 27.4C
DVIB_D4 27.3E 27.5C
DVIB_D5 27.2E 27.5C
FAN_CUTOFF_RC_Q 26.5F
FAN_PWM 26.4D 26.4G
FAN_PWM_NVIO 25.3D
FAN_PWM_NVIO_R 25.3H> 26.4F<
FAN_TACH 26.4D 26.4G
FBA0_CLK0 4.4A 4.5G> 8.2A< 8.2A
8.4G
FBA0_CLK0* 4.4A 4.5G> 8.2A< 8.2A
8.4G
FBA0_CLK0_R 8.4H
FBA1_CLK0 4.4B 4.5G> 8.2A< 8.2C
8.4G
FBA1_CLK0* 4.4B 4.5G> 8.2A< 8.2C
8.4G
FBA1_CLK0_R 8.4H
FBABCD_MPLL_AVDD 4.3C> 5.4C<
FBAB_REFCLK 4.3C< 18.5D>
FBAB_REFCLK* 4.3C< 18.5D>
FBA_CMD<0> 4.3A 4.4F 8.1A 8.1A
8.5A
FBA_CMD<0..28> 4.4G> 8.1A<
FBA_CMD<1> 4.3A 4.4F 8.1A 8.1A
8.5A
FBA_CMD<2> 4.3A 4.4F 8.1A 8.1A
8.5A
FBA_CMD<3> 4.3A 4.4F 8.1A 8.1A
8.5A
FBA_CMD<4> 4.3A 4.4F 8.1A 8.1A
8.5A
FBA_CMD<5> 4.3A 4.4F 8.1A 8.1A
8.5A
FBA_CMD<6> 4.3A 4.4F 8.1A 8.2A
8.2C 8.5F
FBA_CMD<7> 4.3A 4.4F 8.1A 8.1A
8.1C
FBA_CMD<8> 4.3A 4.4F 8.1A 8.2A
8.2C
FBA_CMD<9> 4.3A 4.4F 8.1A 8.1A DACC_GREEN 20.3C
8.1C
FBA_CMD<10> 4.3A 4.4F 8.1A 8.2A
8.2C 8.5F
FBA_CMD<11> 4.3A 4.4F 8.1A 8.2A
8.2C
FBA_CMD<12> 4.3A 4.4F 8.1A 8.1A
8.1C
FBA_CMD<13> 4.3A 4.4F 8.1A 8.2A
8.2C
FBA_CMD<14> 4.3A 4.4F 8.1A 8.1A
8.1C
FBA_CMD<15> 4.3A 4.4F 8.1A 8.2A
8.2C
FBA_CMD<16> 4.3A 4.4F 8.1A 8.1A
8.1C
FBA_CMD<17> 4.3A 4.4F 8.1A 8.1A
8.1C
FBA_CMD<18> 4.3A 4.4F 8.1A 8.1A
8.1C
FBA_CMD<19> 4.3A 4.4F 8.1A 8.1A
8.1C
FBA_CMD<20> 4.3A 4.4F 8.1A 8.1C
8.2A
FBA_CMD<21> 4.3A 4.4F 8.1A 8.1C
8.2A
FBA_CMD<23> 4.3A 4.4F 8.1C 8.2A
8.5C
FBA_CMD<24> 4.3A 4.5F 8.1C 8.2A
8.5C
FBA_CMD<25> 4.4A 4.5F 8.1C 8.2A
8.5C
FBA_CMD<26> 4.4A 4.5F 8.1C 8.2A
8.5C
FBA_CMD<27> 4.4A 4.5F 8.1C 8.2A
8.5C
FBA_CMD<28> 4.4A 4.5F 8.1C 8.2A
8.5C
FBA_D<0> 4.1A 4.1F 8.2A 8.3A
FBA_D<0..63> 4.1G> 8.2A<>
FBA_D<1> 4.1A 4.1F 8.2A 8.3A
FBA_D<2> 4.1A 4.1F 8.2A 8.3A
FBA_D<3> 4.1A 4.1F 8.2A 8.3A
FBA_D<4> 4.1A 4.1F 8.2A 8.4A
FBA_D<5> 4.1A 4.1F 8.2A 8.4A
FBA_D<6> 4.1A 4.1F 8.2A 8.4A
FBA_D<7> 4.1A 4.1F 8.3A 8.4A
FBA_D<8> 4.1A 4.1F 8.3A 8.3B
FBA_D<9> 4.1A 4.1F 8.3A 8.3B
FBA_D<10> 4.1A 4.1F 8.3A 8.3B
FBA_D<11> 4.1A 4.1F 8.3A 8.3B
FBA_D<12> 4.1A 4.1F 8.3A 8.4B
FBA_D<13> 4.1A 4.1F 8.3A 8.4B
FBA_D<14> 4.1A 4.1F 8.3A 8.4B
FBA_D<15> 4.1F 4.2A 8.3A 8.4B
FBA_D<16> 4.1F 4.2A 8.3A 8.4A
FBA_D<17> 4.1F 4.2A 8.3A 8.4A
FBA_D<18> 4.1F 4.2A 8.3A 8.4A
FBA_D<19> 4.1F 4.2A 8.3A 8.4A
FBA_D<20> 4.1F 4.2A 8.3A 8.4A
FBA_D<21> 4.1F 4.2A 8.3A 8.4A
FBA_D<22> 4.1F 4.2A 8.3A 8.4A
FBA_D<23> 4.1F 4.2A 8.3A 8.4A
FBA_D<24> 4.1F 4.2A 8.3A 8.4B
FBA_D<25> 4.1F 4.2A 8.3A 8.4B
FBA_D<26> 4.1F 4.2A 8.3A 8.4B
FBA_D<27> 4.2A 4.2F 8.3A 8.4B
FBA_D<28> 4.2A 4.2F 8.3A 8.4B
FBA_D<29> 4.2A 4.2F 8.3A 8.4B
FBA_D<30> 4.2A 4.2F 8.3A 8.4B
FBA_D<31> 4.2A 4.2F 8.3A 8.4B
FBA_D<32> 4.1B 4.2F 8.3A 8.3C
FBA_D<33> 4.1B 4.2F 8.3A 8.3C
FBA_D<34> 4.1B 4.2F 8.3A 8.3C
FBA_D<35> 4.1B 4.2F 8.3A 8.3C
FBA_D<36> 4.1B 4.2F 8.3A 8.4C
FBA_D<37> 4.1B 4.2F 8.4A 8.4C
FBA_D<38> 4.1B 4.2F 8.4A 8.4C
FBA_D<39> 4.1B 4.2F 8.4A 8.4C
FBA_D<40> 4.1B 4.2F 8.3C 8.4A
FBA_D<41> 4.1B 4.2F 8.3C 8.4A
FBA_D<42> 4.1B 4.2F 8.3C 8.4A
FBA_D<43> 4.1B 4.2F 8.3C 8.4A
FBA_D<44> 4.1B 4.2F 8.4A 8.4C
FBA_D<45> 4.1B 4.2F 8.4A 8.4C
FBA_D<46> 4.1B 4.2F 8.4A 8.4C
FBA_D<47> 4.2B 4.2F 8.4A 8.4C
FBA_D<48> 4.2B 4.2F 8.4A 8.4C
FBA_D<49> 4.2B 4.2F 8.4A 8.4C
FBA_D<50> 4.2B 4.2F 8.4A 8.4C
FBA_D<51> 4.2B 4.2F 8.4A 8.4C
FBA_D<52> 4.2B 4.2F 8.4A 8.4C
FBA_D<53> 4.2B 4.2F 8.4A 8.4C
FBA_D<54> 4.2B 4.2F 8.4A 8.4C
FBA_D<55> 4.2B 4.2F 8.4A 8.4C
FBA_D<56> 4.2B 4.2F 8.4A 8.4C
FBA_D<57> 4.2B 4.3F 8.4A 8.4C
FBA_D<58> 4.2B 4.3F 8.4A 8.4C
FBA_D<59> 4.2B 4.3F 8.4A 8.4C
FBA_D<60> 4.2B 4.3F 8.4A 8.4C
FBA_D<61> 4.2B 4.3F 8.4A 8.4C
FBA_D<62> 4.2B 4.3F 8.4A 8.4C
FBA_D<63> 4.2B 4.3F 8.4A 8.4C
FBA_DEBUG 4.3B
FBA_DQM0 4.2A 4.3G<> 8.4A<>
8.4A
FBA_DQM1 4.2A 4.3G<> 8.4B
8.5A<>
FBA_DQM2 4.2A 4.3G<> 8.4A
8.5A<>
FBA_DQM3 4.2A 4.3G<> 8.4B
8.5A<>
FBA_DQM4 4.2B 4.3G<> 8.4C
8.5A<>
FBA_DQM5 4.2B 4.3G<> 8.4C
8.5A<>
FBA_DQM6 4.2B 4.3G<> 8.4C
8.5A<>
FBA_DQM7 4.2B 4.3G<> 8.4C
8.5A<>
FBA_DQS_RN0 4.2A 4.3G< 8.4A 8.5A<
FBA_DQS_RN1 4.2A 4.3G< 8.4B 8.5A<
FBA_DQS_RN2 4.2A 4.3G< 8.4A 8.5A<
FBA_DQS_RN3 4.2A 4.3G< 8.4B 8.5A<
FBA_DQS_RN4 4.2B 4.3G< 8.4C 8.5A<
FBA_DQS_RN5 4.2B 4.3G< 8.4C 8.5A<
FBA_DQS_RN6 4.2B 4.3G< 8.4C 8.5A<
FBA_DQS_RN7 4.2B 4.3G< 8.4C 8.5A<
FBA_DQS_WP0 4.2A 4.3G> 8.4A 8.5A>
FBA_DQS_WP1 4.3A 4.3G> 8.4B 8.5A>
FBA_DQS_WP2 4.3A 4.3G> 8.4A 8.5A>
FBA_DQS_WP3 4.3A 4.4G> 8.4B 8.5A>
FBA_DQS_WP4 4.2B 4.4G> 8.4C 8.5A>
FBA_DQS_WP5 4.3B 4.4G> 8.4C 8.5A>
FBA_DQS_WP6 4.3B 4.4G> 8.4C 8.5A>
FBA_DQS_WP7 4.3B 4.4G> 8.4C 8.5A>
FBA_SEN1 8.2A
FBA_SEN2 8.2C
FBA_VREF1 8.1H 8.3B
FBA_VREF2 8.2H 8.3B
FBA_VREF3 8.2H 8.3D
FBA_VREF4 8.3D 8.3H
FBA_ZQ1 8.2A
FBA_ZQ2 8.2C
FBB0_CLK0 4.4C 4.5H> 9.2A< 9.2A
9.4G
FBB0_CLK0* 4.4C 4.5H> 9.2A< 9.2A
9.4G
FBB0_CLK0_R 9.4H
FBB1_CLK0 4.4E 4.5H> 9.2A< 9.2C
9.4G
FBB1_CLK0* 4.4E 4.5H> 9.2A< 9.2C
9.4G
FBB1_CLK0_R 9.4H
FBB_CMD<0> 4.3D 4.4G 9.1A 9.1A
9.5A
FBB_CMD<0..28> 4.4H> 9.1A<
FBB_CMD<1> 4.3D 4.4G 9.1A 9.1A
9.5A
FBB_CMD<2> 4.3D 4.4G 9.1A 9.1A
9.5A
FBB_CMD<3> 4.3D 4.4G 9.1A 9.1A
9.5A
FBB_CMD<4> 4.3D 4.4G 9.1A 9.1A
9.5A
FBB_CMD<5> 4.3D 4.4G 9.1A 9.1A
9.5A
FBB_CMD<6> 4.3D 4.4G 9.1A 9.2A
9.2C 9.5F
FBB_CMD<7> 4.3D 4.4G 9.1A 9.1A
9.1C
FBB_CMD<8> 4.3D 4.4G 9.1A 9.2A
9.2C
FBB_CMD<9> 4.3D 4.4G 9.1A 9.1A
9.1C
FBB_CMD<10> 4.3D 4.4G 9.1A 9.2A
9.2C 9.5F
FBB_CMD<11> 4.3D 4.4G 9.1A 9.2A
9.2C
FBB_CMD<12> 4.3D 4.4G 9.1A 9.1A
9.1C
FBB_CMD<13> 4.3D 4.4G 9.1A 9.2A
9.2C
FBB_CMD<14> 4.3D 4.4G 9.1A 9.1A
9.1C
FBB_CMD<15> 4.3D 4.4G 9.1A 9.2A
9.2C
FBB_CMD<16> 4.3D 4.4G 9.1A 9.1A
9.1C
FBB_CMD<17> 4.3D 4.4G 9.1A 9.1A
9.1C
FBB_CMD<18> 4.3D 4.4G 9.1A 9.1A
9.1C
FBB_CMD<19> 4.3D 4.4G 9.1A 9.1A
9.1C
FBB_CMD<20> 4.3D 4.4G 9.1A 9.1C
9.2A
FBB_CMD<21> 4.3D 4.4G 9.1A 9.1C
9.2A
FBB_CMD<23> 4.3D 4.4G 9.1C 9.2A
9.5C
FBB_CMD<24> 4.3D 4.5G 9.1C 9.2A
9.5C
FBB_CMD<25> 4.4D 4.5G 9.1C 9.2A
9.5C
FBB_CMD<26> 4.4D 4.5G 9.1C 9.2A
9.5C
FBB_CMD<27> 4.4D 4.5G 9.1C 9.2A
9.5C
FBB_CMD<28> 4.4D 4.5G 9.1C 9.2A
9.5C
FBB_D<0> 4.1D 4.1G 9.2A 9.3A
FBB_D<0..63> 4.1H> 9.2A<>
FBB_D<1> 4.1D 4.1G 9.2A 9.3A
FBB_D<2> 4.1D 4.1G 9.2A 9.3A
FBB_D<3> 4.1D 4.1G 9.2A 9.3A
FBB_D<4> 4.1D 4.1G 9.2A 9.4A
FBB_D<5> 4.1D 4.1G 9.2A 9.4A
FBB_D<6> 4.1D 4.1G 9.2A 9.4A
FBB_D<7> 4.1D 4.1G 9.3A 9.4A
FBB_D<8> 4.1D 4.1G 9.3A 9.3B
FBB_D<9> 4.1D 4.1G 9.3A 9.3B
FBB_D<10> 4.1D 4.1G 9.3A 9.3B
FBB_D<11> 4.1D 4.1G 9.3A 9.3B
FBB_D<12> 4.1D 4.1G 9.3A 9.4B
FBB_D<13> 4.1D 4.1G 9.3A 9.4B
FBB_D<14> 4.1D 4.1G 9.3A 9.4B
FBB_D<15> 4.1G 4.2D 9.3A 9.4B
FBB_D<16> 4.1G 4.2D 9.3A 9.4A
FBB_D<17> 4.1G 4.2D 9.3A 9.4A
FBB_D<18> 4.1G 4.2D 9.3A 9.4A
FBB_D<19> 4.1G 4.2D 9.3A 9.4A
FBB_D<20> 4.1G 4.2D 9.3A 9.4A
FBB_D<21> 4.1G 4.2D 9.3A 9.4A
FBB_D<22> 4.1G 4.2D 9.3A 9.4A
FBB_D<23> 4.1G 4.2D 9.3A 9.4A
FBB_D<24> 4.1G 4.2D 9.3A 9.4B
FBB_D<25> 4.1G 4.2D 9.3A 9.4B
FBB_D<26> 4.1G 4.2D 9.3A 9.4B
FBB_D<27> 4.2D 4.2G 9.3A 9.4B
FBB_D<28> 4.2D 4.2G 9.3A 9.4B
FBB_D<29> 4.2D 4.2G 9.3A 9.4B
FBB_D<30> 4.2D 4.2G 9.3A 9.4B
FBB_D<31> 4.2D 4.2G 9.3A 9.4B
FBB_D<32> 4.1E 4.2G 9.3A 9.3C
FBB_D<33> 4.1E 4.2G 9.3A 9.3C
FBB_D<34> 4.1E 4.2G 9.3A 9.3C
FBB_D<35> 4.1E 4.2G 9.3A 9.3C
FBB_D<36> 4.1E 4.2G 9.3A 9.4C
FBB_D<37> 4.1E 4.2G 9.4A 9.4C
FBB_D<38> 4.1E 4.2G 9.4A 9.4C
FBB_D<39> 4.1E 4.2G 9.4A 9.4C
FBB_D<40> 4.1E 4.2G 9.3C 9.4A
FBB_D<41> 4.1E 4.2G 9.3C 9.4A
FBB_D<42> 4.1E 4.2G 9.3C 9.4A
FBB_D<43> 4.1E 4.2G 9.3C 9.4A
FBB_D<44> 4.1E 4.2G 9.4A 9.4C
FBB_D<45> 4.1E 4.2G 9.4A 9.4C
FBB_D<46> 4.1E 4.2G 9.4A 9.4C
FBB_D<47> 4.2E 4.2G 9.4A 9.4C
FBB_D<48> 4.2E 4.2G 9.4A 9.4C
FBB_D<49> 4.2E 4.2G 9.4A 9.4C
FBB_D<50> 4.2E 4.2G 9.4A 9.4C
FBB_D<51> 4.2E 4.2G 9.4A 9.4C
FBB_D<52> 4.2E 4.2G 9.4A 9.4C
FBB_D<53> 4.2E 4.2G 9.4A 9.4C
FBB_D<54> 4.2E 4.2G 9.4A 9.4C
FBB_D<55> 4.2E 4.2G 9.4A 9.4C
FBB_D<56> 4.2E 4.2G 9.4A 9.4C
FBB_D<57> 4.2E 4.3G 9.4A 9.4C
FBB_D<58> 4.2E 4.3G 9.4A 9.4C
FBB_D<59> 4.2E 4.3G 9.4A 9.4C
FBB_D<60> 4.2E 4.3G 9.4A 9.4C
FBB_D<61> 4.2E 4.3G 9.4A 9.4C
FBB_D<62> 4.2E 4.3G 9.4A 9.4C
FBB_D<63> 4.2E 4.3G 9.4A 9.4C
FBB_DEBUG 4.3E
FBB_DQM0 4.2D 4.3H<> 9.4A<>
9.4A
FBB_DQM1 4.2D 4.3H<> 9.4B
9.5A<>
FBB_DQM2 4.2D 4.3H<> 9.4A
9.5A<>
FBB_DQM3 4.2D 4.3H<> 9.4B
9.5A<>
FBB_DQM4 4.2E 4.3H<> 9.4C
9.5A<>
FBB_DQM5 4.2E 4.3H<> 9.4C
9.5A<>
FBB_DQM6 4.2E 4.3H<> 9.4C
9.5A<>
FBB_DQM7 4.2E 4.3H<> 9.4C
9.5A<>
FBB_DQS_RN0 4.2D 4.3H< 9.4A 9.5A<
FBB_DQS_RN1 4.2D 4.3H< 9.4B 9.5A<
FBB_DQS_RN2 4.2D 4.3H< 9.4A 9.5A<
FBB_DQS_RN3 4.2D 4.3H< 9.4B 9.5A<
FBB_DQS_RN4 4.2E 4.3H< 9.4C 9.5A<
FBB_DQS_RN5 4.2E 4.3H< 9.4C 9.5A<
FBB_DQS_RN6 4.2E 4.3H< 9.4C 9.5A<
FBB_DQS_RN7 4.2E 4.3H< 9.4C 9.5A<
FBB_DQS_WP0 4.2D 4.3H> 9.4A 9.5A>
FBB_DQS_WP1 4.3D 4.3H> 9.4B 9.5A>
FBB_DQS_WP2 4.3D 4.3H> 9.4A 9.5A>
FBB_DQS_WP3 4.3D 4.4H> 9.4B 9.5A>
FBB_DQS_WP4 4.2E 4.4H> 9.4C 9.5A>
FBB_DQS_WP5 4.3E 4.4H> 9.4C 9.5A>
FBB_DQS_WP6 4.3E 4.4H> 9.4C 9.5A>
FBB_DQS_WP7 4.3E 4.4H> 9.4C 9.5A>
FBB_SEN1 9.2A
FBB_SEN2 9.2C
FBB_VREF1 9.1H 9.3B
FBB_VREF2 9.2H 9.3B
FBB_VREF3 9.2H 9.3D
FBB_VREF4 9.3D 9.3H
FBB_ZQ1 9.2A
FBB_ZQ2 9.2C
FBC0_CLK0 5.4A 5.5G> 10.2A<
10.2A 10.4G
FBC0_CLK0* 5.4A 5.5G> 10.2A<
10.2A 10.4G
FBC0_CLK0_R 10.4H
FBC1_CLK0 5.4B 5.5G> 10.2A<
10.2C 10.4G
FBC1_CLK0* 5.4B 5.5G> 10.2A<
10.2C 10.4G
FBC1_CLK0_R 10.4H
FBCD_REFCLK 5.3C< 18.5D>
FBCD_REFCLK* 5.3C< 18.5D>
FBC_CMD<0> 5.3A 5.4F 10.1A 10.1A
10.5A
FBC_CMD<0..28> 5.4G> 10.1A<
FBC_CMD<1> 5.3A 5.4F 10.1A 10.1A
10.5A
FBC_CMD<2> 5.3A 5.4F 10.1A 10.1A
10.5A
FBC_CMD<3> 5.3A 5.4F 10.1A 10.1A
10.5A
FBC_CMD<4> 5.3A 5.4F 10.1A 10.1A
10.5A
FBC_CMD<5> 5.3A 5.4F 10.1A 10.1A
10.5A
FBC_CMD<6> 5.3A 5.4F 10.1A 10.2A
10.2C 10.5F
FBC_CMD<7> 5.3A 5.4F 10.1A 10.1A
10.1C
FBC_CMD<8> 5.3A 5.4F 10.1A 10.2A
10.2C
FBC_CMD<9> 5.3A 5.4F 10.1A 10.1A
10.1C
FBC_CMD<10> 5.3A 5.4F 10.1A 10.2A
10.2C 10.5F
FBC_CMD<11> 5.4A 5.4F 10.1A 10.2A
10.2C
FBC_CMD<12> 5.4A 5.4F 10.1A 10.1A
10.1C
FBC_CMD<13> 5.4A 5.4F 10.1A 10.2A
10.2C
FBC_CMD<14> 5.4A 5.4F 10.1A 10.1A
10.1C
FBC_CMD<15> 5.4A 5.4F 10.1A 10.2A
10.2C
FBC_CMD<16> 5.4A 5.4F 10.1A 10.1A
10.1C
FBC_CMD<17> 5.4A 5.4F 10.1A 10.1A
10.1C
FBC_CMD<18> 5.4A 5.4F 10.1A 10.1A
10.1C
FBC_CMD<19> 5.4A 5.4F 10.1A 10.1A
10.1C
FBC_CMD<20> 5.4A 5.4F 10.1A 10.1C
10.2A
FBC_CMD<21> 5.4A 5.4F 10.1A 10.1C
10.2A
FBC_CMD<23> 5.4A 5.4F 10.1C 10.2A
10.5C
FBC_CMD<24> 5.4A 5.5F 10.1C 10.2A
10.5C
FBC_CMD<25> 5.4A 5.5F 10.1C 10.2A
10.5C
FBC_CMD<26> 5.4A 5.5F 10.1C 10.2A
10.5C
FBC_CMD<27> 5.4A 5.5F 10.1C 10.2A
10.5C
10.5C
FBC_D<0> 5.1A 5.1F 10.2A 10.3A
FBC_D<0..63> 5.1G> 10.2A<>
FBC_D<1> 5.1F 5.2A 10.2A 10.3A
FBC_D<2> 5.1F 5.2A 10.2A 10.3A
FBC_D<3> 5.1F 5.2A 10.2A 10.3A
FBC_D<4> 5.1F 5.2A 10.2A 10.4A
FBC_D<5> 5.1F 5.2A 10.2A 10.4A
FBC_D<6> 5.1F 5.2A 10.2A 10.4A
FBC_D<7> 5.1F 5.2A 10.3A 10.4A
FBC_D<8> 5.1F 5.2A 10.3A 10.3B
FBC_D<9> 5.1F 5.2A 10.3A 10.3B
FBC_D<10> 5.1F 5.2A 10.3A 10.3B
FBC_D<11> 5.1F 5.2A 10.3A 10.3B
FBC_D<12> 5.1F 5.2A 10.3A 10.4B
FBC_D<13> 5.1F 5.2A 10.3A 10.4B
FBC_D<14> 5.1F 5.2A 10.3A 10.4B
FBC_D<15> 5.1F 5.2A 10.3A 10.4B
FBC_D<16> 5.1F 5.2A 10.3A 10.4A
FBC_D<17> 5.1F 5.2A 10.3A 10.4A
FBC_D<18> 5.1F 5.2A 10.3A 10.4A
FBC_D<19> 5.1F 5.2A 10.3A 10.4A
FBC_D<20> 5.1F 5.2A 10.3A 10.4A
FBC_D<21> 5.1F 5.2A 10.3A 10.4A
FBC_D<22> 5.1F 5.2A 10.3A 10.4A
FBC_D<23> 5.1F 5.2A 10.3A 10.4A
FBC_D<24> 5.1F 5.2A 10.3A 10.4B
FBC_D<25> 5.1F 5.2A 10.3A 10.4B
FBC_D<26> 5.1F 5.2A 10.3A 10.4B
FBC_D<27> 5.2A 5.2F 10.3A 10.4B
FBC_D<28> 5.2A 5.2F 10.3A 10.4B
FBC_D<29> 5.2A 5.2F 10.3A 10.4B
FBC_D<30> 5.2A 5.2F 10.3A 10.4B
FBC_D<31> 5.2F 5.3A 10.3A 10.4B
FBC_D<32> 5.1B 5.2F 10.3A 10.3C
FBC_D<33> 5.2B 5.2F 10.3A 10.3C
FBC_D<34> 5.2B 5.2F 10.3A 10.3C
FBC_D<35> 5.2B 5.2F 10.3A 10.3C
FBC_D<36> 5.2B 5.2F 10.3A 10.4C
FBC_D<37> 5.2B 5.2F 10.4A 10.4C
FBC_D<38> 5.2B 5.2F 10.4A 10.4C
FBC_D<39> 5.2B 5.2F 10.4A 10.4C
FBC_D<40> 5.2B 5.2F 10.3C 10.4A
FBC_D<41> 5.2B 5.2F 10.3C 10.4A
FBC_D<42> 5.2B 5.2F 10.3C 10.4A
FBC_D<43> 5.2B 5.2F 10.3C 10.4A
FBC_D<44> 5.2B 5.2F 10.4A 10.4C
FBC_D<45> 5.2B 5.2F 10.4A 10.4C
FBC_D<46> 5.2B 5.2F 10.4A 10.4C
FBC_D<47> 5.2B 5.2F 10.4A 10.4C
FBC_D<48> 5.2B 5.2F 10.4A 10.4C
FBC_D<49> 5.2B 5.2F 10.4A 10.4C
FBC_D<50> 5.2B 5.2F 10.4A 10.4C
FBC_D<51> 5.2B 5.2F 10.4A 10.4C
FBC_D<52> 5.2B 5.2F 10.4A 10.4C
FBC_D<53> 5.2B 5.2F 10.4A 10.4C
FBC_D<54> 5.2B 5.2F 10.4A 10.4C
FBC_D<55> 5.2B 5.2F 10.4A 10.4C
FBC_D<56> 5.2B 5.2F 10.4A 10.4C
FBC_D<57> 5.2B 5.3F 10.4A 10.4C
FBC_D<58> 5.2B 5.3F 10.4A 10.4C
FBC_D<59> 5.2B 5.3F 10.4A 10.4C
FBC_D<60> 5.2B 5.3F 10.4A 10.4C
FBC_D<61> 5.2B 5.3F 10.4A 10.4C
FBC_D<62> 5.2B 5.3F 10.4A 10.4C
FBC_D<63> 5.3B 5.3F 10.4A 10.4C
FBC_DEBUG 5.3B
FBC_DQM0 5.3A 5.3G<> 10.4A<>
10.4A
FBC_DQM1 5.3A 5.3G<> 10.4B
10.5A<>
FBC_DQM2 5.3A 5.3G<> 10.4A
10.5A<>
FBC_DQM3 5.3A 5.3G<> 10.4B
10.5A<>
FBC_DQM4 5.3B 5.3G<> 10.4C
10.5A<>
FBC_DQM5 5.3B 5.3G<> 10.4C
10.5A<>
FBC_DQM6 5.3B 5.3G<> 10.4C
10.5A<>
FBC_DQM7 5.3B 5.3G<> 10.4C
10.5A<>
FBC_DQS_RN0 5.3A 5.3G< 10.4A
10.5A<
FBC_DQS_RN1 5.3A 5.3G< 10.4B
10.5A<
FBC_DQS_RN2 5.3A 5.3G< 10.4A
10.5A<
FBC_DQS_RN3 5.3A 5.3G< 10.4B
10.5A<
FBC_DQS_RN4 5.3B 5.3G< 10.4C
10.5A<
FBC_DQS_RN5 5.3B 5.3G< 10.4C
10.5A<
FBC_DQS_RN6 5.3B 5.3G< 10.4C FBC_CMD<28> 5.4A 5.5F 10.1C 10.2A
10.5A<
FBC_DQS_RN7 5.3B 5.3G< 10.4C
10.5A<
FBC_DQS_WP0 5.3A 5.3G> 10.4A
10.5A>
FBC_DQS_WP1 5.3A 5.3G> 10.4B
10.5A>
FBC_DQS_WP2 5.3A 5.3G> 10.4A
10.5A>
FBC_DQS_WP3 5.3A 5.4G> 10.4B
10.5A>
FBC_DQS_WP4 5.3B 5.4G> 10.4C
10.5A>
FBC_DQS_WP5 5.3B 5.4G> 10.4C
10.5A>
FBC_DQS_WP6 5.3B 5.4G> 10.4C
10.5A>
FBC_DQS_WP7 5.3B 5.4G> 10.4C
10.5A>
FBC_SEN1 10.2A
FBC_SEN2 10.2C
FBC_VREF1 10.1H 10.3B
FBC_VREF2 10.2H 10.3B
FBC_VREF3 10.2H 10.3D
FBC_VREF4 10.3D 10.3H
FBC_ZQ1 10.2A
FBC_ZQ2 10.2C
FBD0_CLK0 5.4C 5.5H> 11.2A<
11.2A 11.4G
FBD0_CLK0* 5.4C 5.5H> 11.2A<
11.2A 11.4G
FBD0_CLK0_R 11.4H
FBD1_CLK0 5.4E 5.5H> 11.2A<
11.2C 11.4G
FBD1_CLK0* 5.4E 5.5H> 11.2A<
11.2C 11.4G
FBD1_CLK0_R 11.4H
FBD_CMD<0> 5.3D 5.4G 11.1A 11.1A
11.5A
FBD_CMD<0..28> 5.4H> 11.1A<
FBD_CMD<1> 5.3D 5.4G 11.1A 11.1A
11.5A
FBD_CMD<2> 5.3D 5.4G 11.1A 11.1A
11.5A
FBD_CMD<3> 5.3D 5.4G 11.1A 11.1A
11.5A
FBD_CMD<4> 5.3D 5.4G 11.1A 11.1A
11.5A
FBD_CMD<5> 5.3D 5.4G 11.1A 11.1A
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
<edit here to insert page detail>
www.vinafix.vn
600-10897-0053-300 A
p897
misun
36 OF 41
31-DEC-2008
Page 37
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
11.5A
FBD_CMD<6> 5.3D 5.4G 11.1A 11.2A
11.2C 11.5F
FBD_CMD<7> 5.3D 5.4G 11.1A 11.1A
11.1C
FBD_CMD<8> 5.3D 5.4G 11.1A 11.2A
11.2C
FBD_CMD<9> 5.3D 5.4G 11.1A 11.1A
11.1C
FBD_CMD<10> 5.3D 5.4G 11.1A 11.2A
11.2C 11.5F
FBD_CMD<11> 5.4D 5.4G 11.1A 11.2A
11.2C
FBD_CMD<12> 5.4D 5.4G 11.1A 11.1A
11.1C
FBD_CMD<13> 5.4D 5.4G 11.1A 11.2A
11.2C
FBD_CMD<14> 5.4D 5.4G 11.1A 11.1A
11.1C
FBD_CMD<15> 5.4D 5.4G 11.1A 11.2A
11.2C
FBD_CMD<16> 5.4D 5.4G 11.1A 11.1A
11.1C
FBD_CMD<17> 5.4D 5.4G 11.1A 11.1A
11.1C
FBD_CMD<18> 5.4D 5.4G 11.1A 11.1A
11.1C
FBD_CMD<19> 5.4D 5.4G 11.1A 11.1A
11.1C
FBD_CMD<20> 5.4D 5.4G 11.1A 11.1C
11.2A
FBD_CMD<21> 5.4D 5.4G 11.1A 11.1C
11.2A
FBD_CMD<23> 5.4D 5.4G 11.1C 11.2A
11.5C
FBD_CMD<24> 5.4D 5.5G 11.1C 11.2A
11.5C
FBD_CMD<25> 5.4D 5.5G 11.1C 11.2A
11.5C
FBD_CMD<26> 5.4D 5.5G 11.1C 11.2A
11.5C
FBD_CMD<27> 5.4D 5.5G 11.1C 11.2A
11.5C
FBD_CMD<28> 5.4D 5.5G 11.1C 11.2A
11.5C
FBD_D<0> 5.1D 5.1G 11.2A 11.3A
FBD_D<1> 5.1G 5.2D 11.2A 11.3A
FBD_D<2> 5.1G 5.2D 11.2A 11.3A
FBD_D<3> 5.1G 5.2D 11.2A 11.3A
FBD_D<4> 5.1G 5.2D 11.2A 11.4A
FBD_D<5> 5.1G 5.2D 11.2A 11.4A
FBD_D<6> 5.1G 5.2D 11.2A 11.4A
FBD_D<7> 5.1G 5.2D 11.3A 11.4A
FBD_D<8> 5.1G 5.2D 11.3A 11.3B
FBD_D<9> 5.1G 5.2D 11.3A 11.3B
FBD_D<10> 5.1G 5.2D 11.3A 11.3B
FBD_D<11> 5.1G 5.2D 11.3A 11.3B
FBD_D<12> 5.1G 5.2D 11.3A 11.4B
FBD_D<13> 5.1G 5.2D 11.3A 11.4B
FBD_D<14> 5.1G 5.2D 11.3A 11.4B
FBD_D<15> 5.1G 5.2D 11.3A 11.4B
FBD_D<16> 5.1G 5.2D 11.3A 11.4A
FBD_D<17> 5.1G 5.2D 11.3A 11.4A
FBD_D<18> 5.1G 5.2D 11.3A 11.4A
FBD_D<19> 5.1G 5.2D 11.3A 11.4A
FBD_D<20> 5.1G 5.2D 11.3A 11.4A
FBD_D<21> 5.1G 5.2D 11.3A 11.4A
FBD_D<22> 5.1G 5.2D 11.3A 11.4A
FBD_D<23> 5.1G 5.2D 11.3A 11.4A
FBD_D<24> 5.1G 5.2D 11.3A 11.4B
FBD_D<25> 5.1G 5.2D 11.3A 11.4B
FBD_D<26> 5.1G 5.2D 11.3A 11.4B
FBD_D<27> 5.2D 5.2G 11.3A 11.4B
FBD_D<28> 5.2D 5.2G 11.3A 11.4B
FBD_D<29> 5.2D 5.2G 11.3A 11.4B
FBD_D<30> 5.2D 5.2G 11.3A 11.4B
FBD_D<31> 5.2G 5.3D 11.3A 11.4B
FBD_D<32> 5.1E 5.2G 11.3A 11.3C
FBD_D<33> 5.2E 5.2G 11.3A 11.3C
FBD_D<34> 5.2E 5.2G 11.3A 11.3C
FBD_D<35> 5.2E 5.2G 11.3A 11.3C
FBD_D<36> 5.2E 5.2G 11.3A 11.4C
FBD_D<37> 5.2E 5.2G 11.4A 11.4C
FBD_D<38> 5.2E 5.2G 11.4A 11.4C
FBD_D<39> 5.2E 5.2G 11.4A 11.4C
FBD_D<40> 5.2E 5.2G 11.3C 11.4A
FBD_D<41> 5.2E 5.2G 11.3C 11.4A
FBD_D<42> 5.2E 5.2G 11.3C 11.4A
FBD_D<43> 5.2E 5.2G 11.3C 11.4A
FBD_D<44> 5.2E 5.2G 11.4A 11.4C
FBD_D<45> 5.2E 5.2G 11.4A 11.4C
FBD_D<46> 5.2E 5.2G 11.4A 11.4C
FBD_D<47> 5.2E 5.2G 11.4A 11.4C
FBD_D<48> 5.2E 5.2G 11.4A 11.4C
FBD_D<49> 5.2E 5.2G 11.4A 11.4C
FBD_D<50> 5.2E 5.2G 11.4A 11.4C
FBD_D<51> 5.2E 5.2G 11.4A 11.4C
FBD_D<52> 5.2E 5.2G 11.4A 11.4C
FBD_D<53> 5.2E 5.2G 11.4A 11.4C
FBD_D<54> 5.2E 5.2G 11.4A 11.4C
FBD_D<55> 5.2E 5.2G 11.4A 11.4C
FBD_D<56> 5.2E 5.2G 11.4A 11.4C
FBD_D<57> 5.2E 5.3G 11.4A 11.4C
FBD_D<58> 5.2E 5.3G 11.4A 11.4C
FBD_D<59> 5.2E 5.3G 11.4A 11.4C
FBD_D<60> 5.2E 5.3G 11.4A 11.4C
FBD_D<61> 5.2E 5.3G 11.4A 11.4C
FBD_D<62> 5.2E 5.3G 11.4A 11.4C
FBD_D<63> 5.3E 5.3G 11.4A 11.4C
FBD_DEBUG 5.3E
FBD_DQM0 5.3D 5.3H<> 11.4A<>
11.4A
FBD_DQM1 5.3D 5.3H<> 11.4B
11.5A<>
FBD_DQM2 5.3D 5.3H<> 11.4A
11.5A<>
FBD_DQM3 5.3D 5.3H<> 11.4B
11.5A<>
FBD_DQM4 5.3E 5.3H<> 11.4C
11.5A<>
FBD_DQM5 5.3E 5.3H<> 11.4C
11.5A<>
FBD_DQM6 5.3E 5.3H<> 11.4C
11.5A<>
FBD_DQM7 5.3E 5.3H<> 11.4C
11.5A<>
FBD_DQS_RN0 5.3D 5.3H< 11.4A
11.5A<
FBD_DQS_RN1 5.3D 5.3H< 11.4B
11.5A<
FBD_DQS_RN2 5.3D 5.3H< 11.4A
11.5A<
FBD_DQS_RN3 5.3D 5.3H< 11.4B
11.5A<
FBD_DQS_RN4 5.3E 5.3H< 11.4C
11.5A<
FBD_DQS_RN5 5.3E 5.3H< 11.4C
11.5A<
FBD_DQS_RN6 5.3E 5.3H< 11.4C
11.5A<
FBD_DQS_RN7 5.3E 5.3H< 11.4C
11.5A< FBD_D<0..63> 5.1H> 11.2A<>
FBD_DQS_WP0 5.3D 5.3H> 11.4A
11.5A>
FBD_DQS_WP1 5.3D 5.3H> 11.4B
11.5A>
FBD_DQS_WP2 5.3D 5.3H> 11.4A
11.5A>
FBD_DQS_WP3 5.3D 5.4H> 11.4B
11.5A>
FBD_DQS_WP4 5.3E 5.4H> 11.4C
11.5A>
FBD_DQS_WP5 5.3E 5.4H> 11.4C
11.5A>
FBD_DQS_WP6 5.3E 5.4H> 11.4C
11.5A>
FBD_DQS_WP7 5.3E 5.4H> 11.4C
11.5A>
FBD_SEN1 11.2A
FBD_SEN2 11.2C
FBD_VREF1 11.1H 11.3B
FBD_VREF2 11.2H 11.3B
FBD_VREF3 11.2H 11.3D
FBD_VREF4 11.3D 11.3H
FBD_ZQ1 11.2A
FBD_ZQ2 11.2C
FBE0_CLK0 6.4A 6.5G> 12.2A<
12.2A 12.4G
FBE0_CLK0* 6.4A 6.5G> 12.2A<
12.2A 12.4G
FBE0_CLK0_R 12.4H
FBE1_CLK0 6.4B 6.5G> 12.2A<
12.2C 12.4G
FBE1_CLK0* 6.4B 6.5G> 12.2A<
12.2C 12.4G
FBE1_CLK0_R 12.4H
FBEFGH_MPLL_AVDD 6.4C> 7.4C<
FBEF_REFCLK 6.3C< 18.5D>
FBEF_REFCLK* 6.3C< 18.5D>
FBE_CMD<0> 6.3A 6.4F 12.1A 12.1A
12.5A
FBE_CMD<0..28> 6.4G> 12.1A<
FBE_CMD<1> 6.3A 6.4F 12.1A 12.1A
12.5A
FBE_CMD<2> 6.3A 6.4F 12.1A 12.1A
12.5A
FBE_CMD<3> 6.3A 6.4F 12.1A 12.1A
12.5A
FBE_CMD<4> 6.3A 6.4F 12.1A 12.1A
12.5A
FBE_CMD<5> 6.3A 6.4F 12.1A 12.1A
12.5A
FBE_CMD<6> 6.3A 6.4F 12.1A 12.2A
12.2C 12.5F
FBE_CMD<7> 6.3A 6.4F 12.1A 12.1A
12.1C
FBE_CMD<8> 6.3A 6.4F 12.1A 12.2A
12.2C
FBE_CMD<9> 6.3A 6.4F 12.1A 12.1A
12.1C
FBE_CMD<10> 6.3A 6.4F 12.1A 12.2A
12.2C 12.5F
FBE_CMD<11> 6.4A 6.4F 12.1A 12.2A
12.2C
FBE_CMD<12> 6.4A 6.4F 12.1A 12.1A
12.1C
FBE_CMD<13> 6.4A 6.4F 12.1A 12.2A
12.2C
FBE_CMD<14> 6.4A 6.4F 12.1A 12.1A
12.1C
FBE_CMD<15> 6.4A 6.4F 12.1A 12.2A
12.2C
FBE_CMD<16> 6.4A 6.4F 12.1A 12.1A
12.1C
FBE_CMD<17> 6.4A 6.4F 12.1A 12.1A
12.1C
FBE_CMD<18> 6.4A 6.4F 12.1A 12.1A
12.1C
FBE_CMD<19> 6.4A 6.4F 12.1A 12.1A
12.1C
FBE_CMD<20> 6.4A 6.4F 12.1A 12.1C
12.2A
FBE_CMD<21> 6.4A 6.4F 12.1A 12.1C
12.2A
FBE_CMD<23> 6.4A 6.4F 12.1C 12.2A
12.5C
FBE_CMD<24> 6.4A 6.5F 12.1C 12.2A
12.5C
FBE_CMD<25> 6.4A 6.5F 12.1C 12.2A
12.5C
FBE_CMD<26> 6.4A 6.5F 12.1C 12.2A
12.5C
FBE_CMD<27> 6.4A 6.5F 12.1C 12.2A
12.5C
FBE_CMD<28> 6.4A 6.5F 12.1C 12.2A
12.5C
FBE_D<0> 6.1A 6.1F 12.2A 12.3A
FBE_D<0..63> 6.1G> 12.2A<>
FBE_D<1> 6.1F 6.2A 12.2A 12.3A
FBE_D<2> 6.1F 6.2A 12.2A 12.3A
FBE_D<3> 6.1F 6.2A 12.2A 12.3A
FBE_D<4> 6.1F 6.2A 12.2A 12.4A
FBE_D<5> 6.1F 6.2A 12.2A 12.4A
FBE_D<6> 6.1F 6.2A 12.2A 12.4A
FBE_D<7> 6.1F 6.2A 12.3A 12.4A
FBE_D<8> 6.1F 6.2A 12.3A 12.3B
FBE_D<9> 6.1F 6.2A 12.3A 12.3B
FBE_D<10> 6.1F 6.2A 12.3A 12.3B
FBE_D<11> 6.1F 6.2A 12.3A 12.3B
FBE_D<12> 6.1F 6.2A 12.3A 12.4B
FBE_D<13> 6.1F 6.2A 12.3A 12.4B
FBE_D<14> 6.1F 6.2A 12.3A 12.4B
FBE_D<15> 6.1F 6.2A 12.3A 12.4B
FBE_D<16> 6.1F 6.2A 12.3A 12.4A
FBE_D<17> 6.1F 6.2A 12.3A 12.4A
FBE_D<18> 6.1F 6.2A 12.3A 12.4A
FBE_D<19> 6.1F 6.2A 12.3A 12.4A
FBE_D<20> 6.1F 6.2A 12.3A 12.4A
FBE_D<21> 6.1F 6.2A 12.3A 12.4A
FBE_D<22> 6.1F 6.2A 12.3A 12.4A
FBE_D<23> 6.1F 6.2A 12.3A 12.4A
FBE_D<24> 6.1F 6.2A 12.3A 12.4B
FBE_D<25> 6.1F 6.2A 12.3A 12.4B
FBE_D<26> 6.1F 6.2A 12.3A 12.4B
FBE_D<27> 6.2A 6.2F 12.3A 12.4B
FBE_D<28> 6.2A 6.2F 12.3A 12.4B
FBE_D<29> 6.2A 6.2F 12.3A 12.4B
FBE_D<30> 6.2A 6.2F 12.3A 12.4B
FBE_D<31> 6.2F 6.3A 12.3A 12.4B
FBE_D<32> 6.1B 6.2F 12.3A 12.3C
FBE_D<33> 6.2B 6.2F 12.3A 12.3C
FBE_D<34> 6.2B 6.2F 12.3A 12.3C
FBE_D<35> 6.2B 6.2F 12.3A 12.3C
FBE_D<36> 6.2B 6.2F 12.3A 12.4C
FBE_D<37> 6.2B 6.2F 12.4A 12.4C
FBE_D<38> 6.2B 6.2F 12.4A 12.4C
FBE_D<39> 6.2B 6.2F 12.4A 12.4C
FBE_D<40> 6.2B 6.2F 12.3C 12.4A
FBE_D<41> 6.2B 6.2F 12.3C 12.4A
FBE_D<42> 6.2B 6.2F 12.3C 12.4A
FBE_D<43> 6.2B 6.2F 12.3C 12.4A
FBE_D<44> 6.2B 6.2F 12.4A 12.4C
FBE_D<45> 6.2B 6.2F 12.4A 12.4C
FBE_D<46> 6.2B 6.2F 12.4A 12.4C
FBE_D<47> 6.2B 6.2F 12.4A 12.4C
FBE_D<48> 6.2B 6.2F 12.4A 12.4C
FBE_D<49> 6.2B 6.2F 12.4A 12.4C
FBE_D<50> 6.2B 6.2F 12.4A 12.4C
FBE_D<51> 6.2B 6.2F 12.4A 12.4C
FBE_D<52> 6.2B 6.2F 12.4A 12.4C
FBE_D<53> 6.2B 6.2F 12.4A 12.4C
FBE_D<54> 6.2B 6.2F 12.4A 12.4C
FBE_D<55> 6.2B 6.2F 12.4A 12.4C
FBE_D<56> 6.2B 6.2F 12.4A 12.4C
FBE_D<57> 6.2B 6.3F 12.4A 12.4C
FBE_D<58> 6.2B 6.3F 12.4A 12.4C
FBE_D<59> 6.2B 6.3F 12.4A 12.4C
FBE_D<60> 6.2B 6.3F 12.4A 12.4C
FBE_D<61> 6.2B 6.3F 12.4A 12.4C
FBE_D<62> 6.2B 6.3F 12.4A 12.4C
FBE_D<63> 6.3B 6.3F 12.4A 12.4C
FBE_DEBUG 6.3B
FBE_DQM0 6.3A 6.3G<> 12.4A<>
12.4A
FBE_DQM1 6.3A 6.3G<> 12.4B
12.5A<>
FBE_DQM2 6.3A 6.3G<> 12.4A
12.5A<>
FBE_DQM3 6.3A 6.3G<> 12.4B
12.5A<>
FBE_DQM4 6.3B 6.3G<> 12.4C
12.5A<>
FBE_DQM5 6.3B 6.3G<> 12.4C
12.5A<>
FBE_DQM6 6.3B 6.3G<> 12.4C
12.5A<>
FBE_DQM7 6.3B 6.3G<> 12.4C
12.5A<>
FBE_DQS_RN0 6.3A 6.3G< 12.4A
12.5A<
FBE_DQS_RN1 6.3A 6.3G< 12.4B
12.5A<
FBE_DQS_RN2 6.3A 6.3G< 12.4A
12.5A<
FBE_DQS_RN3 6.3A 6.3G< 12.4B
12.5A<
FBE_DQS_RN4 6.3B 6.3G< 12.4C
12.5A<
FBE_DQS_RN5 6.3B 6.3G< 12.4C
12.5A<
FBE_DQS_RN6 6.3B 6.3G< 12.4C
12.5A<
FBE_DQS_RN7 6.3B 6.3G< 12.4C
12.5A<
FBE_DQS_WP0 6.3A 6.3G> 12.4A
12.5A>
FBE_DQS_WP1 6.3A 6.3G> 12.4B
12.5A>
FBE_DQS_WP2 6.3A 6.3G> 12.4A
12.5A>
FBE_DQS_WP3 6.3A 6.4G> 12.4B
12.5A>
FBE_DQS_WP4 6.3B 6.4G> 12.4C
12.5A>
FBE_DQS_WP5 6.3B 6.4G> 12.4C
12.5A>
FBE_DQS_WP6 6.3B 6.4G> 12.4C
12.5A>
FBE_DQS_WP7 6.3B 6.4G> 12.4C
12.5A>
FBE_SEN1 12.2A
FBE_SEN2 12.2C
FBE_VREF1 12.1H 12.3B
FBE_VREF2 12.2H 12.3B
FBE_VREF3 12.2H 12.3D
FBE_VREF4 12.3D 12.3H
FBE_ZQ1 12.2A
FBE_ZQ2 12.2C
FBF0_CLK0 6.4C 6.5H> 13.2A<
13.2A 13.4G
FBF0_CLK0* 6.4C 6.5H> 13.2A<
13.2A 13.4G
FBF0_CLK0_R 13.4H
FBF1_CLK0 6.4E 6.5H> 13.2A<
13.2C 13.4G
FBF1_CLK0* 6.4E 6.5H> 13.2A<
13.2C 13.4G
FBF1_CLK0_R 13.4H
FBF_CMD<0> 6.3D 6.4G 13.1A 13.1A
13.5A
FBF_CMD<0..28> 6.4H> 13.1A<
FBF_CMD<1> 6.3D 6.4G 13.1A 13.1A
13.5A
FBF_CMD<2> 6.3D 6.4G 13.1A 13.1A
13.5A
FBF_CMD<3> 6.3D 6.4G 13.1A 13.1A
13.5A
FBF_CMD<4> 6.3D 6.4G 13.1A 13.1A
13.5A
FBF_CMD<5> 6.3D 6.4G 13.1A 13.1A
13.5A
FBF_CMD<6> 6.3D 6.4G 13.1A 13.2A
13.2C 13.5F
FBF_CMD<7> 6.3D 6.4G 13.1A 13.1A
13.1C
FBF_CMD<8> 6.3D 6.4G 13.1A 13.2A
13.2C
FBF_CMD<9> 6.3D 6.4G 13.1A 13.1A
13.1C
FBF_CMD<10> 6.3D 6.4G 13.1A 13.2A
13.2C 13.5F
FBF_CMD<11> 6.4D 6.4G 13.1A 13.2A
13.2C
FBF_CMD<12> 6.4D 6.4G 13.1A 13.1A
13.1C
FBF_CMD<13> 6.4D 6.4G 13.1A 13.2A
13.2C
FBF_CMD<14> 6.4D 6.4G 13.1A 13.1A
13.1C
FBF_CMD<15> 6.4D 6.4G 13.1A 13.2A
13.2C
FBF_CMD<16> 6.4D 6.4G 13.1A 13.1A
13.1C
FBF_CMD<17> 6.4D 6.4G 13.1A 13.1A
13.1C
FBF_CMD<18> 6.4D 6.4G 13.1A 13.1A
13.1C
FBF_CMD<19> 6.4D 6.4G 13.1A 13.1A
13.1C
FBF_CMD<20> 6.4D 6.4G 13.1A 13.1C
13.2A
FBF_CMD<21> 6.4D 6.4G 13.1A 13.1C
13.2A
FBF_CMD<23> 6.4D 6.4G 13.1C 13.2A
13.5C
FBF_CMD<24> 6.4D 6.5G 13.1C 13.2A
13.5C
FBF_CMD<25> 6.4D 6.5G 13.1C 13.2A
13.5C
FBF_CMD<26> 6.4D 6.5G 13.1C 13.2A
13.5C
FBF_CMD<27> 6.4D 6.5G 13.1C 13.2A
13.5C
FBF_CMD<28> 6.4D 6.5G 13.1C 13.2A
13.5C
FBF_D<0> 6.1D 6.1G 13.2A 13.3A
FBF_D<0..63> 6.1H> 13.2A<>
FBF_D<1> 6.1G 6.2D 13.2A 13.3A
FBF_D<2> 6.1G 6.2D 13.2A 13.3A
FBF_D<3> 6.1G 6.2D 13.2A 13.3A
FBF_D<4> 6.1G 6.2D 13.2A 13.4A
FBF_D<5> 6.1G 6.2D 13.2A 13.4A
FBF_D<6> 6.1G 6.2D 13.2A 13.4A
FBF_D<7> 6.1G 6.2D 13.3A 13.4A
FBF_D<8> 6.1G 6.2D 13.3A 13.3B
FBF_D<9> 6.1G 6.2D 13.3A 13.3B
FBF_D<10> 6.1G 6.2D 13.3A 13.3B
FBF_D<11> 6.1G 6.2D 13.3A 13.3B
FBF_D<12> 6.1G 6.2D 13.3A 13.4B
FBF_D<13> 6.1G 6.2D 13.3A 13.4B
FBF_D<14> 6.1G 6.2D 13.3A 13.4B
FBF_D<15> 6.1G 6.2D 13.3A 13.4B
FBF_D<16> 6.1G 6.2D 13.3A 13.4A
FBF_D<17> 6.1G 6.2D 13.3A 13.4A
FBF_D<18> 6.1G 6.2D 13.3A 13.4A
FBF_D<19> 6.1G 6.2D 13.3A 13.4A
FBF_D<20> 6.1G 6.2D 13.3A 13.4A
FBF_D<21> 6.1G 6.2D 13.3A 13.4A
FBF_D<22> 6.1G 6.2D 13.3A 13.4A
FBF_D<23> 6.1G 6.2D 13.3A 13.4A
FBF_D<24> 6.1G 6.2D 13.3A 13.4B
FBF_D<25> 6.1G 6.2D 13.3A 13.4B
FBF_D<26> 6.1G 6.2D 13.3A 13.4B
FBF_D<27> 6.2D 6.2G 13.3A 13.4B
FBF_D<28> 6.2D 6.2G 13.3A 13.4B
FBF_D<29> 6.2D 6.2G 13.3A 13.4B
FBF_D<30> 6.2D 6.2G 13.3A 13.4B
FBF_D<31> 6.2G 6.3D 13.3A 13.4B
FBF_D<32> 6.1E 6.2G 13.3A 13.3C
FBF_D<33> 6.2E 6.2G 13.3A 13.3C
FBF_D<34> 6.2E 6.2G 13.3A 13.3C
FBF_D<35> 6.2E 6.2G 13.3A 13.3C
FBF_D<36> 6.2E 6.2G 13.3A 13.4C
FBF_D<37> 6.2E 6.2G 13.4A 13.4C
FBF_D<38> 6.2E 6.2G 13.4A 13.4C
FBF_D<39> 6.2E 6.2G 13.4A 13.4C
FBF_D<40> 6.2E 6.2G 13.3C 13.4A
FBF_D<41> 6.2E 6.2G 13.3C 13.4A
FBF_D<42> 6.2E 6.2G 13.3C 13.4A
FBF_D<43> 6.2E 6.2G 13.3C 13.4A
FBF_D<44> 6.2E 6.2G 13.4A 13.4C
FBF_D<45> 6.2E 6.2G 13.4A 13.4C
FBF_D<46> 6.2E 6.2G 13.4A 13.4C
FBF_D<47> 6.2E 6.2G 13.4A 13.4C
FBF_D<48> 6.2E 6.2G 13.4A 13.4C
FBF_D<49> 6.2E 6.2G 13.4A 13.4C
FBF_D<50> 6.2E 6.2G 13.4A 13.4C
FBF_D<51> 6.2E 6.2G 13.4A 13.4C
FBF_D<52> 6.2E 6.2G 13.4A 13.4C
FBF_D<53> 6.2E 6.2G 13.4A 13.4C
FBF_D<54> 6.2E 6.2G 13.4A 13.4C
FBF_D<55> 6.2E 6.2G 13.4A 13.4C
FBF_D<56> 6.2E 6.2G 13.4A 13.4C
FBF_D<57> 6.2E 6.3G 13.4A 13.4C
FBF_D<58> 6.2E 6.3G 13.4A 13.4C
FBF_D<59> 6.2E 6.3G 13.4A 13.4C
FBF_D<60> 6.2E 6.3G 13.4A 13.4C
FBF_D<61> 6.2E 6.3G 13.4A 13.4C
FBF_D<62> 6.2E 6.3G 13.4A 13.4C
FBF_D<63> 6.3E 6.3G 13.4A 13.4C
FBF_DEBUG 6.3E
FBF_DQM0 6.3D 6.3H<> 13.4A<>
13.4A
FBF_DQM1 6.3D 6.3H<> 13.4B
13.5A<>
FBF_DQM2 6.3D 6.3H<> 13.4A
13.5A<>
FBF_DQM3 6.3D 6.3H<> 13.4B
13.5A<>
FBF_DQM4 6.3E 6.3H<> 13.4C
13.5A<>
FBF_DQM5 6.3E 6.3H<> 13.4C
13.5A<>
FBF_DQM6 6.3E 6.3H<> 13.4C
13.5A<>
FBF_DQM7 6.3E 6.3H<> 13.4C
13.5A<>
FBF_DQS_RN0 6.3D 6.3H< 13.4A
13.5A<
FBF_DQS_RN1 6.3D 6.3H< 13.4B
13.5A<
FBF_DQS_RN2 6.3D 6.3H< 13.4A
13.5A<
FBF_DQS_RN3 6.3D 6.3H< 13.4B
13.5A<
FBF_DQS_RN4 6.3E 6.3H< 13.4C
13.5A<
FBF_DQS_RN5 6.3E 6.3H< 13.4C
13.5A<
FBF_DQS_RN6 6.3E 6.3H< 13.4C
13.5A<
FBF_DQS_RN7 6.3E 6.3H< 13.4C
13.5A<
FBF_DQS_WP0 6.3D 6.3H> 13.4A
13.5A>
13.5A>
FBF_DQS_WP2 6.3D 6.3H> 13.4A
13.5A>
FBF_DQS_WP3 6.3D 6.4H> 13.4B
13.5A>
FBF_DQS_WP4 6.3E 6.4H> 13.4C
13.5A>
FBF_DQS_WP5 6.3E 6.4H> 13.4C
13.5A>
FBF_DQS_WP6 6.3E 6.4H> 13.4C
13.5A>
FBF_DQS_WP7 6.3E 6.4H> 13.4C
13.5A>
FBF_SEN1 13.2A
FBF_SEN2 13.2C
FBF_VREF1 13.1H 13.3B
FBF_VREF2 13.2H 13.3B
FBF_VREF3 13.2H 13.3D
FBF_VREF4 13.3D 13.3H
FBF_ZQ1 13.2A
FBF_ZQ2 13.2C
FBG0_CLK0 7.4A 7.5G> 14.2A<
14.2A 14.4G
FBG0_CLK0* 7.4A 7.5G> 14.2A<
14.2A 14.4G
FBG0_CLK0_R 14.4H
FBG1_CLK0 7.4B 7.5G> 14.2A<
14.2C 14.4G
FBG1_CLK0* 7.4B 7.5G> 14.2A<
14.2C 14.4G
FBG1_CLK0_R 14.4H
FBGH_REFCLK 7.3C< 18.5D>
FBGH_REFCLK* 7.3C< 18.5D>
FBG_CMD<0> 7.3A 7.4F 14.1A 14.1A
14.5A
FBG_CMD<0..28> 7.4G> 14.1A<
FBG_CMD<1> 7.3A 7.4F 14.1A 14.1A
14.5A
FBG_CMD<2> 7.3A 7.4F 14.1A 14.1A
14.5A
FBG_CMD<3> 7.3A 7.4F 14.1A 14.1A
14.5A
FBG_CMD<4> 7.3A 7.4F 14.1A 14.1A
14.5A
FBG_CMD<5> 7.3A 7.4F 14.1A 14.1A
14.5A
FBG_CMD<6> 7.3A 7.4F 14.1A 14.2A
14.2C 14.5F
FBG_CMD<7> 7.3A 7.4F 14.1A 14.1A
14.1C
FBG_CMD<8> 7.3A 7.4F 14.1A 14.2A
14.2C
FBG_CMD<9> 7.3A 7.4F 14.1A 14.1A
14.1C
FBG_CMD<10> 7.3A 7.4F 14.1A 14.2A
14.2C 14.5F
FBG_CMD<11> 7.4A 7.4F 14.1A 14.2A
14.2C
FBG_CMD<12> 7.4A 7.4F 14.1A 14.1A
14.1C
FBG_CMD<13> 7.4A 7.4F 14.1A 14.2A
14.2C
FBG_CMD<14> 7.4A 7.4F 14.1A 14.1A
14.1C
FBG_CMD<15> 7.4A 7.4F 14.1A 14.2A
14.2C
FBG_CMD<16> 7.4A 7.4F 14.1A 14.1A
14.1C
FBG_CMD<17> 7.4A 7.4F 14.1A 14.1A
14.1C
FBG_CMD<18> 7.4A 7.4F 14.1A 14.1A
14.1C
FBG_CMD<19> 7.4A 7.4F 14.1A 14.1A
14.1C
FBG_CMD<20> 7.4A 7.4F 14.1A 14.1C
14.2A
FBG_CMD<21> 7.4A 7.4F 14.1A 14.1C
14.2A
FBG_CMD<23> 7.4A 7.4F 14.1C 14.2A
14.5C
FBG_CMD<24> 7.4A 7.5F 14.1C 14.2A
14.5C
FBG_CMD<25> 7.4A 7.5F 14.1C 14.2A
14.5C
FBG_CMD<26> 7.4A 7.5F 14.1C 14.2A
14.5C
FBG_CMD<27> 7.4A 7.5F 14.1C 14.2A
14.5C
FBG_CMD<28> 7.4A 7.5F 14.1C 14.2A
14.5C
FBG_D<0> 7.1A 7.1F 14.2A 14.3A
FBG_D<0..63> 7.1G> 14.2A<>
FBG_D<1> 7.1F 7.2A 14.2A 14.3A
FBG_D<2> 7.1F 7.2A 14.2A 14.3A
FBG_D<3> 7.1F 7.2A 14.2A 14.3A
FBG_D<4> 7.1F 7.2A 14.2A 14.4AFBF_DQS_WP1 6.3D 6.3H> 13.4B
FBG_D<5> 7.1F 7.2A 14.2A 14.4A
FBG_D<6> 7.1F 7.2A 14.2A 14.4A
FBG_D<7> 7.1F 7.2A 14.3A 14.4A
FBG_D<8> 7.1F 7.2A 14.3A 14.3B
FBG_D<9> 7.1F 7.2A 14.3A 14.3B
FBG_D<10> 7.1F 7.2A 14.3A 14.3B
FBG_D<11> 7.1F 7.2A 14.3A 14.3B
FBG_D<12> 7.1F 7.2A 14.3A 14.4B
FBG_D<13> 7.1F 7.2A 14.3A 14.4B
FBG_D<14> 7.1F 7.2A 14.3A 14.4B
FBG_D<15> 7.1F 7.2A 14.3A 14.4B
FBG_D<16> 7.1F 7.2A 14.3A 14.4A
FBG_D<17> 7.1F 7.2A 14.3A 14.4A
FBG_D<18> 7.1F 7.2A 14.3A 14.4A
FBG_D<19> 7.1F 7.2A 14.3A 14.4A
FBG_D<20> 7.1F 7.2A 14.3A 14.4A
FBG_D<21> 7.1F 7.2A 14.3A 14.4A
FBG_D<22> 7.1F 7.2A 14.3A 14.4A
FBG_D<23> 7.1F 7.2A 14.3A 14.4A
FBG_D<24> 7.1F 7.2A 14.3A 14.4B
FBG_D<25> 7.1F 7.2A 14.3A 14.4B
FBG_D<26> 7.1F 7.2A 14.3A 14.4B
FBG_D<27> 7.2A 7.2F 14.3A 14.4B
FBG_D<28> 7.2A 7.2F 14.3A 14.4B
FBG_D<29> 7.2A 7.2F 14.3A 14.4B
FBG_D<30> 7.2A 7.2F 14.3A 14.4B
FBG_D<31> 7.2F 7.3A 14.3A 14.4B
FBG_D<32> 7.1B 7.2F 14.3A 14.3C
FBG_D<33> 7.2B 7.2F 14.3A 14.3C
FBG_D<34> 7.2B 7.2F 14.3A 14.3C
FBG_D<35> 7.2B 7.2F 14.3A 14.3C
FBG_D<36> 7.2B 7.2F 14.3A 14.4C
FBG_D<37> 7.2B 7.2F 14.4A 14.4C
FBG_D<38> 7.2B 7.2F 14.4A 14.4C
FBG_D<39> 7.2B 7.2F 14.4A 14.4C
FBG_D<40> 7.2B 7.2F 14.3C 14.4A
FBG_D<41> 7.2B 7.2F 14.3C 14.4A
FBG_D<42> 7.2B 7.2F 14.3C 14.4A
FBG_D<43> 7.2B 7.2F 14.3C 14.4A
FBG_D<44> 7.2B 7.2F 14.4A 14.4C
FBG_D<45> 7.2B 7.2F 14.4A 14.4C
FBG_D<46> 7.2B 7.2F 14.4A 14.4C
FBG_D<47> 7.2B 7.2F 14.4A 14.4C
FBG_D<48> 7.2B 7.2F 14.4A 14.4C
FBG_D<49> 7.2B 7.2F 14.4A 14.4C
FBG_D<50> 7.2B 7.2F 14.4A 14.4C
FBG_D<51> 7.2B 7.2F 14.4A 14.4C
FBG_D<52> 7.2B 7.2F 14.4A 14.4C
FBG_D<53> 7.2B 7.2F 14.4A 14.4C
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
<edit here to insert page detail>
www.vinafix.vn
600-10897-0053-300 A
p897
misun
37 OF 41
31-DEC-2008
Page 38
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
FBG_D<54> 7.2B 7.2F 14.4A 14.4C
FBG_D<55> 7.2B 7.2F 14.4A 14.4C
FBG_D<56> 7.2B 7.2F 14.4A 14.4C
FBG_D<57> 7.2B 7.3F 14.4A 14.4C
FBG_D<58> 7.2B 7.3F 14.4A 14.4C
FBG_D<59> 7.2B 7.3F 14.4A 14.4C
FBG_D<60> 7.2B 7.3F 14.4A 14.4C
FBG_D<61> 7.2B 7.3F 14.4A 14.4C
FBG_D<62> 7.2B 7.3F 14.4A 14.4C
FBG_D<63> 7.3B 7.3F 14.4A 14.4C
FBG_DEBUG 7.3B
FBG_DQM0 7.3A 7.3G<> 14.4A<>
14.4A
FBG_DQM1 7.3A 7.3G<> 14.4B
14.5A<>
FBG_DQM2 7.3A 7.3G<> 14.4A
14.5A<>
FBG_DQM3 7.3A 7.3G<> 14.4B
14.5A<>
FBG_DQM4 7.3B 7.3G<> 14.4C
14.5A<>
FBG_DQM5 7.3B 7.3G<> 14.4C
14.5A<>
FBG_DQM6 7.3B 7.3G<> 14.4C
14.5A<>
FBG_DQM7 7.3B 7.3G<> 14.4C
14.5A<>
FBG_DQS_RN0 7.3A 7.3G< 14.4A
14.5A<
FBG_DQS_RN1 7.3A 7.3G< 14.4B
14.5A<
FBG_DQS_RN2 7.3A 7.3G< 14.4A
14.5A<
FBG_DQS_RN3 7.3A 7.3G< 14.4B
14.5A<
FBG_DQS_RN4 7.3B 7.3G< 14.4C
14.5A<
FBG_DQS_RN5 7.3B 7.3G< 14.4C
14.5A<
FBG_DQS_RN6 7.3B 7.3G< 14.4C
14.5A<
FBG_DQS_RN7 7.3B 7.3G< 14.4C
14.5A<
FBG_DQS_WP0 7.3A 7.3G> 14.4A
14.5A>
FBG_DQS_WP1 7.3A 7.3G> 14.4B
FBG_DQS_WP2 7.3A 7.3G> 14.4A
14.5A>
FBG_DQS_WP3 7.3A 7.4G> 14.4B
14.5A>
FBG_DQS_WP4 7.3B 7.4G> 14.4C
14.5A>
FBG_DQS_WP5 7.3B 7.4G> 14.4C
14.5A>
FBG_DQS_WP6 7.3B 7.4G> 14.4C
14.5A>
FBG_DQS_WP7 7.3B 7.4G> 14.4C
14.5A>
FBG_SEN1 14.2A
FBG_SEN2 14.2C
FBG_VREF1 14.1H 14.3B
FBG_VREF2 14.2H 14.3B
FBG_VREF3 14.2H 14.3D
FBG_VREF4 14.3D 14.3H
FBG_ZQ1 14.2A
FBG_ZQ2 14.2C
FBVDDQ_SENSE 30.3G< 30.4B>
FB_CAL_PD_VDDQ 4.5B
FB_CAL_PU_GND 4.5B
FB_CAL_TERM_GND 4.5B
FL_REFCLK_VAIO 25.3B
GPIO0_DVIAB_HPD 22.4D> 25.2F<
GPIO0_DVIAB_HPD_CO 22.4F
N
GPIO0_DVIAB_HPD_R 22.4E
GPIO1_DVICD_HPD 23.4D> 25.2F<
GPIO1_DVICD_HPD_CO 23.3G 23.4F
N
GPIO1_DVICD_HPD_R 23.4E
GPIO4_PS5_NVVDD_VI 25.3F> 31.3B<
D4
GPIO5_PS5_NVVDD_VI 25.3F> 31.2B<
D1
GPIO6_PS5_NVVDD_VI 25.3F> 31.2B<
D2
GPIO7_PS5_NVVDD_VI 25.3F> 31.3B<
D3
GPIO8_FAN_TACH 25.3F< 26.3F>
GPIO9_THERM_ALERT* 25.3G< 26.4E> 26.4E>
GPIO10_PS5_NVVDD_V 25.3F> 31.3B<
ID4
GPIO11_RASTERSYNC1 24.3F<> 25.3F<>
GPIO11_RASTERSYNC1 24.2G
_R
GPIO14_RASTERSYNC2 24.3F<> 25.3F<>
GPIO14_RASTERSYNC2 24.3G
_R
GPIO15_SWAPRDY 24.3F<> 25.3G<>
25.3G<>
GPU_BUFCLK_LDT_IN 18.4E
GPU_CLK 18.4C
GPU_CLK* 18.4C
GPU_HOT_RESET* 18.4E
GPU_PEX_PWR_GOOD* 18.4E
GPU_PMC_ISO_RESET* 18.4E
GPU_RST* 25.2B< 26.3F< 26.5E<
27.4H> 27.5F
GPU_RST_R* 26.3G
GPU_RST_RC* 26.5F
GPU_RST_R_MOS 26.2G
GPU_TESTMODE 28.4G
GV_PLLAVDD 18.1C
GV_RX0 18.3E
GV_RX0* 18.3E
GV_RX1 18.3E
GV_RX1* 18.3E
GV_RX2 18.3E
GV_RX2* 18.3E
GV_RX3 18.3E
GV_RX3* 18.3E
GV_RXCLK 18.4E
GV_RXCLK* 18.4E
GV_RXCTL 18.4E
GV_RXCTL* 18.4E
GV_RX_RSET_VDD 18.3C
GV_TX0 18.1E
GV_TX0* 18.1E
GV_TX1 18.1E
GV_TX1* 18.1E
GV_TX2 18.1E
GV_TX2* 18.1E
GV_TX3 18.1E
GV_TX3* 18.1E
GV_TX4 18.1E
GV_TX4* 18.1E
GV_TX5 18.1E
GV_TX5* 18.1E
GV_TX6 18.1E
GV_TX6* 18.2E
GV_TX7 18.2E
GV_TX7* 18.2E
GV_TX8 18.2E 14.5A>
GV_TX8* 18.2E
GV_TX9 18.2E
GV_TX9* 18.2E
GV_TX10 18.2E
GV_TX10* 18.2E
GV_TX11 18.2E
GV_TX11* 18.2E
GV_TX12 18.2E
GV_TX12* 18.2E
GV_TX13 18.2E
GV_TX13* 18.2E
GV_TX14 18.2E
GV_TX14* 18.2E
GV_TX15 18.2E
GV_TX15* 18.2E
GV_TX16 18.2E
GV_TX16* 18.3E
GV_TX17 18.3E
GV_TX17* 18.3E
GV_TX18 18.3E
GV_TX18* 18.3E
GV_TX19 18.3E
GV_TX19* 18.3E
GV_TXCLK 18.3E
GV_TXCLK* 18.3E
GV_TXCTL 18.3E
GV_TXCTL* 18.3E
GV_TX_RSET_GND 18.3C
HYBRID_HPD_DVIAB 27.4G
HYBRID_HPD_DVICD_D 27.4G
P
HYBRID_HPD_E 27.4G
HYBRID_HPD_F 27.4G
HYBRID_PRG_TP 27.5E
I2C1_SCL 19.3C
I2C1_SCL_CON 19.1H> 23.3G<
I2C1_SCL_R 19.1F
I2C1_SDA 19.3C
I2C1_SDA_CON 19.1H<> 23.3G<
I2C1_SDA_R 19.1F
I2C1_SDA_UC 27.4G
I2C2_SCL 20.3C
I2C2_SCL_CON 20.1H> 22.3G<
I2C2_SCL_R 20.1F
I2C2_SDA 20.3C
I2C2_SDA_CON 20.1H<> 22.3G<
I2C2_SDA_R 20.1F
I2C2_SDA_UC 27.4G
I2C3_SCL 25.2D
I2C3_SCL_R 25.2F> 26.4C< 26.4C<
27.4E>
I2C3_SDA 25.2D
I2C3_SDA_R 25.2F<> 26.4C<>
26.4C<> 27.4E<>
I2C4_SCL 25.2D
I2C4_SDA 25.2D
I2C4_SDA_R 25.2G
I2CS_SCL 3.1E
I2CS_SCL_R 27.4E
I2CS_SDA 3.2E
I2CS_SDA_R 27.4E
IFPAB_IOVDD 22.3B
IFPAB_PLLVDD 22.3B
IFPAB_RSET 22.2B
IFPA_TXC 22.2E
IFPA_TXC* 22.2E
IFPA_TXD0 22.3E
IFPA_TXD0* 22.2E
IFPA_TXD1 22.3E
IFPA_TXD1* 22.3E
IFPA_TXD2 22.3E
IFPA_TXD2* 22.3E
IFPB_TXD4 22.3E
IFPB_TXD4* 22.3E
IFPB_TXD5 22.3E
IFPB_TXD5* 22.3E
IFPB_TXD6 22.3E
IFPB_TXD6* 22.3E
IFPCD_IOVDD 23.3B
IFPCD_PLLVDD 23.3B
IFPCD_RSET 23.2B
IFPC_TXC 23.2E
IFPC_TXC* 23.2E
IFPC_TXD0 23.3E
IFPC_TXD0* 23.2E
IFPC_TXD1 23.3E
IFPC_TXD1* 23.3E
IFPC_TXD2 23.3E
IFPC_TXD2* 23.3E
IFPD_TXD4 23.3E
IFPD_TXD4* 23.3E
IFPD_TXD5 23.3E
IFPD_TXD5* 23.3E
IFPD_TXD6 23.3E
IFPD_TXD6* 23.3E
IFP_IOVDD_EN 26.3H
INPUT_PEX6_IN1 34.3A
INPUT_PEX6_IN2 34.4A
JTAG_TCK 3.1E
JTAG_TDI 3.1E
JTAG_TDI_GPU 3.1E
JTAG_TDI_NVIO 3.1F
JTAG_TDO 3.1E
JTAG_TDO_GPU 3.1E
JTAG_TDO_NVIO 3.1F
JTAG_TMS 3.1E
JTAG_TRST* 3.1E
JTAG_TRST2 3.1G
JTAG_TRST_3V3 3.1G
JTAG_TRST_3V3* 3.1G
MIOA_CTL3 27.2C 27.3E
MIOA_VREF 27.2B
MIOB_CTL3 27.2E 27.3C
MIOB_VREF 27.3B
NVIO_CLK_RSET_GND 18.5C
NVIO_EXTDEV_RST* 25.3D
NVIO_EXT_REFCLKA 25.3D
NVIO_EXT_REFCLKA_R 24.2F<> 25.3F<>
NVIO_EXT_REFCLKB 25.3D
NVIO_EXT_REFCLKB_R 24.3F<> 25.3F<>
NVIO_GVDR_RX_RSET_ 18.3F
GND
NVIO_GVDR_TX_RSET_ 18.3F
GND
NVIO_GV_PLLAVDD 18.4F
NVIO_GV_PLLVDD 18.4F
NVIO_PLLVDD 18.4A
NVIO_SP_PLLVDD 18.5A
NVIO_TESTMODE 25.3B
NVVDD_SENSE 30.4B> 31.4H<
NVVDD_SENSE_GND 30.4B> 31.5H<
NVVDD_SENSE_R 31.4G
PEX_PLLVDD 3.4F
PEX_PLLVDD_OP 3.4H> 29.1C>
PEX_PLLVDD_OP_ADJ 29.2B
PEX_PRSNT1* 3.1A
PEX_REFCLK 3.2B
PEX_REFCLK* 3.2B
PEX_RST* 3.2D> 27.5E< 27.5F
PEX_RX0 3.2B
PEX_RX0* 3.2B
PEX_RX1 3.2B
PEX_RX1* 3.2B
PEX_RX2 3.3B
PEX_RX2* 3.3B
PEX_RX3 3.3B
PEX_RX3* 3.3B
PEX_RX4 3.3B
PEX_RX4* 3.3B
PEX_RX5 3.3B
PEX_RX5* 3.3B
PEX_RX6 3.3B
PEX_RX6* 3.3B
PEX_RX7 3.4B
PEX_RX7* 3.4B
PEX_RX8 3.4B
PEX_RX8* 3.4B
PEX_RX9 3.4B
PEX_RX9* 3.4B
PEX_RX10 3.4B
PEX_RX10* 3.4B
PEX_RX11 3.4B
PEX_RX11* 3.4B
PEX_RX12 3.5B
PEX_RX12* 3.5B
PEX_RX13 3.5B
PEX_RX13* 3.5B
PEX_RX14 3.5B
PEX_RX14* 3.5B
PEX_RX15 3.5B
PEX_RX15* 3.5B
PEX_TSTCLK_OUT 3.4F
PEX_TSTCLK_OUT* 3.4F
PEX_TX0 3.2E
PEX_TX0* 3.2E
PEX_TX1 3.2E
PEX_TX1* 3.2E
PEX_TX2 3.2E
PEX_TX2* 3.2E
PEX_TX3 3.3E
PEX_TX3* 3.3E
PEX_TX4 3.3E
PEX_TX4* 3.3E
PEX_TX5 3.3E
PEX_TX5* 3.3E
PEX_TX6 3.3E
PEX_TX6* 3.3E
PEX_TX7 3.3E
PEX_TX7* 3.3E
PEX_TX8 3.4E
PEX_TX8* 3.4E
PEX_TX9 3.4E
PEX_TX9* 3.4E
PEX_TX10 3.4E
PEX_TX10* 3.4E
PEX_TX11 3.4E
PEX_TX11* 3.4E
PEX_TX12 3.4E
PEX_TX12* 3.4E
PEX_TX13 3.5E
PEX_TX13* 3.5E
PEX_TX14 3.5E
PEX_TX14* 3.5E
PEX_TX15 3.5E
PEX_TX15* 3.5E
PEX_TX_C0 3.2C
PEX_TX_C0* 3.2C
PEX_TX_C1 3.2C
PEX_TX_C1* 3.2C
PEX_TX_C2 3.2C
PEX_TX_C2* 3.2C
PEX_TX_C3 3.3C
PEX_TX_C3* 3.3C
PEX_TX_C4 3.3C
PEX_TX_C4* 3.3C
PEX_TX_C5 3.3C
PEX_TX_C5* 3.3C
PEX_TX_C6 3.3C
PEX_TX_C6* 3.3C
PEX_TX_C7 3.3C
PEX_TX_C7* 3.3C
PEX_TX_C8 3.4C
PEX_TX_C8* 3.4C
PEX_TX_C9 3.4C
PEX_TX_C9* 3.4C
PEX_TX_C10 3.4C
PEX_TX_C10* 3.4C
PEX_TX_C11 3.4C
PEX_TX_C11* 3.4C
PEX_TX_C12 3.4C
PEX_TX_C12* 3.4C
PEX_TX_C13 3.5C
PEX_TX_C13* 3.5C
PEX_TX_C14 3.5C
PEX_TX_C14* 3.5C
PEX_TX_C15 3.5C
PEX_TX_C15* 3.5C
PS1_1V15_BOOT 29.3D
PS1_1V15_CP 29.4D
PS1_1V15_CP_RC 29.4E
PS1_1V15_EN* 29.4C
PS1_1V15_FB 29.4D
PS1_1V15_FB_RC 29.5F
PS1_1V15_FB_SEN 29.4G
PS1_1V15_FS 29.4C
PS1_1V15_LG 29.4D
PS1_1V15_PH 29.4D
PS1_1V15_PH_RC 29.4F
PS1_1V15_UG 29.3D
PS1_1V15_UG_R 29.3E
PS1_2V5_LDO_DR 29.3C
PS1_2V5_LDO_DR_AC 29.3B
PS1_2V5_LDO_FB 29.4C
PS1_PVCC5 29.3D
PS1_VCC5 29.3D
PS1_VCC12 29.3C
PS3_FBVDDQ_BOOT 30.2C
PS3_FBVDDQ_CP 30.2C
PS3_FBVDDQ_CP_RC 30.3D
PS3_FBVDDQ_FB 30.2C
PS3_FBVDDQ_FB_RC 30.3E
PS3_FBVDDQ_LG 30.2C
PS3_FBVDDQ_LG_D 30.2D
PS3_FBVDDQ_LG_G 30.2D
PS3_FBVDDQ_PHASE 30.2C
PS3_FBVDDQ_RC 30.2F
PS3_FBVDDQ_UG 30.2C
PS3_FBVDDQ_UG_R 30.2D
PS3_FBVDDQ_VSEN 30.3F
PS3_FS_DIS 30.2B
PS3_LDO_RC 30.2C
PS3_NVVDD_PGOOD* 30.2B
PS3_PVCC5_DRV 30.2C
PS3_VCC5 30.2C
PS5_NVVDD_BOOT1 32.2C
PS5_NVVDD_BOOT1_RC 32.2C 32.2C
PS5_NVVDD_BOOT2 32.3C
PS5_NVVDD_BOOT2_RC 32.3C
PS5_NVVDD_BOOT3 32.4C
PS5_NVVDD_BOOT3_RC 32.4C
PS5_NVVDD_BOOT4 33.2C
PS5_NVVDD_BOOT4_RC 32.4C> 33.2C<
PS5_NVVDD_BOOT5 33.3C
PS5_NVVDD_BOOT5_RC 33.3C 33.4C
PS5_NVVDD_BOOT6 33.4C
PS5_NVVDD_BOOT6_RC 33.4C
PS5_NVVDD_CP 31.4E
PS5_NVVDD_CP_RC 31.4F
PS5_NVVDD_DRV_OD1 31.3F> 32.2B< 32.4A<
33.2A<
PS5_NVVDD_DRV_ODN 31.3F> 32.3B< 32.4A<
33.2A< 33.3B< 33.4B<
PS5_NVVDD_DRV_PHAS 32.4B
E3
PS5_NVVDD_DRV_PHAS 33.2B
E4
PS5_NVVDD_EN 31.1H> 31.3D<
PS5_NVVDD_EN* 31.1G
PS5_NVVDD_EN_12V_F 31.2F
PS5_NVVDD_EN_12V_F 31.2F
2
PS5_NVVDD_EN_Q 31.2G
PS5_NVVDD_FB 31.4E
PS5_NVVDD_FBRTN 31.4E
PS5_NVVDD_FB_RC 31.4G
PS5_NVVDD_FS 31.3D
PS5_NVVDD_IDES 31.4D
PS5_NVVDD_ISEN1 31.3E
PS5_NVVDD_ISEN2 31.3E
PS5_NVVDD_ISEN3 31.3E
PS5_NVVDD_ISEN4 31.3E
PS5_NVVDD_ISEN5 31.3E
PS5_NVVDD_ISEN6 31.3E
PS5_NVVDD_LG1 32.2C
PS5_NVVDD_LG1_AC 32.2C
PS5_NVVDD_LG1_D 32.2C
PS5_NVVDD_LG2 32.3C
PS5_NVVDD_LG2_AC 32.3C
PS5_NVVDD_LG2_D 32.3C
PS5_NVVDD_LG3 32.5C
PS5_NVVDD_LG3_AC 32.5C
PS5_NVVDD_LG3_D 32.4C
PS5_NVVDD_LG4 33.2C
PS5_NVVDD_LG4_AC 33.2D
PS5_NVVDD_LG4_D 33.2D
PS5_NVVDD_LG5 33.3C
PS5_NVVDD_LG5_AC 33.3D
PS5_NVVDD_LG5_D 33.3D
PS5_NVVDD_LG6 33.5C
PS5_NVVDD_LG6_AC 33.5D
PS5_NVVDD_LG6_D 33.4D
PS5_NVVDD_PGOOD 31.3D
PS5_NVVDD_PGOOD_R 30.3A< 31.5E>
PS5_NVVDD_PHASE1 31.3H< 32.2F> 32.2F>
PS5_NVVDD_PHASE2 31.3H< 32.3F> 32.3F>
PS5_NVVDD_PHASE3 31.3H< 32.5F> 32.5F>
PS5_NVVDD_PHASE4 31.3H< 33.2G> 33.2G>
PS5_NVVDD_PHASE5 31.3H< 33.3G> 33.3G>
PS5_NVVDD_PHASE6 31.3H< 33.5G> 33.5G>
PS5_NVVDD_PWM1 31.3F> 32.2B<
PS5_NVVDD_PWM2 31.2F> 32.3B<
PS5_NVVDD_PWM3 31.2F> 32.4B<
PS5_NVVDD_PWM4 31.2F> 33.2B<
PS5_NVVDD_PWM5 31.2F> 33.3B<
PS5_NVVDD_PWM6 31.2F> 33.4B<
PS5_NVVDD_RC1 32.2E
PS5_NVVDD_RC2 32.3E
PS5_NVVDD_RC3 32.5E
PS5_NVVDD_RC4 33.2E
PS5_NVVDD_RC5 33.3E
PS5_NVVDD_RC6 33.5E
PS5_NVVDD_SET_ILIM 31.3E
FS
PS5_NVVDD_SET_IMON 31.4E
PS5_NVVDD_SET_LSSE 31.4E
T
PS5_NVVDD_SET_RAMP 31.3D
ADJ
PS5_NVVDD_SET_RAMP 31.3C
ADJ_R
PS5_NVVDD_SET_TRDE 31.3D> 31.4H<
T
PS5_NVVDD_SET_TRDE 31.4G
T_RC
PS5_NVVDD_STATUS_P 31.2B> 31.3D<
SI*
PS5_NVVDD_STATUS_P 31.3D
SI_SET
PS5_NVVDD_UG1 32.2C
PS5_NVVDD_UG1_R 32.2C
PS5_NVVDD_UG2 32.3C
PS5_NVVDD_UG2_R 32.3D
PS5_NVVDD_UG3 32.4C
PS5_NVVDD_UG3_R 32.4D
PS5_NVVDD_UG4 33.2C
PS5_NVVDD_UG4_R 33.2D
PS5_NVVDD_UG5 33.3C
PS5_NVVDD_UG5_R 33.3D
PS5_NVVDD_UG6 33.4C
PS5_NVVDD_UG6_R 33.4D
PS5_NVVDD_VAMP_CSC 31.3E
OMP
PS5_NVVDD_VAMP_CSR 31.4F< 31.4F< 32.2F>
33.3G> 33.5G>
PS5_NVVDD_VAMP_CSS 31.3E
UM
PS5_NVVDD_VAMP_CSS 31.4G
UM_RC
PS5_NVVDD_VCC 31.2D
PS5_NVVDD_VCC_VCC3 31.4D
PS5_NVVDD_VID0 31.2D
PS5_NVVDD_VID1 31.2C 31.2D
PS5_NVVDD_VID2 31.2D
PS5_NVVDD_VID3 31.2D
PS5_NVVDD_VID4 31.2C 31.3D
PS5_NVVDD_VID6 31.3D
PS5_NVVDD_VIN_PWM 31.2D
ROM_CS* 25.2B
SNN_7473_2 26.4D
SNN_DACB_CSYNC 21.3C
SNN_DACB_HSYNC 21.3C
SNN_DACB_VSYNC 21.3C
SNN_DVIA_CLK 27.4C
SNN_DVIA_CTL0 27.4C
SNN_DVIA_CTL1 27.4C
SNN_DVIA_CTL2 27.4C
SNN_DVIA_D4 27.4C
SNN_DVIA_D5 27.4C
SNN_DVIA_D6 27.4C
SNN_DVIB_CLK 27.5C
SNN_DVIB_CTL0 27.5C
SNN_DVIB_CTL1 27.5C
SNN_DVIB_CTL2 27.5C
SNN_DVIB_D0 27.5C
SNN_DVIB_D1 27.5C
SNN_DVIB_D2 27.5C
SNN_DVIB_D3 27.5C
SNN_DVIB_D6 27.5C
SNN_DVIB_D7 27.5C
SNN_FBA0_CLK1 4.4A
SNN_FBA0_CLK1* 4.4A
SNN_FBA1_CLK1 4.4B
SNN_FBA1_CLK1* 4.4B
SNN_FBA_CMD<22> 4.3A
SNN_FBA_CMD<29> 4.4A
SNN_FBA_CMD<30> 4.4A
SNN_FBA_CMD<31> 4.4A
SNN_FBA_CMD<32> 4.4A
SNN_FBA_DBI0 28.1E
SNN_FBA_DBI1 28.1E
SNN_FBA_DBI2 28.1E
SNN_FBA_DBI3 28.1E
SNN_FBA_DBI4 28.1E
SNN_FBA_DBI5 28.1E
SNN_FBA_DBI6 28.1E
SNN_FBA_DBI7 28.1E
SNN_FBA_NC01 8.2A
SNN_FBA_NC04 8.2C
SNN_FBB0_CLK1 4.4C
SNN_FBB0_CLK1* 4.4C
SNN_FBB1_CLK1 4.4E
SNN_FBB1_CLK1* 4.4E
SNN_FBB_CMD<22> 4.3D
SNN_FBB_CMD<29> 4.4D
SNN_FBB_CMD<30> 4.4D
SNN_FBB_CMD<31> 4.4D
SNN_FBB_CMD<32> 4.4D
SNN_FBB_DBI0 28.2E
SNN_FBB_DBI1 28.2E
SNN_FBB_DBI2 28.2E
SNN_FBB_DBI3 28.2E
SNN_FBB_DBI4 28.2E
SNN_FBB_DBI5 28.2E
SNN_FBB_DBI6 28.2E
SNN_FBB_DBI7 28.2E
SNN_FBB_NC01 9.2A
SNN_FBB_NC04 9.2C
SNN_FBC0_CLK1 5.4A
SNN_FBC0_CLK1* 5.4A
SNN_FBC1_CLK1 5.4B
SNN_FBC1_CLK1* 5.4B
SNN_FBC_CMD<22> 5.4A
SNN_FBC_CMD<29> 5.4A
SNN_FBC_CMD<30> 5.4A
SNN_FBC_CMD<31> 5.4A
SNN_FBC_CMD<32> 5.4A
SNN_FBC_DBI0 28.2E
SNN_FBC_DBI1 28.2E
SNN_FBC_DBI2 28.2E
SNN_FBC_DBI3 28.2E
SNN_FBC_DBI4 28.2E
SNN_FBC_DBI5 28.2E
SNN_FBC_DBI6 28.2E
SNN_FBC_DBI7 28.2E
SNN_FBC_NC01 10.2A
SNN_FBC_NC04 10.2C
SNN_FBD0_CLK1 5.4C
SNN_FBD0_CLK1* 5.4C
SNN_FBD1_CLK1 5.4E EF 32.3F> 32.5F> 33.2G>
SNN_FBD1_CLK1* 5.4E
SNN_FBD_CMD<22> 5.4D
SNN_FBD_CMD<29> 5.4D
SNN_FBD_CMD<30> 5.4D
SNN_FBD_CMD<31> 5.4D
SNN_FBD_CMD<32> 5.4D
SNN_FBD_DBI0 28.2E
SNN_FBD_DBI1 28.2E
SNN_FBD_DBI2 28.2E
SNN_FBD_DBI3 28.2E
SNN_FBD_DBI4 28.2E
SNN_FBD_DBI5 28.2E
SNN_FBD_DBI6 28.2E
SNN_FBD_DBI7 28.2E
SNN_FBD_NC01 11.2A
SNN_FBD_NC04 11.2C
SNN_FBE0_CLK1 6.4A
SNN_FBE0_CLK1* 6.4A
SNN_FBE1_CLK1 6.4B
SNN_FBE1_CLK1* 6.4B
SNN_FBE_CMD<22> 6.4A
SNN_FBE_CMD<29> 6.4A
SNN_FBE_CMD<30> 6.4A
SNN_FBE_CMD<31> 6.4A
SNN_FBE_CMD<32> 6.4A
SNN_FBE_DBI0 28.2E
SNN_FBE_DBI1 28.2E
SNN_FBE_DBI2 28.3E
SNN_FBE_DBI3 28.3E
SNN_FBE_DBI4 28.3E
SNN_FBE_DBI5 28.3E
SNN_FBE_DBI6 28.3E
SNN_FBE_DBI7 28.3E
SNN_FBE_NC01 12.2A
SNN_FBE_NC04 12.2C
SNN_FBF0_CLK1 6.4C
SNN_FBF0_CLK1* 6.4C
SNN_FBF1_CLK1 6.4E
SNN_FBF1_CLK1* 6.4E
SNN_FBF_CMD<22> 6.4D
SNN_FBF_CMD<29> 6.4D
SNN_FBF_CMD<30> 6.4D
SNN_FBF_CMD<31> 6.4D
SNN_FBF_CMD<32> 6.4D
SNN_FBF_DBI0 28.3E
SNN_FBF_DBI1 28.3E
SNN_FBF_DBI2 28.3E
SNN_FBF_DBI3 28.3E
SNN_FBF_DBI4 28.3E
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
<edit here to insert page detail>
www.vinafix.vn
600-10897-0053-300 A
p897
misun
38 OF 41
31-DEC-2008
Page 39
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
SNN_FBF_DBI5 28.3E
SNN_FBF_DBI6 28.3E
SNN_FBF_DBI7 28.3E
SNN_FBF_NC01 13.2A
SNN_FBF_NC04 13.2C
SNN_FBG0_CLK1 7.4A
SNN_FBG0_CLK1* 7.4A
SNN_FBG1_CLK1 7.4B
SNN_FBG1_CLK1* 7.4B
SNN_FBG_CMD<22> 7.4A
SNN_FBG_CMD<29> 7.4A
SNN_FBG_CMD<30> 7.4A
SNN_FBG_CMD<31> 7.4A
SNN_FBG_CMD<32> 7.4A
SNN_FBG_DBI0 28.3E
SNN_FBG_DBI1 28.3E
SNN_FBG_DBI2 28.3E
SNN_FBG_DBI3 28.3E
SNN_FBG_DBI4 28.3E
SNN_FBG_DBI5 28.3E
SNN_FBG_DBI6 28.3E
SNN_FBG_DBI7 28.3E
SNN_FBG_NC01 14.2A
SNN_FBG_NC04 14.2C
SNN_FBH0_CLK0 7.4C
SNN_FBH0_CLK0* 7.4C
SNN_FBH0_CLK1 7.4C
SNN_FBH0_CLK1* 7.4C
SNN_FBH1_CLK0 7.4E
SNN_FBH1_CLK0* 7.4E
SNN_FBH1_CLK1 7.4E
SNN_FBH1_CLK1* 7.4E
SNN_FBH_CMD<0> 7.3D
SNN_FBH_CMD<1> 7.3D
SNN_FBH_CMD<2> 7.3D
SNN_FBH_CMD<3> 7.3D
SNN_FBH_CMD<4> 7.3D
SNN_FBH_CMD<5> 7.3D
SNN_FBH_CMD<6> 7.3D
SNN_FBH_CMD<7> 7.3D
SNN_FBH_CMD<8> 7.3D
SNN_FBH_CMD<9> 7.3D
SNN_FBH_CMD<10> 7.3D
SNN_FBH_CMD<11> 7.4D
SNN_FBH_CMD<12> 7.4D
SNN_FBH_CMD<13> 7.4D
SNN_FBH_CMD<15> 7.4D
SNN_FBH_CMD<16> 7.4D
SNN_FBH_CMD<17> 7.4D
SNN_FBH_CMD<18> 7.4D
SNN_FBH_CMD<19> 7.4D
SNN_FBH_CMD<20> 7.4D
SNN_FBH_CMD<21> 7.4D
SNN_FBH_CMD<22> 7.4D
SNN_FBH_CMD<23> 7.4D
SNN_FBH_CMD<24> 7.4D
SNN_FBH_CMD<25> 7.4D
SNN_FBH_CMD<26> 7.4D
SNN_FBH_CMD<27> 7.4D
SNN_FBH_CMD<28> 7.4D
SNN_FBH_CMD<29> 7.4D
SNN_FBH_CMD<30> 7.4D
SNN_FBH_CMD<31> 7.4D
SNN_FBH_CMD<32> 7.4D
SNN_FBH_D<0> 7.1D
SNN_FBH_D<1> 7.2D
SNN_FBH_D<2> 7.2D
SNN_FBH_D<3> 7.2D
SNN_FBH_D<4> 7.2D
SNN_FBH_D<5> 7.2D
SNN_FBH_D<6> 7.2D
SNN_FBH_D<7> 7.2D
SNN_FBH_D<8> 7.2D
SNN_FBH_D<9> 7.2D
SNN_FBH_D<10> 7.2D
SNN_FBH_D<11> 7.2D
SNN_FBH_D<12> 7.2D
SNN_FBH_D<13> 7.2D
SNN_FBH_D<14> 7.2D
SNN_FBH_D<15> 7.2D
SNN_FBH_D<16> 7.2D
SNN_FBH_D<17> 7.2D
SNN_FBH_D<18> 7.2D
SNN_FBH_D<19> 7.2D
SNN_FBH_D<20> 7.2D
SNN_FBH_D<21> 7.2D
SNN_FBH_D<22> 7.2D
SNN_FBH_D<23> 7.2D
SNN_FBH_D<24> 7.2D
SNN_FBH_D<25> 7.2D
SNN_FBH_D<26> 7.2D
SNN_FBH_D<27> 7.2D
SNN_FBH_D<28> 7.2D
SNN_FBH_D<29> 7.2D
SNN_FBH_D<30> 7.2D
SNN_FBH_D<31> 7.3D
SNN_FBH_D<32> 7.1E
SNN_FBH_D<33> 7.2E
SNN_FBH_D<34> 7.2E
SNN_FBH_D<35> 7.2E
SNN_FBH_D<36> 7.2E
SNN_FBH_D<37> 7.2E
SNN_FBH_D<38> 7.2E
SNN_FBH_D<39> 7.2E
SNN_FBH_D<40> 7.2E
SNN_FBH_D<41> 7.2E
SNN_FBH_D<42> 7.2E
SNN_FBH_D<43> 7.2E
SNN_FBH_D<44> 7.2E
SNN_FBH_D<45> 7.2E
SNN_FBH_D<46> 7.2E
SNN_FBH_D<47> 7.2E
SNN_FBH_D<48> 7.2E
SNN_FBH_D<49> 7.2E
SNN_FBH_D<50> 7.2E
SNN_FBH_D<51> 7.2E
SNN_FBH_D<52> 7.2E
SNN_FBH_D<53> 7.2E
SNN_FBH_D<54> 7.2E
SNN_FBH_D<55> 7.2E
SNN_FBH_D<56> 7.2E
SNN_FBH_D<57> 7.2E
SNN_FBH_D<58> 7.2E
SNN_FBH_D<59> 7.2E
SNN_FBH_D<60> 7.2E
SNN_FBH_D<61> 7.2E
SNN_FBH_D<62> 7.2E
SNN_FBH_D<63> 7.3E
SNN_FBH_DBI0 28.3E
SNN_FBH_DBI1 28.3E
SNN_FBH_DBI2 28.3E
SNN_FBH_DBI3 28.3E
SNN_FBH_DBI4 28.3E
SNN_FBH_DBI5 28.4E
SNN_FBH_DBI6 28.4E
SNN_FBH_DBI7 28.4E
SNN_FBH_DEBUG 7.3E
SNN_FBH_DQM0 7.3D
SNN_FBH_DQM1 7.3D
SNN_FBH_DQM2 7.3D
SNN_FBH_DQM3 7.3D
SNN_FBH_DQM4 7.3E SNN_FBH_CMD<14> 7.4D
SNN_FBH_DQM5 7.3E
SNN_FBH_DQM6 7.3E
SNN_FBH_DQM7 7.3E
SNN_FBH_DQS_RN0 7.3D
SNN_FBH_DQS_RN1 7.3D
SNN_FBH_DQS_RN2 7.3D
SNN_FBH_DQS_RN3 7.3D
SNN_FBH_DQS_RN4 7.3E
SNN_FBH_DQS_RN5 7.3E
SNN_FBH_DQS_RN6 7.3E
SNN_FBH_DQS_RN7 7.3E
SNN_FBH_DQS_WP0 7.3D
SNN_FBH_DQS_WP1 7.3D
SNN_FBH_DQS_WP2 7.3D
SNN_FBH_DQS_WP3 7.3D
SNN_FBH_DQS_WP4 7.3E
SNN_FBH_DQS_WP5 7.3E
SNN_FBH_DQS_WP6 7.3E
SNN_FBH_DQS_WP7 7.3E
SNN_FBVDDQ_GND_MSU 30.4B
R
SNN_FBVDDQ_MSUR 30.5B
SNN_FB_VREF0 4.5B
SNN_FB_VREF1 4.5B
SNN_GPIO2_SWAPRDY_ 25.2D
OUT
SNN_GPIO3_RASTERSY 25.3D
NC0
SNN_GPIO12_POWERAL 25.3D
ERT*
SNN_GPIO13_STEREO 25.3D
SNN_GPIO16_DP_INT* 25.3D
SNN_GPU_BUFRST* 3.5F
SNN_GPU_NC_1 28.1G
SNN_GPU_NC_2 28.1G
SNN_GPU_NC_3 28.1G
SNN_GPU_NC_4 28.1G
SNN_GPU_NC_5 28.1G
SNN_GPU_NC_6 28.1G
SNN_GPU_NC_7 28.1G
SNN_GPU_NC_8 28.1G
SNN_GPU_NC_9 28.2G
SNN_GPU_NC_10 28.2G
SNN_GPU_NC_11 28.2G
SNN_GPU_NC_12 28.2G
SNN_GPU_NC_13 28.2G
SNN_GPU_NC_14 28.2G
SNN_GPU_NC_15 28.2G
SNN_GPU_NC_16 28.2G
SNN_GPU_NC_17 28.2G
SNN_GPU_NC_18 28.2G
SNN_GPU_NC_19 28.2G
SNN_GPU_NC_20 28.2G
SNN_GPU_NC_21 28.2G
SNN_GPU_NC_22 28.2G
SNN_GPU_NC_23 28.2G
SNN_GPU_NC_24 28.2G
SNN_GPU_NC_25 28.2G
SNN_GPU_NC_26 28.2G
SNN_GPU_NC_27 28.2G
SNN_GPU_NC_28 28.2G
SNN_GPU_NC_29 28.2G
SNN_GPU_NC_30 28.2G
SNN_GPU_NC_31 28.2G
SNN_GPU_NC_32 28.2G
SNN_GPU_NC_33 28.2G
SNN_GPU_NC_34 28.2G
SNN_GPU_NC_35 28.2G
SNN_GPU_NC_36 28.3G
SNN_GPU_NC_37 28.3G
SNN_GPU_NC_38 28.3G
SNN_GPU_NC_39 28.3G
SNN_GPU_NC_40 28.3G
SNN_HDCP_NC 25.2G
SNN_I2C0_SCL 25.2D
SNN_I2C0_SDA 25.2D
SNN_IFPAB_VPROBE 22.2B
SNN_IFPA_TXD3 22.3D
SNN_IFPA_TXD3* 22.3D
SNN_IFPB_TXC 22.3D
SNN_IFPB_TXC* 22.3D
SNN_IFPB_TXD7 22.4D
SNN_IFPB_TXD7* 22.4D
SNN_IFPCD_VPROBE 23.2B
SNN_IFPC_TXD3 23.3D
SNN_IFPC_TXD3* 23.3D
SNN_IFPD_TXC 23.3D
SNN_IFPD_TXC* 23.3D
SNN_IFPD_TXD7 23.4D
SNN_IFPD_TXD7* 23.4D
SNN_INPUT_PEX6_DT1 34.3A
*
SNN_INPUT_PEX6_DT2 34.4A
*
SNN_MIOA<0> 27.1C
SNN_MIOA<1> 27.1C
SNN_MIOA<2> 27.1C
SNN_MIOA<3> 27.1C
SNN_MIOA<4> 27.1C
SNN_MIOA<5> 27.1C
SNN_MIOA<6> 27.1C
SNN_MIOA<7> 27.1C
SNN_MIOA<8> 27.1C
SNN_MIOA<9> 27.1C
SNN_MIOA<10> 27.1C
SNN_MIOA<11> 27.1C
SNN_MIOA<12> 27.1C
SNN_MIOA<13> 27.1C
SNN_MIOA<14> 27.2C
SNN_MIOA_CAL_PD_VD 27.2B
DQ
SNN_MIOA_CAL_PU_GN 27.2B
D
SNN_MIOA_CLKOUT 27.2C
SNN_MIOA_CLKOUT* 27.2C
SNN_MIOA_DE 27.2C
SNN_MIOA_HSYNC 27.2C
SNN_MIOA_VSYNC 27.2C
SNN_MIOB<0> 27.3C
SNN_MIOB<1> 27.3C
SNN_MIOB<2> 27.3C
SNN_MIOB<3> 27.3C
SNN_MIOB<4> 27.3C
SNN_MIOB<5> 27.3C
SNN_MIOB<6> 27.3C
SNN_MIOB<7> 27.3C
SNN_MIOB<8> 27.3C
SNN_MIOB<9> 27.3C
SNN_MIOB<10> 27.3C
SNN_MIOB<11> 27.3C
SNN_MIOB<12> 27.3C
SNN_MIOB<13> 27.3C
SNN_MIOB<14> 27.3C
SNN_MIOB_CAL_PD_VD 27.3B
DQ
SNN_MIOB_CAL_PU_GN 27.3B
D
SNN_MIOB_CLKOUT 27.4C
SNN_MIOB_CLKOUT* 27.4C
SNN_MIOB_DE 27.3C
SNN_MIOB_HSYNC 27.3C
SNN_MIOB_VSYNC 27.3C
SNN_NVIO_NC_01 28.4G
SNN_NVIO_NC_02 28.4G
SNN_NVIO_NC_03 28.4G
SNN_NVIO_NC_04 28.4G
SNN_NVIO_NC_05 28.4G
SNN_NVIO_NC_06 28.4G
SNN_NVIO_NC_07 28.4G
SNN_NVIO_NC_08 28.4G
SNN_NVIO_NC_09 28.4G
SNN_NVIO_NC_10 28.4G
SNN_NVIO_NC_11 28.4G
SNN_NVIO_NC_12 28.4G
SNN_NVIO_NC_13 28.4G
SNN_NVIO_NC_14 28.4G
SNN_NVIO_NC_15 28.4G
SNN_NVIO_NC_16 28.4G
SNN_NVIO_NC_17 28.4G
SNN_NVIO_NC_18 28.4G
SNN_NVIO_NC_19 28.4G
SNN_NVIO_NC_20 28.4G
SNN_NVIO_NC_21 28.4G
SNN_NVIO_NC_22 28.5G
SNN_NVIO_NC_23 28.5G
SNN_NVIO_NC_24 28.5G
SNN_NVIO_NC_25 28.5G
SNN_NVIO_NC_26 28.5G
SNN_NVIO_NC_27 28.5G
SNN_NVIO_NC_28 28.5G
SNN_NVIO_NC_29 28.5G
SNN_NVIO_NC_30 28.5G
SNN_NVIO_NC_31 28.4H
SNN_NVIO_NC_32 28.4H
SNN_NVIO_NC_33 28.4H
SNN_NVIO_NC_34 28.4H
SNN_NVIO_NC_35 28.4H
SNN_NVIO_NC_36 28.4H
SNN_NVIO_NC_37 28.4H
SNN_NVIO_NC_38 28.4H
SNN_NVIO_NC_39 28.4H
SNN_NVIO_NC_40 28.4H
SNN_NVIO_NC_41 28.4H
SNN_NVIO_NC_42 28.4H
SNN_NVIO_NC_43 28.4H
SNN_NVIO_NC_44 28.4H
SNN_NVIO_NC_45 28.4H
SNN_NVIO_NC_46 28.4H
SNN_NVIO_NC_47 28.4H
SNN_NVIO_NC_48 28.4H
SNN_NVIO_NC_49 28.4H
SNN_NVIO_NC_50 28.4H
SNN_NVIO_NC_51 28.4H
SNN_NVIO_NC_52 28.5H
SNN_NVIO_NC_53 28.5H
SNN_NVIO_NC_54 28.5H
SNN_NVIO_NC_55 28.5H
SNN_NVIO_NC_56 28.5H
SNN_NVIO_NC_57 28.5H
SNN_NVIO_NC_58 28.5H
SNN_NVIO_NC_59 28.5H
SNN_NVIO_NC_60 28.5H
SNN_NVIO_NC_61 28.5H
SNN_NVIO_PLL_SP_MO 18.5C
N_OUT
SNN_NVVDD_GND_MSUR 30.5B
SNN_NVVDD_MSUR 30.5B
SNN_PEX_08 3.2B
SNN_PEX_10 3.2A
SNN_PEX_11 3.2A
SNN_PEX_12 3.2A
SNN_PEX_13 3.2A
SNN_PEX_14 3.2A
SNN_PEX_15 3.3A
SNN_PEX_16 3.3A
SNN_PEX_17 3.4A
SNN_PEX_18 3.4A
SNN_PEX_20 3.2A
SNN_PEX_I2CS_SCL 3.1B
SNN_PEX_I2CS_SDA 3.2B
SNN_PEX_TCK 3.1B
SNN_PEX_TDI 3.1B
SNN_PEX_TDO 3.1B
SNN_PEX_TMS 3.1B
SNN_PEX_TRST* 3.1B
SNN_PS5_NVVDD_PIN1 31.4D
SNN_PS5_NVVDD_PIN2 31.4D
SNN_PS5_NVVDD_PIN3 31.4D
SNN_PS5_NVVDD_PIN4 31.4D
SNN_PS5_NVVDD_TTSE 31.4D
NSE
SNN_PS5_NVVDD_VID5 31.3D
SNN_PS5_NVVDD_VID7 31.3D
SNN_PS5_NVVDD_VRHO 31.3D
T
SNN_SPARE_01 28.1F
SNN_SPARE_02 28.1F
SNN_SPARE_03 28.1F
SNN_SPARE_04 28.1F
SNN_SPARE_05 28.1F
SNN_SPARE_06 28.1F
SNN_SPARE_07 28.1F
SNN_SPARE_08 28.1F
SNN_SPARE_09 28.2F
SNN_SPARE_10 28.2F
SNN_SPARE_11 28.2F
SNN_SPARE_12 28.2F
SNN_SPARE_13 28.2F
SNN_SPARE_14 28.2F
SNN_SPARE_15 28.2F
SNN_SPARE_16 28.2F
SNN_SPARE_17 28.2F
SNN_SPARE_18 28.2F
SNN_SPARE_19 28.2F
SNN_SPARE_20 28.2F
SNN_SPARE_21 28.2F
SNN_SPARE_22 28.2F
SNN_SPARE_23 28.2F
SNN_SPARE_24 28.2F
SNN_SPARE_25 28.2F
SNN_SPARE_26 28.2F
SNN_SPARE_27 28.2F
SNN_SPARE_28 28.2F
SNN_SPARE_29 28.2F
SNN_SPARE_30 28.2F
SNN_SPARE_31 28.2F
SNN_SPARE_32 28.2F
SNN_SPARE_33 28.2F
SNN_SPARE_34 28.2F
SNN_SPARE_35 28.2F
SNN_SPARE_36 28.3F
SNN_SPARE_37 28.3F
SNN_SPARE_38 28.3F
SNN_SPARE_39 28.3F
SNN_SPARE_40 28.3F
SNN_SPARE_41 28.3F
SNN_SPARE_42 28.3F
SNN_SPARE_43 28.3F
SNN_SPARE_44 28.3F
SNN_SPARE_45 28.3F
SNN_SPARE_46 28.3F
SNN_SPARE_47 28.3F
SNN_SPARE_48 28.3F
SNN_SPARE_49 28.3F
SNN_SPARE_50 28.3F
SNN_SPARE_51 28.3F
SNN_SPARE_52 28.3F
SNN_SPARE_53 28.3F
SNN_SPARE_54 28.3F
SNN_SPARE_55 28.3F
SNN_SPARE_56 28.3F
SNN_SPARE_57 28.3F
SNN_SPARE_58 28.3F
SNN_SPARE_59 28.3F
SNN_SPARE_60 28.3F
SNN_SPARE_61 28.3F
SNN_SPARE_62 28.3F
SNN_SPARE_63 28.4F
SNN_SPARE_64 28.4F
SNN_SPARE_65 28.4F
SNN_SPARE_66 28.4F
SNN_SPARE_67 28.4F
SNN_SPARE_68 28.4F
SNN_SPARE_69 28.4F
SNN_SPARE_70 28.4F
SNN_SPARE_71 28.4F
SNN_SPARE_72 28.4F
SNN_SPARE_73 28.4F
SNN_SPARE_74 28.4F
SNN_STRAP3 25.2B
SNN_TACH2 26.4D
SNN_THERM_LD_STEP0 30.5B
SNN_THERM_LD_STEP1 30.5B
SNN_TSENSE_AVDD 26.4A
SNN_TSENSE_OVERT 26.4A
SNN_TSENSE_VREF 26.4A
SNN_TS_1V5_SEL 26.4A
SNN_TS_OBS 26.4A
SNN_TV_NC5 21.3G
SNN_TV_NC7 21.3G
SNN_U4I2C1_SCL_UC_ 27.3G
PIN15
SNN_U4_FAN_PWM_PIN 27.5G
5
SNN_U4_HYBRID_PWR_ 27.5G
EN_PIN16
SNN_U4_I2C2_SCL_UC 27.4G
_PIN8
SNN_U4_PEX_REFCLK_ 27.4E
EN_PIN2
SPDIF_GND 24.3C
SPDIF_IN 24.3C
SPDIF_IN_C 24.5A
SPDIF_IN_COMP2_D 24.5C
SPDIF_IN_COMP2_Q 24.4C
SPDIF_IN_GPU 24.3E> 25.2F<
SPDIF_IN_R 24.5B
STRAP0 25.2B
STRAP1 25.2B
STRAP2 25.2B
THERM_DN 26.3C 26.4B 26.4C
THERM_DP 26.3C 26.4B 26.4C
THERM_LATCH 26.1F
THERM_PWM_ADDR_EN* 26.4D
THERM_SHDN 26.2F
THERM_SHDN* 26.1G 26.2E 26.3D
26.4D
THERM_SHDN_D* 26.1H> 29.5B< 31.1G<
THERM_SHDN_Q 26.2G
THERM_SHDN_R 26.2E
THERM_VDD 26.3D
VID_PSI 31.2C
XTAL_IN 25.4C
XTAL_OUT 25.4C
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
<edit here to insert page detail>
www.vinafix.vn
600-10897-0053-300 A
p897
misun
39 OF 41
31-DEC-2008
Page 40
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Title: Cref Part
Report
Design: p897
Date: Dec 2
14:57:45 2008
BKT1 [35.2A]
C1 [20.2G]
C2 [20.1G]
C3 [20.2G]
C4 [20.3G]
C5 [19.2G]
C6 [29.2H]
C7 [26.3G]
C8 [23.2H]
C9 [32.2B]
C10 [32.4B]
C11 [32.2D]
C12 [29.4B]
C13 [29.3B]
C14 [29.3C]
C15 [32.4D]
C16 [19.3G]
C17 [29.4A]
C18 [29.4B]
C19 [32.2E]
C20 [27.3E]
C21 [27.3E]
C22 [29.4H]
C23 [32.4E]
C24 [32.2E]
C25 [32.4E]
C26 [32.2E]
C27 [32.4E]
C28 [32.2E]
C29 [32.4E]
C30 [32.2F]
C31 [32.3G]
C32 [32.3G]
C33 [29.4H]
C34 [29.3F]
C35 [3.1A]
C36 [29.3G]
C37 [3.1A]
C38 [3.1A]
C40 [29.3G]
C41 [32.1H]
C42 [25.4D]
C43 [25.4C]
C44 [32.2H]
C45 [32.2H]
C46 [32.3H]
C47 [32.3H]
C48 [33.2B]
C49 [16.3B]
C50 [16.2B]
C51 [25.2H]
C52 [33.3B]
C53 [16.3C]
C54 [33.4B]
C55 [33.2D]
C56 [33.3D]
C57 [16.2F]
C58 [16.2F]
C59 [26.4D]
C60 [33.4D]
C61 [16.4E]
C62 [16.4F]
C63 [26.4D]
C64 [33.2E]
C65 [16.2E]
C66 [16.2E]
C67 [16.2F]
C68 [16.2F]
C69 [26.4C]
C70 [16.3B]
C71 [16.5B]
C72 [16.4C]
C73 [16.4D]
C74 [16.2C]
C75 [16.4C]
C76 [16.2C]
C77 [16.2B]
C78 [16.2B]
C79 [16.2B]
C80 [16.4D]
C81 [15.4G]
C82 [15.4E]
C83 [15.3F]
C84 [15.3F]
C85 [15.3F]
C86 [18.1B]
C87 [15.2E]
C88 [15.5E]
C89 [15.3E]
C90 [15.5G]
C91 [16.2D]
C92 [15.4F]
C93 [15.2F]
C94 [15.2E]
C95 [15.3B]
C96 [15.3B]
C97 [15.2B]
C98 [15.2C]
C99 [15.2B]
C100 [15.2C]
C101 [15.5C]
C102 [15.4F]
C103 [15.2E]
C104 [15.5B]
C105 [15.4B]
C106 [15.3B]
C107 [15.4E]
C108 [15.2E]
C109 [15.3B]
C110 [33.3E]
C111 [33.4E]
C112 [33.2E]
C113 [33.3E]
C114 [33.4E]
C115 [33.2F]
C116 [33.3F]
C117 [33.4F]
C118 [30.3G]
C119 [30.3G]
C120 [30.3G]
C121 [33.2F]
C122 [33.3F]
C123 [33.4F]
C124 [33.2F]
C125 [33.3F]
C126 [31.3C]
C127 [34.1C]
C128 [31.2G]
C129 [31.4D]
C130 [31.2D]
C131 [30.2F]
C132 [34.1E]
C133 [24.5B]
C134 [24.5C]
C136 [31.5F]
C137 [31.4F]
C138 [32.3E]
C139 [30.2E]
C140 [30.1E]
C141 [30.1E]
C142 [34.3B]
C143 [34.3B]
C144 [30.1F]
C145 [32.3E]
C146 [31.4F]
C147 [31.4F]
C148 [31.3F]
C149 [31.4F]
C150 [31.3G]
C151 [31.4G]
C152 [31.4G]
C153 [32.2H]
C154 [34.3C]
C155 [26.4F]
C156 [17.3A]
C157 [17.3B]
C158 [17.3B]
C159 [32.3F]
C160 [34.4C]
C161 [26.4F]
C162 [34.4B]
C163 [34.4B]
C164 [17.3B]
C165 [17.3B]
C166 [17.3B]
C167 [17.3C]
C168 [17.3C]
C169 [17.3C]
C170 [17.3C]
C171 [17.3C]
C172 [17.3D]
C173 [17.3F]
C174 [17.3F]
C175 [17.3F]
C176 [32.3E]
C177 [32.3E]
C178 [17.3G]
C179 [17.3G]
C180 [26.4G]
C501 [31.2G]
C532 [26.5F]
C542 [32.3D]
C547 [32.3B]
C548 [26.5F]
C549 [30.3D]
C550 [30.3E]
C551 [30.3D]
C552 [30.2D]
C553 [31.5D]
C554 [24.3C]
C555 [30.2D]
C557 [30.2B]
C558 [30.2B]
C559 [29.2D]
C560 [29.2D]
C561 [30.2H]
C562 [29.2E]
C564 [30.2G]
C570 [32.2G]
C571 [32.1G]
C572 [32.1G]
C573 [32.2G]
C576 [32.2G]
C577 [32.2G]
C578 [32.2G]
C579 [32.2G]
C580 [30.2H]
C581 [30.2G]
C582 [30.2G]
C583 [29.2F]
C584 [29.2E]
C585 [29.2F]
C586 [15.4G]
C587 [15.4D]
C588 [15.2D]
C589 [15.5D]
C590 [15.2D]
C591 [15.4D]
C592 [15.4G]
C593 [15.2F]
C594 [15.2G]
C595 [15.3D]
C596 [15.2D]
C597 [15.4D]
C598 [15.3C]
C599 [15.4F]
C600 [15.4F]
C601 [15.5C]
C602 [15.4B]
C603 [15.4C] C135 [31.2E] C39 [29.3G]
C604 [15.4C]
C605 [15.4E]
C606 [15.2F]
C607 [15.4E]
C608 [15.2E]
C609 [15.4B]
C610 [15.2C]
C611 [15.5B]
C612 [15.3B]
C613 [15.4B]
C614 [15.2C]
C615 [15.4B]
C616 [15.2B]
C617 [15.2E]
C618 [15.3C]
C619 [15.3C]
C620 [15.2C]
C621 [15.2C]
C622 [15.2F]
C623 [15.2E]
C624 [15.3B]
C625 [15.2C]
C626 [15.4F]
C627 [15.2F]
C628 [15.2E]
C629 [15.2F]
C630 [15.2E]
C631 [15.2E]
C632 [15.2E]
C633 [15.3B]
C634 [15.3C]
C635 [15.2B]
C636 [15.5B]
C637 [15.3C]
C638 [15.3C]
C639 [15.2B]
C640 [15.2C]
C641 [15.2B]
C642 [15.2B]
C643 [15.2C]
C644 [15.2C]
C645 [15.2C]
C646 [15.2B]
C647 [15.2C]
C648 [15.3B]
C649 [15.2F]
C650 [15.2F]
C651 [15.3C]
C652 [15.2B]
C653 [15.4E]
C654 [15.2E]
C655 [9.4H]
C656 [15.3B]
C657 [15.5B]
C658 [8.4H]
C659 [15.4B]
C660 [15.4B]
C661 [15.4F]
C662 [15.4C]
C663 [15.5C]
C664 [15.4C]
C665 [15.4C]
C666 [8.4H]
C667 [9.4H]
C668 [10.2H]
C669 [15.4F]
C670 [10.4H]
C671 [10.4H]
C672 [15.4F]
C673 [15.4E]
C674 [15.4C]
C675 [15.5C]
C676 [15.4B]
C677 [15.4C]
C678 [9.3H]
C679 [8.3H]
C680 [10.2H]
C681 [10.3H]
C682 [9.2H]
C683 [8.2H]
C684 [10.1H]
C685 [9.2H]
C686 [9.1H]
C687 [8.2H]
C688 [8.1H]
C689 [15.2C]
C690 [15.5C]
C691 [15.2G]
C692 [15.4E]
C693 [15.2C]
C694 [15.4F]
C695 [15.4E]
C696 [15.4F]
C697 [15.4C]
C698 [15.4C]
C699 [15.4C]
C700 [15.4C]
C701 [15.2B]
C702 [15.4E]
C703 [15.4B]
C704 [15.3C]
C705 [15.4B]
C706 [15.4C]
C707 [15.4C]
C708 [15.4C]
C709 [15.2E]
C710 [15.2F]
C711 [15.2E]
C712 [15.3B]
C713 [15.2B]
C714 [15.3C]
C715 [15.2F]
C716 [15.2B]
C717 [15.2B]
C718 [15.2C]
C719 [15.2F]
C720 [15.4B]
C721 [15.2B]
C722 [15.2B]
C723 [15.2E]
C724 [15.2F]
C725 [15.2F]
C726 [15.2E]
C727 [15.2B]
C728 [15.2B]
C729 [15.2B]
C730 [15.2B]
C731 [15.2B]
C732 [15.3C]
C733 [15.2C]
C734 [15.4E]
C735 [15.4E]
C736 [15.5B]
C737 [15.4B]
C738 [15.4B]
C739 [15.4C]
C740 [15.4B]
C741 [15.4B]
C742 [15.2G]
C743 [15.3D]
C744 [15.3G]
C745 [15.2D]
C746 [17.4C]
C747 [17.4B]
C748 [17.4C]
C749 [15.2E]
C750 [11.2H]
C751 [15.3E]
C752 [15.3E]
C753 [15.2E]
C754 [15.4E]
C755 [17.4A]
C756 [17.4C]
C757 [15.4E]
C758 [15.3E]
C759 [15.3E]
C760 [15.3E]
C761 [17.4B]
C762 [15.3E]
C763 [11.4H]
C764 [15.3F]
C765 [15.5F]
C766 [15.4E]
C767 [15.4E]
C768 [15.3E]
C769 [15.4F]
C770 [11.1H]
C771 [15.4F]
C772 [17.3E]
C773 [17.4C]
C774 [15.3E]
C775 [15.5F]
C776 [15.3E]
C777 [17.3E]
C778 [32.4G]
C780 [17.4B]
C781 [15.3F]
C782 [15.5F]
C783 [11.3H]
C784 [15.4F]
C785 [15.4F]
C786 [15.2E]
C787 [15.2F]
C788 [17.3F]
C789 [17.3F]
C790 [15.3F]
C791 [3.2H]
C792 [3.3H]
C793 [15.2E]
C794 [15.5F]
C795 [15.3F]
C797 [17.3G]
C798 [15.5E]
C799 [17.3E]
C800 [17.2E]
C801 [15.5E]
C802 [17.4B]
C803 [17.2F]
C804 [17.2F]
C806 [17.2F]
C807 [17.2F]
C808 [4.3C]
C809 [5.4B]
C810 [15.3F]
C811 [15.2F]
C812 [4.3C]
C813 [17.3F]
C814 [17.2E]
C816 [5.4C]
C817 [17.2E]
C821 [17.2F]
C822 [4.3B]
C823 [15.5E]
C824 [3.3G]
C825 [11.4H]
C826 [15.3F]
C828 [17.2B]
C832 [3.2G]
C833 [17.2G]
C834 [17.4D]
C835 [17.4B]
C837 [17.3C]
C839 [29.2B]
C840 [15.5E]
C841 [4.3C]
C842 [3.4G]
C846 [17.4B]
C848 [15.2F]
C849 [15.5F]
C850 [3.3G]
C851 [17.2G]
C852 [29.2A]
C853 [3.4G]
C854 [3.4G]
C855 [3.4G]
C856 [3.3G]
C857 [17.3F]
C858 [3.4H]
C860 [17.2E]
C861 [15.4F]
C862 [15.3F]
C863 [3.3G]
C864 [11.2H]
C865 [17.2B]
C867 [17.3B]
C868 [17.3B]
C871 [17.2B]
C872 [17.2F]
C873 [17.3F]
C874 [15.2G]
C875 [17.2C]
C877 [17.3C]
C878 [17.2B]
C879 [17.2B]
C882 [3.2G]
C883 [17.1A]
C885 [17.3B]
C886 [3.2G]
C887 [17.2F]
C888 [3.2G]
C889 [3.3G]
C891 [17.2B]
C893 [17.1B]
C894 [3.5D]
C895 [3.5D]
C896 [3.2G]
C897 [17.1B]
C898 [17.2C]
C899 [18.1C]
C901 [3.2G]
C902 [17.4B]
C903 [17.4C]
C904 [17.4A]
C906 [3.2G]
C907 [17.2F]
C908 [17.2B]
C909 [17.1B]
C910 [18.1C]
C911 [17.1B]
C913 [17.2C]
C914 [18.1C]
C916 [3.5D]
C917 [17.3C]
C918 [17.4B]
C919 [17.1B]
C920 [17.2G]
C921 [3.2G] C796 [3.3G]
C922 [3.2G]
C923 [3.5D]
C924 [17.3A]
C926 [17.2A]
C927 [17.2B]
C928 [17.2B]
C929 [17.3C]
C930 [17.2C]
C931 [17.2E]
C932 [17.2E]
C933 [18.1C]
C934 [16.2D]
C935 [17.2A]
C937 [17.3A]
C940 [17.3B]
C942 [18.1B]
C943 [3.2H]
C944 [17.2G]
C945 [18.1B]
C946 [17.3B]
C948 [17.3B]
C950 [17.4A]
C953 [17.2E]
C954 [18.1B]
C955 [12.2H]
C956 [16.2B]
C957 [16.2B]
C958 [3.5D]
C959 [18.1C]
C960 [17.3E]
C961 [17.3B]
C964 [16.2B]
C965 [16.4C]
C966 [18.1C]
C969 [3.5D]
C970 [18.1B]
C971 [18.1C]
C975 [17.2E]
C976 [17.4B]
C977 [17.4C]
C978 [16.4C]
C980 [17.3B]
C981 [17.3B]
C982 [17.4B]
C983 [18.1B]
C986 [17.4B]
C988 [16.4B]
C989 [16.4B]
C990 [3.4D]
C991 [17.2E]
C993 [6.4C]
C994 [3.2G]
C995 [17.2G]
C996 [17.3G]
C997 [17.2G]
C998 [17.2F]
C999 [17.2F]
C1000 [17.3E]
C1001 [16.2B]
C1002 [3.4D]
C1003 [7.4B]
C1004 [6.4C]
C1005 [3.3G]
C1006 [16.2B]
C1007 [12.4H]
C1008 [16.2B]
C1009 [17.2F]
C1010 [17.3E]
C1011 [6.4B]
C1012 [17.2F]
C1013 [17.3G]
C1014 [17.2G]
C1016 [17.3E]
C1017 [17.3E]
C1018 [16.4C]
C1019 [17.3F]
C1020 [16.4B]
C1021 [16.4B]
C1022 [17.4C]
C1023 [18.1A]
C1024 [7.4C]
C1025 [3.4D]
C1026 [18.1A]
C1027 [16.2B]
C1028 [16.4C]
C1029 [12.1H]
C1030 [16.4C]
C1031 [16.4B]
C1032 [6.4C]
C1033 [3.4D]
C1034 [16.2B]
C1035 [16.4B]
C1036 [16.2B]
C1037 [16.2B]
C1038 [3.2H]
C1039 [17.3F]
C1040 [3.4D]
C1041 [12.4H]
C1042 [3.4D]
C1043 [17.3E]
C1044 [16.2C]
C1045 [12.3H]
C1046 [16.2C]
C1047 [16.2C]
C1048 [16.4C]
C1049 [16.2B]
C1050 [16.4C]
C1051 [16.2C]
C1052 [17.4C]
C1053 [3.4D]
C1054 [16.4B]
C1055 [17.4B]
C1056 [16.4B]
C1057 [3.4D]
C1058 [17.4B]
C1059 [16.2C]
C1060 [16.4B]
C1061 [16.2C]
C1062 [3.4D]
C1063 [16.2C]
C1064 [16.2B]
C1065 [16.4C]
C1066 [3.4D]
C1067 [16.4B]
C1068 [16.2C]
C1069 [16.4C]
C1070 [3.3D]
C1071 [16.2C]
C1072 [16.2C]
C1073 [16.2C]
C1074 [3.3D]
C1075 [12.2H]
C1076 [16.2D]
C1077 [3.3D]
C1078 [3.3D]
C1079 [16.4G]
C1080 [17.4C]
C1081 [3.3D]
C1082 [17.4B]
C1083 [16.4B]
C1084 [3.3D]
C1085 [16.4E]
C1086 [16.4E]
C1087 [16.3B]
C1088 [13.2H]
C1089 [16.4E]
C1090 [16.5B]
C1091 [16.5C]
C1092 [16.2E]
C1093 [26.3D]
C1094 [16.2E]
C1095 [16.2E]
C1096 [3.3D]
C1097 [16.3B]
C1098 [16.3D]
C1099 [16.4E]
C1100 [3.3D]
C1101 [16.5C]
C1102 [16.3B]
C1103 [16.2F]
C1104 [16.2E]
C1105 [16.5C]
C1106 [16.4F]
C1107 [16.4E]
C1108 [16.4F]
C1109 [16.2B]
C1110 [16.3C]
C1111 [16.5C]
C1112 [16.4F]
C1113 [16.4E]
C1114 [16.3B]
C1115 [16.4D]
C1116 [16.4C]
C1117 [16.4B]
C1118 [3.3D]
C1119 [16.5C]
C1120 [16.2C]
C1121 [13.4H]
C1122 [16.2F]
C1123 [16.3C]
C1124 [16.4F]
C1125 [3.3D]
C1126 [16.4B]
C1127 [13.1H]
C1128 [16.3B]
C1129 [14.1H]
C1130 [14.2H]
C1131 [14.2H]
C1132 [16.3B]
C1133 [16.3C]
C1134 [16.2B]
C1136 [14.3H]
C1137 [16.4F]
C1138 [16.4F]
C1139 [14.4H]
C1140 [14.4H]
C1141 [3.2D]
C1142 [16.4F]
C1143 [16.4F]
C1144 [16.4C]
C1145 [16.2E]
C1146 [16.2F]
C1147 [16.3B]
C1148 [16.2E]
C1149 [3.2D]
C1150 [16.4B]
C1151 [16.2F]
C1152 [16.3B]
C1153 [13.3H]
C1154 [16.2B]
C1155 [16.2E]
C1156 [16.2E]
C1157 [16.2E]
C1158 [16.2F]
C1159 [16.2E]
C1160 [16.2F]
C1161 [16.2F]
C1162 [16.2E]
C1163 [16.2F]
C1164 [16.2E]
C1165 [16.2E]
C1166 [16.4C]
C1167 [16.2B]
C1168 [3.2D]
C1169 [16.2D]
C1170 [16.2F]
C1171 [16.4E]
C1172 [16.4E]
C1173 [16.4E]
C1174 [16.4F]
C1175 [3.2D]
C1176 [16.3C]
C1177 [16.3C]
C1178 [16.3C]
C1179 [16.2G]
C1180 [16.2G]
C1181 [16.4G]
C1182 [16.2G]
C1183 [3.2D]
C1184 [13.4H]
C1185 [16.4B]
C1186 [3.2D]
C1187 [16.5B]
C1188 [16.3C]
C1189 [16.3D]
C1190 [16.2C]
C1191 [16.2C]
C1192 [16.4C]
C1195 [16.3C]
C1196 [13.2H]
C1197 [16.5B]
C1198 [16.3C]
C1200 [25.2A]
C1204 [18.2H]
C1205 [18.5A]
C1210 [18.4H]
C1211 [23.4E]
C1212 [3.2A]
C1213 [18.4H]
C1215 [26.1H]
C1216 [3.1A]
C1217 [18.4G]
C1218 [3.1A]
C1219 [18.5A]
C1220 [18.4G]
C1222 [18.5A]
C1223 [26.2G]
C1224 [18.4H]
C1226 [18.4H]
C1228 [18.5A]
C1229 [18.4G]
C1230 [18.4G]
C1231 [24.2B]
C1234 [18.2H]
C1237 [18.4G]
C1238 [18.5B]
C1239 [18.4G]
C1242 [18.3H]
C1244 [24.1C]
C1245 [18.1G]
C1246 [18.1G]
C1247 [18.1H]
C1248 [24.1C]
C1249 [24.1B]
C1250 [29.4F]
C1251 [27.4B]
C1253 [18.3H]
C1254 [18.3G]
C1255 [18.3G]
C1256 [18.3H]
C1257 [29.3E]
C1258 [29.3E]
C1259 [18.2G]
C1260 [18.1H]
C1261 [18.1G]
C1262 [29.4F]
C1263 [29.3E]
C1270 [18.2H]
C1271 [18.2G]
C1272 [18.1H]
C1274 [18.2G]
C1275 [18.2G]
C1276 [18.2H]
C1277 [22.3A]
C1278 [22.3B]
C1279 [18.2G]
C1280 [18.2H]
C1281 [29.3D]
C1282 [21.3A]
C1283 [22.3B]
C1284 [20.4B]
C1285 [18.2G]
C1286 [18.2G]
C1287 [29.5G]
C1288 [18.3G]
C1289 [27.4B]
C1290 [18.3G]
C1291 [18.2H]
C1292 [18.2G]
C1293 [29.4E]
C1294 [20.3B]
C1295 [20.3B]
C1296 [21.3B]
C1297 [20.3B]
C1298 [21.3B]
C1299 [21.3B]
C1300 [29.4C]
C1302 [22.3C]
C1303 [19.3B]
C1304 [27.3B]
C1305 [19.3A]
C1306 [19.3B]
C1308 [29.4E]
C1310 [20.3A]
C1311 [23.3B]
C1312 [19.3B]
C1313 [23.3B]
C1314 [22.3B]
C1315 [22.3C]
C1319 [23.3B]
C1320 [19.4B]
C1321 [22.3B]
C1323 [21.4B]
C1324 [27.1B]
C1326 [22.3B]
C1327 [23.3B]
C1328 [18.4B]
C1329 [23.3B]
C1330 [18.4A]
C1331 [23.3B]
C1332 [18.4A]
C1333 [18.4A]
C1334 [23.3B]
C1335 [23.3A]
C1336 [18.4A]
C1340 [21.3E]
C1341 [21.3E]
C1342 [21.2E]
C1343 [20.3F]
C1344 [20.4F]
C1345 [20.5F]
C1346 [19.5F]
C1347 [19.3F]
C1348 [19.4F]
C1350 [22.4E]
C1351 [19.1G]
C1352 [19.2G]
C1353 [21.3E]
C1354 [21.3E]
C1355 [21.2E]
C1356 [19.5F]
C1357 [19.3F]
C1358 [19.4F]
C1359 [20.5F]
C1360 [20.3F]
C1361 [20.4F]
C1363 [21.3F]
C1364 [21.3F]
C1365 [21.2F]
C1366 [22.2H]
C1380 [31.1H]
CN1 [24.3H] C1252 [18.3H] C1135 [16.5B]
CN2 [3.3B]
CN3 [24.2H]
D1 [19.2F]
D2 [23.4E]
D3 [20.2F]
D4 [20.1F]
D5 [20.3F]
D6 [20.2F]
D7 [19.3F]
D8 [32.2D]
D9 [30.2E]
D10 [32.4D]
D11 [33.2D]
D12 [33.3D]
D13 [33.4D]
D20 [29.2D]
D21 [32.4C]
D22 [32.2E]
D23 [32.5E]
D26 [33.4C]
D27 [33.2E]
D28 [33.3E]
D29 [33.5E]
D30 [31.1D]
D504 [26.4F]
D508 [32.3C]
D513 [32.3D]
D514 [24.3D]
D515 [30.2D]
D519 [21.3E]
D520 [21.3E]
D521 [21.2E]
D522 [20.5E]
D523 [20.3E]
D524 [20.4E]
D525 [19.5E]
D526 [19.3E]
D527 [19.4E]
D528 [19.1F]
D529 [19.2F]
D530 [22.4E]
D543 [32.3E]
F1 [29.1G]
F2 [24.4C]
G1 [3.3F 3.1F]
G1 [4.3B 4.5B
4.3E]
G1 [5.3B 5.3E]
G1 [6.3E 6.3B]
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
<edit here to insert page detail>
www.vinafix.vn
600-10897-0053-300 A
p897
misun
40 OF 41
31-DEC-2008
Page 41
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
G1 [7.3E 7.3B]
G1 [18.3D]
G1 [26.4B]
G1 [28.3C 28.2E
28.3A 28.3B
28.3B 28.3D
28.3F]
G1 [30.4A]
J2 [21.3G]
J3 [23.3H]
J4 [22.3H]
J5 [24.3B]
J6 [34.3A]
J7 [34.4A]
J8 [26.4G]
J501 [3.1D]
L1 [19.2F]
L2 [20.3F]
L3 [20.2F]
L4 [19.3F]
L5 [29.4G]
L6 [32.2F]
L7 [32.4F]
L8 [33.2F]
L9 [34.1D]
L10 [33.3F]
L11 [33.4F]
L13 [32.3F]
L14 [30.2F]
L15 [34.3C]
L16 [34.4C]
L501 [21.3E]
L502 [21.3E]
L503 [21.2E]
L504 [19.4F]
L505 [19.3F]
L506 [19.4F]
L507 [20.4F]
L508 [20.3F]
L509 [20.4F]
LB1 [20.1F]
LB2 [20.1F]
LB4 [23.4F]
LB502 [4.3C]
LB503 [3.4G]
LB504 [3.4G]
LB506 [6.4C]
LB507 [18.5A]
LB509 [18.4H]
LB510 [18.4H]
LB511 [22.3B]
LB513 [20.3A]
LB514 [21.3A]
LB515 [19.3A]
LB516 [23.3B]
LB518 [22.3B]
LB519 [18.4A]
LB520 [23.3B]
LB522 [19.1F]
LB523 [19.1F]
LB526 [22.4F]
M1 [13.4D 13.4C
13.2C 13.4C
13.4D]
M2 [14.4C 14.4B
14.2B 14.4C
14.4B]
M3 [14.4D 14.2C
14.4C 14.4D
14.4C]
M4 [13.4C 13.2B
13.4B 13.4B
13.4C]
M5 [12.4D 12.4C
12.4D 12.4C
12.2C]
M6 [12.4B 12.4C
12.4C 12.2B
12.4B]
M7 [11.4D 11.4C
11.2C 11.4D
11.4C]
M8 [11.4B 11.4C
11.4C 11.4B
11.2B]
M9 [10.4C 10.4C
10.4D 10.2C
10.4D]
M10 [10.2B 10.4B
10.4C 10.4B
10.4C]
M11 [9.4D 9.4C 9.2C
9.4D 9.4C]
M12 [9.4C 9.4B 9.4B
9.2B 9.4C]
M13 [8.4D 8.2C 8.4D
8.4C 8.4C]
M14 [8.4C 8.4C 8.4B
8.2B 8.4B]
MEC1 [35.2B]
MEC2 [35.5B]
MEC3 [35.4D]
MEC4 [35.4D]
MEC5 [35.4E]
MEC6 [35.4E]
MEC7 [35.2D]
MEC8 [35.2D]
MEC9 [35.5E]
MEC10 [35.4E]
MEC11 [35.3B]
MEC12 [35.5F]
MEC13 [35.2D]
MEC14 [35.2D]
MEC15 [35.4G]
MEC16 [35.5G]
MEC17 [35.3G]
MEC18 [35.4G]
MEC19 [35.5G]
MEC20 [35.2E]
MEC21 [35.4F]
MEC501 [35.2B]
MEC502 [35.2B]
MEC503 [35.2B]
MEC504 [35.2B]
Q1 [32.2D]
Q2 [29.3B]
Q3 [32.3D]
Q4 [32.5D]
Q5 [29.4F 29.3F]
Q6 [30.2D]
Q7 [24.5B]
Q8 [30.2E]
Q9 [30.2D]
Q10 [24.5C]
Q11 [32.2D]
Q12 [32.4D]
Q13 [33.2D]
Q14 [33.3D]
Q15 [33.5D]
Q16 [33.2E]
Q17 [33.3E]
Q19 [33.4E]
Q20 [32.2D]
Q21 [32.5D]
Q22 [32.3D]
Q23 [26.5G]
Q24 [33.2E]
Q25 [33.3E]
Q26 [33.5E]
Q27 [31.2C]
Q501 [31.2G]
Q502 [31.1G]
Q504 [31.2C]
Q506 [31.2G]
Q514 [26.5F]
Q516 [30.2B]
Q517 [30.3A]
Q518 [3.1G]
Q519 [3.1G]
Q522 [26.1F]
Q524 [26.2F]
Q525 [26.1G]
Q526 [26.3G]
Q528 [26.2G]
Q529 [25.3G]
Q535 [29.4C]
Q537 [29.5C]
Q542 [26.3H]
Q543 [26.2G]
R1 [23.4E]
R2 [23.4E]
R3 [26.3G]
R4 [32.2B]
R5 [20.1E]
R6 [20.1E]
R7 [32.4B]
R8 [32.2C]
R9 [27.3E]
R10 [27.3F]
R11 [27.2B]
R12 [27.2B]
R13 [20.1D]
R14 [20.1D]
R15 [25.2E]
R16 [25.2E]
R17 [32.2C]
R18 [25.2D]
R19 [25.2D]
R20 [32.4C]
R21 [32.5C]
R22 [27.4G]
R23 [32.2C]
R24 [32.2C]
R25 [32.4C]
R26 [27.5E]
R27 [27.5G]
R28 [27.5F]
R29 [32.4C]
R30 [32.2D]
R31 [27.4G]
R32 [27.4G]
R33 [27.4E]
R34 [27.4G]
R35 [27.4E]
R36 [32.5D]
R37 [32.2D]
R38 [32.4D]
R39 [25.2B]
R40 [32.2E]
R41 [32.5E]
R42 [32.2F]
R43 [32.3F]
R44 [13.2C]
R45 [32.4F]
R46 [3.1E]
R47 [33.2B]
R48 [31.2F]
R49 [26.3G]
R50 [33.3B]
R51 [13.2A]
R52 [14.2A]
R53 [14.2C]
R54 [26.4E]
R55 [12.2C]
R56 [12.2A]
R57 [11.2C]
R58 [3.2E]
R59 [3.2E]
R60 [11.2A]
R61 [8.2A]
R62 [10.2C]
R63 [10.2A]
R64 [9.2C]
R65 [9.2A]
R66 [8.2C]
R67 [33.4B]
R68 [30.3F] Q18 [32.3D] LB505 [18.1C]
R69 [33.5D]
R70 [33.2D]
R71 [33.2D]
R72 [33.4D]
R73 [33.3D]
R74 [33.3D]
R75 [33.2D]
R76 [33.2D]
R77 [33.3D]
R78 [33.3D]
R79 [33.4D]
R80 [33.4D]
R81 [24.5B]
R82 [24.4B]
R83 [24.4B]
R84 [33.2D]
R85 [33.3D]
R86 [33.5D]
R87 [24.5A]
R88 [32.3E]
R89 [24.4C]
R90 [24.4C]
R91 [24.4C]
R92 [26.4F]
R93 [26.4F]
R94 [26.4F]
R95 [33.2E]
R96 [33.3E]
R97 [33.4E]
R98 [33.2E]
R99 [33.3E]
R100 [33.5E]
R101 [33.2F]
R102 [33.3F]
R103 [33.4F]
R104 [31.3C]
R105 [31.2F]
R106 [31.2F]
R107 [31.2F]
R108 [31.1H]
R109 [31.3D]
R110 [31.3D]
R111 [31.3D]
R112 [32.4A]
R113 [31.4D]
R114 [31.4D]
R115 [31.2D]
R116 [31.2D]
R117 [31.4F]
R118 [31.3F]
R119 [31.3F]
R120 [31.3F]
R121 [31.3F]
R122 [31.3F]
R123 [31.3F]
R124 [31.3F]
R125 [31.4F]
R126 [31.4F]
R127 [31.4F]
R128 [31.4G]
R129 [31.3G]
R130 [31.4G]
R131 [31.3G]
R132 [31.4G]
R133 [31.3G]
R134 [31.4G]
R135 [31.3G]
R136 [31.4G]
R137 [31.4G]
R138 [31.5G]
R139 [31.5G]
R140 [31.3G]
R141 [31.4H]
R142 [31.4H]
R143 [31.3H]
R144 [31.3H]
R145 [32.4A]
R146 [33.2B]
R147 [33.2B]
R148 [34.3C]
R149 [34.3C]
R150 [34.3C]
R151 [34.3C]
R152 [34.5C]
R153 [34.5C]
R154 [34.5C]
R155 [34.5C]
R156 [34.1D]
R157 [34.1D]
R158 [34.2D]
R159 [34.2D]
R160 [29.1D]
R161 [31.2C]
R162 [31.3C]
R163 [25.3F]
R501 [31.2F]
R502 [31.3D]
R503 [31.2C]
R505 [31.3D]
R506 [31.3C]
R507 [31.2D]
R517 [31.2D]
R519 [31.2C]
R520 [31.2F]
R523 [31.1G]
R524 [31.3C]
R527 [31.1G]
R536 [31.5D]
R546 [31.2C]
R547 [31.3C]
R563 [31.3C]
R567 [26.5F]
R574 [32.3B]
R578 [32.3C]
R582 [26.5E]
R586 [32.3D]
R587 [30.3E]
R588 [31.5D]
R589 [30.2B]
R590 [30.3D]
R591 [30.3G]
R592 [30.3F]
R593 [30.3E]
R594 [30.3B]
R595 [30.3E]
R599 [32.3C]
R603 [32.3D]
R607 [32.3C]
R608 [31.5D]
R609 [31.5D]
R613 [32.3C]
R614 [30.2C]
R615 [30.2D]
R616 [30.2D]
R617 [30.2C]
R618 [30.2D]
R620 [24.3D]
R622 [24.4D]
R623 [30.2D]
R624 [29.2E]
R625 [29.2E]
R626 [10.2C]
R627 [10.2B]
R628 [9.2C]
R629 [9.2B]
R630 [8.2C]
R631 [8.2B]
R632 [9.5F]
R633 [8.5F]
R634 [9.2H]
R635 [10.2H]
R636 [9.2H]
R637 [8.2H]
R638 [8.2H]
R639 [8.2H]
R640 [10.2H]
R641 [10.1H]
R642 [9.2H]
R643 [9.1H]
R644 [8.1H]
R645 [10.3H]
R646 [8.3H]
R647 [9.3H]
R648 [10.5B]
R649 [10.2H]
R650 [9.2H]
R651 [8.2H]
R652 [9.4H]
R653 [10.4H]
R654 [10.4H]
R655 [9.4H]
R656 [8.4H]
R657 [8.4H]
R658 [10.2H]
R659 [10.5D]
R660 [10.1H]
R661 [9.5D]
R662 [9.1H]
R663 [9.5B]
R664 [8.5D]
R665 [8.1H]
R666 [9.4H]
R667 [10.4H]
R668 [10.4H]
R669 [9.4H]
R670 [8.4H]
R671 [8.4H]
R672 [10.5C]
R673 [9.5C]
R674 [8.5C]
R675 [10.3H]
R677 [8.3H]
R678 [9.5D]
R679 [10.5F]
R680 [10.5D]
R681 [9.5D]
R682 [9.5D]
R683 [8.5D]
R684 [8.5D]
R685 [10.5B]
R686 [9.5B]
R687 [8.5B]
R688 [10.5D]
R689 [8.5D]
R690 [8.5C]
R691 [9.5C]
R692 [10.5C]
R693 [10.5C]
R694 [9.5C]
R695 [8.5C]
R696 [10.5D]
R697 [10.5G]
R698 [8.5B]
R699 [8.5G]
R700 [9.5G]
R701 [10.5B]
R702 [10.5B]
R703 [10.5B]
R704 [9.5B]
R705 [9.5B]
R706 [9.5B]
R707 [8.5B]
R708 [8.5B]
R709 [8.5B]
R710 [11.2H]
R711 [11.5B]
R712 [11.2H]
R713 [11.4H]
R714 [11.4H]
R715 [11.5C]
R716 [11.5B]
R717 [11.2B]
R718 [11.5B]
R719 [11.5B]
R720 [11.5B]
R721 [11.1H]
R722 [11.1H]
R723 [11.5F]
R724 [11.5G]
R725 [11.3H]
R726 [11.3H]
R728 [11.5C]
R729 [3.4H]
R730 [5.3E]
R731 [4.5A]
R732 [5.3C]
R734 [4.3F]
R735 [11.5C]
R736 [28.4G]
R737 [4.3C]
R738 [4.5A]
R739 [11.4H]
R740 [11.4H]
R741 [11.2C]
R742 [11.5D]
R743 [4.5A]
R744 [11.5D]
R745 [11.5D]
R746 [29.2B]
R747 [29.2B]
R748 [11.2H]
R749 [11.2H]
R750 [11.5D]
R751 [12.2H]
R752 [12.5B]
R753 [12.2H]
R754 [18.3C]
R755 [6.3C]
R756 [18.3C]
R757 [12.5C]
R758 [12.4H]
R759 [12.4H]
R761 [12.5B]
R762 [12.2B]
R763 [6.3E]
R764 [12.5B]
R765 [7.3C]
R766 [12.5B]
R768 [12.5B]
R769 [12.1H]
R770 [12.1H]
R771 [12.5G]
R772 [12.5F]
R773 [12.4H]
R774 [12.4H]
R775 [12.3H]
R776 [12.3H] R676 [9.3H]
R777 [12.5C]
R778 [12.5C]
R779 [12.5D]
R780 [12.5D]
R781 [12.2C]
R782 [12.5D]
R783 [12.2H]
R784 [12.5D]
R785 [12.2H]
R786 [14.5B]
R787 [14.5B]
R788 [14.5B]
R789 [13.5B]
R790 [13.5B]
R791 [13.5B]
R792 [13.2H]
R793 [14.5G]
R794 [13.5B]
R795 [13.2H]
R796 [13.5C]
R797 [13.5B]
R798 [13.5G]
R799 [26.3D]
R800 [14.5C]
R801 [14.5C]
R802 [13.4H]
R803 [14.5D]
R804 [13.4H]
R805 [14.5B]
R806 [14.5D]
R807 [14.5D]
R808 [14.5B]
R809 [14.3H]
R810 [14.5C]
R811 [14.4H]
R812 [14.4H]
R813 [14.1H]
R814 [14.2H]
R815 [14.5D]
R816 [14.4H]
R817 [14.4H]
R818 [13.1H]
R819 [14.2H]
R820 [14.3H]
R821 [3.1E]
R822 [13.3H]
R823 [13.2B]
R824 [13.1H]
R825 [14.1H]
R826 [14.2H]
R827 [3.1G]
R828 [14.5F]
R829 [13.5C]
R830 [13.3H]
R831 [14.2H]
R832 [13.5C]
R833 [13.5F]
R834 [3.1D]
R835 [13.5D]
R836 [14.2B]
R837 [14.2C]
R838 [13.4H]
R839 [3.1D]
R840 [13.4H]
R841 [13.5D]
R842 [3.1E]
R843 [13.5D]
R844 [3.1G]
R845 [3.1E]
R846 [13.5D]
R847 [3.1E]
R848 [13.2H]
R849 [3.1G]
R850 [3.1F]
R851 [13.2C]
R852 [13.2H]
R853 [25.2G]
R854 [24.2G]
R855 [3.1F]
R856 [26.2E]
R857 [26.2E]
R859 [25.2G]
R861 [25.2G]
R862 [25.2G]
R866 [26.1G]
R867 [25.3B]
R868 [26.2F]
R875 [26.1H]
R877 [18.3G]
R879 [25.3F]
R880 [26.2G]
R881 [18.3G]
R882 [26.4G]
R884 [24.2B]
R885 [24.2B]
R888 [27.4G]
R891 [24.2C]
R894 [25.3C]
R896 [27.1E]
R897 [27.1F]
R898 [24.2C]
R899 [27.4G]
R903 [18.5C]
R904 [27.1E]
R905 [27.1F]
R908 [25.3D]
R909 [27.1F]
R910 [27.1E]
R911 [29.4F]
R912 [27.2F]
R913 [27.1E]
R914 [27.1F]
R917 [29.3E]
R918 [27.3E]
R919 [27.2F]
R921 [20.4B]
R922 [29.4G]
R923 [29.3E]
R924 [29.4D]
R925 [29.3C]
R926 [29.4C]
R927 [25.3E]
R928 [21.4B]
R930 [29.4E]
R931 [29.4G]
R932 [29.5F]
R933 [29.4B]
R934 [29.3C]
R937 [29.5F]
R938 [29.4B]
R939 [22.2B]
R941 [20.3C]
R943 [20.3D]
R945 [23.2B]
R947 [20.3C]
R948 [27.4B]
R950 [19.4B]
R952 [25.3E]
R953 [26.3H]
R955 [27.3B]
R956 [25.3G]
R957 [19.1D]
R958 [19.1D]
R960 [21.4D]
R963 [21.4D]
R964 [19.2E]
R965 [20.2E]
R966 [27.2F]
R969 [26.2G]
R970 [24.3G]
R971 [21.4D]
R972 [19.3C]
R973 [19.3C]
R974 [19.3D]
R975 [19.3E]
R976 [20.3E]
R978 [19.5E]
R979 [19.3E]
R980 [19.4E]
R981 [19.1E]
R982 [19.1E]
R984 [21.3E]
R985 [21.3E]
R987 [20.5E]
R988 [20.3E]
R989 [20.4E]
R990 [21.2E]
R992 [22.4E]
R993 [22.4E]
R1002 [31.1H]
R1003 [26.1H]
TP502 [30.4B]
TP506 [30.4B]
TP507 [30.4B]
U1 [31.3E]
U2 [19.2E 19.3E]
U2 [20.2E 20.3E]
U3 [29.4D]
U4 [3.1H]
U4 [18.5B 18.2F]
U4 [19.3C]
U4 [20.3C]
U4 [21.3C]
U4 [22.3C]
U4 [23.3C]
U4 [24.2D]
U4 [25.3C]
U4 [27.2B 27.3B
27.5B 27.4B]
U4 [28.2H 28.4H]
U5 [27.4F]
U6 [32.2B]
U7 [25.2H]
U8 [32.3B]
U9 [26.4D]
U10 [32.4C]
U11 [33.2C]
U12 [33.3C]
U13 [33.4C]
U507 [30.2C]
U508 [29.1E]
U509 [29.1B]
U510 [26.3D]
U511 [25.2A]
Y1 [25.4C]
DT, GT200-103-B2, 573/1242/1000, 896MB - 16Mx32 GDDR3, DVI-I + DVI-I
<edit here to insert page detail>
www.vinafix.vn
600-10897-0053-300 A
p897
misun
41 OF 41
31-DEC-2008
Loading...