8
+12V_BUS
C1
CAP CER 10UF 20% 16V X5R
10UFC110UF
(1206)1.8MM H MAX
+12V_BUS +12V_BUS
C3
D D
C C
B B
C2
150nF_16VC3150nF_16V
150nF_16VC2150nF_16V
+3.3V_BUS
CAP CER 10UF 10% 6.3V X6S
(0805)1.4MM MAX THICK
C5
10uF_X6SC510uF_X6S
+3.3V_BUS
C7
1uF_6.3VC71uF_6.3V
C8
10nFC810nF
C6
100nF_6.3VC6100nF_6.3V
Place these caps as close to the PCIE
connector as possible
7
+3.3V
GPIO_4_SMBCLK (6)
GPIO_3_SMBDATA (6)
DNI DNI
TEST_EN_J TEST_EN_J
R10RR1
0R
PETp10_GFXRp10 (2)
PETn10_GFXRn10 (2)
PETp11_GFXRp11 (2)
PETn11_GFXRn11 (2)
PETp12_GFXRp12 (2)
PETn12_GFXRn12 (2)
PETp13_GFXRp13 (2)
PETn13_GFXRn13 (2)
PETp14_GFXRp14 (2)
PETn14_GFXRn14 (2)
PETp15_GFXRp15 (2)
PETn15_GFXRn15 (2)
PETn0_GFXRn0 (2)
PETp1_GFXRp1 (2)
PETn1_GFXRn1 (2)
PETp2_GFXRp2 (2)
PETn2_GFXRn2 (2)
PETp3_GFXRp3 (2)
PETn3_GFXRn3 (2)
PETp4_GFXRp4 (2)
PETn4_GFXRn4 (2)
PETp5_GFXRp5 (2)
PETn5_GFXRn5 (2)
PETp6_GFXRp6 (2)
PETn6_GFXRn6 (2)
PETp7_GFXRp7 (2)
PETn7_GFXRn7 (2)
PETp8_GFXRp8 (2)
PETn8_GFXRn8 (2)
PETp9_GFXRp9 (2)
PETn9_GFXRn9 (2)
+3.3V_BUS
6
DNI , To Bypass U12
+3.3V_BUS
JTRST
PRESENCE
5
PCI-EXPRESS EDGE CONNECTOR
+12V_BUS
SMCLK
SMDAT
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
+3.3V
+12V#B1
+12V#B2
+12V#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1
3.3Vaux
WAKE#
RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82
x16 PCIe
x16 PCIe
Mechanical Key
Mechanical Key
MPCIE1
MPCIE1
PRSNT1#A1
+12V#A2
+12V#A3
GND#A4
JTAG2
JTAG3
JTAG4
JTAG5
+3.3V#A9
+3.3V#A10
PERST#
GND#A12
REFCLK+
REFCLKGND#A15
PERp0
PERn0
GND#A18
RSVD#A19
GND#A20
PERp1
PERn1
GND#A23
GND#A24
PERp2
PERn2
GND#A27
GND#A28
PERp3
PERn3
GND#A31
RSVD#A32
RSVD#A33
GND#A34
PERp4
PERn4
GND#A37
GND#A38
PERp5
PERn5
GND#A41
GND#A42
PERp6
PERn6
GND#A45
GND#A46
PERp7
PERn7
GND#A49
RSVD#A50
GND#A51
PERp8
PERn8
GND#A54
GND#A55
PERp9
PERn9
GND#A58
GND#A59
PERp10
PERn10
GND#A62
GND#A63
PERp11
PERn11
GND#A66
GND#A67
PERp12
PERn12
GND#A70
GND#A71
PERp13
PERn13
GND#A74
GND#A75
PERp14
PERn14
GND#A78
GND#A79
PERp15
PERn15
GND#A82
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
4
PRESENCE
JTDI
+12V_BUS
+3.3V_BUS
PERp0
PERn0
PERp1
PERn1
PERp2
PERn2
PERp3
PERn3
PERp4
PERn4
PERp5
PERn5
PERp6
PERn6
PERp7
PERn7
PERp8
PERn8
PERp9
PERn9
PERp10
PERn10
PERp11
PERn11
PERp12
PERn12
PERp13
PERn13
PERp14
PERn14
PERp15
PERn15
JTCK
JTDO
JTMS
PERST#
JTRST
No JTAG
R2 0R R2 0R
3
JTAG_MODE
JTAG_TRSTB
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
PCIE_REFCLKP (2)
PCIE_REFCLKN (2) PETp0_GFXRp0 (2)
PERp0 (2)
PERn0 (2)
PERp1 (2)
PERn1 (2)
PERp2 (2)
PERn2 (2)
PERp3 (2)
PERn3 (2)
PERp4 (2)
PERn4 (2)
PERp5 (2)
PERn5 (2)
PERp6 (2)
PERn6 (2)
PERp7 (2)
PERn7 (2)
PERp8 (2)
PERn8 (2)
PERp9 (2)
PERn9 (2)
PERp10 (2)
PERn10 (2)
PERp11 (2)
PERn11 (2)
PERp12 (2)
PERn12 (2)
PERp13 (2)
PERn13 (2)
PERp14 (2)
PERn14 (2)
PERp15 (2)
PERn15 (2)
TP1
TP1
TP32
TP32
TP5
TP5
TP2
TP2
TP3
35mil
35mil
35mil
35mil
35mil
35mil
TP3
35mil
35mil
PWR_GOOD (6,14,15,16)
TP4
TP4
35mil
35mil
35mil
35mil
Table 1: Connection for JTAG
Production
(No JTAG)
Internal Use Only
2
U1A
R21 1K R21 1K
JTAG_TMS (17)
JTAG_TDO (17)
JTAG_TCK (17)
JTAG_MODE (17)
JTAG_TDI (17)
MR9 0R MR9 0R
U1A
AD28
TESTEN
AM23
JTAG_TRSTB
AK23
JTAG_TCK
AN23
JTAG_TDI
AM24
JTAG_TDO
AL24
JTAG_TMS
RV730XT A12 HF MVE SLT B1
RV730XT A12 HF MVE SLT B1
Share one pad
Install R1, R2 & Don't Install TSW1
Install TSW1 & Don't Install R1 & R2
TSW1 Switch #1, 2, 3, 4, 5 and 6 closed (ON)
JTAG
#8 and 7 open
TSW1 Switch #1, 2, 3, 4, 5 and 6 open
NO JTAG
#8 & 7 closed (ON)
PART 1 OF 15
PART 1 OF 15
1
2
5 3
R_RST
1
J
J
T
T
A
A
G
G
+3.3V +3.3V_BUS
R100RR10
0R
Share one pad
NC7SZ08P5X_NL
NC7SZ08P5X_NL
4
U11
U11
DNI
Place R3 in U5
C4
100nF_6.3VC4100nF_6.3V
PERST#_buf (2,16)
TSW1, R1 & R2 are located on the bottom side of the board close to PCIE connector.
SYMBOL LEGEND
DO NOT
DNI
INSTALL
#
ACTIVE
LOW
DIGITAL
GROUND
ANALOG
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
8
7
6
5
4
3
Title
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
2
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Sheet
Sheet
Sheet
of
11 9
of
11 9
of
11 9
GROUND
BUO BRING UP
ONLY
Doc No.
Doc No.
Doc No.
102-B66601-00
102-B66601-00
102-B66601-00
1
Rev Date:
Rev Date:
Rev Date:
50
50
50
www.vinafix.vn
5
4
3
2
1
(2) RV730 PCIE Interface
NOTE: some of the PCIE testpoints will
be available trought via on traces.
PETp0_GFXRp0 (1)
PETn0_GFXRn0 (1)
PETp1_GFXRp1 (1)
PETn1_GFXRn1 (1)
D D
C C
+1.8V
+1.8V
+1.1V
B B
PETp2_GFXRp2 (1)
PETn2_GFXRn2 (1)
PETp3_GFXRp3 (1)
PETn3_GFXRn3 (1)
PETp4_GFXRp4 (1)
PETn4_GFXRn4 (1)
PETp5_GFXRp5 (1)
PETn5_GFXRn5 (1)
PETp6_GFXRp6 (1)
PETn6_GFXRn6 (1)
PETp7_GFXRp7 (1)
PETn7_GFXRn7 (1)
PETp8_GFXRp8 (1)
PETn8_GFXRn8 (1)
PETp9_GFXRp9 (1)
PETn9_GFXRn9 (1)
PETp10_GFXRp10 (1)
PETn10_GFXRn10 (1)
PETp11_GFXRp11 (1)
PETn11_GFXRn11 (1)
PETp12_GFXRp12 (1)
PETn12_GFXRn12 (1)
PETp13_GFXRp13 (1)
PETn13_GFXRn13 (1)
PETp14_GFXRp14 (1)
PETn14_GFXRn14 (1)
PETp15_GFXRp15 (1)
PETn15_GFXRn15 (1)
B22 BLM15BD121SN1 B22 BLM15BD121SN1
B23 26R_600mA B23 26R_600mA
B21 220R_2A B21 220R_2A
+PCIE_PVDD
+PCIE_VDDR
+PCIE_VDDC
1uF_6.3V
1uF_6.3V
4.7uF_6.3V
4.7uF_6.3V
C101
C101
C94
C94
10uF_X6S
10uF_X6S
C98
C98
1uF_6.3V
1uF_6.3V
C95
C95
1uF_6.3V
1uF_6.3V
C90
C90
1uF_6.3V
1uF_6.3V
C51
C51
10uF_X6S
10uF_X6S
C86
C86
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
TP6TP6
TP13TP13
TP14TP14
TP7TP7
TP15TP15
TP8TP8
TP9TP9
TP16TP16
TP17TP17
TP10TP10
TP11TP11
TP19TP19
TP18TP18
TP12TP12
TP20TP20
TP22TP22
TP21TP21
TP23TP23
TP24TP24
TP26TP26
TP25TP25
TP27TP27
PCIE_REFCLKP (1)
PCIE_REFCLKN (1)
PERST#_buf (1,16)
C85
C85
C87
C87
100nF_6.3V
100nF_6.3V
C99
C99
100nF_6.3V
100nF_6.3V
C96
C96
C91
C91
1uF_6.3V
1uF_6.3V
C88
C88
1uF_6.3V
1uF_6.3V
C100
C100
C92
C92
C89
C89
100nF_6.3V
100nF_6.3V
1uF_6.3V
1uF_6.3V
C84
C84
10nF
10nF
C97
C97
C93
C93
U1B
U1B
AA38
PCIE_RX0P
Y37
PCIE_RX0N
Y35
PCIE_RX1P
W36
PCIE_RX1N
W38
PCIE_RX2P
V37
PCIE_RX2N
V35
PCIE_RX3P
U36
PCIE_RX3N
U38
PCIE_RX4P
T37
PCIE_RX4N
T35
PCIE_RX5P
R36
PCIE_RX5N
R38
PCIE_RX6P
P37
PCIE_RX6N
P35
PCIE_RX7P
N36
PCIE_RX7N
N38
PCIE_RX8P
M37
PCIE_RX8N
M35
PCIE_RX9P
L36
PCIE_RX9N
L38
PCIE_RX10P
K37
PCIE_RX10N
K35
PCIE_RX11P
J36
PCIE_RX11N
J38
PCIE_RX12P
H37
PCIE_RX12N
H35
PCIE_RX13P
G36
PCIE_RX13N
G38
PCIE_RX14P
F37
PCIE_RX14N
F35
PCIE_RX15P
E37
PCIE_RX15N
AB35
PCIE_REFCLKP
AA36
PCIE_REFCLKN
AA30
PERSTB
AB37
PCIE_PVDD
AA31
PCIE_VDDR#1
AA32
PCIE_VDDR#2
AA33
PCIE_VDDR#3
AA34
PCIE_VDDR#4
V28
PCIE_VDDR#5
W29
PCIE_VDDR#6
W30
PCIE_VDDR#7
Y31
PCIE_VDDR#8
G30
PCIE_VDDC#1
G31
PCIE_VDDC#2
H29
PCIE_VDDC#3
H30
PCIE_VDDC#4
J29
PCIE_VDDC#5
J30
PCIE_VDDC#6
L28
PCIE_VDDC#7
M28
PCIE_VDDC#8
N28
PCIE_VDDC#9
R28
PCIE_VDDC#10
T28
PCIE_VDDC#11
U28
PCIE_VDDC#12
RV730XT A12 HF MVE SLT B1
RV730XT A12 HF MVE SLT B1
PART 2 OF 15
PART 2 OF 15
P
P
C
C
I
I
E
E
X
X
P
P
R
R
E
E
S
S
S
S
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PCIE_CALRP
PCIE_CALRN
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35
Y33
Y32
W33
W32
U33
U32
U30
U29
T33
T32
T30
T29
P33
P32
P30
P29
N33
N32
N30
N29
L33
L32
L30
L29
K33
K32
J33
J32
K30
K29
H33
H32
Y30
Y29
AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PCIE_CALRP
PCIE_CALRN
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
C11
C11
100nF_6.3V
100nF_6.3V
C13
C13
R22 1.27K R22 1.27K
R24 2.0K R24 2.0K
C12
C12
C14
C14
100nF_6.3V
100nF_6.3V
C15
C15
C16
C16
100nF_6.3V
100nF_6.3V
C17
C17
C18
C18
100nF_6.3V
100nF_6.3V
C19
C19
C20
C20
100nF_6.3V
100nF_6.3V
C21
C21
C22
C22
100nF_6.3V
100nF_6.3V
C23
C23
C24
C24
100nF_6.3V
100nF_6.3V
C25
C25
C26
C26
100nF_6.3V
100nF_6.3V
C27
C27
C28
C28
100nF_6.3V
100nF_6.3V
C29
C29
C30
C30
100nF_6.3V
100nF_6.3V
C31
C31
C32
C32
100nF_6.3V
100nF_6.3V
C33
C33
C34
C34
100nF_6.3V
100nF_6.3V
C35
C35
C36
C36
100nF_6.3V
100nF_6.3V
C37
C37
C38
C38
100nF_6.3V
100nF_6.3V
C39
C39
C40
C40
100nF_6.3V
100nF_6.3V
C41
C41
C42
C42
100nF_6.3V
100nF_6.3V
+PCIE_VDDC
PERp0 (1)
PERn0 (1)
PERp1 (1)
PERn1 (1)
PERp2 (1)
PERn2 (1)
PERp3 (1)
PERn3 (1)
PERp4 (1)
PERn4 (1)
PERp5 (1)
PERn5 (1)
PERp6 (1)
PERn6 (1)
PERp7 (1)
PERn7 (1)
PERp8 (1)
PERn8 (1)
PERp9 (1)
PERn9 (1)
PERp10 (1)
PERn10 (1)
PERp11 (1)
PERn11 (1)
PERp12 (1)
PERn12 (1)
PERp13 (1)
PERn13 (1)
PERp14 (1)
PERn14 (1)
PERp15 (1)
PERn15 (1)
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
5
4
3
2
RH RV730 GDDR3 DP-DP- DVII
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Sheet
Sheet
Sheet
of
21 9
of
21 9
of
21 9
1
Doc No.
Doc No.
Doc No.
Rev Date:
Rev Date:
Rev Date:
50
50
50
102-B66601-00
102-B66601-00
102-B66601-00
www.vinafix.vn
5
(3) RV730 MEM Interface Ch A&B
DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
D D
DQMA_0 (4)
DQMA_1 (4)
DQMA_2 (4)
DQMA_3 (4)
QSA_0 (4)
QSA_1 (4)
QSA_2 (4)
QSA_3 (4)
QSA_0b (4)
QSA_1b (4)
QSA_2b (4)
QSA_3b (4)
C C
B B
ODTA0 (4) ODTB0 (5) ODTB1 (5) ODTA1 (4)
MAA_[14..0] (4)
MAA_BA_[2..0] (4)
DRAM_RST (4,5)
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
CKEA0 (4)
CLKA0 (4)
CLKA0b (4)
CSA0b_0 (4)
CASA0b (4)
RASA0b (4)
WEA0b (4)
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_BA_0
MAA_BA_1
MAA_BA_2
C346
C346
1uF_6.3V
1uF_6.3V
R102
R102
10K
10K
AH11
C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
A32
C32
D23
E22
C34
D29
D25
E20
A34
E30
E26
C20
J21
K21
H27
G27
K24
K27
K20
K23
K26
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H23
J19
J17
H17
H16
U1C
U1C
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQMA_0
DQMA_1
DQMA_2
DQMA_3
QSA_0
QSA_1
QSA_2
QSA_3
QSA_0B
QSA_1B
QSA_2B
QSA_3B
ODTA0
CKEA0
CLKA0
CLKA0B
CSA0B_0
CSA0B_1
CASA0B
RASA0B
WEA0B
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
NC_MAA_13
NC_MAA_14
MAA_BA0
MAA_BA1
MAA_BA2
DRAM_RST
RV730XT A12 HF MVE SLT B1
RV730XT A12 HF MVE SLT B1
DDR2
DDR2
Single or
Single or
PART 3 OF 15
PART 3 OF 15
Diff Strobes
Diff Strobes
DDR3
DDR3
M
M
E
E
M
M
O
O
R
R
Y
Y
I
I
N
N
T
T
E
E
R
R
F
F
A
A
C
C
E
E
Differential Strobes
Differential Strobes
B
B
A
A
N
N
K
K
A
A
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
DQMA_4
DQMA_5
DQMA_6
DQMA_7
GDDR3
GDDR3
Read
Strobes
Read
Strobes
QSA_4B
QSA_5B
QSA_6B
QSA_7B
Write
Strobes
Write
Strobes
CLKA1B
CSA1B_0
CSA1B_1
CASA1B
RASA1B
NC_MEM_CALRP0
NC_MEM_CALRN0
MEM_CALRP1
NC_MEM_CALRN1
NC_MEM_CALRP2
NC_MEM_CALRN2
MVREFDA
MVREFSA
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
C14
A14
E10
D9
E16
QSA_4
E12
QSA_5
J10
QSA_6
D7
QSA_7
C16
C12
J11
F8
G19
ODTA1
J20
CKEA1
J14
CLKA1
H14
M13
K16
K17
K19
L15
WEA1B
M27
L27
M12
N12
AH12
AG12
L18
MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)
L20
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31
MEM_CALRP0
MEM_CALRN0
MEM_CALRP1
MEM_CALRN1
MEM_CALRP2
MEM_CALRN2
MVREFD_A
MVREFS_A
4
DQA1_[31..0] (4) DQA0_[31..0] (4) DQB0_[31..0] (5) DQB1_[31..0] (5)
DQMA_4 (4)
DQMA_5 (4)
DQMA_6 (4)
DQMA_7 (4)
QSA_4 (4)
QSA_5 (4)
QSA_6 (4)
QSA_7 (4)
QSA_4b (4)
QSA_5b (4)
QSA_6b (4)
QSA_7b (4)
CKEA1 (4)
CLKA1 (4)
CLKA1b (4)
CSA1b_0 (4)
CASA1b (4)
RASA1b (4)
DNI
WEA1b (4)
R118 243R R118 243R
C300
C300
1uF_6.3V
1uF_6.3V
C305
C305
1uF_6.3V
1uF_6.3V
100R
100R
100R
100R
R122
R122
R125
R125
100R
100R
R126
R126
R128
R128
100R
100R
+MVDD
+MVDD
1%
1%
+MVDD
1%
3
U1D
U1D
DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31
DQMB_0 (5)
DQMB_1 (5)
DQMB_2 (5)
DQMB_3 (5)
QSB_0 (5)
QSB_1 (5)
QSB_2 (5)
QSB_3 (5)
QSB_0b (5)
QSB_1b (5)
QSB_2b (5)
QSB_3b (5)
CKEB0 (5)
CLKB0 (5)
CLKB0b (5)
CSB0b_0 (5)
CASB0b (5)
RASB0b (5)
WEB0b (5)
MAB_[14..0] (5)
MAB_BA_[2..0] (5)
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_BA_0
MAB_BA_1
MAB_BA_2
C5
DQB_0
C3
DQB_1
E3
DQB_2
E1
DQB_3
F1
DQB_4
F3
DQB_5
F5
DQB_6
G4
DQB_7
H5
DQB_8
H6
DQB_9
J4
DQB_10
K6
DQB_11
K5
DQB_12
L4
DQB_13
M6
DQB_14
M1
DQB_15
M3
DQB_16
M5
DQB_17
N4
DQB_18
P6
DQB_19
P5
DQB_20
R4
DQB_21
T6
DQB_22
T1
DQB_23
U4
DQB_24
V6
DQB_25
V1
DQB_26
V3
DQB_27
Y6
DQB_28
Y1
DQB_29
Y3
DQB_30
Y5
DQB_31
H3
DQMB_0
H1
DQMB_1
T3
DQMB_2
T5
DQMB_3
F6
QSB_0
K3
QSB_1
P3
QSB_2
V5
QSB_3
G7
QSB_0B
K1
QSB_1B
P1
QSB_2B
W4
QSB_3B
T7
ODTB0
U10
CKEB0
L9
CLKB0
L8
CLKB0B
P10
CSB0B_0
L10
CSB0B_1
W10
CASB0B
T10
RASB0B
N10
WEB0B
P8
MAB_0
T9
MAB_1
P9
MAB_2
N7
MAB_3
N8
MAB_4
N9
MAB_5
U9
MAB_6
U8
MAB_7
Y9
MAB_8
W9
MAB_9
AC8
MAB_10
AC9
MAB_11
AA7
MAB_12
T8
NC_MAB_13
W8
NC_MAB_14
Y8
MAB_BA0
AA9
MAB_BA1
AA8
MAB_BA2
RV730XT A12 HF MVE SLT B1
RV730XT A12 HF MVE SLT B1
DDR2
DDR2
Single or
Diff Strobes
Single or
Diff Strobes
PART 4 OF 15
PART 4 OF 15
M
M
E
E
M
M
O
O
R
R
Y
Y
I
I
N
N
T
T
E
E
R
R
F
F
A
A
C
C
E
E
DDR3 GDDR3
DDR3 GDDR3
Differential Strobes
Differential Strobes
B
B
A
A
N
N
K
K
B
B
2
DQB1_0
AA4
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63
DQMB_4
DQMB_5
DQMB_6
DQMB_7
QSB_4
QSB_5
QSB_6
QSB_7
Read
Strobes
Read
Strobes
QSB_4B
QSB_5B
QSB_6B
QSB_7B
Write
Strobes
Write
Strobes
ODTB1
CKEB1
CLKB1
CLKB1B
CSB1B_0
CSB1B_1
CASB1B
RASB1B
WEB1B
MVREFDB
MVREFSB
DQB1_1
AB6
DQB1_2
AB1
DQB1_3
AB3
DQB1_4
AD6
DQB1_5
AD1
DQB1_6
AD3
DQB1_7
AD5
DQB1_8
AF1
DQB1_9
AF3
DQB1_10
AF6
DQB1_11
AG4
DQB1_12
AH5
DQB1_13
AH6
DQB1_14
AJ4
DQB1_15
AK3
DQB1_16
AF8
DQB1_17
AF9
DQB1_18
AG8
DQB1_19
AG7
DQB1_20
AK9
DQB1_21
AL7
DQB1_22
AM8
DQB1_23
AM7
DQB1_24
AK1
DQB1_25
AL4
DQB1_26
AM6
DQB1_27
AM1
DQB1_28
AN4
DQB1_29
AP3
DQB1_30
AP1
DQB1_31
AP5
AE4
AF5
AK6
AK5
AB5
AH1
AJ9
AM5
AC4
AH3
AJ8
AM3
W7
AA11
AD8
AD7
AD10
AC10
AA10
Y10
AB11
MVREFD_B
Y12
MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)
MVREFS_B
AA12
DNI
DNI DNI
CLKB1b (5)
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
DQMB_4 (5)
DQMB_5 (5)
DQMB_6 (5)
DQMB_7 (5)
QSB_4 (5)
QSB_5 (5)
QSB_6 (5)
QSB_7 (5)
QSB_4b (5)
QSB_5b (5)
QSB_6b (5)
QSB_7b (5)
CKEB1 (5)
CLKB1 (5)
CSB1b_0 (5)
CASB1b (5)
RASB1b (5)
WEB1b (5)
100R
100R
C298
C298
100R
100R
C307
C307
R123
R123
R124
R124
100R
100R
R127
R127
R129
R129
100R
100R
+MVDD
1%
1%
+MVDD
1% 1%
1%
1
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
5
4
3
2
Title
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Sheet
Sheet
Sheet
of
31 9
of
31 9
of
31 9
1
Doc No.
Doc No.
Doc No.
Rev Date:
Rev Date:
Rev Date:
50
50
50
102-B66601-00
102-B66601-00
102-B66601-00
www.vinafix.vn
5
4
3
2
1
(4) DDR3 Memory Channel A
U4
C1269 1uF_6.3V C1269 1uF_6.3V
C1287 1uF_6.3V C1287 1uF_6.3V
U4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM 512MB DDR3
SDRAM 512MB DDR3
23E42387SD11
23E42387SD11
+MVDD
R203
R203
4.99K
4.99K
R204
R204
4.99K
4.99K
+MVDD
R211
R211
4.99K
4.99K
R212
R212
4.99K
4.99K
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VREFC_U4
VREFD_U4 VREFD_U3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
C438
C438
100nF
100nF
C487
C487
100nF
100nF
U5
CLKA1
CLKA1b
C1302 1uF_6.3V C1302 1uF_6.3V
C1303 1uF_6.3V C1303 1uF_6.3V
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
+MVDD
+MVDD
C1304 1uF_6.3V C1304 1uF_6.3V
U5
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
23E42387SD11
23E42387SD11
C1305 1uF_6.3V C1305 1uF_6.3V
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM 512MB DDR3
SDRAM 512MB DDR3
R205
R205
4.99K
4.99K
VREFC_U5
R206
R206
4.99K
4.99K
R213
R213
4.99K
4.99K
VREFD_U5
R214
R214
4.99K
4.99K
C1306 1uF_6.3V C1306 1uF_6.3V
C1315 1uF_6.3V C1315 1uF_6.3V
C1307 1uF_6.3V C1307 1uF_6.3V
C1308 1uF_6.3V C1308 1uF_6.3V
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
C463
C463
100nF
100nF
C488
C488
100nF
100nF
C1316 1uF_6.3V C1316 1uF_6.3V
C1317 1uF_6.3V C1317 1uF_6.3V
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQA1_26
DQA1_28
DQA1_24
DQA1_29
DQA1_25
DQA1_31
DQA1_27
DQA1_30
DQA1_21
DQA1_19
DQA1_20
DQA1_18
DQA1_22
DQA1_17
DQA1_23
DQA1_16
C1318 1uF_6.3V C1318 1uF_6.3V
+MVDD +MVDD +MVDD +MVDD
C1239 1uF_6.3V C1239 1uF_6.3V
C1240 1uF_6.3V C1240 1uF_6.3V
DQA1_[31..0] (3)
MAA_[14..0] (3)
DQA1_[31..0] (3) DQA1_[31..0] (3)
MAA_BA_[2..0] (3)
Should be 240
Ohms +-1%
C1245 1uF_6.3V C1245 1uF_6.3V
C1242 1uF_6.3V C1242 1uF_6.3V
C1244 1uF_6.3V C1244 1uF_6.3V
C1243 1uF_6.3V C1243 1uF_6.3V
C1241 1uF_6.3V C1241 1uF_6.3V
VREFC_U6
VREFD_U6 VREFD_U3
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_BA_0
MAA_BA_1
MAA_BA_2
CKEA1 (3)
ODTA1 (3)
CSA1b_0 (3)
RASA1b (3)
CASA1b (3)
WEA1b (3)
QSA_5 (3)
QSA_4 (3)
DQMA_5 (3)
DQMA_4 (3)
QSA_5b (3)
QSA_4b (3)
DRAM_RST (3,5)
R220
R220
243R
243R
CLKA0 (3)
CLKA0b (3)
CLKA1 (3)
CLKA1b (3)
C1292 1uF_6.3V C1292 1uF_6.3V
C1231 1uF_6.3V C1231 1uF_6.3V
DQA0_[31..0] (3)
DQA0_[31..0] (3)
C1232 1uF_6.3V C1232 1uF_6.3V
C1234 1uF_6.3V C1234 1uF_6.3V
MAA_[14..0] (3)
MAA_BA_[2..0] (3)
R221
R221
56R
56R
402
R222
R222
56R
56R
402
R223
R223
56R
56R
402
R224
R224
56R
56R
402
C1546 1uF_6.3V C1546 1uF_6.3V
Should be 240
Ohms +-1%
C1341 1uF_6.3V C1341 1uF_6.3V
C1547 1uF_6.3V C1547 1uF_6.3V
DQA0_8
E3
DQA0_15
F7
DQA0_10
F2
DQA0_12
F8
DQA0_9
H3
DQA0_14
H8
DQA0_11
G2
DQA0_13
H7
DQA0_30
D7
DQA0_26
C3
DQA0_31
C8
DQA0_25
C2
DQA0_28
A7
DQA0_27
A2
DQA0_29
B8
DQA0_24
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+MVDD
C1291 1uF_6.3V C1291 1uF_6.3V
ODTA1 (3)
CSA1b_0 (3)
RASA1b (3)
CASA1b (3)
WEA1b (3)
QSA_7 (3)
QSA_6 (3)
DQMA_7 (3)
DQMA_6 (3)
QSA_7b (3)
QSA_6b (3)
DRAM_RST (3,5)
C499
C499
10nF
10nF
402
C500
C500
10nF
10nF
402
C1329 1uF_6.3V C1329 1uF_6.3V
C1299 1uF_6.3V C1299 1uF_6.3V
VREFC_U5
VREFD_U5
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
C1300 1uF_6.3V C1300 1uF_6.3V
C1301 1uF_6.3V C1301 1uF_6.3V
MAA_BA_0
MAA_BA_1
MAA_BA_2
R219
R219
243R
243R
U3
C1260 1uF_6.3V C1260 1uF_6.3V
C1261 1uF_6.3V C1261 1uF_6.3V
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
+MVDD
+MVDD
C1262 1uF_6.3V C1262 1uF_6.3V
U3
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
23E42387SD11
23E42387SD11
C1263 1uF_6.3V C1263 1uF_6.3V
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM 512MB DDR3
SDRAM 512MB DDR3
R201
R201
4.99K
4.99K
VREFC_U3
C413
C413
R202
R202
100nF
100nF
4.99K
4.99K
R209
R209
4.99K
4.99K
C486
C486
R210
R210
100nF
100nF
4.99K
4.99K
C1265 1uF_6.3V C1265 1uF_6.3V
C1543 1uF_6.3V C1543 1uF_6.3V
C1264 1uF_6.3V C1264 1uF_6.3V
C1266 1uF_6.3V C1266 1uF_6.3V
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
C1544 1uF_6.3V C1544 1uF_6.3V
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
C1270 1uF_6.3V C1270 1uF_6.3V
DQA0_20
DQA0_19
DQA0_22
DQA0_18
DQA0_21
DQA0_16
DQA0_23
DQA0_17
DQA0_2
DQA0_3
DQA0_0
DQA0_7
DQA0_4
DQA0_6
DQA0_1
DQA0_5
C1337 1uF_6.3V C1337 1uF_6.3V
C1338 1uF_6.3V C1338 1uF_6.3V
C1346 1uF_6.3V C1346 1uF_6.3V
MAA_[14..0] (3)
D D
MAA_BA_[2..0] (3)
C C
Should be 240
Ohms +-1%
B B
VREFC_U3
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_BA_0
MAA_BA_1
MAA_BA_2
CLKA0
CLKA0b
CKEA0 (3) CKEA1 (3)
ODTA0 (3)
CSA0b_0 (3)
RASA0b (3)
CASA0b (3)
WEA0b (3)
QSA_2 (3)
QSA_0 (3)
DQMA_2 (3)
DQMA_0 (3)
QSA_2b (3)
QSA_0b (3)
DRAM_RST (3,5)
R217
R217
243R
243R
+MVDD
C1259 1uF_6.3V C1259 1uF_6.3V
C1347 1uF_6.3V C1347 1uF_6.3V
C1254 1uF_6.3V C1254 1uF_6.3V
MAA_BA_[2..0] (3)
C1278 1uF_6.3V C1278 1uF_6.3V
MAA_[14..0] (3)
C1279 1uF_6.3V C1279 1uF_6.3V
DQA0_[31..0] (3)
DQA0_[31..0] (3)
CKEA0 (3)
ODTA0 (3)
CSA0b_0 (3)
RASA0b (3)
CASA0b (3)
WEA0b (3)
QSA_1 (3)
QSA_3 (3)
DQMA_1 (3)
DQMA_3 (3)
QSA_1b (3)
QSA_3b (3)
DRAM_RST (3,5)
Should be 240
Ohms +-1%
C1255 1uF_6.3V C1255 1uF_6.3V
C1281 1uF_6.3V C1281 1uF_6.3V
C1282 1uF_6.3V C1282 1uF_6.3V
C1283 1uF_6.3V C1283 1uF_6.3V
VREFC_U4
VREFD_U4
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_BA_0
MAA_BA_1
MAA_BA_2
CLKA0
CLKA0b
R218
R218
243R
243R
C1284 1uF_6.3V C1284 1uF_6.3V
CLKA1
CLKA1b
+MVDD
U6
U6
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM 512MB DDR3
SDRAM 512MB DDR3
23E42387SD11
23E42387SD11
+MVDD
R215
R215
4.99K
4.99K
VREFD_U6
R216
R216
4.99K
4.99K
R207
R207
4.99K
4.99K
R208
R208
4.99K
4.99K
VREFC_U6
C489
C489
100nF
100nF
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
C448
C448
100nF
100nF
DQA1_12
E3
DQA1_9
F7
DQA1_13
F2
DQA1_11
F8
DQA1_15
H3
DQA1_8
H8
DQA1_14
G2
DQA1_10
H7
DQA1_3
D7
DQA1_4
C3
DQA1_0
C8
DQA1_7
C2
DQA1_2
A7
DQA1_6
A2
DQA1_1
B8
DQA1_5
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQA1_[31..0] (3)
A A
+MVDD
C1253 100nF_6.3V C1253 100nF_6.3V
C1545 100nF_6.3V C1545 100nF_6.3V
C1326 100nF_6.3V C1326 100nF_6.3V
C1256 100nF_6.3V C1256 100nF_6.3V
C1267 100nF_6.3V C1267 100nF_6.3V
5
C1280 100nF_6.3V C1280 100nF_6.3V
C1268 100nF_6.3V C1268 100nF_6.3V
C1348 100nF_6.3V C1348 100nF_6.3V
C1286 100nF_6.3V C1286 100nF_6.3V
+MVDD
C1334 10uF C1334 10uF
C1335 10uF C1335 10uF
C1336 10uF C1336 10uF
C1339 10uF C1339 10uF
C1350 10uF C1350 10uF
C1340 10uF C1340 10uF
4
+MVDD
C1290 100nF_6.3V C1290 100nF_6.3V
C1289 100nF_6.3V C1289 100nF_6.3V
C1230 100nF_6.3V C1230 100nF_6.3V
C1229 100nF_6.3V C1229 100nF_6.3V
C1233 100nF_6.3V C1233 100nF_6.3V
C1235 100nF_6.3V C1235 100nF_6.3V
C1328 100nF_6.3V C1328 100nF_6.3V
C1324 100nF_6.3V C1324 100nF_6.3V
3
+MVDD
C1359 10uF C1359 10uF
C1321 10uF C1321 10uF
C1322 10uF C1322 10uF
C1354 10uF C1354 10uF
C1323 10uF C1323 10uF
C1353 10uF C1353 10uF
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
2
RH RV730 GDDR3 DP-DP- DVII
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Sheet
Sheet
Sheet
of
41 9
of
41 9
of
41 9
1
Doc No.
Doc No.
Doc No.
Rev Date:
Rev Date:
Rev Date:
50
50
50
102-B66601-00
102-B66601-00
102-B66601-00
www.vinafix.vn
5
4
3
2
1
(5) DDR3 Memory Channel B
U7
VREFC_U7
MAB_[14..0] (3)
D D
MAB_BA_[2..0] (3)
C C
Should be 240
Ohms +-1%
B B
VREFD_U7
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_BA_0
MAB_BA_1
MAB_BA_2
CLKB0
CLKB0b
ODTB0 (3)
CSB0b_0 (3)
RASB0b (3)
CASB0b (3)
WEB0b (3)
QSB_1 (3)
DQMB_1 (3)
DQMB_3 (3)
QSB_1b (3)
QSB_3b (3)
DRAM_RST (3,4)
R317
R317
243R
243R
U7
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM 512MB DDR3
SDRAM 512MB DDR3
23E42387SD11
23E42387SD11
+MVDD
+MVDD
R301
R301
4.99K
4.99K
VREFC_U7
R302
R302
4.99K
4.99K
R309
R309
4.99K
4.99K
VREFD_U7
R310
R310
4.99K
4.99K
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
C513
C513
100nF
100nF
C588
C588
100nF
100nF
DQB0_9
E3
DQB0_11
F7
DQB0_12
F2
DQB0_14
F8
DQB0_8
H3
DQB0_15
H8
DQB0_10
G2
DQB0_13
H7
DQB0_31
D7
DQB0_25
C3
DQB0_28
C8
DQB0_27
C2
DQB0_29
A7
DQB0_26
A2
DQB0_30
B8
DQB0_24
A3
+MVDD +MVDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQB0_[31..0] (3)
MAB_[14..0] (3)
DQB0_[31..0] (3)
MAB_BA_[2..0] (3)
Should be 240
Ohms +-1%
VREFC_U8
VREFD_U8
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_BA_0
MAB_BA_1
MAB_BA_2
CLKB0
CLKB0b
ODTB0 (3)
CSB0b_0 (3)
RASB0b (3)
CASB0b (3)
WEB0b (3)
QSB_2 (3)
QSB_0 (3) QSB_3 (3)
DQMB_2 (3)
DQMB_0 (3)
QSB_2b (3)
QSB_0b (3)
DRAM_RST (3,4)
R318
R318
243R
243R
U8
U8
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM 512MB DDR3
SDRAM 512MB DDR3
23E42387SD11
23E42387SD11
+MVDD
R303
R303
4.99K
4.99K
R304
R304
4.99K
4.99K
+MVDD
R311
R311
4.99K
4.99K
R312
R312
4.99K
4.99K
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VREFC_U8
VREFD_U8
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
C538
C538
100nF
100nF
C589
C589
100nF
100nF
U9
CLKB1
CLKB1b
U9
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM 512MB DDR3
SDRAM 512MB DDR3
23E42387SD11
23E42387SD11
+MVDD
+MVDD
R305
R305
4.99K
4.99K
R306
R306
4.99K
4.99K
R313
R313
4.99K
4.99K
R314
R314
4.99K
4.99K
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VREFC_U9
VREFD_U9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
C563
C563
100nF
100nF
C590
C590
100nF
100nF
DQB1_12
E3
DQB1_9
F7
DQB1_13
F2
DQB1_11
F8
DQB1_15
H3
DQB1_8
H8
DQB1_14
G2
DQB1_10
H7
DQB1_3
D7
DQB1_4
C3
DQB1_0
C8
DQB1_7
C2
DQB1_2
A7
DQB1_6
A2
DQB1_1
B8
DQB1_5
A3
+MVDD +MVDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQB0_20
E3
DQB0_19
F7
DQB0_22
F2
DQB0_18
F8
DQB0_21
H3
DQB0_16
H8
DQB0_23
G2
DQB0_17
H7
DQB0_2
D7
DQB0_4
C3
DQB0_0
C8
DQB0_7
C2
DQB0_3
A7
DQB0_6
A2
DQB0_1
B8
DQB0_5
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
CLKB0 (3)
CLKB0b (3)
CLKB1 (3)
CLKB1b (3)
MAB_[14..0] (3)
DQB0_[31..0] (3)
MAB_BA_[2..0] (3)
Should be 240
Ohms +-1%
R321
R321
56R
56R
402
R322
R322
56R
56R
402 402
R323
R323
56R
56R
402
R324
R324
56R
56R
402 402
VREFC_U9
VREFD_U9
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_BA_0
MAB_BA_1
MAB_BA_2
CKEB1 (3) CKEB0 (3) CKEB0 (3)
ODTB1 (3)
CSB1b_0 (3)
RASB1b (3)
CASB1b (3)
WEB1b (3)
QSB_5 (3)
QSB_4 (3)
DQMB_5 (3)
DQMB_4 (3)
QSB_5b (3)
QSB_4b (3)
DRAM_RST (3,4)
R319
R319
243R
243R
C599
C599
10nF
10nF
C600
C600
10nF
10nF
DQB1_[31..0] (3) DQB0_[31..0] (3)
MAB_[14..0] (3)
DQB1_[31..0] (3)
MAB_BA_[2..0] (3)
Should be 240
Ohms +-1%
VREFC_U10
VREFD_U10
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_BA_0
MAB_BA_1
MAB_BA_2
CKEB1 (3)
ODTB1 (3)
CSB1b_0 (3)
RASB1b (3)
CASB1b (3)
WEB1b (3)
QSB_7 (3)
QSB_6 (3)
DQMB_7 (3)
DQMB_6 (3)
QSB_7b (3)
QSB_6b (3)
DRAM_RST (3,4)
R320
R320
243R
243R
CLKB1
CLKB1b
+MVDD
U10
U10
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM 512MB DDR3
SDRAM 512MB DDR3
23E42387SD11
23E42387SD11
+MVDD
R307
R307
4.99K
4.99K
R308
R308
4.99K
4.99K
R315
R315
4.99K
4.99K
VREFD_U10
R316
R316
4.99K
4.99K
VDD#D9
VDD#G7
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VREFC_U10
C587
C587
100nF
100nF
C591
C591
100nF
100nF
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#K2
VDD#K8
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQB1_24
E3
DQB1_28
F7
DQB1_25
F2
DQB1_29
F8
DQB1_27
H3
DQB1_31
H8
DQB1_26
G2
DQB1_30
H7
DQB1_20
D7
DQB1_18
C3
DQB1_22
C8
DQB1_16
C2
DQB1_21
A7
DQB1_17
A2
DQB1_23
B8
DQB1_19
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQB1_[31..0] (3)
DQB1_[31..0] (3)
+MVDD +MVDD
C1428 1uF_6.3V C1428 1uF_6.3V
C1426 1uF_6.3V C1426 1uF_6.3V
C1427 1uF_6.3V C1427 1uF_6.3V
C1505 100nF_6.3V C1505 100nF_6.3V
C1449 100nF_6.3V C1449 100nF_6.3V
C1429 1uF_6.3V C1429 1uF_6.3V
C1501 100nF_6.3V C1501 100nF_6.3V
C1424 100nF_6.3V C1424 100nF_6.3V
C1519 1uF_6.3V C1519 1uF_6.3V
C1518 1uF_6.3V C1518 1uF_6.3V
C1425 1uF_6.3V C1425 1uF_6.3V
A A
+MVDD +MVDD +MVDD
C1452 100nF_6.3V C1452 100nF_6.3V
C1421 100nF_6.3V C1421 100nF_6.3V
C1422 100nF_6.3V C1422 100nF_6.3V
5
C1446 100nF_6.3V C1446 100nF_6.3V
C1520 100nF_6.3V C1520 100nF_6.3V
C1433 1uF_6.3V C1433 1uF_6.3V
C1522 1uF_6.3V C1522 1uF_6.3V
C1523 1uF_6.3V C1523 1uF_6.3V
C1560 1uF_6.3V C1560 1uF_6.3V
C1557 1uF_6.3V C1557 1uF_6.3V
C1558 1uF_6.3V C1558 1uF_6.3V
C1447 1uF_6.3V C1447 1uF_6.3V
C1448 1uF_6.3V C1448 1uF_6.3V
C1432 1uF_6.3V C1432 1uF_6.3V
C1431 1uF_6.3V C1431 1uF_6.3V
C1430 1uF_6.3V C1430 1uF_6.3V
C1450 1uF_6.3V C1450 1uF_6.3V
C1521 10uF C1521 10uF
4
C1420 1uF_6.3V C1420 1uF_6.3V
C1451 1uF_6.3V C1451 1uF_6.3V
C1535 10uF C1535 10uF
C1498 10uF C1498 10uF
C1453 1uF_6.3V C1453 1uF_6.3V
C1512 10uF C1512 10uF
C1502 1uF_6.3V C1502 1uF_6.3V
C1454 1uF_6.3V C1454 1uF_6.3V
C1524 10uF C1524 10uF
C1525 10uF C1525 10uF
C1469 1uF_6.3V C1469 1uF_6.3V
C1468 1uF_6.3V C1468 1uF_6.3V
C1481 100nF_6.3V C1481 100nF_6.3V
C1405 100nF_6.3V C1405 100nF_6.3V
C1471 1uF_6.3V C1471 1uF_6.3V
C1470 1uF_6.3V C1470 1uF_6.3V
C1474 100nF_6.3V C1474 100nF_6.3V
C1461 100nF_6.3V C1461 100nF_6.3V
C1473 1uF_6.3V C1473 1uF_6.3V
C1472 1uF_6.3V C1472 1uF_6.3V
C1392 100nF_6.3V C1392 100nF_6.3V
C1464 100nF_6.3V C1464 100nF_6.3V
3
C1459 1uF_6.3V C1459 1uF_6.3V
C1475 1uF_6.3V C1475 1uF_6.3V
C1465 100nF_6.3V C1465 100nF_6.3V
C1393 100nF_6.3V C1393 100nF_6.3V
C1527 1uF_6.3V C1527 1uF_6.3V
C1526 1uF_6.3V C1526 1uF_6.3V
C1484 100nF_6.3V C1484 100nF_6.3V
C1552 1uF_6.3V C1552 1uF_6.3V
C1553 1uF_6.3V C1553 1uF_6.3V
C1403 1uF_6.3V C1403 1uF_6.3V
C1554 1uF_6.3V C1554 1uF_6.3V
C1404 1uF_6.3V C1404 1uF_6.3V
C1460 1uF_6.3V C1460 1uF_6.3V
C1406 1uF_6.3V C1406 1uF_6.3V
C1407 1uF_6.3V C1407 1uF_6.3V
C1408 1uF_6.3V C1408 1uF_6.3V
C1409 1uF_6.3V C1409 1uF_6.3V
C1549 1uF_6.3V C1549 1uF_6.3V
C1410 1uF_6.3V C1410 1uF_6.3V
C1550 1uF_6.3V C1550 1uF_6.3V
+MVDD
C1551 1uF_6.3V C1551 1uF_6.3V
C1490 10uF C1490 10uF
C1395 1uF_6.3V C1395 1uF_6.3V
C1533 10uF C1533 10uF
2
C1482 1uF_6.3V C1482 1uF_6.3V
C1517 10uF C1517 10uF
C1485 1uF_6.3V C1485 1uF_6.3V
C1483 1uF_6.3V C1483 1uF_6.3V
C1462 1uF_6.3V C1462 1uF_6.3V
C1529 10uF C1529 10uF
C1488 10uF C1488 10uF
C1489 10uF C1489 10uF
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Sheet
Sheet
Sheet
of
51 9
of
51 9
of
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
51 9
1
Doc No.
Doc No.
Doc No.
Rev Date:
Rev Date:
Rev Date:
50
50
50
102-B66601-00
102-B66601-00
102-B66601-00
www.vinafix.vn
5
(06) RV730 GPIOs Strap CF XTAL
U1E
+3.3V
C333
C333
C334
100nF_6.3V
100nF_6.3V
SCL (17)
SDA (17)
DNI
C334
100nF_6.3V
100nF_6.3V
SCL
SDA
DDC6CLK
DDC6DATA
PWR_GOOD_R
GPIO_22_ROMCSb_R
GPIO_8_R
C332
C332
100nF_6.3V
100nF_6.3V
D D
DDC6CLK (17)
DDC6DATA (17)
+3.3V_BUS +1.8V
R899
R899
5.1K
5.1K
PWR_GOOD (1,14,15,16)
C C
DNI
U1E
AF23
VDDR3#1
AF24
VDDR3#2
AG23
VDDR3#3
AG24
VDDR3#4
AK26
SCL
AJ26
SDA
AJ30
DDC6CLK
AJ31
DDC6DATA
AF28
RSVD#1
AF35
RSVD#2
AG28
RSVD#3
AG36
RSVD#4
AJ27
RSVD#5
AK27
RSVD#6
AL31
RSVD#7
AN36
RSVD#8
AP37
RSVD#9
AJ21
NC#1
AK21
NC#2
AH16
NC_PWRGOOD
RV730XT A12 HF MVE SLT B1
RV730XT A12 HF MVE SLT B1
R180
R180
10K
10K
4
PART 5 OF 15
PART 5 OF 15
G
G
P
P
I
I
O
O
GPIO_17_THERMAL_INT
U2
U2
1
CE#
VCC
2
SO
HOLD#
3
WP#
SCK
GND4SI
PM25LV512A-100SCE
PM25LV512A-100SCE
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6_TACH
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
GENERICF
GENERICG
HPD1
+3.3V
8
7
GPIO_10_R
6
GPIO_9_R
5
AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24
AK24
C342
C342
100nF_6.3V
100nF_6.3V
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5
GPIO_6_TACH
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
HPD2
PWRCNTL_0
GPIO_16
GPIO_17_ThermINT
GPIO_19_CTF
PWRCNTL_1
GPIO_21
GPIO_22_ROMCSb
GENERICA
GENERICB
GENERICC
GENERICD
HPD1
BIOS1
BIOS1
BIOS
BIOS
113-B339XX-XXX
113-B339XX-XXX
VIDEO BIOS
FIRMWARE
RP1C 33R RP1C 33R
6 3
RP1B 33R RP1B 33R
7 2
RP1A 33R RP1A 33R
8 1
5 4
GPIO_8_R
GPIO_9_R
GPIO_10_R
GPIO_22_ROMCSb_R
RP1D 33R RP1D 33R
3
GPIO_0 (17)
GPIO_1 (17)
GPIO_2 (17)
GPIO_3_SMBDATA (1)
GPIO_4_SMBCLK (1)
GPIO_6_TACH (16,17)
GPIO_7 (17)
GPIO_8_R (17)
GPIO_9_R (17)
GPIO_10_R (17)
HPD2 (9)
PWRCNTL_0 (15)
GPIO_17_ThermINT (17)
GPIO_19_CTF (16)
PWRCNTL_1 (15)
GPIO_22_ROMCSb_R (17)
GENERICA (7,17)
HPD1 (8)
2
R149 10K R149 10K
R152 10K R152 10K
R158 10K R158 10K
R161 10K R161 10K
R165 10K R165 10K
R176 10K R176 10K
PIN BASED STRAPS
V2SYNC (7)
V2SYNC
GPIO_9_R
GPIO_0
GPIO_0 (17)
GPIO_1
GPIO_1 (17)
GPIO_2
GPIO_2 (17)
GPIO_13
GPIO_12
GPIO_11
V1SYNC (7)
V1SYNC
H1SYNC (7)
H1SYNC
GPIO_8_R
GPIO_5
GPIO_16
H2SYNC (7)
H2SYNC
GPIO_7
GPIO_7 (17)
+3.3V
DNI
DNI
DNI
DNI
DNI
DNI
DNI
BUO
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
1
VIP_DEVICE_STRAP_EN
0: No slave VIP host port devices reporting presence during reset (use
for configurations without video-in)
1:VIP host port devices present (use if Theater is populated)
VGA DISABLE : 1 for disable (set to 0 for normal operation)
GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)
0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)
GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable)
0 : Default. (Driver Controlled Gen2)
1 : Strap Controlled Gen2
GPIO(13,12,11) - CONFIG[2..0]
100 - 512Kbit M25P05A (ST)
101 - 1Mbit M25P10A (ST)
CONFIG[2]
101 - 2Mbit M25P20 (ST)
101 - 4Mbit M25P40 (ST)
CONFIG[1]
101 - 8Mbit M25P80 (ST)
100 - 512Kbit Pm25LV512 (Chingis)
CONFIG[0]
101 - 1Mbit Pm25LV010 (Chingis)
AUD[0] : AUD strap bit 0
AUD[1] : AUD strap bit 1
BIF_CLK_PM_EN
0 - Disable CLKREQ# power management capability
1 - Enable CLKREQ# power management capability
[GPIO_5: GPIO_16]
Quimonda [0:0]
Hynix [0:1]
Samsung [1:0]
RESERVED :Internal use only. Other logic must not affect this signal
during RESET.
ATI Board Feature I MEMORY CONFIG
1 - NTSC TVO 0 - PAL TVO TV OUT STANDARD
PN 2280007900G for 1Mbit (PM25LV010A-100SCE)
GPIO_21
CrossFire Card-Edge
U1F
+1.8V
B113 BLM15BD121SN1 B113 BLM15BD121SN1
B B
+1.8V
+1.8V
B110 BLM15BD121SN1 B110 BLM15BD121SN1
NS6 NS_VIA NS6 NS_VIA
1 2
+1.1V
B109 BLM15BD121SN1 B109 BLM15BD121SN1
+1.8V
A A
NS7 NS_VIA NS7 NS_VIA
+1.1V
+VDDC
B107 BLM15BD121SN1 B107 BLM15BD121SN1
+1.8V +MPV18
+DPLL_PVDD
+DPLL_VDDC
1 2
5
+SPV18
+SPV10
C327
C327
1uF_6.3V
1uF_6.3V
C325
C325
10uF_X6S
10uF_X6S
VDDR4_5
C335
C335
C326
C326
1uF_6.3V
1uF_6.3V
100nF_6.3V
100nF_6.3V
C331
C331
C329
C329
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
TP84 35mil TP84 35mil
TP85 35mil TP85 35mil
TP86 35mil TP86 35mil
TP87 35mil TP87 35mil
TP88 35mil TP88 35mil
TP89 35mil TP89 35mil
R147 221R R147 221R
R151 110R R151 110R
C328 100nF_6.3V C328 100nF_6.3V
C148
C148
C147
C147
1uF_6.3V
1uF_6.3V
10uF_X6S
10uF_X6S
GND_DPLL_PVSS
C145
C145
1uF_6.3V
1uF_6.3V
GND_SPVSS
C150
C150
1uF_6.3V
1uF_6.3V
C330
C330
100nF_6.3V
100nF_6.3V
DVOCLK
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVP_MVP_CNTL_0
DVP_MVP_CNTL_1
VREFG
C149
C149
100nF_6.3V
100nF_6.3V
C146
C146
100nF_6.3V
100nF_6.3V
C151
C151
100nF_6.3V
100nF_6.3V
U1F
AD12
VDDR4#1
AF11
VDDR4#2
AF12
VDDR4#3
AG11
VDDR4#4
AF13
VDDR5#1
AF15
VDDR5#2
AG13
VDDR5#3
AG15
VDDR5#4
AR1
DVPCLK
AP8
DVPCNTL_0
AW8
DVPCNTL_1
AR3
DVPCNTL_2
AR8
DVPCNTL_MVP_0
AU8
DVPCNTL_MVP_1
AH13
VREFG
RV730XT A12 HF MVE SLT B1
RV730XT A12 HF MVE SLT B1
U1G
U1G
AM32
DPLL_PVDD
AN32
DPLL_PVSS
AN31
DPLL_VDDC
AM10
NC_SPV18
AN10
SPVSS
AN9
SPV10
H7
NC_MPV18#1
H8
NC_MPV18#2
RV730XT A12 HF MVE SLT B1
RV730XT A12 HF MVE SLT B1
PART 6 OF 15
PART 6 OF 15
PART 7 OF 15
PART 7 OF 15
P
P
L
L
L
L
S
S
X
X
T
T
A
A
L
L
4
D
D
V
V
P
P
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
XTALOUT
XTALIN
CLKTESTA
CLKTESTB
AU34
AV33
AK10
AL10
DVPDATA_0
AU1
DVPDATA_1
AU3
DVPDATA_2
AW3
DVPDATA_3
AP6
DVPDATA_4
AW5
DVPDATA_5
AU5
DVPDATA_6
AR6
DVPDATA_7
AW6
DVPDATA_8
AU6
DVPDATA_9
AT7
DVPDATA_10
AV7
DVPDATA_11
AN7
DVPDATA_12
AV9
DVPDATA_13
AT9
DVPDATA_14
AR10
DVPDATA_15
AW10
DVPDATA_16
AU10
DVPDATA_17
AP10
DVPDATA_18
AV11
DVPDATA_19
AT11
DVPDATA_20
AR12
DVPDATA_21
AW12
DVPDATA_22
AU12
DVPDATA_23
AP12
XTALOUT
R86 0R R86 0R
R_RTCLK
XTALIN
R81 0R R81 0R
Place R_RTCLK close to XTAL so the
main clock line has shortest stub
CLKTESTA
CLKTESTB
TP60 35mil TP60 35mil
TP61 35mil TP61 35mil
TP62 35mil TP62 35mil
TP63 35mil TP63 35mil
TP64 35mil TP64 35mil
TP65 35mil TP65 35mil
TP66 35mil TP66 35mil
TP67 35mil TP67 35mil
TP68 35mil TP68 35mil
TP69 35mil TP69 35mil
TP70 35mil TP70 35mil
TP71 35mil TP71 35mil
TP72 35mil TP72 35mil
TP73 35mil TP73 35mil
TP74 35mil TP74 35mil
TP75 35mil TP75 35mil
TP76 35mil TP76 35mil
TP77 35mil TP77 35mil
TP78 35mil TP78 35mil
TP79 35mil TP79 35mil
TP80 35mil TP80 35mil
TP81 35mil TP81 35mil
TP82 35mil TP82 35mil
TP83 35mil TP83 35mil
XTALOUT_S
27.000MHz_10PPM
R841MR84
1M
27.000MHz_10PPM
XTALIN_S
3
C83
C83
15pF
15pF
2 1
Y82
Y82
C82
C82
15pF
15pF
Lower Cable Card Edge
DVPCNTL_2
DVPDATA_1
DVPDATA_3
DVPDATA_5
DVPDATA_7
DVPDATA_9
DVPDATA_11
DVPCNTL_1
GENERICD
or Bundle B or Bundle A (closer to the bracket)
PWR_GOOD
J8002J8002
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39
2
4
6
8
DVPDATA_0
10
12
DVPDATA_2
14
16
DVPDATA_4
18
20
DVPDATA_6
22
24
DVPDATA_8
26
28
DVPDATA_10
32
DVPCNTL_0
34
36
GPIO_2
38
40
+1.8V
+3.3V_BUS
PWR_GOOD (1,14,15,16)
2
Upper Cable Card Edge
J8001J8001
1
DVP_MVP_CNTL_1 DVOCLK
DVP_MVP_CNTL_0
DVPDATA_13
DVPDATA_15
DVPDATA_17
DVPDATA_19
DVPDATA_21
DVPDATA_23
GENERICB_R
GENERICC
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
RH RV730 GDDR3 DP-DP- DVII
3
5
7
9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
32
34
36
38
40
DVPDATA_12
DVPDATA_14
DVPDATA_16
DVPDATA_18
DVPDATA_20
DVPDATA_22
GPIO_21_R
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Sheet
Sheet
Sheet
Do not install for BU
GENERICB: Generic I2C_SDA
DVALID: Generic I2C_SCL
Wednesday, August 20, 2008
Wednesday, August 20, 2008
Wednesday, August 20, 2008
of
61 9
of
61 9
of
61 9
1
Doc No.
Doc No.
Doc No.
GPIO_21
GENERICB GPIO_1
Rev Date:
Rev Date:
Rev Date:
102-B66601-00
102-B66601-00
102-B66601-00
50
50
50
www.vinafix.vn