MSI MS-V173 Schematic

Page 1
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
ASSEMBLYNVPNVARIANT
B 1 2
SKU
3 4 5 6
12 13 14
7 8
9 10 11
15
P817_A02: G92M, G3-256, MXM V3.0
LVDS, DVI-D,DisplayPort,VGA,HDCP,SLI
32Mx32 GDDR3, 256Bit, 1024MB
Table of Contents:
Page 1: Title Page Page 2: MXM-III Connector and GPU PCI-EX Interface Page 3: FrameBuffer - GPU Partition A/B Page 4: FrameBuffer - GPU Partition C/D Page 5: FrameBuffer - Partition A 16/32Mx32 BGA136 GDDR3 Page 6: FrameBuffer - Partition B 16/32Mx32 BGA136 GDDR3 Page 7: FrameBuffer - Partition C 16/32Mx32 BGA136 GDDR3 Page 8: FrameBuffer - Partition D 16/32Mx32 BGA136 GDDR3 Page 9: FrameBuffer - Memory Decoupling Page 10: GPU GPIO, MIOA, MIOB Interface; GPU XTAL and Spread Spectrum Clock Page 11: GPU DACA, DACB, and DACC Interface Page 12: GPU IFP A/B LVDS and IFP C/D TMDS Interface Page 13: DisplayPort Transmitter and External Thermal Sensor Page 14: MXM Connector; GPU Temp Sensor and JTAG; VBIOS and HDCP ROM Page 15: GPU PLLVDD Power and GND, GPU Decoupling Page 16: Power Supply I - NVVDD Page 17: Power Supply II - FBVDDQ, PEX_VDD Page 18: GPU Strap Configuration Page 19: BASENET REPORT Page 20: BASENET REPORT Page 21: BASENET REPORT
BASE SKU0000 SKU0002 SKU0003 SKU0004 SKU0005 <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
602-10817-BASE-SCH 602-10817-0001-200 602-10817-0002-200 602-10817-0003-200 602-10817-0004-200 602-10817-0005-200 <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL NB9E-GTX/G92-750,1024MB, 8pcs32Mx32 GDDR3, SLI. NB9E-GTX/G92-750,1024MB, 8pcs32Mx32 GDDR3, SLI. SKU2 NB9E-GTX/G92-750-B1,55nm SKU4 1024MB, 8pcs32Mx32 GDDR3, SLI. NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. NB9E-GTX/G92-740-A2,65nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. Title Page
www.vinafix.vn
602-10817-0004-200 A
p817_a02 phchan
1 OF 21
22-AUG-2008
Page 2
Page2: MXM-III Connector and GPU PCI-EX Interface
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
OUT
1/24 PCI EXPRESS
PEX_IOVDD
PEX_IOVDD PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ PEX_IOVDDQ
PEX_IOVDDQ PEX_IOVDDQ
PEX_IOVDDQ PEX_IOVDDQ
PEX_IOVDDQ PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
RFU
RFU
PEX_PLLAVDD
PEX_PLLDGND
PEX_PLLAGND
PEX_PLLDVDD
PEX_TEST_PLL_CLK_OUT
PEX_TEST_PLL_CLK_OUT
PEX_TX0
PEX_REFCLK
PEX_REFCLK
PEX_RST
PEX_TX0
PEX_RX1
PEX_TX1
PEX_RX0
PEX_TX2 PEX_TX2
PEX_RX2
PEX_TX3
PEX_RX1
PEX_TX3
PEX_RX3 PEX_RX3
PEX_TX1
PEX_RX0
PEX_RX2
PEX_RX5
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX4 PEX_TX4
PEX_RX4
PEX_TX6
PEX_RX5
PEX_RX4 PEX_TX5
PEX_TX5
PEX_TX7
PEX_TX9
PEX_RX8
PEX_TX8
PEX_RX9
PEX_RX7
PEX_TX9
PEX_TX10
PEX_RX7 PEX_TX8
PEX_TX10
PEX_RX9
PEX_RX8
PEX_RX10
PEX_RX11
PEX_RX10
PEX_TX12
PEX_TX12
PEX_RX11
PEX_RX12 PEX_RX12
PEX_TX13 PEX_TX13
PEX_RX13 PEX_RX13
PEX_TX11 PEX_TX11
PEX_TX14
PEX_RX15
PEX_RX15
PEX_TX15
PEX_TX15
PEX_RX14
PEX_RX14
PEX_TX14
1/2 PCI-Express, Power
CLK_REQ
PEX_STD_SW
PEX_RST
PEX_REFCLK PEX_REFCLK
PEX_RX0
PRSNT_R PRSNT_L
PEX_RX0
PEX_TX2
PEX_TX2
PEX_RX2 PEX_RX2
PEX_RX3
PEX_TX0 PEX_TX0
PEX_RX1 PEX_RX1
PEX_TX1 PEX_TX1
PEX_RX3
PEX_TX3
PEX_RX5
PEX_RX4 PEX_RX4
PEX_TX6
PEX_TX5 PEX_TX5
PEX_RX6
PEX_TX6
PEX_TX3
PEX_TX4 PEX_TX4
PEX_RX5
PEX_RX6
PEX_RX7 PEX_RX7
PEX_TX7
PEX_TX7
PEX_RX8 PEX_RX8
PEX_TX8
PEX_TX8
PEX_RX9
PEX_RX9
PEX_TX9 PEX_TX9
PEX_RX10
PEX_RX10
PEX_TX12
PEX_RX12
PEX_TX10 PEX_TX10
PEX_RX11
PEX_TX11
PEX_RX11 PEX_TX11
PEX_TX12
PEX_RX12
PEX_TX13 PEX_TX13
PEX_RX13 PEX_RX13
PEX_TX14 PEX_RX15
PEX_RX15
PEX_RX14 PEX_RX14
PEX_TX14
PEX_TX15
PEX_TX15
(2.5A)
5V
(1A)
3V3
PWR_SRC PWR_SRC
(10A)
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
GND
GND GND GND
GND GND
GND
GND GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND GND GND
GND
GND GND
GND
GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
POWER NET RULES
MAX_CURRENT
VOLTAGE
NET
0.25A
PEX_PLLVDD
1.1V
MIN_LINE_WIDTH
16MIL
CN1 CON_MXM3_EDGE
NPHY NPHY COMMON
2 281
19
156 154
155 153
149 147
150 148
143 141
144 142
137 135
138 136
123 121
122 120
117 115
116 114
111 109
110 108
105 103
104 102
99 97
98 96
93 91
92 90
87 85
86 84
81 79
80 78
75 73
74 72
69 67
68 66
63 61
62 60
57 55
56 54
51 49
50 48
GND
GND
PEX_PRSNT_STDSW*
PEX_RST*
PEX_REFCLK PEX_REFCLK*
PEX_TX0 PEX_TX0*
PEX_RX0 PEX_RX0*
PEX_TX1 PEX_TX1*
PEX_RX1 PEX_RX1*
PEX_TX2 PEX_TX2*
PEX_RX2 PEX_RX2*
PEX_TX3 PEX_TX3*
PEX_RX3 PEX_RX3*
PEX_TX4 PEX_TX4*
PEX_RX4 PEX_RX4*
PEX_TX5 PEX_TX5*
PEX_RX5 PEX_RX5*
PEX_TX6 PEX_TX6*
PEX_RX6 PEX_RX6*
PEX_TX7 PEX_TX7*
PEX_RX7 PEX_RX7*
PEX_TX8 PEX_TX8*
PEX_RX8 PEX_RX8*
PEX_TX9 PEX_TX9*
PEX_RX9 PEX_RX9*
PEX_TX10 PEX_TX10*
PEX_RX10 PEX_RX10*
PEX_TX11 PEX_TX11*
PEX_RX11 PEX_RX11*
PEX_TX12 PEX_TX12*
PEX_RX12 PEX_RX12*
PEX_TX13 PEX_TX13*
PEX_RX13 PEX_RX13*
PEX_TX14 PEX_TX14*
PEX_RX14 PEX_RX14*
PEX_TX15 PEX_TX15*
PEX_RX15 PEX_RX15*
18.4C>
G1 G92-750-A2
BGA1148 COMMON
AR9
AK10 AL10
AM11 AM10
AP9
AP10 AN10
AN11 AR10
AR11 AN12
AM12 AT11
AT12 AL12
AK12 AP12
AP13 AM14
AM13 AR13
AR14 AN13
AN14 AT14
AT15 AN15
AM15 AP15
AP16 AL15
AK15 AR16
AR17 AM16
AN16 AT17
AT18 AN17
AN18 AP18
AP19 AM18
AM17 AR19
AR20 AL18
AK18 AT20
AT21 AM19
AN19 AP21
AP22 AN20
AN21 AR22
AR23 AM21
AM20 AT23
AT24 AL21
AK21 AR24
AR25
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. MXM-III Connector and GPU PCI-EX Interface
www.vinafix.vn
AH21 AJ21 AH22 AJ22 AH23 AJ23
AH16 AF17 AH17 AF18 AH18
AF19 AH19 AE20 AF20 AH20
AJ20
AM9 AN9
AK19 AK20
AE15
AE17
AF15
AE16
PEX_PLL_CLK_OUT PEX_PLL_CLK_OUT*
SNN_PEX_CAL_PD_VDDQ
SNN_PEX_CAL_PD_GND
PEX_PLLVDD
GND
C675 .1UF
16V 10% X7R 0402 COMMON
C537 .1UF
16V 10% X7R 0402 COMMON
C504
0.22UF
25V 10% X7R 0603 COMMON
GND
278
100 101 106 107 112 113 118 119 124 125 133 134 139 140 145 146 151 152 157 166 173 174 179 180 185 186 191 192 197 198 203 204 209 210 215 216 221 222 228 244 250 251 256 257 262 263 268 269 275
1
E1 E2
11 36 37 46 47 52 53 58 59 64 65 70 71 76 77 82 83 88 89 94 95
E3 E4
3V3_RUN
C768 1UF
6.3V 10% X5R 0402 COMMON
C775 .1UF
16V 10% X7R 0402 COMMON
5V
PWR_SRC
C101
0.22UF
25V 10% X7R 0603 COMMON
C633
C609
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C637
C653 .1UF .1UF
16V
16V
10%
10%
X7RX7R 0402
0402
COMMON
COMMON
C670
2.2UF
6.3V 20% X5R 0402 COMMON
C644C659 1UF
.1UF
6.3V
16V
10%
10%
X5R
X7R
0402
0402
COMMON
COMMON
C646
C626
1UF.1UF 1UF
6.3V
16V
10%
10% X7R
0402
0402
COMMON
COMMON
DNI
R580 200
Place to the bottom side for test usage.
1%
NO STUFF FOR PRODUCTION.
0402 COMMON
PEX_VDD
10nH
LB3
C58
4.7UF
6.3V 20% X5R 0603 COMMON
COMMON0603
GND
C619 1UF
6.3V 10% X5R 0402 COMMON
C618
6.3V 10% X5RX5R 0402 COMMON
C636 1UF
6.3V 10% X5R 0402 COMMON
C654 1UF
6.3V 10% X5R 0402 COMMON
PEX_VDD
GND
GND
C660
4.7UF
6.3V 20% X5R 0603 COMMON
C74
4.7UF
6.3V 20% X5R 0603 COMMON
PLATFORM POWER
NET RULES
NV_NET_MAX_ CURRENT
VOLTAGE
NET
20V
PWR_SRC
5V
3V3_RUN
PWR_SRC 5V
3V3_RUN GND
5V
3.3V
16A 3A
1.5A
0V
GND
NET RULES
NET
PEX_PLL_CLK_OUT PEX_PLL_CLK_OUT* PEX_REFCLK PEX_REFCLK* PEX_TX0 PEX_TX0* PEX_TX1 PEX_TX1* PEX_TX2 PEX_TX2* PEX_TX3 PEX_TX3* PEX_TX4 PEX_TX4* PEX_TX5 PEX_TX5* PEX_TX6 PEX_TX6* PEX_TX7 PEX_TX7* PEX_TX8 PEX_TX8* PEX_TX9 PEX_TX9* PEX_TX10 PEX_TX10* PEX_TX11 PEX_TX11* PEX_TX12 PEX_TX12* PEX_TX13 PEX_TX13* PEX_TX14 PEX_TX14* PEX_TX15 PEX_TX15*
PEX_RX0 PEX_RX0* PEX_RX1 PEX_RX1* PEX_RX2 PEX_RX2* PEX_RX3 PEX_RX3* PEX_RX4 PEX_RX4* PEX_RX5 PEX_RX5* PEX_RX6 PEX_RX6* PEX_RX7 PEX_RX7* PEX_RX8 PEX_RX8* PEX_RX9 PEX_RX9* PEX_RX10 PEX_RX10* PEX_RX11 PEX_RX11* PEX_RX12 PEX_RX12* PEX_RX13 PEX_RX13* PEX_RX14 PEX_RX14* PEX_RX15 PEX_RX15*
602-10817-0004-200 A
p817_a02 phchan
1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
NV_SOURCE_MIN_LINE_
WIDTH
16MIL 16MIL
16MIL 16MIL
PEX_PLL_CLK_OUT PEX_PLL_CLK_OUT
PEX_REFCLK PEX_REFCLK PEX_TX0 PEX_TX0 PEX_TX1 PEX_TX1 PEX_TX2 PEX_TX2 PEX_TX3 PEX_TX3
PEX_TX4 PEX_TX5 PEX_TX5 PEX_TX6 PEX_TX6 PEX_TX7 PEX_TX7 PEX_TX8 PEX_TX8 PEX_TX9 PEX_TX9 PEX_TX10 PEX_TX10 PEX_TX11 PEX_TX11 PEX_TX12 PEX_TX12 PEX_TX13 PEX_TX13 PEX_TX14 PEX_TX14 90DIFF PEX_TX15 PEX_TX15
PEX_RX0 PEX_RX0 PEX_RX1 PEX_RX1 PEX_RX2 PEX_RX2 PEX_RX3 PEX_RX3 PEX_RX4 PEX_RX4 PEX_RX5 PEX_RX5 PEX_RX6 PEX_RX6 PEX_RX7 PEX_RX7 PEX_RX8 PEX_RX8 PEX_RX9 PEX_RX9 PEX_RX10 PEX_RX10 PEX_RX11 PEX_RX11 PEX_RX12 90DIFF PEX_RX12 PEX_RX13 PEX_RX13 PEX_RX14 PEX_RX14 PEX_RX15 PEX_RX15
POWER_NET
NV_IMPEDANCEDIFFPAIRNV_CRITICAL_NET
2 OF 21
22-AUG-2008
TRUE TRUE
TRUE
90DIFF 90DIFF
90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFFPEX_TX4 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF
90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF
Page 3
Page3: FrameBuffer - GPU Partition A/B
ININININININININOUT
OUT
OUT
OUT
OUT
3/24 MEM_B
FBB_CMD6
FBB_CMD4 FBB_CMD5
FBB_CMD3
FBB_CMD1 FBB_CMD2
FBB_CMD0
FBB_CMD7
FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26
FBB_CMD27
FBB_CMD19
FBB_CMD18
FBB_CMD17
FBB_CMD16
FBB_CMD14 FBB_CMD15
FBB_CMD13
FBB_CMD12
FBB_CMD11
FBB_CMD9
FBB_CMD10
FBB_CMD8
FBB_CLK1
FBB_CLK0
FBB_CLK0
FBB_CMD28
FBB_CLK1
RFU RFU
FBB_DEBUG
FBCAL1_PD_VDDQ
FBCAL1_PU_GND
FBB_PLLVDD_NC
FBCAL1_TERM_GND
FBB_PLLGND
FBBD6
FBBD4 FBBD5
FBBD3
FBBD2
FBBD1
FBBD0
FBBD7
FBBD27
FBBD26
FBBD25
FBBD24
FBBD23
FBBD22
FBBD21
FBBD19 FBBD20
FBBD17
FBBD16
FBBD15
FBBD13
FBBD12
FBBD11
FBBD9 FBBD10
FBBD8
FBBD14
FBBD18
FBBD47
FBBD46
FBBD45
FBBD44
FBBD42 FBBD43
FBBD41
FBBD40
FBBD39
FBBD37 FBBD38
FBBD36
FBBD35
FBBD34
FBBD32 FBBD33
FBBD31
FBBD30
FBBD29
FBBD28
FBBD48
FBBDQM2
FBBDQM1
FBBDQM0
FBBD62 FBBD63
FBBD60 FBBD61
FBBD59
FBBD57 FBBD58
FBBD55 FBBD56
FBBD54
FBBD53
FBBD52
FBBD50 FBBD51
FBBD49
FBBDQS_RN6
FBBDQS_WP2
FBBDQS_WP1
FBBDQS_WP0
FBBDQS_RN7
FBBDQS_RN4 FBBDQS_RN5
FBBDQS_RN3
FBBDQS_RN2
FBBDQS_RN1
FBBDQS_RN0
FBBDQM7
FBBDQM6
FBBDQM4 FBBDQM5
FBBDQM3
FBBDQS_WP3
FB_VREF2
FBBDQS_WP7
FBBDQS_WP6
FBBDQS_WP5
FBBDQS_WP4
OUT
OUTBIIN
OUT
OUT
OUT
OUT
OUT
OUTINOUT
BI
2/24 MEM_A
FBA_CMD6
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5
FBA_CMD7
FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26
FBA_CMD27
FBA_CMD19
FBA_CMD18
FBA_CMD17
FBA_CMD16
FBA_CMD14 FBA_CMD15
FBA_CMD13
FBA_CMD12
FBA_CMD11
FBA_CMD9
FBA_CMD10
FBA_CMD8
FBA_CMD22
FBA_CMD21
FBA_CMD20
FBA_CMD28
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
RFU RFU
FBA_DEBUG
FBCAL0_PU_GND
FBCAL0_TERM_GND
FBCAL0_PD_VDDQ
FBA_PLLAVDD
FBA_DLLAVDD
FBA_PLLGND
FBAD6
FBAD4 FBAD5
FBAD3
FBAD2
FBAD1
FBAD0
FBAD7
FBAD20 FBAD21
FBAD26
FBAD25
FBAD24
FBAD23
FBAD22
FBAD19
FBAD17
FBAD15
FBAD12 FBAD13
FBAD11
FBAD9 FBAD10
FBAD8
FBAD27
FBAD14 FBAD16 FBAD18
FBAD45
FBAD44
FBAD42
FBAD41
FBAD37 FBAD38
FBAD36
FBAD35
FBAD32 FBAD33
FBAD31
FBAD30
FBAD29
FBAD28
FBAD46
FBAD40
FBAD39
FBAD43
FBAD34
FBAD47 FBAD48
FBAD60
FBADQM2
FBADQM1
FBAD61
FBAD58
FBAD57
FBAD55 FBAD56
FBAD54
FBAD53
FBAD52
FBAD51
FBAD50
FBAD49
FBAD59
FBADQM0
FBAD63
FBAD62
FBADQS_WP2
FBADQS_RN7
FBADQS_RN5
FBADQS_RN3
FBADQS_RN2
FBADQM4
FBADQM3
FBADQS_RN6
FBADQS_RN4
FBADQM7
FBADQM6
FBADQM5
FBADQS_RN1
FBADQS_RN0
FBADQS_WP0 FBADQS_WP1
FBADQS_WP3 FBADQS_WP5
FBADQS_WP4
FBADQS_WP7
FBADQS_WP6
FB_VREF1
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
FB_VREF
FB_CAL_PD_VDDQ0
FB_CAL_PU_GND0
FB_CAL_TERM_GND0
FB_CAL_PD_VDDQ1
FB_CAL_PU_GND1
FB_CAL_TERM_GND1
0.25A
1.2VFBAB_PLLAVDD
MIN_LINE_WIDTHMAX_CURRENTVOLTAGENET
16MIL
12MIL
12MIL 12MIL 12MIL 12MIL 12MIL 12MIL
G1 G92-750-A2
BGA1148 COMMON
5.1G<>
5.4A<>
5.1G<>
5.4A<>
5.1G<>
5.5A<>
5.1G<>
5.5A<>
FBA_D<63..0> FBA_DQM<7..0> FBA_DQS_RN<7..0> FBA_DQS_WP<7..0>
FBA_CMD<0>
FBA_D<0>
0
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_D<5>
5
FBA_D<6>
6
FBA_D<7>
7
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_D<16>
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
20
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_D<32>
32
FBA_D<33>
33
FBA_D<34>
34
FBA_D<35>
35
FBA_D<36>
36
FBA_D<37>
37
FBA_D<38>
38
FBA_D<39>
39
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50>
50
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DQM<0>
0
FBA_DQM<1>
1
FBA_DQM<2>
2
FBA_DQM<3>
3
FBA_DQM<4>
4
FBA_DQM<5>
5
FBA_DQM<6>
6
FBA_DQM<7>
7
FBA_DQS_RN<0>
0
FBA_DQS_RN<1>
1
FBA_DQS_RN<2>
2
FBA_DQS_RN<3>
3
FBA_DQS_RN<4>
4
FBA_DQS_RN<5>
5
FBA_DQS_RN<6>
6
FBA_DQS_RN<7>
7
FBA_DQS_WP<0>
0
FBA_DQS_WP<1>
1
FBA_DQS_WP<2>
2
FBA_DQS_WP<3>
3
FBA_DQS_WP<4>
4
FBA_DQS_WP<5>
5
FBA_DQS_WP<6>
6
FBA_DQS_WP<7>
7
FB_VREF1
TP501
AH35 AH36 AH34 AJ34 AK36 AJ36 AK34 AL34 AH32 AK33 AJ33 AH33 AL33 AN32 AN33 AN31 AE32 AF30 AF32 AE30 AE31 AC30 AC32 AD30 AG36 AG34 AG35 AF36 AD36 AD34 AD35 AE34 AP36 AN35 AM34 AP35 AP34 AP33 AT34 AR34 AM22 AM25 AN26 AN24 AK24 AL22 AK23 AM23 AT32 AT33 AR33 AP31 AR30 AT30 AP30 AT29 AP26 AP27 AT25 AP25 AR28 AP28 AT28 AP29
AK35 AM33 AF33 AF34 AN34 AM24 AP32 AR27
AL35 AK32 AG33 AE36 AM36 AN22 AR31 AT27
AL36 AL32 AG32 AE35 AN36 AN23 AT31 AT26
J29
AK28
FBA_CMD<1>
AK29
FBA_CMD<2>
AN30
FBA_CMD<3>
AM27
FBA_CMD<4>
AN28
FBA_CMD<5>
AL29
FBA_CMD<6>
AM30
FBA_CMD<7>
AJ31
FBA_CMD<8>
AK31
FBA_CMD<9>
AH31
FBA_CMD<10>
AK25
FBA_CMD<11>
AM26
FBA_CMD<12>
AL31
FBA_CMD<13>
AN29
FBA_CMD<14>
AK27
FBA_CMD<15>
AK26
FBA_CMD<16>
AN27
FBA_CMD<17>
AL25
FBA_CMD<18>
AJ30
FBA_CMD<19>
AM31
FBA_CMD<20>
AH30
FBA_CMD<21>
AL30
FBA_CMD<22>
AH29
FBA_CMD<23>
AL28
FBA_CMD<24>
AH28
FBA_CMD<25>
AM28
SNN_FBA_CMD<26>
AG30
SNN_FBA_CMD<27>
AG28
SNN_FBA_CMD<28>
AF28
FBA_CLK0
AH26
FBA_CLK0*
AH27
FBA_CLK1
AJ29
FBA_CLK1*
AJ28
SNN_FBA_RFU0
AJ24
SNN_FBA_RFU1
AH24
SNN_FBA_DEBUG
AH25
ADD A SMALL TESTPOINT ON THIS SNN NET IN BOARD FILE
FB_CAL_PD_VDDQ0
J28
FB_CAL_PU_GND0
H28
FB_CAL_TERM_GND0
H29
FBAB_PLLAVDDAC29
AD29 AE29
GND
GND
C62 .1UF
16V 10% X7R 0402 COMMON
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
R538 R548 R547
FBA_CMD<28..0>
5.1G<
5.1G<
5.1G<
5.1G<
0402
1%
0402
1%
0402
1%
C57 1UF
6.3V 10% X5R 0402 COMMON
GND
5.2A<
5.2A<
5.2D<
5.2D<
FBVDDQ
51.1
COMMON
28
COMMON
34.8
COMMON
GND
BEAD_0402
GND
240R@100MHzLB4
C68
4.7UF
6.3V 20% X5R 0603 COMMON
PEX_VDD
COMMON
6.4A<> 6.1G<>
5.1G< 5.1A<
6.4A<> 6.1G<>
6.5A<> 6.1G<>
6.5A<> 6.1G<>
FB_CALx_PD_VDDQ
FB_CALx_PU_GND
FB_CALx_TERM_GND
VREF RATIO GPIO10 low VREF RATIO GPIO10 high
(0.5 ratio needed only when FBVDD can be 2.0V)
C60
4.7UF
6.3V 20% X5R 0603 COMMON
GND
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. FrameBuffer - GPU Partition A/B
www.vinafix.vn
FBB_D<63..0> FBB_DQM<7..0> FBB_DQS_RN<7..0> FBB_DQS_WP<7..0>
DDR3CALIBRATION PIN
51.1
28
34.8
0.667 FBVDDQ
0.5 FBVDDQ
G1 G92-750-A2
BGA1148 COMMON
FBB_CMD<0>
P33
FBB_CMD<1>
N33
FBB_CMD<2>
R31
FBB_CMD<3>
U33
FBB_CMD<4>
V30
FBB_CMD<5>
T33
FBB_CMD<6>
T30
FBB_CMD<7>
N32
FBB_CMD<8>
R32
FBB_CMD<9>
P32
FBB_CMD<10>
U32
FBB_CMD<11>
U30
FBB_CMD<12>
P30
FBB_CMD<13>
V31
FBB_CMD<14>
T28
FBB_CMD<15>
W30
FBB_CMD<16>
V32
FBB_CMD<17>
T32
FBB_CMD<18>
N30
FBB_CMD<19>
P28
FBB_CMD<20>
P29
FBB_CMD<21>
U29
FBB_CMD<22>
N28
FBB_CMD<23>
R30
FBB_CMD<24>
M30
FBB_CMD<25>
T29
SNN_FBB_CMD<26>
N29
SNN_FBB_CMD<27>
AA30
SNN_FBB_CMD<28>
Y29
FBB_CLK0
M28
FBB_CLK0*
L28
FBB_CLK1
W31
FBB_CLK1*
W32
SNN_FBB_RFU0
R28
SNN_FBB_RFU1
K29
SNN_FBB_DEBUG
C34
ADD A SMALL TESTPOINT ON THIS SNN NET IN BOARD FILE
FB_CAL_PD_VDDQ1
H27
FB_CAL_PU_GND1
H26
FB_CAL_TERM_GND1
J26
SNN_FBB_PLLVDD
AB28
AC28
GND
FB_VREF2
G36 G35 H36 H34 J35 J34 K34 K35 J31 K32 J30 H30 L32 K30 M31 L30 G31 J32 J33 F33 H31 E33 F31 F32 F35 G34 F36 F34 C35 D34 C36 D35 N35 M34 L34 N36 P36 P34 R36 R34
AC33
Y33
Y30 AB30 AA32 AD32 AD33 AA33
T36
R35
T34
U36
W35
U34
V34
W36 AC36 AA36 AC34 AB34 AA35
Y34
Y36
W34
J36
M32
H33
E34
N34
Y32
T35 AA34
L36
K33
G32
E36
M36 AB32
V35 AB35
K36
L33
G33
D36
M35 AB31
V36 AB36
J27
FBB_D<0>
0
FBB_D<1>
1
FBB_D<2>
2
FBB_D<3>
3
FBB_D<4>
4
FBB_D<5>
5
FBB_D<6>
6
FBB_D<7>
7
FBB_D<8>
8
FBB_D<9>
9
FBB_D<10>
10
FBB_D<11>
11
FBB_D<12>
12
FBB_D<13>
13
FBB_D<14>
14
FBB_D<15>
15
FBB_D<16>
16
FBB_D<17>
17
FBB_D<18>
18
FBB_D<19>
19
FBB_D<20>
20
FBB_D<21>
21
FBB_D<22>
22
FBB_D<23>
23
FBB_D<24>
24
FBB_D<25>
25
FBB_D<26>
26
FBB_D<27>
27
FBB_D<28>
28
FBB_D<29>
29
FBB_D<30>
30
FBB_D<31>
31
FBB_D<32>
32
FBB_D<33>
33
FBB_D<34>
34
FBB_D<35>
35
FBB_D<36>
36
FBB_D<37>
37
FBB_D<38>
38
FBB_D<39>
39
FBB_D<40>
40
FBB_D<41>
41
FBB_D<42>
42
FBB_D<43>
43
FBB_D<44>
44
FBB_D<45>
45
FBB_D<46>
46
FBB_D<47>
47
FBB_D<48>
48
FBB_D<49>
49
FBB_D<50>
50
FBB_D<51>
51
FBB_D<52>
52
FBB_D<53>
53
FBB_D<54>
54
FBB_D<55>
55
FBB_D<56>
56
FBB_D<57>
57
FBB_D<58>
58
FBB_D<59>
59
FBB_D<60>
60
FBB_D<61>
61
FBB_D<62>
62
FBB_D<63>
63
FBB_DQM<0>
0
FBB_DQM<1>
1
FBB_DQM<2>
2
FBB_DQM<3>
3
FBB_DQM<4>
4
FBB_DQM<5>
5
FBB_DQM<6>
6
FBB_DQM<7>
7
FBB_DQS_RN<0>
0
FBB_DQS_RN<1>
1
FBB_DQS_RN<2>
2
FBB_DQS_RN<3>
3
FBB_DQS_RN<4>
4
FBB_DQS_RN<5>
5
FBB_DQS_RN<6>
6
FBB_DQS_RN<7>
7
FBB_DQS_WP<0>
0
FBB_DQS_WP<1>
1
FBB_DQS_WP<2>
2
FBB_DQS_WP<3>
3
FBB_DQS_WP<4>
4
FBB_DQS_WP<5>
5
FBB_DQS_WP<6>
6
FBB_DQS_WP<7>
7
TP502
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
R554 R551 R556
FBB_CMD<28..0>
0402
1%
0402
1%
0402
1%
6.1G<
6.1G<
6.1G<
6.1G<
51.1
COMMON
28
COMMON
34.8
COMMON
6.2A<
6.2A<
6.2D<
6.2D<
FBVDDQ
GND
6.1G< 6.1A<
602-10817-0004-200 A
p817_a02 phchan
3 OF 21
22-AUG-2008
Page 4
Page4: FrameBuffer - GPU Partition C/D
OUTINOUT
OUT
OUT
OUT
5/24 MEM_D
FBD_CMD0 FBD_CMD1 FBD_CMD2 FBD_CMD3
FBD_CMD5
FBD_CMD4 FBD_CMD6
FBD_CMD7
FBD_CMD21
FBD_CMD20
FBD_CMD19
FBD_CMD8
FBD_CMD10
FBD_CMD9
FBD_CMD11 FBD_CMD12 FBD_CMD13 FBD_CMD14 FBD_CMD15 FBD_CMD16 FBD_CMD17 FBD_CMD18
FBD_CMD23
FBD_CMD22
FBD_CMD27
FBD_CMD26
FBD_CMD25
FBD_CMD24
FBD_CLK1
FBD_CLK1
FBD_CLK0
FBD_CLK0
FBD_CMD28
RFU RFU
FBD_DEBUG
FBD_PLLVDD_NC
FBD_PLLGND
FBDD0 FBDD1 FBDD2 FBDD3 FBDD4 FBDD5 FBDD6 FBDD7
FBDD9
FBDD21
FBDD25
FBDD8 FBDD10
FBDD11 FBDD12 FBDD13
FBDD15
FBDD14 FBDD16
FBDD17 FBDD18
FBDD20
FBDD19
FBDD22 FBDD23 FBDD24
FBDD26 FBDD27 FBDD28 FBDD29 FBDD30 FBDD31
FBDD33
FBDD32
FBDD36
FBDD35
FBDD38
FBDD37
FBDD40 FBDD41
FBDD39
FBDD42 FBDD43 FBDD44 FBDD45 FBDD46 FBDD47
FBDD34
FBDD48
FBDD57 FBDD58 FBDD59 FBDD60
FBDD49 FBDD50 FBDD51 FBDD52 FBDD53 FBDD54
FBDD56
FBDD55
FBDD61 FBDD62 FBDD63
FBDDQM0 FBDDQM2
FBDDQM1 FBDDQM3 FBDDQM5
FBDDQM4 FBDDQM6
FBDDQM7
FBDDQS_RN0 FBDDQS_RN1 FBDDQS_RN2 FBDDQS_RN3
FBDDQS_RN6
FBDDQS_RN4
FBDDQS_RN7
FBDDQS_WP0 FBDDQS_WP1 FBDDQS_WP2
FBDDQS_RN5
FBDDQS_WP3 FBDDQS_WP4 FBDDQS_WP5 FBDDQS_WP6 FBDDQS_WP7
BI
OUTINOUT
OUT
OUT
OUT
OUT
OUTBIOUT
OUT
IN
4/24 MEM_C
FBC_CMD6
FBC_CMD5
FBC_CMD4
FBC_CMD3
FBC_CMD2
FBC_CMD1
FBC_CMD0
FBC_CMD7
FBC_CMD24 FBC_CMD25
FBC_CMD21 FBC_CMD22 FBC_CMD23
FBC_CMD20
FBC_CMD19
FBC_CMD18
FBC_CMD17
FBC_CMD16
FBC_CMD15
FBC_CMD14
FBC_CMD13
FBC_CMD12
FBC_CMD11
FBC_CMD10
FBC_CMD9
FBC_CMD8
FBC_CMD26 FBC_CMD27 FBC_CMD28
FBC_CLK1 FBC_CLK1
FBC_CLK0
FBC_CLK0
RFU RFU
FBC_DEBUG
FBC_DLLAVDD FBC_PLLAVDD
FBC_PLLVDD_NC
FBC_PLLGND
FBCD5
FBCD3
FBCD1
FBCD6
FBCD4
FBCD2
FBCD0
FBCD7
FBCD16
FBCD19
FBCD27
FBCD26
FBCD25
FBCD22 FBCD23
FBCD20
FBCD13
FBCD9
FBCD8
FBCD14 FBCD15
FBCD17
FBCD12
FBCD24
FBCD21
FBCD18
FBCD11
FBCD10
FBCD29
FBCD28
FBCD33 FBCD35
FBCD47
FBCD45 FBCD46
FBCD44
FBCD43
FBCD42
FBCD39 FBCD41
FBCD40
FBCD37
FBCD32
FBCD30
FBCD36
FBCD34
FBCD31
FBCD38
FBCD48
FBCD60
FBCD63
FBCDQM0 FBCDQM2
FBCDQM1
FBCD62
FBCD61
FBCD57 FBCD58 FBCD59
FBCD55 FBCD56
FBCD53 FBCD54
FBCD51
FBCD50
FBCD49
FBCD52
FBCDQM5
FBCDQM4 FBCDQM6
FBCDQM7
FBCDQS_RN0 FBCDQS_RN1 FBCDQS_RN2
FBCDQS_RN4 FBCDQS_RN5 FBCDQS_RN6 FBCDQS_RN7
FBCDQS_WP0 FBCDQS_WP1 FBCDQS_WP2
FBCDQS_RN3
FBCDQM3
FBCDQS_WP3 FBCDQS_WP4 FBCDQS_WP5 FBCDQS_WP6 FBCDQS_WP7
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
MAX_CURRENT MIN_LINE_WIDTHVOLTAGENET
0.25A
1.2VFBCD_PLLAVDD
16MIL
FBC_D<63..0> FBC_DQM<7..0> FBC_DQS_RN<7..0> FBC_DQS_WP<7..0>
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
FBC_D<0> FBC_D<1> FBC_D<2> FBC_D<3> FBC_D<4> FBC_D<5> FBC_D<6> FBC_D<7> FBC_D<8> FBC_D<9> FBC_D<10> FBC_D<11> FBC_D<12> FBC_D<13> FBC_D<14> FBC_D<15> FBC_D<16> FBC_D<17> FBC_D<18> FBC_D<19> FBC_D<20> FBC_D<21> E14 FBC_D<22> FBC_D<23> FBC_D<24> FBC_D<25> FBC_D<26> FBC_D<27> FBC_D<28> FBC_D<29> FBC_D<30> FBC_D<31> FBC_D<32> FBC_D<33> FBC_D<34> FBC_D<35> FBC_D<36> FBC_D<37> FBC_D<38> FBC_D<39> FBC_D<40> FBC_D<41> FBC_D<42> FBC_D<43> FBC_D<44> FBC_D<45> FBC_D<46> FBC_D<47> FBC_D<48> FBC_D<49> FBC_D<50> FBC_D<51> FBC_D<52> FBC_D<53> FBC_D<54> FBC_D<55> FBC_D<56> FBC_D<57> FBC_D<58> FBC_D<59> FBC_D<60> FBC_D<61> FBC_D<62> A31 FBC_D<63>
FBC_DQM<0> FBC_DQM<1> FBC_DQM<2> FBC_DQM<3> FBC_DQM<4> FBC_DQM<5> FBC_DQM<6> FBC_DQM<7>
FBC_DQS_RN<0> FBC_DQS_RN<1> FBC_DQS_RN<2> FBC_DQS_RN<3> FBC_DQS_RN<4> FBC_DQS_RN<5> FBC_DQS_RN<6> FBC_DQS_RN<7>
FBC_DQS_WP<0> FBC_DQS_WP<1> FBC_DQS_WP<2> FBC_DQS_WP<3> FBC_DQS_WP<4> FBC_DQS_WP<5> FBC_DQS_WP<6> FBC_DQS_WP<7>
7.1G<>
7.4A<>
7.1G<>
7.4A<>
7.1G<>
7.5A<>
7.1G<>
7.5A<>
C18 C17 A17 B16 C14 A16 C15 A14 A18 A19 B19 B18 B21 C19 B22 C21 E15 D16 D17 G16 E16
G13 D13 A22 C22 C23 A23 A24 C24 C25 B24 C28 B27 C27 B28 C29 A29 B30 A30 E31 E28 D28 F29 F30 D33 D32 D31 G27 F25 G26 D26 G29 G28 E27 F28 A34 C32 B34 C33 C31 B31
C30
C16 C20 G14 C26 A28 D29 D27 B33
B15 A21 D14 B25 A27 E30 E25 A33
A15 A20 E13 A25 A26 D30 E26 A32
G1 G92-750-A2
BGA1148 COMMON
H20 E18 E20 D23 G24 D24 G23 D20 E22 J21 E21 G20 F22 H21 E17 E19 D21 E23 F19 E24
G19 G25 G18 G22 G17 F15 G15
H17 J16 J24 H23
H24 J25
H16
J11 J12 J13
GND
FBC_CMD<0>F18 FBC_CMD<1> FBC_CMD<2> FBC_CMD<3> FBC_CMD<4> FBC_CMD<5> FBC_CMD<6> FBC_CMD<7> FBC_CMD<8> FBC_CMD<9> FBC_CMD<10> FBC_CMD<11> FBC_CMD<12> FBC_CMD<13> FBC_CMD<14> FBC_CMD<15> FBC_CMD<16> FBC_CMD<17> FBC_CMD<18> FBC_CMD<19> FBC_CMD<20> FBC_CMD<21>G21 FBC_CMD<22> FBC_CMD<23> FBC_CMD<24> FBC_CMD<25> SNN_FBC_CMD<26> SNN_FBC_CMD<27> SNN_FBC_CMD<28>
FBC_CLK0 FBC_CLK0* FBC_CLK1 FBC_CLK1*
SNN_FBC_RFU0 SNN_FBC_RFU1
SNN_FBC_DEBUG
SNN_FBC_PLLVDDH13
FBCD_PLLAVDD
GND
C703 .1UF
16V 10% X7R 0402 COMMON
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
FBC_CMD<28..0>
7.1G<
7.1G<
7.1G<
7.1G<
7.2A<
7.2A<
7.2D<
7.2D<
7.1A<
8.4A<> 7.1G<
8.4A<>
8.5A<>
8.5A<>
8.1G<>
8.1G<>
8.1G<>
8.1G<>
PEX_VDD
240R@100MHz
C32 1UF
6.3V 10% X5R 0402 COMMON
LB2
BEAD_0402
C27
4.7UF
6.3V 20% X5R 0603 COMMON
GNDGND
COMMON
C34
4.7UF
6.3V 20% X5R 0603 COMMON
GND
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. FrameBuffer - GPU Partition C/D
www.vinafix.vn
FBD_D<63..0> FBD_DQM<7..0> FBD_DQS_RN<7..0> FBD_DQS_WP<7..0>
G1 G92-750-A2
BGA1148 COMMON
FBD_CMD<0>
FBD_D<0>
0
FBD_D<1>
1
FBD_D<2>
2
FBD_D<3>
3
FBD_D<4>
4
FBD_D<5>
5
FBD_D<6>
6
FBD_D<7>
7
FBD_D<8>
8
FBD_D<9>
9
FBD_D<10>
10
FBD_D<11>
11
FBD_D<12>
12
FBD_D<13>
13
FBD_D<14>
14
FBD_D<15>
15
FBD_D<16>
16
FBD_D<17>
17
FBD_D<18>
18
FBD_D<19>
19
FBD_D<20>
20
FBD_D<21>
21
FBD_D<22>
22
FBD_D<23>
23
FBD_D<24>
24
FBD_D<25>
25
FBD_D<26>
26
FBD_D<27>
27
FBD_D<28>
28
FBD_D<29>
29
FBD_D<30>
30
FBD_D<31>
31
FBD_D<32>
32
FBD_D<33>
33
FBD_D<34>
34
FBD_D<35>
35
FBD_D<36>
36
FBD_D<37>
37
FBD_D<38>
38
FBD_D<39>
39
FBD_D<40>
40
FBD_D<41>
41
FBD_D<42>
42
FBD_D<43>
43
FBD_D<44>
44
FBD_D<45>
45
FBD_D<46>
46
FBD_D<47>
47
FBD_D<48>
48
FBD_D<49>
49
FBD_D<50>
50
FBD_D<51>
51
FBD_D<52>
52
FBD_D<53>
53
FBD_D<54>
54
FBD_D<55>
55
FBD_D<56>
56
FBD_D<57>
57
FBD_D<58>
58
FBD_D<59>
59
FBD_D<60>
60
FBD_D<61>
61
FBD_D<62>
62
FBD_D<63>
63
FBD_DQM<0>
0
FBD_DQM<1>
1
FBD_DQM<2>
2
FBD_DQM<3>
3
FBD_DQM<4>
4
FBD_DQM<5>
5
FBD_DQM<6>
6
FBD_DQM<7>
7
FBD_DQS_RN<0>
0
FBD_DQS_RN<1>
1
FBD_DQS_RN<2>
2
FBD_DQS_RN<3>
3
FBD_DQS_RN<4>
4
FBD_DQS_RN<5>
5
FBD_DQS_RN<6>
6
FBD_DQS_RN<7>
7
FBD_DQS_WP<0>
0
FBD_DQS_WP<1>
1
FBD_DQS_WP<2>
2
FBD_DQS_WP<3>
3
FBD_DQS_WP<4>
4
FBD_DQS_WP<5>
5
FBD_DQS_WP<6>
6
FBD_DQS_WP<7>
7
J3 G5 J1 J2 M3 K3 L3 M1 H1 G3 G1 G2 F3 E1 D1 D2 P4 N7 M7 N5 P5 R7 T7 P7 C1 C5 C2 B4 A3 B3 C4 C3 A8 C6 C7 A7 C8 C9 A9 B9
E12
E9
F9 G10 D10 G12 F12 D11
F4
E4
D4
D5
D8
E7
D7
D9 B13 C11 A13 C13 A11 A10 B10 C10
K2
E3
N4
D3
B7 G11
F5 C12
K1
F2
R6
A4
B6 E10
E6 A12
L1
F1
R5
A5
A6 E11
D6 B12
M6H3
FBD_CMD<1> FBD_CMD<2>
L7
FBD_CMD<3>
K5
FBD_CMD<4>
J10
FBD_CMD<5>
G8
FBD_CMD<6>
F8
FBD_CMD<7>
G6
FBD_CMD<8>
H6
FBD_CMD<9>
F6
FBD_CMD<10>
K8
FBD_CMD<11>
L5
FBD_CMD<12>
H4
FBD_CMD<13>
G4
FBD_CMD<14>
K9
FBD_CMD<15>
L4
FBD_CMD<16>
K4
FBD_CMD<17>
K7
FBD_CMD<18>
G7
FBD_CMD<19>
J4
FBD_CMD<20>
F7
FBD_CMD<21>
J5
FBD_CMD<22>
J6
FBD_CMD<23>
H7
FBD_CMD<24>
L8
FBD_CMD<25>
J7
SNN_FBD_CMD<26>
M5
SNN_FBD_CMD<27>
H9
SNN_FBD_CMD<28>
G9
FBD_CLK0
L9
FBD_CLK0*
M9
FBD_CLK1
J9
FBD_CLK1*
J8
H10 L11
N8
H11
H12
GND
SNN_FBD_RFU0 SNN_FBD_RFU1
SNN_FBD_DEBUG ADD A SMALL TESTPOINT ON THIS SNN NET IN BOARD FILEADD A SMALL TESTPOINT ON THIS SNN NET IN BOARD FILE
SNN_FBD_PLLVDD
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
FBD_CMD<28..0>
8.1G<
8.1G<
8.1G<
8.1G<
8.2A<
8.2A<
8.2D<
8.2D<
8.1A< 8.1G<
602-10817-0004-200 A
p817_a02 phchan
4 OF 21
22-AUG-2008
Page 5
Page5: FrameBuffer - Partition A 32Mx32 BGA136 GDDR3
IN
S
D
G
INININININBIBIBIINBIINININININ
IN
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6 A7
BA2
CLK CLK
NC/RFU SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
IN
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
INININ
NONMIRRORED
VDD VDD
VDD VDD VDD VDD VDD
VDDQ VDDQ
VDD
VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ
VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS VSS VSS
VSSQ
VSS
VSS
VSS
VSS VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND) VSSA (GND)
VDDA (VDD)
RAS CAS
CS0
WE
A0 A2
A3 A4 A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU SEN (GND)
CLK
CLK
CKE
RESET MF (GND) ZQ
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
BIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
5.1G< 3.1D>
R509
475
1%
0402
COMMON
3.3D> 5.1G<
3.3D> 5.1G<
MUST BE PLACED as close as possible to the BGA memory on the line AFTER the MEMORY pin!!
Minimize the stub length!!
CMD-Addr Mapping 144 136 ADDR
CMD15 CMD1 RAS* CMD25 CMD10 CAS* CMD9 CMD11 WE* CMD8 CMD8 CS0* CMD7 CMD7 BA2 CMD1 CMD19 A<0> CMD3 CMD25 A<1> CMD2 CMD22 0A<2> CMD0 CMD24 0A<3> CMD24 CMD0 0A<4> CMD22 CMD2 0A<5> CMD13 CMD4 1A<2> CMD4 CMD6 1A<3> CMD5 CMD5 1A<4> CMD6 CMD13 1A<5> CMD21 CMD21 A<6> CMD23 CMD16 A<7> CMD19 CMD23 A<8> CMD20 CMD20 A<9> CMD17 CMD17 A<10> CMD16 CMD9 A<11> CMD10 CMD12 BA0 CMD18 CMD3 BA1 CMD11 CMD18 CKE CMD12 CMD15 RST
FBA_CMD<28..0>
*
M7
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
H11 K10
K11
H10
J11 J10
H3 F4 H9 F9
K4 H2 K3 M4 K9
L9 M9
K2 L4
G4 G9
H4
J2 J3 V4
1 10 11 8
19 25 22 24 0 2 21 16 23 20 17 9
12 3 7
18
14
FBA_CMD<1> FBA_CMD<10> FBA_CMD<11> FBA_CMD<8>
FBA_CMD<19>
FBA_CMD<25> FBA_CMD<22> FBA_CMD<24> FBA_CMD<0> FBA_CMD<2>
FBA_CMD<21>
FBA_CMD<16>
FBA_CMD<23>
FBA_CMD<20>
FBA_CMD<17>
FBA_CMD<9>
FBA_CMD<12>
FBA_CMD<3>
FBA_CMD<7>
FBA_CMD<18>
FBA_CLK0
FBA_CLK0*
SNN_FBA0_NC
FBA_CMD<14>
FBA_SEN0
15
FBA_CMD<15>
V9 A9
R506
10K
0402
COMMON
FBA_ZQ0
R49
R52
243
10K
1%
5%
5%
0402 COMMON
0402 COMMON
R504 1K
1% 0402 COMMON
A4
GND
FBVDDQ
F1 M1 A2 V2 A11 V11 F12 M12
A1 C1 E1 N1 R1 V1 C4 E4 J4 N4 R4 C9 E9 J9 N9 R9 A12 C12 E12 N12 R12 V12
B1 D1 P1 T1 G2 L2 B4 D4 P4 T4 B9 D9 P9 T9 G11 L11 B12 D12 P12 T12
GND
5.1G<
5.1G<
MUST BE PLACED as close as possible to the BGA memory on the line AFTER the MEMORY pin!!
Minimize the stub length!!
FBVDDQ
G1
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_DQM<1> FBA_DQS_RN<1> FBA_DQS_WP<1>
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_DQM<5> FBA_DQS_RN<5> FBA_DQS_WP<5>
L1 A3 V3 A10 V10 G12 L12
H1 H12
GND
FBA_VREF0
GND
FBB_VREF0
C91 .01UF
16V 10% X7R 0402 COMMON
*
M7
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
G3 B3 C3 F3 C2 E2 B2 F2
E3 D3 D2
*
M8
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
C2 F3 G3 B2 C3 F2 E2 B3
E3 D3 D2
GND
C79 .01UF
16V 10% X7R 0402 COMMON
K1
K12
C515C532
FBA_D<0> FBA_D<1> FBA_D<2> FBA_D<3> FBA_D<4> FBA_D<5> FBA_D<6> FBA_D<7>
FBA_DQM<0> FBA_DQS_RN<0> FBA_DQS_WP<0>
FBA_D<32> FBA_D<33> FBA_D<34> FBA_D<35> FBA_D<36> FBA_D<37> FBA_D<38> FBA_D<39>
FBA_DQM<4> FBA_DQS_RN<4>
.047UF
16V 10% X7R 0402 COMMON
J12
J1
T3 T2 R3 R2 L3 M3 M2 N2
N3 P3 P2
L10 T11 N11 M11 M10 R10 T10 R11
N10 P10 P11FBA_DQS_WP<4>
*
M7
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
*
M8
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
GND
.047UF
16V 10% X7R 0402 COMMON
0 1 2 3 4 5 6 7
32 33 34 35 36 37 38 39
5.1G<> 3.1A<>
5.1G<> 3.2A>
5.1G<> 3.2A<
5.1G<> 3.2A>
FBA_D<63..0>
FBA_DQM<7..0>
FBA_DQS_RN<7..0>
FBA_DQS_WP<7..0>
FBA_DQM<0>
0
FBA_DQM<1>
1
FBA_DQM<2>
2
FBA_DQM<3>
3
FBA_DQM<4>
4
FBA_DQM<5>
5
FBA_DQM<6>
6
FBA_DQM<7>
7
FBA_DQS_RN<0>
0
FBA_DQS_RN<1>
1
FBA_DQS_RN<2>
2
FBA_DQS_RN<3>
3
FBA_DQS_RN<4>
4
FBA_DQS_RN<5>
5
FBA_DQS_RN<6>
6
FBA_DQS_RN<7>
7
FBA_DQS_WP<0>
0
FBA_DQS_WP<1>
1
FBA_DQS_WP<2>
2
FBA_DQS_WP<3>
3
FBA_DQS_WP<4>
4
FBA_DQS_WP<5>
5
FBA_DQS_WP<6>
6
FBA_DQS_WP<7>
7
CMD-Addr Mapping 144 136 ADDR
CMD15 CMD1 RAS* CMD25 CMD10 CAS* CMD9 CMD11 WE* CMD8 CMD8 CS0* CMD7 CMD7 BA2 CMD1 CMD19 A<0> CMD3 CMD25 A<1> CMD2 CMD22 0A<2> CMD0 CMD24 0A<3> CMD24 CMD0 0A<4> CMD22 CMD2 0A<5> CMD13 CMD4 1A<2> CMD4 CMD6 1A<3> CMD5 CMD5 1A<4> CMD6 CMD13 1A<5> CMD21 CMD21 A<6> CMD23 CMD16 A<7> CMD19 CMD23 A<8> CMD20 CMD20 A<9> CMD17 CMD17 A<10> CMD16 CMD9 A<11> CMD10 CMD12 BA0 CMD18 CMD3 BA1 CMD11 CMD18 CKE CMD12 CMD15 RST
3.3D>
3.3D>
R513
475
0402
COMMON
1%
FBVDDQ
6.1G<
*
M7
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
20
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_DQM<2> FBA_DQS_RN<2> FBA_DQS_WP<2>
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50> E11
50
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_DQM<6> FBA_DQS_RN<6> FBA_DQS_WP<6>
B10FBA_D<16> F10 C10 B11 G10 E11 F11 C11
E10 D10 D11
*
M8
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
B11 F11
C11 F10 C10 B10 G10
E10 D10 D11
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_DQM<3> FBA_DQS_RN<3> FBA_DQS_WP<3>
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58> N2
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DQM<7> FBA_DQS_RN<7> FBA_DQS_WP<7>
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. FrameBuffer - Partition A 32Mx32 BGA136 GDDR3
www.vinafix.vn
1 10 11 8
19 25 4 6 5 13 21 16 23 20 17 9
12 3 7
18
14
15
FBVDDQ
GND
R10FBA_D<24> T10 L10 M10 R11 T11 N11 M11
N10 P10 P11
R2 L3
M2 T2 T3 R3 M3
N3 P3 P2
FBA_CMD<4> FBA_CMD<6> FBA_CMD<5> FBA_CMD<13>
R525
COMMON
C510 .047UF
16V 10% X7R 0402 COMMON
FBA_CMD<1> FBA_CMD<10> FBA_CMD<11> FBA_CMD<8>
FBA_CMD<19> FBA_CMD<25>
FBA_CMD<21> FBA_CMD<16> FBA_CMD<23> FBA_CMD<20> FBA_CMD<17> FBA_CMD<9>
FBA_CMD<12> FBA_CMD<3> FBA_CMD<7>
FBA_CMD<18> FBA_CLK1 FBA_CLK1*
SNN_FBA1_NC FBA_CMD<14> FBA_SEN1
FBA_CMD<15>
FBA_ZQ1
R507
243
0402
1K
1%
1%
0402
COMMON
GND
C569 .047UF
16V 10% X7R 0402 COMMON
*
M7
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
*
M8
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
GND
*
M8
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
H10
F9 H4 F4
K9 H11 K10
M9
K4
H2
K3
L4
K2
M4 K11
L9
G9
G4
H3
H9 J11 J10
J2
J3
V4
V9
A9
A4
K1 K12
J1 J12
F1 M1 A2 V2 A11 V11 F12 M12
A1 C1 E1 N1 R1 V1 C4 E4 J4 N4 R4 C9 E9 J9 N9 R9 A12 C12 E12 N12 R12 V12
B1 D1 P1 T1 G2 L2 B4 D4 P4 T4 B9 D9 P9 T9 G11 L11 B12 D12 P12 T12
G1 L1 A3 V3 A10 V10 G12 L12
H1 H12
FBVDDQ
FBA_VREF0
GND
GND
GND
5.2A<
5.2A<
5.2D<
5.2D<
5.1A<
5.4A<>
5.4A<>
5.5A<>
5.5A<>
C96 .01UF
16V 10% X7R 0402 COMMON
3.3D>
3.3D>
3.3D>
3.3D>
3.1D>
3.1A<>
3.2A>
3.2A<
3.2A>
FBVDDQ
R526
549
1%
0402
COMMON
R528
1.1K
1% 16V
0402
COMMON
GND
NET
FBA_CLK0 FBA_CLK0* FBA_CLK1 FBA_CLK1*
FBA_CMD<25..0>
FBA_D<63..0>
FBA_DQM<7..0>
FBA_DQS_RN<7..0>
FBA_DQS_WP<7..0>
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
1 1 1 1
1
1
1
1
1
NV_IMPEDANCENV_CRITICALDIFFPAIR
80DIFF 80DIFF 80DIFF 80DIFF
40OHM
40OHM
40OHM
40OHM
40OHM
NET
FBA_VREF0
FBAB_VREF FBA_VREF_CTL0
FBA_ZQ0 FBA_ZQ1
MIN_LINE_WIDTH
10MIL
10MIL 10MIL
10MIL 10MIL
R1
FBA_VREF_CTL0
1.1K
R42
COMMON
0402
1%
C550 .01UF
R2
10% X7R 0402 COMMON
CONTINUOUS_CURRENT=0.115A
2N7002
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=60V
R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W
V_BE_GS=20V
Q12
3
1G1D1S
GPIO10_FB_VREF_SW
1
2
6.3H< 7.3H< 8.3H<
10.2D>
GND
602-10817-0004-200 A
p817_a02 phchan
5 OF 21
22-AUG-2008
Page 6
IN
S
D
G
ININININBIBIBIININININBIINININ
S
D
G
IN
IN
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6 A7
BA2
CLK CLK
NC/RFU SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
INININ
NONMIRRORED
VDD VDD
VDD VDD VDD VDD VDD
VDDQ VDDQ
VDD
VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ
VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS VSS VSS
VSSQ
VSS
VSS
VSS
VSS VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND) VSSA (GND)
VDDA (VDD)
RAS CAS
CS0
WE
A0 A2
A3 A4 A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU SEN (GND)
CLK
CLK
CKE
RESET MF (GND) ZQ
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
BIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Page6: FrameBuffer - Partition B 32Mx32 BGA136 GDDR3
R510
475
1%
0402
COMMON
3.3H>
6.1G<
3.3H>
6.1G<
MUST BE PLACED as close as possible to the BGA memory on the line AFTER the MEMORY pin!!
Minimize the stub length!!
3.1H> 6.1G<
CMD-Addr Mapping 144 136 ADDR
CMD15 CMD1 RAS* CMD25 CMD10 CAS* CMD9 CMD11 WE* CMD8 CMD8 CS0* CMD7 CMD7 BA2 CMD1 CMD19 A<0> CMD3 CMD25 A<1> CMD2 CMD22 0A<2> CMD0 CMD24 0A<3> CMD24 CMD0 0A<4> CMD22 CMD2 0A<5> CMD13 CMD4 1A<2> CMD4 CMD6 1A<3> CMD5 CMD5 1A<4> CMD6 CMD13 1A<5> CMD21 CMD21 A<6> CMD23 CMD16 A<7> CMD19 CMD23 A<8> CMD20 CMD20 A<9> CMD17 CMD17 A<10> CMD16 CMD9 A<11> CMD10 CMD12 BA0 CMD18 CMD3 BA1 CMD11 CMD18 CKE CMD12 CMD15 RST
FBB_CMD<28..0>
1 10 11 8
19 25 22 24 0 2 21 16 23 20 17 9
12 3 7
18
14
15
FBB_CMD<1> FBB_CMD<10> FBB_CMD<11> FBB_CMD<8>
FBB_CMD<19>
FBB_CMD<25> FBB_CMD<22> FBB_CMD<24> FBB_CMD<0> FBB_CMD<2>
FBB_CMD<21>
FBB_CMD<16>
FBB_CMD<23>
FBB_CMD<20>
FBB_CMD<17>
FBB_CMD<9>
FBB_CMD<12>
FBB_CMD<3>
FBB_CMD<7>
FBB_CMD<18> FBB_CLK0 FBB_CLK0*
SNN_FBB0_NC FBB_CMD<14> FBB_SEN0
FBB_CMD<15>
*
M5
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
H3 F4 H9 F9
K4 H2 K3 M4
K9 H11 K10
L9 K11
M9
K2
L4
G4
G9 H10
H4 J11 J10
J2
J3
V4
V9
A9
R505
10K
0402
COMMON
FBB_ZQ0
R44
R514
243
10K
1%
5%
5%
0402 COMMON
0402 COMMON
R502 1K
1% 0402 COMMON
A4
GND
FBVDDQ
F1 M1 A2 V2 A11 V11 F12 M12
A1 C1 E1 N1 R1 V1 C4 E4 J4 N4 R4 C9 E9 J9 N9 R9 A12 C12 E12 N12 R12 V12
B1 D1 P1 T1 G2 L2 B4 D4 P4 T4 B9 D9 P9 T9 G11 L11 B12 D12 P12 T12
GND
6.1G<
6.1G<
MUST BE PLACED as close as possible to the BGA memory on the line AFTER the MEMORY pin!!
Minimize the stub length!!
FBVDDQ
G1 L1 A3 V3 A10 V10 G12 L12
H1 H12
C78
.01UF
0402
COMMON
16V 10% X7R
GND
GND
*
M5
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
F2 E2 F3 G3 B3 C2 B2 C3
E3 D3 D2
*
M6
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
C2 F3 G3 B2 C3 F2 E2 B3
E3 D3 D2
R48
0402
FBB_VREF1
0
COMMON
5%
16 17 18 19 20 21 22 23
48 49 50 51 52 53 54 55
FBB_VREF0
FBB_D<17> FBB_D<18> FBB_D<19> FBB_D<20> FBB_D<21> FBB_D<22> FBB_D<23>
FBB_DQM<2> FBB_DQS_RN<2> FBB_DQS_WP<2>
FBB_D<48> FBB_D<49> FBB_D<50> FBB_D<51> M3 FBB_D<52> FBB_D<53> FBB_D<54> FBB_D<55>
FBB_DQM<6> FBB_DQS_RN<6> FBB_DQS_WP<6>
3.1E<> 6.1G<>
3.2E>
6.1G<>
3.2E<
6.1G<>
3.2E> 6.1G<>
FBB_D<63..0>
FBB_DQM<7..0>
FBB_DQS_RN<7..0>
FBB_DQS_WP<7..0>
K1 K12
C90 .047UF
16V 10% X7R 0402 COMMON
C540 .047UF
16V 10% X7R 0402 COMMON
J12
J1
GND
*
M5
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
FBB_D<0>
0
FBB_D<1>
1
FBB_D<2>
2
FBB_D<3>
3
FBB_D<4>
4
FBB_DQM<0>
0
FBB_DQM<1>
1
FBB_DQM<2>
2
FBB_DQM<3>
3
FBB_DQM<4>
4
FBB_DQM<5>
5
FBB_DQM<6>
6
FBB_DQM<7>
7
FBB_DQS_RN<0>
0
FBB_DQS_RN<1>
1
FBB_DQS_RN<2>
2
FBB_DQS_RN<3>
3
FBB_DQS_RN<4>
4
FBB_DQS_RN<5>
5
FBB_DQS_RN<6>
6
FBB_DQS_RN<7>
7
FBB_DQS_WP<0>
0
FBB_DQS_WP<1>
1
FBB_DQS_WP<2>
2
FBB_DQS_WP<3>
3
FBB_DQS_WP<4>
4
FBB_DQS_WP<5>
5
FBB_DQS_WP<6>
6
FBB_DQS_WP<7>
7
5 6 7
32 33 34 35 36 37 38 39
FBB_D<5> FBB_D<6> FBB_D<7>
FBB_DQM<0> FBB_DQS_RN<0> FBB_DQS_WP<0>
FBB_D<32> FBB_D<33> FBB_D<34> FBB_D<35> FBB_D<36> FBB_D<37> FBB_D<38> FBB_D<39>
FBB_DQM<4> FBB_DQS_RN<4> FBB_DQS_WP<4>
T2 T3 R2 R3 M3 L3 M2 N2
N3 P3 P2
*
M6
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
C10 B11 C11 B10 E11 F10 F11 G10
E10 D10 D11
8 9 10 11 12 13 14 15
40 41 42 43 44 45 46 47
FBB_D<8> FBB_D<9> FBB_D<10> FBB_D<11> FBB_D<12> FBB_D<13> FBB_D<14> FBB_D<15>
FBB_DQM<1> FBB_DQS_RN<1> FBB_DQS_WP<1>
FBB_D<40> FBB_D<41> FBB_D<42> FBB_D<43> FBB_D<44> FBB_D<45> FBB_D<46> FBB_D<47>
FBB_DQM<5> FBB_DQS_RN<5> FBB_DQS_WP<5>
CMD-Addr Mapping 144 136 ADDR
CMD15 CMD1 RAS* CMD25 CMD10 CAS* CMD9 CMD11 WE* CMD8 CMD8 CS0* CMD7 CMD7 BA2 CMD1 CMD19 A<0> CMD3 CMD25 A<1> CMD2 CMD22 0A<2> CMD0 CMD24 0A<3> CMD24 CMD0 0A<4> CMD22 CMD2 0A<5> CMD13 CMD4 1A<2> CMD4 CMD6 1A<3> CMD5 CMD5 1A<4> CMD6 CMD13 1A<5> CMD21 CMD21 A<6> CMD23 CMD16 A<7> CMD19 CMD23 A<8> CMD20 CMD20 A<9> CMD17 CMD17 A<10> CMD16 CMD9 A<11> CMD10 CMD12 BA0 CMD18 CMD3 BA1 CMD11 CMD18 CKE CMD12 CMD15 RST
3.3H>
3.3H>
R512
475
0402
COMMON
1%
FBVDDQ
R47 549
R1
1%
0402
COMMON
R43
1.1K
0402
COMMON
R2
1%
R41
0402
C88 .01UF
16V 10% X7R 0402 COMMON
1.1K
COMMON
1%
GND
*
M5
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
C11FBB_D<16> G10 C10 B11 B10 F11 F10 E11
E10 D10 D11
*
M6
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
R3 T3 T2
R2 M2 L3 N2
N3 P3 P2
FBB_D<24>
24
FBB_D<25>
25
FBB_D<26>
26
FBB_D<27>
27
FBB_D<28>
28
FBB_D<29>
29
FBB_D<30>
30
FBB_D<31>
31
FBB_DQM<3> FBB_DQS_RN<3> FBB_DQS_WP<3>
FBB_D<56>
56
FBB_D<57>
57
FBB_D<58>
58
FBB_D<59> R11
59
FBB_D<60>
60
FBB_D<61>
61
FBB_D<62>
62
FBB_D<63>
63
FBB_DQM<7> FBB_DQS_RN<7> FBB_DQS_WP<7>
FBVDDQ
*
M5
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
T11 T10 R10 M10 N11 M11 R11 L10
N10 P10 P11
*
M6
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
T11 R10 N11
M10 M11 T10 L10
N10 P10 P11
1 10 11 8
19 25 4 6 5 13 21 16 23 20 17 9
12 3 7
18
14
15
FBVDDQ
GND
FBB_CMD<1> FBB_CMD<10> FBB_CMD<11> FBB_CMD<8>
FBB_CMD<19>
FBB_CMD<25> FBB_CMD<4> FBB_CMD<6> FBB_CMD<5> FBB_CMD<13>
FBB_CMD<21>
FBB_CMD<16>
FBB_CMD<23>
FBB_CMD<20>
FBB_CMD<17>
FBB_CMD<9>
FBB_CMD<12>
FBB_CMD<3>
FBB_CMD<7>
FBB_CMD<18>
FBB_CLK1
FBB_CLK1*
SNN_FBB1_NC
FBB_CMD<14>
FBB_SEN1
FBB_CMD<15>
FBB_ZQ1
R45 243
1%
0402
COMMON
GND
.047UF
16V 10% X7R 0402 COMMON
R503
0402
COMMON
1K
1%
GND
C541C87 .047UF
16V 10% X7R 0402 COMMON
*
M6
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
H10
F9 H4 F4
K9 H11 K10
M9
K4
H2
K3
L4
K2
M4 K11
L9
G9
G4
H3
H9 J11 J10
J2
J3
V4
V9
A9
A4
K1 K12
J1 J12
GND
R1
R2
FBB_CLK0 FBB_CLK0* FBB_CLK1 FBB_CLK1*
FBB_D<63..0>
FBB_DQM<7..0>
FBB_DQS_RN<7..0>
FBB_DQS_WP<7..0> FBB_CMD<25..0>
NET
FBB_VREF0 FBB_VREF1 FBB_VREF_CTL FBB_VREF_CTL1
FBB_ZQ1
R39
0402
C84 .01UF
16V 10% X7R 0402 COMMON
3.3H>
6.2A<
3.3H>
6.2A<
3.3H>
6.2D<
3.3H>
6.2D<
3.1E<>
6.4A<>
3.2E>
6.4A<>
3.2E<
6.5A<>
FBVDDQ
F1 M1 A2 V2 A11 V11 F12 M12
A1 C1 FBB_ZQ0 E1 N1 R1 V1 C4 E4 J4 N4 R4 C9 E9 J9 N9 R9 A12 C12 E12 N12 R12 V12
B1 D1 P1 T1 G2 L2 B4 D4 P4 T4 B9 D9 P9 T9 G11 L11 B12 D12 P12 T12
G1 L1 A3 V3 A10 V10 G12 L12
FBB_VREF0
H1 H12
GND
GND
6.5A<>
6.1A<
GND
3.2E>
3.1H>
5.3D<
C85 .01UF
16V 10% X7R 0402 COMMON
R46 549
0402
COMMON
R40
1.1K
0402
COMMON
FBVDDQ
1%
1%
DIFFPAIRNET
FBB_CLK0 FBB_CLK0 FBB_CLK1 FBB_CLK1
1 1 1 1
1
1
1
1 1
NV_IMPEDANCENV_CRITICAL
80DIFF 80DIFF 80DIFF 80DIFF
40OHM
40OHM
40OHM
40OHM 40OHM
MIN_LINE_WIDTH
10MIL 10MIL 10MIL 10MIL 10MIL 10MIL
FBAB_VREF_CTL
1.1K
COMMON
1%
CONTINUOUS_CURRENT=0.115A
2N7002
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=60V
R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W
V_BE_GS=20V
Q11
3
1G1D1S
GPIO10_FB_VREF_SW
1
2
8.3H<
7.3H< 5.3H<
10.2D>
GND
FBB_VREF_CTL1
CONTINUOUS_CURRENT=0.115A
2N7002
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=60V
R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W
V_BE_GS=20V
Q10
GND
3
1G1D1S
1
2
www.vinafix.vn
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. FrameBuffer - Partition B 32Mx32 BGA136 GDDR3
602-10817-0004-200 A
p817_a02 phchan
6 OF 21
22-AUG-2008
Page 7
IN
S
D
G
INININININBIBIBIBIININININININININ
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6 A7
BA2
CLK CLK
NC/RFU SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
S
D
G
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
INININ
NONMIRRORED
VDD VDD
VDD VDD VDD VDD VDD
VDDQ VDDQ
VDD
VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ
VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS VSS VSS
VSSQ
VSS
VSS
VSS
VSS VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND) VSSA (GND)
VDDA (VDD)
RAS CAS
CS0
WE
A0 A2
A3 A4 A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU SEN (GND)
CLK
CLK
CKE
RESET MF (GND) ZQ
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
BIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
8 9 10 11 12 13 14 15
40 41 42 43 44 45 46 47
FBC_D<8> FBC_D<9> FBC_D<10> FBC_D<11> FBC_D<12> FBC_D<13> FBC_D<14> FBC_D<15>
FBC_DQM<1> FBC_DQS_RN<1> FBC_DQS_WP<1>
FBC_D<40> FBC_D<41> FBC_D<42> FBC_D<43> FBC_D<44> FBC_D<45> FBC_D<46> FBC_D<47>
FBC_DQM<5> FBC_DQS_RN<5> FBC_DQS_WP<5>
F1 M1 A2 V2 A11 V11 F12 M12
A1 C1 E1 N1 R1 V1 C4 E4 J4 N4 R4 C9 E9 J9 N9 R9 A12 C12 E12 N12 R12 V12
B1 D1 P1 T1 G2 L2 B4 D4 P4 T4 B9 D9 P9 T9 G11 L11 B12 D12 P12 T12
G1 L1 A3 V3 A10 V10 G12 L12
H1 H12
FBVDDQ
GND
GND
GND
FBC_VREF1
C39 .01UF
16V 10% X7R 0402 COMMON
F11 B11 C10 E11 B10 C11 G10 F10
E10 D10 D11
B2 G3 F3 C3 B3 F2 E2 C2
E3 D3 D2
COMMON
C601 .01UF
COMMON
16V 10% X7R 0402 COMMON
GND
*
M3
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
*
M4
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
4.2D>
7.1G<
4.3D>
7.1G<
MUST BE PLACED as close as possible to the BGA memory on the line AFTER the MEMORY pin!!
Minimize the stub length!!
0
R34
COMMON
0402
5%
FBVDDQ
R32 549
R1
1%
0402
R31
1.1K
R2
1%
0402
GND
FBC_D<16>
16
FBC_D<17>
17
FBC_D<18>
18
FBC_D<19>
19
FBC_D<20>
20
FBC_D<21>
21
FBC_D<22>
22
FBC_D<23>
23
FBC_DQM<2> FBC_DQS_RN<2> FBC_DQS_WP<2>
FBC_D<48>
48
FBC_D<49>
49
FBC_D<50>
50
FBC_D<51> M11
51
FBC_D<52>
52
FBC_D<53>
53
FBC_D<54>
54
FBC_D<55>
55
FBC_DQM<6> FBC_DQS_RN<6> FBC_DQS_WP<6>
Page7: FrameBuffer - Partition C 32Mx32 BGA136 GDDR3
4.1D> 7.1G<
R558
475
1%
0402
COMMON
4.2D> 7.1G<
4.2D> 7.1G<
MUST BE PLACED as close as possible to the BGA memory on the line AFTER the MEMORY pin!!
Minimize the stub length!!
FBC_CMD<28..0>
CMD-Addr Mapping 144 136 ADDR
CMD15 CMD1 RAS* CMD25 CMD10 CAS* CMD9 CMD11 WE* CMD8 CMD8 CS0* CMD7 CMD7 BA2 CMD1 CMD19 A<0> CMD3 CMD25 A<1> CMD2 CMD22 0A<2> CMD0 CMD24 0A<3> CMD24 CMD0 0A<4> CMD22 CMD2 0A<5> CMD13 CMD4 1A<2> CMD4 CMD6 1A<3> CMD5 CMD5 1A<4> CMD6 CMD13 1A<5> CMD21 CMD21 A<6> CMD23 CMD16 A<7> CMD19 CMD23 A<8> CMD20 CMD20 A<9> CMD17 CMD17 A<10> CMD16 CMD9 A<11> CMD10 CMD12 BA0 CMD18 CMD3 BA1 CMD11 CMD18 CKE CMD12 CMD15 RST
1 10 11 8
19 25 22 24 0 2 21 16 23 20 17 9
12 3 7
18
14
15
FBC_CMD<1> FBC_CMD<10> FBC_CMD<11> FBC_CMD<8>
FBC_CMD<19>
FBC_CMD<25> FBC_CMD<22> FBC_CMD<24> FBC_CMD<0> FBC_CMD<2>
FBC_CMD<21>
FBC_CMD<16>
FBC_CMD<23>
FBC_CMD<20>
FBC_CMD<17>
FBC_CMD<9>
FBC_CMD<12>
FBC_CMD<3>
FBC_CMD<7>
FBC_CMD<18> FBC_CLK0 FBC_CLK0*
SNN_FBC0_NC FBC_CMD<14> FBC_SEN0
FBC_CMD<15>
*
M3
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
H3 F4 H9 F9
K4 H2 K3 M4
K9 H11 K10
L9 K11
M9
K2
L4
G4
G9 H10
H4 J11 J10
J2
J3
V4
V9
A9
R541
10K
0402
COMMON
FBC_ZQ0
R30
R540
243
10K
1%
5%
5%
0402 COMMON
0402 COMMON
R553 1K
1% 0402 COMMON
A4
GND
FBVDDQ
K1 K12
C49C579 .047UF
16V 10% X7R 0402 COMMON
R11 N11 L10 M10 T11 M11 R10 T10
N10 P10 P11
C10 F11 B11 C11 B10 E11 F10 G10
E10 D10 D11
J12
J1
*
M3
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
*
M4
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
4.1A<> 7.1G<>
4.1A>
7.1G<>
4.1A< 7.1G<>
4.1A> 7.1G<>
FBC_D<63..0>
FBC_DQM<7..0>
FBC_DQS_RN<7..0>
FBC_DQS_WP<7..0>
.047UF
16V 10% X7R 0402 COMMON
GND
FBC_D<0>
0
FBC_D<1>
1
FBC_D<2>
2
FBC_D<3>
3
FBC_D<4>
4
FBC_DQM<0>
0
FBC_DQM<1>
1
FBC_DQM<2>
2
FBC_DQM<3>
3
FBC_DQM<4>
4
FBC_DQM<5>
5
FBC_DQM<6>
6
FBC_DQM<7>
7
FBC_DQS_RN<0>
0
FBC_DQS_RN<1>
1
FBC_DQS_RN<2>
2
FBC_DQS_RN<3>
3
FBC_DQS_RN<4>
4
FBC_DQS_RN<5>
5
FBC_DQS_RN<6>
6
FBC_DQS_RN<7>
7
FBC_DQS_WP<0>
0
FBC_DQS_WP<1>
1
FBC_DQS_WP<2>
2
FBC_DQS_WP<3>
3
FBC_DQS_WP<4>
4
FBC_DQS_WP<5>
5
FBC_DQS_WP<6>
6
FBC_DQS_WP<7>
7
5 6 7
32 33 34 35 36 37 38 39
FBC_D<5> FBC_D<6> FBC_D<7>
FBC_DQM<0> FBC_DQS_RN<0> FBC_DQS_WP<0>
FBC_D<32> FBC_D<33> FBC_D<34> FBC_D<35> FBC_D<36> FBC_D<37> FBC_D<38> FBC_D<39>
FBC_DQM<4> FBC_DQS_RN<4> FBC_DQS_WP<4>
CMD-Addr Mapping 144 136 ADDR
CMD15 CMD1 RAS* CMD25 CMD10 CAS* CMD9 CMD11 WE* CMD8 CMD8 CS0* CMD7 CMD7 BA2 CMD1 CMD19 A<0> CMD3 CMD25 A<1> CMD2 CMD22 0A<2> CMD0 CMD24 0A<3> CMD24 CMD0 0A<4> CMD22 CMD2 0A<5> CMD13 CMD4 1A<2> CMD4 CMD6 1A<3> CMD5 CMD5 1A<4> CMD6 CMD13 1A<5> CMD21 CMD21 A<6> CMD23 CMD16 A<7>
R33
0402
R536
475
0402
COMMON
FBC_VREF0
1.1K
COMMON
1%
1%
FBC_VREF_CTL1
CONTINUOUS_CURRENT=0.115A
2N7002
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=60V
R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W
V_BE_GS=20V
CMD19 CMD23 A<8> CMD20 CMD20 A<9> CMD17 CMD17 A<10> CMD16 CMD9 A<11> CMD10 CMD12 BA0 CMD18 CMD3 BA1 CMD11 CMD18 CKE CMD12 CMD15 RST
3
1G1D1S
Q9
1
2
GND
*
M3
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
M3 R2 M2 L3 N2 T3 T2 R3
N3 P3 P2
*
M4
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
T11 R11 N11
T10 M10 L10 R10
N10 P10 P11
FBC_D<24>
24
FBC_D<25>
25
FBC_D<26>
26
FBC_D<27>
27
FBC_D<28>
28
FBC_D<29>
29
FBC_D<30>
30
FBC_D<31>
31
FBC_DQM<3> FBC_DQS_RN<3> FBC_DQS_WP<3>
FBC_D<56>
56
FBC_D<57>
57
FBC_D<58>
58
FBC_D<59> L3
59
FBC_D<60>
60
FBC_D<61>
61
FBC_D<62>
62
FBC_D<63>
63
FBC_DQM<7> FBC_DQS_RN<7> FBC_DQS_WP<7>
FBVDDQ
1 10 11 8
19 25
FBC_CMD<4>
4
FBC_CMD<6>
6
FBC_CMD<5>
5
FBC_CMD<13>
13 21 16 23 20 17 9
12 3 7
18
14
15
R534
COMMON
FBVDDQ
C606 .047UF
16V 10% X7R 0402 COMMON
GND
*
M3
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
G3 F3 E2 B3 B2 C2 F2 C3
E3 D3 D2
*
M4
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
N2 M2 R2
M3 T2 R3 T3
N3 P3 P2
243
0402
1%
FBC_CMD<1> FBC_CMD<10> FBC_CMD<11> FBC_CMD<8>
FBC_CMD<19> FBC_CMD<25>
FBC_CMD<21> FBC_CMD<16> FBC_CMD<23>
FBC_CMD<17> FBC_CMD<9>
FBC_CMD<12> FBC_CMD<3> FBC_CMD<7>
FBC_CMD<18> FBC_CLK1 FBC_CLK1*
SNN_FBC1_NC FBC_CMD<14> FBC_SEN1
FBC_CMD<15>
FBC_ZQ1
R535
COMMON
GND
0402
1K
1%
GND
C538 .047UF
16V 10% X7R 0402 COMMON
*
M4
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
H10
F9 H4 F4
K9 H11 K10
M9
K4
H2
K3
L4
K2
M4FBC_CMD<20> K11
L9
G9
G4
H3
H9 J11 J10
J2
J3
V4
V9
A9
A4
K1 K12
J1 J12
F1 M1 A2 V2 A11 V11 F12 M12
A1 C1 E1 N1 R1 V1 C4 E4 J4 N4 R4 C9 E9 J9 N9 R9 A12 C12 E12 N12 R12 V12
B1 D1 P1 T1 G2 L2 B4 D4 P4 T4 B9 D9 P9 T9 G11 L11 B12 D12 P12 T12
G1 L1 A3 V3 A10 V10 G12 L12
H1 H12
FBVDDQ
FBC_VREF0
GND
GND
GND
C50 .01UF
16V 10% X7R 0402 COMMON
7.2A<
7.2A<
7.2D<
7.2D<
7.1A<
7.4A<>
7.4A<>
7.5A<>
7.5A<>
4.2D>
4.2D>
4.2D>
4.3D>
4.1D>
4.1A<>
4.1A>
4.1A<
4.1A>
R530
549
0402
COMMON
R531
1.1K
0402
COMMON
FBVDDQ
1%
1%
GND
NV_IMPEDANCENV_CRITICAL
80DIFF 80DIFF 80DIFF 80DIFF 40OHM
40OHM 40OHM
40OHM 40OHM
FBC_CLK0 FBC_CLK0* FBC_CLK1 FBC_CLK1* FBC_CMD<25..0>
FBC_D<63..0> FBC_DQM<7..0>
FBC_DQS_RN<7..0> FBC_DQS_WP<7..0>
DIFFPAIRNET
FBC_CLK0 FBC_CLK0 FBC_CLK1 FBC_CLK1
1 1 1 1 1
1 1
1 1
NET
FBC_VREF0 FBC_VREF1
FBC_VREF_CTL0 FBC_VREF_CTL1 FBC_ZQ0 FBC_ZQ1
MIN_LINE_WIDTH
10MIL 10MIL
10MIL 10MIL 10MIL 10MIL
R1
FBC_VREF_CTL0
1.1K
R529
COMMON
0402
1%
C578 .01UF
R2
16V 10% X7R 0402 COMMON
CONTINUOUS_CURRENT=0.115A
2N7002
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=60V
R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W
V_BE_GS=20V
Q501
3
1G1D1S
GPIO10_FB_VREF_SW
1
2
5.3H<
10.2D>
8.3H< 6.3H<
GND
www.vinafix.vn
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. FrameBuffer - Partition C 32Mx32 BGA136 GDDR3
602-10817-0004-200 A
p817_a02 phchan
7 OF 21
22-AUG-2008
Page 8
IN
S
D
G
INININININBIBIBIBIININININININ
S
D
G
IN
IN
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6 A7
BA2
CLK CLK
NC/RFU SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
INININ
NONMIRRORED
VDD VDD
VDD VDD VDD VDD VDD
VDDQ VDDQ
VDD
VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ VDDQ
VDDQ VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS VSS VSS
VSSQ
VSS
VSS
VSS
VSS VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND) VSSA (GND)
VDDA (VDD)
RAS CAS
CS0
WE
A0 A2
A3 A4 A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU SEN (GND)
CLK
CLK
CKE
RESET MF (GND) ZQ
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1 DQ2 DQ3
DQ5
DQM
DQ7
DQ6
BIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
8 9 10 11 12 13 14 15
40 41 42 43 44 45 46 47
FBD_D<8> FBD_D<9> FBD_D<10> FBD_D<11> FBD_D<12> FBD_D<13> FBD_D<14> FBD_D<15>
FBD_DQM<1> FBD_DQS_RN<1> FBD_DQS_WP<1>
FBD_D<40> FBD_D<41> FBD_D<42> FBD_D<43> FBD_D<44> FBD_D<45> FBD_D<46> FBD_D<47>
FBD_DQM<5> FBD_DQS_RN<5>
C724
.01UF
0402
COMMON
16V 10% X7R
F1 M1 A2 V2 A11 V11 F12 M12
A1 C1 E1 N1 R1 V1 C4 E4 J4 N4 R4 C9 E9 J9 N9 R9 A12 C12 E12 N12 R12 V12
B1 D1 P1 T1 G2 L2 B4 D4 P4 T4 B9 D9 P9 T9 G11 L11 B12 D12 P12 T12
G1 L1 A3 V3 A10 V10 G12 L12
H1 H12
FBVDDQ
GND
GND
GND
FBD_VREF1
*
M1
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
G3 C3 F2 F3 B3 E2 B2 C2
E3 D3 D2
*
M2
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
R2 T3 R3 M3 N2 L3 T2 M2
N3 P3 P2FBD_DQS_WP<5>
8.1G<
8.1G<
MUST BE PLACED as close as possible to the BGA memory on the line AFTER the MEMORY pin!!
Minimize the stub length!!
0
R22
COMMON
0402
5%
FBVDDQ
R10 549
R1
1%
0402
COMMON
R19
1.1K
R2
1%
0402
COMMON
GND
16
FBD_D<17>
17
FBD_D<18>
18
FBD_D<19>
19
FBD_D<20>
20
FBD_D<21>
21
FBD_D<22>
22
FBD_D<23>
23
FBD_DQM<2> FBD_DQS_RN<2> FBD_DQS_WP<2>
FBD_D<48>
48
FBD_D<49>
49
FBD_D<50>
50
FBD_D<51>
51
FBD_D<52>
52
FBD_D<53> N11
53
FBD_D<54>
54
FBD_D<55>
55
FBD_DQM<6> FBD_DQS_RN<6> FBD_DQS_WP<6>
Page8: FrameBuffer - Partition D 32Mx32 BGA136 GDDR3
R613
475
1%
0402
COMMON
8.1G< 4.2H>
8.1G< 4.2H>
MUST BE PLACED as close as possible to the BGA memory on the line AFTER the MEMORY pin!!
Minimize the stub length!!
4.1H> 8.1G<
CMD-Addr Mapping 144 136 ADDR
CMD15 CMD1 RAS* CMD25 CMD10 CAS* CMD9 CMD11 WE* CMD8 CMD8 CS0* CMD7 CMD7 BA2 CMD1 CMD19 A<0> CMD3 CMD25 A<1> CMD2 CMD22 0A<2> CMD0 CMD24 0A<3> CMD24 CMD0 0A<4> CMD22 CMD2 0A<5> CMD13 CMD4 1A<2> CMD4 CMD6 1A<3> CMD5 CMD5 1A<4> CMD6 CMD13 1A<5> CMD21 CMD21 A<6> CMD23 CMD16 A<7> CMD19 CMD23 A<8> CMD20 CMD20 A<9> CMD17 CMD17 A<10> CMD16 CMD9 A<11> CMD10 CMD12 BA0 CMD18 CMD3 BA1 CMD11 CMD18 CKE CMD12 CMD15 RST
FBD_CMD<28..0>
1 10 11 8
19 25 22 24 0 2 21 16 23 20 17 9
12 3 7
18
14
15
FBD_CMD<22> FBD_CMD<24> FBD_CMD<0> FBD_CMD<2>
FBD_CMD<1> FBD_CMD<10> FBD_CMD<11> FBD_CMD<8>
FBD_CMD<19> FBD_CMD<25>
FBD_CMD<21> FBD_CMD<16> FBD_CMD<23> FBD_CMD<20> FBD_CMD<17> FBD_CMD<9>
FBD_CMD<12> FBD_CMD<3> FBD_CMD<7>
FBD_CMD<18> FBD_CLK0 FBD_CLK0*
SNN_FBD0_NC FBD_CMD<14> FBD_SEN0
FBD_CMD<15>
*
M1
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
H3 F4 H9 F9
K4 H2 K3 M4
K9 H11 K10
L9 K11
M9
K2
L4
G4
G9 H10
H4 J11 J10
J2
J3
V4
V9
A9
R579
10K
0402
COMMON
5%
FBD_ZQ0
R21
R582
243
10K
1%
5%
04020402
COMMON COMMON
R596 1K
1% 0402 COMMON
A4
GND
4.1E<> 8.1G<>
4.1E>
8.1G<>
4.1E<
8.1G<>
8.1G<> 4.1E>
FBD_D<63..0>
FBD_DQM<7..0>
FBD_DQS_RN<7..0>
FBD_DQS_WP<7..0>
FBVDDQ
C767 .047UF
16V 10% X7R 0402 COMMON
GND
FBD_D<0>
0
FBD_D<1>
1
FBD_D<2>
2
FBD_D<3>
3
FBD_D<4>
4
FBD_DQM<0>
0
FBD_DQM<1>
1
FBD_DQM<2>
2
FBD_DQM<3>
3
FBD_DQM<4>
4
FBD_DQM<5>
5
FBD_DQM<6>
6
FBD_DQM<7>
7
FBD_DQS_RN<0>
0
FBD_DQS_RN<1>
1
FBD_DQS_RN<2>
2
FBD_DQS_RN<3>
3
FBD_DQS_RN<4>
4
FBD_DQS_RN<5>
5
FBD_DQS_RN<6>
6
FBD_DQS_RN<7>
7
FBD_DQS_WP<0>
0
FBD_DQS_WP<1>
1
FBD_DQS_WP<2>
2
FBD_DQS_WP<3>
3
FBD_DQS_WP<4>
4
FBD_DQS_WP<5>
5
FBD_DQS_WP<6>
6
FBD_DQS_WP<7>
7
5 6 7
32 33 34 35 36 37 38 39
FBD_D<5> FBD_D<6> FBD_D<7>
FBD_DQM<0> FBD_DQS_RN<0> FBD_DQS_WP<0>
FBD_D<32> FBD_D<33> FBD_D<34> FBD_D<35> FBD_D<36> FBD_D<37> FBD_D<38> FBD_D<39>
FBD_DQM<4> FBD_DQS_RN<4>
C14 .047UF
16V 10% X7R 0402 COMMON
T10 R10 N11 L10 R11 M10 M11 T11
N10 P10 P11
C11 B11 C10 B10 F10 G10 E11 F11
E10 D10 D11FBD_DQS_WP<4>
K12
J12
K1
J1
*
M1
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
*
M2
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
CMD-Addr Mapping 144 136 ADDR
CMD15 CMD1 RAS* CMD25 CMD10 CAS* CMD9 CMD11 WE* CMD8 CMD8 CS0* CMD7 CMD7 BA2 CMD1 CMD19 A<0> CMD3 CMD25 A<1> CMD2 CMD22 0A<2> CMD0 CMD24 0A<3> CMD24 CMD0 0A<4> CMD22 CMD2 0A<5> CMD13 CMD4 1A<2> CMD4 CMD6 1A<3> CMD5 CMD5 1A<4> CMD6 CMD13 1A<5> CMD21 CMD21 A<6> CMD23 CMD16 A<7> CMD19 CMD23 A<8> CMD20 CMD20 A<9> CMD17 CMD17 A<10> CMD16 CMD9 A<11> CMD10 CMD12 BA0 CMD18 CMD3 BA1 CMD11 CMD18 CKE CMD12 CMD15 RST
24
FBD_D<25>
25
FBD_D<26>
26
FBD_D<27>
27
FBD_D<28>
28
FBD_D<29>
29
FBD_D<30>
30
FBD_D<31>
31
FBD_DQM<3> FBD_DQS_RN<3> FBD_DQS_WP<3>
FBD_D<56>
56
FBD_D<57>
57
FBD_D<58>
58
FBD_D<59>
59
FBD_D<60>
60
FBD_D<61> G3
61
FBD_D<62>
62
FBD_D<63>
63
FBD_DQM<7> FBD_DQS_RN<7> FBD_DQS_WP<7>
4.2H>
4.3H>
R23
0402
C765 .01UF
16V 10% X7R 0402 COMMON
R577
475
0402
COMMON
1%
FBD_VREF0
1.1K
COMMON
1%
*
M1
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
C11FBD_D<16> C10 F10 B11 B10 F11 G10 E11
E10 D10 D11
*
M2
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
T11 R11 T10 M11 M10
L10 R10
N10 P10 P11
FBVDDQ
1 10 11 8
19 25
FBD_CMD<4>
4
FBD_CMD<6>
6
FBD_CMD<5>
5
FBD_CMD<13>
13 21 16 23 20 17 9
12 3 7
18
14
15
COMMON
FBVDDQ
GND
*
M1
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
T3FBD_D<24> T2 R3 R2 M3 L3 M2 N2
N3 P3 P2
*
M2
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
B2 B3 E2 C2 C3
F3 F2
E3 D3 D2
R27 243
1%
0402
C19 .047UF
16V 10% X7R 0402 COMMON
FBD_CMD<1> FBD_CMD<10> FBD_CMD<11> FBD_CMD<8>
FBD_CMD<19> FBD_CMD<25>
FBD_CMD<21> FBD_CMD<16> FBD_CMD<23> FBD_CMD<20> FBD_CMD<17> FBD_CMD<9>
FBD_CMD<12> FBD_CMD<3> FBD_CMD<7>
FBD_CMD<18> FBD_CLK1 FBD_CLK1*
SNN_FBD1_NC FBD_CMD<14> FBD_SEN1
FBD_CMD<15>
FBD_ZQ1
COMMON
GND
R573
0402
1K
1%
GND
C36 .047UF
16V 10% X7R 0402 COMMON
*
M2
DDR3BGA136 PACK_TYPE=BGA136_V2 VERSION=BGA136 COMMON
H10
F9 H4 F4
K9 H11 K10
M9
K4
H2
K3
L4
K2
M4 K11
L9
G9
G4
H3
H9 J11 J10
J2
J3
V4
V9
A9
A4
K1 K12
J1 J12
NET
R1
R2
FBD_CLK0 FBD_CLK0* FBD_CLK1 FBD_CLK1* FBD_CMD<25..0>
FBD_D<63..0> FBD_DQM<7..0>
FBD_DQS_RN<7..0> FBD_DQS_WP<7..0>
NET
FBD_VREF0 FBD_VREF1 FBD_VREF_CTL FBD_VREF_CTL1 FBD_ZQ0
R29
0402
1%
C648 .01UF
16V 10% X7R 0402 COMMON
4.2H>
8.2A<
4.2H>
8.2A<
4.2H>
8.2D<
4.3H>
8.2D<
4.1H>
8.1A<
4.1E<>
8.4A<>
FBVDDQ
F1 M1 A2 V2 A11 V11 F12 M12
A1 C1 E1 N1 FBD_ZQ1 R1 V1 C4 E4 J4 N4 R4 C9 E9 J9 N9 R9 A12 C12 E12 N12 R12 V12
B1 D1 P1 T1 G2 L2 B4 D4 P4 T4 B9 D9 P9 T9 G11 L11 B12 D12 P12 T12
G1 L1 A3 V3 A10 V10 G12 L12
H1
FBD_VREF0
H12
C25 .01UF
16V 10% X7R 0402 COMMON
GND
GND
8.4A<>
8.5A<>
8.5A<>
4.1E>
4.1E<
4.1E>
R26 549
0402
COMMON
R28
1.1K
0402
COMMON
FBVDDQ
1%
1%
GND
GND
FBD_VREF_CTL1
CONTINUOUS_CURRENT=0.115A
2N7002
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=60V
R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W
V_BE_GS=20V
3
1G1D1S
Q7
1
2
GND
1.1K
COMMON
FBD_CLK0 FBD_CLK0 FBD_CLK1 FBD_CLK1
MIN_LINE_WIDTH
FBCD_VREF_CTL
SOT23_1G1D1S
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W
V_BE_GS=20V
GPIO10_FB_VREF_SW
2N7002 COMMON
GND
Q8
10MIL 10MIL 10MIL 10MIL 10MIL 10MIL
3
2
1G1D1S
1
1 1 1 1 1
1 1
1 1
NV_IMPEDANCENV_CRITICALDIFFPAIR
80DIFF 80DIFF 80DIFF 80DIFF 40OHM
40OHM 40OHM
40OHM 40OHM
7.3H< 6.3H< 5.3H<
10.2D>
www.vinafix.vn
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. FrameBuffer - Partition D 32Mx32 BGA136 GDDR3
602-10817-0004-200 A
p817_a02 phchan
8 OF 21
22-AUG-2008
Page 9
Page9: FrameBuffer - Memory Decoupling
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
FBA - bottom
FBVDDQ
C99
.1UF
16V 10% X7R 0402 COMMON
C565
.1UF
16V 10% X7R 0402 0402 COMMON
C567
4.7UF
6.3V 20% X5R 0603 0603 COMMON
C561
.1UF
16V 10% X7R 0402 COMMON
C517
.1UF
16V 10% X7R
COMMON
C554
4.7UF
6.3V 20% X5R
COMMON
C570
.1UF
16V 10% X7R 0402 COMMON
C549
.1UF
16V 10% X7R 0402 COMMON
C531
4.7UF
6.3V 20% X5R 0603 COMMON
C577
.1UF
16V 10% X7R 0402 COMMON
C526
.1UF
16V 10% X7R 0402 COMMON
C514
4.7UF
6.3V 20% X5R 0603 COMMON
C509
.1UF
16V 10% X7R 0402 COMMON
C562
.1UF
16V 10% X7R 0402 COMMON
C547
4.7UF
6.3V 20% X5R 0603 COMMON
GND
FBB - bottom
FBVDDQ
C535
.1UF
16V 10% X7R 0402 COMMON
C94
.1UF
16V 10% X7R 0402 COMMON
C512
4.7UF
6.3V 20% X5R 0603 COMMON
C530
.1UF
16V 10% X7R 0402 COMMON
C528
.1UF
16V 10% X7R 0402 COMMON
C573
4.7UF
6.3V 20% X5R 0603 COMMON
C556
.1UF
16V 10% X7R 0402 COMMON
C77
.1UF
16V 10% X7R 0402 COMMON
C518
4.7UF
6.3V 20% X5R 0603 COMMON
C507
.1UF
16V 10% X7R 0402 COMMON
C80
.1UF
16V 10% X7R 0402 COMMON
C83
4.7UF
6.3V 20% X5R 0603 COMMON
C521
.1UF
16V 10% X7R 0402 COMMON
C511
.1UF
16V 10% X7R 0402 COMMON
C539
4.7UF
6.3V 20% X5R 0603 COMMON
GND
FBC - bottom
FBVDDQ
C586
.1UF
16V 10% X7R 0402 COMMON
C760
.1UF
16V 10% X7R 0402 COMMON
C590
4.7UF
6.3V 20% X5R 0603 0603 COMMON
C582
.1UF
16V 10% X7R 0402 COMMON
C596
.1UF
16V 10% X7R 0402 COMMON
C588
4.7UF
6.3V 20% X5R
COMMON
C54
.1UF
16V 10% X7R 0402 COMMON
C593
.1UF
16V 10% X7R 0402 COMMON
C589
4.7UF
6.3V 20% X5R 0603 COMMON
C595
.1UF
16V 10% X7R 0402 COMMON
C584
.1UF
16V 10% X7R 0402 COMMON
C71
4.7UF
6.3V 20% X5R 0603 0402 COMMON
C580
.1UF
16V 10% X7R 0402 COMMON
C581
.1UF
16V 10% X7R 0402 COMMON
C694
.1UF
16V 10% X7R
COMMON
GND
FBD - bottom
FBVDDQ
C53
.1UF
16V 10% X7R 0402 COMMON
C685
.1UF
16V 10% X7R 0402 COMMON
C707
4.7UF
6.3V 20% X5R 0603 COMMON
C763
.1UF
16V 10% X7R 0402 COMMON
C587
.1UF
16V 10% X7R 0402 COMMON
C28
4.7UF
6.3V 20% X5R 0603 COMMON
C43
.1UF
16V 10% X7R 0402 COMMON
C650
.1UF
16V 10% X7R 0402 COMMON
C754
4.7UF
6.3V 20% X5R 0603 COMMON
C742
.1UF
16V 10% X7R 0402 COMMON
C33
.1UF
16V 10% X7R 0402 COMMON
C640
4.7UF
6.3V 20% X5R 0603 COMMON
C741
.1UF
16V 10% X7R 0402 COMMON
C40
.1UF
16V 10% X7R 0402 COMMON
C641
.1UF
16V 10% X7R 0402 COMMON
GND
FBA - bottom
FBVDDQ
C571
.1UF
16V 10% X7R 0402 COMMON
C536
.1UF
16V 10% X7R
COMMON
C513
4.7UF
6.3V 20% X5R 0603 COMMON
C519
.1UF
16V 10% X7R 0402 COMMON
C524
.1UF
16V 10% X7R 04020402 COMMON
C100
4.7UF
6.3V 20% X5R 0603 COMMON
C98
.1UF
16V 10% X7R 0402 COMMON
C555
.1UF
16V 10% X7R 0402 COMMON
C529
4.7UF
6.3V 20% X5R 0603 COMMON
C505
.1UF
16V 10% X7R 0402 COMMON
C533
.1UF
16V 10% X7R 0402 COMMON
C516
4.7UF
6.3V 20% X5R 0603 COMMON
C559
.1UF
16V 10% X7R 0402 COMMON
C551
.1UF
16V 10% X7R 0402 COMMON
C545
.1UF
16V 10% X7R 0402 COMMON
GND
FBB - bottom
FBVDDQ
C715
.1UF
16V 10% X7R 0402 COMMON
C534
.1UF
16V 10% X7R 0402 COMMON
C520
4.7UF
6.3V 20% X5R 0603 COMMON
C523
.1UF
16V 10% X7R 0402 COMMON
C566
.1UF
16V 10% X7R 0402 COMMON
C82
4.7UF
6.3V 20% X5R 0603 COMMON
C527
.1UF
16V 10% X7R 0402 COMMON
C86
.1UF
16V 10% X7R 0402 COMMON
C546
4.7UF
6.3V 20% X5R 0603 COMMON
C89
.1UF
16V 10% X7R 0402 COMMON
C92
.1UF
16V 10% X7R 0402 COMMON
C731
4.7UF
6.3V 20% X5R 0603 COMMON
C81
.1UF
16V 10% X7R 0402 COMMON
C508
.1UF
16V 10% X7R 0402 COMMON
C560
.1UF
16V 10% X7R 0402 COMMON
GND
FBC - bottom
FBVDDQ
C604
.1UF
16V 16V 10% X7R 0402 COMMON
C744
.1UF
16V 10% X7R
COMMON
C615
4.7UF
6.3V 20% X5R 0603 COMMON
C652
.1UF
10% X7R 0402 COMMON
C70
.1UF
16V 10% X7R 04020402 COMMON
C41
4.7UF
6.3V 20% X5R 0603 COMMON
C627
.1UF
16V 10% X7R 0402 COMMON
C31
.1UF
16V 10% X7R 0402 COMMON
C600
4.7UF
6.3V 20% X5R 0603 COMMON
C64
.1UF
16V 16V 10% X7R 0402 COMMON
C45
.1UF
16V 10% X7R 0402 0402 COMMON
C745
4.7UF
6.3V 20% X5R 0603 COMMON
C682
.1UF
10% X7R 0402 COMMON
C602
.1UF
16V 10% X7R
COMMON
C583
.1UF
16V 10% X7R 0402 COMMON
GND
FBD - bottom
FBVDDQ
C23
.1UF
16V 10% X7R 0402 COMMON
C24
.1UF
16V 10% X7R 0402 COMMON
C746
4.7UF
6.3V 20% X5R 0603 COMMON
C20
.1UF
16V 16V 10% X7R 0402 COMMON
C22
.1UF
16V 10% X7R 0402 0402 COMMON
C719
4.7UF
6.3V 20% X5R 0603 COMMON
C599
.1UF
10% X7R 0402 COMMON
C764
.1UF
16V 10% X7R
COMMON
C748
4.7UF
6.3V 20% X5R 0603 COMMON
C13
.1UF
16V 10% X7R 0402 COMMON
C766
.1UF
16V 10% X7R 0402 COMMON
C6
4.7UF
6.3V 20% X5R 0603 COMMON
C762
.1UF
16V 10% X7R 0402 COMMON
C722
.1UF
16V 10% X7R 0402 COMMON
C7
.1UF
16V 10% X7R 0402 COMMON
GND
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. FrameBuffer - Memory Decoupling
www.vinafix.vn
602-10817-0004-200 A
p817_a02 phchan
9 OF 21
22-AUG-2008
Page 10
NV_CRITICAL_NETNV_IMPEDANCENET
OUTININININININININININININININININININININ
IN
16/24 XTAL
XTALOUTBUFF
XTALOUT
XTALSSIN
XTALIN
OUT
OUT
OUT
OUT
OUT
OUT
IN
FIN
VDD
GND
SSCO
EN
CSEL
MIO
DRB_D6 DRB_D7 DRB_D8
DRB_D2 DRB_D3 DRB_D4 DRB_D5
DR
DRB_D9
DRB_D1
DRB_D0
DRB_D11
DRB_D10
DRB_D12
DRB_CLK NC
DR_REFCLK
DRB_D14
DRB_D13 DRB_CMD
15/24 MIOB
MIOBD2
MIOBD1
MIOBD0
MIOBD5
MIOBD4
MIOBD3
MIOBD6
MIOBD10
MIOBD9
MIOBD11
MIOBD8
MIOBD7
MIOB_CTL3
MIOB_DE
MIOB_CLKIN
MIOB_HSYNC
MIOB_CLKOUT
MIOB_CLKOUT
MIOB_VSYNC
MIOBCAL_PD_VDDQ
MIOB_VDDQ
MIOB_VDDQ MIOB_VDDQ
MIOB_VREF
MIOB_VDDQ
MIOB_VDDQ
MIOBCAL_PU_GND
ININININININININOUTINOUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTINOUTINOUT
OUTINBIBIOUT
18/24 GPIO
GPIO<0> GPIO<1> GPIO<2>
GPIO<8>
GPIO<11> GPIO<12>
GPIO<7>
GPIO<6>
GPIO<14>
GPIO<13>
GPIO<10>
GPIO<9>
GPIO<5>
GPIO<4>
GPIO<3>
MIO
DRA_D10
DR DRA_D0
DRA_D11
DRA_D9
DRA_D8
DRA_D7
DRA_D6
DRA_D5
DRA_D1 DRA_D2 DRA_D3 DRA_D4
DRA_D12
NC
DRA_CLK
DRA_CMD
DRA_D13 DRA_D14
14/24 MIOA
MIOAD4 MIOAD5
MIOAD3
MIOAD0 MIOAD1 MIOAD2
MIOAD6 MIOAD8
MIOAD9 MIOAD10 MIOAD11
MIOAD7
MIOA_CTL3
MIOA_DE
MIOA_CLKOUT
MIOA_CLKOUT
MIOA_VSYNC
MIOA_HSYNC
MIOACAL_PD_VDDQ
MIOA_VREF
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOACAL_PU_GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Page10: GPU GPIO, MIOA, MIOB Interface; GPU XTAL and Spread Spectrum Clock
GPIO
3V3
R20 100K
3
6
RP501 10K
+/-5% 0402X4 COMMON
5% 0402 COMMON
GND
1
8
RP501 10K
+/-5% 0402X4 COMMON
GND
2
7
RP501 10K
+/-5% 0402X4 COMMON
GND
R15 10K
5% 0402 COMMON
2
4
RP1
RP1
10K
G1 G92-750-A2
BGA1148 COMMON
N3 U3 T4 R2 N1 T3 T5 P1 M2 N2 R1 R3 P3 T2 U4
5
10K
+/-5% 0402X4 COMMON
7
+/-5% 0402X4 COMMON
GND
SNN_RP1_P3
SNN_RP1_P4
GPIO0_DVIA_HPD GPIO1_DP_HPD GPIO2_LVDS_BL_PWM GPIO3_LVDS_PPEN GPIO4_LVDS_BLEN GPIO5_NVVDD_CTL0 GPIO6_NVVDD_CTL1 GPIO7_NVVDD_CTL2 GPIO8_THERM_SHDWN GPIO9_THERM_ALERT GPIO10_FB_VREF_SW GPIO11_RASTER_SYNC GPIO12_AC_BATT* GPIO13_FBVDDQ_CTL GPIO14_DP_MODE_CTL
R11 10K
5% 0402 COMMON
GND
SNN_RP4
GND
R654 10K
5% 0402 COMMON
RP501
0402X4
RP1
0402X4
RP1
0402X4
4
+/-5%
3
+/-5%
1
+/-5%
10K
5
COMMON
10K
6
COMMON
10K
8
COMMON
SNN_RP5
SNN_RP1_P6
SNN_RP1_P5
13.1C>
14.3B<
14.3B<
14.3B<
16.4A<
16.4A<
16.4A<
13.5G>
13.5G>
5.3H<
14.5G<>
14.4B>
17.5E<
13.2E<
14.3B>
14.3B<
6.3H<
3V3
*
2
D501
BAV99
3
100MA 100V SOT23 COMMON
1
7.3H<
R519 100K
0402 COMMON
GND
R56
0402
R57
0402
5%
GND8.3H<
DPD_HPD
10K
COMMON
5%
DNI
DVIA_HPD
10K
COMMON
5%
14.3D>
14.3B>
MIOA_VREF MIOA_CAL_PD_VDDQ MIOA_CAL_PU_GND MIOB_VREF MIOB_CAL_PD_VDDQ MIOB_CAL_PU_GND XTAL_SSC_VDD
17.1D< 16.3A<
17.2A<
GND
XTAL_SSC_GPU_IN
R620
0402
5%
14.2F>
22
COMMON
12.3B<
R658
0402
5%
MAX_CURRENTVOLTAGENET
XTAL_SSC_OUT
10K
COMMON
AD2
AD1
XTAL_IN
GND
MXM_PWREN
G1 G92-750-A2
BGA1148 COMMON
COMMON
C10 18PF
50V 5% C0G 0402 COMMON
14.5G<>
18.1B>
18.1B>
8MIL 8MIL 8MIL 8MIL 8MIL 8MIL 12MIL
13.3A<
MIN_LINE_WIDTH
XTAL
27 MHZ
Y1
H10SSMD
XTAL_4PIN_HOSONIC
GND
U504 PL671-02-C44T
SOT23 COMMON
6
1
5XTAL_SSC_REF
14.4F<>
10.5D<>
14.5G<
14.5G> 10.5H<
13.2A<
13.3A<
13.3A<
13.3A<
10.5H>
C9 18PF
50V 5% C0G 0402 COMMON
10.4D<>
18.1B>
10.5D>
10.4H>
10.5H>
10.5H>
10.5H>
13.3A<
10.5H>
10.2H>
13.2A<
XTAL_OUT
AB3
AC1
XTAL_SSC_IN
3
4
2
MIOA_D<14..0> MIOA_DE MIOA_CLKOUT
GPU_EXT_REFCLK
MIOB_D<12..0> MIOB_HSYNC MIOB_VSYNC MIOB_DE MIOB_CLKOUT MIOB_CLKOUT*
XTAL_BUF_DP XTAL_IN XTAL_OUT XTAL_BUFF_OUT XTAL_BUFF_DP XTAL_SSC_OUT XTAL_SSC_GPU_IN XTAL_CLK_OUT XTAL_SSC_IN XTAL_SSC_REF
XTAL_SYS_27MHZ
XTAL_BUFF_OUT
XTAL_SSC_VDD
C770 1000PF
50V 10% X5R 0402 COMMON
GND
R633 10K
5% 0402 COMMON
C778
2.2UF
6.3V 20% X5R 0402 COMMON
R5
0402
COMMON
50OHM 50OHM 50OHM 50OHM
50OHM 50OHM 50OHM 50OHM 90DIFF 90DIFF 50OHM 50OHM 50OHM 50OHM 50OHM 50OHM 50OHM 50OHM 50OHM 50OHM 50OHM
XTAL_BUF_DP
22
COMMON
5%
R632
33
0402
5%
4.7
R621
COMMON
0402
C777 .1UF
16V 10% X7R 0402 COMMON
5%
GND
MIOB_CLKOUT MIOB_CLKOUT
13.2A< 10.1G<
3V3
1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
G1 G92-750-A2
BGA1148
MIOA_VDDQ
C700
C699
R586
0402
R599
0402
R587
0402
C696 .1UF
16V 10% X7R 0402 COMMON
1.33K
COMMON
1%
1%
1%
49.9
COMMON
49.9
COMMON
R590
1.13K
1% 0402 COMMON
.1UF
16V 10% X7R 0402 COMMON
GND
MIOA_VREF
MIOA_CAL_PD_VDDQ
MIOA_CAL_PU_GND
.1UF
16V 10% X7R 0402 COMMON
C730 .1UF
16V 10% X7R 0402 COMMON
C709
4.7UF
6.3V 20% X5R 0603 COMMON
GND
MIOA_VDDQ
GND
U11 V11 W11 T12 U12
COMMON
W3
V3 V2
MIOA
MIOA_D<0>
AA4
MIOA_D<1>
Y7
MIOA_D<2>
V7
MIOA_D<3>
V6
MIOA_D<4>
V5
MIOA_D<5>
U7
MIOA_D<6>
Y3
MIOA_D<7>
W1
MIOA_D<8>
W2
MIOA_D<9>
Y4
MIOA_D<10>
W5
MIOA_D<11>
W6
MIOA_D<12>
AA7
MIOA_D<13>AA5 MIOA_D<14>
Y5
MIOA_DE
W7
MIOA_CLKOUT
AA2
SNN_MIOA_CLKOUT*
Y1
MIOA_D<14..0>
0 1 2 3 4 5 6 7 8
9 10 11
12 13 14
10.1G<
14.5G<
10.1G<
14.5G<>
18.1B>
14.4F<> 10.1G<
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. GPU GPIO, MIOA, MIOB Interface; GPU XTAL and Spread Spectrum Clock
www.vinafix.vn
MIOB_VDDQ
GND
MIOB_VDDQ
GND
C781
4.7UF
6.3V 20% X5R X7R 0603 COMMON
0402
R17
0402
R16
0402
G1 G92-750-A2
BGA1148 COMMON
AE11 AE12
C708
C712
C705
.1UF
.1UF
16V
16V
10%
10%
X7R 0402
0402
COMMON
COMMON
GND
1.1K
R9
COMMON
1%
49.9
COMMON
1%
49.9
COMMON
1%
MIOB_VREF
R6
1.1K
1% 0402 COMMON
MIOB_CAL_PD_VDDQ
MIOB_CAL_PU_GND
.1UF
16V 10% X7R 0402 COMMON
C15 .1UF
16V 10% X7R 0402 COMMON
AF12 AE13 AF13
AG2
AG1 AF1
MIOB
AE6 AG7 AF9
AE9 AE7 AD8 AD9 AC8 AD7 AD5 AC5
AE5 AF5 AG5 AF7
AG4
MIOB_D<0> MIOB_D<1> MIOB_D<2> MIOB_D<3>AF8 MIOB_D<4> MIOB_D<5> MIOB_D<6> MIOB_D<7> MIOB_D<8> MIOB_D<9> MIOB_D<10> MIOB_D<11>
MIOB_D<12> MIOB_HSYNC MIOB_VSYNC MIOB_DE
MIOB_CLKOUTAG3 MIOB_CLKOUT* GPU_EXT_REFCLKAD3
0 1 2 3 4 5 6 7 8
9 10 11
12
MIOB_D<12..0>
10.1G<
10.1G<
10.1G<
13.3A<
13.3A<
13.3A<
13.3A< 10.1G<
13.3A< 10.1G<
14.5G> 10.1G<
18.1B>
18.1B>
13.2A< 10.1G<
602-10817-0004-200 A
p817_a02 phchan
10 OF 21
22-AUG-2008
Page 11
Page11: GPU DACA, DACB, and DACC Interface
INININ
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
8/24 DACA
DACA_VSYNC
DACA_HSYNC
I2CA_SCL I2CA_SDA
DACA_RED
DACA_IDUMP
DACA_GREEN
DACA_BLUE
DACA_VDD DACA_VREF DACA_RSET
9/24 DACB (TVout)
DACB_RED
DACB_BLUE
DACB_GREEN
DACB_IDUMP
DACB_CSYNC
DACB_VDD DACB_VREF DACB_RSET
10/24 DACC
DACC_VSYNC
DACC_HSYNC
I2CB_SCL I2CB_SDA
DACC_IDUMP
DACC_BLUE
DACC_GREEN
DACC_RED
DACC_VDD DACC_VREF DACC_RSET
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
NET
DACA_VDD DACA_VREF DACA_RSET
VOLTAGE
MAX_CURRENT
0.35A3.3V
MIN_LINE_WIDTH
16MIL 12MIL 12MIL
D1
DLPA006 160MA 85V SC70-6_TRIPLE
COMMON
D1
DLPA006 160MA 85V SC70-6_TRIPLE
COMMON
D1
DLPA006 160MA 85V SC70-6_TRIPLE
COMMON
NV_CRITICAL_NET
1
1
1
NET
11.2E>
14.2B<
11.2E>
3V3
C751
4.7UF
6.3V 20% X5R 0603 COMMON
GND
Please near GPU
LB504
240R@100MHz
COMMONBEAD_0402
GND
C738
4.7UF
6.3V 20% X5R 0603 COMMON
GND
C732 1UF
10% 10% X5R 0402 COMMON
C714 .1UF
16V 10% X7R 0402 COMMON
DACA_VDD
DACA_VREF DACA_RSET
R609 124
1% 0402 COMMON
C723 .1UF
16V6.3V X7R
0402 COMMON
AK13 AK14 AH11
G1 G92-750-A2
BGA1148 COMMON
T9 U8
AJ11 AF14
AH13 AJ14 AH12
AJ13
I2CA_SCLR I2CA_SDAR
DACA_HSYNC DACA_VSYNC
DACA_RED DACA_GREEN DACA_BLUE
R593
4.99K
COMMON
3V3
1%
R594
4.99K
1% 04020402 COMMON
R606
0402
R575 150 150
1% 0402 COMMON
R588
0402
33
COMMON
5%
R572
1% 0402 COMMON
I2CA_SCL
33
I2CA_SDA
COMMON
5%
R576 150
1% 0402 COMMON
14.2B<
14.2B<>
14.2B<
14.2B<
11.1G>
11.1G>
11.1G>
14.2B<
14.2B<
14.2B<
14.2B<
14.2B<
11.2E>
DACA_RED DACA_GREEN DACA_BLUE
GND
GND
GND
PLACE NEAR GPU
G1 G92-750-A2
BGA1148 COMMON
Y11
Y9 Y8
SNN_DACB_RED
AA8
SNN_DACB_GREEN
AB9
SNN_DACB_BLUE
AA9
SNN_DACB_CSYNC
AG9
DACB_VDD
10K
R585
COMMON
0402
5%
SNN_DACB_VREF
SNN_DACB_RSET
GND
GND
NV_IMPEDANCE
50OHM
50OHM
50OHM
VGA DAC PROTECTION
DACA_RED
DACA_GREEN
DACA_BLUE
3
1
6
3V3
4
2
GND
3V3
5
2
GND
3V3
5
2
GND
W9
GND
3V3
R604
R603
4.99K
4.99K
1%
G1 G92-750-A2
BGA1148
AH7 AK8 AH8
COMMON
R9 T8
AJ10 AJ7
AJ9 AH9 AH10
SNN_DACC_HSYNC SNN_DACC_VSYNC
SNN_DACC_RED SNN_DACC_GREEN SNN_DACC_BLUE
DACC_VDD
10K
R589
COMMON
0402
5%
GND
SNN_DACC_VREF SNN_DACC_RSET
1% 0402 COMMON
I2CB_SCLR I2CB_SDAR
0402 COMMON
R602
0402
R605
0402
I2CB_SCL
33
COMMON
5%
I2CB_SDA
33
COMMON
5%
14.3D<
14.3D<>
AK9
GND
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. GPU DACA, DACB, and DACC Interface
www.vinafix.vn
602-10817-0004-200 A
p817_a02 phchan
11 OF 21
22-AUG-2008
Page 12
Page12: GPU IFP A/B LVDS and IFP C/D TMDS Interface
INININININININ
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
12/24 IFPAB TMDS
IFPA_TXD0
IFPA_TXC IFPA_TXC
IFPA_TXD0
IFPA_TXD1 IFPA_TXD1
IFPA_TXD3 IFPA_TXD3
IFPA_TXD2
IFPA_TXD2
IFPB_TXD7 IFPB_TXD7
IFPB_TXD4
IFPB_TXD6
IFPB_TXD6
IFPB_TXD5 IFPB_TXD5
IFPB_TXD4
IFPB_TXC
IFPB_TXC
IFPAB_RSET
IFPAB_PLLVDD
IFPAB_PLLGND
IFPA_IOVDD
IFPAB_VPROBE
IFPB_IOVDD
13/24 IFPCD TMDS
IFPC_TXD2
IFPC_TXC
IFPC_TXC
IFPC_TXD0 IFPC_TXD0
IFPC_TXD1 IFPC_TXD1
IFPC_TXD2
IFPD_TXD6
IFPD_TXD6
IFPD_TXD5
IFPD_TXC
IFPD_TXC
IFPD_TXD4 IFPD_TXD4
IFPD_TXD5
IFPCD_RSET
IFPCD_VPROBE
IFPCD_PLLGND
IFPC_IOVDD
IFPCD_PLLVDD
IFPD_IOVDD
S
D
G
OUT
D
SGS
D
G
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
NET
IFP_PLLVDD IFPAB_IOVDD IFPCD_IOVDD IFP_IOVDD_3V3 IFP_IOVDD_1V8
IFPAB_RSET IFPCD_RSET
1.8V 0.20A
3.3V 0.20A
3.3V
0.40A3.3V
0.20A
0.20A1.8V
MAX_CURRENTVOLTAGE
MIN_LINE_WIDTH
16MIL 16MIL 16MIL 16MIL 16MIL
12MIL 12MIL
G1 G92-750-A2
BGA1148 COMMON
SNN_IFPAB_VPROBE
IFPAB_RSET
1K
1V8
240R@100MHz
LB1
COMMON
BEAD_0402
C785
4.7UF
6.3V 20% X5R
GND
LB503
BEAD_0402
BEAD_0402
0603 COMMON
LVDS STUFF
240R@100MHz
LB507
COMMON
COMMON
TMDS STUFF
DNI
240R@100MHz
LB502
BEAD_0402
IFPAB_IOVDD
240R@100MHz
COMMON
Option
0
R58
COMMON
0402
5%
DNI
LINK A/B
TMDS:
1) STUFF LB_3V3;
2) NO STUFF LB_1V8
LVDS:
1) NO STUFF LB_3V3;
2) STUFF LB_1V8
16.2A>
17.4B<
1V8
Place near GPU
IFP_IOVDD_3V3_EN_R*
IFP_IOVDD_3V3_EN
17.1D< 16.3A< 14.2F> 10.3F<
17.2A<
1G1D1S
3MXM_PWREN
Q503
FDC6301N SOT23_6D_1G1D1S COMMON
GND
R591
0402
1%
COMMON
4
2
MAX_VOLTAGE=25V CONTINUOUS_CURRENT=0.22A R_DS_ON=5R MAX_CURRENT=0.5A MAX_WATTAGE=0.7W@125C V_BE_GS=8V
1K
10K
C735
0402
PS_PGOOD_NV
1G1D1S
1
COMMON
5%
.1UF
16V 10% X5R COMMON
R597
0402
3
1G1D1S
3V3
2
AO3422
COMMON
Q18
1
3
Q504 RTR030P02
SOT23_1G1D1S COMMON
2
MAX_VOLTAGE=-20V CONTINUOUS_CURRENT=-3A@25C R_DS_ON=0.125R MAX MAX_CURRENT=-12A MAX_WATTAGE=1W@25C V_BE_GS=+/-12V
IFP_IOVDD_3V3
IFP_IOVDD_1V8
GND
GND
C16
4.7UF
6.3V 20% X5R 0603 COMMON
C718
4.7UF
6.3V 10% X5R 0603 COMMON
IFP_PLLVDD
GND
R581
GND
0402
1%
C739 1UF
6.3V 10% X5R 0402 COMMON
COMMON
GND
C716 1UF
6.3V 10% X5R 0402 COMMON
GND
C721 1UF
6.3V 10% X5R 0402 COMMON
GND
SNN_IFPCD_VPROBE
GND
C717
4.7UF
6.3V 20% X5R 0603 COMMON
0402
GND
COMMON
1%
C734 .1UF
16V 10% X5R 0402 COMMON
IFPCD_IOVDD
C729 1UF
6.3V 10% X5R 0402 COMMON
IFPCD_RSET
1K
R595
GND
C713 1UF
6.3V 10% X5R 0402 COMMON
www.vinafix.vn
AR6 AM7
AN6
C740 .1UF
16V 10% X7R 0402 COMMON
AN7
AN8
C726 .1UF
16V 10% X7R 0402 COMMON
AM6
C727 .1UF
16V 10% X7R 0402 COMMON
G1 G92-750-A2
BGA1148 COMMON
AL6 AN3
AM4
C743 1UF
6.3V 10% X5R 0402 COMMON
AL4
AL5
C725 .1UF
16V 10% X5R 0402 COMMON
GND
AJ4
C736 .1UF
16V 10% X5R 0402 COMMON
GNDGND
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. GPU IFP A/B LVDS and IFP C/D TMDS Interface
AT9 AT8
AN4 AN5
AT3 AT4
AP4 AP5
AR3 AR4
AP1 AR2
AP6 AP7
AR7 AR8
AT5 AT6
AN2 AP2
AJ6 AH6
AL2 AL1
AK1
AL3 AM3
AH5 AH4
AK2 AK3
AK4 AK5
AM1 AN1
IFPA_TXC* IFPA_TXC
IFPA_TXD0* IFPA_TXD0
IFPA_TXD1* IFPA_TXD1
IFPA_TXD2* IFPA_TXD2
IFPA_TXD3* IFPA_TXD3
IFPB_TXC* IFPB_TXC
IFPB_TXD4* IFPB_TXD4
IFPB_TXD5* IFPB_TXD5
IFPB_TXD6* IFPB_TXD6
IFPB_TXD7* IFPB_TXD7
IFPC_TXC* IFPC_TXC
IFPC_TXD0* IFPC_TXD0
IFPC_TXD1*AJ1 IFPC_TXD1
IFPC_TXD2* IFPC_TXD2
SNN_IFPD_TXCN SNN_IFPD_TXC
SNN_IFPD_TX4N SNN_IFPD_TX4
SNN_IFPD_TX5N SNN_IFPD_TX5
SNN_IFPD_TX6N SNN_IFPD_TX6
12.1G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
14.5D< 12.1G>
14.4D< 12.1G>
14.4D< 12.1G>
14.4D<
14.4D<
14.4D<
14.4D<
14.4D<
14.4D<
14.4D<
14.4D<
14.4D<
14.4D<
14.4D< 12.2G>
14.4D<
14.4D<
14.4D<
14.4D<
14.4D< 12.2G>
14.4D< 12.3G>
12.3G>
12.3G>
12.3G>
12.3G>
12.3G>
12.3G>
12.3G>
14.3D<
14.3D<
14.3D<
14.3D<
14.3D< 12.3G>
14.3D<
14.3D<
14.3D<
12.2F>
14.5D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
12.2F>
14.4D<
14.4D< 12.2F>
12.3F>
14.4D<
12.3F>
14.4D<
12.3F>
14.4D<
12.3F>
14.4D<
12.3F>
14.4D<
12.3F>
14.4D<
12.3F>
14.3D<
12.3F>
14.3D<
12.3F>
14.3D<
12.3F>
14.3D<
12.3F>
14.3D<
12.4F>
14.3D<
12.4F>
14.3D<
12.4F>
14.3D<
NAME
IFPA_TXC* IFPA_TXC
IFPA_TXD0* IFPA_TXD0
IFPA_TXD1* IFPA_TXD1
IFPA_TXD2* IFPA_TXD2
IFPA_TXD3* IFPA_TXD3
IFPB_TXC* IFPB_TXC
IFPB_TXD4* IFPB_TXD4
IFPB_TXD5* IFPB_TXD5
IFPB_TXD6* IFPB_TXD6
IFPB_TXD7* IFPB_TXD7
IFPC_TXC* IFPC_TXC
IFPC_TXD0* IFPC_TXD0
IFPC_TXD1* IFPC_TXD1
IFPC_TXD2* IFPC_TXD2
DIFFPAIR
IFPA_TXC IFPA_TXC
IFPA_TXD0
IFPA_TXD1 IFPA_TXD1
IFPA_TXD2 IFPA_TXD2
IFPA_TXD3 IFPA_TXD3
IFPB_TXC IFPB_TXC
IFPB_TXD4
IFPB_TXD5 IFPB_TXD5
IFPB_TXD6 IFPB_TXD6
IFPB_TXD7 IFPB_TXD7
IFPC_TXC IFPC_TXC
IFPC_TXD0 IFPC_TXD0
IFPC_TXD1 IFPC_TXD1
602-10817-0004-200 A
p817_a02 phchan
NV_IMPEDANCENV_CRITICAL_NET
1 1
1IFPA_TXD0 1
1 1
1 1
1 1
1 1
1 1IFPB_TXD4
1 1
1 1
1 1
1 1
1 1
1 1
1IFPC_TXD2 1IFPC_TXD2
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
12 OF 21
22-AUG-2008
Page 13
Page13: DisplayPort Transmitter and External Thermal Sensor
INININININININININININININININININININ
OUT
OUTBIBIININ
VVC_0
A0
GND_0
0B0
1B0
S0
VVC_1
A1
GND_1
0B1
1B1
S1
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
19/24 THERMAL THERMDN (CATHODE)
THERMDP (ANODE)
VDD
THERM ALERT
GND
D+ D-
SDA
SCL
INBIBIINOUTININININININ
ANX9805V
1/2
HPD
TX3P
TX3N*
AUXP
AUXN*
DSCL
DSDA
TX1P
TX1N*
TX2P
TX2N*
TX0N*
GPIO2
TX0P
GPIO3
CEC
RSV
R_BIAS
NC
RSV
DEV_ADR_SEL/GPIO1
XTAL_OUT
XTAL_IN
D0 D1
D4
D3 D5
D2
D6
D14
D10 D11
D15
D13
D12
D8 D9
D7
D16
CLKN*
CLKP
D17
VSYNC
HSYNC DE
INTP
CSDA CSCL
SPDIF0 SPDIF1 RESETN*
DNC
ANX9805V
2/2
VREF
AVSS AVSS AVSS AVSS
DVSS
DVSS
DVSS
AVSS
AVSS
DVSS DVSS
DVSS
AVDD33
AVDD33 AVDD33 AVDD33
DVDD33
AVDD33
AVDD33
DVDD33 DVDD33 DVDD33
DVDD18 DVDD18 DVDD18 DVDD18 DVDD18
INBIINININ
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
R607 100K
5% 0402 COMMON
GND
U3 ANX9805V
BGA_81
COMMON
XTAL_OUT_DP
14.3H>
5%
5%
51KR53
COMMON0402
XTAL_BUF_DP
0 1 2 3 4 5 6 7 8 9 10 11
MIOB_HSYNC MIOB_VSYNC MIOB_DE
MIOB_CLKOUT MIOB_CLKOUT*
I2CC_SDA I2CC_SCL
SNN_DP_INTR
47KR65
COMMON0402
SNN_DP_DNC
MIOB_D<0> MIOB_D<1> MIOB_D<2> MIOB_D<3> MIOB_D<4> MIOB_D<5> MIOB_D<6> MIOB_D<7> MIOB_D<8> MIOB_D<9> MIOB_D<10> MIOB_D<11>
GND
SPDIF_IN_DP0
GPU_BUFRST*
GND
10.1G<
10.2H>
10.1G< 10.4H> 18.1B>
MIOB_D<12..0>
10.1G<
10.5H> 18.1B>
10.1G<
10.5H>
10.1G<
10.5H>
10.1G<
10.5H>
10.1G<
10.5H>
13.5E<>
14.1H<> 14.3B<>
13.5E<
14.1H> 14.3B>
R59
0402
COMMON
GND
SPDIF_IN_DP
DNI
47K
5%
14.1A>
GND
C3
C4
J9 G8 H8 H7 G7 J8 J7 H6 G5 H5 J4 J3 H4 J2 H3 G3 G2 H2
F8 F7 H9
J6 J5
E9 D7
G9 E2 G1 C6
E1
F9
I2C_SDA_DP
C7
I2C_SCL_DP
C8
D1 C1
C9 D9
A9 A8
A6 A5
A3 A2
SNN_DP_GPIO3
J1
SNN_DP_GPIO2
F2
SNN_DP_CEC
H1
DP_RBIAS
C5
DP_DEV_ADR_SEL
D8
D2
B6
SNN_DP_NC
A1
DP_HPD
10K
R612
COMMON
0402
5%
GPIO1_DP_HPD
R644
0402
R653
0402
DP_AUX_C* DP_AUX_C
DP_L3_C* DP_L3_C
DP_L2_C* DP_L2_C
DP_L1_C* DP_L1_C
DP_L0_C* DP_L0_C
4.99K
R627
COMMON
0402
1%
10K
R657
COMMON
0402
5%
R60
GND
Default - PU
DP Transimitter I2CC Address: H = 0x76, 0x78, 0x7E L = 0x70, 0x72, 0x7A (Default)
0402
5%
5%
10.2D<
2.2K
COMMON
5%
10K
COMMON
2.2K
COMMON
DNI
14.1D>
3V3
3V3
13.2G< 14.2D<
13.2G< 14.2D<
14.1D<
13.2G<
14.1D<
13.2G<
14.1D<
13.1G<
14.1D<
13.1G<
13.1G< 14.1D<
14.1D< 13.1G<
3V3
GND
GND
PI5A3158
U505
COMMON
TDFN_12
2
11
10
PI5A3158
U505
COMMON
TDFN_12
5 8
7
1:DDC 0:AUX
3V3
12
1
3
9
4
C5
6
.1UF
16V 10% X7R 0402 COMMON
GND
GPIO14_DP_MODE_CTL
10.2D>
DP_AUX_Q* DP_AUX_Q
13.1G<
13.1G<
14.1D<>
14.1D<>
G1 G92-750-A2
BGA1148 COMMON
14.1D<>
14.1D<>
14.1D<
14.1D<
14.1D<
14.1D<
14.1D<
14.1D<
14.2D<
13.1E<>
13.1E<>
13.3C>
13.2C>
13.2C>
13.2C>
13.2C>
13.2C>
13.2C> 14.2D<
13.2C>
NET
DP_AVDD33 DP_RBIAS DP_VREF THERM_VDD
NET
DP_AUX_Q DP_AUX_Q* DP_AUX_C DP_AUX_C* I2C_SDA_DP I2C_SCL_DP
DP_L0_C DP_L0_C*
DP_L1_C DP_L1_C*
DP_L2_C DP_L2_C* XTAL_OUT_DP
DP_L3_C DP_L3_C*
Note:
DP_AUX is set to 80DIFF due to layout issue, since there is no room to route DP_AUX at 100DIFF layer. DP_AUX should be 100DIFF per DisplayPort spec.
VOLTAGE
NV_IMPEDANCE
90DIFF 90DIFF 90DIFF 90DIFF 90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF
90DIFF 90DIFF 50OHM
90DIFF DP_L3_C
0.40A3.3V
DP_AUX DP_AUX DP_AUX_C DP_AUX_C DP_I2C DP_I2C
DP_L0_C DP_L0_C
DP_L1_C DP_L1_C
DP_L2_C DP_L2_C
DP_L3_C90DIFF
MIN_LINE_WIDTH
NV_CRITICAL_NET
10MIL 10MIL 10MIL 10MIL
1 1 1 1 1 1
1 1
1 1
1 1 1
1 1
*
0
5%
COMMON
*
0
COMMON
5%
R629
0402
R638 0
0402
R624
0402
R647
0402
THERM_R*
THERM_R
DNI 5%
5%
DNI 5%
5%
0
0 0
GND
DP_VREFF1
C753
16V 10% X7R 0402 COMMON
MIOB_VDDQ
GND
R608 1K
1% 0402 COMMON
R611 1K.1UF
1% 0402 COMMON
R610
0402
R616
0402
I2CC_SCL
I2CC_SDA
I2CS_SCL
I2CS_SDA
13.3A< 14.3B> 14.1H>
13.3A<>
14.1H<> 14.3B<>
14.2G>
14.3B>
14.2G<>
14.3B<>
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. DisplayPort Transmitter and External Thermal Sensor
www.vinafix.vn
U3 ANX9805V
BGA_81
3V3
1V8
LB505
220R@100MHz
BEAD_0603
COMMON
GND
C752
4.7UF
6.3V 20% X5R 0603 COMMON
C749
4.7UF
6.3V 20% X5R 0603 COMMON
C759
4.7UF
6.3V 20% X5R 0603 COMMON
DP_AVDD33
16V 10% X7R 0402 COMMON
C784 .1UF
10% X7R 0402 COMMON
C779 .1UF .1UF .1UF
16V 10% X7R 0402 COMMON
16V 10% X7R 0402 COMMON
C780 .1UF
16V16V 10% X7R 0402 COMMON
C774
16V 10% X7R 0402 COMMON
C782C773C761 .1UF.1UF.1UF
16V 10% X7R 0402 COMMON
C758 .1UF
16V 10% X7R 0402 COMMON
C771
16V 10% X7R 0402 COMMON
COMMON
B2 B4 B5 B7 B8 C2
E7 E8 F3 G6
D5 E3 E6 F5 G4
A4 A7 B1 B3 B9 D3
D4 D6 E4 E5 F4 F6
COMMON
COMMON
COMMON
COMMON
C756 1000PF
50V 10% X5R 0402 COMMON
I2C_SCL_R
I2C_SDA_R
THERM
T1
U1
2 3THERM*
8 7
U503
MAX6649MUA SO8_122MIL COMMON
1 4
6 5
GND
THERM_THERM*
THERM_ALERT
R619
0402
R622
0402
DNI
0
COMMON
5%
0
COMMON
5%
DNI
THERM_VDD
GPIO8_THERM_SHDWN
GPIO9_THERM_ALERT
14.3B>
10.2D>
10.2D<
14.3B<
GND
C769 .1UF
16V 10% X7R 0402 COMMON
GND
C776 1UF
6.3V 10% X5R 0402 COMMON
0402
3V3
150R626
COMMON
1%
602-10817-0004-200 A
p817_a02 phchan
13 OF 21
22-AUG-2008
Page 14
Page14: MXM Connector;JTAG; VBIOS and HDCP ROM
BI
OUT
VCC VCC
GND
GND
SCL SDA
NC
SDA
VCC
GND
GNDP
CS
WP
HOLD
SO
SI SCK
OUTININ
OUTBIININOUT
BI
40 PIN B2B CONNECTOR
GND GND
GND GND
GND
GND
GND
GND
GND GND
GND GND
GND
GND
GND
GND GND
GND
GND
GND
RASTER_SYNC
DR<0> DR<1>
DR<5> DR<6> DR<7>
DR<3>
DR<2>
DR<9>
DR<8>
DR<4>
DR<10> DR<11>
DR<13>
DR_CLK
DR<12>
DR_CMD
DR<14>
SWAP_RDY EXT_REFCLK
24/24 MISC
ROM_SCLK
BUFRST
ROMCS
ROM_SI ROM_SO
STEREO
TESTMODE
CLAMP
SWAPRDY_A
SPDIF RFU
RFU RFU RFU RFU RFU
BIINBIBIOUT
BI
17/24 I2C
I2CC_SCL I2CC_SDA
I2CH_SCL
I2CS_SCL I2CS_SDA
I2CH_SDA
23/24 JTAG
JTAG_TDI
JTAG_TCLK JTAG_TMS
JTAG_TDO JTAG_TRST
ININININOUTBIBIININININ
OUTBIINININININININININININININININININININININININININININININ
OUTINININOUTINBIININ
OUT
2/2 IO - LVDS,DP/DVI,VGA,TV
HDTVSDTV Pr Y Pb
C
CVBS
Y
VGA
DP_A_L1
DP_A_L1
DP_A_L0
DP_A_L0
DP_A_AUX
DP_A_AUX
DP_A_HPD
DP_B_AUX
DP_A_L3
DP_A_L3
DP_B_HPD
DP_A_L2
DP_A_L2
DP_B_L0 DP_B_L1
DP_B_L1 DP_B_L2
DP_B_AUX
DP_B_L2
DP_B_L0
DP_C_HPD DP_C_AUX
DP_C_AUX
DP_B_L3
DP_B_L3
DP_C_L0
DP_C_L2
DP_C_L2
DP_C_L1
DP_C_L1
DP_C_L0
DP_C_L3 DP_C_L3
DP_D_L0
DP_D_L0
DP_D_AUX
DP_D_AUX
DP_D_HPD
DP_D_L2 DP_D_L3
DP_D_L3
DP_D_L1 DP_D_L2
DP_D_L1
LVDS_UTX0
LVDS_UTX0
LVDS_UTX2
LVDS_UTX1 LVDS_UTX1
LVDS_UTX2
LVDS_LTX0
LVDS_UCLK
LVDS_LTX0
LVDS_UCLK
LVDS_UTX3 LVDS_UTX3
LVDS_LCLK
LVDS_LTX3
LVDS_LTX2
LVDS_LTX3
LVDS_LTX2
LVDS_LTX1 LVDS_LTX1
LVDS_LCLK
OEM OEM
OEM OEM
OEM OEM OEM OEM
GPIO2
GPIO1
GPIO0
VGA_BLUE
VGA_GREEN
VGA_RED
VGA_VSYNC
VGA_DDC_CLK VGA_DDC_DAT
VGA_HSYNC
LVDS_DDC_DAT
LVDS_DDC_CLK
PNL_BL_EN
PNL_PWR_EN PNL_BL_PWM
DVI_HPD
VGA_DISABLE
HDMI_CEC
WAKE
TH_PWM
TH_ALERT
TH_OVERT
SMB_DAT SMB_CLK
PWR_GOOD
RSVD RSVD RSVD
PWR_EN PWR_LEVEL
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
RSVD
RSVD RSVD
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
OUTINININBI
OUT
OUTBIIN
OUT
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
CN1 CON_MXM3_EDGE
(N)PHY NPHY COMMON
168 170 172
164
160 158
159 161 163 165 167 227 229 231 233 235 237 238 239 240 241 242 243 245 247 249
38 39 40 41 42 43 44 45
26 28 30
4 29 21
31 35 33
23 25 27
32 34
20 22 24
8 18
10 12 14 16
JTAG_TDO JTAG_TDI JTAG_TCLK JTAG_TMS
JTAG_TRST*
COMMON
13.3A<
SNN_MXM_OWM_45
SNN_MXM_15
GPIO12_AC_BATT*
JTAG_TDO_R
0.05R_MAX JTAG_TDI_R
0.05R_MAX JTAG_TCLK_R
0.05R_MAX JTAG_TMS_R
0.05R_MAX JTAG_TRST_R
SNN_MXM_RSVD10
SNN_MXM_OEM1 SNN_MXM_OEM2 SNN_MXM_OEM3.01UF SNN_MXM_OEM4 SNN_MXM_OEM5
SPDIF
MXM_OEM44
COMMON
C76SPDIF_IN_GPU
5%
11.1G>
11.1G>
11.1G>
11.2E>
11.2E>
11.2E>
11.2E>
10.2E<
13.3A< 13.5E<
13.3A<>
10.2D>
10.2D>
10.2D>
13.5E<>
13.5E<
10.2D>
10.2D<
17.4A>
10.2D<
0402X4
RP502
0402X4
RP502
0402X4
RP502
0402X4
RP502
0402
5%
0402
22
C75
COMMON
0402
0
5%
COMMON
SNN_MXM_GPIO0 SNN_MXM_GPIO1 SNN_MXM_GPIO2
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_VSYNC 162 DACA_HSYNC
I2CA_SCL I2CA_SDA
SNN_MXM_WAKE SNN_MXM_HDMI_CEC SNN_MXM_PRI_DISP
DVIA_HPD I2CC_SCL I2CC_SDA
GPIO3_LVDS_PPEN
GPIO4_LVDS_BLEN
GPIO2_LVDS_BL_PWM
I2CS_SDA I2CS_SCL
GPIO8_THERM_SHDWN
GPIO9_THERM_ALERT
MXM_PWRGD 6
MXM_PWREN_R
SNN_MXM_RSVD1 SNN_MXM_RSVD2 SNN_MXM_RSVD3 SNN_MXM_RSVD4
0
7
2
0
8
1
0
6
3
0
5
4
SNN_MXM_RSVD11 SNN_MXM_RSVD12 SNN_MXM_RSVD13 SNN_MXM_RSVD14 SNN_MXM_RSVD15 SNN_MXM_RSVD16 SNN_MXM_RSVD17 SNN_MXM_RSVD18 SNN_MXM_RSVD19 SNN_MXM_RSVD20 SNN_MXM_RSVD21 SNN_MXM_RSVD22 SNN_MXM_RSVD23 SNN_MXM_RSVD24
SPDIF_IN_DP
R35
0402
GND
11.2E>
11.2E>
11.2E>
14.1H>
13.5E<>
14.1H<>
14.2G<>
14.2G>
13.5G>
13.5G>
COMMON
DNI
COMMON
DNI
COMMON
DNI
COMMON
DNI
R637
0
2
1
DNI
DP_HPD
276 277 279
253 255
261 265
267 271
273
274 270 272
246 248
252 254
258 260
264 266
234 223 225
199 201
205 207
211 213
217 219
236 230 232
206 208
212 214
218 220
224 226
195 193
189 187
183 181
177
171 169
202 200
196 194
190 188
184 182
178 176
DP_AUX_Q* DP_AUX_Q
DP_L0_C* DP_L0_C
DP_L1_C*259 DP_L1_C
DP_L2_C* DP_L2_C
DP_L3_C* DP_L3_C
SNN_DPB_HPD SNN_DPB_AUX SNN_DPB_AUXN
SNN_DPB_L0N SNN_DPB_L0
SNN_DPB_L1N SNN_DPB_L1
SNN_DPB_L2N SNN_DPB_L2
SNN_DPB_L3N SNN_DPB_L3
SNN_DPC_HPD
SNN_DPC_AUXN SNN_DPC_AUX
SNN_DPC_L0N SNN_DPC_L0
SNN_DPC_L1N SNN_DPC_L1
SNN_DPC_L2N SNN_DPC_L2
SNN_DPC_L3N SNN_DPC_L3
DPD_HPD I2CB_SDA I2CB_SCL
IFPC_TXD2* IFPC_TXD2
IFPC_TXD1* IFPC_TXD1
IFPC_TXD0* IFPC_TXD0
IFPC_TXC* IFPC_TXC
IFPB_TXD4 IFPB_TXD4*
IFPB_TXD5 IFPB_TXD5*
IFPB_TXD6 IFPB_TXD6*
IFPB_TXD7 IFPB_TXD7*175
IFPB_TXC IFPB_TXC*
IFPA_TXD0 IFPA_TXD0*
IFPA_TXD1 IFPA_TXD1*
IFPA_TXD2 IFPA_TXD2*
IFPA_TXD3 IFPA_TXD3*
IFPA_TXC IFPA_TXC*
13.1C<
13.1E<>
13.1E<>
12.2F>
12.2F>
12.2G>
12.2G>
12.2G>
12.2G>
12.3F>
12.2G>
12.2F>
12.2F>
12.1G>
12.1G>
12.2F>
12.2F>
12.2F>
12.2F>
12.2F>
12.2F>
12.1G>
12.1G>
13.1G<
13.1G<
13.2C>
13.1G<
13.3C>
13.1G<
13.2C>
13.1G<
13.2C>
13.1G<
13.2G<
13.2C>
13.2G<
13.2C>
13.2G<
13.2C>
13.2G<
13.2C>
10.2E>
11.4E>
11.4E>
12.4F>
12.3G>
12.4F>
12.3G>
12.3G>
12.3F>
12.4F>
12.3G>
12.3G>
12.3F>
12.3G>
12.3F>
12.3G>
12.3F>
12.3G>
12.3F>
12.2G>
12.2G>
12.3F>
12.3F>
12.3F>
12.3F>
12.3G>
12.3F>
12.2G>
12.2G>
12.2F>
12.2F>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2G>
12.2F>
12.2F>
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. MXM Connector; GPU Temp Sensor and JTAG; VBIOS and HDCP ROM
TP506 TP504 TP507 TP505 TP503
JTAG_TCLK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST*
MXM_PWREN_R
www.vinafix.vn
JTAG
GND
D503
SDA004
500MA
100V
SC70-6_DUAL
COMMON
D504
SDA004
500MA
100V
SC70-6_DUAL
COMMON
D505
SDA004
500MA
100V
SC70-6_DUAL
COMMON
D502
SDA004
500MA
100V
SC70-6_DUAL
COMMON
AK6 AL8 AL7 AK7 AL9
R641 10K
5% 0402 COMMON
R50
0402
3V3
GND
3V3
GND
3V3
GND 3V3
GND
1%
5
3
4
2
6
1
5
3
4
2
6
1
G1 G92-750-A2
BGA1148 COMMON
1K
COMMON
I2CC_SDA
I2CA_SCL
I2CB_SCL
I2CS_SCL
MXM_PWREN
GND
C97 220PF
50V 5% C0G 0402 COMMON
D503
SDA004
500MA
SC70-6_DUAL
COMMON
D504
SDA004
500MA
SC70-6_DUAL
COMMON
D505
SDA004
500MA
SC70-6_DUAL
COMMON
D502
SDA004
500MA
SC70-6_DUAL
COMMON
G1 G92-750-A2
BGA1148 COMMON
3V3
100V
GND
3V3
100V
GND
3V3
100V
GND
3V3
100V
GND
2
1
5
4
2
1
5
4
SPDIF_IN_GPU
R598 100K
5%
0402
COMMON
6
I2CC_SCL
3
I2CA_SDA
6
I2CB_SDA
3
I2CS_SDA
GND
HDCP ROM
P9
U9 V9
AE1 AE2
I2CC_SCLP8 I2CC_SDA
I2CH_SCL I2CH_SDA
I2CS_SCL I2CS_SDA
17.1D< 16.3A< 12.3B< 10.3F<
R648 2K
1% 0402 COMMON
17.2A<
2K
1% 0402 COMMON
2K
1% 0402 COMMON
14.3B>
13.5E<
13.5E<>
14.3B<>
VBIOS ROM
G1 G92-750-A2
BGA1148 COMMON
AB1 AC3SNN_MISC1
SNN_MISC2 SNN_MISC3 SNN_MISC4 SNN_MISC5 SNN_MISC6
AC9 AB7 AB6 AC7 AB5
B2B SLI CONNECTOR
10.5D<>
10.5D>
10.5H<
MIOA_D<14..0>
14.3H<>
10.1G<
10.4D<> 18.1B>
10.1G<
10.1G<
10.2D>
10.1G<
NET
SPDIF_IN SPDIF_IN_C
R640R630R625 2K
1% 0402 COMMON
R13 10K
5% 0402 COMMON
GND
50OHM 50OHM
3V3
2.2K
COMMON
0402
R14
0402
R8
2.2K
5%
5%
0402 COMMON
DNI
0R1
COMMON
5%
GND
3V3
18.1B>
18.1B>
ROM_CS*
AC4
ROM_SI
AB2
ROM_SO
AA3
ROM_SCLK
AA1
GPU_BUFRST*
U5
SNN_GPU_STEREO
Y12
GPU_SWAPRDY
N9
SNN_GPU_5V_CLAMP
R12
GPU_TESTMODE
V1
MIOA_D<0>
0
MIOA_D<1>
1
MIOA_D<2>
2
MIOA_D<3>
3
MIOA_D<4>
4
MIOA_D<5>
5
MIOA_D<6>
6
MIOA_D<7>
7
MIOA_D<8>
8
MIOA_D<9>
9
MIOA_D<10>
10
MIOA_D<11>
11
MIOA_D<12>
12
MIOA_D<13>
13
MIOA_D<14>
14
MIOA_DE MIOA_CLKOUT
GPIO11_RASTER_SYNC GPU_SWAPRDY
GPU_EXT_REFCLK
R12 10K
5% 0402 COMMON
R18 10K
5%
0402
COMMON
GND
J1 MXM3_MALE
MALE
MXM30_SLI_GC COMMON
10 11 14 18 15 19 22 26 23 27 31 34 38
3 6
7
30
39
2
35
602-10817-0004-200 A
p817_a02 phchan
NV_CRITICAL_NETNV_IMPEDANCE
13.5E<
13.3A<
13.5E<>
U2
HDCP_KEYROM_PROGD_V3 SO8 COMMON
6 5
3I2CH_SDAR 2
8 7
4 1
190-00007-0000-000
U4
MX25L2005ZNI SON8 SON8
GND
7 3 1
5 2 6
R642 10K
5% 0402 COMMON
COMMON
R639
0402
13.3A<
14.5G<>
5%
10K
COMMON
8
4 9
3V3
3V3
GND
14.3B>
3V3
GND
14.3B<> 13.3A<>
C26 .1UF
16V 10% X7R 0402 COMMON
1 4 5 8 9 12 13 16 17 20 21 24 25 28 29 32 33 36 37 40
C1 .1UF
16V 10% X7R 0402 COMMON
1 1
GND
14 OF 21
22-AUG-2008
Page 15
11/24 PLLVDD VID_PLLVDD_NC
VID_PLLGND
H_PLLAVDD
VID_PLLAVDD
PLLVDD
PLLAVDD
PLLGND
IN
IN
6/24 FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ FBVDDQ FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
OUT
OUT
20/24 VDD
VDD VDD VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD VDD
VDD VDD
VDD VDD
VDD
VDD VDD
VDD
VDD
VDD
VDD
VDD VDD
VDD
VDD VDD VDD VDD
VDD VDD VDD VDD VDD
VDD VDD VDD
VDD
VDD VDD
VDD VDD VDD
VDD VDD VDD
VDD
VDD
VDD
VDD
VDD_SENSE GND_SENSE
22/24 GND
GND GND
GND
GND
GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND
GND GND
GND GND GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
GND GND
GND
GND
GND GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND GND
GND GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
GND
GND GND
GND
GND
GND
GND
GND
GND
GND GND
GND GND
GND
GND
GND
GND GND
GND
GND GND
GND
GND
GND
GND GND
GND GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND GND
GND
GND
GND
GND
GND GND
GND GND
GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND GND
GND
GND GND
GND GND
GND GND
GND
GND
GND
GND
GND GND
GND
GND
GND GND
GND
GND
GND GND
GND GND
GND GND
GND GND
GND
GND
GND GND
GND
GND
GND
GND GND
GND
GND
GND
GND GND
GND
GND GND
GND GND
GND
GND
GND
GND
GND
GND
GND GND
GND
GND
GND GND GND
GND GND GND
GND GND
GND
GND GND
GND
GND
GND
GND
GND
GND
VDD33
21/24
NC NC
NC NC
NC
NC NC
NC NC
NC
NC
NC
NC
VDD33
VDD33 VDD33
VDD33
VDD33 VDD33
VDD33
VDD33
VDD33
7/24 VTT
FBVTT FBVTT FBVTT FBVTT FBVTT
FBVTT FBVTT FBVTT FBVTT FBVTT
FBVTT FBVTT FBVTT FBVTT FBVTT
FBVTT FBVTT FBVTT FBVTT FBVTT
FBVTT FBVTT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
M19 U19
Y19 AE19 AJ19 AL19 AT19
B20
P20
R20
T20
C620 .1UF
16V 10% X7R 0402 COMMON
C635 .1UF
16V 10% X7R 0402 COMMON
C621
16V 10% X7R 0402 COMMON
C686 .1UF
16V 10% X7R 0402 COMMON
C655
4.7UF
6.3V 20% X5RX5R X5R 0603 COMMON
C47
4.7UF
6.3V 20% X5R 0603 COMMON
C622 .1UF
16V 10% X7R 0402 COMMON
C629 .1UF
16V 10% X7R 0402 COMMON
C698 .1UF.1UF
16V 10% X7R 0402 COMMON
C614 .1UF
16V 10% X7R 0402 COMMON
GND
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. GPU PLLVDD Power and GND, GPU Decoupling
U20
V20
W20
Y20 AA20 AB20 AC20 AP20
F21
L21
P21
U21
Y21 AC21 AF21 AR21
D22
H22
U22
Y22 AF22 AK22 AT22
B23
M23
T23
U23
Y23 AA23
AC23
F24 AL24 AP24
D25
H25
P25
V25
W25 AC25
AF25 AJ25 AN25
B26
L26
T26 AA26 AR26
F27 AJ27
AL27
B29
E29
M29
R29
V29
W29 AB29 AG29 AM29
AR29
G30 AK30
K31
N31
T31 AA31 AD31 AG31
B32
E32
H32 AJ32 AM32 AR32
M33
R33
V33
W33 AB33
AE33
B35
E35
H35
L35
P35
U35
Y35 AC35 AF35
AJ35 AM35 AR35 AH14
GND
www.vinafix.vn
G1 G92-750-A2
BGA1148 COMMON
G1 G92-750-A2
BGA1148 COMMON
FBVTT
G1 G92-750-A2
BGA1148 COMMON
NVVDD
NVVDD
3V3
N11
C690 .1UF
16V 10% X7R 0402 COMMON
C669 .1UF
16V 10% X7R 0402 COMMON
C679
4.7UF
6.3V 20% X5R 0603 COMMON
P11 R11 N12 AH15
AJ16 AK16 AJ17 AK17
AH1 AH2 AE3 AF3 AH3 AJ3 AD4 AF4 AG8 AE21 AF23 AP23 AJ26
M12 M13 M15 M16 M17
M20 M21 M22 AE22 AE23
M24 AE24 M25 N25 R25
T25 U25 Y25 AA25 AB25
AD25 AE25
SNN_GPU_NC0 SNN_GPU_NC1 SNN_GPU_NC2 SNN_GPU_NC3 SNN_GPU_NC4 SNN_GPU_NC5 SNN_GPU_NC6 SNN_GPU_NC7 SNN_GPU_NC8 SNN_GPU_NC9 SNN_GPU_NC10 SNN_GPU_NC11 SNN_GPU_NC12
SNN_FBVTT_NC0 SNN_FBVTT_NC1 SNN_FBVTT_NC2 SNN_FBVTT_NC3 SNN_FBVTT_NC4
SNN_FBVTT_NC5 SNN_FBVTT_NC6 SNN_FBVTT_NC7 SNN_FBVTT_NC8 SNN_FBVTT_NC9
SNN_FBVTT_NC10 SNN_FBVTT_NC11 SNN_FBVTT_NC12 SNN_FBVTT_NC13 SNN_FBVTT_NC14
SNN_FBVTT_NC15 SNN_FBVTT_NC16 SNN_FBVTT_NC17 SNN_FBVTT_NC18 SNN_FBVTT_NC19
SNN_FBVTT_NC20 SNN_FBVTT_NC21
Under GPU
C645 .1UF
16V 10% X7R 0402 COMMON
C683 .1UF
16V 10% X7R 0402 COMMON
C639
4.7UF
6.3V 20% X5R 0603 COMMON
C674 .1UF
16V 10% X7R 0402 COMMON
C680 .1UF
16V 10% X7R 0402 COMMON
C663
4.7UF
6.3V 20% X5R 0603 COMMON
C676 1UF
6.3V 10% X5R 0402 COMMON
C706 .1UF
16V 10% X7R 0402 COMMON
C630 .1UF
16V 10% X7R 0402 COMMON
C625 .1UF
16V 10% X7R 0402 COMMON
C628
4.7UF
6.3V 20% X5R 0603 COMMON
C697 1UF
6.3V 10% X5R 0402 COMMON
C711 .1UF
16V 10% X7R 0402 COMMON
GND
GND
C684 1UF
6.3V 10% X5R 0402 COMMON
C671 .1UF
16V 10% X7R 0402 COMMON
C664 .1UF
16V 10% X7R 0402 COMMON
C656 .1UF
16V 10% X7R 0402 COMMON
C692
4.7UF
6.3V 20% X5R 0603 COMMON
C658 .1UF
16V 10% X7R 0402 COMMON
C651 .1UF
16V 10% X7R 0402 COMMON
C693
4.7UF
6.3V 20% X5R 0603 COMMON
C665 .1UF
16V 10% X7R 0402 COMMON
C677 .1UF
16V 10% X7R 0402 COMMON
C638
4.7UF
6.3V 20% X5R 0603 COMMON
Page15: GPU PLLVDD Power and GND, GPU Decoupling
FBVDDQVDD33
FBVDDQ
Under GPU
C608 .1UF
16V 10% X7R 0402 COMMON
C607 .1UF
16V 10% X7R 0402 COMMON
C612 .1UF
16V 10% X7R 0402 COMMON
C598 .1UF
16V 10% X7R 0402 COMMON
C52
4.7UF
6.3V 20% X5R 0603 COMMON
C592
4.7UF
6.3V 20% X5R 0603 COMMON
C632 .1UF
16V 10% X7R 0402 COMMON
C681 .1UF
16V 10% X7R 0402 COMMON
C631
4.7UF
6.3V 20% X5R 0603 COMMON
GND
C695 .1UF
16V 10% X7R 0402 COMMON
C642 .1UF
16V 10% X7R 0402 COMMON
C613
16V 10% X7R 0402 COMMON
C611 .1UF
16V 10% X7R 0402 COMMON
C624
4.7UF
6.3V 20%
0603 COMMON
C591
4.7UF
6.3V 20% X5R 0603 COMMON
C672 .1UF
16V 10% X7R 0402 COMMON
C623 .1UF
16V 10% X7R 0402 COMMON
C662 .1UF.1UF
16V 10% X7R 0402 COMMON
C610 .1UF
16V 10% X7R 0402 COMMON
C55
4.7UF
6.3V 20%
0603 COMMON
C56
4.7UF
6.3V 20% X5R 0603 COMMON
B2 E2 H2 L2 P2 U2 Y2 AC2 AF2 AJ2
AM2 AP3 M4 R4 V4 W4 AB4 AE4 B5 E5
H5 AJ5 AM5 AR5 K6 N6 T6 AA6 AD6 AG6
AT7 B8 E8 H8 M8 R8 V8 W8 AB8 AE8
AJ8 AM8 AP8 F10 AT10 B11 M11 T11 AA11 AD11
AF11 AK11 AP11 D12 P12 V12 W12 AJ12 AR12 F13
AL13 AT13 B14 H14 M14 P14 T14 U14 Y14 AA14
AC14 AE14 AP14 D15 H15 U15 Y15 AJ15 AR15 F16
L16 P16 U16 Y16 AC16 AF16 AL16 AT16 B17 P17
R17 T17 U17 V17 W17 Y17 AA17 AB17 AC17 AP17
D18 H18 M18 U18 Y18 AE18 AJ18 AR18 D19 H19
MIN_LINE_WIDTHMAX_CURRENT
G1 G92-750-A2
BGA1148 COMMON
16MIL 16MIL
GPU_PLLVDD GPU_H_PLLAVDD
GPU PLLVDD
PEX_VDD
LB501
C691
4.7UF
6.3V X5R
0603 COMMON
GND
At lease 2 vias to GPU_PLLVDD for 3 PINs
240R@100MHz
COMMONBEAD_0402
GND
VOLTAGENET
C704
4.7UF
6.3V 20%20% X5R 0603 COMMON
1.2V
1.2V
SNN_GPU_VID_PLLVDD
GPU_PLLVDD
C702 .1UF
16V 10% X7R 0402 COMMON
GND
0.10A
0.10A
AB11
AC12
AA12
AC11
AB12
C701 .1UF
AF29
16V 10% X7R 0402 COMMON
AD12
PEX_VDD
240R@100MHz
LB5
COMMON
BEAD_0402
Share with C25
G1 G92-750-A2
BGA1148 COMMON
GND
R14 V14 W14 AB14 P15
R15 T15 V15 W15 AA15
AB15 AC15 R16 T16 V16
W16 AA16 AB16 P18 R18
T18 V18 W18 AA18 AB18
AC18 P19 R19 T19 V19
W19 AA19 AB19 AC19 R21
T21 V21 W21 AA21 AB21
R22 T22 V22 W22 AA22
AB22 AC22 R23 V23 W23 AB23
P22 P23
C59
4.7UF
6.3V 20% X5R 0603 COMMON
GND
PS_VSENP_NV PS_VSENN_NV
NVVDD
C67 1UF
6.3V 10% X5R 0402 COMMON
GND
GPU_H_PLLAVDD
C65 .1UF
16V 10% X7R 0402 COMMON
G1 G92-750-A2
BGA1148
L12 L13 J14 L14 J15
L15 J17 L17 J18 L18
J19 L19 J20 L20 J22
L22 J23 L23 L24
AF24
L25 M26 N26 P26 R26
U26 V26 W26 Y26
AB26 AC26
AD26 AE26 AF26
K28 U28
V28 W28 Y28
AA28 AD28
AE28
L29
AA29
COMMON
FBVDDQ
16.4D<
16.2G<
16.5D<
16.2G<
602-10817-0004-200 A
p817_a02 phchan
15 OF 21
22-AUG-2008
Page 16
Page16: Power Supply I - NVVDD
INININININININININININININININININININININININININININININININ
IN
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
IN
IN
S
D
G
OUT
2 Phase PWM
PVCC
VIN
UGATE1
BOOT1
PHASE1
LGATE1
PGND1
ISEN1
PHASE2
UGATE2
BOOT2
LGATE2
ISEN2
FB2
PGND2
VO
OCSET
VSUM
DROOP
DFB
VSEN
RTN
NC
THERM_GND
VDD VDD
PGOOD VR_ON
VDIFF
COMP VW
FB
NTC VRHOT* SOFT
RBIAS
SET2 SET3
SET1
VID1
VID0
VID4
VID3
VID2
VID5
GND
VID6
GND
NC
INININ
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
3V3
R62 10K
GPIO5_NVVDD_CTL0
GPIO7_NVVDD_CTL2
3V3
5
1 2
U7
NC7SZ08
4
SC70-5 COMMON
3
1G1D1S
PS_RC_PHASE_R
5% 0402 COMMON
PS_RC_PHASE
3
Q19
2N7002
1
COMMON
2
V_BE_GS=20V
GND
GND
PWR_SRC
GND
GND
GND
DNI
C657 .1UF
16V 10% X7R
C616
4.7UF
6.3V 20% X5R 0603 COMMON
COMMON 0402
PWR_SRC5V
R568
4.7
5% 0402 COMMON
0.22UF
C668
25V
0603
10%
COMMON
X7R
0.22UF
C605
25V
0603
COMMON
X7R
10%
0.22UF
C643
25V0603
COMMON
X7R
10%
R571
0402
R569
Rs
0402
R564
Rs
0402
R570
0402
Cn
C661
0402
X7R
10%
OC THRESHOLD SET TO 79A MINIMALLY
R555
0402
R562 300
5%
ACTIVE DROOP SET TO 2mV/A
0402 COMMON
PS_VSENP_NV
PS_VSENN_NV
GND
PS_BOOT1_NV_R
PS_BOOT2_NV_R
21.5K
COMMON
1%
21.5K
COMMON
1%
21.5K
COMMON
1%
10.7K
COMMON
1%
.047UF
COMMON
16V
15.8K
COMMON
1%
C673
0402 X7R
R565
0402
2.2
R549
COMMON
0603
5%
LFPAK
4
2.2R559
06035%COMMON
LFPAK
4
Rnet x Cn = L/DCR
PS_RC_NTCRNET_NV
.01UF
16V
COMMON
10%
1%
1K
COMMON
15.5G>
16.2G<
*
C689 .01UF
16V 10% X5R 0402 COMMON
GND16.2G< 15.5G>
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. GPU PLLVDD Power and GND, GPU Decoupling
www.vinafix.vn
5
Q16 BSC016N03MS
LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=28A
2
R_DS_ON=1.6mOHM MAX_CURRENT=100A
3
MAX_WATTAGE=2.5W V_BE_GS=+/-16V
GND
5
Q6 BSC016N03MS
LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=28A
2
R_DS_ON=1.6mOHM MAX_CURRENT=100A
3
MAX_WATTAGE=2.5W V_BE_GS=+/-16V
GND
LFPAK
LFPAK
4
LFPAK
4
LFPAK
Q14 BSC090N03LSG
LFPAK COMMON
4
Q5 BSC090N03LSG
LFPAK COMMON
4
5
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=30A@100C
2
R_DS_ON=0.0133R@4.5V MAX_CURRENT=192A@25C
3
MAX_WATTAGE=2.5W@Ta=25C V_BE_GS=+/-20V
5
Q15 BSC016N03MS
LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=28A
2
R_DS_ON=1.6mOHM MAX_CURRENT=100A
3
MAX_WATTAGE=2.5W V_BE_GS=+/-16V
GND
5
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=30A@100C
2
R_DS_ON=0.0133R@4.5V MAX_CURRENT=192A@25C
3
MAX_WATTAGE=2.5W@Ta=25C V_BE_GS=+/-20V
5
Q3 BSC016N03MS
LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=28A
2
R_DS_ON=1.6mOHM MAX_CURRENT=100A
3
MAX_WATTAGE=2.5W V_BE_GS=+/-16V
GND
5V
C649
0402
10.2D>
10.2D>
10.2D>
VOLTAGE IDENTIFICATION CODES (normal voltages w/ zero offset)
VID<6..0> NVVDD
0 0 1 0 0 0 0 1.300 <­0 0 1 0 1 0 0 1.250 <­0 0 1 1 0 0 0 1.200 <­0 0 1 1 1 0 0 1.150 <­0 1 0 0 0 0 0 1.100 <­0 1 0 0 1 0 0 1.050 <­0 1 0 1 0 0 0 1.000 <­0 1 0 1 1 0 0 0.950 <­0 1 1 0 0 0 0 0.900 <­0 1 1 0 1 0 0 0.850 <­0 1 1 1 0 0 0 0.800 <­0 1 1 1 1 0 0 0.750 <-
SLOWDOWN THE SLOP OF NV_PGOOD
14.2F> 12.3B<
17.1D< 17.2A<
R561
0402
220PF
C18
50V
0402
5% C0G COMMON
C647
Ccomp
C0G
PS_CP_RC_NV
220PF
COMMON
50V
C0G
5%
Cfb
GPIO7_NVVDD_CTL2
12.2B>
17.4B<
10.3F<
Rvdiff
2K
COMMON
1%
PS_RC_VDIF_NV
220PF
50V0402 5%
R539 R546
R550
2K
1%
0402
PS_PGOOD_NV
MXM_PWREN
R61
0402
COMMON
147K
R560
COMMON
0402
1%
Rcomp
GND
3V3
R544 10K
5% 0402 COMMON
0
COMMON
0402
5%
DNI
0
COMMON
0402
5%
GND
GPIO<7..5> NVVDD 0 0 0 1.100 <­0 0 1 1.050 <­0 1 0 1.000 <­0 1 1 0.950 <­1 0 0 0.900 <­1 0 1 0.850 <­1 1 0 0.800 <­1 1 1 0.750 <-
ACTIVE VOLTAGE DROOP MAX = 1.000V WHEN Iout_max = 50A
COMMON
C603 .1UF
16V 10% X7R
0402
COMMON
GND
365
COMMON
1%
Rfsw
4.99K
R557
COMMON
0402
1%
Cvw
47PF
C634
COMMON
50V
0402
C0G
5%
147K
R552
COMMON
0402
1%
.022UF
C617
10V
0402
COMMON
10% X5R
3V3
R545 10K
5% 0402 COMMON
GPIO5_NVVDD_CTL0
GPIO6_NVVDD_CTL1
PS_VID4_NV
PS_VID5_NV
R542
R543
10K
10K
5%
5%
0402
0402
COMMON
COMMON
GND
PerfMode 3
PerfMode 0/1/2 (Hardware Default) P12 Will be 0.85V and One Phase
PS_PWM_VDIFF_NV
PS_FB_NV
PS_PWM_VW_NV
PS_PWM_RBIAS_NV
SNN_PS_NTC_NV
SNN_PS_VRHOT_NV*
PS_SS_NV
PS_RC_PHASE
C667
4.7UF
6.3V 20% X5R
0603
COMMON
GND
SET TO 260Khz
SET TO 0.9V/mS
GND
PS_PWM_VDD_NV
U502 ISL9502A
DYNAMIC VID(0.5V..1.50V) QFN48 QFN48 COMMON
3
22
1
44
13
11 10PS_CP_NV
9
4 6 5 7
3V3
45 46
2
37 38 39 40 41 42 43
21 48
49
47
25
SNN_ISL9502_NC1
R563
0402
5%
SNN_ISL9502_NC2
4.7
COMMON
31 20
35 36 34
32 24 33
27 26 28
30 23 29
12
19
8
18
16
17
14 15
PS_VIN_NV
PS_UG1_NV
PS_BOOT1_NV
PS_PHASE1_NV
PS_LG1_NV
PS_ISEN1_NV
PS_UG2_NV
PS_BOOT2_NV
PS_PHASE2_NV
PS_LG2_NV
PS_ISEN2_NV
SNN_PS_FB2_NV
PS_PWM_VSUM_NV
PS_PWM_OCSET_NV
PS_DROOP_NV
PS_PWM_DFB_NV
C503
0.22UF
25V 10% X7R 0603 COMMON
C728
0.22UF
25V 10% X7R 0603 COMMON
C501
4.7UF
25V 10% X5R 1206 COMMON
INPUT CAPS FOR PHASE-1
C750
4.7UF
25V 10% X5R 1206 COMMON
INPUT CAPS FOR PHASE-2
PWR_SRC
1000PF
C757
50V0402
X5R
10%
COMMON
1000PF
50V 1206
0402 X5R
10%
PS_RC2_NV
C557C17
25V 10% X5R 1206 COMMON
C506 10UF
25V +/-10% X5R 1206 COMMON
PS_RC1_NV
4.7UF 4.7UF
25V 10% X5R 1206 COMMON
C544 10UF
25V +/-10% X5R 1206 COMMON
C572
COMMON
NVVDD
C93
C21
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
TO PWM
TO PWM
R601
1206
C95 .1UF
16V 10% X7R 0402 COMMON
C522
4.7UF
25V 10% X5R 1206 COMMON
C558
4.7UF
25V 10% X5R 1206 COMMON
R522
5%
5%
1.5
COMMON
1.5
COMMON
16.4D<
16.5D<
C755
25V +/-10% X5R 1206 COMMON
GND
C48
4.7UF
25V 20% X7R 1206 COMMON
SMD_520X508
131-0232-000
MAX_CURRENT=49A CONTINUOUS_CURRENT=28A DC_RESISTANCE=0.0025R
HEIGHT=3.5MM
GND
ALT PART: 131-0209-000
R567
0402
PS_ISEN1_NV
PS_PWM_VO_NV
PS_ISEN2_NV
0402
SMD_520X508
131-0232-000
MAX_CURRENT=49A CONTINUOUS_CURRENT=28A DC_RESISTANCE=0.0025R
HEIGHT=3.5MM
GND
ALT PART: 131-0209-000
C103 .1UF
16V 10% X7R 0402 COMMON
1A@45C, 100 TO 500 KHZ
15.5G>
15.5G>
L3
1%
1%
L2
C35 220UF
COMMON +/-20%
2.5V POSCAP
SMD_3528
0.070 OHM
C12
4.7UF10UF
25V 20% X7R 1206 COMMON
C543
4.7UF
25V 10% X5R 1206 COMMON
21.5K
COMMON
21.5KR566
COMMON
NVVDD
COMMON
COMMON
GND
0.68uH
C688
C687
0.68uH
NVVDD
PS_VIN_NV PS_PHASE1_NV PS_PHASE2_NV PS_UG1_NV PS_BOOT1_NV PS_LG1_NV PS_ISEN1_NV PS_RC1_NV PS_UG2_NV PS_BOOT2_NV PS_LG2_NV PS_ISEN2_NV PS_RC2_NV PS_PWM_VSUM_NV PS_PWM_OCSET_NV PS_DROOP_NV PS_PWM_DFB_NV PS_PWM_VO_NV PS_PWM_VDD_NV PS_PWM_VDIFF_NV PS_FB_NV PS_CP_NV PS_CP_RC_NV PS_PWM_VW_NV PS_PWM_RBIAS_NV PS_SS_NV PS_VSENP_NV PS_VSENN_NV PS_BOOT1_NV_R PS_BOOT2_NV_R PS_RC_NTCRNET_NV PS_RC_VDIF_NV
C37
4.7UF
25V 10% X5R 1206 COMMON
.1UF
16V
0402
X7R
10%
COMMON
.1UF
16V
0402
X7R
10%
COMMON
R578 100K
5% 0603 COMMON NTC
1.10V
Iout_peak_to_peak = 2.5A (Iout_max=50A; Vin=7.5V; Vout=1.2V; F=300KHz)
Iout_peak_to_peak = 2.3A (Iout_max=50A; Vin=22V; Vout=1.0V; F=300KHz)
Iin_rms = 10A (Iout_max=50A; Vin=7.5V; Vout=1.2V)
Iin_rms = 6.3A (Iout_max=50A; Vin=22V; Vout=1.0V)
R537
4.7
5% 0402 COMMON
C44 470UF
COMMON 20% 2V POSCAP 3A@105C
0.009R SMD_7343
GND
C38 470UF
COMMON 20% 2V
GND
POSCAP 3A@105C
0.009R SMD_7343
R574
4.7
5% 0402 COMMON
Place as close as possible to L1
C46 220UF
COMMON +/-20%
2.5V POSCAP
0.070 OHM SMD_3528
1A@45C, 100 TO 500 KHZ
C666
4.7UF
6.3V 20% X5R 0603 COMMON
C678
4.7UF
6.3V 20% X5R 0603 COMMON
Place near the output POS-CAPs
602-10817-0004-200 A
p817_a02 phchan
LINE_WIDTHCURRENTVOLTAGENET
54A
27A 27A
20MIL
16MIL 16MIL 16MIL 20MIL 20MIL 20MIL 16MIL 20MIL 20MIL 20MIL 20MIL 16MIL 20MIL 16MIL 16MIL 16MIL 16MIL 16MIL 16MIL 16MIL 16MIL 16MIL 16MIL 16MIL 16MIL 16MIL 6MIL 6MIL
20MIL 20MIL 16MIL 16MIL
NVVDD
C51 470UF
COMMON 20% 2V POSCAP 3A@105C
0.009R SMD_7343
GND
C42 470UF
COMMON 20% 2V POSCAP 3A@105C
0.009R SMD_7343
GND
C594
4.7UF
6.3V 20% X5R 0603 COMMON
C597
4.7UF
6.3V 20% X5R 0603 COMMON
16 OF 21
22-AUG-2008
Page 17
INININININININININININININININININININININ
VOUT
VOUT
VOUT
FB
VIN
VIN
VIN
EN VCTL
GND
POK
SW SW
BST
FB
VCC
IN IN
GND
EN/SYNC
THERMAL
GND
IN
IN
S
D
G
S
D
G
S
D
G
D
S
G
S
D
G
VOUT
VOUT
VOUT
FB
VIN
VIN
VIN
EN VCTL
GND
POK
IN
VIN
BOOT
PHASE
UG
ISEN
PGND
LG
VO FB
GND(PAD)
PVCC
VCC
FCCM
EN
PGOOD
FSET
COMP
IN
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
GND
10.3F<
C30
0402
C29
0805
5V
5V
.1UF
16V 10% X7R COMMON
22UF
6.3V 20% X5R COMMON
MXM_PWREN
MIO_VDDQ
U5 MP38115
VR=0.8V DFN10 COMMON
4 7
6
10
C710
2
1UF
9
10V
11
10% X5R 0603 COMMON
GND
C104
5
3 8
PS_2V5_FB_R
1
PS_2V5_BOOT
.01UF
16V
0402
10% X7R COMMON
PS_2V5_PHASE
R63
0402
SMD_045_041
301K
COMMON
1%
L1
C8 1UF
6.3V 10%10% X5R 0402 COMMON
3V3
12.3B< 17.2A< 16.3A< 14.2F>
Page17: Power Supply II - FBVDDQ, PEX_VDD
R_DS_ON=73mR
MAX_WATTAGE=0.9W@70C
MAX_VOLTAGE=-20V
CONTINUOUS_CURRENT=-3.5A@70C
MAX_CURRENT=-25A
17.1D<
3V3_RUN
V_BE_GS=+/-20V
MXM_PWREN_N1
1G1D1S
1
10.3F< 12.3B< 14.2F> 16.3A<
MXM_PWREN
R618 10K
5% 0402 COMMON
2
GND
COMMON
3
Q4
AO3415
SOT23_1G1D1S
1
1G1D1S
MXM_PWREN_N2
R592 1K
5% 0402 COMMON
6
Q503
FDC6301N SOT23_6D_1G1D1S COMMON
5
MAX_VOLTAGE=25V CONTINUOUS_CURRENT=0.22A R_DS_ON=5R MAX_CURRENT=0.5A MAX_WATTAGE=0.7W@125C V_BE_GS=8V
GND
C733 .1UF
16V 10% X7R 0402 COMMON
C11
4.7UF
6.3V X5R
0603 COMMON
GND GND
PEX_VDD
FBVDDQ
U6
RT9018B-25GQW DFN10 COMMON
7 8 9
C69
6.3V
0603
6
5 10 11
20% X5R
Vout = Vref * (1+R1/R2)
1.1V = 0.8V * (1+750/2k)
GNDGND
5V
0402
5V
COMMON
5%
C63 1UF
6.3V
0402
SNN_PEX_VDD
COMMON
4.7UF
10% X5R
COMMON
PS_1V1_EN
4.7K
R37
GND
1 2 3
4
PS_1V1_FB
DNI
C73 1000PF
50V 10% X5R 0402 COMMON
FBVDDQ
5V
14.3B>
GND
37.4K
1% 0402 COMMON
SET TO 453K
GND
STUFF FOR ISL6269A
R527
C548
0402
4.7UF
6.3V 20% X5R 0603 COMMON
MXM_PWRGD
12.2B> 16.2A>
C552R515 .01UF
16V 10% X7R 0402 COMMON
4.7
COMMON
5%
3V3
PS_PWM_VCC_FB
R518 10K
5% 0402 COMMON
PS_FSET_FB
PS_CP_FB
GND
R523
0402
C575
4.7UF
6.3V 20% X5R 0603 COMMON
DEM ENABLED
1%
26.1K
COMMON
U501 ISL6269ACRZ
VR_SW=0.6V MLFP16 MLFP16 COMMON
12
2
3
16
4PS_PGOOD_NV
7
TP
5
PS_CP_RC_FB
18PF
C563
50V
0402
5% C0G COMMON
C574
0402
GND
1
14
13
15
9
11
10
8 6
R36
6.04K
1% 0402 COMMON
R1
R38
15.8K
1% 0402 COMMON
R2
PS_VIN_FB
PS_UG_FB
PS_BOOT_FB
PS_PHASE_FB
PS_ISEN_FB
PS_LG_FB
PS_RC_VO
PS_FB_FB
.01UF
25V 10% X7R COMMON
PEX_VDD
GND
C61
4.7UF
6.3V 20% X5R 0603 COMMON
PWR_SRC
C553
0603
COMMON
R511
0402
R517
1.87K
1% 0402 COMMON
Rbot
GND
C66 220UF
COMMON +/-20%
2.5V POSCAP 1A@45C, 100 TO 500 KHZ
0.070 OHM
GND
SMD_3528
R524
4.7
5% 0402 COMMON
0.22UF
C576
25V
0603
10% X7R COMMON
PS_BOOT_FB_R
0.22UF
25V 10% X7R
10K
COMMON
1%
R520
7.32K
1% 0402 COMMON
Rbot1
GND
2.2
R516
COMMON
0603
5%
OC THRESHOLD SET TO 18A MINIMALLY
3.01K
R521
COMMON
0402
1%
Rtop
2N7002
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=60V
R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W
V_BE_GS=20V
Q502
3
1G1D1S
2
PS_FB_VCTL*
CONTINUOUS_CURRENT=0.115A
5V
0402
SNN_1V8_POK
COMMON
5%
5V
C783
C4
22UF
1UF
6.3V
6.3V 10%
0805
0402
COMMONCOMMON
PS_1V8_EN
4.7K
R3
GND
5
4
4
0
COMMON
DNI
R51 10K
5% 0603 COMMON
DNI
R501 10K
5% 0603 COMMON
Q13 BSC090N03LSG
LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=30A@100C
2
R_DS_ON=0.0133R@4.5V MAX_CURRENT=192A@25C
3
MAX_WATTAGE=2.5W@Ta=25C V_BE_GS=+/-20V
5
Q17 BSC016N03MS
LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=28A
2
R_DS_ON=1.6mOHM MAX_CURRENT=100A
3
MAX_WATTAGE=2.5W V_BE_GS=+/-16V
GND
FBVDDQ
R532
0402
1%
1K
COMMON
1
GND
R64
0402
PS_FB_VCTL
C585 .01UF
16V 10% X7R 0402 COMMON
LFPAK
LFPAK
5%
www.vinafix.vn
1V8
U1
2V5
RT9018B-25GQW DFN10 COMMON
7 8 9 6
5 10 11
GND
20% X5RX5R
Vout = Vref * (1+R1/R2)
1.8V = 0.8V * (1+12.4K/10K)
GND
C502
0.22UF
25V 10% X7R 0603 COMMON
SMD_420X400
C525 1000PF
50V 10% X5R 0402 COMMON
PS_RC_FB
R508
1.5
5% 1206 COMMON
GND
GPIO13_FBVDDQ_CTL
R533 10K
5% 0402 COMMON
GND
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. Power Supply II - FBVDDQ, PEX_VDD
1 2 3
C737 10UF
25V +/-10% X5R 1206 COMMON
L4
COMMON
ALT PART: 131-0009-000
DNI
C2 1000PF
50V 10% X5R 0402
PS_1V8_FB4
COMMON
GND
PWR_SRC
C542
4.7UF
25V 10% X5R 1206 COMMON
1.0UH
GND
C105 .1UF
16V 10% X7R 0402 COMMON
GND
GND
C108 Need to use 041-0040-000 or 041-0038-000
GPIO13 HIGH: FBVDD/Q = 1.80V (HARDWARE DEFAULT)
10.2D>
GPIO13 LOW FBVDD/Q = 1.55V
FBVDDQ = 0.6*[1+(Rtop/Rbot)]
1.55V = 0.6*[1+(3.01K/1.87K)]
1.802V = 0.6*{1+[3.01K/(1.87K||7.32K)]}
2V5
0.47 uH
COMMON
R54
33.2K
1% 0402 COMMON
C107 22UF
PS_2V5_FB
GND
R55
15.4K
1% 0402 COMMON
6.3V 20% X5R 0805 COMMON
1V8
R635
12.4K
1% 0402 COMMON
R1
R634 10K
5% 0402 COMMON
R2
C106 .1UF
16V 10% X7R 0402 COMMON
C786
4.7UF
6.3V 20% X5R 0603 COMMON
GND
Iout_peak_to_peak = ?A (Iout_max=10A; Vin=7.5V; Vout=1.8V; F=500KHz)
Iout_peak_to_peak = ?A (Iout_max=10A; Vin=22V; Vout=1.8V; F=500KHz)
Iin_rms = ?A (Iout_max=10A; Vin=7.5V; Vout=1.8V)
Iin_rms = ?A (Iout_max=10A; Vin=22V; Vout=1.8V)
C3 220UF
COMMON +/-20%
2.5V POSCAP
0.070 OHM SMD_3528
GND
1A@45C, 100 TO 500 KHZ
C72 22UF
6.3V 20% X5R 0805 COMMON
GND
LINE_WIDTHCURRENTVOLTAGE
16MIL 16MIL 16MIL
16MIL 30MIL 16MIL 16MIL
12MIL 20MIL
12MIL 12MIL
12MIL 12MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 16MIL 16MIL 16MIL 16MIL 16MIL 20MIL
16MIL 16MIL 20MIL
C102 22UF
6.3V 20% X5R 0805 COMMON
C720 .1UF
16V 10% X7R 0402 COMMON
FBVDDQ
PEX_VDD MIOA_VDDQ MIOB_VDDQ
2V5 3V3
1V8
NET
FBVDDQ PEX_VDD MIOA_VDDQ MIOB_VDDQ
2V5 3V3
1V8 PS_2V5_BOOT PS_2V5_PHASE
PS_PEXVDD_FB PS_MIOA_FB
PS_PEX_EN PS_1V8_EN PS_PHASE_FB PS_PWM_VCC_FB PS_UG_FB PS_LG_FB PS_BOOT_FB PS_FB_VCTL* PS_CP_FB PS_ISEN_FB PS_FB_FB PS_CP_RC_FB PS_FSET_FB PS_RC_FB
PS_2V5_FB PS_2V5_FB_R PS_RC_VO
3V3
BEAD_0603
COMMON
1.8V
1.1V
2.5V
2.5V
2.5V
3.3V
1.8V
DNI
220R@100MHzLB508
15A
2.0A
0.5A
0.5A 2A
1.5A
3.5A
4A
18A
MIOA_VDDQ
2V5
C747
6.3V
0603
LB_MIO
DNI
20% X5R
LB506
BEAD_0603
220R@100MHz
COMMON
4.7UF
COMMON
GND
LB509
220R@100MHz
COMMONBEAD_0603
GND
DNI
C772
4.7UF
6.3V 10% X5R 0603 COMMON
MIOB_VDDQ2V5
FBVDDQ
C108 330UF
COMMON 20%
2.5V POSCAP
3.0A
0.009R SMD_7343
GND
GND
C568
4.7UF
6.3V 20% X5R 0603 COMMON
GND
C564
4.7UF
6.3V 20% X5R 0603 COMMON
MIO_VDDQ POWER SUPPLY STUFF OPTIONS:
FOR A 3V3 ONLY SYSTEM NOT REQUIRED SLI AND DP:
1) NOSTUFF LB_2V5;
2) STUFF R_3V3;
3) STUFF LB_MIO;
4) NOSTUFF MIO_VDDQ LDO.
5) NOSTUFF R_MIOA AND R_MIOB (AT NEXT STRAPS PAGE).
FOR A 3V3 ONLY SYSTEM REQUIRED SLI AND/OR DP:
1) NOSTUFF LB_2V5;
2) NOSTUFF R_3V3;
3) STUFF LB_MIO;
4) STUFF MIO_VDDQ LDO.
5) STUFF R_MIOA AND R_MIOB (AT NEXT STRAPS PAGE).
FOR A SYSTEM REQUIRED SLI OR DP:
1) STUFF LB_2V5;
2) NOSTUFF R_3V3;
3) STUFF LB_MIO;
4) NOSTUFF MIO_VDDQ LDO.
5) STUFF R_MIOA AND R_MIOB (AT NEXT STRAPS PAGE).
FOR A SYSTEM REQUIRED BOTH SLI AND DP:
1) STUFF LB_2V5;
2) NOSTUFF R_3V3;
3) NOSTUFF LB_MIO;
4) STUFF MIO_VDDQ LDO.
5) STUFF R_MIOA AND R_MIOB (AT NEXT STRAPS PAGE).
602-10817-0004-200 A
p817_a02 phchan
17 OF 21
22-AUG-2008
Page 18
Page18: GPU Strap Configuration and Mechanical
D
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D
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OUT
OUT
OUT
OUT
OUT
OUT
2
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4
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1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
STRAP BIT
LOGIC 0
ALWAYS SET MIOA_VDDQ VOLTAGE = MIOB_VDDQ VOLTAGE. THE STRAPS ARE PULLED UP TO MIOB_VDDQ IS FOR BOARD LAYOUT OPTIMIZE.
LOGIC 1
MIOB_VDDQ
REG: NV_STRAP_0
10.1G<
10.4D<> 14.4F<>
10.1G<
10.4H> 13.2A<
14.2G<
13.3A< 10.5H> 10.1G<
14.2G<
Mechanical
MEC1
MXM_V3_TYPE_B_BP_82X100MM X6 COMMON
1
MEC1
MXM_V3_TYPE_B_BP_82X100MM X6 COMMON
2
MIOA_D<14..0> MIOB_D<12..0> ROM_SI ROM_SCLK MIOB_HSYNC
0'1
0'2
0'3
0'4
0'5
0'13 0'28
0'17
R600
0402
0402
0402
R659
R628
0402
R623
0402
0402
5%
R7
R4
R2
10K
DNI
COMMON
PCI_AD_SWAP
DNI
2K
COMMON
1%
DNI
10K
COMMON
5%
DNI
10K
COMMON0402
5%
DNI
10K
COMMON
5%
10K
COMMON
5%
10K
COMMON
5%
MIOA_D<1>
MIOB_D<0>
MIOB_D<1>
MIOB_D<8>
MIOB_D<9>
MIOB_D<2>
R652
0402
R655
0402
R631
0402
R617
0402
10K
COMMON
5%
10K
COMMON
5%
10K
COMMON
5%
DNI
10K
COMMON
5%
SUB_VENDOR
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
CRYSTAL
TV_MODE_0 TV_MODE_1 TV_MODE_2
MIOB_D<4>
MIOB_D<5>
MIOB_D<3>
MIOB_D<11>
MIOB_D<12>
MIOA_D<0>
R656
0402
R643
0402
R636
0402
R615
0402
R614
0402
R650
0402
DNI
2K
COMMON
1%
DNI
2K
COMMON
1%
DNI
2K
COMMON
1%
2K
COMMON
1%
2K
COMMON
1%
2K
COMMON
1%
PCI_DEVID_0 PCI_DEVID_1 PCI_DEVID_2 PCI_DEVID_3 PCI_DEVID_EXT
PEX_PLL_EN_TERM100
0: REVERSED 1: NORMAL
0: SYSTEM BIOS 1: ADAPTER BIOS
DEFAULT
DEFAULT
RAM_CFG[3:0] MS_0001: 16Mx32 DDR3 256-bit Qimonda
MS_0010: 16Mx32 DDR3 256-bit Hynix MS_0011: 16Mx32 DDR3 256-bit Samsung
MS_0101: 32Mx32 DDR3-Stacked Die 256-bit Qimonda MS_0110: 32Mx32 DDR3-Stacked Die 256-bit Hynix MS_0111: 32Mx32 DDR3-Stacked Die 256-bit Samsung
MS_0001: 32Mx32 DDR3-Monolithic 256-bit Qimonda MS_0010: 32Mx32 DDR3-Monolithic 256-bit Hynix MS_0011: 32Mx32 DDR3-Monolithic 256-bit Samsung
0: 27MHz 1: 14.318MHz
000: NTSM_M 001: NTSC_J 010: PAL_M 011: PAL_N 100: PAL_CN 101: PAL_BDGHI 110: RESERVED_0 111: RESERVED_1
DEFAULT
DEFAULT
Per G92 Guide (PEX term).. * Strap definition inverted
-set to 0x1 to enable
-set to 0x0 to disable
MEC1
MXM_V3_TYPE_B_BP_82X100MM X6 COMMON
3
MEC1
MXM_V3_TYPE_B_BP_82X100MM X6 COMMON
4
MEC1
MXM_V3_TYPE_B_BP_82X100MM X6 COMMON
5
MEC1
MXM_V3_TYPE_B_BP_82X100MM X6 COMMON
6
GND
0'18
1'12
1'15
R_MIOA R_MIOB1'13
R25
0402
R24
0402
2.1D>
V_BE_GS=+/-20V
CONTINUOUS_CURRENT=-3.5A@70C
MAX_VOLTAGE=-20V
MAX_WATTAGE=0.9W@70C
MAX_CURRENT=-25A
R_DS_ON=73mR
2
PEX_PRSNT
2K
COMMON
3
1G1D1S
Q2
COMMON
AO3415
SOT23_1G1D1S
1
R646
0402
10K
3V3
COMMON
5%
MIOA_D<6>
3V3
R645 10K
5% 0402 COMMON
PEX_PRSNT_STDSW*
2K
COMMON
1%
2K
COMMON
1%
ROM_SI
ROM_SCLK
MIOA_D<13>
R649
0402
1G1D1S
1%
1
2K
COMMON
R651
GND
0402
MIOB_VDDQ_FET
Q1
2N7002 SOT23_1G1D1S COMMON
3
2
MAX_VOLTAGE=60V CONTINUOUS_CURRENT=0.115A R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W V_BE_GS=20V
1%
3GIO_PADCFG_LUT_ADR[0] 3GIO_PADCFG_LUT_ADR[1] 3GIO_PADCFG_LUT_ADR[2] 3GIO_PADCFG_LUT_ADR[3]
REG: NV_STRAP_1
MIOA_EN_33V MIOB_EN_33V
SLOT CLOCK CONFIGURAYION
GND
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. GPU Strap Configuration
www.vinafix.vn
DEFAULT(Desktop): 0000 Mobile: 0001 P817 set to 0001 default
1=3.3V (DEFAULT) 1=3.3V (DEFAULT)
1=ENABLE (DEFAULT)
602-10817-0004-200 A
p817_a02 phchan
18 OF 21
22-AUG-2008
Page 19
2
3
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1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
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5
4
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HFD GEBA C
Title: Basenet Report Design: p817_a02 Date: Jul 9 15:09:52 2008
Base nets and synonyms for p817_a02_lib.P817_A02(@p817_a02_lib.p817 _a02(sch_1)) Base Signal Location([Zone][dir])
1V8 17.1G 2V5 17.1G 3V3 17.1G 3V3_RUN 2.1G 5V 2.1G DACA_BLUE 11.1G> 11.2E> 11.3G
14.2B< DACA_GREEN 11.1G> 11.2E> 11.2G
14.2B< DACA_HSYNC 11.2E> 14.2B< DACA_RED 11.1G> 11.2E> 11.2G
14.2B< DACA_RSET 11.1G< 11.2B DACA_VDD 11.1B 11.1G< DACA_VREF 11.1G< 11.2B DACA_VSYNC 11.2E> 14.2B< DACB_VDD 11.3B DACC_VDD 11.4B DPD_HPD 10.2E> 14.3D> DP_AUX_C 13.1G< 13.2C DP_AUX_C* 13.1G< 13.2C DP_AUX_Q 13.1E<> 13.1G<
14.1D<> DP_AUX_Q* 13.1E<> 13.1G<
14.1D<> DP_AVDD33 13.1G< 13.4B DP_DEV_ADR_SEL 13.3C DP_HPD 13.1C< 14.1D> DP_L0_C 13.1G< 13.3C> 14.1D< DP_L0_C* 13.1G< 13.2C> 14.1D< DP_L1_C 13.1G< 13.2C> 14.1D< DP_L1_C* 13.1G< 13.2C> 14.1D< DP_L2_C 13.2C> 13.2G< 14.1D< DP_L2_C* 13.2C> 13.2G< 14.1D< DP_L3_C 13.2C> 13.2G< 14.2D< DP_L3_C* 13.2C> 13.2G< 14.2D< DP_RBIAS 13.1G< 13.3C
DVIA_HPD 10.2E< 14.3B> FBAB_PLLAVDD 3.1G< 3.4C FBAB_VREF 5.1G< FBAB_VREF_CTL 6.3G FBA_CLK0 3.3D> 5.1G< 5.2A< FBA_CLK0* 3.3D> 5.1G< 5.2A< FBA_CLK1 3.3D> 5.1G< 5.2D< FBA_CLK1* 3.3D> 5.1G< 5.2D< FBA_CMD<0> 3.1C 5.1B FBA_CMD<25..0> 5.1G<
3.1D> 5.1A< FBA_CMD<28..0> 3.1D> 5.1A< FBA_CMD<1> 3.2C 5.1B 5.1E FBA_CMD<2> 3.2C 5.1B FBA_CMD<3> 3.2C 5.2B 5.2E FBA_CMD<4> 3.2C 5.1E FBA_CMD<5> 3.2C 5.1E FBA_CMD<6> 3.2C 5.1E FBA_CMD<7> 3.2C 5.2B 5.2E FBA_CMD<8> 3.2C 5.1B 5.1E FBA_CMD<9> 3.2C 5.2B 5.2E FBA_CMD<10> 3.2C 5.1B 5.1E FBA_CMD<11> 3.2C 5.1B 5.1E FBA_CMD<12> 3.2C 5.2B 5.2E FBA_CMD<13> 3.2C 5.1E FBA_CMD<14> 3.2C 5.2B 5.2E FBA_CMD<15> 3.2C 5.2B 5.2E FBA_CMD<16> 3.2C 5.1B 5.1E FBA_CMD<17> 3.2C 5.2B 5.2E FBA_CMD<18> 3.2C 5.2B 5.2E FBA_CMD<19> 3.2C 5.1B 5.1E FBA_CMD<20> 3.2C 5.2B 5.2E FBA_CMD<21> 3.2C 5.1B 5.1E FBA_CMD<22> 3.2C 5.1B FBA_CMD<23> 3.2C 5.1B 5.1E FBA_CMD<24> 3.2C 5.1B FBA_CMD<25> 3.2C 5.1B 5.1E FBA_D<0> 3.1B 5.4B FBA_D<63..0> 3.1A<> 5.1G<> 5.4A<> FBA_D<1> 3.2B 5.4B FBA_D<2> 3.2B 5.4B FBA_D<3> 3.2B 5.4B FBA_D<4> 3.2B 5.4B FBA_D<5> 3.2B 5.4B FBA_D<6> 3.2B 5.4B FBA_D<7> 3.2B 5.4B FBA_D<8> 3.2B 5.4C FBA_D<9> 3.2B 5.4C FBA_D<10> 3.2B 5.4C
FBA_D<11> 3.2B 5.4C FBA_D<12> 3.2B 5.4C FBA_D<13> 3.2B 5.4C FBA_D<14> 3.2B 5.4C FBA_D<15> 3.2B 5.4C FBA_D<16> 3.2B 5.4D FBA_D<17> 3.2B 5.4D FBA_D<18> 3.2B 5.4D FBA_D<19> 3.2B 5.4D FBA_D<20> 3.2B 5.4D FBA_D<21> 3.2B 5.4D FBA_D<22> 3.2B 5.4D FBA_D<23> 3.2B 5.4D FBA_D<24> 3.2B 5.4E FBA_D<25> 3.2B 5.4E FBA_D<26> 3.2B 5.4E FBA_D<27> 3.2B 5.4E FBA_D<28> 3.2B 5.4E FBA_D<29> 3.2B 5.4E FBA_D<30> 3.2B 5.4E FBA_D<31> 3.3B 5.4E FBA_D<32> 3.3B 5.5B FBA_D<33> 3.3B 5.5B FBA_D<34> 3.3B 5.5B FBA_D<35> 3.3B 5.5B FBA_D<36> 3.3B 5.5B FBA_D<37> 3.3B 5.5B FBA_D<38> 3.3B 5.5B FBA_D<39> 3.3B 5.5B FBA_D<40> 3.3B 5.5C FBA_D<41> 3.3B 5.5C FBA_D<42> 3.3B 5.5C FBA_D<43> 3.3B 5.5C FBA_D<44> 3.3B 5.5C FBA_D<45> 3.3B 5.5C FBA_D<46> 3.3B 5.5C FBA_D<47> 3.3B 5.5C FBA_D<48> 3.3B 5.5D FBA_D<49> 3.3B 5.5D FBA_D<50> 3.3B 5.5D FBA_D<51> 3.3B 5.5D FBA_D<52> 3.3B 5.5D FBA_D<53> 3.3B 5.5D FBA_D<54> 3.3B 5.5D FBA_D<55> 3.3B 5.5D FBA_D<56> 3.3B 5.5E FBA_D<57> 3.3B 5.5E DP_VREF 13.1G< 13.4C FBA_D<58> 3.3B 5.5E FBA_D<59> 3.3B 5.5E FBA_D<60> 3.3B 5.5E FBA_D<61> 3.4B 5.5E FBA_D<62> 3.4B 5.5E FBA_D<63> 3.4B 5.5E FBA_DQM<0> 3.4B 5.4B 5.4B FBA_DQM<7..0> 3.2A> 5.1G<> 5.4A<> FBA_DQM<1> 3.4B 5.4B 5.4C FBA_DQM<2> 3.4B 5.4B 5.4D FBA_DQM<3> 3.4B 5.4B 5.4E FBA_DQM<4> 3.4B 5.4B 5.5B FBA_DQM<5> 3.4B 5.4B 5.5C FBA_DQM<6> 3.4B 5.4B 5.5D FBA_DQM<7> 3.4B 5.5B 5.5E FBA_DQS_RN<0> 3.4B 5.4B 5.5B FBA_DQS_RN<7..0> 3.2A< 5.1G<> 5.5A<> FBA_DQS_RN<1> 3.4B 5.4C 5.5B FBA_DQS_RN<2> 3.4B 5.4D 5.5B FBA_DQS_RN<3> 3.4B 5.4E 5.5B FBA_DQS_RN<4> 3.4B 5.5B 5.5B FBA_DQS_RN<5> 3.4B 5.5B 5.5C FBA_DQS_RN<6> 3.4B 5.5B 5.5D FBA_DQS_RN<7> 3.4B 5.5B 5.5E FBA_DQS_WP<0> 3.4B 5.4B 5.5B FBA_DQS_WP<7..0> 3.2A> 5.1G<> 5.5A<> FBA_DQS_WP<1> 3.4B 5.4C 5.5B FBA_DQS_WP<2> 3.4B 5.4D 5.5B FBA_DQS_WP<3> 3.4B 5.4E 5.5B FBA_DQS_WP<4> 3.4B 5.5B 5.5B FBA_DQS_WP<5> 3.5B 5.5B 5.5C FBA_DQS_WP<6> 3.5B 5.5B 5.5D FBA_DQS_WP<7> 3.5B 5.5B 5.5E FBA_SEN0 5.2B FBA_SEN1 5.2E FBA_VREF0 5.1G< 5.3C 5.3F FBA_VREF_CTL0 5.1G< 5.3G FBA_ZQ0 5.2B 5.2G< FBA_ZQ1 5.2E 5.2G< FBB_CLK0 3.3H> 6.1G< 6.2A< FBB_CLK0* 3.3H> 6.1G< 6.2A< FBB_CLK1 3.3H> 6.1G< 6.2D< FBB_CLK1* 3.3H> 6.1G< 6.2D< FBB_CMD<0> 3.1G 6.1B FBB_CMD<25..0> 6.1G<
3.1H> 6.1A< FBB_CMD<28..0> 3.1H> 6.1A< FBB_CMD<1> 3.2G 6.1B 6.1E FBB_CMD<2> 3.2G 6.1B
FBB_CMD<3> 3.2G 6.2B 6.2E FBB_CMD<4> 3.2G 6.1E FBB_CMD<5> 3.2G 6.1E FBB_CMD<6> 3.2G 6.1E FBB_CMD<7> 3.2G 6.2B 6.2E FBB_CMD<8> 3.2G 6.1B 6.1E FBB_CMD<9> 3.2G 6.2B 6.2E FBB_CMD<10> 3.2G 6.1B 6.1E FBB_CMD<11> 3.2G 6.1B 6.1E FBB_CMD<12> 3.2G 6.2B 6.2E FBB_CMD<13> 3.2G 6.1E FBB_CMD<14> 3.2G 6.2B 6.2E FBB_CMD<15> 3.2G 6.2B 6.2E FBB_CMD<16> 3.2G 6.1B 6.1E FBB_CMD<17> 3.2G 6.2B 6.2E FBB_CMD<18> 3.2G 6.2B 6.2E FBB_CMD<19> 3.2G 6.1B 6.1E FBB_CMD<20> 3.2G 6.2B 6.2E FBB_CMD<21> 3.2G 6.1B 6.1E FBB_CMD<22> 3.2G 6.1B FBB_CMD<23> 3.2G 6.2B 6.2E FBB_CMD<24> 3.2G 6.1B FBB_CMD<25> 3.2G 6.1B 6.1E FBB_D<0> 3.1F 6.4B FBB_D<63..0> 3.1E<> 6.1G<> 6.4A<> FBB_D<1> 3.2F 6.4B FBB_D<2> 3.2F 6.4B FBB_D<3> 3.2F 6.4B FBB_D<4> 3.2F 6.4B FBB_D<5> 3.2F 6.4B FBB_D<6> 3.2F 6.4B FBB_D<7> 3.2F 6.4B FBB_D<8> 3.2F 6.4C FBB_D<9> 3.2F 6.4C FBB_D<10> 3.2F 6.4C FBB_D<11> 3.2F 6.4C FBB_D<12> 3.2F 6.4C FBB_D<13> 3.2F 6.4C FBB_D<14> 3.2F 6.4C FBB_D<15> 3.2F 6.4C FBB_D<16> 3.2F 6.4D FBB_D<17> 3.2F 6.4D FBB_D<18> 3.2F 6.4D FBB_D<19> 3.2F 6.4D FBB_D<20> 3.2F 6.4D FBB_D<21> 3.2F 6.4D FBB_D<22> 3.2F 6.4D FBB_D<23> 3.2F 6.4D FBB_D<24> 3.2F 6.4E FBB_D<25> 3.2F 6.4E FBB_D<26> 3.2F 6.4E FBB_D<27> 3.2F 6.4E FBB_D<28> 3.2F 6.4E FBB_D<29> 3.2F 6.4E FBB_D<30> 3.2F 6.4E FBB_D<31> 3.3F 6.4E FBB_D<32> 3.3F 6.5B FBB_D<33> 3.3F 6.5B FBB_D<34> 3.3F 6.5B FBB_D<35> 3.3F 6.5B FBB_D<36> 3.3F 6.5B FBB_D<37> 3.3F 6.5B FBB_D<38> 3.3F 6.5B FBB_D<39> 3.3F 6.5B FBB_D<40> 3.3F 6.5C FBB_D<41> 3.3F 6.5C FBB_D<42> 3.3F 6.5C FBB_D<43> 3.3F 6.5C FBB_D<44> 3.3F 6.5C FBB_D<45> 3.3F 6.5C FBB_D<46> 3.3F 6.5C FBB_D<47> 3.3F 6.5C FBB_D<48> 3.3F 6.5D FBB_D<49> 3.3F 6.5D FBB_D<50> 3.3F 6.5D FBB_D<51> 3.3F 6.5D FBB_D<52> 3.3F 6.5D FBB_D<53> 3.3F 6.5D FBB_D<54> 3.3F 6.5D FBB_D<55> 3.3F 6.5D FBB_D<56> 3.3F 6.5E FBB_D<57> 3.3F 6.5E FBB_D<58> 3.3F 6.5E FBB_D<59> 3.3F 6.5E FBB_D<60> 3.3F 6.5E FBB_D<61> 3.4F 6.5E FBB_D<62> 3.4F 6.5E FBB_D<63> 3.4F 6.5E FBB_DQM<0> 3.4F 6.4A 6.4B FBB_DQM<7..0> 3.2E> 6.1G<> 6.4A<> FBB_DQM<1> 3.4F 6.4A 6.4C FBB_DQM<2> 3.4F 6.4A 6.4D FBB_DQM<3> 3.4F 6.4A 6.4E FBB_DQM<4> 3.4F 6.4A 6.5B FBB_DQM<5> 3.4F 6.4A 6.5C FBB_DQM<6> 3.4F 6.4A 6.5D
FBB_DQM<7> 3.4F 6.4A 6.5E FBB_DQS_RN<0> 3.4F 6.4B 6.5A FBB_DQS_RN<7..0> 3.2E< 6.1G<> 6.5A<> FBB_DQS_RN<1> 3.4F 6.4C 6.5A FBB_DQS_RN<2> 3.4F 6.4D 6.5A FBB_DQS_RN<3> 3.4F 6.4E 6.5A FBB_DQS_RN<4> 3.4F 6.5A 6.5B FBB_DQS_RN<5> 3.4F 6.5A 6.5C FBB_DQS_RN<6> 3.4F 6.5A 6.5D FBB_DQS_RN<7> 3.4F 6.5A 6.5E FBB_DQS_WP<0> 3.4F 6.4B 6.5A FBB_DQS_WP<7..0> 3.2E> 6.1G<> 6.5A<> FBB_DQS_WP<1> 3.4F 6.4C 6.5A FBB_DQS_WP<2> 3.4F 6.4D 6.5A FBB_DQS_WP<3> 3.4F 6.4E 6.5A FBB_DQS_WP<4> 3.4F 6.5A 6.5B FBB_DQS_WP<5> 3.5F 6.5A 6.5C FBB_DQS_WP<6> 3.5F 6.5A 6.5D FBB_DQS_WP<7> 3.5F 6.5A 6.5E FBB_SEN0 6.2B FBB_SEN1 6.2E FBB_VREF0 5.3D< 6.1G< 6.3D 6.3F FBB_VREF1 6.1G< 6.3C FBB_VREF_CTL 6.1G< FBB_VREF_CTL1 6.1G< 6.4G FBB_ZQ0 6.1G< 6.2B FBB_ZQ1 6.1G< 6.2E FBCD_PLLAVDD 4.1G< 4.4C FBCD_VREF_CTL 8.2G FBC_CLK0 4.2D> 7.1G< 7.2A< FBC_CLK0* 4.2D> 7.1G< 7.2A< FBC_CLK1 4.2D> 7.1G< 7.2D< FBC_CLK1* 4.3D> 7.1G< 7.2D< FBC_CMD<0> 4.1C 7.1B FBC_CMD<25..0> 7.1G<
4.1D> 7.1A< FBC_CMD<28..0> 4.1D> 7.1A< FBC_CMD<1> 4.1C 7.1B 7.1E FBC_CMD<2> 4.1C 7.1B FBC_CMD<3> 4.1C 7.2B 7.2E FBC_CMD<4> 4.2C 7.1E FBC_CMD<5> 4.2C 7.1E FBC_CMD<6> 4.2C 7.1E FBC_CMD<7> 4.2C 7.2B 7.2E FBC_CMD<8> 4.2C 7.1B 7.1E FBC_CMD<9> 4.2C 7.2B 7.2E FBC_CMD<10> 4.2C 7.1B 7.1E FBC_CMD<11> 4.2C 7.1B 7.1E FBC_CMD<12> 4.2C 7.2B 7.2E FBC_CMD<13> 4.2C 7.1E FBC_CMD<14> 4.2C 7.2B 7.2E FBC_CMD<15> 4.2C 7.2B 7.2E FBC_CMD<16> 4.2C 7.1B 7.1E FBC_CMD<17> 4.2C 7.2B 7.2E FBC_CMD<18> 4.2C 7.2B 7.2E FBC_CMD<19> 4.2C 7.1B 7.1E FBC_CMD<20> 4.2C 7.2B 7.2E FBC_CMD<21> 4.2C 7.1B 7.1E FBC_CMD<22> 4.2C 7.1B FBC_CMD<23> 4.2C 7.1B 7.1E FBC_CMD<24> 4.2C 7.1B FBC_CMD<25> 4.2C 7.1B 7.1E FBC_D<0> 4.1B 7.4B FBC_D<63..0> 4.1A<> 7.1G<> 7.4A<> FBC_D<1> 4.1B 7.4B FBC_D<2> 4.1B 7.4B FBC_D<3> 4.1B 7.4B FBC_D<4> 4.2B 7.4B FBC_D<5> 4.2B 7.4B FBC_D<6> 4.2B 7.4B FBC_D<7> 4.2B 7.4B FBC_D<8> 4.2B 7.4C FBC_D<9> 4.2B 7.4C FBC_D<10> 4.2B 7.4C FBC_D<11> 4.2B 7.4C FBC_D<12> 4.2B 7.4C FBC_D<13> 4.2B 7.4C FBC_D<14> 4.2B 7.4C FBC_D<15> 4.2B 7.4C FBC_D<16> 4.2B 7.4D FBC_D<17> 4.2B 7.4D FBC_D<18> 4.2B 7.4D FBC_D<19> 4.2B 7.4D FBC_D<20> 4.2B 7.4D FBC_D<21> 4.2B 7.4D FBC_D<22> 4.2B 7.4D FBC_D<23> 4.2B 7.4D FBC_D<24> 4.2B 7.4E FBC_D<25> 4.2B 7.4E FBC_D<26> 4.2B 7.4E FBC_D<27> 4.2B 7.4E FBC_D<28> 4.2B 7.4E FBC_D<29> 4.2B 7.4E FBC_D<30> 4.2B 7.4E FBC_D<31> 4.2B 7.4E FBC_D<32> 4.2B 7.5B
FBC_D<33> 4.2B 7.5B FBC_D<34> 4.3B 7.5B FBC_D<35> 4.3B 7.5B FBC_D<36> 4.3B 7.5B FBC_D<37> 4.3B 7.5B FBC_D<38> 4.3B 7.5B FBC_D<39> 4.3B 7.5B FBC_D<40> 4.3B 7.5C FBC_D<41> 4.3B 7.5C FBC_D<42> 4.3B 7.5C FBC_D<43> 4.3B 7.5C FBC_D<44> 4.3B 7.5C FBC_D<45> 4.3B 7.5C FBC_D<46> 4.3B 7.5C FBC_D<47> 4.3B 7.5C FBC_D<48> 4.3B 7.5D FBC_D<49> 4.3B 7.5D FBC_D<50> 4.3B 7.5D FBC_D<51> 4.3B 7.5D FBC_D<52> 4.3B 7.5D FBC_D<53> 4.3B 7.5D FBC_D<54> 4.3B 7.5D FBC_D<55> 4.3B 7.5D FBC_D<56> 4.3B 7.5E FBC_D<57> 4.3B 7.5E FBC_D<58> 4.3B 7.5E FBC_D<59> 4.3B 7.5E FBC_D<60> 4.3B 7.5E FBC_D<61> 4.3B 7.5E FBC_D<62> 4.3B 7.5E FBC_D<63> 4.3B 7.5E FBC_DQM<0> 4.4B 7.4A 7.4B FBC_DQM<7..0> 4.1A> 7.1G<> 7.4A<> FBC_DQM<1> 4.4B 7.4A 7.4C FBC_DQM<2> 4.4B 7.4A 7.4D FBC_DQM<3> 4.4B 7.4A 7.4E FBC_DQM<4> 4.4B 7.4A 7.5B FBC_DQM<5> 4.4B 7.4A 7.5C FBC_DQM<6> 4.4B 7.4A 7.5D FBC_DQM<7> 4.4B 7.4A 7.5E FBC_DQS_RN<0> 4.4B 7.4B 7.5A FBC_DQS_RN<7..0> 4.1A< 7.1G<> 7.5A<> FBC_DQS_RN<1> 4.4B 7.4C 7.5A FBC_DQS_RN<2> 4.4B 7.4D 7.5A FBC_DQS_RN<3> 4.4B 7.4E 7.5A FBC_DQS_RN<4> 4.4B 7.5A 7.5B FBC_DQS_RN<5> 4.4B 7.5A 7.5C FBC_DQS_RN<6> 4.4B 7.5A 7.5D FBC_DQS_RN<7> 4.4B 7.5A 7.5E FBC_DQS_WP<0> 4.4B 7.4B 7.5A FBC_DQS_WP<7..0> 4.1A> 7.1G<> 7.5A<> FBC_DQS_WP<1> 4.4B 7.4C 7.5A FBC_DQS_WP<2> 4.4B 7.4D 7.5A FBC_DQS_WP<3> 4.4B 7.4E 7.5A FBC_DQS_WP<4> 4.4B 7.5A 7.5B FBC_DQS_WP<5> 4.4B 7.5A 7.5C FBC_DQS_WP<6> 4.4B 7.5A 7.5D FBC_DQS_WP<7> 4.4B 7.5A 7.5E FBC_SEN0 7.2B FBC_SEN1 7.2E FBC_VREF0 7.1G< 7.3D 7.3F FBC_VREF1 7.1G< 7.3C FBC_VREF_CTL0 7.1G< 7.3G FBC_VREF_CTL1 7.1G< 7.3D FBC_ZQ0 7.1G< 7.2B FBC_ZQ1 7.2E 7.2G< FBD_CLK0 4.2H> 8.1G< 8.2A< FBD_CLK0* 4.2H> 8.1G< 8.2A< FBD_CLK1 4.2H> 8.1G< 8.2D< FBD_CLK1* 4.3H> 8.1G< 8.2D< FBD_CMD<0> 4.1G 8.1B FBD_CMD<25..0> 8.1G<
4.1H> 8.1A< FBD_CMD<28..0> 4.1H> 8.1A< FBD_CMD<1> 4.1G 8.1B 8.1E FBD_CMD<2> 4.1G 8.1B FBD_CMD<3> 4.1G 8.2B 8.2E FBD_CMD<4> 4.2G 8.1E FBD_CMD<5> 4.2G 8.1E FBD_CMD<6> 4.2G 8.1E FBD_CMD<7> 4.2G 8.2B 8.2E FBD_CMD<8> 4.2G 8.1B 8.1E FBD_CMD<9> 4.2G 8.2B 8.2E FBD_CMD<10> 4.2G 8.1B 8.1E FBD_CMD<11> 4.2G 8.1B 8.1E FBD_CMD<12> 4.2G 8.2B 8.2E FBD_CMD<13> 4.2G 8.1E FBD_CMD<14> 4.2G 8.2B 8.2E FBD_CMD<15> 4.2G 8.2B 8.2E FBD_CMD<16> 4.2G 8.1B 8.1E FBD_CMD<17> 4.2G 8.2B 8.2E FBD_CMD<18> 4.2G 8.2B 8.2E FBD_CMD<19> 4.2G 8.1B 8.1E FBD_CMD<20> 4.2G 8.1B 8.1E FBD_CMD<21> 4.2G 8.1B 8.1E FBD_CMD<22> 4.2G 8.1B
FBD_CMD<23> 4.2G 8.1B 8.1E FBD_CMD<24> 4.2G 8.1B FBD_CMD<25> 4.2G 8.1B 8.1E FBD_D<0> 4.1F 8.4B FBD_D<63..0> 4.1E<> 8.1G<> 8.4A<> FBD_D<1> 4.1F 8.4B FBD_D<2> 4.1F 8.4B FBD_D<3> 4.1F 8.4B FBD_D<4> 4.2F 8.4B FBD_D<5> 4.2F 8.4B FBD_D<6> 4.2F 8.4B FBD_D<7> 4.2F 8.4B FBD_D<8> 4.2F 8.4C FBD_D<9> 4.2F 8.4C FBD_D<10> 4.2F 8.4C FBD_D<11> 4.2F 8.4C FBD_D<12> 4.2F 8.4C FBD_D<13> 4.2F 8.4C FBD_D<14> 4.2F 8.4C FBD_D<15> 4.2F 8.4C FBD_D<16> 4.2F 8.4D FBD_D<17> 4.2F 8.4D FBD_D<18> 4.2F 8.4D FBD_D<19> 4.2F 8.4D FBD_D<20> 4.2F 8.4D FBD_D<21> 4.2F 8.4D FBD_D<22> 4.2F 8.4D FBD_D<23> 4.2F 8.4D FBD_D<24> 4.2F 8.4E FBD_D<25> 4.2F 8.4E FBD_D<26> 4.2F 8.4E FBD_D<27> 4.2F 8.4E FBD_D<28> 4.2F 8.4E FBD_D<29> 4.2F 8.4E FBD_D<30> 4.2F 8.4E FBD_D<31> 4.2F 8.4E FBD_D<32> 4.2F 8.5B FBD_D<33> 4.2F 8.5B FBD_D<34> 4.3F 8.5B FBD_D<35> 4.3F 8.5B FBD_D<36> 4.3F 8.5B FBD_D<37> 4.3F 8.5B FBD_D<38> 4.3F 8.5B FBD_D<39> 4.3F 8.5B FBD_D<40> 4.3F 8.5C FBD_D<41> 4.3F 8.5C
FBD_D<43> 4.3F 8.5C FBD_D<44> 4.3F 8.5C FBD_D<45> 4.3F 8.5C FBD_D<46> 4.3F 8.5C FBD_D<47> 4.3F 8.5C FBD_D<48> 4.3F 8.5D FBD_D<49> 4.3F 8.5D FBD_D<50> 4.3F 8.5D FBD_D<51> 4.3F 8.5D FBD_D<52> 4.3F 8.5D FBD_D<53> 4.3F 8.5D FBD_D<54> 4.3F 8.5D FBD_D<55> 4.3F 8.5D FBD_D<56> 4.3F 8.5E FBD_D<57> 4.3F 8.5E FBD_D<58> 4.3F 8.5E FBD_D<59> 4.3F 8.5E FBD_D<60> 4.3F 8.5E FBD_D<61> 4.3F 8.5E FBD_D<62> 4.3F 8.5E FBD_D<63> 4.3F 8.5E FBD_DQM<0> 4.4F 8.4B 8.4B FBD_DQM<7..0> 4.1E> 8.1G<> 8.4A<> FBD_DQM<1> 4.4F 8.4B 8.4C FBD_DQM<2> 4.4F 8.4B 8.4D FBD_DQM<3> 4.4F 8.4B 8.4E FBD_DQM<4> 4.4F 8.4B 8.5B FBD_DQM<5> 4.4F 8.4B 8.5C FBD_DQM<6> 4.4F 8.4B 8.5D FBD_DQM<7> 4.4F 8.4B 8.5E FBD_DQS_RN<0> 4.4F 8.4B 8.5B FBD_DQS_RN<7..0> 4.1E< 8.1G<> 8.5A<> FBD_DQS_RN<1> 4.4F 8.4C 8.5B FBD_DQS_RN<2> 4.4F 8.4D 8.5B FBD_DQS_RN<3> 4.4F 8.4E 8.5B FBD_DQS_RN<4> 4.4F 8.5B 8.5B FBD_DQS_RN<5> 4.4F 8.5B 8.5C FBD_DQS_RN<6> 4.4F 8.5B 8.5D FBD_DQS_RN<7> 4.4F 8.5B 8.5E FBD_DQS_WP<0> 4.4F 8.4B 8.5B FBD_DQS_WP<7..0> 4.1E> 8.1G<> 8.5A<> FBD_DQS_WP<1> 4.4F 8.4C 8.5B FBD_DQS_WP<2> 4.4F 8.4D 8.5B FBD_DQS_WP<3> 4.4F 8.4E 8.5B FBD_DQS_WP<4> 4.4F 8.5B 8.5B FBD_DQS_WP<5> 4.4F 8.5B 8.5C FBD_DQS_WP<6> 4.4F 8.5B 8.5D FBD_DQS_WP<7> 4.4F 8.5B 8.5E FBD_SEN0 8.2B
FBD_SEN1 8.2E FBD_VREF0 8.1G< 8.3D 8.3F FBD_VREF1 8.1G< 8.3C FBD_VREF_CTL 8.1G< FBD_VREF_CTL1 8.1G< 8.4F FBD_ZQ0 8.1G< 8.2B FBD_ZQ1 8.1G< 8.2E FBVDDQ 17.1G FB_CAL_PD_VDDQ0 3.1G< 3.4C FB_CAL_PD_VDDQ1 3.1G< 3.4G FB_CAL_PU_GND0 3.1G< 3.4C FB_CAL_PU_GND1 3.1G< 3.4G FB_CAL_TERM_GND0 3.1G< 3.4C FB_CAL_TERM_GND1 3.1G< 3.4G FB_VREF 3.1G< FB_VREF1 3.5B FB_VREF2 3.5F GPIO0_DVIA_HPD 10.2C GPIO1_DP_HPD 10.2D< 13.1C> GPIO2_LVDS_BL_PWM 10.2D> 14.3B< GPIO3_LVDS_PPEN 10.2D> 14.3B< GPIO4_LVDS_BLEN 10.2D> 14.3B< GPIO5_NVVDD_CTL0 10.2D> 16.1B 16.4A< GPIO6_NVVDD_CTL1 10.2D> 16.4A< GPIO7_NVVDD_CTL2 10.2D> 16.1B 16.4A< GPIO8_THERM_SHDWN 10.2D> 13.5G> 14.3B> GPIO9_THERM_ALERT 10.2D< 13.5G> 14.3B< GPIO10_FB_VREF_SW 5.3H< 6.3H< 7.3H<
8.3H< 10.2D> GPIO11_RASTER_SYNC 10.2D> 14.5G<> GPIO12_AC_BATT* 10.2D< 14.4B> GPIO13_FBVDDQ_CTL 10.2D> 17.5E< GPIO14_DP_MODE_CTL 10.2D> 13.2E< GPU_BUFRST* 13.3A< 14.3H> GPU_EXT_REFCLK 10.1G< 10.5H< 14.5G> GPU_H_PLLAVDD 15.1F< 15.2G GPU_PLLVDD 15.1F< 15.1G GPU_SWAPRDY 14.3H<> 14.5G<> GPU_TESTMODE 14.3G I2CA_SCL 11.2E> 14.2B< 14.4E I2CA_SCLR 11.1C I2CA_SDA 11.2E> 14.2B<> 14.4F I2CA_SDAR 11.2C I2CB_SCL 11.4E> 14.3D< 14.4E I2CB_SCLR 11.4D I2CB_SDA 11.4E> 14.3D<> 14.4F I2CB_SDAR 11.4D FBD_D<42> 4.3F 8.5C I2CC_SCL 13.3A< 13.5E< 14.1H>
14.3B> 14.4F I2CC_SDA 13.3A<> 13.5E<>
14.1H<> 14.3B<> 14.4E I2CH_SCL 14.1F I2CH_SDA 14.1F I2CH_SDAR 14.2G I2CS_SCL 13.5E< 14.2G> 14.3B>
14.5E I2CS_SDA 13.5E<> 14.2G<>
14.3B<> 14.5F I2C_SCL_DP 13.1G< 13.2C I2C_SCL_R 13.5E I2C_SDA_DP 13.1G< 13.2C I2C_SDA_R 13.5E IFPAB_IOVDD 12.1G< 12.2C IFPAB_RSET 12.1G< 12.2D IFPA_TXC 12.1G> 12.2F> 14.4D< IFPA_TXC* 12.1G> 12.2F> 14.5D< IFPA_TXD0 12.1G> 12.2F> 14.4D< IFPA_TXD0* 12.1G> 12.2F> 14.4D< IFPA_TXD1 12.2F> 12.2G> 14.4D< IFPA_TXD1* 12.2F> 12.2G> 14.4D< IFPA_TXD2 12.2F> 12.2G> 14.4D< IFPA_TXD2* 12.2F> 12.2G> 14.4D< IFPA_TXD3 12.2F> 12.2G> 14.4D< IFPA_TXD3* 12.2F> 12.2G> 14.4D< IFPB_TXC 12.2F> 12.2G> 14.4D< IFPB_TXC* 12.2F> 12.2G> 14.4D< IFPB_TXD4 12.2F> 12.2G> 14.4D< IFPB_TXD4* 12.2F> 12.2G> 14.4D< IFPB_TXD5 12.2G> 12.3F> 14.4D< IFPB_TXD5* 12.2G> 12.3F> 14.4D< IFPB_TXD6 12.2G> 12.3F> 14.4D< IFPB_TXD6* 12.2G> 12.3F> 14.4D< IFPB_TXD7 12.3F> 12.3G> 14.4D< IFPB_TXD7* 12.2G> 12.3F> 14.4D< IFPCD_IOVDD 12.1G< 12.4D IFPCD_RSET 12.1G< 12.3D IFPC_TXC 12.3F> 12.3G> 14.3D< IFPC_TXC* 12.3F> 12.3G> 14.3D< IFPC_TXD0 12.3F> 12.3G> 14.3D< IFPC_TXD0* 12.3F> 12.3G> 14.3D< IFPC_TXD1 12.3G> 12.4F> 14.3D< IFPC_TXD1* 12.3F> 12.3G> 14.3D< IFPC_TXD2 12.3G> 12.4F> 14.3D< IFPC_TXD2* 12.3G> 12.4F> 14.3D< IFP_IOVDD_1V8 12.1G< 12.2C IFP_IOVDD_3V3 12.1G< 12.3C
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. <edit here to insert page detail>
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IFP_IOVDD_3V3_EN 12.3B IFP_IOVDD_3V3_EN_R 12.3B * IFP_PLLVDD 12.1G< 12.2D JTAG_TCLK 14.1E 14.4A JTAG_TCLK_R 14.4B JTAG_TDI 14.1E 14.4A JTAG_TDI_R 14.4B JTAG_TDO 14.1E 14.4A JTAG_TDO_R 14.4B JTAG_TMS 14.1E 14.4A JTAG_TMS_R 14.4B JTAG_TRST* 14.1E 14.4A JTAG_TRST_R 14.4B MIOA_CAL_PD_VDDQ 10.1E< 10.5B MIOA_CAL_PU_GND 10.1E< 10.5B MIOA_CLKOUT 10.1G< 10.5D> 14.5G< MIOA_D<0> 10.4C 14.4G 18.3D MIOA_D<14..0> 10.1G< 10.4D<>
14.4F<> 18.1B> MIOA_D<1> 10.4C 14.4G 18.1D MIOA_D<2> 10.4C 14.4G MIOA_D<3> 10.4C 14.4G MIOA_D<4> 10.4C 14.4G MIOA_D<5> 10.4C 14.4G MIOA_D<6> 10.4C 14.4G 18.4C MIOA_D<7> 10.4C 14.4G MIOA_D<8> 10.4C 14.4G MIOA_D<9> 10.4C 14.4G MIOA_D<10> 10.4C 14.4G MIOA_D<11> 10.4C 14.4G MIOA_D<12> 10.5C 14.4G MIOA_D<13> 10.5C 14.4G 18.5D MIOA_D<14> 10.5C 14.4G MIOA_DE 10.1G< 10.5D<>
14.5G<> MIOA_VDDQ 17.1G MIOA_VREF 10.1E< 10.4B MIOB_CAL_PD_VDDQ 10.1E< 10.5F MIOB_CAL_PU_GND 10.1E< 10.5F MIOB_CLKOUT 10.1G< 10.5H> 13.3A< MIOB_CLKOUT* 10.1G< 10.5H> 13.3A< MIOB_D<0> 10.4G 13.2B 18.2D MIOB_D<12..0> 10.1G< 10.4H> 13.2A<
18.1B> MIOB_D<1> 10.4G 13.2B 18.2D
MIOB_D<3> 10.4G 13.2B 18.3D MIOB_D<4> 10.4G 13.2B 18.3D MIOB_D<5> 10.4G 13.2B 18.3D MIOB_D<6> 10.4G 13.2B MIOB_D<7> 10.4G 13.2B MIOB_D<8> 10.4G 13.2B 18.2D MIOB_D<9> 10.4G 13.2B 18.2D MIOB_D<10> 10.4G 13.2B MIOB_D<11> 10.4G 13.2B 18.3D MIOB_D<12> 10.5G 18.3D MIOB_DE 10.1G< 10.5H> 13.3A< MIOB_HSYNC 10.1G< 10.5H> 13.3A<
18.1B> MIOB_VDDQ 17.1G MIOB_VDDQ_FET 18.4D MIOB_VREF 10.1E< 10.4F MIOB_VSYNC 10.1G< 10.5H> 13.3A< MXM_OEM44 14.1B MXM_PWREN 10.3F< 12.3B< 14.2F>
16.3A< 17.1D< 17.2A< MXM_PWREN_N1 17.2B MXM_PWREN_N2 17.1B MXM_PWREN_R 14.2E 14.4B MXM_PWRGD 14.3B> 17.4A> NVVDD 16.1G PEX_PLLVDD 2.1G<> 2.5E PEX_PLL_CLK_OUT 2.2G<> 2.4E PEX_PLL_CLK_OUT* 2.2G<> 2.4E PEX_PRSNT 18.4D PEX_PRSNT_STDSW* 2.1D> 18.4C> PEX_REFCLK 2.2C 2.2G<> PEX_REFCLK* 2.2C 2.2G<> PEX_RST* 2.1C PEX_RX0 2.2C 2.4G<> PEX_RX0* 2.2C 2.4G<> PEX_RX1 2.2C 2.4G<> PEX_RX1* 2.2C 2.4G<> PEX_RX2 2.2C 2.4G<> PEX_RX2* 2.2C 2.4G<> PEX_RX3 2.3C 2.4G<> PEX_RX3* 2.3C 2.4G<> PEX_RX4 2.3C 2.4G<> PEX_RX4* 2.3C 2.4G<> PEX_RX5 2.3C 2.4G<> PEX_RX5* 2.3C 2.4G<> PEX_RX6 2.3C 2.4G<> PEX_RX6* 2.3C 2.4G<> PEX_RX7 2.3C 2.5G<> PEX_RX7* 2.3C 2.5G<>
PEX_RX8 2.4C 2.5G<> PEX_RX8* 2.4C 2.5G<> PEX_RX9 2.4C 2.5G<> PEX_RX9* 2.4C 2.5G<> PEX_RX10 2.4C 2.5G<> PEX_RX10* 2.4C 2.5G<> PEX_RX11 2.4C 2.5G<> PEX_RX11* 2.4C 2.5G<> PEX_RX12 2.4C 2.5G<> PEX_RX12* 2.4C 2.5G<> PEX_RX13 2.5C 2.5G<> PEX_RX13* 2.5C 2.5G<> PEX_RX14 2.5C 2.5G<> PEX_RX14* 2.5C 2.5G<> PEX_RX15 2.5C 2.5G<> PEX_RX15* 2.5C 2.5G<> PEX_TX0 2.2C 2.2G<> PEX_TX0* 2.2C 2.2G<> PEX_TX1 2.2C 2.2G<> PEX_TX1* 2.2C 2.2G<> PEX_TX2 2.2C 2.2G<> PEX_TX2* 2.2C 2.2G<> PEX_TX3 2.2C 2.2G<> PEX_TX3* 2.2C 2.2G<> PEX_TX4 2.2G<> 2.3C PEX_TX4* 2.2G<> 2.3C PEX_TX5 2.2G<> 2.3C PEX_TX5* 2.2G<> 2.3C PEX_TX6 2.2G<> 2.3C PEX_TX6* 2.2G<> 2.3C PEX_TX7 2.2G<> 2.3C PEX_TX7* 2.2G<> 2.3C PEX_TX8 2.2G<> 2.3C PEX_TX8* 2.2G<> 2.3C PEX_TX9 2.2G<> 2.4C PEX_TX9* 2.2G<> 2.4C PEX_TX10 2.3G<> 2.4C PEX_TX10* 2.3G<> 2.4C PEX_TX11 2.3G<> 2.4C PEX_TX11* 2.3G<> 2.4C PEX_TX12 2.3G<> 2.4C PEX_TX12* 2.3G<> 2.4C PEX_TX13 2.3G<> 2.4C PEX_TX13* 2.3G<> 2.4C PEX_TX14 2.3G<> 2.5C PEX_TX14* 2.3G<> 2.5C PEX_TX15 2.3G<> 2.5C MIOB_D<2> 10.4G 13.2B 18.2D PEX_TX15* 2.3G<> 2.5C PEX_VDD 17.1G PS_1V1_EN 17.2B PS_1V1_FB 17.3B PS_1V8_EN 17.1G< 17.2D PS_1V8_FB 17.3E PS_2V5_BOOT 17.1E 17.1G< PS_2V5_FB 17.2E 17.2G< PS_2V5_FB_R 17.2E 17.2G< PS_2V5_PHASE 17.1E 17.1G< PS_BOOT1_NV 16.1G< 16.3C PS_BOOT1_NV_R 16.2G< 16.3D PS_BOOT2_NV 16.1G< 16.3C PS_BOOT2_NV_R 16.2G< 16.3C PS_BOOT_FB 17.1G< 17.4C PS_BOOT_FB_R 17.4C PS_CP_FB 17.1G< 17.4B PS_CP_NV 16.1G< 16.3B PS_CP_RC_FB 17.1G< 17.4B PS_CP_RC_NV 16.1G< 16.3A PS_DROOP_NV 16.1G< 16.4C PS_FB_FB 17.1G< 17.4C PS_FB_NV 16.1G< 16.3B PS_FB_VCTL 17.5D PS_FB_VCTL* 17.1G< 17.5C PS_FSET_FB 17.1G< 17.4B PS_ISEN1_NV 16.1G< 16.3C 16.3G PS_ISEN2_NV 16.1G< 16.3C 16.3G PS_ISEN_FB 17.1G< 17.4C PS_LG1_NV 16.1G< 16.3C PS_LG2_NV 16.1G< 16.3C PS_LG_FB 17.1G< 17.4C PS_MIOA_FB 17.1G< PS_PEXVDD_FB 17.1G< PS_PEX_EN 17.1G< PS_PGOOD_NV 12.2B> 16.2A> 17.4B< PS_PHASE1_NV 16.1G< 16.3C PS_PHASE2_NV 16.1G< 16.3C PS_PHASE_FB 17.1G< 17.4C PS_PWM_DFB_NV 16.1G< 16.4C PS_PWM_OCSET_NV 16.1G< 16.4C PS_PWM_RBIAS_NV 16.2G< 16.3B PS_PWM_VCC_FB 17.1G< 17.3B PS_PWM_VDD_NV 16.1G< 16.2B PS_PWM_VDIFF_NV 16.1G< 16.3B PS_PWM_VO_NV 16.1G< 16.3G PS_PWM_VSUM_NV 16.1G< 16.4C PS_PWM_VW_NV 16.1G< 16.3B PS_RC1_NV 16.1G< 16.3F
PS_RC2_NV 16.1G< 16.4F PS_RC_FB 17.2G< 17.4D PS_RC_NTCRNET_NV 16.2G< 16.4D PS_RC_PHASE 16.1C 16.4B PS_RC_PHASE_R 16.1B PS_RC_VDIF_NV 16.2G< 16.3A PS_RC_VO 17.2G< 17.4C PS_SS_NV 16.2G< 16.3B PS_UG1_NV 16.1G< 16.2C PS_UG2_NV 16.1G< 16.3C PS_UG_FB 17.1G< 17.4C PS_VID4_NV 16.4B PS_VID5_NV 16.4B PS_VIN_FB 17.3C PS_VIN_NV 16.1G< 16.2C PS_VSENN_NV 15.5G> 16.2G< 16.5D< PS_VSENP_NV 15.5G> 16.2G< 16.4D< PWR_SRC 2.1G ROM_CS* 14.2G ROM_SCLK 14.2G< 18.1B> 18.4D ROM_SI 14.2G< 18.1B> 18.4D ROM_SO 14.2G SNN_1V8_POK 17.2D SNN_DACB_BLUE 11.3C SNN_DACB_CSYNC 11.3C SNN_DACB_GREEN 11.3C SNN_DACB_RED 11.3C SNN_DACB_RSET 11.3B SNN_DACB_VREF 11.3B SNN_DACC_BLUE 11.5C SNN_DACC_GREEN 11.5C SNN_DACC_HSYNC 11.4C SNN_DACC_RED 11.5C SNN_DACC_RSET 11.4B SNN_DACC_VREF 11.4B SNN_DACC_VSYNC 11.4C SNN_DPB_AUX 14.2D SNN_DPB_AUXN 14.2D SNN_DPB_HPD 14.2D SNN_DPB_L0 14.2D SNN_DPB_L0N 14.2D SNN_DPB_L1 14.2D SNN_DPB_L1N 14.2D SNN_DPB_L2 14.2D SNN_DPB_L2N 14.2D SNN_DPB_L3 14.2D SNN_DPB_L3N 14.2D SNN_DPC_AUX 14.2D SNN_DPC_AUXN 14.2D SNN_DPC_HPD 14.2D SNN_DPC_L0 14.2D SNN_DPC_L0N 14.2D SNN_DPC_L1 14.3D SNN_DPC_L1N 14.3D SNN_DPC_L2 14.3D SNN_DPC_L2N 14.3D SNN_DPC_L3 14.3D SNN_DPC_L3N 14.3D SNN_DP_CEC 13.3C SNN_DP_DNC 13.3B SNN_DP_GPIO2 13.3C SNN_DP_GPIO3 13.3C SNN_DP_INTR 13.3B SNN_DP_NC 13.3C SNN_FBA0_NC 5.2B SNN_FBA1_NC 5.2E SNN_FBA_CMD<26> 3.2C SNN_FBA_CMD<27> 3.2C SNN_FBA_CMD<28> 3.2C SNN_FBA_DEBUG 3.4C SNN_FBA_RFU0 3.4C SNN_FBA_RFU1 3.4C SNN_FBB0_NC 6.2B SNN_FBB1_NC 6.2E SNN_FBB_CMD<26> 3.2G SNN_FBB_CMD<27> 3.2G SNN_FBB_CMD<28> 3.2G SNN_FBB_DEBUG 3.4G SNN_FBB_PLLVDD 3.4G SNN_FBB_RFU0 3.4G SNN_FBB_RFU1 3.4G SNN_FBC0_NC 7.2B SNN_FBC1_NC 7.2E SNN_FBC_CMD<26> 4.2C SNN_FBC_CMD<27> 4.2C SNN_FBC_CMD<28> 4.2C SNN_FBC_DEBUG 4.4C SNN_FBC_PLLVDD 4.4C SNN_FBC_RFU0 4.3C SNN_FBC_RFU1 4.4C SNN_FBD0_NC 8.2B SNN_FBD1_NC 8.2E SNN_FBD_CMD<26> 4.2G SNN_FBD_CMD<27> 4.2G SNN_FBD_CMD<28> 4.2G SNN_FBD_DEBUG 4.4G
SNN_FBD_PLLVDD 4.4G SNN_FBD_RFU0 4.3G SNN_FBD_RFU1 4.4G SNN_FBVTT_NC0 15.2A SNN_FBVTT_NC1 15.2A SNN_FBVTT_NC2 15.2A SNN_FBVTT_NC3 15.2A SNN_FBVTT_NC4 15.3A SNN_FBVTT_NC5 15.3A SNN_FBVTT_NC6 15.3A SNN_FBVTT_NC7 15.3A SNN_FBVTT_NC8 15.3A SNN_FBVTT_NC9 15.3A SNN_FBVTT_NC10 15.3A SNN_FBVTT_NC11 15.3A SNN_FBVTT_NC12 15.3A SNN_FBVTT_NC13 15.3A SNN_FBVTT_NC14 15.3A SNN_FBVTT_NC15 15.3A SNN_FBVTT_NC16 15.3A SNN_FBVTT_NC17 15.3A SNN_FBVTT_NC18 15.3A SNN_FBVTT_NC19 15.3A SNN_FBVTT_NC20 15.3A SNN_FBVTT_NC21 15.3A SNN_GPU_5V_CLAMP 14.3G SNN_GPU_NC0 15.1A SNN_GPU_NC1 15.1A SNN_GPU_NC2 15.2A SNN_GPU_NC3 15.2A SNN_GPU_NC4 15.2A SNN_GPU_NC5 15.2A SNN_GPU_NC6 15.2A SNN_GPU_NC7 15.2A SNN_GPU_NC8 15.2A SNN_GPU_NC9 15.2A SNN_GPU_NC10 15.2A SNN_GPU_NC11 15.2A SNN_GPU_NC12 15.2A SNN_GPU_STEREO 14.3G SNN_GPU_VID_PLLVDD 15.1G SNN_IFPAB_VPROBE 12.2D SNN_IFPCD_VPROBE 12.3D SNN_IFPD_TX4 12.4E SNN_IFPD_TX4N 12.4E SNN_IFPD_TX5 12.4E SNN_IFPD_TX5N 12.4E SNN_IFPD_TX6 12.4E SNN_IFPD_TX6N 12.4E SNN_IFPD_TXC 12.4E SNN_IFPD_TXCN 12.4E SNN_ISL9502_NC1 16.5B SNN_ISL9502_NC2 16.5C SNN_MIOA_CLKOUT* 10.5C SNN_MISC1 14.3F SNN_MISC2 14.3F SNN_MISC3 14.3F SNN_MISC4 14.3F SNN_MISC5 14.3F SNN_MISC6 14.3F SNN_MXM_15 14.3B SNN_MXM_GPIO0 14.2B SNN_MXM_GPIO1 14.2B SNN_MXM_GPIO2 14.2B SNN_MXM_HDMI_CEC 14.3B SNN_MXM_OEM1 14.1B SNN_MXM_OEM2 14.1B SNN_MXM_OEM3 14.1B SNN_MXM_OEM4 14.1B SNN_MXM_OEM5 14.1B SNN_MXM_OWM_45 14.2B SNN_MXM_PRI_DISP 14.3B SNN_MXM_RSVD1 14.4B SNN_MXM_RSVD2 14.4B SNN_MXM_RSVD3 14.4B SNN_MXM_RSVD4 14.4B SNN_MXM_RSVD10 14.4B SNN_MXM_RSVD11 14.4B SNN_MXM_RSVD12 14.4B SNN_MXM_RSVD13 14.4B SNN_MXM_RSVD14 14.4B SNN_MXM_RSVD15 14.4B SNN_MXM_RSVD16 14.4B SNN_MXM_RSVD17 14.4B SNN_MXM_RSVD18 14.4B SNN_MXM_RSVD19 14.4B SNN_MXM_RSVD20 14.4B SNN_MXM_RSVD21 14.4B SNN_MXM_RSVD22 14.4B SNN_MXM_RSVD23 14.4B SNN_MXM_RSVD24 14.4B SNN_MXM_WAKE 14.3B SNN_PEX_CAL_PD_GND 2.4E SNN_PEX_CAL_PD_VDD 2.4E Q SNN_PEX_VDD 17.3B
SNN_PS_FB2_NV 16.4C SNN_PS_NTC_NV 16.3B SNN_PS_VRHOT_NV* 16.3B SNN_RP1_P3 10.1C SNN_RP1_P4 10.1C SNN_RP1_P5 10.1C SNN_RP1_P6 10.1C SNN_RP4 10.1C SNN_RP5 10.1C SPDIF 14.1B SPDIF_IN 14.1G< SPDIF_IN_C 14.1G< SPDIF_IN_DP 13.3A< 14.1A> SPDIF_IN_DP0 13.3B SPDIF_IN_GPU 14.1A> 14.3F THERM 13.4E THERM* 13.4E THERM_ALERT 13.5F THERM_R 13.4E THERM_R* 13.4E THERM_THERM* 13.5F THERM_VDD 13.1G< 13.4G XTAL_BUFF_DP 10.1G< XTAL_BUFF_OUT 10.1G< 10.2G XTAL_BUF_DP 10.1G< 10.2H> 13.2A< XTAL_CLK_OUT 10.1G< XTAL_IN 10.1G< 10.2F XTAL_OUT 10.1G< 10.2G XTAL_OUT_DP 13.2B 13.2G< XTAL_SSC_GPU_IN 10.1G< 10.2E XTAL_SSC_IN 10.1G< 10.3G XTAL_SSC_OUT 10.1G< 10.3F XTAL_SSC_REF 10.1G< 10.3F XTAL_SSC_VDD 10.1E< 10.3G XTAL_SYS_27MHZ 10.1G<
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. <edit here to insert page detail>
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p817_a02 phchan
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Title: Cref Part Report Design: p817_a02 Date: Jul 9 15:09:52 2008
C1 [14.2H] C2 [17.2E] C3 [17.4E] C4 [17.3D] C5 [13.2E] C6 [9.4G] C7 [9.4G] C8 [17.1C] C9 [10.2F] C10 [10.2F] C11 [17.1B] C12 [16.2G] C13 [9.3G] C14 [8.3B] C15 [10.5F] C16 [12.2C] C17 [16.2F] C18 [16.3A] C19 [8.3E] C20 [9.3G] C21 [16.4F] C22 [9.4G] C23 [9.3G] C24 [9.4G] C25 [8.3F] C26 [14.2H] C27 [4.4D] C28 [9.2G] C29 [17.1D] C30 [17.1D] C31 [9.4E] C32 [4.4D] C33 [9.2G] C34 [4.4D] C35 [16.4G] C36 [8.3E] C37 [16.2G] C38 [16.3H] C39 [7.3C]
C41 [9.4E] C42 [16.3H] C43 [9.1G] C44 [16.3H] C45 [9.4E] C46 [16.4G] C47 [15.3D] C48 [16.2G] C49 [7.3B] C50 [7.3F] C51 [16.3H] C52 [15.3C] C53 [9.1G] C54 [9.1E] C55 [15.3C] C56 [15.3C] C57 [3.4D] C58 [2.5F] C59 [15.2G] C60 [3.4D] C61 [17.3C] C62 [3.4D] C63 [17.3B] C64 [9.3E] C65 [15.2G] C66 [17.3C] C67 [15.2G] C68 [3.4D] C69 [17.3B] C70 [9.4E] C71 [9.2E] C72 [17.4F] C73 [17.3C] C74 [2.2G] C75 [14.1B] C76 [14.1B] C77 [9.2C] C78 [6.4C] C79 [5.3D] C80 [9.2D] C81 [9.3D] C82 [9.4C] C83 [9.2D] C84 [6.3G] C85 [6.4F] C86 [9.4C] C87 [6.3E] C88 [6.3D] C89 [9.3D]
C90 [6.3B] C91 [5.3C] C92 [9.4D] C93 [16.4F] C94 [9.2C] C95 [16.4F] C96 [5.3F] C97 [14.2F] C98 [9.3A] C99 [9.1A] C100 [9.4A] C101 [2.2B] C102 [17.2F] C103 [16.4F] C104 [17.1E] C105 [17.4E] C106 [17.4E] C107 [17.2F] C108 [17.4F] C501 [16.2F] C502 [17.3E] C503 [16.2E] C504 [2.2B] C505 [9.3B] C506 [16.2F] C507 [9.1D] C508 [9.4D] C509 [9.1B] C510 [5.3E] C511 [9.2D] C512 [9.2C] C513 [9.4A] C514 [9.2B] C515 [5.3B] C516 [9.4B] C517 [9.2A] C518 [9.2C] C519 [9.3A] C520 [9.4C] C521 [9.1D] C522 [16.2F] C523 [9.3C] C524 [9.4A] C525 [17.4D] C526 [9.2B] C527 [9.3C]
C529 [9.4A] C530 [9.1C] C531 [9.2A] C532 [5.3B] C533 [9.4B] C534 [9.4C] C535 [9.1C] C536 [9.4A] C537 [2.2B] C538 [7.3E] C539 [9.2D] C540 [6.3B] C541 [6.3E] C542 [17.3E] C543 [16.2G] C544 [16.2F] C545 [9.4B] C546 [9.4C] C547 [9.2B] C548 [17.4A] C549 [9.2A] C550 [5.3G] C551 [9.4B] C552 [17.4B] C553 [17.4C] C554 [9.2A] C555 [9.4A] C556 [9.1C] C557 [16.2F] C558 [16.2F] C559 [9.3B] C560 [9.4D] C561 [9.1A] C562 [9.2B] C563 [17.5B] C564 [17.4F] C565 [9.2A] C566 [9.4C] C567 [9.2A] C568 [17.4F] C569 [5.3E] C570 [9.1A] C571 [9.3A] C572 [16.3F] C573 [9.2C] C574 [17.5C] C575 [17.4B] C576 [17.3C] C577 [9.1B]
C578 [7.3G] C579 [7.3B] C580 [9.1F] C581 [9.2F] C582 [9.1E] C583 [9.4F] C584 [9.2E] C585 [17.5D] C586 [9.1E] C587 [9.2G] C588 [9.2E] C589 [9.2E] C590 [9.2E] C591 [15.3C] C592 [15.3C] C593 [9.2E] C594 [16.4H] C595 [9.1E] C596 [9.2E] C597 [16.4H] C598 [15.2C] C599 [9.3G] C600 [9.4E] C601 [7.3C] C602 [9.4F] C603 [16.2B] C604 [9.3E] C605 [16.3C] C606 [7.3E] C607 [15.2C] C608 [15.2C] C609 [2.2E] C610 [15.2C] C611 [15.2C] C612 [15.2C] C613 [15.2C] C614 [15.2D] C615 [9.4E] C616 [16.2C] C617 [16.3B] C618 [2.2F] C619 [2.2F] C620 [15.2D] C621 [15.2D] C622 [15.2D] C623 [15.2C] C624 [15.3C] C528 [9.2C] C40 [9.2G] C625 [15.4B] C626 [2.2F] C627 [9.3E] C628 [15.5B] C629 [15.2D] C630 [15.4B] C631 [15.5C] C632 [15.4C] C633 [2.2F] C634 [16.3B] C635 [15.2D] C636 [2.2F] C637 [2.2F] C638 [15.5C] C639 [15.5A] C640 [9.2G] C641 [9.2G] C642 [15.2C] C643 [16.3C] C644 [2.2F] C645 [15.4A] C646 [2.2F] C647 [16.3A] C648 [8.3G] C649 [16.3A] C650 [9.2G] C651 [15.4B] C652 [9.3E] C653 [2.2E] C654 [2.2F] C655 [15.3D] C656 [15.4B] C657 [16.5C] C658 [15.4B] C659 [2.2F] C660 [2.2G] C661 [16.4C] C662 [15.2C] C663 [15.5B] C664 [15.4B] C665 [15.4C] C666 [16.4G] C667 [16.2B] C668 [16.2C] C669 [15.4A] C670 [2.5E] C671 [15.2B] C672 [15.2C] C673 [16.4D]
C674 [15.4B] C675 [2.5E] C676 [15.1B] C677 [15.4C] C678 [16.4H] C679 [15.5A] C680 [15.4B] C681 [15.4C] C682 [9.3F] C683 [15.4A] C684 [15.1B] C685 [9.2G] C686 [15.2D] C687 [16.3G] C688 [16.3G] C689 [16.4D] C690 [15.4A] C691 [15.1G] C692 [15.5B] C693 [15.5B] C694 [9.2F] C695 [15.2C] C696 [10.4B] C697 [15.1B] C698 [15.2D] C699 [10.4B] C700 [10.4B] C701 [15.2G] C702 [15.1G] C703 [4.4C] C704 [15.1G] C705 [10.4F] C706 [15.2B] C707 [9.2G] C708 [10.4F] C709 [10.4A] C710 [17.2D] C711 [15.2B] C712 [10.4F] C713 [12.4D] C714 [11.2B] C715 [9.3C] C716 [12.2D] C717 [12.4D] C718 [12.2C] C719 [9.4G] C720 [17.2F] C721 [12.3D] C722 [9.4G] C723 [11.1B] C724 [8.3C] C725 [12.4D] C726 [12.2D] C727 [12.3D] C728 [16.2E] C729 [12.4D] C730 [10.4B] C731 [9.4D] C732 [11.1B] C733 [17.2B] C734 [12.3D] C735 [12.3B] C736 [12.4D] C737 [17.3E] C738 [11.1A] C739 [12.2D] C740 [12.2D] C741 [9.1G] C742 [9.1G] C743 [12.3D] C744 [9.4E] C745 [9.4E] C746 [9.4G] C747 [17.2H] C748 [9.4G] C749 [13.4A] C750 [16.2F] C751 [11.1A] C752 [13.4A] C753 [13.4C] C754 [9.2G] C755 [16.2G] C756 [13.4E] C757 [16.4F] C758 [13.4B] C759 [13.5A] C760 [9.2E] C761 [13.4B] C762 [9.3G] C763 [9.1G] C764 [9.4G] C765 [8.3D] C766 [9.4G] C767 [8.3B] C768 [2.1A] C769 [13.5H]
C770 [10.3G] C771 [13.5B] C772 [17.3H] C773 [13.4B] C774 [13.5B] C775 [2.1B] C776 [13.5H] C777 [10.3G] C778 [10.3G] C779 [13.5B] C780 [13.4B] C781 [10.4E] C782 [13.4B] C783 [17.3D] C784 [13.4B] C785 [12.2C] C786 [17.2F] CN1 [2.3B] CN1 [14.2C] D1 [11.2H 11.2H
11.3H] D501 [10.2D] D502 [14.5F 14.5E] D503 [14.4F 14.4E] D504 [14.4E 14.4F] D505 [14.4E 14.4F] G1 [2.3E] G1 [3.3C 3.3G] G1 [4.3C 4.3G] G1 [10.2F 10.5G
10.2A 10.5C] G1 [11.5C 11.3C
11.2C] G1 [12.2E 12.4E] G1 [13.4F] G1 [14.3G 14.1F
14.1E] G1 [15.3E 15.4F
15.4H 15.1A
15.3A 15.2H] J1 [14.4H] L1 [17.1E] L2 [16.3G] L3 [16.3G] L4 [17.4E] LB1 [12.2C]
LB3 [2.5F] LB4 [3.4D] LB5 [15.2G] LB501 [15.1G] LB502 [12.4C] LB503 [12.2C] LB504 [11.1A] LB505 [13.4A] LB506 [17.2G] LB507 [12.2C] LB508 [17.2G] LB509 [17.3G] M1 [8.2C 8.4C 8.4D
8.4E 8.4C] M2 [8.5C 8.5E 8.5D
8.2F 8.5C] M3 [7.4C 7.4E 7.4D
7.2C 7.4C] M4 [7.5C 7.2F 7.5E
7.5C 7.5D] M5 [6.4D 6.2C 6.4C
6.4C 6.4E] M6 [6.5C 6.5E 6.5C
6.2F 6.5D] M7 [5.4C 5.2C 5.4C
5.4E 5.4D] M8 [5.5C 5.5E 5.2F
5.5D 5.5C] MEC1 [18.4A 18.4A
18.3A 18.4A
18.3A 18.4A] Q1 [18.4D] Q2 [18.4D] Q3 [16.4E] Q4 [17.1B] Q5 [16.3E] Q6 [16.4E] Q7 [8.4G] Q8 [8.3H] Q9 [7.3E] Q10 [6.4H] Q11 [6.3H] Q12 [5.3H] Q13 [17.4D] Q14 [16.2E] Q15 [16.3E] Q16 [16.3E] Q17 [17.4D] Q18 [12.2C]
Q19 [16.1C] Q501 [7.3H] Q502 [17.5D] Q503 [12.3B] Q503 [17.2B] Q504 [12.3C] R1 [14.2G] R2 [18.2C] R3 [17.2D] R4 [18.2C] R5 [10.2G] R6 [10.5F] R7 [18.1C] R8 [14.1H] R9 [10.4E] R10 [8.3D] R11 [10.2C] R12 [14.2G] R13 [14.2G] R14 [14.1G] R15 [10.2C] R16 [10.5E] R17 [10.5E] R18 [14.3G] R19 [8.3D] R20 [10.2B] R21 [8.2B] R22 [8.3D] R23 [8.3D] R24 [18.4C] R25 [18.4C] R26 [8.2G] R27 [8.2E] R28 [8.3G] R29 [8.3G] R30 [7.2B] R31 [7.3D] R32 [7.3D] R33 [7.3D] R34 [7.3D] R35 [14.2B] R36 [17.3C] R37 [17.3A] R38 [17.3C] R39 [6.3G] R40 [6.3G] R41 [6.3D] LB2 [4.4D] R42 [5.3G] R43 [6.3D] R44 [6.2B] R45 [6.2E] R46 [6.2G] R47 [6.3D] R48 [6.3D] R49 [5.2B] R50 [14.2E] R51 [17.4D] R52 [5.2B] R53 [13.2B] R54 [17.1F] R55 [17.2F] R56 [10.2D] R57 [10.2D] R58 [12.2C] R59 [13.3A] R60 [13.3C] R61 [16.3B] R62 [16.1C] R63 [17.2E] R64 [17.4D] R65 [13.3B] R501 [17.4D] R502 [6.2B] R503 [6.2E] R504 [5.2B] R505 [6.2B] R506 [5.2B] R507 [5.2E] R508 [17.4D] R509 [5.2A] R510 [6.2A] R511 [17.4C] R512 [6.2D] R513 [5.2D] R514 [6.2B] R515 [17.4A] R516 [17.4D] R517 [17.4C] R518 [17.4B] R519 [10.2D] R520 [17.4C] R521 [17.4D] R522 [16.3F] R523 [17.5B] R524 [17.3C] R525 [5.2E]
R526 [5.3G] R527 [17.4B] R528 [5.3G] R529 [7.3G] R530 [7.3G] R531 [7.3G] R532 [17.5D] R533 [17.5D] R534 [7.2E] R535 [7.2E] R536 [7.2D] R537 [16.3G] R538 [3.4D] R539 [16.4A] R540 [7.2B] R541 [7.2B] R542 [16.4B] R543 [16.4B] R544 [16.4A] R545 [16.4B] R546 [16.4A] R547 [3.4D] R548 [3.4D] R549 [16.3D] R550 [16.2B] R551 [3.4H] R552 [16.3B] R553 [7.2B] R554 [3.4H] R555 [16.4C] R556 [3.4H] R557 [16.3B] R558 [7.2A] R559 [16.3D] R560 [16.3A] R561 [16.3A] R562 [16.4C] R563 [16.2C] R564 [16.4C] R565 [16.4D] R566 [16.3G] R567 [16.3G] R568 [16.2C] R569 [16.4C] R570 [16.4C] R571 [16.3C] R572 [11.2D] R573 [8.2E] R574 [16.3G] R575 [11.2D] R576 [11.2D] R577 [8.2D] R578 [16.4G] R579 [8.2B] R580 [2.4F] R581 [12.2D] R582 [8.2B] R585 [11.3B] R586 [10.4B] R587 [10.5B] R588 [11.2D] R589 [11.4B] R590 [10.4B] R591 [12.3B] R592 [17.2B] R593 [11.1D] R594 [11.1D] R595 [12.3D] R596 [8.2B] R597 [12.3B] R598 [14.3F] R599 [10.5B] R600 [18.3C] R601 [16.4F] R602 [11.4D] R603 [11.4D] R604 [11.4D] R605 [11.4D] R606 [11.2D] R607 [13.1B] R608 [13.4C] R609 [11.2B] R610 [13.4E] R611 [13.4C] R612 [13.1C] R613 [8.2A] R614 [18.3D] R615 [18.3D] R616 [13.5E] R617 [18.2D] R618 [17.1B] R619 [13.5G] R620 [10.3F] R621 [10.3H] R622 [13.5G] R623 [18.2C]
R624 [13.5E] R625 [14.1F] R626 [13.4H] R627 [13.3C] R628 [18.2C] R629 [13.5E] R630 [14.1G] R631 [18.2D] R632 [10.2G] R633 [10.2G] R634 [17.3E] R635 [17.2E] R636 [18.3D] R637 [14.4A] R638 [13.5E] R639 [14.3H] R640 [14.1G] R641 [14.1E] R642 [14.3H] R643 [18.3D] R644 [13.1C] R645 [18.4C] R646 [18.4D] R647 [13.5E] R648 [14.1F] R649 [18.4D] R650 [18.3D] R651 [18.5D] R652 [18.2D] R653 [13.2C] R654 [10.2C] R655 [18.2D] R656 [18.3D] R657 [13.3C] R658 [10.3F] R659 [18.2C] RP1 [10.2B 10.1C
10.1C 10.2A] RP501 [10.2B 10.2B
10.1C 10.2B] RP502 [14.4B 14.4B
14.4B 14.4B] TP501 [3.5B] TP502 [3.5F] TP503 [14.1E] TP504 [14.1E] TP505 [14.1E] TP506 [14.1E] TP507 [14.1E] U1 [17.2E] U2 [14.2H] U3 [13.2B 13.4C] U4 [14.2H] U5 [17.1E] U6 [17.3B] U7 [16.1B] U501 [17.4B] U502 [16.3C] U503 [13.5F] U504 [10.3F] U505 [13.2D 13.1D] Y1 [10.2F]
NB9E-GTX/G92-760-B1,55nm SKU3 1024MB, 8pcs32Mx32 GDDR3, SLI. <edit here to insert page detail>
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21 OF 21
22-AUG-2008
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