Page 1
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
ASSEMBLYNVPNVARIANT
B
1
2
SKU
3
4
5
6
12
13
14
7
8
9
10
11
15
P363-A01 SKU0000
P363-A01, G92, 8Mx32/16Mx32 GDDR3 (800/1000 MHz),
DVI-I-DL, DVI-I-DL
Table of Contents:
Page 1: Overview
Page 2: PCI Express 1.0
Page 3: MEMORY: GPU Partition A/B
Page 4: MEMORY: GPU Partition C/D
Page 5: FBA Partition
Page 6: FBB Partition
Page 7: FBC Partition
Page 8: FBD Partition
Page 9: FrameBuffer Net Rules
Page 10: DACA Interface
Page 11: DACC Interface
Page 12: IFP A/B and C/D Interface
Page 13: DACB Interface
Page 14: Multi-use IO(MIO) Interface
Page 15: MISC: GPIO, I2C, BIOS, PLL, and XTAL
Page 16: Thermal Control/Protection and SPDIF Input
Page 17: Power/GND and Decoupling
Page 18: Configuration Straps and Mechanical
Page 19: Power Supply:5V,DDC_5V,1V8,2V5,PEX_PLLVDD option
Page 20: Power Supply: FBVDD,PEX_VDD
Page 21: Power Supply: NVVDD
Page 22: Power Supply: Filter of 12V, 12V_PEX, 3V3
BASE
SKU0000
SKU0050
SKU0058
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
Overview
www.vinafix.vn
<UNDEFINED>
600-10363-base-100
600-10363-0000-100
600-10363-0050-100
600-10363-0058-100
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
P363 - BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
P363 G92-289 512MB GDDR3 16Mx32 DVI-I+DVI-I
P363 G92-288 512MB GDDR3 16Mx32 DVI-I+DVI-I
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
600-10363-0000-100 A
p363_a01
donchen
1 OF 22
28-SEP-2008
Page 2
J501
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTININ
23/24 JTAG
JTAG_TDI
JTAG_TCLK
JTAG_TMS
JTAG_TDO
JTAG_TRST
KEY
TRST*
TCK
GND
TMS
TDO
VCC
TDI
1/24 PCI EXPRESS
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
RFU
RFU
PEX_PLLAVDD
PEX_PLLDGND
PEX_PLLAGND
PEX_PLLDVDD
PEX_TEST_PLL_CLK_OUT
PEX_TEST_PLL_CLK_OUT
PEX_TX0
PEX_REFCLK
PEX_REFCLK
PEX_RST
PEX_TX0
PEX_RX1
PEX_TX1
PEX_RX0
PEX_TX2
PEX_TX2
PEX_RX2
PEX_TX3
PEX_RX1
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX1
PEX_RX0
PEX_RX2
PEX_RX5
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX4
PEX_TX4
PEX_RX4
PEX_TX6
PEX_RX5
PEX_RX4
PEX_TX5
PEX_TX5
PEX_TX7
PEX_TX9
PEX_RX8
PEX_TX8
PEX_RX9
PEX_RX7
PEX_TX9
PEX_TX10
PEX_RX7
PEX_TX8
PEX_TX10
PEX_RX9
PEX_RX8
PEX_RX10
PEX_RX11
PEX_RX10
PEX_TX12
PEX_TX12
PEX_RX11
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX11
PEX_TX11
PEX_TX14
PEX_RX15
PEX_RX15
PEX_TX15
PEX_TX15
PEX_RX14
PEX_RX14
PEX_TX14
ININOUT
END OF X8
END OF X16
END OF X1
END OF X4
TCLK JTAG2
TMS JTAG5
TDO JTAG4
TDI JTAG3
WAKE
SMDAT
SMCLK
PERN0
PERP0
REFCLK
PERST
REFCLK
PETN1
PERP2
PETN0
PERP1
PERN1
PETP0
PETP1
PERN3
PETP3
PETN3
PETP2
PERP3
PETN2
PERN2
PERP4
PERN4
PETN4
PERP5
PETP4
PERN5
PETP5
PETP6
PERN6
PERP6
PETN5
PERP7
PETN6
PERN7
PETN8
PETP8
PERP8
PETN7
PETP7
PERN8
PERN9
PERP9
PERP10
PERN10
PETP10
PETP9
PETN9
PETN10
PETN11
PERP12
PERN12
PERP11
PERN11
PETP11
PETN12
PETP12
PETN13
PERP13
PERN13
PETP13
PERP14
PERN15
PETP15
PETN15
PERN14
PETN14
PETP14
PERP15
TRST* JTAG1+12V
+12V/RSVD
+3V3AUX
+12V
+12V
+12V
+3V3
+3V3
+3V3
PRSNT2
PRSNT1
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT2
RSVD
RSVD
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT2
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT2
GND
RSVD
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
HDR_2F4
FEMALE
3V3_F
1
3
5
7
1.274MM
0
KEY6_JTAG_SMALL
NO STUFF
2
4
8
AH21
AJ21
AH22
AJ22
AH23
AJ23
AH16
AF17
AH17
AF18
AH18
AF19
AH19
AE20
AF20
AH20
AJ20
PEX_PLL_CLK_OUT
AM9
PEX_PLL_CLK_OUT*
AN9
SNN_PEXCAL_PD_VDDQ
AK19
SNN_PEXCAL_PD_GND
AK20
PEX_PLLAVDD
AE15
AE17
Fix for G92 NC pin issue
AF15
AE16
GND
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
PCI Express 1.0
www.vinafix.vn
15<
.1UF
10V
10%
0402
.1UF
10V0402 .1UFC896
10%
0402
.1UF
C891
10V
10%
0402
.1UF
C879
10V
10%
0402
.1UF
C864
10V
10%
0402
.1UF
C842
10V
10%
0402
.1UF
C823
10V
10%
0402 10V
.1UF
C798
10V
10%
0402
.1UFC781
C776
10V
10%
0402
.1UF
C740
10V
10%
0402
.1UF
C709
10V
10%
0402
.1UF
C686
10V
10%
0402
.1UF
C679
10V
10%
0402
.1UF
10V
10%
0402
.1UF
C658
10V
10%
0402
.1UF
C65310V
10%
0402
R690
0402
0402
R697
0402
R695
0402
R693
0402
5%
5%
5%
5%
5%
0
NO STUFF
0R700
NO STUFF
0
NO STUFF
0
NO STUFF
0
NO STUFF
JTAG_TRST*
JTAG_TCLK
JTAG_TDI
JTAG_TDO
JTAG_TMS
15<> 15<
G1
G92-300-A1
BGA1148
COMMON
AR9
AK10
AL10
AM11
AM10
AP9
AP10
AN10
AR10
AR11
AN12
AM12
AT11
AT12
AL12
AK12
AP12
AP13
AM14
AM13
AR13
AR14
AN13
AN14
AT14
AT15
AN15
AM15
AP15
AP16
AL15
AK15
AR16
AR17
AN16
AT17
AT18
AN17
AN18
AP18
AP19
AM18
AM17
AR19
AR20
AL18
AK18
AT20
AT21
AM19
AN19
AP21
AP22
AN20
AN21
AR22
AR23
AM21
AM20
AT23
AT24
AL21
AK21
AR24
AR25
.1UFC910
10V
10V
.1UF
10V
.1UF
10V
.1UF
10V
.1UF
10V
.1UF
.1UF
10V
.1UF
10V
.1UF
10V
.1UF
10V
.1UF
10V
.1UF
10V
.1UFC663
10V
.1UF
10V
.1UF
10V
16< 2>
10%
X5R
10%
X5R
10%
X5R
10%
X5R
10%
X5R
10%
X5R
10%
X5R
10%
X5R
10%
X5R
10%
X5R
10%
X5R
10%
10%
X5R
10%
X5R
10%
X5R
10%
X5R
PEX_TX0
PEX_TX0*
COMMON
PEX_TX1
PEX_TX1* AN11
COMMON
PEX_TX2
PEX_TX2*
COMMON
PEX_TX3
PEX_TX3*
COMMON
PEX_TX4
PEX_TX4*
COMMON
PEX_TX5
PEX_TX5*
COMMON
PEX_TX6
PEX_TX6*
COMMON
PEX_TX7
PEX_TX7*
COMMON
PEX_TX8 AM16
PEX_TX8*
COMMON
PEX_TX9
PEX_TX9*
COMMON
PEX_TX10
PEX_TX10*
COMMON
PEX_TX11
PEX_TX11*
COMMON
PEX_TX12
PEX_TX12*
COMMON
PEX_TX13
PEX_TX13*
COMMON
PEX_TX14
PEX_TX14*
COMMON
PEX_TX15
PEX_TX15*
COMMON
Page2: PCI Express 1.0
12V
3V3
See filtering on page 22
C20
C21
4.7UF
4.7UF
16V
16V
20%
20%
X7R
X7R
1206
1206
COMMON
COMMON
GND
SNN_3V3AUX
PEX_PRSNT
SNN_PEX_PRSNT2_A
SNN_PEX_RSVD1
SNN_PEX_PRSNT2_B
SNN_PEX_RSVD2
SNN_PEX_RSVD3
SNN_PEX_RSVD4
SNN_PEX_PRSNT2_C
SNN_PEX_RSVD5
PEX_PRSNT
SNN_PE_RSVD6
SNN_PE_RSVD7
C27
.1UF
16V
10%
X7R
0402
COMMON
CN1
NONPHY-X16-B
CON_X16
CON_PCIEXP_X16_EDGE
COMMON
PEX_TRST*
B9
PEX_TCLK
A5
PEX_TDI
A6
PEX_TDO
A7
PEX_TMS
A8
I2CS_SCL_R
B5
I2CS_SDA_R
B6
R696
0
5%
0402
COMMON
A10
B10
B17
B1
B2
A2
A3
B3
B8
A9
A1
B12
SNN_PEX_WAKE*
B4
A4
B7
A12
B13
A15
B16
B18
A18
GND
B31
A19
B30
A32
A20
B21
B22
A23
A24
B25
B26
A27
A28
B29
A31
B32
B48
GND
A33
A34
B35
B36
A37
A38
B39
B40
A41
A42
B43
B44
A45
A46
B47
B49
A49
GND
B81
A50
B82
A51
B52
B53
A54
A55
B56
B57
A58
A59
B60
B61
A62
A63
B64
B65
A66
A67
B68
B69
A70
A71
B72
B73
A74
A75
B76
B77
A78
A79
B80
A82
GND
B11
A11
A13
A14
A16
A17
B14
B15
A21
A22
B19
B20
A25
A26
B23
B24
A29
A30
B27
B28
A35
A36
B33
B34
A39
A40
B37
B38
A43
A44
B41
B42
A47
A48
B45
B46
A52
A53
B50
B51
A56
A57
B54
B55
A60
A61
B58
B59
A64
A65
B62
B63
A68
A69
B66
B67
A72
A73
B70
B71
A76
A77
B74
B75
A80
A81
B78
B79
PEX_RST*
PEX_REFCLK
PEX_REFCLK*
PEX_TX0_C
PEX_TX0_C*
PEX_RX0
PEX_RX0*
PEX_TX1_C
PEX_TX1_C*
PEX_RX1
PEX_RX1*
PEX_TX2_C
PEX_TX2_C*
PEX_RX2
PEX_RX2*
PEX_TX3_C
PEX_TX3_C*
PEX_RX3
PEX_RX3*
PEX_TX4_C
PEX_TX4_C*
PEX_RX4
PEX_RX4*
PEX_TX5_C
PEX_TX5_C*
PEX_RX5
PEX_RX5*
PEX_TX6_C
PEX_TX6_C*
PEX_RX6
PEX_RX6*
PEX_TX7_C
PEX_TX7_C*
PEX_RX7
PEX_RX7*
PEX_TX8_C
PEX_TX8_C*
PEX_RX8
PEX_RX8*
PEX_TX9_C
PEX_TX9_C*
PEX_RX9
PEX_RX9*
PEX_TX10_C
PEX_TX10_C*
PEX_RX10
PEX_RX10*
PEX_TX11_C
PEX_TX11_C*
PEX_RX11
PEX_RX11*
PEX_TX12_C
PEX_TX12_C*
PEX_RX12
PEX_RX12*
PEX_TX13_C
PEX_TX13_C*
PEX_RX13
PEX_RX13*
PEX_TX14_C
PEX_TX14_C*
PEX_RX14
PEX_RX14*
PEX_TX15_C
PEX_TX15_C*
PEX_RX15
PEX_RX15*
C914
0402
COMMON
X5R
C897
COMMON
X5R
C892
0402
COMMON
X5R
C881
0402
COMMON
X5R
C868
0402
COMMON
X5R
C845
0402
COMMON
X5R
C830
0402
COMMON
X5R
C809
0402
COMMON
X5R
0402
COMMON
X5R
C751
0402
COMMON
X5R
C716
0402
COMMON
X5R
C693
0402
COMMON
X5R X5R
C680
0402
COMMON
X5R
C668
0402
COMMON
X5R
C660
0402
COMMON
X5R
C655
0402
COMMON
X5R
3V3_F
GND
C734
.1UF
10V
10%
X5R
0402
COMMON
C735
10V
10%
X5R
0402
COMMON
C724
.1UF
10V
10%
X5R
0402
COMMON
PEX_TEST_PLL_CLK_OUT
Termination = 200ohm
Place on bottom side
for test access
R682
10K
5%
0402
COMMON
C768
.1UF
10V
10%
X5R
0402
COMMON
C748
.1UF.1UF
10V
10%
X5R
0402
COMMON
C741
.1UF
10V
10%
X5R
0402
COMMON
R671
10K
5%
0402
COMMON
R674
10K
5%
0402
COMMON
R634
200
5%
0402
COMMON
C784
.1UF
10V
10%
X5R
0402
COMMON
GND
C775
1UF
6.3V
10%
X5R
0402
COMMON
C723
1UF
6.3V
10%
X5R
0402
COMMON
C762
1UF
6.3V
10%
X5R
0402
COMMON
R685
180
5%
0402
COMMON
R686
270
5%
0402
COMMON
JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST*
C773
1UF
6.3V
10%
X5R
0402
COMMON
C761
1UF
6.3V
10%
X5R
0402
C760
1UF 4.7UF
6.3V
10%
X5R
0402
COMMON
C757
1UF
6.3V
10%
X5R
0402
COMMON
AK6
AL8
AL7
AK7
AL9
C750
4.7UF
6.3V
10%
X5R
0603
COMMON
JTAG
G1
G92-300-A1
BGA1148
COMMON
C753
4.7UF
6.3V
10%
X5R
0603
COMMONCOMMON
GND
C713
6.3V
10%
X5R
0603
COMMON
GND
OPTIONAL
L502
0402
L501
0402
1V2
C50
10UF
6.3V
20%
X5R
0805
COMMON
1V2
C51
10UF
6.3V
20%
X5R
0805
COMMON
10nH
NO STUFF
10nH
COMMON
PEX_PLLVDD
1V2
C742
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
PEX NET RULES
PEX_PLLAVDD
PEX_PLLDVDD
NV_CRITICALNET
PEX_REFCLK
PEX_REFCLK*
PEX_TX0_C
PEX_TX0_C*
PEX_TX1_C
PEX_TX1_C*
PEX_TX2_C
PEX_TX2_C*
PEX_TX3_C
PEX_TX3_C*
PEX_TX4_C
PEX_TX4_C*
PEX_TX5_C
PEX_TX5_C*
PEX_TX6_C
PEX_TX6_C*
PEX_TX7_C
PEX_TX7_C*
PEX_TX8_C
PEX_TX8_C*
PEX_TX9_C
PEX_TX9_C*
PEX_TX10_C
PEX_TX10_C*
PEX_TX11_C
PEX_TX11_C*
PEX_TX12_C
PEX_TX12_C*
PEX_TX13_C
PEX_TX13_C*
PEX_TX14_C
PEX_TX14_C*
PEX_TX15_C
PEX_TX15_C*
PEX_RX0
PEX_RX0* 1
PEX_RX1
PEX_RX1*
PEX_RX2
PEX_RX2*
PEX_RX3
PEX_RX3*
PEX_RX4
PEX_RX4*
PEX_RX5
PEX_RX5*
PEX_RX6
PEX_RX6*
PEX_RX7
PEX_RX7*
PEX_RX8
PEX_RX8*
PEX_RX9
PEX_RX9*
PEX_RX10
PEX_RX11
PEX_RX11*
PEX_RX12
PEX_RX12*
PEX_RX13
PEX_RX13*
PEX_RX14
PEX_RX14*
PEX_RX15
PEX_RX15*
PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX5
PEX_TX5*
PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*
PEX_PLL_CLK_OUT
PEX_PLL_CLK_OUT*
PEX_RST*
PEX_TRST*
PEX_TCLK
PEX_TDI
PEX_TDO
PEX_TMS
JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1PEX_RX10*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1PEX_TX4*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
3
3
3
3
3
3
3
3
3
1.2V
1.2V
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
0.25A
0.10A
PEX_PLL_CLK_OUT
PEX_PLL_CLK_OUT
600-10363-0000-100 A
p363_a01
donchen
DIFFPAIRNV_IMPEDANCE
PEX_REFCLK
PEX_REFCLK
PEX_TX0_C
PEX_TX0_C
PEX_TX1_C
PEX_TX1_C
PEX_TX2_C
PEX_TX2_C
PEX_TX3_C
PEX_TX3_C
PEX_TX4_C
PEX_TX4_C
PEX_TX5_C
PEX_TX5_C
PEX_TX6_C
PEX_TX6_C
PEX_TX7_C
PEX_TX7_C
PEX_TX8_C
PEX_TX8_C
PEX_TX9_C
PEX_TX9_C
PEX_TX10_C
PEX_TX10_C
PEX_TX11_C
PEX_TX11_C
PEX_TX12_C
PEX_TX12_C
PEX_TX13_C
PEX_TX13_C
PEX_TX14_C
PEX_TX14_C
PEX_TX15_C
PEX_TX15_C
PEX_RX0
PEX_RX0
PEX_RX1
PEX_RX1
PEX_RX2
PEX_RX2
PEX_RX3
PEX_RX3
PEX_RX4
PEX_RX4
PEX_RX5
PEX_RX5
PEX_RX6
PEX_RX6
PEX_RX7
PEX_RX7
PEX_RX8
PEX_RX8
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_RX12
PEX_RX12
PEX_RX13
PEX_RX13
PEX_RX14
PEX_RX14
PEX_RX15
PEX_RX15
PEX_TX0
PEX_TX0
PEX_TX1
PEX_TX1
PEX_TX2
PEX_TX2
PEX_TX3
PEX_TX3
PEX_TX4
PEX_TX4
PEX_TX5
PEX_TX5
PEX_TX6
PEX_TX6
PEX_TX7
PEX_TX7
PEX_TX8
PEX_TX8
PEX_TX9
PEX_TX9
PEX_TX10
PEX_TX10
PEX_TX11
PEX_TX11
PEX_TX12
PEX_TX12
PEX_TX13
PEX_TX13
PEX_TX14
PEX_TX14
PEX_TX15
PEX_TX15
MIN_WIDTHMAX_CURRENTVOLTAGENET
12MIL
12MIL
2 OF 22
28-SEP-2008
16< 2>
Page 3
Page3: MEMORY: GPU Partition A/B
OUT
OUT
OUT
OUT
OUT
BI
3/24 MEM_B
FBB_CMD6
FBB_CMD4
FBB_CMD5
FBB_CMD3
FBB_CMD1
FBB_CMD2
FBB_CMD0
FBB_CMD7
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD19
FBB_CMD18
FBB_CMD17
FBB_CMD16
FBB_CMD14
FBB_CMD15
FBB_CMD13
FBB_CMD12
FBB_CMD11
FBB_CMD9
FBB_CMD10
FBB_CMD8
FBB_CLK1
FBB_CLK0
FBB_CLK0
FBB_CMD28
FBB_CLK1
RFU
RFU
FBB_DEBUG
FBCAL1_PD_VDDQ
FBCAL1_PU_GND
FBB_PLLVDD_NC
FBCAL1_TERM_GND
FBB_PLLGND
FBBD6
FBBD4
FBBD5
FBBD3
FBBD2
FBBD1
FBBD0
FBBD7
FBBD27
FBBD26
FBBD25
FBBD24
FBBD23
FBBD22
FBBD21
FBBD19
FBBD20
FBBD17
FBBD16
FBBD15
FBBD13
FBBD12
FBBD11
FBBD9
FBBD10
FBBD8
FBBD14
FBBD18
FBBD47
FBBD46
FBBD45
FBBD44
FBBD42
FBBD43
FBBD41
FBBD40
FBBD39
FBBD37
FBBD38
FBBD36
FBBD35
FBBD34
FBBD32
FBBD33
FBBD31
FBBD30
FBBD29
FBBD28
FBBD48
FBBDQM2
FBBDQM1
FBBDQM0
FBBD62
FBBD63
FBBD60
FBBD61
FBBD59
FBBD57
FBBD58
FBBD55
FBBD56
FBBD54
FBBD53
FBBD52
FBBD50
FBBD51
FBBD49
FBBDQS_RN6
FBBDQS_WP2
FBBDQS_WP1
FBBDQS_WP0
FBBDQS_RN7
FBBDQS_RN4
FBBDQS_RN5
FBBDQS_RN3
FBBDQS_RN2
FBBDQS_RN1
FBBDQS_RN0
FBBDQM7
FBBDQM6
FBBDQM4
FBBDQM5
FBBDQM3
FBBDQS_WP3
FB_VREF2
FBBDQS_WP7
FBBDQS_WP6
FBBDQS_WP5
FBBDQS_WP4
BI
OUT
OUT
OUT
OUT
OUT
OUTINOUTBIBIBIBI
2/24 MEM_A
FBA_CMD6
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD7
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD19
FBA_CMD18
FBA_CMD17
FBA_CMD16
FBA_CMD14
FBA_CMD15
FBA_CMD13
FBA_CMD12
FBA_CMD11
FBA_CMD9
FBA_CMD10
FBA_CMD8
FBA_CMD22
FBA_CMD21
FBA_CMD20
FBA_CMD28
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
RFU
RFU
FBA_DEBUG
FBCAL0_PU_GND
FBCAL0_TERM_GND
FBCAL0_PD_VDDQ
FBA_PLLAVDD
FBA_DLLAVDD
FBA_PLLGND
FBAD6
FBAD4
FBAD5
FBAD3
FBAD2
FBAD1
FBAD0
FBAD7
FBAD20
FBAD21
FBAD26
FBAD25
FBAD24
FBAD23
FBAD22
FBAD19
FBAD17
FBAD15
FBAD12
FBAD13
FBAD11
FBAD9
FBAD10
FBAD8
FBAD27
FBAD14
FBAD16
FBAD18
FBAD45
FBAD44
FBAD42
FBAD41
FBAD37
FBAD38
FBAD36
FBAD35
FBAD32
FBAD33
FBAD31
FBAD30
FBAD29
FBAD28
FBAD46
FBAD40
FBAD39
FBAD43
FBAD34
FBAD47
FBAD48
FBAD60
FBADQM2
FBADQM1
FBAD61
FBAD58
FBAD57
FBAD55
FBAD56
FBAD54
FBAD53
FBAD52
FBAD51
FBAD50
FBAD49
FBAD59
FBADQM0
FBAD63
FBAD62
FBADQS_WP2
FBADQS_RN7
FBADQS_RN5
FBADQS_RN3
FBADQS_RN2
FBADQM4
FBADQM3
FBADQS_RN6
FBADQS_RN4
FBADQM7
FBADQM6
FBADQM5
FBADQS_RN1
FBADQS_RN0
FBADQS_WP0
FBADQS_WP1
FBADQS_WP3
FBADQS_WP5
FBADQS_WP4
FBADQS_WP7
FBADQS_WP6
FB_VREF1
OUTINOUT
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
G1
G92-300-A1
BGA1148
AH35
AH36
AH34
AJ34
AK36
AJ36
AK34
AL34
AH32
AK33
AJ33
AH33
AL33
AN32
AN33
AN31
AE32
AF30
AF32
AE30
AE31
AC30
AC32
AD30
AG36
AG34
AF36
AD36
AD34
AD35
AE34
AP36
AN35
AM34
AP35
AP34
AP33
AT34
AR34
AM22
AM25
AN26
AN24
AK24
AL22
AK23
AM23
AT32
AT33
AR33
AP31
AR30
AT30
AP30
AT29
AP26
AP27
AT25
AP25
AR28
AP28
AT28
AP29
AK35
AF33
AF34
AN34
AM24
AP32
AR27
AL35
AK32
AG33
AE36
AM36
AN22
AR31
AT27
AL36
AL32
AG32
AE35
AN36
AN23
AT31
AT26
J29
COMMON
CALIBRATION PIN
FB_CALx_PD_VDDQ
FB_CALx_PU_GND
FB_CALx_TERM_GND
FBA_CMD<0>
AK28
FBA_CMD<1>
AK29
FBA_CMD<2>
AN30
FBA_CMD<3>
AM27
FBA_CMD<4>
AN28
FBA_CMD<5>
AL29
AM30
FBA_CMD<6>
FBA_CMD<7>
AJ31
FBA_CMD<8>
AK31
FBA_CMD<9>
AH31
FBA_CMD<10>
AK25
FBA_CMD<11>
AM26
FBA_CMD<12>
AL31
FBA_CMD<13>
AN29
FBA_CMD<14>
AK27
FBA_CMD<15>
AK26
FBA_CMD<16>
AN27
FBA_CMD<17>
AL25
FBA_CMD<18>
AJ30
FBA_CMD<19>
AM31
FBA_CMD<20>
AH30
FBA_CMD<21>
AL30
FBA_CMD<22>
AH29
FBA_CMD<23>
AL28
FBA_CMD<24>
AH28
FBA_CMD<25>
AM28
SNN_FBA_CMD_26AG30
SNN_FBA_CMD_27
AG28
SNN_FBA_CMD_28
AF28
FBA_CLK0AH26
FBA_CLK0*
AH27
FBA_CLK1
AJ29
FBA_CLK1*
AJ28
SNN_FBA_RFU0
AJ24
SNN_FBA_RFU1
AH24
FBA_DEBUG
AH25
FB_CAL_PD_VDDQ0
J28
FB_CAL_PU_GND0
H28
FB_CAL_TERM_GND0
H29
FBAB_PLLAVDD
AC29
AD29
AE29
GND
C700
.1UF
10V
10%
X5R
0402
DDR3
60
40
40
0.7 FBVDDQVREF RATIO
COMMON
GND
Place components as close
as possible to the pad
C672
.1UF
10V
10%
X5R
0402
NO STUFF
GND
FBA_D<63..0>
FBA_DQM<7..0>
FBA_DQS_RN<7..0>
FBA_DQS_WP<7..0>
FBVDD
R599
549
1%
0402
NO STUFF
R605
1.33K
1%
0402
NO STUFF
GND
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBA_D<0>
FBA_D<1>
FBA_D<2>
FBA_D<3>
FBA_D<4>
FBA_D<5>
FBA_D<6>
FBA_D<7>
FBA_D<8>
FBA_D<9>
FBA_D<10>
FBA_D<11>
FBA_D<12>
FBA_D<13>
FBA_D<14>
FBA_D<15>
FBA_D<16>
FBA_D<17>
FBA_D<18>
FBA_D<19>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_D<24>
FBA_D<25>
FBA_D<26> AG35
FBA_D<27>
FBA_D<28>
FBA_D<29>
FBA_D<30>
FBA_D<31>
FBA_D<32>
FBA_D<33>
FBA_D<34>
FBA_D<35>
FBA_D<36>
FBA_D<37>
FBA_D<38>
FBA_D<39>
FBA_D<40>
FBA_D<41>
FBA_D<42>
FBA_D<43>
FBA_D<44>
FBA_D<45>
FBA_D<46>
FBA_D<47>
FBA_D<48>
FBA_D<49>
FBA_D<50>
FBA_D<51>
FBA_D<52>
FBA_D<53>
FBA_D<54>
FBA_D<55>
FBA_D<56>
FBA_D<57>
FBA_D<58>
FBA_D<59>
FBA_D<60>
FBA_D<61>
FBA_D<62>
FBA_D<63>
FBA_DQM<0>
FBA_DQM<1> AM33
FBA_DQM<2>
FBA_DQM<3>
FBA_DQM<4>
FBA_DQM<5>
FBA_DQM<6>
FBA_DQM<7>
FBA_DQS_RN<0>
FBA_DQS_RN<1>
FBA_DQS_RN<2>
FBA_DQS_RN<3>
FBA_DQS_RN<4>
FBA_DQS_RN<5>
FBA_DQS_RN<6>
FBA_DQS_RN<7>
FBA_DQS_WP<0>
FBA_DQS_WP<1>
FBA_DQS_WP<2>
FBA_DQS_WP<3>
FBA_DQS_WP<4>
FBA_DQS_WP<5>
FBA_DQS_WP<6>
FBA_DQS_WP<7>
FB_VREF1
9<> 5<>
9> 5<>
9< 5<>
9> 5<>
9<>
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
C688
.1UF
10V
10%
X5R
0402
COMMON
0
1
2
3
4
5
6
7
8
9
FBA_CMD<28..0>
FBVDD
R619
60.4
1%
0402
NO STUFF
5<
5<
5<
9> 5<
9>
9>
9>
9> 5<
136BGA CMD Mapping
ADDRCMD
A<4>
CMD0
RAS*CMD1
A<5>
CMD2
BA1
CMD3
A<2>
CMD4
A<4>
CMD5
A<3>
CMD6
BA2
CMD7
CS0*
CMD8
A<11>
CMD9
CAS*
CMD10
CMD11 WE*
BA0
CMD12
A<5>
CMD13
A<12>
CMD14
RST
CMD15
A<7>
CMD16
A<10>
CMD17
CKE
CMD18
A<0>
CMD19
A<9>
CMD20
A<6>
CMD21
A<2>
CMD22
A<8>
CMD23
A<3>
CMD24
A<1>
CMD25
A<13>
CMD26
BA2
CMD27
N/A
CMD28
6<> 9<>
9> 6<>
9<>
FBVDD
60.4
9<>
R613
0402
R610
0402
R601
0402
COMMON
1%
40.2
COMMON
1%
40.2
COMMON
1%
GND
1V2
9<
9>
6<>
6<>
9<>
240R@100MHz
LB501
COMMONBEAD_0402
C715
C699
4.7UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0402
COMMON
COMMON
Place these components within
750 mils of the pad
C752
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
MEMORY: GPU Partition A/B
www.vinafix.vn
FBB_D<63..0>
FBB_DQM<7..0>
FBB_DQS_RN<7..0>
FBB_DQS_WP<7..0>
C689
.1UF
10V
10%
X5R
0402
NO STUFF
GND
FBVDD
GND
R614
549
1%
0402
NO STUFF
R611
1.33K
1%
0402
NO STUFF
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBB_D<0>
0
FBB_D<1>
1
FBB_D<2>
2
FBB_D<3>
3
FBB_D<4>
4
FBB_D<5>
5
FBB_D<6>
6
FBB_D<7>
7
FBB_D<8>
8
FBB_D<9>
9
FBB_D<10>
10
FBB_D<11>
11
FBB_D<12>
12
FBB_D<13>
13
FBB_D<14>
14
FBB_D<15>
15
FBB_D<16>
16
FBB_D<17>
17
FBB_D<18>
18
FBB_D<19>
19
FBB_D<20>
20
FBB_D<21>
21
FBB_D<22>
22
FBB_D<23>
23
FBB_D<24>
24
FBB_D<25>
25
FBB_D<26>
26
FBB_D<27>
27
FBB_D<28>
28
FBB_D<29>
29
FBB_D<30>
30
FBB_D<31>
31
FBB_D<32>
32
FBB_D<33>
33
FBB_D<34>
34
FBB_D<35>
35
FBB_D<36>
36
FBB_D<37>
37
FBB_D<38>
38
FBB_D<39>
39
FBB_D<40>
40
FBB_D<41>
41
FBB_D<42>
42
FBB_D<43>
43
FBB_D<44>
44
FBB_D<45>
45
FBB_D<46>
46
FBB_D<47>
47
FBB_D<48>
48
FBB_D<49>
49
FBB_D<50>
50
FBB_D<51>
51
FBB_D<52>
52
FBB_D<53>
53
FBB_D<54>
54
FBB_D<55>
55
FBB_D<56>
56
FBB_D<57>
57
FBB_D<58>
58
FBB_D<59>
59
FBB_D<60>
60
FBB_D<61>
61
FBB_D<62>
62
FBB_D<63>
63
FBB_DQM<0>
FBB_DQM<1>
FBB_DQM<2>
FBB_DQM<3>
FBB_DQM<4>
FBB_DQM<5>
FBB_DQM<6>
FBB_DQM<7>
FBB_DQS_RN<0>
FBB_DQS_RN<1>
FBB_DQS_RN<2>
FBB_DQS_RN<3>
FBB_DQS_RN<4>
FBB_DQS_RN<5>
FBB_DQS_RN<6>
FBB_DQS_RN<7>
FBB_DQS_WP<0>
FBB_DQS_WP<1>
FBB_DQS_WP<2>
FBB_DQS_WP<3>
FBB_DQS_WP<4>
FBB_DQS_WP<5>
FBB_DQS_WP<6>
FBB_DQS_WP<7>
FB_VREF2
G1
G92-300-A1
BGA1148
COMMON
G36
G35
H36
H34
J35
J34
K34 T30
K35
J31
K32
J30
H30
L32
K30
M31
L30
G31
J32
J33
F33
H31
E33
F31
F32
F35
G34
F36
F34
C35
D34
C36
D35
N35
M34
L34
N36
P36
P34
R36
R34
AC33
Y33
Y30
AB30
AA32
AD32
AD33
AA33
T36
R35
T34
U36
W35
U34
V34
W36
AC36
AA36
AC34
AB34
AA35
Y34
Y36
W34
J36
M32
H33
E34
N34
Y32
T35
AA34
L36
K33
G32
E36
M36
AB32
V35
AB35
K36
L33
G33
D36
M35
AB31
V36
AB36
J27
FBB_CMD<0>
P33
FBB_CMD<1>
N33
FBB_CMD<2>
R31
FBB_CMD<3>
U33
FBB_CMD<4>
V30
FBB_CMD<5>
T33
FBB_CMD<6>
FBB_CMD<7>
N32
FBB_CMD<8>
R32
FBB_CMD<9>
P32
FBB_CMD<10>
U32
FBB_CMD<11>
U30
FBB_CMD<12>
P30
FBB_CMD<13>
V31
FBB_CMD<14>
T28
FBB_CMD<15>
W30
FBB_CMD<16>
V32
FBB_CMD<17>
T32
FBB_CMD<18>
N30
FBB_CMD<19>
P28
FBB_CMD<20>
P29
FBB_CMD<21>
U29
FBB_CMD<22>
N28
FBB_CMD<23>
R30
FBB_CMD<24>
M30
FBB_CMD<25>
T29
SNN_FBB_CMD_26
N29
SNN_FBB_CMD_27
AA30
SNN_FBB_CMD_28
Y29
FBB_CLK0
M28
FBB_CLK0*
L28
FBB_CLK1
W31
FBB_CLK1*
W32
SNN_FBB_RFU0
R28
SNN_FBB_RFU1
K29
FBB_DEBUG
C34
FB_CAL_PD_VDDQ1
H27
FB_CAL_PU_GND1
H26
FB_CAL_TERM_GND1
J26
SNN_FBB_PLLVDD_NC
AB28
AC28
GND
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
FBB_CMD<28..0>
6<
6<
6<
6<
FBVDD
R600
60.4
1%
0402
NO STUFF
9>
9>
9>
9>
6< 9>
9<>
60.4
R602
COMMON
0402
1%
40.2
R609
COMMON
0402
1%
40.2
R604
COMMON
0402
1%
600-10363-0000-100 A
p363_a01
donchen
FBVDD
GND
3 OF 22
28-SEP-2008
Page 4
Page4: MEMORY: GPU Partition C/D
OUT
OUT
OUT
OUT
OUT
BI
5/24 MEM_D
FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD5
FBD_CMD4
FBD_CMD6
FBD_CMD7
FBD_CMD21
FBD_CMD20
FBD_CMD19
FBD_CMD8
FBD_CMD10
FBD_CMD9
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD23
FBD_CMD22
FBD_CMD27
FBD_CMD26
FBD_CMD25
FBD_CMD24
FBD_CLK1
FBD_CLK1
FBD_CLK0
FBD_CLK0
FBD_CMD28
RFU
RFU
FBD_DEBUG
FBD_PLLVDD_NC
FBD_PLLGND
FBDD0
FBDD1
FBDD2
FBDD3
FBDD4
FBDD5
FBDD6
FBDD7
FBDD9
FBDD21
FBDD25
FBDD8
FBDD10
FBDD11
FBDD12
FBDD13
FBDD15
FBDD14
FBDD16
FBDD17
FBDD18
FBDD20
FBDD19
FBDD22
FBDD23
FBDD24
FBDD26
FBDD27
FBDD28
FBDD29
FBDD30
FBDD31
FBDD33
FBDD32
FBDD36
FBDD35
FBDD38
FBDD37
FBDD40
FBDD41
FBDD39
FBDD42
FBDD43
FBDD44
FBDD45
FBDD46
FBDD47
FBDD34
FBDD48
FBDD57
FBDD58
FBDD59
FBDD60
FBDD49
FBDD50
FBDD51
FBDD52
FBDD53
FBDD54
FBDD56
FBDD55
FBDD61
FBDD62
FBDD63
FBDDQM0
FBDDQM2
FBDDQM1
FBDDQM3
FBDDQM5
FBDDQM4
FBDDQM6
FBDDQM7
FBDDQS_RN0
FBDDQS_RN1
FBDDQS_RN2
FBDDQS_RN3
FBDDQS_RN6
FBDDQS_RN4
FBDDQS_RN7
FBDDQS_WP0
FBDDQS_WP1
FBDDQS_WP2
FBDDQS_RN5
FBDDQS_WP3
FBDDQS_WP4
FBDDQS_WP5
FBDDQS_WP6
FBDDQS_WP7
BI
OUT
OUT
OUT
OUT
OUT
OUTINOUTBIBI
BI
4/24 MEM_C
FBC_CMD6
FBC_CMD5
FBC_CMD4
FBC_CMD3
FBC_CMD2
FBC_CMD1
FBC_CMD0
FBC_CMD7
FBC_CMD24
FBC_CMD25
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD20
FBC_CMD19
FBC_CMD18
FBC_CMD17
FBC_CMD16
FBC_CMD15
FBC_CMD14
FBC_CMD13
FBC_CMD12
FBC_CMD11
FBC_CMD10
FBC_CMD9
FBC_CMD8
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CLK1
FBC_CLK1
FBC_CLK0
FBC_CLK0
RFU
RFU
FBC_DEBUG
FBC_DLLAVDD
FBC_PLLAVDD
FBC_PLLVDD_NC
FBC_PLLGND
FBCD5
FBCD3
FBCD1
FBCD6
FBCD4
FBCD2
FBCD0
FBCD7
FBCD16
FBCD19
FBCD27
FBCD26
FBCD25
FBCD22
FBCD23
FBCD20
FBCD13
FBCD9
FBCD8
FBCD14
FBCD15
FBCD17
FBCD12
FBCD24
FBCD21
FBCD18
FBCD11
FBCD10
FBCD29
FBCD28
FBCD33
FBCD35
FBCD47
FBCD45
FBCD46
FBCD44
FBCD43
FBCD42
FBCD39
FBCD41
FBCD40
FBCD37
FBCD32
FBCD30
FBCD36
FBCD34
FBCD31
FBCD38
FBCD48
FBCD60
FBCD63
FBCDQM0
FBCDQM2
FBCDQM1
FBCD62
FBCD61
FBCD57
FBCD58
FBCD59
FBCD55
FBCD56
FBCD53
FBCD54
FBCD51
FBCD50
FBCD49
FBCD52
FBCDQM5
FBCDQM4
FBCDQM6
FBCDQM7
FBCDQS_RN0
FBCDQS_RN1
FBCDQS_RN2
FBCDQS_RN4
FBCDQS_RN5
FBCDQS_RN6
FBCDQS_RN7
FBCDQS_WP0
FBCDQS_WP1
FBCDQS_WP2
FBCDQS_RN3
FBCDQM3
FBCDQS_WP3
FBCDQS_WP4
FBCDQS_WP5
FBCDQS_WP6
FBCDQS_WP7
OUTINOUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
G1
G92-300-A1
BGA1148
C18
C17
A17
B16
C14
A16FBC_D<5>
C15
A14
A18
A19
B19
B18
B21
C19
B22
C21
E15
D16
D17
G16
E16
E14
G13
D13
A22
C22
A23
A24
C24
C25
B24
C28
B27
C27
B28
C29
A29
B30
A30
E31
E28
D28
F29
F30
D33
D32
D31
G27
F25
G26
D26
G29
G28
E27
F28
A34
C32
B34
C33
C31
B31
A31
C30
C16
G14
C26
A28
D29
D27
B33
B15
A21
D14
B25
A27
E30
E25
A33
A15
A20
E13
A25
A26
D30
E26
A32
COMMON
H20
E18
E20
D23
G24
D24
G23
D20
E22
J21
E21
G20
F22
H21
E17
E19
D21
E23
F19
E24
G21
G19
G25
G18
G22
F15
G15
H17
J16
J24
H23
H24
J25
H16
H13
J12
J13
GND
FBC_CMD<0>F18
FBC_CMD<1>
FBC_CMD<2>
FBC_CMD<3>
FBC_CMD<4>
FBC_CMD<5>
FBC_CMD<6>
FBC_CMD<7>
FBC_CMD<8>
FBC_CMD<9>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<12>
FBC_CMD<13>
FBC_CMD<14>
FBC_CMD<15>
FBC_CMD<16>
FBC_CMD<17>
FBC_CMD<18>
FBC_CMD<19>
FBC_CMD<20>
FBC_CMD<21>
FBC_CMD<22>
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
SNN_FBC_CMD_26G17
SNN_FBC_CMD_27
SNN_FBC_CMD_28
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
SNN_FBC_RFU0
SNN_FBC_RFU1
FBC_DEBUG
SNN_FBC_PLLVDD_NC
FBCD_PLLAVDDJ11
C824
.1UF
10V
10%
X5R
0402
COMMON
Place components as close
as possible to the pad
FBC_D<63..0>
FBC_DQM<7..0>
FBC_DQS_RN<7..0>
FBC_DQS_WP<7..0>
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBC_D<0>
FBC_D<1>
FBC_D<2>
FBC_D<3>
FBC_D<4>
FBC_D<6>
FBC_D<7>
FBC_D<8>
FBC_D<9>
FBC_D<10>
FBC_D<11>
FBC_D<12>
FBC_D<13>
FBC_D<14>
FBC_D<15>
FBC_D<16>
FBC_D<17>
FBC_D<18>
FBC_D<19>
FBC_D<20>
FBC_D<21>
FBC_D<22>
FBC_D<23>
FBC_D<24>
FBC_D<25>
FBC_D<26> C23
FBC_D<27>
FBC_D<28>
FBC_D<29>
FBC_D<30>
FBC_D<31>
FBC_D<32>
FBC_D<33>
FBC_D<34>
FBC_D<35>
FBC_D<36>
FBC_D<37>
FBC_D<38>
FBC_D<39>
FBC_D<40>
FBC_D<41>
FBC_D<42>
FBC_D<43>
FBC_D<44>
FBC_D<45>
FBC_D<46>
FBC_D<47>
FBC_D<48>
FBC_D<49>
FBC_D<50>
FBC_D<51>
FBC_D<52>
FBC_D<53>
FBC_D<54>
FBC_D<55>
FBC_D<56>
FBC_D<57>
FBC_D<58>
FBC_D<59>
FBC_D<60>
FBC_D<61>
FBC_D<62>
FBC_D<63>
FBC_DQM<0>
FBC_DQM<1> C20
FBC_DQM<2>
FBC_DQM<3>
FBC_DQM<4>
FBC_DQM<5>
FBC_DQM<6>
FBC_DQM<7>
FBC_DQS_RN<0>
FBC_DQS_RN<1>
FBC_DQS_RN<2>
FBC_DQS_RN<3>
FBC_DQS_RN<4>
FBC_DQS_RN<5>
FBC_DQS_RN<6>
FBC_DQS_RN<7>
FBC_DQS_WP<0>
FBC_DQS_WP<1>
FBC_DQS_WP<2>
FBC_DQS_WP<3>
FBC_DQS_WP<4>
FBC_DQS_WP<5>
FBC_DQS_WP<6>
FBC_DQS_WP<7>
9<> 7<>
9> 7<>
9< 7<>
9> 7<>
GND
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
FBVDD
C814
.1UF
10V
10%
X5R
0402
COMMON
FBC_CMD<28..0>
7<
7<
7<
7<
R621
60.4
1%
0402
NO STUFF
9>
9>
9>
9>
9> 7<
136BGA CMD Mapping
ADDR
CMD
A<4>
CMD0
CMD1 RAS*
A<5>
CMD2
BA1
CMD3
A<2>
CMD4
A<4>
CMD5
A<3>
CMD6
BA2
CMD7
CS0*
CMD8
A<11>
CMD9
CAS*
CMD10
CMD11 WE*
BA0
CMD12
A<5>
CMD13
A<12>
CMD14
RST
CMD15
A<7>
CMD16
A<10>
CMD17
CKE
CMD18
A<0>
CMD19
A<9>
CMD20
A<6>
CMD21
A<2>CMD22
A<8>
CMD23
A<3>
CMD24
A<1>
CMD25
A<13>
CMD26
BA2
CMD27
N/A
CMD28
8<> 9<>
9> 8<>
9<>
8<>
9<
8<>
9<>
240R@100MHz
LB503
C805
C827
4.7UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0402
COMMON
COMMON
Place these components within
750 mils of the pad
BEAD_0402
COMMON
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
MEMORY: GPU Partition C/D
9>
1V2
C785
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
www.vinafix.vn
FBD_D<63..0>
FBD_DQM<7..0>
FBD_DQS_RN<7..0>
FBD_DQS_WP<7..0>
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBD_D<0>
0
FBD_D<1>
1
FBD_D<2>
2
FBD_D<3>
3
FBD_D<4>
4
FBD_D<5>
5
FBD_D<6>
6
FBD_D<7>
7
FBD_D<8>
8
FBD_D<9>
9
FBD_D<10>
10
FBD_D<11>
11
FBD_D<12>
12
FBD_D<13>
13
FBD_D<14>
14
FBD_D<15>
15
FBD_D<16>
16
FBD_D<17>
17
FBD_D<18>
18
FBD_D<19>
19
FBD_D<20>
20
FBD_D<21>
21
FBD_D<22>
22
FBD_D<23>
23
FBD_D<24>
24
FBD_D<25>
25
FBD_D<26>
26
FBD_D<27>
27
FBD_D<28>
28
FBD_D<29>
29
FBD_D<30>
30
FBD_D<31>
31
FBD_D<32>
32
FBD_D<33>
33
FBD_D<34>
34
FBD_D<35>
35
FBD_D<36>
36
FBD_D<37>
37
FBD_D<38>
38
FBD_D<39>
39
FBD_D<40>
40
FBD_D<41>
41
FBD_D<42>
42
FBD_D<43>
43
FBD_D<44>
44
FBD_D<45>
45
FBD_D<46>
46
FBD_D<47>
47
FBD_D<48>
48
FBD_D<49>
49
FBD_D<50>
50
FBD_D<51>
51
FBD_D<52>
52
FBD_D<53>
53
FBD_D<54>
54
FBD_D<55>
55
FBD_D<56>
56
FBD_D<57>
57
FBD_D<58>
58
FBD_D<59>
59
FBD_D<60>
60
FBD_D<61>
61
FBD_D<62>
62
FBD_D<63>
63
FBD_DQM<0>
FBD_DQM<1>
FBD_DQM<2>
FBD_DQM<3>
FBD_DQM<4>
FBD_DQM<5>
FBD_DQM<6>
FBD_DQM<7>
FBD_DQS_RN<0>
FBD_DQS_RN<1>
FBD_DQS_RN<2>
FBD_DQS_RN<3>
FBD_DQS_RN<4>
FBD_DQS_RN<5>
FBD_DQS_RN<6>
FBD_DQS_RN<7>
FBD_DQS_WP<0>
FBD_DQS_WP<1>
FBD_DQS_WP<2>
FBD_DQS_WP<3>
FBD_DQS_WP<4>
FBD_DQS_WP<5>
FBD_DQS_WP<6>
FBD_DQS_WP<7>
G1
G92-300-A1
BGA1148
COMMON
H3
J3
J1
J2
M3
K3
L3 F8
M1
H1
G3
G1
G2
F3
E1
D1
D2
P4
N7
M7
N5
P5
R7
T7
P7
C1
C5
C2
B4
A3
B3
C4
C3
A8
C6
C7
A7
C8
C9
A9
B9
E12
E9
F9
G10
D10
G12
F12
D11
F4
E4
D4
D5
D8
E7
D7
D9
B13
C11
A13
C13
A11
A10
B10
C10
K2
E3
N4
D3
B7
G11
F5
C12
K1
F2
R6
A4
B6
E10
E6
A12
L1
F1
R5
A5
A6
E11
D6
B12
FBD_CMD<0>
M6
FBD_CMD<1>
G5
FBD_CMD<2>
L7
FBD_CMD<3>
K5
FBD_CMD<4>
J10
FBD_CMD<5>
G8
FBD_CMD<6>
FBD_CMD<7>
G6
FBD_CMD<8>
H6
FBD_CMD<9>
F6
FBD_CMD<10>
K8
FBD_CMD<11>
L5
FBD_CMD<12>
H4
FBD_CMD<13>
G4
FBD_CMD<14>
K9
FBD_CMD<15>
L4
FBD_CMD<16>
K4
FBD_CMD<17>
K7
FBD_CMD<18>
G7
FBD_CMD<19>
J4
FBD_CMD<20>
F7
FBD_CMD<21>
J5
FBD_CMD<22>
J6
FBD_CMD<23>
H7
FBD_CMD<24>
L8
FBD_CMD<25>
J7
SNN_FBD_CMD_26
M5
SNN_FBD_CMD_27
H9
SNN_FBD_CMD_28
G9
FBD_CLK0
L9
FBD_CLK0*
M9
FBD_CLK1
J9
FBD_CLK1*
J8
SNN_FBD_RFU0
H10
SNN_FBD_RFU1
L11
FBD_DEBUG
N8
SNN_FBD_PLLVDD_NC
H11
H12
GND
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
FBVDD
FBD_CMD<28..0>
9>
8<
9>
8<
9>
8<
9>
8<
R630
60.4
1%
0402
NO STUFF
8< 9>
9<>
600-10363-0000-100 A
p363_a01
donchen
4 OF 22
28-SEP-2008
Page 5
Page5: FBA Partition
OUT
OUT
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
ININININOUT
OUT
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININ
IN
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
136BGA CMD Mapping
ADDR
RAS*
CAS*
WE*
CS0*
BA2
BA0
BA1
A<12>
A<0>
A<1>
0A<2>
0A<3>
0A<4>
0A<5>
1A<2>
1A<3>
1A<4>
1A<5>
A<6>
A<8>
A<9>
A<10>
A<11>
CKE
RST
136MAP
CMD1
CMD10
CMD11
CMD8
CMD7
CMD12
CMD3
CMD14
CMD19
CMD25
CMD22
CMD24
CMD0
CMD2
CMD4
CMD6
CMD5
CMD13
CMD21
CMD16A<7>
CMD23
CMD20
CMD17
CMD9
CMD18
CMD15
3>
9>
3>
9>
FBVDD
R556
121
1%
0402
NO STUFF
FBA_CLK0_MIDPT
Clock Term MUST BE PLACED as close
as possible to the BGA memory on
the line AFTER the memory pin!
Minimize STUB length!
3> 5< 9>
R558 R559
243
1%
0402
COMMON
GND
FBA_CMD<28..0>
243
1%
0402
COMMON
C549
.01UF
25V
10%
X7R
0402
COMMON
GND
9<>
R569
0
5%
0402
COMMON
1
10
11
8
19
25
22
24
0
2
21
16
23
20
17
9
12
3
7
18
14
15
FBVDD
R564
10K
5%
0402
COMMON
GND
FBA_DEBUG_SEN0
C60
.047UF
16V
10%
X7R
0402
COMMON
FBA_CMD<1>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<8>
FBA_CMD<19>
FBA_CMD<25>
FBA_CMD<22>
FBA_CMD<24>
FBA_CMD<0>
FBA_CMD<2>
FBA_CMD<21>
FBA_CMD<16>
FBA_CMD<23>
FBA_CMD<20>
FBA_CMD<17>
FBA_CMD<9>
FBA_CMD<12>
FBA_CMD<3>
FBA_CMD<7>
FBA_CMD<18>
FBA_CLK0
FBA_CLK0*
SNN_FBA_NC0
FBA_CMD<14>
FBA_CMD<15>
GND
FBA_ZQ0
R557
10K
5%
0402
COMMON
GND
C586
.047UF
16V
10%
X7R
0402
COMMON
R73
243
1%
0402
COMMON
H11
K10
K11
H10
J11
J10
K12
J12
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
H3
F4
H9
F9
K4
H2
K3
M4
K9
L9
M9
K2
L4
G4
G9
H4
J2
J3
V4
V9
A9
A4
K1
J1
1%
1%
1%
1%
1%
1%
1%
1%
121
COMMON
121
COMMON
121
COMMON
121
COMMON
121
COMMON
121
COMMON
121
COMMON
121
COMMON
R573
549
0402
COMMON
R575
1.33K
COMMON
FBVDD
1%
1%
GND
FBVDD
R1
R2
C607
.1UF
10V
10%10%
X5R
0402
COMMON
9<>
FBVDD
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBA_VREF0
FBA_VREF2
FBVDD
GND
GND
R570
549
0402
COMMON
R579
1.33K
COMMON
FBVDD
1%
1%
GND
136BGA CMD Mapping
136MAPADDR
CMD1
RAS*
CMD10
CAS*
CMD11
WE*
CMD8
CS0*
CMD7
BA2
CMD12
BA0
CMD3
BA1
CMD14
A<12>
CMD19
A<0>
CMD25
A<1>
CMD22
0A<2>
CMD24
0A<3>
CMD0
0A<4>
CMD2
0A<5>
CMD4
1A<2>
CMD6
1A<3>
CMD5
1A<4>
CMD13
1A<5>
CMD21
A<6>
CMD16
A<7>
CMD23A<8>
CMD20
A<9>
CMD17
A<10>
CMD9
A<11>
CMD18
CKE
CMD15
RST
FBVDD
Clock Term MUST BE PLACED as close
as possible to the BGA memory on
the line AFTER the memory pin!
Minimize STUB length!
FBVDD
R78
549
R1
9<>
C606
.1UF
R2
10V
10% 10%
X5R
0402
COMMON
0402
COMMON
R81
1.33K
04020402
COMMON
R1
1%
R2
1%
GND
VREF = 0.70 * FBVDDQGDDR3:
1.41V = 2.0V * 1.33K/(549 + 1.33K)
R585
121
1%
0402
NO STUFF
C58
.1UF
10V
X5R
0402
COMMON
3>
9>
3>
9>
FBA_CLK1_MIDPT
9<>
R587
243
0402
COMMON
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R74
243
1%
0402
COMMON
H11
K10
K11
H10
J11
J10
K12
J12
CHANGED
H3
F4
H9
F9
K4
H2
K3
M4
K9
L9
M9
K2
L4
G4
G9
H4
J2
J3
V4
V9
A9
A4
K1
J1
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBVDD
R586
243
0402
COMMON
C619
.01UF
25V
10%
X7R
0402
COMMON
1%
FBA_CMD<28..0>
FBVDD
9<>
7
8
18
10
5
13
21
20
19
25
4
9
17
6
23
16
3
12
1
11
14
15
FBA_CMD<7>
FBA_CMD<8>
FBA_CMD<18>
FBA_CMD<10>
FBA_CMD<5>
FBA_CMD<13>
FBA_CMD<21>
FBA_CMD<20>
FBA_CMD<19>
FBA_CMD<25>
FBA_CMD<4>
FBA_CMD<9>
FBA_CMD<17>
FBA_CMD<6>
FBA_CMD<23>
FBA_CMD<16>
FBA_CMD<3>
FBA_CMD<12>
FBA_CMD<1>
FBA_CMD<11>
FBA_CLK1
FBA_CLK1*
SNN_FBA_NC1
FBA_CMD<14>
FBA_DEBUG_SEN1
FBA_CMD<15>
FBA_ZQ1
3> 5< 9>
1%
GND
R75
0
5%
0402
COMMON
GND
GND
FBVDD
C568
.047UF
16V
10%
X7R
0402
COMMON
C61
.047UF
16V
10%
X7R
0402
COMMON
GND
FBA_VREF1
FBA_VREF3
FBVDD
FBVDD
GND
GND
FBA_CMD<4>
FBA_CMD<6>
FBA_CMD<5>
FBA_CMD<13>
FBA_CMD<22>
FBA_CMD<24>
FBA_CMD<0>
FBA_CMD<2>
VREF = 0.70 * FBVDDQGDDR3:
1.41V = 2.0V * 1.33K/(549 + 1.33K)
R581
0402
R571
0402
R563
0402
R560
0402
R572
0402
R580
0402
R568
0402
R562
0402
FBVDD
R82
549
R1
1%
0402
COMMON
R80
1.33K
R2
1%
0402 0402
COMMON
C57
.1UF
10V
X5R
0402
COMMON
9<>
GND
9>
9<
3<>
3>
3<
3> 9>
FBA_D<63..0>
FBA_DQM<7..0>
FBA_DQS_RN<7..0>
FBA_DQS_WP<7..0>
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
G3
F2
F3
E2
B3
B2
C3
C2
E3
D3
D2
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
N2
M3
M2
T3
R2
R3
T2
N3
P3
P2FBA_DQS_WP<7>
C11
F10
C10
G10
F11
B11
B10
E11
E10
D10
D11
E11
F10
G10
F11
B10
B11
C11
C10
E10
D10
D11
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_DQM<3>
FBA_DQS_RN<3>
FBA_DQS_WP<3>
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59> L3
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DQM<7>
FBA_DQS_RN<7>
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
FBA Partition
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
FBA_D<0>
0
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_DQM<0>
0
FBA_DQM<1>
1
FBA_DQM<2>
2
FBA_DQM<3>
3
FBA_DQM<4>
4
FBA_DQM<5>
5
FBA_DQM<6>
6
FBA_DQM<7>
7
FBA_DQS_RN<0>
0
FBA_DQS_RN<1>
1
FBA_DQS_RN<2>
2
FBA_DQS_RN<3>
3
FBA_DQS_RN<4>
4
FBA_DQS_RN<5>
5
FBA_DQS_RN<6>
6
FBA_DQS_RN<7>
7
FBA_DQS_WP<0>
0
FBA_DQS_WP<1>
1
FBA_DQS_WP<2>
2
FBA_DQS_WP<3>
3
FBA_DQS_WP<4>
4
FBA_DQS_WP<5>
5
FBA_DQS_WP<6>
6
FBA_DQS_WP<7>
7
5
6
7
32
33
34
35
36
37
38
39
FBA_D<5>
FBA_D<6>
FBA_D<7>
FBA_DQM<0>
FBA_DQS_RN<0>
FBA_DQS_WP<0>
FBA_D<32>
FBA_D<33>
FBA_D<34>
FBA_D<35>
FBA_D<36>
FBA_D<37>
FBA_D<38>
FBA_D<39>
FBA_DQM<4>
FBA_DQS_RN<4>
FBA_DQS_WP<4>
N2
M3
L3
M2
T2
R3
R2
T3
N3
P3
P2
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
T11
R10
T10
R11
N11
M11
L10
M10
N10
P10
P11
8
9
10
11
12
13
14
15
40
41
42
43
44
45
46
47
FBA_D<8>
FBA_D<9>
FBA_D<10>
FBA_D<11>
FBA_D<12>
FBA_D<13>
FBA_D<14>
FBA_D<15>
FBA_DQM<1>
FBA_DQS_RN<1>
FBA_DQS_WP<1>
FBA_D<40>
FBA_D<41>
FBA_D<42>
FBA_D<43>
FBA_D<44>
FBA_D<45>
FBA_D<46>
FBA_D<47>
FBA_DQM<5>
FBA_DQS_RN<5>
FBA_DQS_WP<5>
M6
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
L10
M10
M11
N11
R10
T11
R11
T10
N10
P10
P11
M7
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
B2
F3
G3
F2
B3
C2
C3
E2
E3
D3
D2
16
17
18
19
20
21
22
23
48
49
50
51
52
53
54
55
FBA_D<16>
FBA_D<17>
FBA_D<18>
FBA_D<19>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_DQM<2>
FBA_DQS_RN<2>
FBA_DQS_WP<2>
FBA_D<48>
FBA_D<49>
FBA_D<50>
FBA_D<51>
FBA_D<52>
FBA_D<53>
FBA_D<54>
FBA_D<55>
FBA_DQM<6>
FBA_DQS_RN<6>
FBA_DQS_WP<6>
www.vinafix.vn
9<>
Decoupling
for FBA Lo
Decoupling
for FBA Hi
FBVDD
C582
.1UF
10V
10%
X5R
0402
COMMON
C601
1UF
16V
10%
X5R
0603
COMMON
C550
4.7UF
6.3V
10%
X5R
0805
COMMON
C562
.1UF
10V
10%
X5R
0402
COMMON
C573
1UF
16V
10%
X5R
0603
COMMON
C617
4.7UF
6.3V
10%
X5R
0805
COMMON
C589
.1UF
10V
10%
X5R
0402
COMMON
C579
1UF
16V
10%
X5R
0603
COMMON
C608
4.7UF
6.3V
10%
X5R
0805
COMMON
C600
.1UF
10V
10%
X5R
0402
COMMON
C592
1UF
16V
10%
X5R
0603
COMMON
C548
4.7UF
6.3V
10%
X5R
0805
COMMON
C551
C580
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C603
C590
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603 0603
COMMON
COMMON
C547
4.7UF
6.3V
10%
X5R
0805
COMMON
C567
C597
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
04020402
COMMON
COMMON
C555C621
1UF
1UF
16V
16V
10%
10%
X5R
X5R
06030603
COMMON
COMMON
C584
4.7UF
6.3V
10%
X5R
0805
COMMON
C596
.1UF
10V
10%
X5R
0402
Place 1uF caps at
center of memory
C581
.1UF
10V
10%
X5R
0402
NO STUFF
C561
.1UF
10V
10%
X5R
0402
COMMON
Place 1uF caps at
center of memory
C613
.1UF
10V
10%
X5R
0402
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMONCOMMON
C557
C558
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
NO STUFF
NO STUFF
C588
C577
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C611
C564
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
NO STUFF
NO STUFFNO STUFF
600-10363-0000-100 A
p363_a01
donchen
C559
C610
C614
.1UF
10V
10%
X5R
0402
COMMON
C591
.1UF
10V
10%
X5R
0402
NO STUFF
C602
.1UF
10V
10%
X5R
0402
COMMON
C552
.1UF
10V
10%
X5R
0402
NO STUFF
C560
.1UF
10V
10%
X5R
0402
COMMON
C612
.1UF
10V
10%
X5R
0402
NO STUFF
C556
.1UF
10V
10%
X5R
0402
COMMON
C563
.1UF
10V
10%
X5R
0402
NO STUFF
C615
.1UF
10V
10%
X5R
0402
COMMON
C594
.1UF
10V
10%
X5R
0402
NO STUFF
C605
.1UF
10V
10%
X5R
0402
COMMON
C578
.1UF
10V
10%
X5R
0402
NO STUFF
5 OF 22
28-SEP-2008
GND
GND
GND
GND
GND
GND
Page 6
R574
OUT
OUT
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
ININININOUT
OUT
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININ
IN
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
0402
R582
0402
R566
0402
R561
0402
R598
0402
R595
0402
R594
0402
R593
0402
COMMON
1.33K
COMMON
R567
549
0402
R565
1%
1%
1%
1%
1%
1%
1%
1%
FBVDD
1%
1%
GND
121
COMMON
121
COMMON
121
COMMON
121
COMMON
121
COMMON
121
COMMON
121
COMMON
121
COMMON
R1
R2
FBVDD
C595
.1UF
10V
10%10%
X5R
0402
COMMON
9<>
Page6: FBB Partition
136BGA CMD Mapping
ADDR
RAS*
CAS*
WE*
CS0*
BA2
BA0
BA1
A<12>
A<0>
A<1>
0A<2>
0A<3>
0A<5>
1A<2>
1A<3>
1A<4>
1A<5>
A<6> CMD21
A<7>
A<8>
A<9>
A<10>
A<11>
CKE
RST
136MAP
CMD1
CMD10
CMD11
CMD8
CMD7
CMD12
CMD3
CMD14
CMD19
CMD25
CMD22
CMD24
CMD00A<4>
CMD2
CMD4
CMD6
CMD5
CMD13
CMD16
CMD23
CMD20
CMD17
CMD9
CMD18
CMD15
FBVDD
R590
121
1%
0402
NO STUFF
Clock Term MUST BE PLACED as close
as possible to the BGA memory on
the line AFTER the memory pin!
Minimize STUB length!
3> 9>
3> 9>
R592
COMMON
FBB_CLK0_MIDPT
243
0402
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
R70
243
1%
0402
COMMON
H11
K10
K11
H10
J11
J10
H3
F4
H9
F9
K4
H2
K3
M4
K9
L9
M9
K2
L4
G4
G9
H4
J2
J3
V4
V9
A9
A4
VERSION=BGA136
CHANGED
R591
243
0402
COMMON
C627
.01UF
25V
10%
X7R
0402
COMMON
1%
GND
FBB_CMD<28..0>
9<>
R589
0
5%
0402
1
10
11
8
19
25
22
24
0
2
21
16
23
20
17
9
12
3
7
18
14
15
R588
10K
5%
0402
COMMONCOMMON
FBB_CMD<1>
FBB_CMD<10>
FBB_CMD<11>
FBB_CMD<8>
FBB_CMD<19>
FBB_CMD<25>
FBB_CMD<22>
FBB_CMD<24>
FBB_CMD<0>
FBB_CMD<2>
FBB_CMD<21>
FBB_CMD<16>
FBB_CMD<23>
FBB_CMD<20>
FBB_CMD<17>
FBB_CMD<9>
FBB_CMD<12>
FBB_CMD<3>
FBB_CMD<7>
FBB_CMD<18>
FBB_CLK0
FBB_CLK0*
SNN_FBB_NC0
FBB_CMD<14>
FBB_DEBUG_SEN0
FBB_CMD<15>
GND
FBB_ZQ0
R577
10K
5%
0402
COMMON
GND
6< 3> 9>
1%
GND
FBVDD
K1
K12
C643
.047UF
16V
10%
X7R
0402
COMMON
C54
.047UF
16V
10%
X7R
0402
COMMON
J12
J1
FBVDD
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBB_VREF0
FBB_VREF2
FBVDD
GND
GND
R596
549
0402
COMMON
R597
1.33K
COMMON
FBVDD
1%
1%
GND
GND
136BGA CMD Mapping
136MAPADDR
CMD1
RAS*
CMD10
CAS*
CMD11
WE*
CMD8
CS0*
CMD7
BA2
CMD12
BA0
CMD3
BA1
CMD14
A<12>
CMD19
A<0>
CMD25
A<1>
CMD22
0A<2>
CMD24
0A<3>
CMD0
0A<4>
CMD2
0A<5>
CMD4
1A<2>
CMD6
1A<3>
CMD5
1A<4>
CMD13
1A<5>
CMD21
A<6>
CMD16
A<7>
A<8> CMD23
CMD20A<9>
CMD17
A<10>
CMD9
A<11>
CMD18
CKE
CMD15
RST
FBVDD
Clock Term MUST BE PLACED as close
as possible to the BGA memory on
the line AFTER the memory pin!
Minimize STUB length!
FBVDD
R71
549
R1
9<>
C646
.1UF
R2
10V
10% 10%
X5R
0402
COMMON
0402
COMMON
R72
1.33K
04020402
COMMON
R1
1%
R2
1%
GND
VREF = 0.70 * FBVDDQGDDR3:
1.41V = 2.0V * 1.33K/(549 + 1.33K)
9>
9>
R576
121
1%
0402
NO STUFF
FBB_CLK1_MIDPT
C55
.1UF
10V
X5R
0402
COMMON
3>
3>
R584
243
0402
COMMON
3> 6< 9>
1%
9<>
GND
R583
243
0402
COMMON
C599
.01UF
25V
10%
X7R
0402
COMMON
1%
FBB_CMD<28..0>
FBVDD
R578
0
5%
0402
COMMON
GND
9<>
7
8
18
10
5
13
21
20
19
25
4
9
17
6
23
16
3
12
1
11
14
15
FBVDD
GND
FBB_CMD<7>
FBB_CMD<8>
FBB_CMD<18>
FBB_CMD<10>
FBB_CMD<5>
FBB_CMD<13>
FBB_CMD<21>
FBB_CMD<20>
FBB_CMD<19>
FBB_CMD<25>
FBB_CMD<4>
FBB_CMD<9>
FBB_CMD<17>
FBB_CMD<6>
FBB_CMD<23>
FBB_CMD<16>
FBB_CMD<3>
FBB_CMD<12>
FBB_CMD<1>
FBB_CMD<11>
FBB_CLK1
FBB_CLK1*
SNN_FBB_NC1
FBB_CMD<14>
FBB_DEBUG_SEN1
FBB_CMD<15>
FBB_ZQ1
C598
.047UF
16V
10%
X7R
0402
COMMON
GND
R79
243
1%
0402
COMMON
C59
.047UF
16V
10%
X7R
0402
COMMON
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
FBVDD
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBB_VREF1
FBB_VREF3
FBVDD
FBVDD
GND
GND
FBB_CMD<4>
FBB_CMD<6>
FBB_CMD<5>
FBB_CMD<13>
FBB_CMD<22>
FBB_CMD<24>
FBB_CMD<0>
FBB_CMD<2>
VREF = 0.70 * FBVDDQGDDR3:
1.41V = 2.0V * 1.33K/(549 + 1.33K)
FBVDD
R77
549
R1
1%
0402
COMMON
R76
1.33K
R2
1%
0402 0402
COMMON
C56
.1UF
10V
X5R
0402
COMMON
9<>
GND
9<>
3<>
3> 9>
3< 9<
3> 9>
FBB_D<63..0>
FBB_DQM<7..0>
FBB_DQS_RN<7..0>
FBB_DQS_WP<7..0>
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
FBB_D<0>
0
FBB_D<1>
1
FBB_D<2>
2
FBB_D<3>
3
FBB_D<4>
4
FBB_DQM<0>
0
FBB_DQM<1>
1
FBB_DQM<2>
2
FBB_DQM<3>
3
FBB_DQM<4>
4
FBB_DQM<5>
5
FBB_DQM<6>
6
FBB_DQM<7>
7
FBB_DQS_RN<0>
0
FBB_DQS_RN<1>
1
FBB_DQS_RN<2>
2
FBB_DQS_RN<3>
3
FBB_DQS_RN<4>
4
FBB_DQS_RN<5>
5
FBB_DQS_RN<6>
6
FBB_DQS_RN<7>
7
FBB_DQS_WP<0>
0
FBB_DQS_WP<1>
1
FBB_DQS_WP<2>
2
FBB_DQS_WP<3>
3
FBB_DQS_WP<4>
4
FBB_DQS_WP<5>
5
FBB_DQS_WP<6>
6
FBB_DQS_WP<7>
7
5
6
7
32
33
34
35
36
37
38
39
FBB_D<5>
FBB_D<6>
FBB_D<7>
FBB_DQM<0>
FBB_DQS_RN<0>
FBB_DQS_WP<0>
FBB_D<32>
FBB_D<33>
FBB_D<34>
FBB_D<35>
FBB_D<36>
FBB_D<37>
FBB_D<38>
FBB_D<39>
FBB_DQM<4>
FBB_DQS_RN<4>
FBB_DQS_WP<4>
M2
L3
R3
M3
T2
N2
R2
T3
N3
P3
P2
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
R11
T11
T10
R10
N11
M10
L10
M11
N10
P10
P11
8
9
10
11
12
13
14
15
40
41
42
43
44
45
46
47
FBB_D<8>
FBB_D<9>
FBB_D<10>
FBB_D<11>
FBB_D<12>
FBB_D<13>
FBB_D<14>
FBB_D<15>
FBB_DQM<1>
FBB_DQS_RN<1>
FBB_DQS_WP<1>
FBB_D<40>
FBB_D<41>
FBB_D<42>
FBB_D<43>
FBB_D<44>
FBB_D<45>
FBB_D<46>
FBB_D<47>
FBB_DQM<5>
FBB_DQS_RN<5>
FBB_DQS_WP<5>
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
N11
M10
M11
L10
R10
R11
T10
T11
N10
P10
P11
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
C2
G3
F3
C3
E2
B3
B2
F2
E3
D3
D2
FBB_D<16>
16
FBB_D<17>
17
FBB_D<18>
18
FBB_D<19>
19
FBB_D<20>
20
FBB_D<21>
21
FBB_D<22>
22
FBB_D<23>
23
FBB_DQM<2>
FBB_DQS_RN<2>
FBB_DQS_WP<2>
FBB_D<48>
48
FBB_D<49>
49
FBB_D<50> T2
50
51
FBB_D<52>
52
FBB_D<53>
53
FBB_D<54>
54
FBB_D<55>
55
FBB_DQM<6>
FBB_DQS_RN<6>
FBB_DQS_WP<6>
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
B11
F11
G10
B10
F10
C11
E11
C10
E10
D10
D11
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
R2
R3
T3FBB_D<51>
L3
M3
N2
M2
N3
P3
P2
FBB_D<24>
24
FBB_D<25>
25
FBB_D<26>
26
FBB_D<27>
27
FBB_D<28>
28
FBB_D<29>
29
FBB_D<30>
30
FBB_D<31>
31
FBB_DQM<3>
FBB_DQS_RN<3>
FBB_DQS_WP<3>
FBB_D<56>
56
FBB_D<57>
57
FBB_D<58> C10
58
FBB_D<59>
59
FBB_D<60>
60
FBB_D<61>
61
FBB_D<62>
62
FBB_D<63>
63
FBB_DQM<7>
FBB_DQS_RN<7>
FBB_DQS_WP<7>
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
FBB Partition
M5
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
E2
G3
F3
F2
C3
C2
B3
B2
E3
D3
D2
M8
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
B10
E11
B11
F11
C11
F10
G10
E10
D10
D11
www.vinafix.vn
Decoupling
for FBB Lo
Decoupling
for FBB Hi
FBVDD
C649
.1UF
10V
10%
X5R
0402
COMMON
C622
1UF
16V
10%
X5R
0603
COMMON
C654
4.7UF
6.3V
10%
X5R
0805
COMMON
C565
.1UF
10V
10%
X5R
0402
COMMON
C546
1UF
16V
10%
X5R
0603
COMMON
C544
4.7UF
6.3V
10%
X5R
COMMON
C636
.1UF
10V
10%
X5R
0402
COMMON
C645
1UF
16V
10%
X5R
0603
COMMON
C623
4.7UF
6.3V
10%
X5R
0805
COMMON
C604
.1UF
10V
10%
X5R
0402
COMMON
C616
1UF
16V
10%
X5R
0603
COMMON
C574
4.7UF
6.3V
10%
X5R
08050805
COMMON
C620
C647
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C651
C640
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603 0603
COMMON
COMMON
C644
4.7UF
6.3V
10%
X5R
0805
COMMON
C618
C587
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
04020402
COMMON
COMMON
C576C583
1UF
1UF
16V
16V
10%
10%
X5R
X5R
06030603
COMMON
COMMON
C571
4.7UF
6.3V
10%
X5R
0805
COMMON
C629
.1UF
10V
10%
X5R
0402
Place 1uF caps at
center of memory
C632
.1UF
10V
10%
X5R
0402
NO STUFF
C593
.1UF
10V
10%
X5R
0402
COMMON
Place 1uF caps at
center of memory
C585
.1UF
10V
10%
X5R
0402
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMONCOMMON
C648
C626
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
NO STUFF
NO STUFF
C575
C609
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C570
C569
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
NO STUFF
NO STUFFNO STUFF
600-10363-0000-100 A
p363_a01
donchen
C637
C650
C634
.1UF
10V
10%
X5R
0402
COMMON
C641
.1UF
10V
10%
X5R
0402
NO STUFF
C624
.1UF
10V
10%
X5R
0402
COMMON
C572
.1UF
10V
10%
X5R
0402
NO STUFF
C630
.1UF
10V
10%
X5R
0402
COMMON
C628
.1UF
10V
10%
X5R
0402
NO STUFF
C566
.1UF
10V
10%
X5R
0402
COMMON
C545
.1UF
10V
10%
X5R
0402
NO STUFF
C625
.1UF
10V
10%
X5R
0402
COMMON
C633
.1UF
10V
10%
X5R
0402
NO STUFF
C554
.1UF
10V
10%
X5R
0402
COMMON
C553
.1UF
10V
10%
X5R
0402
NO STUFF
6 OF 22
28-SEP-2008
GND
GND
GND
GND
GND
GND
Page 7
Page7: FBC Partition
OUT
OUT
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
ININININOUT
OUT
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININ
IN
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
136BGA CMD Mapping
ADDR
RAS*
CAS*
WE*
CS0*
BA2
BA0
BA1
A<12>
A<0>
A<1>
0A<2>
0A<3>
0A<4>
1A<2>
1A<3>
1A<4>
1A<5>
A<6>
A<7> CMD16
A<8>
A<9>
A<10>
A<11>
CKE
RST
136MAP
CMD1
CMD10
CMD11
CMD8
CMD7
CMD12
CMD3
CMD14
CMD19
CMD25
CMD22
CMD24
CMD0
CMD20A<5>
CMD4
CMD6
CMD5
CMD13
CMD21
CMD23
CMD20
CMD17
CMD9
CMD18
CMD15
FBVDD
R640
121
1%
0402
NO STUFF
FBC_CLK0_MIDPT
Clock Term MUST BE PLACED as close
as possible to the BGA memory on
the line AFTER the memory pin!
Minimize STUB length!
9> 4>
9>
4>
4> 7< 9>
R646
243
0402
COMMON
1%
FBC_CMD<28..0>
R642
243
1%
0402
COMMON
C849
.01UF
25V
10%
X7R
0402
COMMON
9<>
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
H11
K10
K11
H10
J11
J10
H3
F4
H9
F9
K4
H2
K3
M4
K9
L9
M9
K2
L4
G4
G9
H4
J2
J3
V4
V9
FBC_CMD<1>
1
FBC_CMD<10>
10
FBC_CMD<11>
11
FBC_CMD<8>
8
FBC_CMD<19>
19
FBC_CMD<25>
25
FBC_CMD<22>
22
FBC_CMD<24>
24
FBC_CMD<0>
0
FBC_CMD<2>
2
FBC_CMD<21>
21
FBC_CMD<16>
16
FBC_CMD<23>
23
FBC_CMD<20>
20
FBC_CMD<17>
17
FBC_CMD<9>
9
FBC_CMD<12>
12
FBC_CMD<3>
3
FBC_CMD<7>
7
FBC_CMD<18>
18
FBC_CLK0
FBC_CLK0*
SNN_FBC0_NC1
FBC_CMD<14>
14
FBC_DEBUG_SEN0
15
FBC_CMD<15>
A9
A4
GND
FBC_ZQ0
GND
R626
GND
0
5%
0402
COMMON
R620
10K
5%
0402
COMMON
R623
10K
5%
0402
COMMON
GND
R61
243
1%
0402
COMMON
FBVDD
K1
K12
C46
.047UF
16V
10%
X7R
0402
COMMON
C831
.047UF
16V
10%
X7R
0402
COMMON
J12
J1
GND
FBVDD
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBVDD
FBC_VREF0
FBC_VREF2
GND
GND
FBVDD
R644
549
R1
1%
0402
COMMON
R647
1.33K
R2
1%
COMMON
GND
VREF = 0.70 * FBVDDQGDDR3:
1.41V = 2.0V * 1.33K/(549 + 1.33K)
136BGA CMD Mapping
136MAPADDR
CMD1
RAS*
CMD10
CAS*
CMD11
WE*
CMD8
CS0*
CMD7
BA2
CMD12
BA0
CMD3
BA1
CMD14A<12>
CMD19
A<0>
CMD25
A<1>
CMD22
0A<2>
CMD24
0A<3>
CMD0
0A<4>
CMD2
0A<5>
CMD4
1A<2>
CMD6
1A<3>
CMD5
1A<4>
CMD13
1A<5>
CMD21
A<6>
CMD16
A<7>
CMD23A<8>
CMD20
A<9>
CMD17
A<10>
CMD9
A<11>
CMD18
CKE
CMD15
RST
FBVDD
Clock Term MUST BE PLACED as close
as possible to the BGA memory on
the line AFTER the memory pin!
R603
121
1%
0402
NO STUFF
4>
9>
4>
9>
FBC_CLK1_MIDPT
Minimize STUB length!
FBVDD
R62
549
R1
1%
0402
9<>
C857
.1UF
10V
10% 10%
X5R
0402
COMMON
COMMON
R63
1.33K
04020402
COMMON
R2
1%
C45
.1UF
10V
X5R
0402
COMMON
9<>
GND
R608
243
0402
COMMON
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R69
243
1%
0402
COMMON
H11
K10
K11
H10
J11
J10
K12
J12
CHANGED
H3
F4
H9
F9
K4
H2
K3
M4
K9
L9
M9
K2
L4
G4
G9
H4
J2
J3
V4
V9
A9
A4
K1
J1
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBVDD
4> 7< 9>
FBC_CMD<28..0>
R615
243
1%
1%
0402
COMMON
FBVDD
C683
.01UF
25V
10%
X7R
0402
COMMON
9<>
7
8
18
10
5
13
21
20
19
25
4
9
17
6
23
16
3
12
1
11
14
15
FBC_CMD<7>
FBC_CMD<8>
FBC_CMD<18>
FBC_CMD<10>
FBC_CMD<5>
FBC_CMD<13>
FBC_CMD<21>
FBC_CMD<20>
FBC_CMD<19>
FBC_CMD<25>
FBC_CMD<4>
FBC_CMD<9>
FBC_CMD<17>
FBC_CMD<6>
FBC_CMD<23>
FBC_CMD<16>
FBC_CMD<3>
FBC_CMD<12>
FBC_CMD<1>
FBC_CMD<11>
FBC_CLK1
FBC_CLK1*
SNN_FBC1_NC1
FBC_CMD<14>
FBC_DEBUG_SEN1
FBC_CMD<15>
FBC_ZQ1
GND
R64
0
5%
0402
COMMON
GND
GND
FBVDD
C53
.047UF
16V
10%
X7R
0402
COMMON
C681
.047UF
16V
10%
X7R
0402
COMMON
GND
FBVDD
FBVDD
FBC_VREF1
FBC_VREF3
GND
GND
FBC_CMD<4>
FBC_CMD<6>
FBC_CMD<5>
FBC_CMD<13>
FBC_CMD<22>
FBC_CMD<24>
FBC_CMD<0>
FBC_CMD<2>
VREF = 0.70 * FBVDDQ
GDDR3:
1.41V = 2.0V * 1.33K/(549 + 1.33K)
R617
0402
R618
0402
R612
0402
R616
0402
R638
0402
R641
0402
R645
0402
R648
0402
FBVDD
R68
549
R1
1%
0402
COMMON
R67
1.33K
R2
1%
0402 0402
COMMON
C52
.1UF
10V
X5R
0402
COMMON
9<>
GND
FBVDD
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
FBVDD
R606
549
R1
1%
0402
COMMON
R607
1.33K
COMMON
C684
.1UF
R2
1%
10V
10%10%
X5R
0402
COMMON
9<>
GND
9<>
4<>
4> 9>
4< 9<
4> 9>
FBC_D<63..0>
FBC_DQM<7..0>
FBC_DQS_RN<7..0>
FBC_DQS_WP<7..0>
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
FBC_D<0>
0
FBC_D<1>
1
FBC_D<2>
2
FBC_D<3>
3
FBC_D<4>
4
FBC_DQM<0>
0
FBC_DQM<1>
1
FBC_DQM<2>
2
FBC_DQM<3>
3
FBC_DQM<4>
4
FBC_DQM<5>
5
FBC_DQM<6>
6
FBC_DQM<7>
7
FBC_DQS_RN<0>
0
FBC_DQS_RN<1>
1
FBC_DQS_RN<2>
2
FBC_DQS_RN<3>
3
FBC_DQS_RN<4>
4
FBC_DQS_RN<5>
5
FBC_DQS_RN<6>
6
FBC_DQS_RN<7>
7
FBC_DQS_WP<0>
0
FBC_DQS_WP<1>
1
FBC_DQS_WP<2>
2
FBC_DQS_WP<3>
3
FBC_DQS_WP<4>
4
FBC_DQS_WP<5>
5
FBC_DQS_WP<6>
6
FBC_DQS_WP<7>
7
5
6
7
32
33
34
35
36
37
38
39
FBC_D<5>
FBC_D<6>
FBC_D<7>
FBC_DQM<0>
FBC_DQS_RN<0>
FBC_DQS_WP<0>
FBC_D<32>
FBC_D<33>
FBC_D<34>
FBC_D<35>
FBC_D<36>
FBC_D<37>
FBC_D<38>
FBC_D<39>
FBC_DQM<4>
FBC_DQS_RN<4>
FBC_DQS_WP<4>
G3
C2
F2
F3
B3
E2
B2
C3
E3
D3
D2
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
N11
T10
T11
R10
M10
R11
L10
M11
N10
P10
P11
8
9
10
11
12
13
14
15
40
41
42
43
44
45
46
47
FBC_D<8>
FBC_D<9>
FBC_D<10>
FBC_D<11>
FBC_D<12>
FBC_D<13>
FBC_D<14>
FBC_D<15>
FBC_DQM<1>
FBC_DQS_RN<1>
FBC_DQS_WP<1>
FBC_D<40>
FBC_D<41>
FBC_D<42>
FBC_D<43>
FBC_D<44>
FBC_D<45>
FBC_D<46>
FBC_D<47>
FBC_DQM<5>
FBC_DQS_RN<5>
FBC_DQS_WP<5>
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
L10
M10
M11
N11
R11
T10
T11
R10
N10
P10
P11
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
B2
C3
G3
B3
C2
F3
F2
E2
E3
D3
D2
FBC_D<16>
16
FBC_D<17>
17
FBC_D<18>
18
FBC_D<19>
19
FBC_D<20>
20
FBC_D<21>
21
FBC_D<22>
22
FBC_D<23>
23
FBC_DQM<2>
FBC_DQS_RN<2>
FBC_DQS_WP<2>
FBC_D<48>
48
FBC_D<49>
49
FBC_D<50> T3
50
51
FBC_D<52>
52
FBC_D<53>
53
FBC_D<54>
54
FBC_D<55>
55
FBC_DQM<6>
FBC_DQS_RN<6>
FBC_DQS_WP<6>
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
C10
E11
G10
F10
F11
B10
B11
C11
E10
D10
D11
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
T2
R2
R3FBC_D<51>
M2
N2
M3
L3
N3
P3
P2
FBC_D<24>
24
FBC_D<25>
25
FBC_D<26>
26
FBC_D<27>
27
FBC_D<28>
28
FBC_D<29>
29
FBC_D<30>
30
FBC_D<31>
31
FBC_DQM<3>
FBC_DQS_RN<3>
FBC_DQS_WP<3>
FBC_D<56>
56
FBC_D<57>
57
FBC_D<58> C10
58
FBC_D<59>
59
FBC_D<60>
60
FBC_D<61>
61
FBC_D<62>
62
FBC_D<63>
63
FBC_DQM<7>
FBC_DQS_RN<7>
FBC_DQS_WP<7>
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
FBC Partition
M3
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
L3
M2
M3
N2
R2
T2
T3
R3
N3
P3
P2
M4
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
B11
B10
C11
E11
F11
F10
G10
E10
D10
D11
www.vinafix.vn
Decoupling
for FBC Lo
Decoupling
for FBC Hi
FBVDD
C822
.1UF
10V
10%
X5R
0402
COMMON
C871
1UF
16V
10%
X5R
0603
COMMON
C882
4.7UF
6.3V
10%
X5R
0805
COMMON
C666
.1UF
10V
10%
X5R
0402
COMMON
C669
1UF
16V
10%
X5R
0603
COMMON
C678
4.7UF
6.3V
10%
X5R
0805
COMMON
C837
.1UF
10V
10%
X5R
0402
COMMON
C825
1UF
16V
10%
X5R
0603
COMMON
C866
4.7UF
6.3V
10%
X5R
0805
COMMON
C721
.1UF
10V
10%
X5R
0402
COMMON
C671
1UF
16V
10%
X5R
0603
COMMON
C719
4.7UF
6.3V
10%
X5R
0805
COMMON
C813
C816
.1UF.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C839
C872
1UF
1UF
16V
16V
10%
10%
X5R
X5R
06030603
COMMON
COMMON
C828
4.7UF
6.3V
10%
X5R
0805
COMMON
C743
C710
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
04020402
COMMON
COMMON
C690 C717
1UF
1UF
16V
16V
10%
10%
X5R
X5R
06030603
COMMON
COMMON
C662
4.7UF
6.3V
10%
X5R
0805
COMMON
C821
.1UF
10V
10%
X5R
0402
Place 1uF caps at
center of memory
C867
.1UF
10V
10%
X5R
0402
NO STUFF
C676
.1UF
10V
10%
X5R
0402
COMMON
Place 1uF caps at
center of memory
C695
.1UF
10V
10%
X5R
0402
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMONCOMMON
C840
C861
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
NO STUFF
NO STUFF
C722
C674
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C708
C673
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
NO STUFF
NO STUFFNO STUFF
600-10363-0000-100 A
p363_a01
donchen
C863
C873
C802
.1UF
10V
10%
X5R
0402
COMMON
C833
.1UF
10V
10%
X5R
0402
NO STUFF
C726
.1UF
10V
10%
X5R
0402
COMMON
C729
.1UF
10V
10%
X5R
0402
NO STUFF
C820
.1UF
10V
10%
X5R
0402
COMMON
C878
.1UF
10V
10%
X5R
0402
NO STUFF
C667
.1UF
10V
10%
X5R
0402
COMMON
C682
.1UF
10V
10%
X5R
0402
NO STUFF
C875
.1UF
10V
10%
X5R
0402
COMMON
C836
.1UF
10V
10%
X5R
0402
NO STUFF
C677
.1UF
10V
10%
X5R
0402
COMMON
C727
.1UF
10V
10%
X5R
0402
NO STUFF
7 OF 22
28-SEP-2008
GND
GND
GND
GND
GND
GND
Page 8
Page8: FBD Partition
OUT
OUT
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
ININININOUT
OUT
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
INININ
IN
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
BIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
136BGA CMD Mapping
ADDR
RAS*
CAS*
WE*
CS0*
BA2
BA0
BA1
A<12>
A<0>
A<1>
0A<2>
0A<3>
0A<4>
0A<5>
1A<2>
1A<3>
1A<4>
1A<5>
A<6>
A<7> CMD16
A<8>
A<10>
A<11>
CKE
RST
136MAP
CMD1
CMD10
CMD11
CMD8
CMD7
CMD12
CMD3
CMD14
CMD19
CMD25
CMD22
CMD24
CMD0
CMD2
CMD4
CMD6
CMD5
CMD13
CMD21
CMD23
CMD20A<9>
CMD17
CMD9
CMD18
CMD15
FBVDD
R709
121
1%
0402
NO STUFF
Clock Term MUST BE PLACED as close
as possible to the BGA memory on
the line AFTER the memory pin!
Minimize STUB length!
4>
9>
4>
9>
FBD_CLK0_MIDPT
R708
243
0402
COMMON
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
R27
243
1%
0402
COMMON
H11
K10
K11
H10
J11
J10
CHANGED
H3
F4
H9
F9
K4
H2
K3
M4
K9
L9
M9
K2
L4
G4
G9
H4
J2
J3
V4
V9
A9
A4
GND
R707
243
0402
COMMON
C958
.01UF
25V
10%
X7R
0402
COMMON
FBD_CMD<28..0>
1%
GND
9<>
R698
0
5%
0402
COMMON
FBD_CMD<1>
1
FBD_CMD<10>
10
FBD_CMD<11>
11
FBD_CMD<8>
8
FBD_CMD<19>
19
FBD_CMD<25>
25
FBD_CMD<22>
22
FBD_CMD<24>
24
FBD_CMD<0>
0
FBD_CMD<2>
2
FBD_CMD<21>
21
FBD_CMD<16>
16
FBD_CMD<23>
23
FBD_CMD<20>
20
FBD_CMD<17>
17
FBD_CMD<9>
9
FBD_CMD<12>
12
FBD_CMD<3>
3
FBD_CMD<7>
7
FBD_CMD<18>
18
FBD_CLK0
FBD_CLK0*
SNN_FBD0_NC1
FBD_CMD<14>
14
FBD_DEBUG_SEN0
FBD_CMD<15>
15
FBD_ZQ0
R701
R689
10K
10K
5%
5%
0402
0402
COMMON COMMON
GND
GND
4> 8< 9>
1%
FBVDD
K1
K12
C18
.047UF
16V
10%
X7R
0402
COMMON
C948
.047UF
16V
10%
X7R
0402
COMMON
J12
J1
FBVDD
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBD_VREF0
FBD_VREF2
FBVDD
GND
GND
R705
549
0402
COMMON
R704
1.33K
COMMON
1%
1%
GND
136BGA CMD Mapping
136MAPADDR
CMD1
RAS*
CMD10
CAS*
CMD11
WE*
CMD8
CS0*
CMD7
BA2
CMD12
BA0
CMD3
BA1
CMD14
A<12>
CMD19
A<0>
CMD25
A<1>
CMD22
0A<2>
CMD24
0A<3>
CMD0
0A<4>
CMD2
0A<5>
CMD4
1A<2>
CMD6
1A<3>
CMD5
1A<4>
CMD13
1A<5>
CMD21
A<6>
CMD16
A<7>
CMD23A<8>
CMD20
A<9>
CMD17
A<10>
CMD9
A<11>
CMD18
CKE
CMD15
RST
FBVDD
R657
121
1%
0402
NO STUFF
Clock Term MUST BE PLACED as close
as possible to the BGA memory on
the line AFTER the memory pin!
Minimize STUB length!
R25
549
0402
COMMON
R26
1.33K
04020402
COMMON
FBVDD
1%
1%
GND
FBVDD
R1
C943
.1UF
R2
10V
10% 10%
X5R
0402
COMMON
GND
VREF = 0.70 * FBVDDQGDDR3:
1.41V = 2.0V * 1.33K/(549 + 1.33K)
9<>
9> 4>
4> 9>
FBD_CLK1_MIDPT
R1
R2
C16
.1UF
10V
X5R
0402
COMMON
R661
243
0402
COMMON
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
H11
K10
K11
H10
J11
J10
K12
J12
CHANGED
H3
F4
H9
F9
K4
H2
K3
M4
K9
L9
M9
K2
L4
G4
G9
H4
J2
J3
V4
V9
A9
A4
K1
J1
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBVDD
R662
243
0402
COMMON
C913
.01UF
25V
10%
X7R
0402
COMMON
1%
FBD_CMD<28..0>
FBVDD
R31
0
5%
0402
COMMON
GND
9<>
7
8
18
10
5
13
21
20
19
25
4
9
17
6
23
16
3
12
1
11
14
15
FBD_CMD<7>
FBD_CMD<8>
FBD_CMD<18>
FBD_CMD<10>
FBD_CMD<5>
FBD_CMD<13>
FBD_CMD<21>
FBD_CMD<20>
FBD_CMD<19>
FBD_CMD<25>
FBD_CMD<4>
FBD_CMD<9>
FBD_CMD<17>
FBD_CMD<6>
FBD_CMD<23>
FBD_CMD<16>
FBD_CMD<3>
FBD_CMD<12>
FBD_CMD<1>
FBD_CMD<11>
FBD_CLK1
FBD_CLK1*
SNN_FBD1_NC1
FBD_CMD<14>
FBD_DEBUG_SEN1
FBD_CMD<15>
FBD_ZQ1
GND
R53
243
1%
0402
COMMON
4> 8< 9>
1%
GND
9<>
FBVDD
C937
.047UF
16V
10%
X7R
0402
COMMON
C34
.047UF
16V
10%
X7R
0402
COMMON
GND
FBD_VREF1
FBD_VREF3
FBVDD
FBVDD
GND
GND
FBD_CMD<4>
FBD_CMD<6>
FBD_CMD<5>
FBD_CMD<13>
FBD_CMD<22>
FBD_CMD<24>
FBD_CMD<0>
FBD_CMD<2>
VREF = 0.70 * FBVDDQ
GDDR3:
1.41V = 2.0V * 1.33K/(549 + 1.33K)
FBVDD
R44
549
R1
1%
0402
COMMON
R39
1.33K
R2
1%
0402 0402
COMMON
C36
.1UF
10V
X5R
0402
COMMON
GND
R675
549
0402
COMMON
R672
1.33K
COMMON
R673
0402
R679
0402
R678
0402
R683
0402
R702
0402
R699
0402
R703
0402
R706
0402
FBVDD
1%
1%
GND
9<>
FBVDD
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
121
COMMON
1%
R1
9<>
C915
R2
.1UF
10V
10%10%
X5R
0402
COMMON
9<
9>
4<>
4> 9>
4<
4>
FBD_D<63..0>
FBD_DQM<7..0>
FBD_DQS_RN<7..0>
FBD_DQS_WP<7..0>
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
M3
R2
M2
T2
T3
R3
N2
L3
N3
P3
P2
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
C10
B11
B10
C11
E11
G10
F10
F11
E10
D10
D11
C10FBD_D<16>
F11
G10
E11
F10
B10
B11
C11
E10
D10
D11
R3
R2
T2
T3
L3
M3
N2
M2
N3
P3
P2
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
FBD_D<24>
24
FBD_D<25>
25
FBD_D<26>
26
FBD_D<27>
27
FBD_D<28>
28
FBD_D<29>
29
FBD_D<30>
30
FBD_D<31>
31
FBD_DQM<3>
FBD_DQS_RN<3>
FBD_DQS_WP<3>
FBD_D<56>
56
FBD_D<57>
57
FBD_D<58>
58
FBD_D<59>
59
FBD_D<60>
60
FBD_D<61>
61
FBD_D<62>
62
FBD_D<63>
63
FBD_DQM<7>
FBD_DQS_RN<7>
FBD_DQS_WP<7>
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
FBD Partition
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
FBD_D<0>
0
FBD_D<1>
1
FBD_D<2>
2
FBD_D<3>
3
FBD_D<4>
4
FBD_DQM<0>
0
FBD_DQM<1>
1
FBD_DQM<2>
2
FBD_DQM<3>
3
FBD_DQM<4>
4
FBD_DQM<5>
5
FBD_DQM<6>
6
FBD_DQM<7>
7
FBD_DQS_RN<0>
0
FBD_DQS_RN<1>
1
FBD_DQS_RN<2>
2
FBD_DQS_RN<3>
3
FBD_DQS_RN<4>
4
FBD_DQS_RN<5>
5
FBD_DQS_RN<6>
6
FBD_DQS_RN<7>
7
FBD_DQS_WP<0>
0
FBD_DQS_WP<1>
1
FBD_DQS_WP<2>
2
FBD_DQS_WP<3>
3
FBD_DQS_WP<4>
4
FBD_DQS_WP<5>
5
FBD_DQS_WP<6>
6
FBD_DQS_WP<7>
7
5
6
7
32
33
34
35
36
37
38
39
FBD_D<5>
FBD_D<6>
FBD_D<7>
FBD_DQM<0>
FBD_DQS_RN<0>
FBD_DQS_WP<0>
FBD_D<33>
FBD_D<34>
FBD_D<35>
FBD_D<36>
FBD_D<37>
FBD_D<38>
FBD_D<39>
FBD_DQM<4>
FBD_DQS_RN<4>
FBD_DQS_WP<4>
G3
F3
F2
E2
B3
C2
C3
B2
E3
D3
D2
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
R11FBD_D<32>
T10
R10
T11
N11
L10
M10
M11
N10
P10
P11
8
9
10
11
12
13
14
15
40
41
42
43
44
45
46
47
FBD_D<8>
FBD_D<9>
FBD_D<10>
FBD_D<11>
FBD_D<12>
FBD_D<13>
FBD_D<14>
FBD_D<15>
FBD_DQM<1>
FBD_DQS_RN<1>
FBD_DQS_WP<1>
FBD_D<40>
FBD_D<41>
FBD_D<42>
FBD_D<43>
FBD_D<44>
FBD_D<45>
FBD_D<46>
FBD_D<47>
FBD_DQM<5>
FBD_DQS_RN<5>
FBD_DQS_WP<5>
M1
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
L10
M10
M11
N11
R10
T10
R11
T11
N10
P10
P11
M2
DDR3BGA136
PACK_TYPE=BGA136_V2
VERSION=BGA136
CHANGED
E2
G3
F3
C3
C2
F2
B2
B3
E3
D3
D2
16
17
18
19
20
21
22
23
48
49
50
51
52
53
54
55
FBD_D<17>
FBD_D<18>
FBD_D<19>
FBD_D<20>
FBD_D<21>
FBD_D<22>
FBD_D<23>
FBD_DQM<2>
FBD_DQS_RN<2>
FBD_DQS_WP<2>
FBD_D<48>
FBD_D<49>
FBD_D<50>
FBD_D<51>
FBD_D<52>
FBD_D<53>
FBD_D<54>
FBD_D<55>
FBD_DQM<6>
FBD_DQS_RN<6>
FBD_DQS_WP<6>
www.vinafix.vn
9<>
Decoupling
for FBD Lo
Decoupling
for FBD Hi
FBVDD
C936
.1UF
10V
10%
X5R
0402
COMMON
C949
1UF
16V
10%
X5R
0603
COMMON
C961
4.7UF
6.3V
10%
X5R
0805
COMMON
C928
.1UF
10V
10%
X5R
0402
COMMON
C900
1UF
16V
10%
X5R
0603
COMMON
C933
4.7UF
6.3V
10%
X5R
0805
COMMON
C954
.1UF
10V
10%
X5R
0402
COMMON
C942
1UF
16V
10%
X5R
0603
COMMON
C953
4.7UF
6.3V
10%
X5R
0805
COMMON
C927
.1UF
10V
10%
X5R
0402
COMMON
C932
1UF
16V
10%
X5R
0603
COMMON
C895
4.7UF
6.3V
10%
X5R
0805
COMMON
C944
C952
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C956
C938
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603 0603
COMMON
COMMON
C951
4.7UF
6.3V
10%
X5R
0805
COMMON
C931
C920
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C916
C919
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C909
4.7UF
6.3V
10%
X5R
0805
COMMON
C957
.1UF
10V
10%
X5R
0402
COMMON
Place 1uF caps at
center of memory
C946
.1UF
10V
10%
X5R
0402
NO STUFF
C907
.1UF
10V
10%
X5R
0402
COMMON
Place 1uF caps at
center of memory
C929
.1UF
10V
10%
X5R
0402
NO STUFF
p363_a01
donchen
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C940
C934
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
NO STUFF
NO STUFF
C935
C905
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C923
C921
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
NO STUFF
NO STUFF
600-10363-0000-100 A
C960
C959
C950
.1UF
10V
10%
X5R
0402
COMMON
C941
.1UF
10V
10%
X5R
0402
NO STUFF
C918
.1UF
10V
10%
X5R
0402
COMMON
C924
.1UF
10%
X5R
0402
NO STUFF
C947
.1UF
10V
10%
X5R
0402
COMMON
C955
.1UF
10V
10%
X5R
0402
NO STUFF
C917
.1UF
10V
10%
X5R
0402
COMMON
C926
.1UF
10V10V
10%
X5R
0402
NO STUFF
C945
.1UF
10V
10%
X5R
0402
COMMON
C939
.1UF
10V
10%
X5R
0402
NO STUFF
C930
.1UF
10V
10%
X5R
0402
COMMON
C904
.1UF
10V
10%
X5R
0402
NO STUFF
8 OF 22
28-SEP-2008
GND
GND
GND
GND
GND
GND
Page 9
Page9: FrameBuffer Net Rules
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUT
OUTINOUT
OUT
OUT
OUT
OUTBIOUTINOUT
OUT
OUT
OUT
OUT
OUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
OUTINOUT
OUT
OUT
OUT
OUT
OUTBIOUTINOUT
OUT
OUT
OUT
OUT
OUT
NET RULES for FrameBuffer A/B
5<>
5<>
5<>
5<>
5<
5<
5<
5<
5<
3<>
3>
3>
3>
3>
3>
3>
3<
3>
NET
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_CMD<28..0>
FBA_DQS_WP<7..0>
FBA_DQS_RN<7..0>
FBA_DQM<7..0>
FBA_D<63..0>
NET
6<
3>
6<
3>
6<
3>
6<
3>
6<
3>
3> 6<>
6<>
6<>
6<>
3<>
3<>
3<>
3<
3>
FBB_CLK0
FBB_CLK0*
FBB_CLK1
FBB_CLK1*
FBB_CMD<28..0>
FBB_DQS_RN<7..0> 1
FBB_DQM<7..0>
FBB_D<63..0>
FBA_DEBUG
FBB_DEBUG
NET VOLTAGE
3<>
FBAB_PLLAVDD
NV_CRITICAL
1
1
1
1
1
1
1
1
1
NV_CRITICAL
1
1
1
1
1
1FBB_DQS_WP<7..0>
1
1
1
1
1.2V
NV_IMPEDANCE DIFFPAIR
80DIFF FBA_CLK0
80DIFF
80DIFF
80DIFF
40OHM
40OHM
40OHM
40OHM
40OHM
FBA_CLK0
FBA_CLK1
FBA_CLK1
NV_IMPEDANCE DIFFPAIR
80DIFF FBB_CLK0
80DIFF
80DIFF
80DIFF
40OHM
40OHM
40OHM
40OHM
40OHM
45OHM
40OHM
FBB_CLK0
FBB_CLK1
FBB_CLK1
MAX_CURRENT MIN_WIDTH NET VOLTAGE
0.02A
12MIL
NET RULES for FrameBuffer C/D
7<>
7<>
7<>
7<>
8<> 4>
8<>
8<>
8<>
7<
7<
7<
7<
7<
8<
8<
8<
8<
8<
4<>
4<>
4<>
4<>
4<>
4>
4>
4>
4>
4>
4>
4<
4>
4>
4>
4>
4>
4>
4<
4>
NET
FBC_CLK0 1
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBC_CMD<28..0>
FBC_DQS_WP<7..0>
FBC_DQS_RN<7..0>
FBC_DQM<7..0>
FBC_D<63..0>
NET
FBD_CLK0
FBD_CLK0*
FBD_CLK1
FBD_CLK1*
FBD_CMD<28..0>
FBD_DQS_RN<7..0>
FBD_DQM<7..0>
FBD_D<63..0>
FBC_DEBUG
FBD_DEBUG
FBCD_PLLAVDD
NV_CRITICAL
1
1
1
1
1
1
1
1
NV_CRITICAL
1
1
1
1
1
1FBD_DQS_WP<7..0>
1
1
1
1
1
1.2V
NV_IMPEDANCE DIFFPAIR
80DIFF FBC_CLK0
80DIFF
80DIFF
80DIFF
40OHM
40OHM
40OHM
40OHM
40OHM
FBC_CLK0
FBC_CLK1
FBC_CLK1
NV_IMPEDANCE DIFFPAIR
80DIFF
80DIFF
80DIFF
80DIFF FBD_CLK1
40OHM
40OHM
40OHM
40OHM
40OHM
40OHM
40OHM
FBD_CLK0
FBD_CLK0
FBD_CLK1
MAX_CURRENT MIN_WIDTH
0.02A
12MIL
5>
5>
5>
5>
5<
5<
6>
6>
6>
6>
6<
6<
FBA_VREF0
FBA_VREF1
FBA_VREF2
FBA_VREF3
FBA_ZQ0
FBA_ZQ1
FBB_VREF0
FBB_VREF1
FBB_VREF2
FBB_VREF3
FBB_ZQ0
FBB_ZQ1
3<>
3<>
FB_VREF1
FB_VREF2
1.40V
1.40V
1.40V
1.40V
2.0V
2.0V
1.40V
1.40V
1.40V
1.40V
2.0V
2.0V
1.40V
1.40V
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A 12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL0.02A
7>
7>
7>
7>
7<
7<
8>
8>
8>
8>
8<
8<
FBC_VREF0
FBC_VREF1
FBC_VREF2
FBC_VREF3
FBC_ZQ0
FBC_ZQ1
FBD_VREF0
FBD_VREF1
FBD_VREF2
FBD_VREF3
FBD_ZQ0
FBD_ZQ1
1.40V
1.40V
1.40V
1.40V
2.0V
2.0V
1.40V
1.40V
1.40V
1.40V
2.0V
2.0V
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
Note: FB traces on top and bottom layers are routed with 45ohm impedance for increasing spacing.
Internal FB traces are routed with 40ohm impedance.
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
FrameBuffer Net Rules
www.vinafix.vn
600-10363-0000-100 A
p363_a01
donchen
9 OF 22
28-SEP-2008
Page 10
Page10: DACA Interface
OUT
OUT
OUT
OUT
OUT
OUT
OUT
8/24 DACA
DACA_VSYNC
DACA_HSYNC
I2CA_SCL
I2CA_SDA
DACA_RED
DACA_IDUMP
DACA_GREEN
DACA_BLUE
DACA_VDD
DACA_VREF
DACA_RSET
ININININININININININININININININININININININBI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
3V3_F
LB504
BEAD_0402
C859
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
240R@100MHz
COMMON
C794
.1UF
10V
10%
X5R
0402
COMMON
GND
C856
4.7UF
6.3V
10%
X5R
0603
COMMON
DACA_VREF
DACA_RSET
R631
124
1%
0402
COMMON
C804
1UF
6.3V
10%
X5R
0402
COMMON
DACA_VDD
C854
.1UF
10V
10%
X5R
0402
COMMON
AK13
AK14
AH11
G1
G92-300-A1
BGA1148
COMMON
T9
U8
AJ11
AF14
AH13
AJ14
AH12
I2CA_SCL
I2CA_SDA
DACA_HS
DACA_VS
DACA_RED
DACA_GREEN
DACA_BLUE
AJ13
GND
R716
0402
R717
0402
33
COMMON
5%
33
COMMON
5%
0
R3
NO STUFF
0402
U505
74ACT08
8
74ACT_SO
COMMON
U505
74ACT08
6
74ACT_SO
COMMON
R12
0402
5%
DACA_HS_BUF
0
NO STUFF
5%
DACA_VS_BUF
GND
R719
150
1%
0402
COMMON
5V
10
9
GND
5V
4
5
GND
R624
150
1%
0402
COMMON
GND
0402
R10
0402
R7
COMMON
D511
BAV99
SOT23
100V
100MA
5%
5%
I2CA_SCL_R
I2CA_SDA_R
5V
C990
.1UF
10V
10%
X5R
0402
COMMON
GND
33
COMMON
33
COMMON
3V3_F
2
1
DACA_HS_BUF_R
DACA_VS_BUF_R
3
LB516
3
3
GND
GND
GND
5V
2
D515
BAV99
SOT23
100V
100MA
COMMON
1
GND
5V
2
D516
BAV99
SOT23
100V
100MA
COMMON
1
GND
C3
3.3PF
50V
+/-0.25PF
C0G
0402
COMMON
C2
3.3PF
50V
+/-0.25PF
C0G
0402
COMMON
C985
5.6PF
50V
+/-0.5PF
C0G
0402
CHANGED
LB517
R725
2.2K
5%
5V
0402
COMMON
R726
2.2K
5%
0402
COMMON
0
L2
COMMON
0603
5%
5V
2
D2
BAV99
3
SOT23
100V
100MA
COMMON
1
GND
5V
2
3
1
GND
C971
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
D1
BAV99
SOT23
100V
100MA
COMMON
L1
0603
L507
5%
0603
0
COMMON
21
56nH
CHANGED
27nH
COMMON0402
27nH
COMMON0402
DACA_HS_DVI
DACA_VS_DVI
I2CA_SCL_DVI
C982
22PF
50V
5%
C0G
0402
COMMON
GND
I2CA_SDA_DVI
C983
22PF
50V
5%
C0G
0402
COMMON
GND
10< 12<
12< 10<
12< 10<
10< 12<
DACA_RED_DVI
10< 12<
GND
DACA NET RULES
NV_CRITICAL
1
1
1
1DACA_RED_DVI
1
1
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
12<
12<
12<
10>
10>
10>
NET
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_GREEN_DVI
DACA_BLUE_DVI
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
0.100A
12<
12<
12<
12<
10>
10>
10>
10>
DACA_HS
DACA_VS
DACA_HS_BUF
DACA_VS_BUF
DACA_HS_BUF_R
DACA_VS_BUF_R
DACA_HS_DVI
DACA_VS_DVI
I2CA_SCL
I2CA_SDA
I2CA_SCL_R
I2CA_SDA_R
I2CA_SCL_DVI
I2CA_SDA_DVI
NET
DACA_VREF
DACA_RSET
DACA_VDD
2
2
2
2
2
2
2
2
3
3
3
3
3
3
VOLTAGE
3.3V
DIFFPAIRNV_IMPEDANCE
MIN_WIDTHMAX_CURRENT
12MIL
12MIL
16MIL
D512
BAV99
SOT23
100V
100MA
COMMON
D510
BAV99
SOT23
100V
100MA
COMMON
3V3_F
2
1
GND
3V3_F
2
1
GND
R622
150
1%
0402
COMMON
GND
R625
150
1%
0402
COMMON
GND
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
DACA Interface
R720
150
1%
0402
COMMON
GND
R718
150
1%
0402
COMMON
GND
www.vinafix.vn
3
3
21
0603
56nH
CHANGED
C986
5.6PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
L508
C972
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
DACA_GREEN_DVI
12< 10<
21
L506
C970
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
56nH
0603 CHANGED
C984
5.6PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
DACA_BLUE_DVI
12< 10<
600-10363-0000-100 A
p363_a01
donchen
10 OF 22
28-SEP-2008
Page 11
Page11: DACC Interface
OUT
OUT
OUT
OUT
OUT
OUT
OUT
10/24 DACC
DACC_VSYNC
DACC_HSYNC
I2CB_SCL
I2CB_SDA
DACC_IDUMP
DACC_BLUE
DACC_GREEN
DACC_RED
DACC_VDD
DACC_VREF
DACC_RSET
ININININININININININININININININININININININBI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
R721
0402
R722
0402
33
COMMON
5%
33
COMMON
5%
I2CB_SCL_R
I2CB_SDA_R
0402
0402
COMMON
COMMON
27nH
27nH
R723
2.2K
5%
5V
0402
COMMON
R724
2.2K
5%
0402
COMMON
5V
2
D513
BAV99
3
SOT23
100V
100MA
COMMON
1
GND
5V
2
3
1
D514
BAV99
SOT23
100V
100MA
COMMON
LB515
LB514
I2CB_SCL_DVI
C977
22PF
50V
5%
C0G
0402
COMMON
GND
I2CB_SDA_DVI
C978
22PF
50V
5%
C0G
0402
COMMON
GND
12< 11<
11< 12<
GND
GND
GND
GND
C5
3.3PF
50V
+/-0.25PF
C0G
0402
COMMON
C4
3.3PF
50V
+/-0.25PF
C0G
0402
COMMON
C980
5.6PF
50V
+/-0.5PF
C0G
0402
CHANGED
DACC_HS_DVI
DACC_VS_DVI
DACC_RED_DVI
11< 12<
11< 12<
11<
12<
0
R2
NO STUFF
0402
5%
5V
GND
5V
GND
R633
150
1%
0402
COMMON
U505
74ACT08
11
74ACT_SO
COMMON
U505
74ACT08
3
74ACT_SO
COMMON
DACC_HS_BUF
R11
0402
5%
DACC_VS_BUF
0
NO STUFF
R714
150
1%
0402
COMMON
GND
0402
0402
R6
R9
COMMON
D508
BAV99
SOT23
100V
100MA
5%
5%
33
COMMON
33
COMMON
3V3_F
GND
2
1
DACC_HS_BUF_R
DACC_VS_BUF_R
3
13
12
3V3_F
GND
240R@100MHz
LB508
BEAD_0402
C901
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
C832
.1UF
10V
10%
X5R
0402
COMMON
COMMON
C886
4.7UF
6.3V
10%
X5R
0603
COMMON
DACC_VREF
DACC_RSET
R637
124
1%
0402
COMMON
C852
1UF
6.3V
10%
X5R
0402
COMMON
DACC_VDD
C853
.1UF
10V
10%
X5R
0402
COMMON
AH7
AK8
AH8
G1
G92-300-A1
BGA1148
COMMON
R9
T8
AJ10
AJ7
AJ9
AH9
I2CB_SCL
I2CB_SDA
DACC_HS
DACC_VS
DACC_RED
DACC_GREEN
DACC_BLUEAH10
1
2
AK9
GND
GND
5V
2
D4
BAV99
3
SOT23
100V
100MA
COMMON
1
GND
5V
2
D3
BAV99
3
SOT23
100V
100MA
COMMON
1
GND
C968
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
L504
0603
0603
L4
L3
0603
5%
5%
0
COMMON
0
COMMON
21
56nH
CHANGED
DACC NET RULES
NV_CRITICAL
1
1
1
1
1
1
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
12<
12<
12<
11>
11>
11>
NET
DACC_RED
DACC_GREEN
DACC_BLUE
DACC_RED_DVI
DACC_GREEN_DVI
DACC_BLUE_DVI
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
0.100A
11>
12<
11>
12<
11>
12<
11>
12<
DACC_HS
DACC_VS
DACC_HS_BUF
DACC_VS_BUF
DACC_HS_BUF_R
DACC_VS_BUF_R
DACC_HS_DVI
DACC_VS_DVI
I2CB_SCL
I2CB_SDA
I2CB_SCL_R
I2CB_SDA_R
I2CB_SCL_DVI
I2CB_SDA_DVI
NET
DACC_VREF
DACC_RSET
DACC_VDD
2
2
2
2
2
2
2
2
3
3
3
3
3
3
VOLTAGE
3.3V
DIFFPAIRNV_IMPEDANCE
R635
150
1%
0402
COMMON
GND
R628
150
1%
0402
COMMON
GND
R715
150
1%
0402
COMMON
GND
R713
150
1%
0402
COMMON
GND
MIN_WIDTHMAX_CURRENT
12MIL
12MIL
16MIL
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
DACC Interface
D509
BAV99
SOT23
100V
100MA
COMMON
D507
BAV99
SOT23
100V
100MA
COMMON
3V3_F
2
3
1
GND
3V3_F
2
3
1
GND
www.vinafix.vn
21
0603
56nH
CHANGED
C981
5.6PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
L505
C969
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
DACC_GREEN_DVI
11<
12<
21
L503
C967
6.8PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
56nH
0603 CHANGED
C979
5.6PF
50V
+/-0.5PF
C0G
0402
CHANGED
GND
DACC_BLUE_DVI
11<
12<
600-10363-0000-100 A
p363_a01
donchen
11 OF 22
28-SEP-2008
Page 12
INININININININININ
IN
1917
81624
C1
C5A
C2
C3
C5
C4
SHLD24
SHLD13
SHLD05
SHIELD8
SHIELD5
SHIELD6
SHIELD7
SHIELD1
SHIELD2
SHIELD3
SHIELD4
TX0ÂTX1-
TX1+
TX2-
TX0+
TX2+
TX3ÂTX3+
TX4+
TX4-
DDCC
TX5+
TX5-
GND
VDDC
SHLDC
TXC-
DDCD
HPD
R
VSYNC
TXC+
G
AGND2
AGND1
B
HSYNC
1917
81624
C1
C5A
C2
C3
C5
C4
SHLD24
SHLD13
SHLD05
SHIELD8
SHIELD5
SHIELD6
SHIELD7
SHIELD1
SHIELD2
SHIELD3
SHIELD4
TX0ÂTX1-
TX1+
TX2-
TX0+
TX2+
TX3ÂTX3+
TX4+
TX4-
DDCC
TX5+
TX5-
GND
VDDC
SHLDC
TXC-
DDCD
HPD
R
VSYNC
TXC+
G
AGND2
AGND1
B
HSYNC
ININININININININININININININOUT
OUT
12/24 IFPAB TMDS
IFPA_TXD0
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD3
IFPA_TXD3
IFPA_TXD2
IFPA_TXD2
IFPB_TXD7
IFPB_TXD7
IFPB_TXD4
IFPB_TXD6
IFPB_TXD6
IFPB_TXD5
IFPB_TXD5
IFPB_TXD4
IFPB_TXC
IFPB_TXC
IFPAB_RSET
IFPAB_PLLVDD
IFPAB_PLLGND
IFPA_IOVDD
IFPAB_VPROBE
IFPB_IOVDD
13/24 IFPCD TMDS
IFPC_TXD2
IFPC_TXC
IFPC_TXC
IFPC_TXD0
IFPC_TXD0
IFPC_TXD1
IFPC_TXD1
IFPC_TXD2
IFPD_TXD6
IFPD_TXD6
IFPD_TXD5
IFPD_TXC
IFPD_TXC
IFPD_TXD4
IFPD_TXD4
IFPD_TXD5
IFPCD_RSET
IFPCD_VPROBE
IFPCD_PLLGND
IFPC_IOVDD
IFPCD_PLLVDD
IFPD_IOVDD
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
NV_IMPEDANCENV_CRITICAL
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
C7
220PF
50V
5%
C0G
0402
COMMON
GND
LB1
240R@100MHz
COMMONBEAD_0402
0402
1
1
1
1
1
1
1
1
1
1
1
1
1
GPIO0_DVIAB_HPD_R
1K
R5
COMMON
5%
NV_IMPEDANCENV_CRITICALDIFFPAIR
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
GPIO1_DVICD_HPD_R
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
IFP A/B and C/D Interface
LB518
BEAD_0402 COMMON
240R@100MHz
C976
220PF
50V
5%
C0G
0402
COMMON
GND
3
3V3_F
2
1
GND
04025%COMMON
D503
BAV99
SOT23
100V
100MA
COMMON
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1KR731
www.vinafix.vn
10<
10<
10<
10<
10>
10>
10<
11<
11<
11<
11<
11>
11>
11<
15<
NET RULES
DIFFPAIRNET
IFPAB_TXC*
AT9
IFPAB_TXC
AT8
IFPAB_TXD0*
AN4
IFPAB_TXD0
AN5
AT3 1
IFPAB_TXD1*
IFPAB_TXD1
AT4
IFPAB_TXD2*
AP4
IFPAB_TXD2
AP5
SNN_IFPAB_TXD3*
AR3
SNN_IFPAB_TXD3
AR4
SNN_IFPB_TXC*
AP1
SNN_IFPB_TXC
AR2
IFPAB_TXD4*
AP6
IFPAB_TXD4
AP7
IFPAB_TXD5*AR7
IFPAB_TXD5
AR8
IFPAB_TXD6*
AT5
IFPAB_TXD6
AT6
SNN_IFPAB_TXD7*
AN2
SNN_IFPAB_TXD7
AP2
GPIO0_DVIAB_HPD
R8
10K
5%
0402
COMMON
GND
IFPAB_TXC
IFPAB_TXC
IFPAB_TXD0
IFPAB_TXD0
IFPAB_TXD1
IFPAB_TXD1
IFPAB_TXD2
IFPAB_TXD2
IFPAB_TXD4
IFPAB_TXD4
IFPAB_TXD5
IFPAB_TXD5
IFPAB_TXD6
IFPAB_TXD6
3V3_F
2
3
1
GND
D5
BAV99
SOT23
100V
100MA
COMMON
NET RULES
15<
NET
IFPCD_TXC*
AJ6
IFPCD_TXC
AH6
IFPCD_TXD0*AL2
IFPCD_TXD0
AL1
IFPCD_TXD1*
AJ1
IFPCD_TXD1
AK1
IFPCD_TXD2*
AL3
IFPCD_TXD2
AM3
SNN_IFPD_TXC*
AH5
SNN_IFPD_TXC
AH4
IFPCD_TXD4*
AK2
IFPCD_TXD4
AK3
IFPCD_TXD5*
AK4
IFPCD_TXD5
AK5
IFPCD_TXD6*
AM1
IFPCD_TXD6
AN1
GPIO1_DVICD_DP_HPD
IFPC_TXC
IFPC_TXC
IFPCD_TXD0
IFPCD_TXD0
IFPCD_TXD1
IFPCD_TXD1
IFPCD_TXD2
IFPCD_TXD2
IFPCD_TXD4
IFPCD_TXD4
IFPCD_TXD5
IFPCD_TXD5
IFPCD_TXD6
IFPCD_TXD6
R730
10K
5%
0402
COMMON
GND
1V8
LB511
240R@100MHz
G1
G92-300-A1
BGA1148
1KR636
COMMON
0402
1%
GND
COMMONBEAD_0402
C889
4.7UF
6.3V
10%
X5R
0603
COMMON
SNN_IFPAB_VPROBE
IFPAB_RSET
IFPAB_PLLVDD
1UF .1UF
6.3V
10%
X5R
0402
C850C855
10V
10%
X5R
0402
COMMONCOMMON
COMMON
AR6
AM7
AN6
AN7
Page12: IFP A/B and C/D Interface
IFP_IOVDD
LB512
COMMON
BEAD_0402
240R@100MHz
IFP_IOVDD
3.3V
0.35A
16MIL
C43
4.7UF
6.3V
20%
X5R
0603
COMMON
GND
GND
C890
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
C851
1UF
6.3V
10%
X5R
0402
COMMON
GND
C846
1UF
6.3V
10%
X5R
0402
COMMON
GND
1K
R650
COMMON
0402
1V8
LB510
BEAD_0402
240R@100MHz
COMMON
1%
GND
C888
4.7UF
6.3V
10%
X5R
0603
COMMON
SNN_IFPCD_VPROBE
IFPCD_RSET
IFPCD_PLLVDD
C869
1UF
6.3V
10%
X5R
0402
COMMON
C847
.1UF
10V
10%
X5R
0402
COMMON
C844
.1UF
10V
10%
X5R
0402
COMMON
C862
.1UF
10V
10%
X5R
0402
COMMON
AN8IFPAB_IOVDD
AM6
AL6
AN3
AM4
AL4
G1
G92-300-A1
BGA1148
COMMON
IFP_IOVDD
LB509
COMMON
BEAD_0402
240R@100MHz
GND
C887
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
GND
GND
IFPCD_IOVDD
C858
1UF
6.3V
10%
X5R
0402
COMMON
C870
1UF
6.3V
10%
X5R
0402
COMMON
C848
.1UF
10V
10%
X5R
0402
COMMON
C860
.1UF
10V
10%
X5R
0402
COMMON
AL5
AJ4
10>
10>
10>
10>
10<
10<
10>
11>
11>
11>
11>
11<
11<
11>
C6
4700PF
25V
10%
X7R
0402
COMMON
GND
IFPAB_TXD0*
IFPAB_TXD0
IFPAB_TXD1*
IFPAB_TXD1
IFPAB_TXD2*
IFPAB_TXD2
IFPAB_TXD4*
IFPAB_TXD4
IFPAB_TXD5*
IFPAB_TXD5
IFPAB_TXD6*
IFPAB_TXD6
I2CA_SCL_DVI
I2CA_SDA_DVI
IFPAB_TXC*
IFPAB_TXC
DACA_VS_DVI
GPIO0_DVIAB_HPD_F
DACA_RED_DVI
DACA_GREEN_DVI
DACA_BLUE_DVI
DACA_HS_DVI
C1
4700PF
25V
10%
X7R
0402
COMMON
GND
IFPCD_TXD0*
IFPCD_TXD0
IFPCD_TXD1*
IFPCD_TXD1
IFPCD_TXD2*
IFPCD_TXD2
IFPCD_TXD4*
IFPCD_TXD4
IFPCD_TXD5*
IFPCD_TXD5
IFPCD_TXD6*
IFPCD_TXD6
I2CB_SCL_DVI
I2CB_SDA_DVI
IFPCD_TXC*
IFPCD_TXC
DACC_VS_DVI
GPIO1_DVICD_HPD_F
DACC_RED_DVI
DACC_GREEN_DVI
DACC_BLUE_DVI
DACC_HS_DVI
DDC_5V
DDC_5V
IFPABCD NET RULES
NET
IFPAB_RSET
IFPCD_RSET
GPIO0_DVIAB_HPD_F
GPIO0_DVIAB_HPD_R
GPIO1_DVICD_HPD_F
GPIO1_DVICD_HPD_R
NV_CRITICAL
3
3
3
3
NET
IFPAB_PLLVDD
IFPAB_IOVDD
IFPCD_PLLVDD
25
26
27
28
17
18
9
10
1
2
3
11
19
12
13
4
5
20
21
6
7
14
15
22
24
23
8
16
C1
C2
C3
C5
C5A
C4
29
30
31
32
GND
J4
36QR24-073T
DVI_I_(SLIM_)SHLD_M
DVI_I_SLIM_SHLD_M
COMMON
IFPCD_IOVDD
1.8V
3.3V
1.8V
3.3V
NV_IMPEDANCE
MAX_CURRENTVOLTAGE
50OHM
50OHM
50OHM
50OHM
0.03A
0.09A
0.03A
0.09A
DIFFPAIR
12MIL
12MIL
MIN_WIDTH
16MIL
16MIL
16MIL
16MIL
25
26
27
28
17
18
9
10
1
2
3
11
19
12
13
4
5
20
21
6
7
14
15
22
24
23
8
16
C1
C2
C3
C5
C5A
C4
29
30
31
32
GND
J3
36QR24-073T
DVI_I_(SLIM_)SHLD_M
DVI_I_SLIM_SHLD_M
COMMON
600-10363-0000-100 A
p363_a01
donchen
12 OF 22
28-SEP-2008
Page 13
Page13: DACB Interface
INININININININININININ
out
7P_COMP_10P
out
out NC
Y/CVBS
GND
NC
Pb out
C/Pr
GND
9/24 DACB (TVout)
DACB_RED
DACB_BLUE
DACB_GREEN
DACB_IDUMP
DACB_CSYNC
DACB_VDD
DACB_VREF
DACB_RSET
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
DACB,STEREO, FL NET RULES
NET
DACB_PR
DACB_Y
DACB_PB
DACB_PR_F
DACB_Y_F
DACB_PB_F
1
1
1
1
1
1
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
DIFFPAIRNV_IMPEDANCENV_CRITICAL
NET
TV_GND1
TV_GND2
DACB_VDD
DACB_VREF
DACB_RSET
0.0V
0V
3.3V
0.2A
MIN_WIDTHMAX_CURRENTVOLTAGE
12MIL
12MIL
12MIL
12MIL
12MIL
8.2PF
C973
2
1
+/-0.5PF
50V
0603
NO STUFF
NPO
2
1
0603
8.2PF
50V
NPO
NO STUFF
0.56uH
NO STUFF
+/-0.5PF
0.56uH
1
R629
150
1%
3V3_F
GND
C877
4.7UF
6.3V
10%
X5R
0603
NO STUFF
LB505
BEAD_0402
240R@100MHz
NO STUFF
C865
4.7UF
6.3V
10%
X5R
0603
NO STUFF
GND
C815
.1UF
10V
10%
X5R
0402
NO STUFF
C843
1UF
6.3V
10%
X5R
0402
COMMON
DACB_VREF
DACB_RSET
R627
124
1%
0402
NO STUFF
GND
DACB_VDD
C835
.1UF
10V
10%
X5R
0402
NO STUFF
Y9
Y8
Y11
G1
G92-300-A1
BGA1148
COMMON
AA8
AB9
AA9
AG9
DACB_PR
SVID_CHROM
DACB_Y
SVID_LUM
DACB_PB
COMPOSITE
SNN_DACB_CSYNC
0402
NO STUFF2
R643
150
1%
0402
NO STUFF
W9
GND
1
R729
150
1%
0402
NO STUFF
2
R728
150
1%
0402
NO STUFF
D504
BAV99
SOT23
100V
100MA
NO STUFF
D505
BAV99
SOT23
100V
100MA
NO STUFF
3V3_F
GND
3V3_F
GND
C966
1
82PF
50V
5%
2
C0G
2
3
1
2
3
1
0402
NO STUFF
NO STUFF
L510
C964
82PF
50V
5%
C0G
0402
NO STUFF
C974
0603
0603
L509
C987
1
82PF
50V
5%
2
C0G
0402
NO STUFF
C988
82PF
50V
5%
C0G
0402
NO STUFF
DACB_PB_F
DACB_PR_F
TV_GND1
Rgnd
R1
0
5%
0603
NO STUFF
SNN_TV_STEREO
7
6
4
2
J1
CON_MINIDIN_7
7P_COMP_10P
NO STUFF
5
3
10198
SNN_TV_STEREO_NC
DACB_Y_F
TV_GND2
R732
0
5%
0603
NO STUFF
Rgnd_video
C975
0603
NO STUFF
L511
0603
C989
82PF
50V
5%
C0G
0402
NO STUFF
8.2PF
50V
NPO
0.56uH
NO STUFF
+/-0.5PF
C965
82PF
50V
5%
C0G
0402
NO STUFF
3
3V3_F
GND
2
1
D506
BAV99
SOT23
100V
100MA
NO STUFF
R727
150
1%
0402
NO STUFF
DACB_Y
R632
150
1%
0402
NO STUFF
GND FOR STEREO
Will be no stuff
Rgnd can be used for EMI purposes.
NOTE:
www.vinafix.vn
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
DACB Interface
STUFF 1UF CAP
WHEN STEREO
ELSE 0 OHM R
600-10363-0000-100 A
p363_a01
donchen
13 OF 22
28-SEP-2008
Page 14
Page14: Multi-use IO(MIO) Interface
IN
SLI - EMI SHIELD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RASTER_SYNC
DR<0>
DR<1>
DR<5>
DR<2>
DR<3>
DR<4>
DR<9>
DR<8>
DR<7>
DR<6>
DR<10>
DR<11>
DR<12>
DR<13>
DR<14>
DR_CMD
DR_CLK
SWAP_RDY
EXT_REFCLK
BIBIOUT
MIO
DRA_D10
DR
DRA_D0
DRA_D11
DRA_D9
DRA_D8
DRA_D7
DRA_D6
DRA_D5
DRA_D1
DRA_D2
DRA_D3
DRA_D4
DRA_D12
NC
DRA_CLK
DRA_CMD
DRA_D13
DRA_D14
14/24 MIOA
MIOAD4
MIOAD5
MIOAD3
MIOAD0
MIOAD1
MIOAD2
MIOAD6
MIOAD8
MIOAD9
MIOAD10
MIOAD11
MIOAD7
MIOA_CTL3
MIOA_DE
MIOA_CLKOUT
MIOA_CLKOUT
MIOA_VSYNC
MIOA_HSYNC
MIOACAL_PD_VDDQ
MIOA_VREF
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOACAL_PU_GND
MIO
DRB_D6
DRB_D7
DRB_D8
DRB_D2
DRB_D3
DRB_D4
DRB_D5
DR
DRB_D9
DRB_D1
DRB_D0
DRB_D11
DRB_D10
DRB_D12
DRB_CLK
NC
DR_REFCLK
DRB_D14
DRB_D13
DRB_CMD
15/24 MIOB
MIOBD2
MIOBD1
MIOBD0
MIOBD5
MIOBD4
MIOBD3
MIOBD6
MIOBD10
MIOBD9
MIOBD11
MIOBD8
MIOBD7
MIOB_CTL3
MIOB_DE
MIOB_CLKIN
MIOB_HSYNC
MIOB_CLKOUT
MIOB_CLKOUT
MIOB_VSYNC
MIOBCAL_PD_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VREF
MIOB_VDDQ
MIOB_VDDQ
MIOBCAL_PU_GND
INININININININININININ
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
MIO Feature Connector
MIOA_D<14..0>
G1
U11
V11
W11
T12
U12
AE11
AE12
AF12
AE13
AF13
AG2
AG1
AF1
W3
V3
V2
G92-300-A1
BGA1148
COMMON
G1
G92-300-A1
BGA1148
COMMON
Y7
V7
V6
V5
U7
Y3
W1
W2
Y4
W5
W6
AA7
AA5
Y5
W7
AA2
Y1
AE6
AG7
AF9
AF8
AE9
AE7
AD8
AD9
AC8
AD7
AD5
AC5
AE5
AF5
AG5
AF7
AG3
AG4
AD3
MIOA_D<0>AA4
MIOA_D<1>
MIOA_D<2>
MIOA_D<3>
MIOA_D<4>
MIOA_D<5>
MIOA_D<6>
MIOA_D<7>
MIOA_D<8>
MIOA_D<9>
MIOA_D<10>
MIOA_D<11>
MIOA_D<12>
MIOA_D<13>
MIOA_D<14>
MIOA_DE
MIOA_CLKOUT
SNN_MIOA_CLKOUT*
MIOB_D<0>
MIOB_D<1>
SNN_MIOB_D<2>
SNN_MIOB_D<3>
SNN_MIOB_D<4>
SNN_MIOB_D<5>
SNN_MIOB_D<6>
SNN_MIOB_D<7>
MIOB_D<8>
MIOB_D<9>
SNN_MIOB_D<10>
MIOB_D<11>
MIOB_D<12>
SNN_MIOB_HSYNC
SNN_MIOB_VSYNC
SNN_MIOB_DE
SNN_MIOB_CLKOUT
SNN_MIOB_CLKOUT*
MIOB_CLKIN
J2
CON_MIO_26_EDGE_4GND
NONPHY_4GND
COMMON
B10
A10
B12
A12
A13
B13
A2
B4
A4
A5
B6
A6
A8
B9
B5
A9
B8
A1
B1
B2
MIOA_D<0>
0
MIOA_D<1>
15<
15<
1
2
3
4
5
6
7
8
9
10
11
12
13
14
14<
18>
MIOA_D<2>
MIOA_D<3>
MIOA_D<4>
MIOA_D<5>
MIOA_D<6>
MIOA_D<7>
MIOA_D<8>
MIOA_D<9>
MIOA_D<10>
MIOA_D<11>
MIOA_D<12>
MIOA_D<13>
MIOA_D<14>
GPIO11_RASTER_SYNC
GPU_SWAPRDY
GPU_EXT_REFCLK
0
STRAPS
1
2
3
4
5
6
7
8
9
10
11
12
13
STRAPS
14
0
STRAPS
1
STRAPS
8
STRAPS
9
STRAPS
11
STRAPS
12
STRAPS
0
R733
COMMON
0402
5%
MIOB_D<12..0>
15>
15<>
2V5
C902
4.7UF
6.3V
0603
COMMON
LB513
220R@100MHz
10%
X5R
GND
COMMON
MIOA_VDDQ
BEAD_0603
2.5V
1A
30MIL
4.7UF .01UF1UF .01UF .1UF
6.3V
10%
X5R
0603
COMMON
GND
6.3V
10%
X5R
0402
COMMON
16V
10%
X7R
0402
COMMON
2V5
16V
10%
X7R
0402
COMMON
C795C838C806C817C883
10V
10%
X5R
0402
COMMON
R655
1K
1%
0402
COMMON
MIOA_VREF
R654
C893
1K
.1UF
1%
10V
0402
10%
COMMON
X5R
0402
COMMON
GND
MIOA_CAL_PD_VDDQ
49.9
R639
COMMON
0402
1%
MIOA_CAL_PU_GND
49.9
R649
COMMON
0402
1%
GND
C818
1UF
6.3V
10%
X5R
0402
COMMON
GND
C991
1UF
6.3V
10%
X5R
0402
COMMON
R735
1K
1%
0402
COMMON
MIOB_VREF
C992
.1UF
R734
10V
1K
10%
1%
X5R
0402
0402
COMMON
COMMON
GND
MIOB_CAL_PD_VDDQ
49.9
R737
COMMON
0402
1%
MIOB_CAL_PU_GND
49.9
R736
COMMON
0402
1%
GND
B3
B7
B11
A3
A7
A11
1
2
3
4
18> 14<
GND
GND
MIO NET RULES
NET
1
1
1
1
1
1
VOLTAGENET
1.25V
1.25V
MIOA_D<14..0>
MIOA_CLKOUT
MIOA_DE
MIOB_D<12..0>
MIOB_CLKIN
GPU_EXT_REFCLK
MIOA_VREF
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
MIOB_VREF
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
14<
18>
14> 18>
NV_IMPEDANCENV_CRITICAL
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
MAX_CURRENT
DIFFPAIR
MIN_WIDTH
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
Multi-use IO(MIO) Interface
www.vinafix.vn
600-10363-0000-100 A
p363_a01
donchen
14 OF 22
28-SEP-2008
Page 15
Page15: MISC: GPIO, I2C, BIOS, PLL, and XTAL
INININININININININININININININININININININININININININININ
16/24 XTAL
XTALOUTBUFF
XTALOUT
XTALSSIN
XTALIN
OUT
OUT
VCC
VCC
GND
GND
SCL
SDA
NC
SDA
IN
BI
17/24 I2C
I2CC_SCL
I2CC_SDA
I2CH_SCL
I2CS_SCL
I2CS_SDA
I2CH_SDA
ININOUT
OUT
OUT
OUT
IN
18/24 GPIO
GPIO<0>
GPIO<1>
GPIO<2>
GPIO<8>
GPIO<11>
GPIO<12>
GPIO<7>
GPIO<6>
GPIO<14>
GPIO<13>
GPIO<10>
GPIO<9>
GPIO<5>
GPIO<4>
GPIO<3>
VCC
GND
HOLD
WP
CS
SI
SCK
SO
BI
11/24 PLLVDD
VID_PLLVDD_NC
VID_PLLGND
H_PLLAVDD
VID_PLLAVDD
PLLVDD
PLLAVDD
PLLGND
OUTINOUT
24/24 MISC
ROM_SCLK
BUFRST
ROMCS
ROM_SI
ROM_SO
STEREO
TESTMODE
CLAMP
SWAPRDY_A
SPDIF
RFU
RFU
RFU
RFU
RFU
RFU
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PLLVDD/VID_PLLVDD
I2CC / I2CH(+ HDCP ROM) / I2CS
MISC NET RULES
NET
DIFFPAIRNV_IMPEDANCENV_CRITICAL
1.2V
1.2V
1.2V
1.2V
1.2V
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
1
1
1
1
G1
G92-300-A1
BGA1148
COMMON
18>
18>
16<
21<
21<
16>
16<
15< 2<
15<>
15>
15<
15>
14<>
15<>
15>
15>
15>
15<
15>
14<> 15>
2<
1V2
GND
1V2
GND
1V2
GND
C898
4.7UF
6.3V
10%
X5R
0603
COMMON
C899
4.7UF
6.3V
10%
X5R
0603
COMMON
C714
4.7UF
6.3V
10%
X5R
0603
COMMON
LB506
BEAD_0402
240R@100MHz
LB507
BEAD_0402
240R@100MHz
LB502
BEAD_0402
240R@100MHz
COMMON
COMMON
COMMON
C884
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
C885
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
C697
1UF
6.3V
10%
X5R
0402
COMMON
GND
C803
1UF
6.3V
10%
X5R
0402
COMMON
C829
1UF
6.3V
10%
X5R
0402
COMMON
C694
1UF
6.3V
10%
X5R
0402
COMMON
SNN_GPU_VID_PLLVDD
C812
.1UF
10V
10%
X5R
0402
COMMON
Fix for G92 NC pins issue
GPU_PLLAVDD
C826
.1UF
10V
10%
X5R
0402
COMMON
GPU_H_PLLAVDD
C698
.1UF
10V
10%
X5R
0402
COMMON
AB11
AC12GPU_VID_PLLAVDD
AA12
AC11
AB12
AF29
AD12
G1
G92-300-A1
BGA1148
COMMON
P8
P9
U9
V9
AE1
AE2
* Weak pull-ups needed if the GPU
is isolated from the SMBus
SNN_I2CC_SCL
SNN_I2CC_SDA
I2CH_SCL
I2CH_SDA
I2CS_SCL
I2CS_SDA
3V3_F
R51
47K
5%
0402
NO STUFF
3V3_F
R687 U504
10K
5%
0402
3V3_F
COMMON
R54
47K
5%
0402
NO STUFF
GND
R52
0402
R55
0402
R659
10K
5%
0402
COMMON
5%
5%
33
NO STUFF
33
NO STUFF
I2CH_SCL
I2CH_SDA
SNN_CRYPT
I2CS_SCL_R
I2CS_SDA_R
HDCP_KEYROM_PROGD_V3
SO8
COMMON
6
5
3
2
3V3_F
8
7
4
1
2<
2<
15<
15<
C908
.1UF
10V
10%
X5R
0402
COMMON
GND
D501
BAV99
SOT23
100V
100MA
NO STUFF
3V3_F
2
D8
BAV99
3
SOT23
100V
100MA
NO STUFF
1
GND
3V3_F
2
3
1
GND
I2CH_SCL
I2CH_SDA
I2CS_SCL
I2CS_SDA
I2CS_SCL_R
I2CS_SDA_R
ROM_CS*
ROM_SI
ROM_SO
ROM_SCLK
GPU_SWAPRDY
GPU_TESTMODE
GPIO0_DVI_A_HPD
GPIO1_DVI_C_HPD
GPIO4_FAN_PWM
GPIO5_VSEL0
GPIO6_VSEL1
GPIO7_FAN_TACH
GPIO8_THERM_OVERT*
GPIO11_RASTER_SYNC
XTAL_SSIN
XTAL_IN
XTAL_OUT
XTAL_OUTBUFF
NET
GPU_VID_PLLVDD
GPU_VID_PLLAVDD
GPU_PLLVDD
GPU_PLLAVDD
GPU_H_PLLAVDD
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
0.05A
0.05A
0.05A
0.05A
0.05A
MIN_WIDTHMAX_CURRENTVOLTAGE
12MIL
12MIL
12MIL
12MIL
12MIL
ROM / MISC
G1
G92-300-A1
AB1
AC3
AC9
AB7
AB6
AC7
AB5
BGA1148
COMMON
16<
16>
SPDIF_IN_F
SNN_GPU_RFU1
SNN_GPU_RFU2
SNN_GPU_RFU3
SNN_GPU_RFU4
SNN_GPU_RFU5
SNN_GPU_RFU6
(BUFRST/STEREO/SWAPRDY/CLAMP/TESTMODE)
18>
15<
15<
18>
15<
3V3_F
R684
10K
5%
0402
AC4
AB2
AA3
AA1
U5
Y12
N9
R12
ROM_CS*
ROM_SI
ROM_SO
ROM_SCLK
GPU_BUFRST*
SNN_STEREO
GPU_SWAPRDY
SNN_GPU_5V_CLAMP
GPU_TESTMODEV1
COMMON
R652
10K
5%
0402
COMMON
GND
GND
R656
10K
5%
0402
COMMON
3V3_F
R651
1K
1%
0402
COMMON
7
3
1
5
2
6
U3
MX25L1005
SO8
SO8
COMMON
GPIO
G13V3_F
G92-300-A1
8
C40
.1UF
10V
10%
X5R
4
0402
COMMON
GND
15< 14<>
BGA1148
COMMON
GPIO0_DVIAB_HPD
N3
GPIO1_DVICD_DP_HPD
U3
SNN_GPIO2
T4
GPIO3_NVVDD_PHASE
R2
GPIO4_FAN_PWM
N1
GPIO5_VSEL0
T3
GPIO6_VSEL1
T5
GPIO7_FAN_TACH
P1
GPIO8_THERM_OVERT*
M2
SNN_GPIO9
N2
SNN_GPIO10
R1
GPIO11_RASTER_SYNC
R3
SNN_GPIO12
P3
SNN_GPIO13
T2
SNN_GPIO14
U4
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
MISC: GPIO, I2C, BIOS, PLL, and XTAL
12>
12>
21<
15< 16<
15<
15< 21<
15< 16>
21<
www.vinafix.vn
XTAL
G1
G92-300-A1
BGA1148
COMMON
GND
XTAL_SSIN
R60
10K
5%
0402
COMMON
AD2
AD1
XTAL_IN
C44
22PF
50V
5%
C0G
0402
COMMON
GND
XTAL_4PIN_HOSONIC
H10SSMD
27 MHZ
Y1
+/-10 PPM
COMMON
XTAL_OUT
AC1
XTAL_OUTBUFFAB3
R59
330
5%
0402
COMMON
C41
22PF
50V
5%
C0G
0402
COMMON
GND
GND
GPIO Assignment Table
Function
I/O
GPIO
0
1
2
3
4
5
6
16<
15<
15<
R653
10K
5%
0402
COMMON
GND
14<>
7
8
9
10
11
12
13
14
DVI Hotplug Detect South
IN
DVI Hotplug Detect Nouth
IN
Framelock Interrupt
N/A
Select Phase number of NVVDD
OUT
Fan PWM Output
OUT
Voltage Select 0
OUT
Voltage Select 1
OUT
Fan Tach Input
IN
THERM_OVERT*
OUT
Not used
N/A
Not used
N/A
RASTER (SLI) SYNC
OUT
Not used
N/A
Not used
N/A
Not used
N/A
600-10363-0000-100 A
p363_a01
donchen
15 OF 22
28-SEP-2008
Page 16
Page16: Thermal Control/Protection and SPDIF Input
OUTININININININ
S
D
G
IN
OUT
C
E
B
POLYSWITCH
IN
OUT
C
E
B
C
EBS
D
G
C
EBD
SGS
D
G
S
D
G
S
D
G
S
D
G
IN
19/24 THERMAL
THERMDN (CATHODE)
THERMDP (ANODE)
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
THERMAL PROTECTION/TMDS BACKDRIVE
3V3_F
2K
R43
COMMON
0402
Q6
2PEX_RST_EN_Q
3
5%
.1UF
C37
16V
0402
10%
X7R
COMMON
1B1C1E
THERMAL_P*
1
R42
0402
R34
04025%COMMON
1G1D1S
1
R56
10K
5%
0402
COMMON
5%
10K
COMMON
10K
3V3_F
R37
0402
1B1C1E
THERMAL_N
C35
0603
THERMAL_N_R
C29
0603
3
Q9
SI2305DS
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
2K
COMMON
5%
1
1000PF
50V
10%
X7R
COMMON
1B1C1E
1
1000PF
50V
10%
X7R
COMMON
IFP_IOVDD
GPIO8_THERM_OVERT*
3
Q5
MMBT2222A
SOT23_1B1C1E
COMMON
2
GND
THERM_SHUTDOWN*
3
Q4
MMBT2222A
SOT23_1B1C1E
COMMON
2
GND
R48
10K
5%
0402
COMMON
PEX_RST_EN
0402
3
Q8
BSS138
SOT23_1G1D1S
1PEX_RST_Q
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
IFP_IOVDD_EN_RC
1KR50
COMMON
5%
1G1D1S
0
R49
COMMON
0402
5%
PEX_RST*
2>
1G1D1S
C38
.47UF
6.3V
10%
X5R
0402
COMMON
GND
3
Q7
BSS138
SOT23_1G1D1S
1
COMMON
2
GND
1G1D1S
C39
100PF
50V
5%
C0G
0402
COMMON
R47
2K
5%
0402
COMMON
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
IFP_IOVDD_EN*
3
Q10
BSS138
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
MMBT4403
SOT23_1B1C1E
COMMON
THERMAL_P_Q
R46
33K
5%
0402
COMMON
GND
SPDIF INPUT / DETECTION
15<
15>
21<
J7
HDR_1M2
MALE
2.0MM
90
SPDIF
COMMON
short circuit protection
if 3.3V connects to GND.
R19
0
5%
0402
NO STUFF
SPDIF_IN1
SPDIF_GND2
GND
1
2
F2
200mA
1206
COMMON
0.5V SWING using 75R termination resistor
3.3V SWING AC coupled without termination resistor
12V
R24
10K
5%
0402
COMMON
SPDIF_IN_G
3
Q3
MMBT2222A
1
SOT23_1B1C1E
COMMON
2
R21
0402
SPDIF_IN_C
2.2K
COMMON
5%
3V3_F
R22
0402
R23
33K
5%
0402
COMMON
C14
.1UF
16V
10%
X7R
0402
COMMON
10K
COMMON
5%
SPDIF_IN_R
1B1C1E
GND
GNDGND
50OHM
1G1D1S
1
C15
.1UF
16V
10%
X7R
0402
COMMON
TERMINATION
R712
75
1%
0402
COMMON
50OHM
2
SPDIF_TERM
3
Q509
BSS138
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
IMPEDANCENET
SPDIF_IN
SPDIF_IN_C
SPDIF_IN_R
SPDIF_IN_G
SPDIFIN_TERM
15< 16>
SPDIF_IN_F
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
NV_CRITICAL_NET
1
1
1
1
1
1
3V3_F
R711
180K
5%
0402
NO STUFF
GND
R710
180K
5%
0402
COMMON
0402 16V
.01UFC963
10%
X7R
COMMON
3
3V3_F
2
1
GND
D502
BAV99
SOT23
100V
100MA
COMMON
SPDIF_IN_F
50OHM
MIN_LINE_WIDTH
16< 15<
THERMAL DIODE
3V3_F
R15
G92-300-A1
BGA1148
COMMON
G1
10MIL
THERM_DN
T1
10MIL
THERM_DP
U1
R57
0402
R58
0402
THERM_DN_R
0
COMMON
5%
0
COMMON
5%
THERM_DP_R
C42
100PF
50V
5%
C0G
0402
COMMON
1G1D1S
1
10K
5%
0402
1G1D1S
NO STUFF
FAN_PWM_Q
3
Q2
2N7002
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
1
12V
D6
1
BAT43
SOD323
40V
400MA
2
NO STUFF
FAN_PWM_L
3
Q1
IRLML2502
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=20V
CONTINUOUS_CURRENT=3.4A
R_DS_ON=0.08R
MAX_CURRENT=20A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-12V
GND
L5
SMD_4_5X4_0MM
1
J5
HDR_1M2_FAN
2
MALE
2.5MM
GND
R4
0
5%
0402
NO STUFF
0
NORM
NO STUFF
22uH
NO STUFF
C9
1UF
16V
10%
X5R
0603
C10
10UF
16V
10%
X5R
0805
NO STUFFNO STUFF
FAN_GND
2-pin fan option
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
Thermal Control/Protection and SPDIF Input
www.vinafix.vn
3V3_F
1
0
R17
COMMON
0402
5%
0
R16
COMMON
0402
5%
3
D7
BAT54C
25V
200MA
SOT23
2
COMMON
GPIO7_FAN_TACH
GPIO4_FAN_PWM
3V3_F
R14
10K
5%
0402
COMMON
3V3_F
R13
10K
5%
0402
COMMON
15<
15<
GPIO4_FAN_PWM_R
GPIO7_FAN_TACHIN_R
15>
FAN
12V
1
J6
HDR_1M4
2
MALE
3
2.0MM
N/A
4
C11
.47UF
16V
10%
X5R
0603
COMMON
GND
NORM
COMMON
GND
600-10363-0000-100 A
p363_a01
donchen
16 OF 22
28-SEP-2008
Page 17
Page17: Power/GND and Decoupling
22/24 GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
OUT
OUT
20/24 VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD_SENSE
GND_SENSE
6/24 FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
VDD33
21/24
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
7/24 VTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
VDD33
G1
G92-300-A1
BGA1148
COMMON
N11
P11
FBVTT
G1
G92-300-A1
BGA1148
COMMON
R11
N12
AH15
AJ16
AK16
AJ17
AK17
AH1
AH2
AE3
AF3
AH3
AJ3
AD4
AF4
AG8
AE21
AF23
AP23
AJ26
SNN_FBVTT_NC1M12
SNN_FBVTT_NC2
M13
SNN_FBVTT_NC3
M15
SNN_FBVTT_NC4
M16
SNN_FBVTT_NC5
M17
SNN_FBVTT_NC6
M20
SNN_FBVTT_NC7
M21
SNN_FBVTT_NC8
M22
SNN_FBVTT_NC9
AE22
SNN_FBVTT_NC10
AE23
SNN_FBVTT_NC11
M24
SNN_FBVTT_NC12
AE24
SNN_FBVTT_NC13
M25
SNN_FBVTT_NC14
N25
SNN_FBVTT_NC15
R25
SNN_FBVTT_NC16
T25
SNN_FBVTT_NC17
U25
SNN_FBVTT_NC18
Y25
SNN_FBVTT_NC19AA25
SNN_FBVTT_NC20
AB25
SNN_FBVTT_NC21
AD25
SNN_FBVTT_NC22
AE25
SNN_GPU_NC0
SNN_GPU_NC1
SNN_GPU_NC2
SNN_GPU_NC3
SNN_GPU_NC4
SNN_GPU_NC5
SNN_GPU_NC6
SNN_GPU_NC7
SNN_GPU_NC8
SNN_GPU_NC9
SNN_GPU_NC10
SNN_GPU_NC11
SNN_GPU_NC12
C811
.47UF
6.3V
10%
X5R
0402
COMMON
1UF
6.3V
10%
X7R
0603
COMMON
C782
1UF
6.3V
10%
X5R
COMMON
C774 C810C834
1UF
6.3V
10%
X5R
COMMON
C819
.1UF
10V
10%
X5R
04020402
COMMON
.1UF
10V
10%
X5R
04020402
COMMON
3V3_F
C808
.47UF
6.3V
10%
X5R
0402
COMMON
GND
GND
FBVDDQ
FBVDD
Place near BGA
GND
C696
.47UF
6.3V
10%
X5R
0402
COMMON
C692
.47UF
6.3V
X5R
0402
COMMON
C796
.47UF
6.3V
10%
X5R
0402
COMMON
C786
.47UF
6.3V
10%
X5R
0402
COMMON
C731
.47UF
6.3V
10%
X5R
0402
COMMON
C675
4.7UF
6.3V
10%
X5R
0603
COMMON
C769
.1UF
10V
10%
0402
COMMON
C874
47UF
6.3V
20%
X5R
1206
NO STUFF
C702
1UF
6.3V
10%
X5R
0402
COMMON
C691
1UF
6.3V
X5R
0402
COMMON
C749
.47UF
6.3V
10%
X5R
0402
COMMON
C739
.47UF
6.3V
10%
X5R
0402
COMMON
C701
.47UF
6.3V
10%
X5R
0402
COMMON
C841
4.7UF
6.3V
10%
X5R
0603
COMMON
C707
.1UF
10V
10%
0402
COMMON
C777
1UF
6.3V
10%
X5R
0402
COMMON
GND
NVVDD
NVVDD
Place near BGA
C685
.1UF
10V
10%
X5R
0402
COMMON
C759
.1UF
10V
10%10% 10%
X5R
0402
COMMON
C790
1UF
6.3V
X5R
0402
COMMON
C670
.47UF
6.3V
10%
X5R
0402
COMMON
C758
.47UF
6.3V
10%
X5R
0402
COMMON
C728
4.7UF
6.3V
10%
X5R
0603
COMMON
C801
.1UF
10V
10%
X5R X5R X5RX5R X5R X5RX5R
0402
COMMON
C706
.1UF
6.3V
10%
X7R
0402
COMMON
C754
.022UF
16V
10%
X7R
0402
COMMON
C744
GND
C665
1UF
GND
6.3V
10%10%
X5R
0402
COMMON
C712
.47UF
GND
6.3V
10%
X5R
0402
COMMON
C704
.47UF
GND
6.3V
10%
X5R
0402
COMMON
C703
1UF
GND
6.3V
10%
X5R
0402
COMMON
GND
C705
.01UF
GND
6.3V
10%
X7R
0402
COMMON
GNDGND
.022UF
16V
X7R
0402
COMMON
C778
.1UF
16V
10%
X7R
0402
COMMON
C770
.1UF
16V
10%
X7R
0402
COMMON
C787
.22UF
6.3V
10%
X5R
0402
COMMON
C771
.22UF
6.3V
10%
X5R
0402
COMMON
C788
.22UF
6.3V
10%
0402
COMMON
C797
1UF
6.3V
10%
X5R
0402
COMMON
C799
1UF
6.3V
10%
X5R
0402
COMMON
C664 C720
4.7UF
6.3V
10%
X5R
0603
COMMON
C639
4.7UF
6.3V
10%
X5R
0603
COMMON
C657
10UF
6.3V
X5R
0805
COMMON
C912
10UF
6.3V
20%
X5R
0805
COMMON
C661
47UF
6.3V
20%
X5R
1206
COMMON
C756
.022UF
16V
10%
X7R
0402
COMMON
C765
.1UF
16V
X7R
0402
COMMON
C733
.1UF
16V
10%
X7R
0402
COMMON
C730
.1UF
16V
10%
X7R
0402
COMMON
C789
.22UF
6.3V
10%
X5R
0402
COMMON
C780
.22UF
6.3V
10%
X5R
0402
COMMON
C745
.47UF
6.3V
10%
0402
COMMON
C766
1UF
6.3V
10%
X5R
0402
COMMON
C747
1UF
6.3V
10%
X5R
0402
COMMON
4.7UF
6.3V
10%
X5R
0603
COMMON
C659
4.7UF
6.3V
10%
X5R
0603
COMMON
C638
10UF
6.3V
X5R
0805
COMMON
C652
10UF
6.3V
20%
X5R
0805
COMMON
C800
47UF
6.3V
20%
X5R
1206
COMMON
Place near GPU
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
Power/GND and Decoupling
www.vinafix.vn
C746
.22UF
6.3V
10%
X5R
0402
COMMON
C772
.22UF
6.3V
X5R
0402
COMMON
C738
.22UF
6.3V
10%
X5R
0402
COMMON
C807
.22UF
6.3V
10%
X5R
0402
COMMON
C711
.22UF
6.3V
10%
X5R
0402
COMMON
C767
.47UF
6.3V
10%
X5R
0402
COMMON
C783
.47UF
6.3V
10%
0402
COMMON
C718
1UF
6.3V
10%
X5R
0402
COMMON
C736
1UF
6.3V
10%
X5R
0402
COMMON
C656
4.7UF
6.3V
10%
X5R
0603
COMMON
C635
4.7UF
6.3V
10%
X5R
0603
COMMON
C876
10UF
6.3V
X5R
0805
COMMON
C631
10UF
6.3V
20%
X5R
0805
COMMON
C911
47UF
6.3V
20%
X5R
COMMON
C793
.22UF
6.3V
10%
X5R
0402
COMMON
C791
.22UF
6.3V
10%10%10%10%
X5R
0402
COMMON
C732
.22UF
6.3V
10%
X5R
0402
COMMON
C737
.22UF
6.3V
10%
X5R
0402
COMMON
C792
.22UF
6.3V
10%
X5R
0402
COMMON
C779
.47UF
6.3V
10%
X5R
0402
COMMON
C725
.47UF
6.3V
10%
0402
COMMON
C755
1UF
6.3V
10%
X5R
0402
COMMON
C763
4.7UF
6.3V
10%
X5R
0603
COMMON
C880
10UF
6.3V
20%20%20% 20%
X5R
0805
COMMON
C642
10UF
6.3V
20%
X5R
0805
COMMON
C687
47UF
6.3V
20%
X5R
12061206
COMMON
G1
G1
G92-300-A1
BGA1148
COMMON
R14
V14
W14
AB14
P15
R15
T15
V15
W15
AA15
AB15
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AC15
R16
T16
V16
W16
AA16
AB16
P18
R18
T18
V18
W18
AA18
AB18
AC18
P19
R19
T19
V19
W19
AA19
AB19
AC19
R21
T21
V21
W21
AA21
AB21
R22
T22
V22
W22
AA22
AB22
AC22
R23
V23
W23
AB23
P22
P23
NVVDD
NVVDD_SENSE
NVVDD_SENSE_GND
FBVDD
L12
L13
J14
L14
J15
L15
J17
L17
J18
L18
J19
L19
J20
L20
J22
L22
J23
L23
L24
AF24
L25
M26
N26
P26
R26
U26
V26
W26
Y26
AB26
AC26
AD26
AE26
AF26
K28
U28
V28
W28
Y28
AA28
AD28
AE28
L29
AA29
G1
G92-300-A1
BGA1148
COMMON
21<
21<
GND
G92-300-A1
BGA1148
COMMON
M19
U19
Y19
AE19
AJ19
AL19
AT19
B20
P20
R20
T20
U20
V20
W20
AA20
AB20
AC20
AP20
F21
L21
P21
U21
Y21
AC21
AF21
AR21
D22
H22
U22
Y22
AF22
AK22
AT22
B23
M23
T23
U23
Y23
AA23
AC23
F24
AL24
AP24
D25
H25
P25
V25
W25
AC25
AF25
AJ25
AN25
B26
L26
T26
AA26
AR26
F27
AJ27
AL27
B29
E29
M29
R29
V29
W29
AB29
AG29
AM29
AR29
G30
AK30
K31
N31
T31
AA31
AD31
AG31
B32
E32
H32
AJ32
AM32
AR32
M33
R33
V33
W33
AB33
AE33
B35
E35
H35
L35
P35
U35
Y35
AC35
AF35
AJ35
AM35
AR35
AH14
600-10363-0000-100 A
p363_a01
donchen
B2
E2
H2
L2
P2
U2
Y2
AC2
AF2
AJ2
AM2
AP3
M4
R4
V4Y20
W4
AB4
AE4
B5
E5
H5
AJ5
AM5
AR5
K6
N6
T6
AA6
AD6
AG6
AT7
B8
E8
H8
M8
R8
V8
W8
AB8
AE8
AJ8
AM8
AP8
F10
AT10
B11
M11
T11
AA11
AD11
AF11
AK11
AP11
D12
P12
V12
W12
AJ12
AR12
F13
AL13
AT13
B14
H14
M14
P14
T14
U14
Y14
AA14
AC14
AE14
AP14
D15
H15
U15
Y15
AJ15
AR15
F16
L16
P16
U16
Y16
AC16
AF16
AL16
AT16
B17
P17
R17
T17
U17
V17
W17
Y17
AA17
AB17
AC17
AP17
D18
H18
M18
U18
Y18
AE18
AJ18
AR18
D19
H19
17 OF 22
28-SEP-2008
GND
Page 18
Page18: Configuration Straps and Mechanical
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
OUT
OUT
OUT
OUT
12 connected mounting pins
COOLING SOLUTION
No connected mounting pins
SPECIAL MECHANIC
MECH. MOUNTING TOP
2 connected mounting pins
BOARD STIFFENER
STRAPS
2V5
5%
5%
5%
5%
5%
5%
5%
5%
5%
2.2K
NO STUFF
2.2K
COMMON
2.2K
NO STUFF
2.2K
NO STUFF
2.2K
NO STUFF
2.2K
COMMON
2.2K
COMMON
2.2K
2
NO STUFF
2.2K
NO STUFF
2V5
STRAP 0
*
02: RAM_CFG[0]
*
03: RAM_CFG[1]
*
04: RAM_CFG[2]
*
05: RAM_CFG[3]
*
13: PCI_DEVID[3]
*
28: PCI_DEVID[4]
*
17: PEX_PLL_EN_TERM100
STRAP 1
*
12: MIO_EN_33V_0
*
13: MIO_EN_33V_1
14<
14<
14>
MIOA_D<14..0>
MIOB_D<12..0>
0
MIOB_D<0>
MIOB_D<1>
MIOB_D<8>
MIOB_D<9>
MIOB_D<11>
MIOB_D<12>
MIOA_D<0>
R33
0402
R691
0402
R664
0402
R676
0402
R692
0402
R669
0402
R35
0402
0
1
8
9
11
12
5%
5%
5%
5%
5%
5%
5%
2.2K
COMMON
2.2K
NO STUFF
2.2K
COMMON
2.2K
COMMON
2.2K
COMMON
2.2K
NO STUFF
2.2K
NO STUFF
MIOB_D<0>
MIOB_D<1>
MIOB_D<8>
MIOB_D<9>
MIOB_D<11>
MIOB_D<12>
MIOA_D<0>
R32
0402
R688
0402
R663
0402
R677
0402
R694
0402
R670
0402
R36
0402
15>
15>
15<
15<
ROM_SI
ROM_SCLK
R668
0402
R665
0402
5%
5%
2.2K
COMMON
2.2K
COMMON
ROM_SI
ROM_SCLK
R667
0402
R666
0402
1
Samsung
256b
8Mx32
256MB
1
1
1
0
Samsung
256b
16Mx32
512MB
1
Hynix
256b
8Mx32016Mx32
256MB
0
1 1
0
1
0 0
DEVID =
Per G92 Guide (PEX term)..
* Strap definition inverted
- set to 0x1 to enable
- set to 0x0 to disable
DEFAULT = 1 (3.3V)
MIOA = 0 (2.5V)
DEFAULT = 1 (3.3V)
MIOB = 0 (2.5V)
0x0614 DT0 G92-279 0001 0100
0x0614 DT50 G92-289 0001 0100
Hynix
256b
512MB
0
1
0
Qimonda
256b
16Mx 32
521MB
1
0
0
0
4 3
MECHANICAL
BKT1
DVI3152_DVI1552_TEXT_1_2_TAB
ATX_1X_TOP
COMMON
1
GND
2
1
GND
MEC2
EDGE_STIFFENER_P356_NONHYBRID
2PIN
NO STUFF
Top edge stiffener
MEC1
PEX_RET_BRKOFF
NOPIN
COMMON
Hockey stick
MEC4
HEX_JACK_SCREW
STD
COMMON
MEC5
HEX_JACK_SCREW
STD
COMMON
MEC6
HEX_JACK_SCREW
STD
COMMON
MEC7
HEX_JACK_SCREW
STD
COMMON
MEC8
PH_4_40X.1875_SCREW
STD
COMMON
13
MIOA_D<13>
R41
0402
GND
5%
2.2K
NO STUFF
MIOA_D<13>
R38
0402
2.2K
COMMON
5%
*
15: SLOT_CLK_CFG
DISABLE = 0; ENABLE = 1
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
Configuration Straps and Mechanical
www.vinafix.vn
123547689
GND
111012
MEC3
TM62RX_BOM
12PIN
COMMON
Currently it's a preliminary symbol.
New fansink will be updated to BOM.
600-10363-0000-100 A
p363_a01
donchen
18 OF 22
28-SEP-2008
Page 19
VOLTAGEMIN_LINE_WIDTHMAX_CURRENTNETNAME
OUT
ADJ
GND
IN
EN
VOUT
NC
ADJPGOOD
THERMGND
VDD
VIN
EN
GND
POLYSWITCH
OUT
TAB
GND/ADJ
IN
OUT
ADJ
GND
IN
EN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Page 19:Power Supply: 5V, 5V_DDC, 1v8, 2V5,PEX_PLLVDD Option
5V REGULATOR
12V
C17 C19
10UF
16V
10%
X5R
1206
COMMON
GND
1UF
16V
10%
X5R
0603
COMMON
U1
APL1117UC
ADJ_VR=1.25V
GOI,IGOI,TO263
SOT223_GOI
COMMON
3
1
PS_5V_ADJ
C962
.1UF
16V
10%
X7R
0402
NO STUFF
2
4
Rtop
Rbot
R18
165
1%
0402
COMMON
R20
499
1%
0402
COMMON
C13
.1UF
16V
10%
X7R
0402
COMMON
C12
4.7UF
COMMON
6.3V
X5R
0805
10%
GND
5V DDC
F1
5V
200mA
1206
COMMON
1
DDC_5V
2
C8
220PF
COMMON
50V
C0G
0402
5%
DDC_5V
5V
PEX_PLLVDD
1V8
2V5
DDC_5V
5V
PEX_PLLVDD
1V8
2V5
0.1A 12MIL
0.15A
0.12A 12MIL
0.12A
12MIL
12MIL
12MIL0.8A
5V
5V
1.1V
1.8V
2.5V
GND
Vout = Ref*(1+(Rbot/Rtop))+Iadj* Rbot
5.06V = 1.25*(1+(499/165))+60uA* 499
IFP PLL Supply 1.8V
PEX_PLLVDD Optional
1
3
U4
UP7707
ADJ_VR=0.8V
SOT23-5
SOT23-5
NO STUFF
2
GND
5
4
PS_1V1_ADJ
C48
22PF
50V
5%
C0G
0402
NO STUFF
GND
R65
1.1K
1%
0402
NO STUFF
R66
2.94K
1%
0402
NO STUFF
2V5
3V3_F
R680
R681
0
0
5%
5%
0402
0402
COMMON
NO STUFF
PS_1V8_VIN
C925
4.7UF
6.3V
10%
X5R
0805
COMMON
GND GND
1
3
C922
.1UF
16V
10%
X7R
0402
COMMON
U503
UP7703NMT5
ADJ_VR=0.8V
SOT23-5
SOT23-5
CHANGED
2
5
4
PS_1V8_ADJ
C906
1000PF
16V
10%
X7R
0402
NO STUFF
120mA
Rtop
R658
23.7K
1%
0402
COMMON
Rbot
R660
18.7K
1%
0402
COMMON
GNDGND
C903
.1UF
16V
10%
X7R
0402
COMMON
GNDGND
1V8
C894
4.7UF
6.3V
10%
X5R
0805
COMMON
Vout = Vadj * (1+Rtop/Rbot)
1.1V = 0.8V * (1+1.1K/2.94K)
3V3_F
GND
C49
4.7UF
6.3V
10%
X5R
0603
NO STUFF
C764
1UF
6.3V
10%
X7R
0603
NO STUFF
PEX_PLLVDD
C47
10UF
10V
10%
X5R
0805
NO STUFF
GND
MIO_VDD 2.5V
Vout = Vadj * (1+Rtop/Rbot)
1.813V = 0.8V * (1+23.7K/18.7K)
Min Cin = 10uF
C24
10UF
10V
10%
X5R
0805
COMMON
5V
GND
C26
.1UF
16V
10%
X7R
0402
COMMON
GND
C23
.47UF
6.3V
10%
X5R
0402
COMMON
GND
SNN_2V5_PGOOD
3V3_F
2.5V @ 0.3A
C28
.1UF
16V
10%
X7R
0402
COMMON
2V5
GND
C25
10UF
10V
10%
X5R
0805
COMMON
U2
UP7706A
SOP8
COMMON
3
4
2
1
8
GND
6
SNN_2V5_NC
5
7
PS_2V5_ADJ
9
GND
C22
1000PF
16V
10%
X7R
0402
COMMON
Rtop
Rbot
R29
22.6K
1%
0402
COMMON
R28
10.5K
1%
0402
COMMON
Min Cout = 10uF
GND
Min ESR = 0.5mohm
Vout = VRef * (1+(Rtop/Rbot))
2.5V = 0.8V * (1+(22.6K/10.5K))
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
www.vinafix.vn
Power Supply: 5V, STEREO_5V, 2V5, DP_PWR
600-10363-0000-100 A
p363_a01
donchen
19 OF 22
28-SEP-2008
Page 20
S
D
G
S
D
G
S
D
G
UGATE
VCC12
PVCC5
BOOT
PHASE
LGATE
SW_FB
COMP
LDO_FB
FS_DIS
LDO_DR
VCC5
GND
PGNDSD
G
S
DGC
E
B
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Page20:POWER SUPPLY: FBVDD,PEX_VDD
NETNAME
FBVDD
1V2
FBVDD
1V2
15A
3A
MIN_LINE_WIDTH VOLTAGEMAX_CURRENT
20MIL
16MIL
1.9V
1.1V
12V_F
12V_F
2.2
R534
0603
5%
COMMON
FBVDD
10
R541
COMMON
0402
PS_FB_VCC5
U502
UP6161NSAC
VR_SW=0.8V
SO14
SO14
CHANGED
9
5
6
2
12
7
5%
PS_FB_RC_CP
C70
.47UF
16V
10%
X5R
4
2
3
R545
1.07K
1%
0402
COMMON
R546
2.43K
1%
0402
COMMON
0603
COMMON
1G2D1S
1
PS_1V1_CP
Stuff AMP3055L in BOM
Q11
AOD4120
COMBI_MONO_1G2D1S
COMMON
MAX_VOLTAGE=30V
R_DS_ON=0.022R@10V,0.029R@4.5V
MAX_CURRENT=75A
MAX_WATTAGE=2.5W@25C,1.6W@70C
V_BE_GS=+/-16V
C63
4.7UF
6.3V
20%
X5R
0603
COMMON
CONTINUOUS_CURRENT=25A@25C,21A@100C
1V2
C62
10UF
16V
10%
X5R
1206
COMMON
GND
C541
10UF
16V
10%
X5R
1206
COMMON
PEXVDD Power Supply
C543
.1UF
16V
10%
X7R
0402
COMMON
1B1C1E
GND
1
12V_F
3
Q508
MMBT2222A
SOT23_1B1C1E
COMMON
2
R543
10K
5%
0402
COMMON
PS_FB_EN*
PEXVDD = 1.2V @ 3A
Vout = Vref * (1+Rtop/Rbot)
1.152V = 0.8V * (1+1.07k/2.43k)
NVVDD
R555
10K
5%
0402
COMMON
R552
30K
5%
0402
COMMON
PS_FB_EN
10UF
16V
10%
X5R
1206
COMMON
GND
R547
200
5%
0402
COMMON
C538
1000PF
16V
10%
X7R
0402
COMMON
1G1D1S
10UF
16V
10%
X5R
1206
COMMON
1
GND
PS_1V1_DR
PS_1V1_FB
PS_FBVDDQ_FS
R544
80.6K
1%
0402
COMMON
~400kHz
GND
3
Q507
2N7002
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
C523
1UF
16V
10%
X5R
0603
COMMON
GND
C72
C69
PS_FB_PVCC5
8
10
1
14
13
11
4
3
GND
GND
PS_FB_BOOT
PS_FB_UGATE
PS_FB_LGATE
PS_FB_FB
PS_FB_COMP
C522
1UF
16V
10%
X5R
0603
COMMON
C524
1UF
16V
10%
X5R
0603
COMMON
C539
.01UF
16V
10%
X7R
0402
COMMON
R548
4.02K
1%
0402
COMMON
PS_FB_VCC12
C536
330PF
50V
5%
C0G
0402
COMMON
R537
0402
1G2D1S
R510
0402
5%
10K
NO STUFF
1G2D1S
1
PS_FB_UGATE_R
0
COMMON
5%
.1UFC530
16V
0402
10%
X7R
COMMON
1
C511
1000PF
16V
10%
X7R
0402
COMMON
Irms = 5.6A @ 2V/15A
C78
10UF
16V
10%
X5R
1206
.47UFC80
16V0603
4
2
Q19
NTD4863NT4G
COMBI_MONO_1G2D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3m@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
PS_FB_PHASE
4
2
Q16
NTD4855NT4G
COMBI_MONO_1G2D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=18A@25C
R_DS_ON=0.0035R@10V
MAX_CURRENT=197A
MAX_WATTAGE=2.24W@25C
V_BE_GS=+/-20V
GND
10%
X5R
COMMON
1G2D1S
1
C504
10UF
16V
10%
X5R
1206
COMMONCOMMON
GND
4
2
Q17
NTD4855NT4G
COMBI_MONO_1G2D1S
NO STUFF
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=18A@25C
R_DS_ON=0.0035R@10V
MAX_CURRENT=197A
MAX_WATTAGE=2.24W@25C
V_BE_GS=+/-20V
GND
C87
270UF
COMMON
20%
16V
NPCAP
5.08A@105C
0.011R
TH_D80P35
GND
DC_RESISTANCE=0.0024R
MAX_CURRENT=40A
CONTINUOUS_CURRENT=29A
MAX_CURRENT=30A
DC_RESISTANCE=0.0029R
CONTINUOUS_CURRENT=21A
D10
1
RSX201L-30
SMA
30V
2A
2
NO STUFF
GND
R550
0402
R549
1.05K
Rbot
1%
0402
CHANGED
GND
C91
270UF
NO STUFF
20%
16V
NPCAP
5.08A@105C
0.011R
TH_D80P35
FBVDD Power Supply
FBVDD = 1.8 - 2.0 V@ 15A
1.2UH
L10
COMMONTH
SMD_420X400
1.0UH
C71
2200PF
50V
10%
X5R
0603
COMMON
PS_FB_SNUB
R84
1
5%
1206
COMMON
L12
NO STUFF
C534
10UF
10V
10%
X5R
0805
COMMON
C537
10UF
10V
10%
X5R
0805
COMMON
GND
PS_FB_SENSE
.022UF
1.65K
C542PS_FB_RC
16V
0402
10%
X7R
COMMON
100
COMMON
1%
R551
0402 CHANGED
1%
Rtop
FBVDDQ = VREF * (1 + (Rtop / Rbot1))
2.057V = 0.8V * (1 + (1.65K/ 1.05K)) FOR HYNIX MEMORY
1.899V = 0.8V * (1 + (1.58K/ 1.15K)) FOR SAMSUNG MEMORY
Will stuff 2x880uF TH_D80
C529
10UF
10V
10%
X5R
0805
COMMON
0
R554
NO STUFF
0402
5%
0
R553
COMMON0402
5%
Remote Sense
C75
1200UF
COMMON
20%
4V
FPCAP
6.1A@105C
0.007R
GND
C67
1200UF
COMMON
20%
4V
FPCAP
6.1A@105C
0.007R
COMBI_TH_D80_D100COMBI_TH_D80_D100
FBVDD
FBVDD
GND
GND
GND
GND
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
Power Supply: FBVDD/Q, 8V5
www.vinafix.vn
600-10363-0000-100 A
p363_a01
donchen
20 OF 22
28-SEP-2008
Page 21
IN
IN
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
IN
IN
S
D
G
IN
2 PHASE PWM
VCC12
BOOT1
UGATE1
PHASE1
LGATE1
UGATE2
LGATE2
PHASE2
BOOT2
IMAX
NC
VCC9
PVCC9
MODE
FB
COMP
RT
REFIN
AGND
SS
NC
NC
PGND3
PGND2
PGND1
S
DGC
E
B
C
E
B
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Page21:POWER SUPPLY: NVVDD
12V_PEX6_F
Irms = 11.4A @ 1.05V/60A/Two phase
MIN_LINE_WIDTH
20MIL
NVVDD
NVVDD
MAX_CURRENTNETNAME
60A
PS_NVVDD_RC_CP
.047UF
C520
16V
0402
10%
X7R
CHANGED
GND
C517
0402
120PF
50V
5%
C0G
CHANGED
R529
0402
8.06K
CHANGED
1%
3V3_F
GND
R539
33K
5%
0402
NO STUFF
15>
R542
10K
5%
0402
NO STUFF
1GPIO3_NVVDD_PHASE
C527
.1UF
16V
10%
X7R
0402
NO STUFF
1G1D1S
R538
1K
5%
0402
NO STUFF
PS_NVVDD_SUS_R
3
Q506
2N7002
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
GND
300KHz per phase
NVVDD ENABLE
C510
.1UF
16V
10%
X7R
0402
COMMON
THERM_SHUTDOWN*
12V_F
16>
3V3_F
R512
15K
5%
0402
COMMON
R513
10K
5%
0402
COMMON
GND
C521
1UF
16V
10%
X5R
0603
COMMON
GND
R531
20.5K
1%
0402
CHANGED
GND
R509
12.7K
1%
0402
COMMON
PS_NVVDD_EN
R511
1K
1%
0402
COMMON
GND
VOLTAGE
1.1V
R527
0402
PS_NVVDD_SUS
1B1C1E
1
1B1C1E
1
C507
.1UF
16V
10%
X7R
0402
COMMON
5%
C508
.047UF
16V
X7R
0402
COMMON
GND
2.2
COMMON
GND
3
PS_NVVDD_EN*
Q503
MMBT2222A
SOT23_1B1C1E
COMMON
2
PS_NVVDD_EN_AND
3
Q501
MMBT2222A
SOT23_1B1C1E
COMMON
2
C518
1UF
16V
10%
X5R
0603
COMMON
PS_NVVDD_PVCC9
PS_NVVDD_CP
PS_NVVDD_FB
PS_NVVDD_FS
PS_NVVDD_SS
PS_NVVDD_VREF
C526
.1UF
16V
10%10%
X7R
0402
NO STUFF
GND
12V_PEX6_F
12V_PEX6_F
PS_NVVDD_VCC9
GND
R514
10K
5%
0402
COMMON
1G1D1S
1
U501
UP6205NQAG
VR_SW=0.6V
QFN24
COMMON
21
22
10
11
7
9
14
6
5
2
17
25
3
Q502
2N7002
SOT23_1G1D1S
COMMON
2
GND
2.2
R520
COMMON
0603
5%
1
12
SNN_NVVDD_NC1
SNN_NVVDD_NC2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND
13
SNN_NVVDD_NC3
C516
1UF
16V
10%
X5R
0603
COMMON
PS_NVVDD_VCC
20
3
PS_NVVDD_BOOT1
4
PS_NVVDD_PH1
24
PS_NVVDD_DRVL1
23
PS_NVVDD_DRVH2
16
PS_NVVDD_BOOT2
15
PS_NVVDD_PH2
18
19
8
PS_NVVDD_OC
R533
40.2K
1%
0402
CHANGED
GND
Imax_total = 110A
PS_NVVDD_DRVH1
PS_NVVDD_DRVL2
15> 15<
4
R540
0402
5%
0
COMMON
C528
PS_NVVDD_DRVH1_R
.1UF
25V
0603
10%
X7R
COMMON
1G2D1S
R536
10K
5%
0402
NO STUFF
1G2D1S
1
1
C531
1000PF
16V
10%
X7R
0402
COMMON
2
Q14
NTD4863NT4G
COMBI_MONO_1G2D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3m@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
4
2
Q12
NTD4855NT4G
COMBI_MONO_1G2D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=18A@25C
R_DS_ON=0.0035R@10V
MAX_CURRENT=197A
MAX_WATTAGE=2.24W@25C
V_BE_GS=+/-20V
GND
12V_PEX6_F
5%
C509
0603
.1UF
25V
10%
X7R
COMMON
R508
10K
5%
0402
NO STUFF
1G2D1S
1G2D1S
1
1
C506
1000PF
16V
10%
X7R
0402
COMMON
4
2
Q18
NTD4863NT4G
COMBI_MONO_1G2D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3m@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
4
2
Q21
NTD4855NT4G
COMBI_MONO_1G2D1S
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=18A@25C
R_DS_ON=0.0035R@10V
MAX_CURRENT=197A
MAX_WATTAGE=2.24W@25C
V_BE_GS=+/-20V
GND
PS_NVVDD_DRVH2_R
0R515
COMMON
0402
3V3_F
R532
10K
5%
0402
GPIO5_VSEL0
NO STUFF
R530
10K
5%
0402
COMMON
R535
0402
NVVDD_VSEL0
10K
COMMON
5%
3V3_F
15> 15<
GND
GPIO6_VSEL1
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
Power Supply: NVVDD Regulator
R521
10K
5%
0402
COMMON
GND
R524
10K
5%
0402
NO STUFF
www.vinafix.vn
R525
0402
4
1G2D1S
1G2D1S
1G2D1S
1G2D1S
1G1D1S
1
C525
1000PF
16V
10%
X7R
0402
COMMON
GND
10K
COMMON
5%
2
Q15
NTD4863NT4G
COMBI_MONO_1G2D1S
1
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3m@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
4
2
Q13
NTD4855NT4G
COMBI_MONO_1G2D1S
1
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=18A@25C
R_DS_ON=0.0035R@10V
MAX_CURRENT=197A
V_BE_GS=+/-20V
GND
4
2
Q22
NTD4863NT4G
COMBI_MONO_1G2D1S
1
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=11.3A@25C
R_DS_ON=9.3m@10V
MAX_CURRENT=98A
MAX_WATTAGE=1.95W@25C
V_BE_GS=+/-20V
4
2
Q20
NTD4855NT4G
COMBI_MONO_1G2D1S
1
COMMON
3
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=18A@25C
R_DS_ON=0.0035R@10V
MAX_CURRENT=197A
V_BE_GS=+/-20V
GND
3
Q505
BSS138
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
NVVDD_VSEL1 1
R528
11.8K
1%
0402
CHANGED
NVVDD_RBOT1
GND
1G1D1S
C519
1000PF
16V
10%
X7R
0402
COMMON
Rbot2Rbot1
Q504
3
BSS138
SOT23_1G1D1S
COMMON
2
C84
.47UF
16V
10%
X5R
0603
COMMON
GND
D9
1
RSX201L-30
SMA
30V
2A
2MAX_WATTAGE=2.24W@25C
NO STUFF
GND
C74
.47UF
16V
10%
X5R
0603
COMMON
GND
D11
1
RSX201L-30
SMA
30V
2A
2MAX_WATTAGE=2.24W@25C
NO STUFF
GND
R526
3.65K
1%
0402
CHANGED
NVVDD_RBOT2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
1
2
GND
PS_NVVDD_RC2
R85
1
5%
1206
COMMON
GND
C505
10UF
16V
10%
X5R
1206
COMMON
C66
2200PF
50V
10%
X5R
0603
COMMON
PS_NVVDD_RC1
R83
1
5%
1206
COMMON
C514
10UF
16V
10%
X5R
1206
COMMON
C79
2200PF
50V
10%
X5R
0603
COMMON
Rbot
C83
10UF
16V
10%
X5R
1206
COMMON
L8
SMD_520X508
L7
C76
10UF
16V
10%
X5R
1206
COMMON
L11
SMD_520X508
L9
TH
R523
1.69K
1%
0402
CHANGED
GND
C90
270UF
COMMON
20%
16V
NPCAP
5.08A@105C
0.011R
TH_D80P35
GND
0.47uH
NO STUFF
1.0UH
COMMON
TH
DC_RESISTANCE=0.0017R
MAX_CURRENT=40A
CONTINUOUS_CURRENT=30A
C89
270UF
COMMON
20%
16V
NPCAP
5.08A@105C
0.011R
TH_D80P35
0.47uH
NO STUFF
1.0UH
COMMON
DC_RESISTANCE=0.0017R
MAX_CURRENT=40A
CONTINUOUS_CURRENT=30A
C515
0402
NVVDD Power Supply
NVVDD = 1.05-1.1V @ 55-60A
DC_RESISTANCE=0.0017R
MAX_CURRENT=36A
CONTINUOUS_CURRENT=31A
C88
270UF
NO STUFF
20%
16V
NPCAP
5.08A@105C
0.011R
TH_D80P35
GND
DC_RESISTANCE=0.0017R
MAX_CURRENT=36A
CONTINUOUS_CURRENT=31A
Rtop
R522
0402
1%
PS_NVVDD_RC
.01UF
16V
10%
X7R
COMMON
NVVDD = 0.6 * (1 + Rtop/Rbot)
GPIO6 GPIO5
0
1
1 1
0
0
GND
GND
1.02K
COMMON
C81
820UF
COMMON
20%
2.5V
NPCAP
6.1A@105C
0.007R
TH_D80P35
C73
820UF
COMMON
20%
2.5V
NPCAP
6.1A@105C
0.007R
TH_D80P35
PS_NVVDD_VSEN
R519
0402
1%
C77
820UF
COMMON
20%
2.5V
NPCAP
6.1A@105C
0.007R
TH_D80P35
C68
820UF
COMMON
20%
2.5V
NPCAP
6.1A@105C
0.007R
TH_D80P35
10.2
COMMON
GND GND
GND
10UF
10V
10%
X5R
0805
COMMON
C64
10UF
10V 10V
10%
X5R
0805
COMMON
GND
R518
0402
C512C535
10UF
10V
10%
X5R
0805
COMMON
C65
10UF
10%
X5R
0805
COMMON
NVVDD
0.95V (Low perfmode)
1.05V (VB0)
1.10V (VB1)
600-10363-0000-100 A
p363_a01
donchen
R517
0402
R516
OPTIONAL
5%
C540
10UF
10V
10%
X5R
0805
COMMON
C532
10UF
10V 10V
10%
X5R
0805
COMMON
GND
5%
0402
5%
0
NO STUFF
0
COMMON
0
NO STUFF
C513
10UF
10V
10%
X5R
0805
COMMON
GNDGND
C533
10UF
10%
X5R
0805
COMMON
GND
NVVDD_SENSE
NVVDD_SENSE_GND
NVVDD
21 OF 22
28-SEP-2008
17>
17>
Page 22
Page22: Power Supply: Filter of 12V,12V_PEX6,3V3
PRSNT*
GND
12V
12V
12V
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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CB
2
1
A
5
4
3
HFD GEBA C
3V3
16MIL
3A
3.3V
NV_SOURCE_POWER_NET=TRUE
C32
C31
4.7UF
4.7UF
20%
20%
X7R
X7R
1206
1206
COMMON
COMMON
GND
C33
.1UF
16V16V16V
10%
X7R
0402
COMMON
7_6X7_6
MAX_CURRENT=8.0A
CONTINUOUS_CURRENT=5.28A
L6
R30
1206
1206
R45
1206
0
2
1
COMMON
N/A
0R40
2
1
COMMON
N/A
0
2
1
NO STUFF
N/A
1uH
NO STUFF
16MIL
3A
3.3V
3V3_F
C30
10UF
16V
10%
X5R
1206
COMMON
GND
POWER FILTER 12V
12V
12V
6A
NV_SOURCE_POWER_NET=TRUE
20MIL
0V
28A
NV_SOURCE_POWER_NET=TRUE
20MIL
GND
C85
1
10UF
16V
10%
2
X5R
1206
COMMON
R504
1206
R506
1206
R507
1206
L13
7_6X7_6
0
2
1
NO STUFF
N/A
0
2
1
NO STUFF
N/A
0
2
1
NO STUFF
N/A
1UH
CHANGED
C502
.1UF
16V
10%
X5R
0402
COMMON
GND
16MIL
5.5A
12V
12V_F
INPUT FROM EXTERNAL
75W PEX EXTENSION POWER
0
R505
NO STUFF
1206
N/A
0
R501
NO STUFF
1206
N/A
0
R503
NO STUFF
J8
29-07022H-6-T-R
MALE
4.2MM
90
PCIEPWR
COMMON
12V_PEX6
6
3
5
2
4
1
12V
6.25A
NV_SOURCE_POWER_NET=TRUE
12V_PEX6
SNN_12V_EXT_6PIN_ON*
16MIL
R86
4.7K
5%
0603
COMMON
C86
.01UF
16V
10%
X7R
0402
COMMON
C503
.1UF
25V
10%
X7R
0603
COMMON
C501
10UF
16V
10%
X5R
1206
COMMON
1206
R502
1206
L14
7_6X7_6
N/A
N/A
0
NO STUFF
1UH
CHANGED
C82
10UF
16V
10%
X5R
1206
COMMON
12V
6.25A
16MIL
12V_PEX6_F
GND
GND
P363 G92-279 512MB GDDR3 16Mx32 DVI-I+DVI-I
Power Supply: Filter of 3V3, 12V, 12V_PEX6
www.vinafix.vn
600-10363-0000-100 A
p363_a01 22 OF 22
donchen
28-SEP-2008
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