MSI MS-V168 Schematic

Page 1
5
PCIE_REFCLKP(10) PCIE_REFCLKN(10)
D D
C C
PCIE_RXP[15..0](10)
PCIE_RXN[15..0](10)
PCIE_TXP[15..0](10)
PCIE_TXN[15..0](10)
PCIE_REFCLKP PCIE_REFCLKN
PCIE_RXP[15..0]
PCIE_RXN[15..0]
PCIE_TXP[15..0]
PCIE_TXN[15..0]
PCIE_VDDC: 1.0V-1.1V,+-5%, 2.5A
B B
A A
5
PCIE_VDDR: 1.8V,+-5%, 700mA
1.1V_REG
4
4
PCIE_RXP0 PCIE_RXN0
PCIE_RXP1 PCIE_RXN1
PCIE_RXP2 PCIE_RXN2
PCIE_RXP3 PCIE_RXN3
PCIE_RXP4 PCIE_RXN4
PCIE_RXP5 PCIE_RXN5
PCIE_RXP6 PCIE_RXN6
PCIE_RXP7 PCIE_RXN7
PCIE_RXP8 PCIE_RXN8
PCIE_RXP9 PCIE_RXN9
PCIE_RXP10 PCIE_RXN10
PCIE_RXP11 PCIE_RXN11
PCIE_RXP12 PCIE_RXN12
PCIE_RXP13 PCIE_RXN13
PCIE_RXP14 PCIE_RXN14
PCIE_RXP15 PCIE_RXN15
PCIE_REFCLKP PCIE_REFCLKN
R21.27K R21.27K R12.0K R12.0K
1.1V_REG
PCIE_VDDR
AM48
AK52
AK48
AH52
AH48 AG49
AG51 AF52
AF48 AE49
AE51 AD52
AD48 AC49
AC51 AB52
AB48 AA49
AA51
AM45 AM44
AF39 AF38
AF37 AA38 AA39 AB37 AB38 AB39 AD37 AD38 AD39 AE37 AE38 AE39
AM40
AH37 AK38 AK39
AK37 AM37 AM38 AM39 AN37 AN38 AN39 AR39 AR40
AA40 AA43 AA47 AB50 AB40 AB43 AC53 AC47 AD50 AD40 AD43 AE53 AE40 AE43 AE47 AF50 AF40 AF43 AG53 AG47
AL49
AL51
AJ49
AJ51
Y52
Y48
W49
W51
V52
V48 U49
U51 T52
W38 W39 W40 W41 W42 W43 W44 W45
AJ38 AJ39
AJ37
U1A
U1A
PCIE_RX0P PCIE_RX0N
PCIE_RX1P PCIE_RX1N
PCIE_RX2P PCIE_RX2N
PCIE_RX3P PCIE_RX3N
PCIE_RX4P PCIE_RX4N
PCIE_RX5P PCIE_RX5N
PCIE_RX6P PCIE_RX6N
PCIE_RX7P PCIE_RX7N
PCIE_RX8P PCIE_RX8N
PCIE_RX9P PCIE_RX9N
PCIE_RX10P PCIE_RX10N
PCIE_RX11P PCIE_RX11N
PCIE_RX12P PCIE_RX12N
PCIE_RX13P PCIE_RX13N
PCIE_RX14P PCIE_RX14N
PCIE_RX15P PCIE_RX15N
PCIE_REFCLKP PCIE_REFCLKN
PCIE_CALRP PCIE_CALRN
PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8 PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12 PCIE_VDDC#13 PCIE_VDDC#14 PCIE_VDDC#15 PCIE_VDDC#16 PCIE_VDDC#17 PCIE_VDDC#18 PCIE_VDDC#19 PCIE_VDDC#20
PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8 PCIE_VDDR#9 PCIE_VDDR#10 PCIE_VDDR#11 PCIE_VDDR#12 PCIE_VDDR#13 PCIE_VDDR#14 PCIE_VDDR#15 PCIE_VDDR#16
PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20
216-0732004-00
216-0732004-00
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
PCIE_TX8P PCIE_TX8N
PCIE_TX9P PCIE_TX9N
PCIE_TX10P PCIE_TX10N
PCIE_TX11P PCIE_TX11N
PCIE_TX12P PCIE_TX12N
PCIE_TX13P PCIE_TX13N
PCIE_TX14P PCIE_TX14N
PCIE_TX15P PCIE_TX15N
PERSTB
PCIE_PVDD
PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31 PCIE_VSS#32 PCIE_VSS#33 PCIE_VSS#34 PCIE_VSS#35 PCIE_VSS#36 PCIE_VSS#37 PCIE_VSS#38 PCIE_VSS#39 PCIE_VSS#40 PCIE_VSS#41 PCIE_VSS#42 PCIE_VSS#43 PCIE_VSS#44 PCIE_VSS#45 PCIE_VSS#46 PCIE_VSS#47 PCIE_VSS#48 PCIE_VSS#49 PCIE_VSS#50 PCIE_VSS#51 PCIE_VSS#52 PCIE_VSS#53 PCIE_VSS#54 PCIE_VSS#55 PCIE_VSS#56 PCIE_VSS#57 PCIE_VSS#58 PCIE_VSS#59 PCIE_VSS#60 PCIE_VSS#61 PCIE_VSS#62 PCIE_VSS#63 PCIE_VSS#64 PCIE_VSS#65 PCIE_VSS#66 PCIE_VSS#67 PCIE_VSS#68 PCIE_VSS#69 PCIE_VSS#70 PCIE_VSS#71 PCIE_VSS#72 PCIE_VSS#73 PCIE_VSS#74 PCIE_VSS#75 PCIE_VSS#76 PCIE_VSS#77 PCIE_VSS#78 PCIE_VSS#79 PCIE_VSS#80 PCIE_VSS#81 PCIE_VSS#82
3
PCIE_TXP0
AK45
PCIE_TXN0
AK44
PCIE_TXP1
AK42
PCIE_TXN1
AK41
PCIE_TXP2
AJ45
PCIE_TXN2
AJ44
PCIE_TXP3
AJ42
PCIE_TXN3
AJ41
PCIE_TXP4
AH45
PCIE_TXN4
AH44
PCIE_TXP5
AH42
PCIE_TXN5
AH41
PCIE_TXP6
AF45
PCIE_TXN6
AF44
PCIE_TXP7
AF42
PCIE_TXN7
AF41
PCIE_TXP8
AE45
PCIE_TXN8
AE44
PCIE_TXP9
AE42
PCIE_TXN9
AE41
PCIE_TXP10
AD45
PCIE_TXN10
AD44
PCIE_TXP11
AD42
PCIE_TXN11
AD41
PCIE_TXP12
AB45
PCIE_TXN12
AB44
PCIE_TXP13
AB42
PCIE_TXN13
AB41
PCIE_TXP14
AA45
PCIE_TXN14
AA44
PCIE_TXP15
AA42
PCIE_TXN15
AA41
AT39
AR37
PCIE_PVDD
PCIE_PVDD: 1.8V,+-3%, 40mA
AH50 AH40 AH43 AJ53 AJ40 AJ43 AJ47 AK50 AK40 AK43 AL53 AL47 AM50 AA53 AM43 AN53 AN40 AN43 AN47 AP50 AR53 Y50 AR43 AR47 AT50 AT40 AT43 AU53 AU40 AU43 AU47 AV50 AW53 AW40 AW43 AW47 AY50 AY40 AY43 BA53 BA47 BB50 BB43 BC53 BB42 BC47 BD50 BD44 BD45 BF53 BE47 BF50 BJ53 BL45 BN46 W47 BN49 T50 U53 U47 V50 W53
3
PCIE_RST# (10)
2
U1J
U1J
BK49
SP_RX0P
BL51
SP_RX0N
BJ50
SP_RX1P
BG52
SP_RX1N
BF48
SP_RX2P
BE49
SP_RX2N
BE51
SP_RX3P
BD52
SP_RX3N
BD48
SP_RX4P
BC49
SP_RX4N
BC51
SP_RX5P
BB52
SP_RX5N
BB48
SP_RX6P
BA49
SP_RX6N
BA51
SP_RX7P
AY52
SP_RX7N
AY48
SP_RX8P
AW49
SP_RX8N
AW51
SP_RX9P
AV52
SP_RX9N
AV48
SP_RX10P
AU49
SP_RX10N
AU51
SP_RX11P
AT52
SP_RX11N
AT48
SP_RX12P
AR49
SP_RX12N
AR51
SP_RX13P
AP52
SP_RX13N
AP48
SP_RX14P
AN49
SP_RX14N
AN51
SP_RX15P
AM52
SP_RX15N
BM47
SP_REFCLKP
BK46
SP_REFCLKN
216-0732004-00
216-0732004-00
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
2
SP_TX0P SP_TX0N
SP_TX1P SP_TX1N
SP_TX2P SP_TX2N
SP_TX3P SP_TX3N
SP_TX4P SP_TX4N
SP_TX5P SP_TX5N
SP_TX6P SP_TX6N
SP_TX7P SP_TX7N
SP_TX8P SP_TX8N
SP_TX9P SP_TX9N
SP_TX10P SP_TX10N
SP_TX11P SP_TX11N
SP_TX12P SP_TX12N
SP_TX13P SP_TX13N
SP_TX14P SP_TX14N
SP_TX15P SP_TX15N
SP_CALRP SP_CALRN
SP_PVDD
1
BH48 BH46
BC45 BC44
BB45 BB44
AY42 AY41
AY45 AY44
AW42 AW41
AW45 AW44
AU42 AU41
AU45 AU44
AT42 AT41
AT45 AT44
AR42 AR41
AR45 AR44
AN42 AN41
AN45 AN44
AM42 AM41
AH39 AH38
AR38
PCIE_PVDD
SP_PVDD: 1.8V,+-5%, 35mA
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Sheet
Sheet
Sheet
of
1 15
of
1 15
of
1 15
Doc No.
Doc No.
Doc No.
1
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 2
5
4
3
2
1
DPAVDDR: 1.1V,+-3%, 200mA
D D
DPAVDDR
DPBVDDR
DPBVDDR: 1.1V,+-3%, 200mA
LVDDC: 1.8V,+-3%, 400mA
DPA_PVDD: 1.8V,+-3%, 20mA
DPB_PVDD: 1.8V,+-3%, 20mA
C C
LPVDD: 1.8V,+-3%, 40mA
AVDD: 1.8V,+-5%, 70mA
VDD1DI: 1.8V,+-5%, 50mA
A2VDD: 3.3V,+-5%, 135mA
VDD2DI: 1.8V,+-5%, 40mA
A2VDDQ: 1.8V,+-5%, 1mA
B B
DPLL_VDDC: 1.1V,+-5%, 100mA
DPLL_PVDD: 1.8V,+-3%, 40mA
LVDDC
DPA_PVDD
GND_DPA_PVSS
DPB_PVDD
GND_DPB_PVSS
R22150R R22150R
LPVDD
GND_LPVSS
DAC1_AVDD
VDD1DI
499R
499R
A2VDD
GND_A2VSSQ
VDD2DI
GND_VSS2DI
R30
R30
715R
715R
A2VDDQ
DPLL_VDDC
DPLL_PVDD
XTALIN(14)
DP_CALR
GND_AVSSQ
GND_VSS1DI
R29
R29
GND_PVSS
TP7TP7
XTALIN
U1B
U1B
BD29
DPAVDDR#1
BE29
DPAVDDR#2
BG25
DPAVSSR#1
BN27
DPAVSSR#2
BN25
DPAVSSR#3
BG27
DPAVSSR#4
BK26
DPAVSSR#5
BK28
DPAVSSR#6
BM24
DPAVSSR#7
BD30
DPBVDDR#1
BE30
DPBVDDR#2
BK32
DPBVSSR#1
BG31
DPBVSSR#2
BN29
DPBVSSR#3
BN31
DPBVSSR#4
BH32
DPBVSSR#5
BK30
DPBVSSR#6
BG29
DPBVSSR#7
BG37
T2XVDDC#1
BK38
T2XVDDC#2
BK44
T2VXDDC#3
BM44
T2XVDDC#4
BG35
T2XVSSR#1
BN41
T2XVSSR#2
BM34
T2XVSSR#3
BG39
T2XVSSR#4
BK36
T2XVSSR#5
BJ43
T2XVSSR#6
BN43
T2XVSSR#7
BK40
T2XVSSR#8
BN35
T2XVSSR#9
BN37
T2XVSSR#10
BN39
T2XVSSR#11
BG41
T2XVSSR#12
BH42
T2XVSSR#13
BE26
DPA_PVDD
BD26
DPA_PVSS
BE28
DPB_PVDD
BD28
DPB_PVSS
BC29
DP_CALR
BN33
T2PVDD
BL33
T2PVSS
BC40
AVDD
BB40
AVSSQ
BG45
VDD1DI
BE44
VSS1DI
RSET
BA40
RSET
BD39
A2VDD
BC39
A2VSSQ
BD43
VDD2DI
BE43
VSS2DI
R2SET
BB39
R2SET
BE39
A2VDDQ
BD33
DPLL_VDDC
BG33
DPLL_PVDD
BE33
DPLL_PVSS
AV37
BH44
BJ45
TP922milTP922mil
PLLTEST
XTALIN
XTALOUT
DDC3DATA_DP3_AUXN
DDC3CLK_DP3_AUXP
DDC4CLK_DP4_AUXP
DDC4DATA_DP4_AUXN
216-0732004-00
216-0732004-00
TX0P_DPA2P TX0M_DPA2N
TX1P_DPA1P TX1M_DPA1N
TX2P_DPA0P TX2M_DPA0N
TXCAP_DPA3P TXCAM_DPA3N
TX3P_DPB2P TX3M_DPB2N
TX4P_DPB1P TX4M_DPB1N
TX5P_DPB0P TX5M_DPB0N
TXCBP_DPB3P TXCBM_DPB3N
TXOUT_L0P TXOUT_L0N
TXOUT_L1P TXOUT_L1N
TXOUT_L2P TXOUT_L2N
TXOUT_L3P TXOUT_L3N
TXCLK_LP TXCLK_LN
TXOUT_U0P TXOUT_U0N
TXOUT_U1P TXOUT_U1N
TXOUT_U2P TXOUT_U2N
TXOUT_U3P TXOUT_U3N
TXCLK_UP TXCLK_UN
HPD1
HSYNC VSYNC
H2SYNC V2SYNC
COMP
DDC1CLK
DDC1DATA
DDC2CLK
DDC2DATA
BM26
DPA2P (10)
BL25
DPA2N (10)
BJ27
DPA1P (10)
BH26
DPA1N (10)
BM28
DPA0P (10)
BL27
DPA0N (10)
BJ25
DPA3P (10)
BK24
DPA3N (10)
BM30
DPB2P (10)
BL29
DPB2N (10)
BJ31
DPB1P (10)
BH30
DPB1N (10)
BM32
DPB0P (10)
BL31
DPB0N (10)
BJ29
DPB3P (10)
BH28
DPB3N (10)
BJ35
TXOUT_L0+ (10)
BH34
TXOUT_L0- (10)
BM36
TXOUT_L1+ (10)
BL35
TXOUT_L1- (10)
BJ37
TXOUT_L2+ (10)
BH36
TXOUT_L2- (10)
BM38
TXOUT_L3+ (10)
BL37
TXOUT_L3- (10)
BK34 BJ33
BM40 BL39
BJ41 BH40
BM42 BL41
BL43 BK42
BJ39 BH38
AW39
BC42
R
BC43
Rb
BD42
G
BE42
Gb
BE40
B
BD40
Bb
AY39 BA39
BC37
R2
BC36
R2b
BD37
G2
BE37
G2b
BE36
B2
BD36
B2b
AY37 AW37
BB36 BA37
Y
BB37
C
BC32
SCL
BB32
SDA
AU37 AU38
AY36 BA36
BB28 BC28
BB26 BC26
TXCLK_L+ (10)
TXCLK_L- (10)
TXOUT_U0+ (10)
TXOUT_U0- (10)
TXOUT_U1+ (10)
TXOUT_U1- (10)
TXOUT_U2+ (10)
TXOUT_U2- (10)
TXOUT_U3+ (10)
TXOUT_U3- (10)
TXCLK_U+ (10)
TXCLK_U- (10)
HPD1 (10)
VGA_RED
VGA_GRN
VGA_BLU
HSYNC (10,14)
H2SYNC (14) V2SYNC (14)
DDC1CLK (10) DDC1DAT (10)
DDC2CLK (10) DDC2DAT (10)
DPA_AUXN (10) DPA_AUXP (10)
DPB_AUXP (10) DPB_AUXN (10)
VSYNC (10,14)
PLACE RGB TERMINATION RESISTORS CLOSE TO ASIC
R26
R26 150R
150R
+3VRUN
R33
R33
R37
R37
4.7K
4.7K
4.7K
4.7K
VGA_RED (10)
VGA_GRN (10)
VGA_BLU (10)
R28
R28
R27
R27
150R
150R
150R
150R
CON1
I2C_CLK (10)
I2C_DAT (10)
CON1
37 36
20347
20347
GENERICD
35
35
34
34
33
33
32
32
31
31
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
GPIO2
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
TAB1
CLK_B
11TAB2
ALL DATA AND SIGNAL TRACES HAVE TO MATCHING WITH CLK_B WITH IN +/-5 MM
D23 D22 D21 D20 D19 D18
D17 D16 D15 D14 D13 D12 DE_A
CLK_A
D11 D10 D9 D8 D7 D6
D5 D4 D3 D2 D1 D0 DE_B
1.8V_REG
R11 221RR11 221R
R21 110RR21 110R C12 100nFC12 100nF
TH_PWM(10)
R20 10KR20 10K
BLON_PWM(10)
TSVDD
TSVSS
FPVCC(10)
+3VRUN
R311KR31 1K
VREFG
R321KR32 1K
VDDR3
VDDR4_5
R465
R465 1K
1K
DNI
DNI
CTF
U1K
U1K
BG21
VREFG
AU29
VDDR3#1
AU30
VDDR3#2
AU32
VDDR3#3
AU33
VDDR3#4
BB24
VDDR5#1
BE24
VDDR5#2
BC24
VDDR5#3
BD24
VDDR5#4
BE25
VDDR4#1
BD25
VDDR4#2
BB25
VDDR4#3
BC25
VDDR4#4
AV36
TS_FDO
AV30
DPLUS
AW30
DMINUS
AU24
TSVDD
AU25
TSVSS
BA30
VARY_BL
BB30
DIGON
AU39
JMODE
R231KR23 1K
BG19
VSSD#1
BA22
VSSD#2
AV28
VSSD#3
BA29
VSSD#4
BA35
VSSD#5
AW36
VSSD#6
BA26
VSSD#7
AY30
VSSD#8
BM22
VSSD#9
BN19
VSSD#10
AU22
VSSD#11
BG43
VSSD#12
AU28
VSSD#13
AU26
VSSD#14
AR19
NC_GPIO_31
AP19
NC_GPIO_32
BA19
TEST_YCLK
AY19
TEST_MCLK
216-0732004-00
216-0732004-00
+3VRUN_BUS
C936
C936 100nF
100nF
2
D
1
C
DVPCNTL_MVP_0 DVPCNTL_MVP_1
GPIO_3_SMBDAT GPIO_4_SMBCLK
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_20_PWRCNTL_1
GPIO_22_ROMCSB
GPIO_23_CLKREQB
GPIO_24_TRSTB
R485 1MR485 1M
C937
C937 100nF
100nF
U32
U32
8PR7
NC7SZ74K8X
NC7SZ74K8X
5
Q
Vcc
3
G4CL
Q
6
DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8
DVPDATA_9 DVPDATA_10 DVPDATA_11
DVPCLK
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23
GPIO_0 GPIO_1 GPIO_2
GPIO_5
GPIO_6_TACH
GPIO_7
GPIO_11 GPIO_12 GPIO_13
GPIO_19_CTF
GPIO_21
GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS GPIO_28_TDO
GENERICA GENERICB GENERICC GENERICD GENERICE GENERICF GENERICG GENERICH
VPCLK0
DVALID
PSYNC VHAD_0 VHAD_1
VPHCTL
VIPCLK
VIP_0 VIP_1 VIP_2 VIP_3 VIP_4 VIP_5 VIP_6 VIP_7
BH20 BK20 BM20 BJ21 BL21 BN21 BH22 BK22 BG23 BJ23 BN23 BL23
BK18
BM18 BJ19 BL19
AW25 AY24 AV25 AY25 AY26 AW26 BA28 AV26 AY28 AW28 AY29 AW29
AW24 AV24
BA24 AV29 BH24 BD22 BA25 BE22 AY22 BC22 BB22 BA21 BB21 AW22 BE21 BD21 BD19 BB19 BC19 BE19 AY21 BH18 BN17 BG17 BC21 AW21 BL17 BM16 BH16 BK16 BJ17
BC35 BE32 BC33 BA33 BC30 BD35 BB29 BD32
AV35 AW35 AY35 AV33 AW33 AY33 AV32 AW32
AY32 BB33 BE35 AU36 AU35
BB35 BA32
+3VRUN_BUS
Q7
1
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11
CLK_B
DE_B
D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23
DE_A CLK_A
R292 0RR292 0R R291 0RR291 0R
R256 0RR256 0R
CTF
JTAG122milJTAG122mil JTAG222milJTAG222mil JTAG322milJTAG322mil JTAG422milJTAG422mil JTAG522milJTAG522mil
GENERICD
R200
R200 100K
100K
32
2N7002EQ72N7002E
GPIO0 (14) GPIO1 (14) GPIO2 (14) PBAT_SMBDAT (10) PBAT_SMBCLK (10)
MEM_PP (12) OPT_BL_ENA (10)
SCLK (14) GPIO11 (14) GPIO12 (14) GPIO13 (14) HPD2 (10)
GPIO16_SS (14)
HPD3 (10)
GPIO21 (14)
CLKREQB (10)
GENERICA (10) GENERICB (10) GENERICC (14)
VGA/TV# (10) HDTV#/TV (10)
VID_0 (14) VID_1 (14) VID_2 (14)
VID_3 (14) MEM_ID0 (14) MEM_ID1 (14)
VID_6 (14) MEM_ID2 (14)
VID1 (11) DVALID (14) PSYNC (14)
VHAD0 (14)
VID2 (11)
VID3 (11)
CTFb (10)
R25
R25 10K
10K
+3VRUN
10K
10K R196
R196
R464 10K
R464 10K
DNI
DNI
100K
100K R169
R169
SCS# (14)
+3VRUN
DNI
PWR_LEVEL (10,11)
GPIO8 (14)
SOUT (14) SIN (14)
GPIO9 (14)
+3VRUN
OTEMP# (10)
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
5
4
3
2
M98-L 1GB DDR3 MXM 3.0 CF
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Friday, May 16, 2008
Friday, May 16, 2008
Friday, May 16, 2008
Sheet
Sheet
Sheet
of
2 15
of
2 15
of
2 15
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 3
5
4
3
2
1
RASB0# RASB1#
CASB0# CASB1#
WEB0# WEB1#
CKEB0 CKEB1
CSB0_0# CSB1_0# CSB0_1# CSB1_1#
CLKB0 CLKB0#
CLKB1 CLKB1#
WDQSB[7..0]
RDQSB[7..0]
DQMB#[7..0]
MDB[63..0]
MAB[11..0]
B_BA0 B_BA1
VDD_MEM
C19
C19 100nF
100nF
VDD_MEM
R48
R48
40.2R
40.2R
1%
PLACE MVREF CAPS AS CLOSE TO ASIC AS POSSIBLE
R49
R49
C21
C21
100R
100R
100nF
100nF
1%
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7
DQMB#0 DQMB#1 DQMB#2 DQMB#3
RDQSB0 RDQSB1 RDQSB2 RDQSB3
WDQSB0 WDQSB1 WDQSB2 WDQSB3
WEB0# CSB0_0# CSB0_1# CSB1_1# CASB0# RASB0#
CKEB0 CLKB0 CLKB0# CLKB1#
R43 243RR43 243R R44 243RR44 243R
WDQSB[7..0](7)
RDQSB[7..0](7)
DQMB#[7..0](7)
MDB[63..0](7)
MAB[11..0](7)
VDD_MEM
R39
R39
40.2R
40.2R
1%
R42
R42 100R
100R
1%
RASB0#(7) RASB1#(7)
CASB0#(7) CASB1#(7)
WEB0#(7) WEB1#(7)
CKEB0(7) CKEB1(7)
CSB0_0#(7) CSB1_0#(7) CSB0_1#(7)
CLKB0(7)
CLKB0#(7)
CLKB1(7)
CLKB1#(7)
B_BA0(7) B_BA1(7)
RASA0#(6) RASA1#(6)
CASA0#(6)
D D
CASA1#(6)
WEA0#(6) WEA1#(6)
CKEA0(6) CKEA1(6)
CSA0_0#(6) CSA1_0#(6) CSA0_1#(6) CSB1_1#(7) CSA1_1#(6)
CLKA0(6)
CLKA0#(6)
CLKA1(6)
CLKA1#(6)
WDQSA[7..0](6)
RDQSA[7..0](6)
DQMA#[7..0](6)
MDA[63..0](6)
MAA[11..0](6)
A_BA0(6) A_BA1(6) B_BA2(7) A_BA2(6)
C C
VDD_MEM
B B
R38
R38
40.2R
40.2R
1%
R40
R40 100R
100R
1%
RASA0# RASA1#
CASA0# CASA1#
WEA0# WEA1#
CKEA0 CKEA1
CSA0_0# CSA1_0# CSA0_1# CSA1_1#
CLKA0 CLKA0#
CLKA1 CLKA1#
WDQSA[7..0]
RDQSA[7..0]
DQMA#[7..0]
MDA[63..0]
MAA[11..0]
A_BA0 A_BA1 B_BA2 A_BA2
VDD_MEM
C18
C18 100nF
100nF
VDD_MEM
R47
R47
40.2R
40.2R
1%
PLACE MVREF CAPS
AS CLOSE TO ASIC AS POSSIBLE
R50
R50
C20
C20
100R
100R
100nF
100nF
1%
MEM_RST(6,7,8,9)
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7
DQMA#0 DQMA#1 DQMA#5 DQMA#2 DQMA#3
RDQSA0 RDQSA1 RDQSA2
WDQSA0 WDQSA1 WDQSA2
WEA0# CSA0_0# CSA0_1# CSA1_1# CASA0# RASA0#
CKEA0 CLKA0 CLKA0#
R41 243RR41 243R R45 243RR45 243R
R46 10KR46 10K
C469 1uF_6.3VC469 1uF_6.3V
MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17
MDA18
MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31
AW19
V40 R42 V41 R41 V42 V43 U45 P44 M48 M50 L53 L51 P48 P50 P52 N53 L49 J51 K50 K48 G52 H48 F48 C51 C43 F44 E43 D44 A46 D46 F46 B47
L44 M45 P40 M44 R43 P43 J43 K44 M42
K45
R51 R49 E50 D49
U44 N49 J49 C45
U43 N51 H50 E45
U38 R39 R40 J44 P45
L43 U40 U39
U33 U32
T32 P36
U1C
U1C
DQA0_0 DQA0_1 DQA0_2 DQA0_3 DQA0_4 DQA0_5 DQA0_6 DQA0_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 DQA0_16 DQA0_17 DQA0_18 DQA0_19 DQA0_20 DQA0_21 DQA0_22 DQA0_23 DQA0_24 DQA0_25 DQA0_26 DQA0_27 DQA0_28 DQA0_29 DQA0_30 DQA0_31
MAA0_0 MAA0_1 MAA0_2 MAA0_3 MAA0_4 MAA0_5 MAA0_6 MAA0_7 MAA0_8
ADBIA0
WCKA0_0 WCKA0B_0 WCKA0_1 WCKA0B_1
EDCA0_0 EDCA0_1 EDCA0_2 EDCA0_3
DDBIA0_0 DDBIA0_1 DDBIA0_2 DDBIA0_3
WEA0B CSA0B_0 CSA0B_1 CASA0B RASA0B
CKEA0 CLKA0 CLKA0B
MVREFAS MVREFAD
MEM_CALRPA MEM_CALRNA
DRAM_RST
216-0732004-00
216-0732004-00
DQA1_0 DQA1_1 DQA1_2 DQA1_3 DQA1_4 DQA1_5 DQA1_6 DQA1_7 DQA1_8
DQA1_9 DQA1_10 DQA1_11 DQA1_12 DQA1_13 DQA1_14 DQA1_15 DQA1_16 DQA1_17 DQA1_18 DQA1_19 DQA1_20 DQA1_21 DQA1_22 DQA1_23 DQA1_24 DQA1_25 DQA1_26 DQA1_27 DQA1_28 DQA1_29 DQA1_30 DQA1_31
MAA1_0 MAA1_1 MAA1_2 MAA1_3 MAA1_4 MAA1_5 MAA1_6 MAA1_7 MAA1_8
ADBIA1
WCKA1_0
WCKA1B_0
WCKA1_1
WCKA1B_1
EDCA1_0 EDCA1_1 EDCA1_2 EDCA1_3
DDBIA1_0 DDBIA1_1 DDBIA1_2 DDBIA1_3
WEA1B CSA1B_0 CSA1B_1
CASA1B RASA1B
CKEA1
CLKA1
CLKA1B
MPVDD#0 MPVDD#1 MPVDD#2
MDA32
D30
MDA33
A31
MDA34
F30
MDA35
E29
MDA36
D32
MDA37
C33
MDA38
E33
MDA39
F32
MDA40
J35
MDA41
L32
MDA42
L35
MDA43
K35
MDA44
M30
MDA45
L33
MDA46
L30
MDA47
J29
MDA48
F34
MDA49
A35
MDA50
E35
MDA51
C35
MDA52
E37
MDA53
C37
MDA54
B38
MDA55
A37
MDA56
F42
MDA57
E41
MDA58
A43
MDA59
D42
MDA60
D40
MDA61
E39
MDA62
C39
MDA63
F40
MAA8
J42
MAA9
K40
MAA10
L37
MAA11
J40 J37
A_BA2
K37
A_BA0
M39
A_BA1
M40 K42
L42
DQMA#4
B34 D34
DQMA#6
D38
DQMA#7
F38
RDQSA4
C31
RDQSA5
J32
RDQSA6
D36
RDQSA7RDQSA3
C41
WDQSA4
E31
WDQSA5
K32
WDQSA6
F36
WDQSA7WDQSA3
A41
WEA1#
N36
CSA1_0#
P37 R37
CASA1#
N39
RASA1#
L39
CKEA1
T37
CLKA1
M36
CLKA1#
L36
J10 K10 K9
MEM_PLL
MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12
MDB13 MDB14 MDB15 MDB16 MDB17 MDB18
MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30
U1D
U1D
P35 P32 T35 P33 N30 P30 R32 R35 M25 M28 N25 T26 K26
J26 R29 N28 A29 C29 F28 D28 A27 D26 E25 F26 E21 D22 C21 A21 C23 E23 F24 D24
J24 L24 L25 P24 L28 P25 N22 P22 L22
M22
K29 L29 C25 A25
N33 L26 E27 F22
M33 M26 C27 A23
T29 P26 R26 R24 K24
T24 P29 P28
T17 U18
T21 R21
216-0732004-00
216-0732004-00
DQB0_0 DQB0_1 DQB0_2 DQB0_3 DQB0_4 DQB0_5 DQB0_6 DQB0_7 DQB0_8 DQB0_9 DQB0_10 DQB0_11 DQB0_12 DQB0_13 DQB0_14 DQB0_15 DQB0_16 DQB0_17 DQB0_18 DQB0_19 DQB0_20 DQB0_21 DQB0_22 DQB0_23 DQB0_24 DQB0_25 DQB0_26 DQB0_27 DQB0_28 DQB0_29 DQB0_30 DQB0_31
MAB0_0 MAB0_1 MAB0_2 MAB0_3 MAB0_4 MAB0_5 MAB0_6 MAB0_7 MAB0_8
ADBIB0
WCKB0_0 WCKB0B_0 WCKB0_1 WCKB0B_1
EDCB0_0 EDCB0_1 EDCB0_2 EDCB0_3
DDBIB0_0 DDBIB0_1 DDBIB0_2 DDBIB0_3
WEB0B CSB0B_0 CSB0B_1 CASB0B RASB0B
CKEB0 CLKB0 CLKB0B
MVREFBS MVREFBD
MEM_CALRPB MEM_CALRNB
DQB1_0 DQB1_1 DQB1_2 DQB1_3 DQB1_4 DQB1_5 DQB1_6 DQB1_7 DQB1_8
DQB1_9 DQB1_10 DQB1_11 DQB1_12 DQB1_13 DQB1_14 DQB1_15 DQB1_16 DQB1_17 DQB1_18 DQB1_19 DQB1_20 DQB1_21 DQB1_22 DQB1_23 DQB1_24 DQB1_25 DQB1_26 DQB1_27 DQB1_28 DQB1_29 DQB1_30 DQB1_31
MAB1_0 MAB1_1 MAB1_2 MAB1_3 MAB1_4 MAB1_5 MAB1_6 MAB1_7 MAB1_8
ADBIB1
WCKB1_0
WCKB1B_0
WCKB1_1
WCKB1B_1
EDCB1_0 EDCB1_1 EDCB1_2 EDCB1_3
DDBIB1_0 DDBIB1_1 DDBIB1_2 DDBIB1_3
WEB1B CSB1B_0 CSB1B_1
CASB1B RASB1B
CKEB1 CLKB1
CLKB1B
MDB32
C3
MDB33
D5
MDB34
B7
MDB35
D8
MDB36
E9
MDB37
F10
MDB38
D10
MDB39
A11
MDB40
K18
MDB41
L18
MDB42
L17
MDB43
M17
MDB44
M12
MDB45
L12
MDB46
K12
MDB47
J12
MDB48
F12
MDB49
D12
MDB50
C13
MDB51MDB19
A13
MDB52
F14
MDB53
C15
MDB54
A15
MDB55
E15
MDB59
F20
MDB57
C17
MDB58
D20
MDB56
C19
MDB60
E19
MDB61
D18
MDB62
E17
MDB63MDB31
A17
MAB8
J18
MAB9
M19
MAB10
P18
MAB11
T18 N17
B_BA2
R18
B_BA0
N19
B_BA1
P21 L19
J21
DQMB#4
C11
DQMB#5
E11
DQMB#6
D16
DQMB#7
F16
RDQSB4
F8
RDQSB5
K15
RDQSB6
E13
RDQSB7
A19
WDQSB4
C9
WDQSB5
J15
WDQSB6
D14
WDQSB7
F18
WEB1#
P15
CSB1_0#
N15 L14
CASB1#
K21
RASB1#
P19
CKEB1
L21
CLKB1
N14 M14
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
5
4
3
M98-L 1GB DDR3 MXM 3.0 CF
2
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markhaml, Ontario
Markhaml, Ontario
Markhaml, Ontario
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Sheet
Sheet
Sheet
of
3 15
of
3 15
of
3 15
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 4
5
RASC0#(8) RASC1#(8)
CASC0#(8)
D D
CASC1#(8)
WEC0#(8) WEC1#(8)
CKEC0(8) CKEC1(8)
CSC0_0#(8) CSC1_0#(8) CSC0_1#(8) CSC1_1#(8)
CLKC0(8)
CLKC0#(8)
CLKC1(8)
CLKC1#(8)
WDQSC[7..0](8)
RDQSC[7..0](8)
DQMC#[7..0](8)
MDC[63..0](8)
MAC[11..0](8)
C_BA0(8) C_BA1(8)
C C
C_BA2(8)
RASC0# RASC1#
CASC0# CASC1#
WEC0# WEC1#
CKEC0 CKEC1
CSC0_0# CSC1_0# CSC0_1# CSC1_1#
CLKC0 CLKC0#
CLKC1 CLKC1#
WDQSC[7..0]
RDQSC[7..0]
DQMC#[7..0]
MDC[63..0]
MAC[11..0]
C_BA0 C_BA1 C_BA2
DQMC#0 DQMC#1 DQMC#5 DQMC#2 DQMC#3 DQMC#7
RDQSC0 RDQSC1 RDQSC2 RDQSC3
WDQSC0 WDQSC1 WDQSC2
WEC0#
CSC0_1# CSC1_1# CSD0_1# CSD1_1#
CASC0#
VDD_MEM
B B
R51
R51
40.2R
40.2R
R53
R53 100R
100R
1%
C22 100nF
100nF
VDD_MEM
RASC0#
CKEC0 CLKC0 CLKC0#
R55 243RR55 243R R54 243RR54 243R
VDD_MEM
R59
R59
40.2R
40.2R
1%
R61
R61
C24
C24
100R
100R
100nF
100nF
1%
4
U1E
U1E
MDC0
E4
DQC0_0
H4
DQC0_1
G2
DQC0_2
F6
DQC0_3
J5
DQC0_4
K6
DQC0_5
K4
DQC0_6
L1
DQC0_7
V10
DQC0_8
V11
DQC0_9
U11
DQC0_10
U12
DQC0_11
L11
DQC0_12
M11
DQC0_13
M10
DQC0_14
M9
DQC0_15
M6
DQC0_16
M4
DQC0_17
N3
DQC0_18
N1
DQC0_19
P6
DQC0_20
R3
DQC0_21
R1
DQC0_22
R5
DQC0_23
Y6
DQC0_24
W3
DQC0_25
Y4
DQC0_26
W5
DQC0_27
V4
DQC0_28
U3
DQC0_29
U5
DQC0_30
U1
DQC0_31
V9
MAC0_0
W12
MAC0_1
V14
MAC0_2
V16
MAC0_3
U13
MAC0_4
V15
MAC0_5
W13
MAC0_6
AA14
MAC0_7
W11
MAC0_8
AA9
ADBIC0
L3
WCKC0_0
L5
WCKC0B_0
T4
WCKC0_1
T6
WCKC0B_1
H6
EDCC0_0
R10
EDCC0_1
N5
EDCC0_2
W1
EDCC0_3
J3
DDBIC0_0
R9
DDBIC0_1
P4
DDBIC0_2
V6
DDBIC0_3
R14
WEC0B
R13
CSC0B_0
P11
CSC0B_1
AA10
CASC0B
W14
RASC0B
AA11
CKEC0
P13
CLKC0
P12
CLKC0B
U16
MVREFCS
V17
MVREFCD
AA16
MEM_CALRPC
AA15
MEM_CALRNC
216-0732004-00
216-0732004-00
PLACE MVREF CAPS AS CLOSE TO ASIC AS POSSIBLE
MAC0 MAC1 MAC2 MAC3 MAC4 MAC5 MAC6 MAC7
MDC1 MDC2 MDC3 MDC4 MDC5 MDC6 MDC7 MDC8 MDC9 MDC10 MDC11 MDC12 MDC13 MDC14 MDC15 MDC16 MDC17 MDC18 MDC19 MDC20 MDC21 MDC22 MDC23 MDC24 MDC25 MDC26 MDC27 MDC28 MDC29 MDC30 MDC31
DQC1_0 DQC1_1 DQC1_2 DQC1_3 DQC1_4 DQC1_5 DQC1_6 DQC1_7 DQC1_8
DQC1_9 DQC1_10 DQC1_11 DQC1_12 DQC1_13 DQC1_14 DQC1_15 DQC1_16 DQC1_17 DQC1_18 DQC1_19 DQC1_20 DQC1_21 DQC1_22 DQC1_23 DQC1_24 DQC1_25 DQC1_26 DQC1_27 DQC1_28 DQC1_29 DQC1_30 DQC1_31
MAC1_0 MAC1_1 MAC1_2 MAC1_3 MAC1_4 MAC1_5 MAC1_6 MAC1_7 MAC1_8
ADBIC1
WCKC1_0
WCKC1B_0
WCKC1_1
WCKC1B_1
EDCC1_0 EDCC1_1 EDCC1_2 EDCC1_3
DDBIC1_0 DDBIC1_1 DDBIC1_2 DDBIC1_3
WEC1B CSC1B_0 CSC1B_1
CASC1B RASC1B
CKEC1
CLKC1
CLKC1B
AR16 AN14 AR14 AR15 AM15 AM14 AK13 AK14 AJ15 AH12 AH13 AF10 AF9 AF16 AE13 AE12 AJ3 AJ1 AH4 AH6 AG1 AF4 AE5 AF6 AA5 AB4 AA3 AA1 AC5 AD6 AD4 AC3
AD9 AD11 AE11 AD14 AH11 AE14 AB13 AB14 AB11
AB12
AJ10 AJ11 AE3 AE1
AN13 AF11 AG5 AB6
AN12 AF12 AG3 AC1
AJ16 AF14 AF15 AD15 AD10
AD16 AJ14 AH14
MDC32 MDC33 MDC34 MDC35 MDC36 MDC37 MDC38 MDC39 MDC40 MDC41 MDC42 MDC43 MDC44 MDC45 MDC46 MDC47 MDC48 MDC49 MDC50 MDC51 MDC52 MDC53 MDC54 MDC55 MDC56 MDC57 MDC58 MDC59 MDC60 MDC61 MDC62 MDC63
MAC8 MAC9 MAC10 MAC11
C_BA2 C_BA0 C_BA1
DQMC#4
DQMC#6
RDQSC4 RDQSC5 RDQSC6 RDQSC7
WDQSC4 WDQSC5 WDQSC6 WDQSC7WDQSC3
WEC1# CSC1_0#CSC0_0#
CASC1#
RASC1#
CKEC1 CLKC1 CLKC1#
3
WDQSD[7..0](9)
RDQSD[7..0](9)
VDD_MEM
R52
R52
40.2R
40.2R
R56
R56 100R
100R
1%
2
U1F
AR11 AK12 AR10
AN11 AK11
AM11
AY10 AU11
AU10
AW12
AY12 BB10
BB11
AM10
AT13 AU14
AU15 AW13 AW11
AU16
AT12
AT11
AM17
AN17
AM16
AT14
AJ5 AK6 AK4
AL1 AM6 AM4 AN5 AN3
AR9
AJ9
AR3 AR1 AP6 AR5 AU1 AU3 AU5 AV2 BB6 BA5 BC1 BB4 AY6
AW5 AW3
AY4
BB9
AY9 AU9
AP2 AP4 AV4 AV6
AL3 AM9 AT4 BA3
AL5
AT6 BA1
U1F
DQD0_0 DQD0_1 DQD0_2 DQD0_3 DQD0_4 DQD0_5 DQD0_6 DQD0_7 DQD0_8 DQD0_9 DQD0_10 DQD0_11 DQD0_12 DQD0_13 DQD0_14 DQD0_15 DQD0_16 DQD0_17 DQD0_18 DQD0_19 DQD0_20 DQD0_21 DQD0_22 DQD0_23 DQD0_24 DQD0_25 DQD0_26 DQD0_27 DQD0_28 DQD0_29 DQD0_30 DQD0_31
MAD0_0 MAD0_1 MAD0_2 MAD0_3 MAD0_4 MAD0_5 MAD0_6 MAD0_7 MAD0_8
ADBID0
WCKD0_0 WCKD0B_0 WCKD0_1 WCKD0B_1
EDCD0_0 EDCD0_1 EDCD0_2 EDCD0_3
DDBID0_0 DDBID0_1 DDBID0_2 DDBID0_3
WED0B CSD0B_0 CSD0B_1 CASD0B RASD0B
CKED0 CLKD0 CLKD0B
MVREFDS MVREFDD
MEM_CALRPD MEM_CALRND
DQD1_0 DQD1_1 DQD1_2 DQD1_3 DQD1_4 DQD1_5 DQD1_6 DQD1_7 DQD1_8
DQD1_9 DQD1_10 DQD1_11 DQD1_12 DQD1_13 DQD1_14 DQD1_15 DQD1_16 DQD1_17 DQD1_18 DQD1_19 DQD1_20 DQD1_21 DQD1_22 DQD1_23 DQD1_24 DQD1_25 DQD1_26 DQD1_27 DQD1_28 DQD1_29 DQD1_30 DQD1_31
MAD1_0 MAD1_1 MAD1_2 MAD1_3 MAD1_4 MAD1_5 MAD1_6 MAD1_7 MAD1_8
ADBID1
WCKD1_0
WCKD1B_0
WCKD1_1
WCKD1B_1
EDCD1_0 EDCD1_1 EDCD1_2 EDCD1_3
DDBID1_0 DDBID1_1 DDBID1_2 DDBID1_3
WED1B CSD1B_0 CSD1B_1
CASD1B RASD1B
CKED1
CLKD1
CLKD1B
BC18 BB18 BA18 AY18 BE17 BA15 BB15 BD14 BH12 BK12 BN11 BL11 BH14 BK14 BM14 BN13 BJ11 BK10 BM7 BL9 BH10 BH8 BH6 BL3 BC5 BD4 BC3 BF1 BD6 BF6 BF4 BG2
BD11 BE12 AY14 BD12 BC15 BC14 BC9 BD10 BC11
BE10
BL15 BJ15 BK5 BJ4
BD17 BJ13 BJ9 BE3
BC17 BL13 BK8 BE5
AV17 AW15 AY15 BD9 BE14
BB12 AY17 AW17
MDD32 MDD33 MDD34 MDD35 MDD36 MDD37 MDD38 MDD39 MDD40 MDD41 MDD42 MDD43 MDD44 MDD45 MDD46 MDD47 MDD48 MDD49 MDD55 MDD51MDD19 MDD52 MDD53 MDD50 MDD54 MDD56 MDD57 MDD58 MDD59 MDD60 MDD61 MDD62 MDD63MDD31
MAD8 MAD9 MAD10 MAD11
D_BA2 D_BA0 D_BA1
DQMD#4 DQMD#5 DQMD#6 DQMD#7
RDQSD4 RDQSD5 RDQSD6 RDQSD7
WDQSD4 WDQSD5 WDQSD6 WDQSD7WDQSD3
WED1# CSD1_0#
CASD1# RASD1#
CKED1 CLKD1CLKD0 CLKD1#
RASD0#(9) RASD1#(9)
CASD0#(9) CASD1#(9)
WED0#(9) WED1#(9)
CKED0(9) CKED1(9)
CSD0_0#(9) CSD1_0#(9) CSD0_1#(9) CSD1_1#(9)
CLKD0(9)
CLKD0#(9)
CLKD1(9)
CLKD1#(9)
RASD0# RASD1#
CASD0# CASD1#
WED0# WED1#
CKED0 CKED1
CSD0_0# CSD1_0# CSD0_1# CSD1_1#
CLKD0 CLKD0#
CLKD1 CLKD1#
WDQSD[7..0]
RDQSD[7..0]
DQMD#[7..0](9)
MDD[63..0](9)
MAD[11..0](9)
D_BA0(9) D_BA1(9) D_BA2(9)
DQMD#[7..0]
MDD[63..0]
MAD[11..0]
D_BA0 D_BA1 D_BA2
MAD0 MAD1 MAD2 MAD3 MAD4 MAD5 MAD6 MAD7
DQMD#0 DQMD#1 DQMD#2 DQMD#3
RDQSD0 RDQSD1 RDQSD2 RDQSD3
WDQSD0 WDQSD1 WDQSD2
WED0# CSD0_0#
CASD0# RASD0#
MDD0 MDD1 MDD2 MDD3 MDD4 MDD5 MDD6 MDD7 MDD8 MDD9 MDD10 MDD11 MDD12 MDD13 MDD14 MDD15 MDD16 MDD17 MDD18
MDD20 MDD21 MDD22 MDD23 MDD24 MDD25 MDD26 MDD27 MDD28 MDD29 MDD30
CKED0
CLKD0#
C23 100nF
100nFC22
VDD_MEM
R58 243RR58 243RC23 R57 243RR57 243R
1
VDD_MEM
216-0732004-00
R60
R60
40.2R
40.2R
1%
R62
R62 100R
100R
1%
C25
C25 100nF
100nF
216-0732004-00
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
5
4
3
M98-L 1GB DDR3 MXM 3.0 CF
2
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markhaml, Ontario
Markhaml, Ontario
Markhaml, Ontario
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Sheet
Sheet
Sheet
of
4 15
of
4 15
of
4 15
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 5
5
VDD_MEM
C56
C56
C57
C57
2.2UF_2.5V
2.2UF_2.5V
2.2UF_2.5V
C60
C60
2.2UF_2.5V
2.2UF_2.5V
C37
2.2UF_2.5V
2.2UF_2.5V
C79
C79
2.2UF_2.5V
2.2UF_2.5V
C90
C90
2.2UF_2.5V
2.2UF_2.5V
C100
C100
2.2UF_2.5V
2.2UF_2.5V
C114
C114
2.2UF_2.5V
2.2UF_2.5V
C123
C123
2.2UF_2.5V
2.2UF_2.5V
C134
C134
2.2UF_2.5V
2.2UF_2.5V
C140
C140
2.2UF_2.5V
2.2UF_2.5V
2.2UF_2.5V
C61
2.2UF_2.5V
2.2UF_2.5V
C67
C67
2.2UF_2.5V
2.2UF_2.5V
C80
C80
2.2UF_2.5V
2.2UF_2.5V
C91
C91
2.2UF_2.5V
2.2UF_2.5V
C105
C105
2.2UF_2.5V
2.2UF_2.5V
C54
C54
2.2UF_2.5V
2.2UF_2.5V
C124
C124
2.2UF_2.5V
2.2UF_2.5V
C135
C135
2.2UF_2.5V
2.2UF_2.5V
C141
C141
2.2UF_2.5V
2.2UF_2.5V
D D
C C
B B
C33
C33
2.2UF_2.5V
2.2UF_2.5V
C62
C62
2.2UF_2.5V
2.2UF_2.5V
C38
C38
2.2UF_2.5V
2.2UF_2.5V
C39
C39
2.2UF_2.5V
2.2UF_2.5V
C92
C92
2.2UF_2.5V
2.2UF_2.5V
C48
C48
2.2UF_2.5V
2.2UF_2.5V
C115
C115
2.2UF_2.5V
2.2UF_2.5V
C125
C125
2.2UF_2.5V
2.2UF_2.5V
C136
C136
2.2UF_2.5V
2.2UF_2.5V
C142
C142
2.2UF_2.5V
2.2UF_2.5V
C26
C26
2.2UF_2.5V
2.2UF_2.5V
C34
C34
2.2UF_2.5V
2.2UF_2.5V
C55
C55
2.2UF_2.5V
2.2UF_2.5V
C81
C81
2.2UF_2.5V
2.2UF_2.5V
C30
C30
2.2UF_2.5V
2.2UF_2.5V
C106
C106
2.2UF_2.5V
2.2UF_2.5V
C116
C116
2.2UF_2.5V
2.2UF_2.5V
C126
C126
2.2UF_2.5V
2.2UF_2.5V
C137
C137
2.2UF_2.5V
2.2UF_2.5V
C143
C143
2.2UF_2.5V
2.2UF_2.5V
C58
C58
2.2UF_2.5V
2.2UF_2.5V
C35
C35
2.2UF_2.5V
2.2UF_2.5V
C68
C68
2.2UF_2.5V
2.2UF_2.5V
C40
C40
2.2UF_2.5V
2.2UF_2.5V
C43
C43
2.2UF_2.5V
2.2UF_2.5V
C107
C107
2.2UF_2.5V
2.2UF_2.5V
C32
C32
2.2UF_2.5V
2.2UF_2.5V
C127
C127
2.2UF_2.5V
2.2UF_2.5V
C138
C138
2.2UF_2.5V
2.2UF_2.5V
C144
C144
2.2UF_2.5V
2.2UF_2.5V
C59
C59
2.2UF_2.5V
2.2UF_2.5V
C63
C63 10uF_6.3V
10uF_6.3V
C69
C69 10uF_6.3V
10uF_6.3V
C82
C82 10uF_6.3V
10uF_6.3V
C93
C93 10uF_6.3V
10uF_6.3V
C49
C49
2.2UF_2.5V
2.2UF_2.5V
C117
C117 10uF_6.3V
10uF_6.3V
C128
C128 10uF_6.3V
10uF_6.3V
C139
C139 10uF_6.3V
10uF_6.3V
C145
C145 10uF_6.3V
10uF_6.3V
AA12
AD12
AE15 AB15
AH15
AK15
AM12 AN15
AR12 AT15
AU12
AW14 BB14 BE18 BC10 AW18 BE11 BE15 BB17
AB9
AE9
AH9
AJ12
AK9
AN9
AT9
AW9
K11
J14 J17 J30 J33 J36 J19 J22 J25 J28
J39 K43 L45 L10 L15 M18 M21 M24 R22 M29 M32 M35 M37 P14 P17 R19 R25 R28 R30 R33 R36 P39 P42
R11 R45 U14 U42
V12 V39 V45
W9
W15
P9
U9
U1G
U1G
VDDR1#1 VDDR1#2 VDDR1#3 VDDR1#4 VDDR1#5 VDDR1#6 VDDR1#7 VDDR1#8 VDDR1#9 VDDR1#10 VDDR1#11 VDDR1#12 VDDR1#13 VDDR1#14 VDDR1#15 VDDR1#16 VDDR1#17 VDDR1#18 VDDR1#19 VDDR1#20 VDDR1#21 VDDR1#22 VDDR1#23 VDDR1#24 VDDR1#25 VDDR1#26 VDDR1#27 VDDR1#28 VDDR1#29 VDDR1#30 VDDR1#31 VDDR1#32 VDDR1#33 VDDR1#34 VDDR1#35 VDDR1#36 VDDR1#37 VDDR1#38 VDDR1#39 VDDR1#40 VDDR1#41 VDDR1#42 VDDR1#43 VDDR1#44 VDDR1#45 VDDR1#46 VDDR1#47 VDDR1#48 VDDR1#49 VDDR1#50 VDDR1#51 VDDR1#52 VDDR1#53 VDDR1#54 VDDR1#55 VDDR1#56 VDDR1#57 VDDR1#58 VDDR1#59 VDDR1#60 VDDR1#61 VDDR1#62 VDDR1#63 VDDR1#64 VDDR1#65 VDDR1#66 VDDR1#67 VDDR1#68 VDDR1#69 VDDR1#70 VDDR1#71
216-0732004-00
216-0732004-00
4
VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8
VDDCI#9 VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 VDDCI#15 VDDCI#16 VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22 VDDCI#23 VDDCI#24 VDDCI#25 VDDCI#26 VDDCI#27 VDDCI#28 VDDCI#29 VDDCI#30
VDDCT#1 VDDCT#2 VDDCT#3 VDDCT#4
SPVDD SPVSS
3
VCORE_RTN(11) VCORE_SEN(11)
VDD_CORE
C28
C28
C36
C27
C27
C64
C64
10nF
10nF
100nF_6.3V
VDD_CORE
AA17 AB17 AD17 AE17 AF17 AH17 AJ17 AK17 AR17 AT17 AU17 AU18 AU19 U17 U19 U21 U22 U24 U25 U26 U28 U29 U30 U35 U36 U37 V37 W37 W17 AA37
AV22 AU21 AV21 AV19
AT37 AT38
C70
C70
2.2UF_2.5V
2.2UF_2.5V
C83
C83 100nF_6.3V
100nF_6.3V
C47
C47
2.2UF_2.5V
2.2UF_2.5V
C110
C110 100nF_6.3V
100nF_6.3V C52
VDD_CT
SPVDD
GND_SPVSS
C71
C71
2.2UF_2.5V
2.2UF_2.5V
C84
C84 100nF_6.3V
100nF_6.3V
C97
C97
2.2UF_2.5V
2.2UF_2.5V
C111
C111 100nF_6.3V
100nF_6.3V
C72
C72
2.2UF_2.5V
2.2UF_2.5V
C85
C85 10nF
10nF
C98
C98
2.2UF_2.5V
2.2UF_2.5V
C50
C50 10nF
10nF
C73
C73 10uF_6.3V
10uF_6.3V
C99
C99 10uF_6.3V
10uF_6.3V
C29
C29 1nF
1nFC37
C41
C41
1nF
1nF
C44
C44
2.2UF_2.5V
2.2UF_2.5V
C101
C101
2.2UF_2.5V
2.2UF_2.5V
C51
C51 100nF_6.3V
100nF_6.3V
C118
C118 10nF
10nF
C129
C129
2.2UF_2.5V
2.2UF_2.5V
C146
C146 10uF_6.3V
10uF_6.3V
C151
C151 10uF_6.3V
10uF_6.3V
100nF_6.3V
C74
C74 1nF
1nF
C86
C86
2.2UF_2.5V
2.2UF_2.5V
C94
C94
2.2UF_2.5V
2.2UF_2.5V
C102
C102
2.2UF_2.5V
2.2UF_2.5V
C52 10nF
10nF
C119
C119 10nF
10nF
C130
C130 100nF_6.3V
100nF_6.3V
C147
C147 10uF_6.3V
10uF_6.3V
C152
C152 10uF_6.3V
10uF_6.3V
C65
C65
2.2UF_2.5V
2.2UF_2.5VC61
C75
C75
2.2UF_2.5V
2.2UF_2.5V
C87
C87
2.2UF_2.5V
2.2UF_2.5V
C45
C45
2.2UF_2.5V
2.2UF_2.5V
C103
C103 1nF
1nF
C31
C31
2.2UF_2.5V
2.2UF_2.5V
C120
C120
2.2UF_2.5V
2.2UF_2.5V
C131
C131
2.2UF_2.5V
2.2UF_2.5V
C148
C148 10uF_6.3V
10uF_6.3V
C153
C153 10uF_6.3V
10uF_6.3V
C66
C66
2.2UF_2.5V
2.2UF_2.5V
C76
C76
2.2UF_2.5V
2.2UF_2.5V
C88
C88
2.2UF_2.5V
2.2UF_2.5V
C95
C95
2.2UF_2.5V
2.2UF_2.5V
C104
C104 100nF_6.3V
100nF_6.3V
C112
C112
2.2UF_2.5V
2.2UF_2.5V
C121
C121
2.2UF_2.5V
2.2UF_2.5V
C132
C132
2.2UF_2.5V
2.2UF_2.5V
C149
C149 10uF_6.3V
10uF_6.3V
C154
C154 10uF_6.3V
10uF_6.3V
100nF_6.3V
100nF_6.3V
C77
C77
2.2UF_2.5V
2.2UF_2.5V
C42
C42
2.2UF_2.5V
2.2UF_2.5V
C46
C46
2.2UF_2.5V
2.2UF_2.5V
C108
C108 1nF
1nF
C113
C113 100nF_6.3V
100nF_6.3V
C122
C122
2.2UF_2.5V
2.2UF_2.5V
C133
C133
2.2UF_2.5V
2.2UF_2.5V
C150
C150 10uF_6.3V
10uF_6.3V
C36 10uF_6.3V
10uF_6.3V
C78
C78 10uF_6.3V
10uF_6.3V
C89
C89 10uF_6.3V
10uF_6.3V
C96
C96 10uF_6.3V
10uF_6.3V
C109
C109 10uF_6.3V
10uF_6.3V
C53
C53 10uF_6.3V
10uF_6.3V
C467
C467 100nF_6.3V
100nF_6.3V
2
U1H
U1H
1 2
AA19
VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8 VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32 VDDC#33 VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41 VDDC#42 VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58 VDDC#59 VDDC#60 VDDC#61 VDDC#62 VDDC#63 VDDC#64 VDDC#65 VDDC#66 VDDC#67 VDDC#68 VDDC#69 VDDC#70 VDDC#71 VDDC#72 VDDC#73 VDDC#74 VDDC#75 VDDC#76 VDDC#77 VDDC#78 VDDC#79 VDDC#80 VDDC#81 VDDC#82 VDDC#83 VDDC#84 VDDC#85 VDDC#86 VDDC#87 VDDC#88 VDDC#89 VDDC#90 VDDC#91 VDDC#92 VDDC#93 VDDC#94 VDDC#95 VDDC#96 VDDC#97
216-0732004-00
216-0732004-00
VSSC#1 VSSC#2 VSSC#3 VSSC#4 VSSC#5 VSSC#6 VSSC#7 VSSC#8
VSSC#9 VSSC#10 VSSC#11 VSSC#12 VSSC#13 VSSC#14 VSSC#15 VSSC#16 VSSC#17 VSSC#18 VSSC#19 VSSC#20 VSSC#21 VSSC#22 VSSC#23 VSSC#24 VSSC#25 VSSC#26 VSSC#27 VSSC#28 VSSC#29 VSSC#30 VSSC#31 VSSC#32 VSSC#33 VSSC#34 VSSC#35 VSSC#36 VSSC#37 VSSC#38 VSSC#39 VSSC#40 VSSC#41 VSSC#42 VSSC#43 VSSC#44 VSSC#45 VSSC#46 VSSC#47 VSSC#48 VSSC#49 VSSC#50 VSSC#51 VSSC#52 VSSC#53 VSSC#54 VSSC#55 VSSC#56 VSSC#57 VSSC#58 VSSC#59 VSSC#60 VSSC#61 VSSC#62 VSSC#63 VSSC#64 VSSC#65 VSSC#66 VSSC#67 VSSC#68 VSSC#69 VSSC#70 VSSC#71 VSSC#72 VSSC#73 VSSC#74 VSSC#75 VSSC#76 VSSC#77 VSSC#78 VSSC#79 VSSC#80 VSSC#81 VSSC#82 VSSC#83 VSSC#84 VSSC#85 VSSC#86 VSSC#87 VSSC#88 VSSC#89 VSSC#90 VSSC#91 VSSC#92 VSSC#93 VSSC#94 VSSC#95 VSSC#96 VSSC#97
AA21 AA24 AA26 AA29 AA31 AA34 AC20 AC23 AC25 AC28 AC30 AC33 AC35 AD19 AD21 AD24 AD26 AD29 AD31 AD34 AE20 AE23 AE25 AE28 AE30 AE33 AE35 AF19 AF21 AF24 AF26 AF29 AF31 AF34 AH20 AH23 AH25 AH28 AH30 AH33 AH35 AJ19 AJ21 AJ24 AJ26 AJ29 AJ31 AJ34 AK20 AK23 AK25 AK28 AK30 AK33 AK35 AL19 AL21 AL24 AL26 AL29 AL31 AL34 AN20 AN23 AN25 AN28 AN30 AN33 AN35 AP21 AP24 AP26 AP29 AP31 AP34 AR20 AR23 AR25 AR28 AR30 AR33
W19 W21 W24 W26 W29 W31 W34
Y20 Y23 Y25 Y28 Y30 Y33 Y35
AR35
1 2
AA20 AA23 AA25 AA28 AA30 AA33 AA35 AC19 AC21 AC24 AC26 AC29 AC31 AC34 AD20 AD23 AD25 AD28 AD30 AD33 AD35 AE19 AE21 AE24 AE26 AE29 AE31 AE34 AF20 AF23 AF25 AF28 AF30 AF33 AF35 AH19 AH21 AH24 AH26 AH29 AH31 AH34 AJ20 AJ23 AJ25 AJ28 AJ30 AJ33 AJ35 AK19 AK21 AK24 AK26 AK29 AK31 AK34 AL20 AL23 AL25 AL28 AL30 AL33 AL35 AN19 AN21 AN24 AN26 AN29 AN31 AN34 AP20 AP23 AP25 AP28 AP30 AP33 AR21 AR24 AR26 AR29 AR31 AR34 W20 W23 W25 W28 W30 W33 W35 Y19 Y21 Y24 Y26 Y29 Y31 Y34 AP35
AA13
AB10 AB16
AD13
AE10 AE16
AF13
AH10 AH16
AJ13
AK10 AK16
AM13
AN10 AN16
AR13
AT10 AT16
AU13
AW10
AY13
BA14 BA17
AY11 AV18
BD15 BD18
BC12
BG11 BG13 BG15
BM12
BN15 BM10
B14 B18 B22 A39 A49
A5
AA7
AB2 AC7
AD2
AE7
AF2 AG7
AH2
AJ7
AK2 AL7
AM2 AN1
AN7
AR7
AT2
AU7 AW1
AW7
AY2 B10 B16 B26 B30 A33 B42
BA7
BB2
BC7
BD2 BE7
BG9 BJ1
BN8
BN5 B12 B20 B24 B28 B32 B36 B40 B44
A8
E1 E53 G11 G13 G15 G17 G19 G21 G23 G25 G27 G29 G31 G33 G35 G37
U1I
U1I
VSSM#1 VSSM#2 VSSM#3 VSSM#4 VSSM#5 VSSM#6 VSSM#7 VSSM#8 VSSM#9 VSSM#10 VSSM#11 VSSM#12 VSSM#13 VSSM#14 VSSM#15 VSSM#16 VSSM#17 VSSM#18 VSSM#19 VSSM#20 VSSM#21 VSSM#22 VSSM#23 VSSM#24 VSSM#25 VSSM#26 VSSM#27 VSSM#28 VSSM#29 VSSM#30 VSSM#31 VSSM#32 VSSM#33 VSSM#34 VSSM#35 VSSM#36 VSSM#37 VSSM#38 VSSM#39 VSSM#40 VSSM#41 VSSM#42 VSSM#43 VSSM#44 VSSM#45 VSSM#46 VSSM#47 VSSM#48 VSSM#49 VSSM#50 VSSM#51 VSSM#52 VSSM#53 VSSM#54 VSSM#55 VSSM#56 VSSM#57 VSSM#58 VSSM#59 VSSM#60 VSSM#61 VSSM#62 VSSM#63 VSSM#64 VSSM#65 VSSM#66 VSSM#67 VSSM#68 VSSM#69 VSSM#70 VSSM#71 VSSM#72 VSSM#73 VSSM#74 VSSM#75 VSSM#76 VSSM#77 VSSM#78 VSSM#79 VSSM#80 VSSM#81 VSSM#82 VSSM#83 VSSM#84 VSSM#85 VSSM#86 VSSM#87 VSSM#88 VSSM#89 VSSM#90 VSSM#91 VSSM#92 VSSM#93 VSSM#94 VSSM#95 VSSM#96 VSSM#97 VSSM#98 VSSM#99 VSSM#100
216-0732004-00
216-0732004-00
VSSM#101 VSSM#102 VSSM#103 VSSM#104 VSSM#105 VSSM#106 VSSM#107 VSSM#108 VSSM#109 VSSM#110 VSSM#111 VSSM#112 VSSM#113 VSSM#114 VSSM#115 VSSM#116 VSSM#117 VSSM#118 VSSM#119 VSSM#120 VSSM#121 VSSM#122 VSSM#123 VSSM#124 VSSM#125 VSSM#126 VSSM#127 VSSM#128 VSSM#129 VSSM#130 VSSM#131 VSSM#132 VSSM#133 VSSM#134 VSSM#135 VSSM#136 VSSM#137 VSSM#138 VSSM#139 VSSM#140 VSSM#141 VSSM#142 VSSM#143 VSSM#144 VSSM#145 VSSM#146 VSSM#147 VSSM#148 VSSM#149 VSSM#150 VSSM#151 VSSM#152 VSSM#153 VSSM#154 VSSM#155 VSSM#156 VSSM#157 VSSM#158 VSSM#159 VSSM#160 VSSM#161 VSSM#162 VSSM#163 VSSM#164 VSSM#165 VSSM#166 VSSM#167 VSSM#168 VSSM#169 VSSM#170 VSSM#171 VSSM#172
1
G39 G41 G43 G45 G9 H1 J47 H53 J7 J11 K2 L40 K14 K17 K19 K22 K25 K28 K30 K33 K36 K39 L47 K52 L7 P2 M2 M43 M52 L9 R15 N18 N21 N24 N26 N29 N32 N35 N37 N40 N47 N7 P10 P41 R53 R12 M15 R17 T19 T22 T25 T28 T30 T33 T36 R44 R47 R7 T2 T48 U10 U15 U41 U7 V13 V38 V44 V2 W10 W16 W7 Y2
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
Title
Title
Title
from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
5
4
3
2
M98-L 1GB DDR3 MXM 3.0 CF
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markhaml, Ontario
Markhaml, Ontario
Markhaml, Ontario
Friday, May 23, 2008
Friday, May 23, 2008
Friday, May 23, 2008
Sheet
Sheet
Sheet
of
5 15
of
5 15
of
5 15
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 6
5
U2
R80
R80 243R
243R
T3 T2 R3 R2 M3 N2
L3
M2 T10 T11 R10 R11 M10 N11
L10 M11 G10 F11 F10 E11 C10 C11 B10 B11
G3 F2 F3 E2 C3 C2 B3 B2
H10
G9 G4
L4 K2 M9
K11
L9
K10 H11
K9 M4 K3 H2 K4
F9
H9
H3
F4
H4
J10 J11
P3
P10 D10
D3
P2
P11 D11
D2
N3
N10 E10
E3
V9
A4
H1
H12
C178
C178 10uF_6.3V
10uF_6.3V
U2
DQ31 | DQ23 DQ30 | DQ22 DQ29 | DQ21 DQ28 | DQ20 DQ27 | DQ19 DQ26 | DQ18 DQ25 | DQ17 DQ24 | DQ16 DQ23 | DQ31 DQ22 | DQ30 DQ21 | DQ29 DQ20 | DQ28 DQ19 | DQ27 DQ18 | DQ26 DQ17 | DQ25 DQ16 | DQ24 DQ15 | DQ7 DQ14 | DQ6 DQ13 | DQ5 DQ12 | DQ4 DQ11 | DQ3 DQ10 | DQ2 DQ9 | DQ1 DQ8 | DQ0 DQ7 | DQ15 DQ6 | DQ14 DQ5 | DQ13 DQ4 | DQ12 DQ3 | DQ11 DQ2 | DQ10 DQ1 | DQ9 DQ0 | DQ8
BA2 | RAS BA1 | BA0 BA0 | BA1
A11 | A7 A10 | A8 A9 | A3 A8/AP | A10 A7 | A11 A6 | A2 A5 | A1 A4 | A0 A3 | A9 A2 | A6 A1 | A5 A0 | A4
CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK CK
RDQS3 | RDQS2 RDQS2 | RDQS3 RDQS1 | RDQS0 RDQS0 | RDQS1
WDQS3 | WDQS2 WDQS2 | WDQS3 WDQS1 | WDQS0 WDQS0 | WDQS1
DM3 | DM2 DM2 | DM3 DM1 | DM0 DM0 | DM1
VDDQ
VDDQ#A12
VDDQ#C1 VDDQ#C4 VDDQ#C9
VDDQ#C12
VDDQ#E1 VDDQ#E4 VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9 VDDQ#N1 VDDQ#N4 VDDQ#N9
VDDQ#N12
VDDQ#R1 VDDQ#R4 VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ#B4
VSSQ#B9
VSSQ#B12
VSSQ#D1 VSSQ#D4 VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1
VSSQ#P4
VSSQ#P9
VSSQ#P12
VSSQ#T1
VSSQ#T4
VSSQ#T9
VSSQ#T12
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA#K12
VSSA#J12
RESET
ZQ
VREF
VREF#H12
136 FBGA
K4J55323QG-BC14
K4J55323QG-BC14
C179
C179 10nF
10nF
GND | VDD
GND | VDD
PLACE VREF DIVIDER COMPONENTS
AS CLOSE TO MEMORY AS POSSIBLE
C180
C180 10nF
10nF
MDA20 MDA22 MDA23 MDA21 MDA17 MDA19 MDA18 MDA16 MDA9 MDA10 MDA8
R85
R85
2.37K
2.37K
VREF = .72*VDDQ
C170
C170 100nF
100nF
C176
C176 10uF_6.3V
10uF_6.3V
5
MDA12 MDA11 MDA15 MDA13 MDA14 MDA25 MDA27 MDA24 MDA26 MDA30 MDA29 MDA31 MDA28 MDA3 MDA4 MDA7 MDA1 MDA6 MDA2 MDA5 MDA0
A_BA2 A_BA1 A_BA0
MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0
CLKA0# CLKA0
RDQSA2 RDQSA1 RDQSA3 RDQSA0
WDQSA2 WDQSA1 WDQSA3 WDQSA0
DQMA#2 DQMA#1 DQMA#3 DQMA#0
MEM_RST
CSA0_0#
WEA0#
RASA0#
CASA0#
CKEA0
C177
C177 10uF_6.3V
10uF_6.3V
D D
C C
B B
VDD_MEM
R79
R79
2.37K
2.37K
VREF = .72*VDDQ
C157
C157 100nF
100nF
C174
C174 1uF_6.3V
1uF_6.3V
R87
R87
5.49K
5.49K
VDD_MEM
C175
C175 1uF_6.3V
1uF_6.3V
R83
R83
5.49K
5.49K
A A
VDD_MEM
VDD
VSSQ
VSS
VDDA
VSSA
RFU2
RFU1
RFU0
MF
C181
C181 1uF_6.3V
1uF_6.3V
4
A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12
A2 A11 F1 F12 M1 M12 V2 V11
B1 B4 B9 B12 D1 D4 D9 D12 G2 G11 L2 L11 P1 P4 P9 P12 T1 T4 T9 T12 A3 A10 G1 G12 L1 L12 V3 V10
K1 K12
C293
C293
1uF_6.3V
1uF_6.3V
J12 J1
J3
B1
B1
BLM15BD121SN1
BLM15BD121SN1 BLM15BD121SN1
BLM15BD121SN1
B30
B30
C156
C156 1uF_6.3V
1uF_6.3V
CSA0_1# CSA1_1#
J2
C185
C185 1uF_6.3V
1uF_6.3V
VDD_MEM
R84
R84
5.49K
5.49K
R81
R81
2.37K
2.37K
C158
C158 100nF
100nF
C186
C186 1uF_6.3V
1uF_6.3V
VREF = .72*VDDQ
R88
R88
5.49K
5.49K
V4
A9
C182
C182
C183
C183
C184
1uF_6.3V
1uF_6.3V
C184 1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
4
3
U3
T3
T2 R3 R2 M3 N2
L3 M2
T10 T11 R10 R11 M10 N11
L10 M11 G10
F11
F10 E11 C10 C11 B10 B11
G3
F2 F3
E2 C3 C2
B3
B2
H10
G9 G4
L4
K2 M9
K11
L9
K10 H11
K9 M4
K3 H2
K4
F9
H9
H3
F4
H4
J10 J11
P3
P10 D10
D3
P2
P11 D11
D2
N3
N10 E10
E3
V9
R82
R82
A4
243R
243R
H1
H12
136 FBGA(MIRROR)
VDD_MEM
U3
DQ31 | DQ23 DQ30 | DQ22 DQ29 | DQ21 DQ28 | DQ20 DQ27 | DQ19 DQ26 | DQ18 DQ25 | DQ17 DQ24 | DQ16 DQ23 | DQ31 DQ22 | DQ30 DQ21 | DQ29 DQ20 | DQ28 DQ19 | DQ27 DQ18 | DQ26 DQ17 | DQ25 DQ16 | DQ24 DQ15 | DQ7 DQ14 | DQ6 DQ13 | DQ5 DQ12 | DQ4 DQ11 | DQ3 DQ10 | DQ2 DQ9 | DQ1 DQ8 | DQ0 DQ7 | DQ15 DQ6 | DQ14 DQ5 | DQ13 DQ4 | DQ12 DQ3 | DQ11 DQ2 | DQ10 DQ1 | DQ9 DQ0 | DQ8
BA2 | RAS BA1 | BA0 BA0 | BA1
A11 | A7 A10 | A8 A9 | A3 A8/AP | A10 A7 | A11 A6 | A2 A5 | A1 A4 | A0 A3 | A9 A2 | A6 A1 | A5 A0 | A4
CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK CK
RDQS3 | RDQS2 RDQS2 | RDQS3 RDQS1 | RDQS0 RDQS0 | RDQS1
WDQS3 | WDQS2 WDQS2 | WDQS3 WDQS1 | WDQS0 WDQS0 | WDQS1
DM3 | DM2 DM2 | DM3 DM1 | DM0 DM0 | DM1
RESET
ZQ
VREF
VREF#H12
K4J55323QG-BC14
K4J55323QG-BC14
C159
C159 1uF_6.3V
1uF_6.3V
VDDQ#A12
VDDQ#C12
VDDQ#E12
VDDQ#N12
VDDQ#R12
VDDQ#V12
VSSQ#B12
VSSQ#D12
VSSQ#G11
VSSQ#L11
VSSQ#P12
VSSQ#T12
VDDA#K12
C160
C160 1uF_6.3V
1uF_6.3V
VDDQ
VDDQ#C1 VDDQ#C4 VDDQ#C9
VDDQ#E1 VDDQ#E4 VDDQ#E9
VDDQ#J4
VDDQ#J9 VDDQ#N1 VDDQ#N4 VDDQ#N9
VDDQ#R1 VDDQ#R4 VDDQ#R9
VDDQ#V1
VDD
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ VSSQ#B4 VSSQ#B9
VSSQ#D1 VSSQ#D4 VSSQ#D9
VSSQ#G2
VSSQ#L2
VSSQ#P1 VSSQ#P4 VSSQ#P9
VSSQ#T1 VSSQ#T4 VSSQ#T9
VSS
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA
VSSA#J12
VSSA
RFU2
RFU1
RFU0
GND | VDD
GND | VDD
VDD_MEM
R86
R86
2.37K
2.37K
C173
C173 100nF
100nF
MDA58 MDA56 MDA57 MDA59 MDA62 MDA61 MDA60 MDA63 MDA35 MDA34 MDA32 MDA33 MDA36 MDA39 MDA38 MDA37 MDA48 MDA49 MDA51 MDA50 MDA54 MDA52 MDA53 MDA55 MDA47 MDA46 MDA44 MDA41 MDA43 MDA42 MDA45 MDA40
A_BA2 A_BA1 A_BA0
MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0
RASA1#
CLKA1# CLKA1
RDQSA7 RDQSA4 RDQSA6 RDQSA5
WDQSA7 WDQSA4 WDQSA6 WDQSA5
DQMA#7 DQMA#4 DQMA#6 DQMA#5
MEM_RST
VREF = .72*VDDQ
CSA1_0#
WEA1#
CASA1#
CKEA1
CHAN A DDR3 136FBGA MEMORY
3
MF
C161
C161 10uF_6.3V
10uF_6.3V
2
A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12
A2 A11 F1 F12 M1 M12 V2 V11
B1 B4 B9 B12 D1 D4 D9 D12 G2 G11 L2 L11 P1 P4 P9 P12 T1 T4 T9 T12 A3 A10 G1 G12 L1 L12 V3 V10
K1 K12
J12 J1
C292
C292
1uF_6.3V
1uF_6.3V
C155
C155
1uF_6.3V
1uF_6.3V
B2
B2
B31
B31
VDD_MEMVDD_MEM
BLM15BD121SN1
BLM15BD121SN1 BLM15BD121SN1
BLM15BD121SN1
J3
J2
V4
A9
C162
C162
C163
C163
C164
10uF_6.3V
10uF_6.3V
C164 10nF
10nF
10uF_6.3V
10uF_6.3V
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
2
C165
C165 10nF
10nF
RASA0#(3) RASA1#(3)
CASA0#(3) CASA1#(3)
WEA0#(3) WEA1#(3)
CSA0_0#(3) CSA1_0#(3)
CSA0_1#(3) CSA1_1#(3)
CKEA0(3) CKEA1(3)
CLKA0(3)
CLKA0#(3)
CLKA1(3)
CLKA1#(3)
C166
C166 1uF_6.3V
1uF_6.3V
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markhaml, Ontario
Markhaml, Ontario
Markhaml, Ontario
Sheet
Sheet
Sheet
MAA[11..0](3)
A_BA0(3) A_BA1(3) A_BA2(3)
WDQSA[7..0](3)
RDQSA[7..0](3)
DQMA#[7..0](3)
MDA[63..0](3)
MEM_RST(3,7,8,9)
R63 121RR63 121R
RASA0# RASA1#
R64 121RR64 121R
CASA0#
R66 121RR66 121R R65 121RR65 121R
CASA1#
R68 121RR68 121R
WEA0# WEA1#
R67 121RR67 121R
CSA0_0#
R70 121RR70 121R R69 121RR69 121R
CSA1_0#
R71 121RR71 121R
CSA0_1# CSA1_1#
R72 121RR72 121R
CKEA0
R74 121RR74 121R R73 121RR73 121R
CKEA1
CLKA0
CLKA0#
CLKA1
CLKA1#
C167
C167
C168
C168
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
Tuesday, May 20, 2008
Tuesday, May 20, 2008
Tuesday, May 20, 2008
of
6 15
of
6 15
of
6 15
1
C169
C169 1uF_6.3V
1uF_6.3V
Doc No.
Doc No.
Doc No.
1
MAA[11..0]
A_BA0 A_BA1 A_BA2
WDQSA[7..0]
RDQSA[7..0]
DQMA#[7..0]
MDA[63..0]
MEM_RST
R75
R75
60.4R
60.4R R76
R76
60.4R
60.4R
R77
R77
60.4R
60.4R R78
R78
60.4R
60.4R
C171
C171 1uF_6.3V
1uF_6.3V
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
VDD_MEM
C172
C172 1uF_6.3V
1uF_6.3V
RevDate:
RevDate:
RevDate:
0
0
0
www.vinafix.vn
Page 7
5
U4
R106
R106 243R
243R
T3 T2 R3 R2
M3
N2
L3
M2 T10 T11 R10 R11
M10
N11
L10 M11 G10
F11 F10 E11 C10 C11 B10 B11
G3 F2 F3 E2 C3 C2 B3 B2
H10
G9 G4
L4
K2
M9
K11
L9 K10 H11
K9
M4
K3 H2 K4
F9
H9
H3
F4
H4
J10 J11
P3 P10 D10
D3
P2 P11 D11
D2
N3 N10 E10
E3
V9
A4
H1
H12
C210
C210 10uF_6.3V
10uF_6.3V
U4
DQ31 | DQ23 DQ30 | DQ22 DQ29 | DQ21 DQ28 | DQ20 DQ27 | DQ19 DQ26 | DQ18 DQ25 | DQ17 DQ24 | DQ16 DQ23 | DQ31 DQ22 | DQ30 DQ21 | DQ29 DQ20 | DQ28 DQ19 | DQ27 DQ18 | DQ26 DQ17 | DQ25 DQ16 | DQ24 DQ15 | DQ7 DQ14 | DQ6 DQ13 | DQ5 DQ12 | DQ4 DQ11 | DQ3 DQ10 | DQ2 DQ9 | DQ1 DQ8 | DQ0 DQ7 | DQ15 DQ6 | DQ14 DQ5 | DQ13 DQ4 | DQ12 DQ3 | DQ11 DQ2 | DQ10 DQ1 | DQ9 DQ0 | DQ8
BA2 | RAS BA1 | BA0 BA0 | BA1
A11 | A7 A10 | A8 A9 | A3 A8/AP | A10 A7 | A11 A6 | A2 A5 | A1 A4 | A0 A3 | A9 A2 | A6 A1 | A5 A0 | A4
CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK CK
RDQS3 | RDQS2 RDQS2 | RDQS3 RDQS1 | RDQS0 RDQS0 | RDQS1
WDQS3 | WDQS2 WDQS2 | WDQS3 WDQS1 | WDQS0 WDQS0 | WDQS1
DM3 | DM2 DM2 | DM3 DM1 | DM0 DM0 | DM1
RESET
VDDQ
VDDQ#A12
VDDQ#C1 VDDQ#C4 VDDQ#C9
VDDQ#C12
VDDQ#E1 VDDQ#E4 VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9 VDDQ#N1 VDDQ#N4 VDDQ#N9
VDDQ#N12
VDDQ#R1 VDDQ#R4 VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ VSSQ#B4 VSSQ#B9
VSSQ#B12
VSSQ#D1 VSSQ#D4 VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1 VSSQ#P4 VSSQ#P9
VSSQ#P12
VSSQ#T1 VSSQ#T4 VSSQ#T9
VSSQ#T12
VSS
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA
VDDA#K12
VSSA#J12
VSSA
RFU2
RFU1
RFU0
ZQ
VREF
VREF#H12
136 FBGA
K4J55323QG-BC14
K4J55323QG-BC14
C211
C211 10nF
10nF
GND | VDD
GND | VDD
PLACE VREF DIVIDER COMPONENTS
AS CLOSE TO MEMORY AS POSSIBLE
C212
C212 10nF
10nF
MDB7 MDB0 MDB2 MDB3 MDB1 MDB6 MDB5 MDB4 MDB30 MDB28 MDB31
R111
R111
2.37K
2.37K
VREF = .72*VDDQ
C191
C191 100nF
100nF
C208
C208 10uF_6.3V
10uF_6.3V
5
MDB27 MDB29 MDB26 MDB25 MDB24 MDB21 MDB22 MDB23 MDB20 MDB19 MDB17 MDB18 MDB16 MDB11 MDB10 MDB8 MDB13 MDB12 MDB14 MDB15 MDB9
B_BA2 B_BA1 B_BA0
MAB11 MAB10 MAB9 MAB8 MAB7 MAB6 MAB5 MAB4 MAB3 MAB2 MAB1 MAB0
CSB0_0#
WEB0#
RASB0#
CASB0#
CKEB0
CLKB0# CLKB0
RDQSB0 RDQSB3 RDQSB2 RDQSB1
WDQSB0 WDQSB3 WDQSB2 WDQSB1
DQMB#0 DQMB#3 DQMB#2 DQMB#1
MEM_RST
C209
C209 10uF_6.3V
10uF_6.3V
D D
C C
B B
VDD_MEM
R105
R105
2.37K
2.37K
VREF = .72*VDDQ
C189
C189 100nF
100nF
C206
C206 1uF_6.3V
1uF_6.3V
R113
R113
5.49K
5.49K
VDD_MEM
C207
C207 1uF_6.3V
1uF_6.3V
R109
R109
5.49K
5.49K
A A
VDD_MEM
MF
C213
C213 1uF_6.3V
1uF_6.3V
A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12
A2 A11 F1 F12 M1 M12 V2 V11
B1 B4 B9 B12 D1 D4 D9 D12 G2 G11 L2 L11 P1 P4 P9 P12 T1 T4 T9 T12 A3 A10 G1 G12 L1 L12 V3 V10
K1 K12
J12 J1
J3
J2
V4
A9
4
B3
B3
BLM15BD121SN1
BLM15BD121SN1 BLM15BD121SN1
BLM15BD121SN1
B32
B32
C188
C188
C294
C294
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
CSB0_1# CSB1_1#
VDD_MEM
R107
R107
2.37K
2.37K
VREF = .72*VDDQ
C190
C190
R110
R110
100nF
100nF
5.49K
5.49K
R114
R114
5.49K
5.49K
VDD_MEM
R112
R112
2.37K
2.37K
C192
C192 100nF
100nF
3
B_BA2 B_BA1 B_BA0
MAB11 MAB10 MAB9 MAB8 MAB7 MAB6 MAB5 MAB4 MAB3 MAB2 MAB1 MAB0
CSB1_0#
WEB1#
RASB1#
CASB1#
CKEB1
CLKB1# CLKB1
RDQSB7 RDQSB4 RDQSB6 RDQSB5
WDQSB7 WDQSB4 WDQSB6 WDQSB5
DQMB#7 DQMB#4 DQMB#6 DQMB#5
MEM_RST
VREF = .72*VDDQ
MDB59 MDB58 MDB56 MDB60 MDB63 MDB62 MDB57 MDB61 MDB38 MDB39 MDB37 MDB36 MDB34 MDB35 MDB32 MDB33 MDB49 MDB48 MDB51 MDB50 MDB55 MDB53 MDB54 MDB52 MDB45 MDB47 MDB44 MDB46 MDB41 MDB40 MDB43 MDB42
T3
T2 R3 R2 M3 N2
L3 M2
T10 T11 R10 R11
M10
N11
L10
M11
G10 F11 F10 E11 C10 C11 B10 B11
G3
F2
F3
E2 C3 C2
B3
B2
H10
G9 G4
L4
K2 M9
K11
L9
K10 H11
K9 M4
K3 H2
K4
F9
H9
H3
F4
H4
J10 J11
P3
P10 D10
D3
P2
P11 D11
D2
N3
N10 E10
E3
V9
R108
R108
A4
243R
243R
H1
H12
136 FBGA(MIRROR)
U5
U5
DQ31 | DQ23 DQ30 | DQ22 DQ29 | DQ21 DQ28 | DQ20 DQ27 | DQ19 DQ26 | DQ18 DQ25 | DQ17 DQ24 | DQ16 DQ23 | DQ31 DQ22 | DQ30 DQ21 | DQ29 DQ20 | DQ28 DQ19 | DQ27 DQ18 | DQ26 DQ17 | DQ25 DQ16 | DQ24 DQ15 | DQ7 DQ14 | DQ6 DQ13 | DQ5 DQ12 | DQ4 DQ11 | DQ3 DQ10 | DQ2 DQ9 | DQ1 DQ8 | DQ0 DQ7 | DQ15 DQ6 | DQ14 DQ5 | DQ13 DQ4 | DQ12 DQ3 | DQ11 DQ2 | DQ10 DQ1 | DQ9 DQ0 | DQ8
BA2 | RAS BA1 | BA0 BA0 | BA1
A11 | A7 A10 | A8 A9 | A3 A8/AP | A10 A7 | A11 A6 | A2 A5 | A1 A4 | A0 A3 | A9 A2 | A6 A1 | A5 A0 | A4
CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK CK
RDQS3 | RDQS2 RDQS2 | RDQS3 RDQS1 | RDQS0 RDQS0 | RDQS1
WDQS3 | WDQS2 WDQS2 | WDQS3 WDQS1 | WDQS0 WDQS0 | WDQS1
DM3 | DM2 DM2 | DM3 DM1 | DM0 DM0 | DM1
RESET
ZQ
VREF
VREF#H12
K4J55323QG-BC14
K4J55323QG-BC14
VDD_MEM
C193
C193 1uF_6.3V
1uF_6.3V
VDDQ#A12
VDDQ#C1 VDDQ#C4 VDDQ#C9
VDDQ#C12
VDDQ#E1 VDDQ#E4 VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9 VDDQ#N1 VDDQ#N4 VDDQ#N9
VDDQ#N12
VDDQ#R1 VDDQ#R4 VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ#B4
VSSQ#B9
VSSQ#B12
VSSQ#D1 VSSQ#D4 VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1
VSSQ#P4
VSSQ#P9
VSSQ#P12
VSSQ#T1
VSSQ#T4
VSSQ#T9
VSSQ#T12
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA#K12
VSSA#J12
GND | VDD
GND | VDD
C194
C194 1uF_6.3V
1uF_6.3V
VDDQ
VDD
VSSQ
VSS
VDDA
VSSA
RFU2
RFU1
RFU0
MF
C195
C195 10uF_6.3V
10uF_6.3V
A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12
A2 A11 F1 F12 M1 M12 V2 V11
B1 B4 B9 B12 D1 D4 D9 D12 G2 G11 L2 L11 P1 P4 P9 P12 T1 T4 T9 T12 A3 A10 G1 G12 L1 L12 V3 V10
K1 K12
J12 J1
J3
J2
V4
A9
CHAN B DDR3 136FBGA MEMORY
C214
C214
C215
C215
C216
C216
C217
C217
C218
1uF_6.3V
1uF_6.3V
4
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C218 1uF_6.3V
1uF_6.3V
3
2
VDD_MEMVDD_MEM
B4
B4
BLM15BD121SN1
BLM15BD121SN1 BLM15BD121SN1
BLM15BD121SN1
B33
B33
C187
C187
C295
C295
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C196
C196
C197
C197
10uF_6.3V
10uF_6.3V
10uF_6.3V
10uF_6.3V
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
2
C198
C198 10nF
10nF
C199
C199 10nF
10nF
RASB0#(3) RASB1#(3)
CASB0#(3) CASB1#(3)
WEB0#(3) WEB1#(3)
CSB0_0#(3) CSB1_0#(3) CSB0_1#(3) CSB1_1#(3)
CKEB0(3) CKEB1(3)
CLKB0(3)
CLKB0#(3)
CLKB1(3)
CLKB1#(3)
C200
C200 1uF_6.3V
1uF_6.3V
MAB[11..0](3)
B_BA0(3) B_BA1(3) B_BA2(3)
WDQSB[7..0](3)
RDQSB[7..0](3)
DQMB#[7..0](3)
MDB[63..0](3)
MEM_RST(3,6,8,9)
R90 121RR90 121R
RASB0# RASB1#
R89 121RR89 121R
CASB0#
R92 121RR92 121R R91 121RR91 121R
CASB1#
R94 121RR94 121R
WEB0# WEB1#
R93 121RR93 121R
CSB0_0#
R95 121RR95 121R R97 121RR97 121R
CSB1_0# CSB0_1#
R96 121RR96 121R R98 121RR98 121R
CSB1_1#
CKEB0
R100 121RR100 121R R99 121RR99 121R
CKEB1
CLKB0
CLKB0#
CLKB1
CLKB1#
C201
C201
C202
C202
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markhaml, Ontario
Markhaml, Ontario
Markhaml, Ontario
Tuesday, May 20, 2008
Tuesday, May 20, 2008
Tuesday, May 20, 2008
Sheet
Sheet
Sheet
of
7 15
of
7 15
of
7 15
1
C203
C203 1uF_6.3V
1uF_6.3V
Doc No.
Doc No.
Doc No.
1
MAB[11..0]
B_BA0 B_BA1 B_BA2
WDQSB[7..0]
RDQSB[7..0]
DQMB#[7..0]
MDB[63..0]
MEM_RST
R101
R101
60.4R
60.4R R102
R102
60.4R
60.4R
R103
R103
60.4R
60.4R R104
R104
60.4R
60.4R
VDD_MEM
C204
C204
C205
C205
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 8
5
MDC7 MDC6 MDC4 MDC5 MDC1 MDC3 MDC2 MDC0 MDC18 MDC17 MDC16 MDC23
R137
R137
2.37K
2.37K
VREF = .72*VDDQ
C223
C223 100nF
100nF
C240
C240 10uF_6.3V
10uF_6.3V
5
MDC19 MDC21 MDC20 MDC22 MDC24 MDC26 MDC27 MDC25 MDC31 MDC28 MDC29 MDC30 MDC12 MDC13 MDC14 MDC15 MDC8 MDC9 MDC10 MDC11
C_BA2 C_BA1 C_BA0
MAC11 MAC10 MAC9 MAC8 MAC7 MAC6 MAC5 MAC4 MAC3 MAC2 MAC1 MAC0
CLKC0# CLKC0
RDQSC0 RDQSC2 RDQSC3 RDQSC1
WDQSC0 WDQSC2 WDQSC3 WDQSC1
DQMC#0 DQMC#2 DQMC#3 DQMC#1
MEM_RST
CSC0_0#
WEC0#
RASC0#
CASC0#
CKEC0
C241
C241 10uF_6.3V
10uF_6.3V
D D
C C
B B
VDD_MEM
R131
R131
2.37K
2.37K
VREF = .72*VDDQ
C221
C221 100nF
100nF
C238
C238 1uF_6.3V
1uF_6.3V
R139
R139
5.49K
5.49K
VDD_MEM
C239
C239 1uF_6.3V
1uF_6.3V
R135
R135
5.49K
5.49K
A A
VDD_MEM
R132
R132 243R
243R
T3 T2 R3 R2 M3 N2
L3
M2 T10 T11 R10 R11 M10 N11
L10 M11 G10 F11 F10 E11 C10 C11 B10 B11
G3 F2 F3 E2 C3 C2 B3 B2
H10
G9 G4
L4 K2 M9
K11
L9
K10 H11
K9 M4 K3 H2 K4
F9
H9
H3
F4
H4
J10 J11
P3
P10 D10
D3
P2
P11 D11
D2
N3
N10 E10
E3
V9
A4
H1
H12
C242
C242 10uF_6.3V
10uF_6.3V
U6
U6
DQ31 | DQ23 DQ30 | DQ22 DQ29 | DQ21 DQ28 | DQ20 DQ27 | DQ19 DQ26 | DQ18 DQ25 | DQ17 DQ24 | DQ16 DQ23 | DQ31 DQ22 | DQ30 DQ21 | DQ29 DQ20 | DQ28 DQ19 | DQ27 DQ18 | DQ26 DQ17 | DQ25 DQ16 | DQ24 DQ15 | DQ7 DQ14 | DQ6 DQ13 | DQ5 DQ12 | DQ4 DQ11 | DQ3 DQ10 | DQ2 DQ9 | DQ1 DQ8 | DQ0 DQ7 | DQ15 DQ6 | DQ14 DQ5 | DQ13 DQ4 | DQ12 DQ3 | DQ11 DQ2 | DQ10 DQ1 | DQ9 DQ0 | DQ8
BA2 | RAS BA1 | BA0 BA0 | BA1
A11 | A7 A10 | A8 A9 | A3 A8/AP | A10 A7 | A11 A6 | A2 A5 | A1 A4 | A0 A3 | A9 A2 | A6 A1 | A5 A0 | A4
CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK CK
RDQS3 | RDQS2 RDQS2 | RDQS3 RDQS1 | RDQS0 RDQS0 | RDQS1
WDQS3 | WDQS2 WDQS2 | WDQS3 WDQS1 | WDQS0 WDQS0 | WDQS1
DM3 | DM2 DM2 | DM3 DM1 | DM0 DM0 | DM1
VDDQ
VDDQ#A12
VDDQ#C1 VDDQ#C4 VDDQ#C9
VDDQ#C12
VDDQ#E1 VDDQ#E4 VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9 VDDQ#N1 VDDQ#N4 VDDQ#N9
VDDQ#N12
VDDQ#R1 VDDQ#R4 VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ#B4
VSSQ#B9
VSSQ#B12
VSSQ#D1 VSSQ#D4 VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1
VSSQ#P4
VSSQ#P9
VSSQ#P12
VSSQ#T1
VSSQ#T4
VSSQ#T9
VSSQ#T12
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA#K12
VSSA#J12
RESET
ZQ
VREF
VREF#H12
136 FBGA
K4J55323QG-BC14
K4J55323QG-BC14
C243
C243 10nF
10nF
GND | VDD
GND | VDD
PLACE VREF DIVIDER COMPONENTS
AS CLOSE TO MEMORY AS POSSIBLE
C244
C244 10nF
10nF
VDD
VSSQ
VSS
VDDA
VSSA
RFU2
RFU1
RFU0
MF
C245
C245 1uF_6.3V
1uF_6.3V
4
A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12
A2 A11 F1 F12 M1 M12 V2 V11
B1 B4 B9 B12 D1 D4 D9 D12 G2 G11 L2 L11 P1 P4 P9 P12 T1 T4 T9 T12 A3 A10 G1 G12 L1 L12 V3 V10
K1 K12
C296
C296
1uF_6.3V
1uF_6.3V C220
J12 J1
J3
B5
B5
BLM15BD121SN1
BLM15BD121SN1 BLM15BD121SN1
BLM15BD121SN1
B34
B34
C220 1uF_6.3V
1uF_6.3V
CSC0_1# CSC1_1#
J2
V4
A9
VDD_MEM
R136
R136
5.49K
5.49K
R133
R133
2.37K
2.37K
VREF = .72*VDDQ
C222
C222 100nF
100nF
R140
R140
5.49K
5.49K
VDD_MEM
R138
R138
2.37K
2.37K
C224
C224 100nF
100nF
3
MDC59 MDC58 MDC57 MDC56 MDC63 MDC62 MDC60 MDC61 MDC32 MDC34 MDC35 MDC33 MDC36 MDC37 MDC38 MDC39 MDC48 MDC49 MDC51 MDC50 MDC54 MDC53 MDC55 MDC52 MDC40 MDC42 MDC41 MDC43 MDC47 MDC45 MDC44 MDC46
C_BA2 C_BA1 C_BA0
MAC11 MAC10 MAC9 MAC8 MAC7 MAC6 MAC5 MAC4 MAC3 MAC2 MAC1 MAC0
RASC1#
CLKC1# CLKC1
RDQSC7 RDQSC4 RDQSC6 RDQSC5
WDQSC7 WDQSC4 WDQSC6 WDQSC5
DQMC#7 DQMC#4 DQMC#6 DQMC#5
MEM_RST
VREF = .72*VDDQ
CSC1_0#
WEC1#
CASC1#
CKEC1
T3
T2 R3 R2 M3 N2
L3 M2
T10 T11 R10 R11 M10 N11
L10 M11 G10
F11
F10 E11 C10 C11 B10 B11
G3
F2 F3
E2 C3 C2
B3
B2
H10
G9 G4
L4
K2 M9
K11
L9
K10 H11
K9 M4
K3 H2
K4
F9
H9
H3
F4
H4
J10 J11
P3
P10 D10
D3
P2
P11 D11
D2
N3
N10 E10
E3
V9
R134
R134
A4
243R
243R
H1
H12
136 FBGA(MIRROR)
VDD_MEM
U7
U7
DQ31 | DQ23 DQ30 | DQ22 DQ29 | DQ21 DQ28 | DQ20 DQ27 | DQ19 DQ26 | DQ18 DQ25 | DQ17 DQ24 | DQ16 DQ23 | DQ31 DQ22 | DQ30 DQ21 | DQ29 DQ20 | DQ28 DQ19 | DQ27 DQ18 | DQ26 DQ17 | DQ25 DQ16 | DQ24 DQ15 | DQ7 DQ14 | DQ6 DQ13 | DQ5 DQ12 | DQ4 DQ11 | DQ3 DQ10 | DQ2 DQ9 | DQ1 DQ8 | DQ0 DQ7 | DQ15 DQ6 | DQ14 DQ5 | DQ13 DQ4 | DQ12 DQ3 | DQ11 DQ2 | DQ10 DQ1 | DQ9 DQ0 | DQ8
BA2 | RAS BA1 | BA0 BA0 | BA1
A11 | A7 A10 | A8 A9 | A3 A8/AP | A10 A7 | A11 A6 | A2 A5 | A1 A4 | A0 A3 | A9 A2 | A6 A1 | A5 A0 | A4
CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK CK
RDQS3 | RDQS2 RDQS2 | RDQS3 RDQS1 | RDQS0 RDQS0 | RDQS1
WDQS3 | WDQS2 WDQS2 | WDQS3 WDQS1 | WDQS0 WDQS0 | WDQS1
DM3 | DM2 DM2 | DM3 DM1 | DM0 DM0 | DM1
RESET
ZQ
VREF
VREF#H12
K4J55323QG-BC14
K4J55323QG-BC14
C225
C225 1uF_6.3V
1uF_6.3V
VDDQ#A12
VDDQ#C12
VDDQ#E12
VDDQ#N12
VDDQ#R12
VDDQ#V12
VSSQ#B12
VSSQ#D12
VSSQ#G11
VSSQ#L11
VSSQ#P12
VSSQ#T12
VDDA#K12
C226
C226 1uF_6.3V
1uF_6.3V
VDDQ
VDDQ#C1 VDDQ#C4 VDDQ#C9
VDDQ#E1 VDDQ#E4 VDDQ#E9
VDDQ#J4
VDDQ#J9 VDDQ#N1 VDDQ#N4 VDDQ#N9
VDDQ#R1 VDDQ#R4 VDDQ#R9
VDDQ#V1
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ VSSQ#B4 VSSQ#B9
VSSQ#D1 VSSQ#D4 VSSQ#D9
VSSQ#G2
VSSQ#L2
VSSQ#P1 VSSQ#P4 VSSQ#P9
VSSQ#T1 VSSQ#T4 VSSQ#T9
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA
VSSA#J12
VSSA
RFU2
RFU1
RFU0
GND | VDD
GND | VDD
CHAN C DDR3 136FBGA MEMORY
C250
C246
C246 1uF_6.3V
1uF_6.3V
4
C247
C247 1uF_6.3V
1uF_6.3V
C248
C248 1uF_6.3V
1uF_6.3V
C249
C249 1uF_6.3V
1uF_6.3V
C250 1uF_6.3V
1uF_6.3V
3
2
A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12
A2
VDD
A11 F1 F12 M1 M12 V2 V11
B1 B4 B9 B12 D1 D4 D9 D12 G2 G11 L2 L11 P1 P4 P9 P12 T1 T4 T9 T12 A3
VSS
A10 G1 G12 L1 L12 V3 V10
K1 K12
1uF_6.3V
1uF_6.3V
J12 J1
C297
C297
B6
B6
B35
B35
C219
C219 1uF_6.3V
1uF_6.3V
J3
J2
V4
A9
MF
C228
C228
C229
C227
C227 10uF_6.3V
10uF_6.3V
C229
10uF_6.3V
10uF_6.3V
10uF_6.3V
10uF_6.3V
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
2
BLM15BD121SN1
BLM15BD121SN1 BLM15BD121SN1
BLM15BD121SN1
C230
C230 10nF
10nF
1
VDD_MEMVDD_MEM
RASC0#(4) RASC1#(4)
CASC0#(4) CASC1#(4)
WEC0#(4) WEC1#(4)
CSC0_0#(4) CSC1_0#(4) CSC0_1#(4) CSC1_1#(4)
CKEC0(4) CKEC1(4)
CLKC0(4)
CLKC0#(4)
CLKC1(4)
CLKC1#(4)
C231
C231
C232
C232
10nF
10nF
1uF_6.3V
1uF_6.3V
MAC[11..0](4)
C_BA0(4) C_BA1(4) C_BA2(4)
WDQSC[7..0](4)
RDQSC[7..0](4)
DQMC#[7..0](4)
MDC[63..0](4)
MEM_RST(3,6,7,9)
RASC0# RASC1#
CASC0# CASC1#
WEC0# WEC1#
CSC0_0# CSC1_0# CSC0_1# CSC1_1#
CKEC0 CKEC1
CLKC0
CLKC0#
CLKC1
CLKC1#
C233
C233
C234
C234
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markhaml, Ontario
Markhaml, Ontario
Markhaml, Ontario
Tuesday, May 20, 2008
Tuesday, May 20, 2008
Tuesday, May 20, 2008
Sheet
Sheet
Sheet
of
8 15
of
8 15
of
8 15
MAC[11..0]
C_BA0 C_BA1 C_BA2
WDQSC[7..0]
RDQSC[7..0]
DQMC#[7..0]
MDC[63..0]
MEM_RST
R116 121RR116 121R R115 121RR115 121R
R118 121RR118 121R R117 121RR117 121R
R120 121RR120 121R R119 121RR119 121R
R121 121RR121 121R R123 121RR123 121R R122 121RR122 121R R124 121RR124 121R
R126 121RR126 121R R125 121RR125 121R
R127
R127
60.4R
60.4R R128
R128
60.4R
60.4R
R129
R129
60.4R
60.4R R130
R130
60.4R
60.4R
C235
C235 1uF_6.3V
1uF_6.3V
Doc No.
Doc No.
Doc No.
1
VDD_MEM
C237
C237
C236
C236
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 9
5
MDD19 MDD16 MDD17 MDD18 MDD20 MDD22 MDD21 MDD23 MDD31 MDD24 MDD27 MDD26
VDD_MEM
R163
R163
2.37K
2.37K
C255
C255 100nF
100nF
MDD28 MDD25 MDD29 MDD30 MDD7 MDD6 MDD5 MDD4 MDD0 MDD3 MDD2 MDD1 MDD8 MDD11 MDD10 MDD12 MDD15 MDD14 MDD13 MDD9
VREF = .72*VDDQ
C272
C272 10uF_6.3V
10uF_6.3V
D_BA2 D_BA1 D_BA0
MAD11 MAD10 MAD9 MAD8 MAD7 MAD6 MAD5 MAD4 MAD3 MAD2 MAD1 MAD0
CSD0_0#
WED0#
RASD0#
CASD0#
CKED0
CLKD0# CLKD0
RDQSD2 RDQSD3 RDQSD0 RDQSD1
WDQSD2 WDQSD3 WDQSD0 WDQSD1
DQMD#2 DQMD#3 DQMD#0 DQMD#1
MEM_RST
C273
C273 10uF_6.3V
10uF_6.3V
D D
C C
B B
VDD_MEM
R157
R157
2.37K
2.37K
VREF = .72*VDDQ
R161
R161
C253
C253
5.49K
5.49K
100nF
100nF
R165
R165
5.49K
5.49K
VDD_MEM
A A
C270
C270
C271
C271
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
R158
R158 243R
243R
C274
C274 10uF_6.3V
10uF_6.3V
U8
U8
T3
DQ31 | DQ23
T2
DQ30 | DQ22
R3
DQ29 | DQ21
R2
DQ28 | DQ20
M3
DQ27 | DQ19
N2
DQ26 | DQ18
L3
DQ25 | DQ17
M2
DQ24 | DQ16
T10
DQ23 | DQ31
T11
DQ22 | DQ30
R10
DQ21 | DQ29
R11
DQ20 | DQ28
M10
DQ19 | DQ27
N11
DQ18 | DQ26
L10
DQ17 | DQ25
M11
DQ16 | DQ24
G10
DQ15 | DQ7
F11
DQ14 | DQ6
F10
DQ13 | DQ5
E11
DQ12 | DQ4
C10
DQ11 | DQ3
C11
DQ10 | DQ2
B10
DQ9 | DQ1
B11
DQ8 | DQ0
G3
DQ7 | DQ15
F2
DQ6 | DQ14
F3
DQ5 | DQ13
E2
DQ4 | DQ12
C3
DQ3 | DQ11
C2
DQ2 | DQ10
B3
DQ1 | DQ9
B2
DQ0 | DQ8
H10
BA2 | RAS
G9
BA1 | BA0
G4
BA0 | BA1
L4
A11 | A7
K2
A10 | A8
M9
A9 | A3
K11
A8/AP | A10
L9
A7 | A11
K10
A6 | A2
H11
A5 | A1
K9
A4 | A0
M4
A3 | A9
K3
A2 | A6
H2
A1 | A5
K4
A0 | A4
F9
CS | CAS
H9
WE | CKE
H3
RAS | BA2
F4
CAS | CS
H4
CKE | WE
J10
CK
J11
CK
P3
RDQS3 | RDQS2
P10
RDQS2 | RDQS3
D10
RDQS1 | RDQS0
D3
RDQS0 | RDQS1
P2
WDQS3 | WDQS2
P11
WDQS2 | WDQS3
D11
WDQS1 | WDQS0
D2
WDQS0 | WDQS1
N3
DM3 | DM2
N10
DM2 | DM3
E10
DM1 | DM0
E3
DM0 | DM1
V9
RESET
A4
ZQ
H1
VREF
H12
VREF#H12
136 FBGA
K4J55323QG-BC14
K4J55323QG-BC14
C275
C275 10nF
10nF
VDDQ#A12
VDDQ#C1 VDDQ#C4 VDDQ#C9
VDDQ#C12
VDDQ#E1 VDDQ#E4 VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9 VDDQ#N1 VDDQ#N4 VDDQ#N9
VDDQ#N12
VDDQ#R1 VDDQ#R4 VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD#A11
VDD#F12
VDD#M1
VDD#M12
VDD#V11
VSSQ#B4
VSSQ#B9
VSSQ#B12
VSSQ#D1 VSSQ#D4 VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1
VSSQ#P4
VSSQ#P9
VSSQ#P12
VSSQ#T1
VSSQ#T4
VSSQ#T9
VSSQ#T12
VSS#A10
VSS#G12
VSS#L12
VSS#V10
VDDA#K12
VSSA#J12
PLACE VREF DIVIDER COMPONENTS
AS CLOSE TO MEMORY AS POSSIBLE
C276
C276 10nF
10nF
CHAN D DDR3 BGA MEMORY
5
VDDQ
VDD
VDD#F1
VDD#V2
VSSQ
VSS
VSS#G1
VSS#L1
VSS#V3
VDDA
VSSA
RFU2
RFU1
RFU0
GND | VDD
GND | VDD
C277
C277 1uF_6.3V
1uF_6.3V
4
A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12
A2 A11 F1 F12 M1 M12 V2 V11
B1 B4 B9 B12 D1 D4 D9 D12 G2 G11 L2 L11 P1 P4 P9 P12 T1 T4 T9 T12 A3 A10 G1 G12 L1 L12 V3 V10
K1 K12
C298
C298
C252
C252
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
J12 J1
CSD0_1# CSD1_1#
J3
VDD_MEM VDD_MEM
B8
B8
BLM15BD121SN1
BLM15BD121SN1 BLM15BD121SN1
BLM15BD121SN1
B36
B36
J2
C281
C281 1uF_6.3V
1uF_6.3V
VDD_MEM
R162
R162
5.49K
5.49K
C282
C282 1uF_6.3V
1uF_6.3V
R159
R159
2.37K
2.37K
VREF = .72*VDDQ
C254
C254 100nF
100nF
V4
A9
MF
C279
C279
C280
1uF_6.3V
1uF_6.3V
C280 1uF_6.3V
1uF_6.3V
C278
C278 1uF_6.3V
1uF_6.3V
4
R166
R166
5.49K
5.49K
VDD_MEM
R164
R164
2.37K
2.37K
C256
C256 100nF
100nF
3
MDD49 MDD48 MDD54 MDD50 MDD52 MDD53 MDD51 MDD55 MDD41 MDD42 MDD40 MDD43 MDD47 MDD44 MDD45 MDD46 MDD58 MDD56 MDD57 MDD60 MDD63 MDD61 MDD59 MDD62 MDD34 MDD32 MDD33 MDD36 MDD39 MDD35 MDD38 MDD37
D_BA2 D_BA1 D_BA0
MAD11 MAD10 MAD9 MAD8 MAD7 MAD6 MAD5 MAD4 MAD3 MAD2 MAD1 MAD0
RASD1#
CLKD1# CLKD1
RDQSD6 RDQSD5 RDQSD7 RDQSD4
WDQSD6 WDQSD5 WDQSD7 WDQSD4
DQMD#6 DQMD#5 DQMD#7 DQMD#4
MEM_RST
VREF = .72*VDDQ
3
CSD1_0#
WED1#
CASD1#
CKED1
T3
T2 R3 R2 M3 N2
L3 M2
T10 T11 R10 R11 M10 N11
L10 M11 G10 F11 F10 E11 C10 C11 B10 B11
G3
F2 F3
E2 C3 C2
B3
B2
H10
G9 G4
L4
K2 M9
K11
L9
K10 H11
K9 M4
K3 H2
K4
F9
H9
H3
F4
H4
J10 J11
P3
P10 D10
D3
P2
P11 D11
D2
N3
N10 E10
E3
V9
R160
R160
A4
243R
243R
H1
H12
136 FBGA(MIRROR)
U9
U9
DQ31 | DQ23 DQ30 | DQ22 DQ29 | DQ21 DQ28 | DQ20 DQ27 | DQ19 DQ26 | DQ18 DQ25 | DQ17 DQ24 | DQ16 DQ23 | DQ31 DQ22 | DQ30 DQ21 | DQ29 DQ20 | DQ28 DQ19 | DQ27 DQ18 | DQ26 DQ17 | DQ25 DQ16 | DQ24 DQ15 | DQ7 DQ14 | DQ6 DQ13 | DQ5 DQ12 | DQ4 DQ11 | DQ3 DQ10 | DQ2 DQ9 | DQ1 DQ8 | DQ0 DQ7 | DQ15 DQ6 | DQ14 DQ5 | DQ13 DQ4 | DQ12 DQ3 | DQ11 DQ2 | DQ10 DQ1 | DQ9 DQ0 | DQ8
BA2 | RAS BA1 | BA0 BA0 | BA1
A11 | A7 A10 | A8 A9 | A3 A8/AP | A10 A7 | A11 A6 | A2 A5 | A1 A4 | A0 A3 | A9 A2 | A6 A1 | A5 A0 | A4
CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK CK
RDQS3 | RDQS2 RDQS2 | RDQS3 RDQS1 | RDQS0 RDQS0 | RDQS1
WDQS3 | WDQS2 WDQS2 | WDQS3 WDQS1 | WDQS0 WDQS0 | WDQS1
DM3 | DM2 DM2 | DM3 DM1 | DM0 DM0 | DM1
RESET
ZQ
VREF
VREF#H12
K4J55323QG-BC14
K4J55323QG-BC14
VDD_MEM
C257
C257 1uF_6.3V
1uF_6.3V
VDDQ#A12
VDDQ#C12
VDDQ#E12
VDDQ#N12
VDDQ#R12
VDDQ#V12
VSSQ#B12
VSSQ#D12
VSSQ#G11
VSSQ#L11
VSSQ#P12
VSSQ#T12
VDDA#K12
C258
C258 1uF_6.3V
1uF_6.3V
VDDQ
VDDQ#C1 VDDQ#C4 VDDQ#C9
VDDQ#E1 VDDQ#E4 VDDQ#E9
VDDQ#J4
VDDQ#J9 VDDQ#N1 VDDQ#N4 VDDQ#N9
VDDQ#R1 VDDQ#R4 VDDQ#R9
VDDQ#V1
VDD
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ VSSQ#B4 VSSQ#B9
VSSQ#D1 VSSQ#D4 VSSQ#D9
VSSQ#G2
VSSQ#L2
VSSQ#P1 VSSQ#P4 VSSQ#P9
VSSQ#T1 VSSQ#T4 VSSQ#T9
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA
VSSA#J12
VSSA
RFU2
RFU1
RFU0
GND | VDD
GND | VDD
2
A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12
A2 A11 F1 F12 M1 M12 V2 V11
B1 B4 B9 B12 D1 D4 D9 D12 G2 G11 L2 L11 P1 P4 P9 P12 T1 T4 T9 T12 A3
VSS
A10 G1 G12 L1 L12 V3 V10
K1 K12
1uF_6.3V
1uF_6.3V
J12 J1
C299
C299
B7
B7
C251
C251 1uF_6.3V
1uF_6.3V
B37
B37
J3
J2
V4
A9
MF
C259
C259
C260
C260
C261
10uF_6.3V
10uF_6.3V
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
C261
10uF_6.3V
10uF_6.3V
10uF_6.3V
10uF_6.3V
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
2
BLM15BD121SN1
BLM15BD121SN1 BLM15BD121SN1
BLM15BD121SN1
C262
C262 10nF
10nF
C263
C263 10nF
10nF
RASD0#(4) RASD1#(4)
CASD0#(4) CASD1#(4)
WED0#(4) WED1#(4)
CSD0_0#(4) CSD1_0#(4) CSD0_1#(4) CSD1_1#(4)
CKED0(4) CKED1(4)
CLKD0(4)
CLKD0#(4)
CLKD1(4)
CLKD1#(4)
C264
C264 1uF_6.3V
1uF_6.3V
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markhaml, Ontario
Markhaml, Ontario
Markhaml, Ontario
Tuesday, May 20, 2008
Tuesday, May 20, 2008
Tuesday, May 20, 2008
Sheet
Sheet
Sheet
9 15
9 15
9 15
WDQSD[7..0](4)
RDQSD[7..0](4)
RASD0# RASD1#
CASD0# CASD1#
WED0# WED1#
CSD0_0# CSD1_0# CSD0_1# CSD1_1#
CKED0 CKED1
CLKD0
CLKD0#
CLKD1
CLKD1#
C265
C265 1uF_6.3V
1uF_6.3V
of
of
of
MAD[11..0](4)
D_BA0(4) D_BA1(4) D_BA2(4)
DQMD#[7..0](4)
MDD[63..0](4)
MEM_RST(3,6,7,8)
R142 121RR142 121R R141 121RR141 121R
R144 121RR144 121R R143 121RR143 121R
R145 121RR145 121R R146 121RR146 121R
R147 121RR147 121R R148 121RR148 121R R149 121RR149 121R R150 121RR150 121R
R152 121RR152 121R R151 121RR151 121R
C266
C266 1uF_6.3V
1uF_6.3V
1
1
C267
C267 1uF_6.3V
1uF_6.3V
Doc No.
Doc No.
Doc No.
MAD[11..0]
D_BA0 D_BA1 D_BA2
WDQSD[7..0]
RDQSD[7..0]
DQMD#[7..0]
MDD[63..0]
MEM_RST
R153
R153
60.4R
60.4R R154
R154
60.4R
60.4R
R155
R155
60.4R
60.4R R156
R156
60.4R
60.4R
VDD_MEM
C268
C268 1uF_6.3V
1uF_6.3V
RevDate:
RevDate:
RevDate:
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
0
0
0
C269
C269 1uF_6.3V
1uF_6.3V
www.vinafix.vn
Page 10
5
G_PWR_SRC
C288
C288
C283
C283
100nF_50V
100nF_50V
100nF_50V
100nF_50V
+5VRUN
C290
C290
C291
C291
100nF
100nF
100nF
HPD3_I
HPD2_I
PBATB_SMBCLK
PBATB_SMBDAT
100nF
D D
C C
B B
A A
VGA_RED(2) VGA_GRN(2)
VGA_BLU(2)
PCIE_REFCLKP(1) PCIE_REFCLKN(1)
PCIE_RXP[15..0](1)
PCIE_RXN[15..0](1)
PCIE_TXP[15..0](1)
PCIE_TXN[15..0](1)
RUNPWROK(11,12)
TXOUT_L0-(2) TXOUT_L0+(2) TXOUT_L1-(2) TXOUT_L1+(2) TXOUT_L2-(2) TXOUT_L2+(2) TXOUT_L3-(2) TXOUT_L3+(2) TXCLK_L-(2) TXCLK_L+(2)
TXOUT_U0-(2) TXOUT_U0+(2) TXOUT_U1-(2) TXOUT_U1+(2) TXOUT_U2-(2) TXOUT_U2+(2) TXOUT_U3-(2) TXOUT_U3+(2) TXCLK_U-(2) TXCLK_U+(2)
I2C_CLK(2) I2C_DAT(2)
HPD2(2)
DDC2CLK(2)
DDC2DAT(2)
PBAT_SMBCLK(2)
PBAT_SMBDAT(2)
VGA_RED VGA_GRN VGA_BLU
PCIE_REFCLKP PCIE_REFCLKN
PCIE_RXP[15..0]
PCIE_RXN[15..0]
PCIE_TXP[15..0]
PCIE_TXN[15..0]
RUNPWROK
TXOUT_L0­TXOUT_L0+ TXOUT_L1­TXOUT_L1+ TXOUT_L2­TXOUT_L2+ TXOUT_L3-
TXOUT_L3+
TXCLK_L­TXCLK_L+
TXOUT_U0­TXOUT_U0+ TXOUT_U1­TXOUT_U1+ TXOUT_U2-
TXOUT_U2+ TXOUT_U3­TXOUT_U3+
TXCLK_U-
TXCLK_U+
I2C_CLK I2C_DAT
R250 0RDNIR250 0RDNI
R251 0RDNIR251 0RDNI
R252 0RR252 0R
R253 0RR253 0R
5
FPVCC
+3VRUN
R202
R202
5.1K
5.1K
R180
R180 100K
100K
R181
R181 100K
100K
R203
R203
5.1K
5.1K
VGA/TV#
HDTV#/TV
+3VRUN
R249
R249
R248
R248
100K
100K
100K
100K
DNI
DNI
FPVCC(2)
HPD3(2)
PEX_STD_SW#(14) VGA_DISABLE#(14)
HPD1(2)
DPB0N(2) DPB0P(2)
DPB1N(2) DPB1P(2)
DPB2N(2) DPB2P(2)
DPB3N(2) DPB3P(2)
DPB_AUXN(2) DPB_AUXP(2)
DPA0N(2) DPA0P(2)
DPA1N(2) DPA1P(2)
DPA2N(2) DPA2P(2)
DPA3N(2) DPA3P(2)
DPA_AUXN(2) DPA_AUXP(2)
C289
C289 1nF
1nF
R201
R201 100K
100K
I2C_DAT I2C_CLK
PCIE_TXN15 PCIE_TXP15
PCIE_TXN14 PCIE_TXP14
PCIE_TXN13 PCIE_TXP13
PCIE_TXN12 PCIE_TXP12
PCIE_TXN11 PCIE_TXP11
PCIE_TXN10 PCIE_TXP10
PCIE_TXN9 PCIE_TXP9
PCIE_TXN8 PCIE_TXP8
PCIE_TXN7 PCIE_TXP7
PCIE_TXN6 PCIE_TXP6
PCIE_TXN5 PCIE_TXP5
PCIE_TXN4 PCIE_TXP4
PCIE_TXN3 PCIE_TXP3
PCIE_TXN2 PCIE_TXP2
PCIE_TXN1 PCIE_TXP1
PCIE_TXN0 PCIE_TXP0
PCIE_REFCLKN PCIE_REFCLKP
TXCLK_U­TXCLK_U+
TXOUT_U3­TXOUT_U3+
TXOUT_U2­TXOUT_U2+
TXOUT_U1­TXOUT_U1+
TXOUT_U0­TXOUT_U0+
DPA0N DPA0P
DPA1N DPA1P
DPA2N DPA2P
DPA3N DPA3P
R1860RR186
4
FPVCC_MB BL_ENA BL_BRIGHT_MB
HPD1
DPB0N DPB0P
DPB1N DPB1P
DPB2N DPB2P
DPB3N DBP3P
0R
4
J1
J1
PWR_SRC_E1E1PWR_SRC_E2
E3
GND_E3
1
5V_1
3
5V_3
5
5V_5
7
5V_7
9
5V_9
11
GND_11
13
GND_13
15
GND_15
17
GND_17
19
PEX_STD_SW#_19
21
VGA_DISABLE#_21
23
PNL_PWR_EN_23
25
PNL_BL_EN_25
27
PNL_PWM_27
29
HDMI_CEC_29
31
DVI_HPD_31
33
LVDS_DDC_DAT_33
35
LVDS_DDC_CLK_35
37
GND_37
39
OEM_39
41
OEM_41
43
OEM_43
45
OEM_45
47
GND_47
49
PEX_RX15#_49
51
PEX_RX15_51
53
GND_53
55
PEX_RX14#_55
57
PEX_RX14_57
59
GND_59
61
PEX_RX13#_61
63
PEX_RX13_63
65
GND_65
67
PEX_RX12#_67
69
PEX_RX12_69
71
GND_71
73
PEX_RX11#_73
75
PEX_RX11_75
77
GND_77
79
PEX_RX10#_79
81
PEX_RX10_81
83
GND_83
85
PEX_RX9#_85
87
PEX_RX9_87
89
GND_89
91
PEX_RX8#_91
93
PEX_RX8_93
95
GND_95
97
PEX_RX7#_97
99
PEX_RX7_99
101
GND_101
103
PEX_RX6#_103
105
PEX_RX6_105
107
GND_107
109
PEX_RX5#_109
111
PEX_RX6_111
113
GND_113
115
PEX_RX4#_115
117
PEX_RX4_117
119
GND_119
121
PEX_RX3#_121
123
PEX_RX3_123
125
GND_125
Mechanical Key
Mechanical Key
133
GND_133
135
PEX_RX2#_135
137
PEX_RX2_137
139
GND_139
141
PEX_RX1#_141
143
PEX_RX1_143
145
GND_145
147
PEX_RX0#_147
149
PEX_RX0_149
151
GND_151
153
PEX_REFCLK#_153
155
PEX_REFCLK_155
157
GND_157
159
RSVD_159
161
RSVD_161
163
RSVD_163
165
RSVD_165
167
RSVD_167
169
LVDS_UCLK#_169
171
LVDS_UCLK_171
173
GND_173
175
LVDS_UTX3#_175
177
LVDS_UTX3_177
179
GND_179
181
LVDS_UTX2#_181
183
LVDS_UTX2_183
185
GND_185
187
LVDS_UTX1#_187
189
LVDS_UTX1_189
191
GND_191
193
LVDS_UTX0#_193
195
LVDS_UTX0_195
197
GND_197
199
DP_C_L0#_199
201
DP_C_L0_201
203
GND_203
205
DP_C_L1#_205
207
DP_C_L1_207
209
GND_209
211
DP_C_L2#_211
213
DP_C_L2_213
215
GND_215
217
DP_C_L3#_217
219
DP_C_L3_219
221
GND_221
223
DP_C_AUX#_223
225
DP_C_AUX_225
227
RSVD_227
229
RSVD_229
231
RSVD_231
233
RSVD_233
235
RSVD_235
237
RSVD_237
239
RSVD_239
241
RSVD_241
243
RSVD_243
245
RSVD_245
247
RSVD_247
249
RSVD_249
251
GND_251
253
DP_A_L0#_253
255
DP_A_L0_255
257
GND_257
259
DP_A_L1#_259
261
DP_A_L1_261
263
GND_263
265
DP_A_L2#_265
267
DP_A_L2_267
269
GND_269
271
DP_A_L3#_271
273
DP_A_L3_273
275
GND_275
277
DP_A_AUX#_277
279
DP_A_AUX_279
281
PRSNT_L#_281
MXM 3
MXM 3
VGA_DDC_DAT_158 VGA_DDC_CLK_160
VGA_GREEN_170
LVDS_LCLK#_176
GND_E4
PRSNT_R#_2
WAKE#_4
PWR_GOOD_6
PWR_EN_8
RSVD_10 RSVD_12 RSVD_14 RSVD_16
PWR_LEVEL_18
TH_OVERT#_20
TH_ALERT#_22
TH_PWM_24
GPIO0_26 GPIO1_28
GPIO2_30 SMB_DAT_32 SMB_CLK_34
GND_36 OEM_38 OEM_40 OEM_42 OEM_44 GND_46
PEX_TX15#_48
PEX_TX15_50
GND_52
PEX_TX14#_54
PEX_TX14_56
GND_58
PEX_TX13#_60
PEX_TX13_62
GND_64
PEX_TX12#_66
PEX_TX12_68
GND_70
PEX_TX11#_72
PEX_TX11_74
GND_76
PEX_TX10#_78
PEX_TX10_80
GND_82
PEX_TX9#_84
PEX_TX9_86
GND_88
PEX_TX8#_90
PEX_TX8_92
GND_94
PEX_TX7#_96
PEX_TX7_98
GND_100
PEX_TX6#_102
PEX_TX6_104
GND_106
PEX_TX5#_108
PEX_TX5_110
GND_112
PEX_TX4#_114
PEX_TX4_116
GND_118
PEX_TX3#_120
PEX_TX3_122
GND_124
GND_134
PEX_TX2#_136
PEX_TX2_138
GND_140
PEX_TX1#_142
PEX_TX1_144
GND_146
PEX_TX0#_148
PEX_TX0_150
GND_152
CLK_REQ#_154
PEX_RST#_156
VGA_VSYC_162 VGA_HSYC_164
GND_166
VGA_RED_168
VGA_BLUE_172
GND_174
LVDS_LCLK_178
GND_180
LVDS_LTX3#_182
LVDS_LTX3_184
GND_186
LVDS_LTX2#_188
LVDS_LTX2_190
GND_192
LVDS_LTX1#_194
LVDS_LTX1_196
GND_198
LVDS_LTX0#_200
LVDS_LTX0_202
GND_204
DP_D_L0#_206
DP_D_L0_208
GND_210
DP_D_L1#_212
DP_D_L1_214
GND_216
DP_D_L2#_218
DP_D_L2_220
GND_222
DP_D_L3#_224
DP_D_L3_226
GND_228
DP_D_AUX#_230
DP_D_AUX_232 DP_C_HPD_234 DP_D_HPD_236
RSVD_238 RSVD_240 RSVD_242
GND_244
DP_B_L0#_246
DP_B_L0_248
GND_250
DP_B_L1#_252
DP_B_L1_254
GND_256
DP_B_L2#_258
DP_B_L2_260
GND_262
DP_B_L3#_264
DP_B_L3_266
GND_268
DP_B_AUX#_270
DP_B_AUX_272 DP_B_HPD_274 DP_A_HPD_276
3V3_278 3V3_280
3
2.2K
2.2K
C326
C326
1uF_6.3V
1uF_6.3V
R188
R188
2.2K
2.2K
+3VRUN
+3VRUN_BUS
+3VRUN_BUS
R184 0R
R184 0R
DNI
DNI
R185
R185 10K
10K
DNI
DNI
0R
R489
R489 10K
10K
DNI
DNI
C940
C940
1uF_6.3V
1uF_6.3V
DNI
DNI
R4690R DNI R4690R DNI R4700R DNI R4700R DNI R4480R R4480R R4490RR449
CTFb(2)
CLKREQB (2)
GENERICA (2) GENERICB (2) DDC1CLK (2) DDC1DAT (2)
R490
R490 0R
0R
DNI
DNI
OPTION STRAP
+3VRUN_BUS
E2 E4
R194 0RR194 0R
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254 256 258 260 262 264 266 268 270 272 274 276 278 280
VGA/TV# HDTV#/TV
SMB_DAT SMB_CLK
PCIE_RXN15 PCIE_RXP15
PCIE_RXN14 PCIE_RXP14
PCIE_RXN13 PCIE_RXP13
PCIE_RXN12 PCIE_RXP12
PCIE_RXN11 PCIE_RXP11
PCIE_RXN10 PCIE_RXP10
PCIE_RXN9 PCIE_RXP9
PCIE_RXN8 PCIE_RXP8
PCIE_RXN7 PCIE_RXP7
PCIE_RXN6 PCIE_RXP6
PCIE_RXN5 PCIE_RXP5
PCIE_RXN4 PCIE_RXP4
PCIE_RXN3 PCIE_RXP3
PCIE_RXN2 PCIE_RXP2
PCIE_RXN1 PCIE_RXP1
PCIE_RXN0 PCIE_RXP0
VGA_RED VGA_GRN VGA_BLU
TXCLK_L-
TXCLK_L+
TXOUT_L3­TXOUT_L3+
TXOUT_L2-
TXOUT_L2+
TXOUT_L1­TXOUT_L1+
TXOUT_L0­TXOUT_L0+
HPD3_I
HPD2_I 3V3RUN
PWRGOOD (12)
PWR_LEVEL (2,11) CTFb (2) OTEMP# (2) TH_PWM (2)
VGA/TV# (2) HDTV#/TV (2)
PCIE_RST# (1)
VSYNC (2,14) HSYNC (2,14)
C324
C324
10uF_.095
10uF_.095
3
C325
C325
1uF_6.3V
1uF_6.3V
R488 0RR488 0R
R189
R189
2
+3VRUN_BUS
C939 100nFC939 100nF
NC7SZ08P5X_NL
NC7SZ08P5X_NL
53
1
4
2
U34
U34
R259
R259 100K
100K
OTEMP#
The circuit is an option to prevent the leakage from LCD
2
BL_ENA
BL_BRIGHT_MB FPVCC_MB
R168
R168 10K
10K
DNI
DNI
SMB_DAT
+3VRUN
C304
C304 100nF
100nF
DNI
DNI
BL_BRIGHT_MB
FPVCC_MB
+5VRUN
+5VRUN
RUNPWROK (11,12)
R173 0RR173 0R
R174 0R
R174 0R
DNI
DNI
6 3
8 4
74LVC2G126
74LVC2G126
R197
R197
2.21K
2.21K
DNI
DNI
3 2
+3VRUN
R187
R187
2.21K
2.21K
DNI
DNI
3 2
R172 0R
R172 0R
DNI
DNI
U12
U12
DNI
DNI
2
1A
1Y
5
2A
2Y
1
1OE
VCC
7
2OE
GND
R176 0RR176 0R
R177 0RR177 0R
+3VRUN
1
Q6
DNIQ6
DNI
BSH111
BSH111 R1980RR198 0R
1
Q5
DNIQ5
DNI
BSH111
BSH111
R1910RR191 0R
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
R175 0R
R175 0R
BL_BRIGHT
BL_BRIGHTBL_BRIGHTBL_BRIGHT
BL_BRIGHT
FPVCC (2)
DNI
DNI
C305
C305 100nF
100nF
DNI
DNI
FPVCC (2)
PBATB_SMBDAT
PBATB_SMBCLKSMB_CLK
BLON_PWM (2)
OPT_BL_ENA (2)
+3VRUN
1
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Tuesday, June 03, 2008
Tuesday, June 03, 2008
Tuesday, June 03, 2008
Sheet
Sheet
Sheet
of
10 15
of
10 15
of
10 15
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 11
5
4
3
2
1
GPU1 CORE REG
CORE PWM TWO PHASE REGULATOR @ 50A
G_PWR_SRC
C330
C330 10UF_25V
10UF_25V
1 2
L1
L1
R206
R206
3.65K
3.65K
C337
C337 C337
C337
220nF
220nF
DIFFERENTIAL ROUTING KEEP AWAY FROM NOISY SOURCE
G_PWR_SRC
9 5
10UF_25V
10UF_25V
6 7 8
L2
L2
PCMC104T-R36MN
PCMC104T-R36MN
1 2
R215
R215 10K
10K
R216
R216
3.65K
3.65K
C354
C354 C354
C354
220nF
220nF
DIFFERENTIAL ROUTING KEEP AWAY FROM NOISY SOURCE
C327
C327 10UF_25V
10UF_25V
DIRECT ROUTED TO INDUCTOR PAD
R214
R214
1.5R
1.5R
C338
C338
C328
C328C328
C328
2.2nF_50V
2.2nF_50V
VSUM
QUIET SIGNAL KEEP AWAY FROM NOISY SOURCE
C339
C339C339
C339
2.2nF_50V
2.2nF_50V
C351
C351
10UF_25V
10UF_25V
DIRECT ROUTED TO INDUCTOR PAD
R220
R220
1.5R
1.5R
VSUM
QUIET SIGNAL KEEP AWAY FROM NOISY SOURCE
C331
C331C331
C331
100nF_50V
100nF_50V
C352
C352C352
C352
100nF_50V
100nF_50V
VDD_CORE
(VDDC Can be 1.2V @ 50A)
C341
C341 1000uF_5mR
1000uF_5mR
C344
C344 1000uF_5mR
1000uF_5mR
C947
C947 1000uF_5mR
1000uF_5mR
C346
C346 10uF_.095
10uF_.095
C336
C336 10uF_.095
10uF_.095
C347
C347 10uF_.095
10uF_.095
4 3 2 1
100A 1.6mOhm SSO8
4 3 2 1
9 5 6 7 8
1 2
30A 0.006 Ohms LFPAK
Q27
Q27
4 3 2 1
BSC120N03MS_G
BSC120N03MS_G
Q44
Q44
9 5 6 7 8
BSC016N03MS_G
BSC016N03MS_G
9 5 6 7 8
Q46
Q46
4 3 2 1
BSC016N03MS_G
BSC016N03MS_G
100A 1.6mOhm SSO8
AGND
9 5 6 7 8
LF INDUCTOR 0.36uH 20% Irms=30A, Isat=60A, DCR=1.2mR, SMT
PCMC104T-R36MN
PCMC104T-R36MN
R204
R204 10K
10K
BSC120N03MS_G
BSC120N03MS_G
Q31
Q31
4 3 2 1
9 5 6 7 8
D D
VID2VID3 VDDC
0 0
0
0 1 0 1.050V
0 1
1
C C
300KHZ SWITCHING FREQ
VDDC_PGD(12)
B B
VID1
1.150V
0
10
1.100V
1.000V
1
0 0
01 0.900V
VDD_CORE
VCORE_SEN(5)
VCORE_RTN(5)
AGND
+3VRUN_BUS
VID1
R234
R234 10K
10K
+3VRUN_BUS
VID2
R235
R235 10K
10K
AGND
VID3
R236
R236 10K
10K
AGND
1
10K
10K R410
R410
0.950V
R218 100RDNIR218 100RDNI
R217 10RR217 10R
R223 10RR223 10R
R225 100RDNIR225 100RDNI
PGD
+5VRUN
AGND
AGND
G_PWR_SRC
AGND
AGND
+3VRUN_BUS
AGND
PWR_LEVEL(2,10)
+3VRUN_BUS
C311 1nF
C311 1nF
DNI
DNI
C310 68nF_16VC310 68nF_16V
R207 261RR207 261R
C312
C312 1nF
1nF
C358 470pFC358 470pF C353 220pFC353 220pF
C332 1uF_10VC332 1uF_10V
AGND
AGND
VO
C356
C356
47nF
47nF
R238 150KR238 150K
C313 47nFC313 47nF
AGND
VID1(2) VID2(2) VID3(2)
AGND
R239 36.5KR239 36.5K
R224 0RR224 0R R226 10K
R226 10K
DNI
DNI
AGND
RUNPWROK(10,12)
AGND
R205 1KR205 1K
C340 1nFC340 1nF
R210 93.1KR210 93.1K
R208 6.81KR208 6.81K
C343 1nFC343 1nF
R199
R199 10R
10R
C329 2.2uF_10VC329 2.2uF_10V
R237 1.5RR237 1.5R
C314 10nFC314 10nF
AGND
R222 1KR222 1K
R219 5.49KR219 5.49K
C342 180pFC342 180pF
R209 6.81KR209 6.81K
C355
C355
220nF
220nF
t
t
RT PLACED CLOSE L1
VID1 VID2 VID3
PGD
VSUM
R213
R213
2.61K
2.61K
RT1
RT1 10K_1%
10K_1%
R212
R212 11K
11K
2
4
32 33 34 35 36 37
3
39
1
38
40
10
11
9
8
7
6
18
26
16
17
13
12
5
15
VO
U13
U13
RBIAS
SOFT
VID0 VID1 VID2 VID3 VID4 VID5
OFS
PSI_L
SET
VR_ON
PGOOD
VSEN
RTN
VDIFF
FB
COMP
VW
VDD
PVCC
VIN
GND
DFB
DROOP
OCSET
VSUM
ISL6264CRZ
ISL6264CRZ
UGATE1
BOOT1
PHASE1
LGATE1
PGND1
ISEN1
UGATE2
BOOT2
PHASE2
LGATE2
PGND2
ISEN2
epad1 epad2 epad3 epad4 epad5 epad6 epad7 epad8 epad9
Q26
Q26
9
BSC120N03MS_G
BSC120N03MS_G
Q43
Q43
Q45
Q45
4 3 2 1
BSC016N03MS_G
BSC016N03MS_G
C357 100nFC357 100nF
5 6 7 8
9 5 6 7 8
30A 0.006 Ohms LFPAK
Q30 BSC120N03MS_GQ30 BSC120N03MS_G
4 3 2 1
30
C333
C333
31
220nF
220nF
29
27
28
20
VO
14
VO
22
21
23
25
24
19
41 49 48
VO
47 46 45 44 43 42
C350
C350 220nF
220nF
4 3 2 1
BSC016N03MS_G
BSC016N03MS_G
C349 100nFC349 100nF
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
5
4
3
M98-L 1GB DDR3 MXM 3.0 CF
2
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Tuesday, May 27, 2008
Tuesday, May 27, 2008
Tuesday, May 27, 2008
Sheet
Sheet
Sheet
of
11 15
of
11 15
of
11 15
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 12
1
2
3
4
5
6
7
8
G_PWR_SRC
C842
C842
C843
C843
10UF_25V
10UF_25V
10UF_25V
10UF_25V
Should be Toko 0.56uH/1.4Omh. FDU1040-R56M
L7 0.56uHL7 0.56uH
5260044600G
R415
R415
3.83K
3.83K
C854 C854
C854
DIFFERENTIAL ROUTING
C859
C859 10UF_25V
10UF_25V
R427
R427
7.15K
7.15K
R428 1.02KR428 1.02K
C869 220nFC869 220nF
DIFFERENTIAL ROUTING
CURRENT LIMIT = 25A @ 85C
R412
R412
3.83K
3.83K
C854 220nF
220nF
C861
C861C861
C861
2.2nF_50V
2.2nF_50V
L8
4.7UHL84.7UH
C844
C844C844
C844
2.2nF_50V
2.2nF_50V
C862
C862C862
C862R424 18.0KR424 18.0K
100nF_50V
100nF_50V
LF INDUCTOR 4.7UH 20% 5.5A , 37mOhms SHIELDED SM
C845
C845C845
C845
100nF_50V
100nF_50V
C849
C849 1000uF_5mR
1000uF_5mR
VDD_MEM
C850
C850
C851
C851
10uF_.095
10uF_.095
10uF_.095
10uF_.095
1.8V, 4A
1.8V_REG
C866
C864
C864 330uF_2.5V
330uF_2.5V
C866
C865
C865
10uF_.095
10uF_.095
10uF_.095
10uF_.095
1.1V IO LINEAR REGULATOR
(MVDDQ = 1.8V @ 20A)
1.8V_REG
9 5 6 7 8
4 3 2 1
100A 1.6mOhm SSO8
R419 10RR419 10R
R420 10RR420 10R
13A, 12mOhms@4.5V, Qg=10nC
C872
C872
4.7NF_50V
4.7NF_50V
30A 0.006 Ohms LFPAK
Q35
Q35
4 3 2 1
BSC120N03MS_G
BSC120N03MS_G
Q48
Q48
BSC016N03MS_G
BSC016N03MS_G
798
2
1
5610
4
3
R434 10RR434 10R
R435 10RR435 10R
9 5 6 7 8
9 5 6 7 8
Q49A
Q49A
BSC150N03LD_G
BSC150N03LD_G
Q49B
Q49B
BSC150N03LD_G
BSC150N03LD_G
+5VRUN
Q34
I/O REG
+5VRUN
A A
CURRENT
ILIM1&2
LIMIT
VCC_17007_2 60MV
OPEN 45MV
REF 30MV
R2* R1*
GND_17007
RUNPWROK(10,11)
VDDC_PGD(11)
+3VRUN_BUS
B B
+3VRUN_BUS
PWRGOOD(10)
Vout = Vref(2.0V)*[R2/(R1+R2)]
GND_17007
VIN
REF
G_PWR_SRC
GND_17007
C863 2.2nFC863 2.2nF
C873
C873 100nF
100nF
DNI
DNI
GND_17007
R417 10KR417 10K
R413 10KR413 10K
R414 0R
R414 0R
R437 0R
R437 0R
+5VRUN
R4400R DNI R4400R DNI
R4410R R4410R
PWRGOOD
C847
C847
1uF_10V
1uF_10V
DNI
DNI
DNI
DNI
R436 0RR436 0R
R422 2.0KR422 2.0K
R411
R411 10R
10R
VIN
R416 200KR416 200K
R418 182KR418 182K
SKIP Mode
REFIN1
R4320R DNI R4320R DNI R4330R R4330R
MVDDC_PGD
PWRGOOD
PWRGOOD
GND_17007
C846
C846
2.2uF_10V
2.2uF_10V
U29A
U29A
18
BST1
VDD
4
Vcc
DH1
2
ILIM1
3
ILIM2
6
TON1
PGND
7
TON2
CSH1
5
SKIP
1
8
11
25
12
24
16
REF
REFIN1
EN1
EN2
PGOOD1
PGOOD2
GND
MAX17007GTI+
MAX17007GTI+
CSH2
CSL1
BST2
CSL2
DH2
REF
LX1
DL1
LX2
DL2
FB2
GND_17007
15
13
14
17
20
10
9
21
23
22
19
26
27
28
C848 100nFC848 100nF
R426 15.8KR426 15.8K
R430
R430
C867
C867
10K
10K
1nF
1nF
DNI
DNI
R2
C858
C858 100nF
100nF
R1
Q34
4 3 2 1
BSC120N03MS_G
BSC120N03MS_G
Q47
Q47
4 3 2 1
BSC016N03MS_G
BSC016N03MS_G
C856
C856
47pF_50V
47pF_50V
C857 4.7NF_50VC857 4.7NF_50V
1.8V_REG
9 5 6 7 8
47pF_50V
47pF_50V
C871
C871
R1 = R2(Vout/0.7V - 1)
U29B
U29B
29 30 31 32 33
MAX17007GTI+
REFIN1
R438
R438
6.34K
6.34K
32
Q38
C C
MEM_PP(2)
Q38
1
2N7002E
2N7002E
MAX17007GTI+
34
AG1
AG6
35
AG2
AG7
36
AG3
AG8
37
AG4
AG9
AG5
GND_17007
12
GND_17007
R245 0R
R245 0R
DNI
DNI
Q19
Q19
+3VRUN_BUS +3VRUN
D D
1
2
3
2 3
R246
R246 100K
100K
1
32
Si2301BDS
Si2301BDS
3.3V Max.1.5A
Q20
Q20
R444 0RR444 0R
R247 24.3K
R247 24.3K
1
2N7002_NL
2N7002_NL
C386
C386 220nF
220nF
DNI
DNI
DNI
DNI
4
PWRGOOD
RUNPWROK (10,11)
1.8V_REG
R227
R227 10K
10K
R442
R442 22K
22K
R229
R229
6.34K
6.34K
5
+5VRUN
C370 100nFC370 100nF
C371
C371
2.2nF
2.2nF
U14
U14
+
+
LM321MF_NOPB
LM321MF_NOPB
1
+
+
4
3
-
-
-
-
2 5
C372
C372 1nF
1nF
6
4 3 2 1
R233
R233
100R
100R
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
Q53
Q53
BSC120N03LSG
BSC120N03LSG
C365
C365 22uF
22uF
1.8V_REG
9 5 6 7 8
1.1V_REG
C364
C364 22uF
22uF
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Sheet
Sheet
Sheet
of
12 15
of
12 15
of
12 15
7
Doc No.
Doc No.
Doc No.
8
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 13
5
D D
C C
B B
1.8V_REG
1.8V_REG
B9
B9
BLM15BD121SN1
BLM15BD121SN1
B15
B15
BLM15BD121SN1
BLM15BD121SN1
B17
B17
BLM15BD121SN1
BLM15BD121SN1
B19 470R_1000mAB19 470R_1000mA
B21
B21
BLM15BD121SN1
BLM15BD121SN1
B22
B22
BLM15BD121SN1
BLM15BD121SN1
TSVDD
(20mA 1.8V TSVDD)
C391
C391
C390
C390
1uF_6.3V
1uF_6.3V
NS1
10uF_6.3V
10uF_6.3V
TSVSS
C417
C417
C416
C416
1uF_6.3V
1uF_6.3V
10uF_6.3V
10uF_6.3V
C420
C420
C419
C419
1uF_6.3V
1uF_6.3V
10uF_6.3V
10uF_6.3V
C426
C426
C425
C425
1uF_6.3V
1uF_6.3V
10uF_6.3V
10uF_6.3V
C438
C438
C437
C437
1uF_6.3V
1uF_6.3V C445
10uF_6.3V
10uF_6.3V
C450
C450
C446
C446
10uF_6.3V
10uF_6.3V
1uF_6.3V
1uF_6.3V
NS1
12
NS_VIA
NS_VIA
DPLL_PVDD
(40mA 1.8V DPLL_PVDD)
C413
C413 100nF
100nF
GND_PVSS
LPVDD
(20MA 1.8V LPVDD)
C421
C421 100nF
100nF
LVDDC
400 MA 1.8V LVDDR+LVDDC)
C427
C427 100nF
100nF
(20 MA 1.8V DPA_PVDD)
C439
C439 100nF
100nF
GND_DPA_PVSS
(20 MA 1.8V DPB_PVDD)
C451
C451 100nF
100nF
GND_LPVSS
DPA_PVDD
DPB_PVDD
NS7
NS7
NS_VIA
NS_VIA
NS8
NS8
NS_VIA
NS_VIA
NS9 NS_VIANS9 NS_VIA
NS10 NS_VIANS10 NS_VIA
GND_DPB_PVSS
4
1.8V_REG
B10
B10 BLM15BD121SN1
BLM15BD121SN1
B11
B11 BLM15BD121SN1
BLM15BD121SN1
B13
B13
BLM15BD121SN1
BLM15BD121SN1
B14
B14 BLM15BD121SN1
BLM15BD121SN1
B16
B16 BLM15BD121SN1
1.8V_REG
BLM15BD121SN1
L5 470R_1000mAL5 470R_1000mA
12
12
C392
C392 10uF_6.3V
10uF_6.3V
C395
C395 10uF_6.3V
10uF_6.3V
C401
C401 10uF_6.3V
10uF_6.3V
C404
C404 10uF_6.3V
10uF_6.3V
C414
C414 10uF_6.3V
10uF_6.3V
C428
C428 100nF_6.3V
100nF_6.3V
C393
C393 1uF_6.3V
1uF_6.3V
C396
C396 1uF_6.3V
1uF_6.3V
C402
C402 1uF_6.3V
1uF_6.3V
C405
C405 1uF_6.3V
1uF_6.3V
C415
C415 1uF_6.3V
1uF_6.3V
C429
C429 100nF_6.3V
100nF_6.3V
L6 470R_1000mAL6 470R_1000mA
C441
C441
C440
12
B23
B23 BLM15BD121SN1
BLM15BD121SN1
12
C440 100nF_6.3V
100nF_6.3V
C447
C447 10uF_6.3V
10uF_6.3V
100nF_6.3V
100nF_6.3V
C448
C448 1uF_6.3V
1uF_6.3V
GND_PCIE_PVSS
DAC1_AVDD
(65mA 1.8V AVDD)
C394
C394 100nF
100nF
VDD1DI
(55 mA 1.8V VDD1DI)
C397
C397 100nF
100nF
A2VDDQ
(2 mA 1.8V A2VDDQ)
C403
C403 100nF
100nF
VDD2DI
(55 mA 1.8V VDD2DI)
C406
C406 100nF
100nF
VDD_CT
(150mA 1.8V VDD_CT)
C418
C418 100nF
100nF
C431
C431
C430
C430
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C442
C442
C443
C443
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
PCIE_PVDD
(60mA 1.8V PCIE_PVDD)
C449
C449 100nF
100nF
3
NS2 NS_VIANS2 NS_VIA
GND_AVSSQ
NS3 NS_VIANS3 NS_VIA
GND_VSS1DI
NS5 NS_VIANS5 NS_VIA
GND_A2VSSQ
NS6 NS_VIANS6 NS_VIA
GND_VSS2DI
C432
C432 1uF_6.3V
1uF_6.3V
C444
C444 1uF_6.3V
1uF_6.3V
NS11
NS11
12
NS_VIA
NS_VIA
12
12
12
12
VDDR4_5
(300mA 1.8V VDDR4_5)
C433
C433 10uF_6.3V
10uF_6.3V
PCIE_VDDR
(700mA 1.8V PCIE_VDDR)
C445 10uF_6.3V
10uF_6.3V
2
1.8V_REG
VDD_CORE
L4 470R_1000mAL4 470R_1000mA
B12
B12
BLM15BD121SN1
BLM15BD121SN1
1.1V_REG
C407
C407 100nF_6.3V
100nF_6.3V
C387
C387 10uF_6.3V
10uF_6.3V
C466
C466 1uF_6.3V
1uF_6.3V
C408
C408 100nF_6.3V
100nF_6.3V
B18
B18
BLM15BD121SN1
BLM15BD121SN1
B20
B20
BLM15BD121SN1
BLM15BD121SN1
B24
B24
BLM15BD121SN1
BLM15BD121SN1
C388
C388 1uF_6.3V
1uF_6.3V
C399
C399 1uF_6.3V
1uF_6.3V
C409
C409 1uF_6.3V
1uF_6.3V
C422
C422 10uF_6.3V
10uF_6.3V
C434
C434 10uF_6.3V
10uF_6.3V
C452
C452 10uF_6.3V
10uF_6.3V
C389
C389 100nF
100nF
(35 mA 0.9V-1.1V SPVDD)
C400
C400 100nF
100nF
NS4 NS_VIANS4 NS_VIA
GND_SPVSS
C410
C410 1uF_6.3V
1uF_6.3V
C423
C423 1uF_6.3V
1uF_6.3V
GND_PVSS
C435
C435 1uF_6.3V
1uF_6.3V
C453
C453 1uF_6.3V
1uF_6.3V
MEM_PLL
(600mA 1.8V MEM_PLL)
SPVDD
12
C411
C411 1uF_6.3V
1uF_6.3V
(100mA 1.1V DPLL_VDDC)
C424
C424 100nF
100nF
(200mA 1.1V DPAVDDR)
C436
C436 100nF
100nF
(200mA 1.1V DPBVDDR)
C454
C454 100nF
100nF
1
C412
C412 10uF_6.3V
10uF_6.3V
DPLL_VDDC
DPAVDDR
DPBVDDR
B25
+3VRUN
A A
5
4
B25
BLM15BD121SN1
BLM15BD121SN1
B26
B26
BLM15BD121SN1
BLM15BD121SN1
C455
C455 10uF_6.3V
10uF_6.3V
C458
C458 10uF_6.3V
10uF_6.3V
C456
C456 1uF_6.3V
1uF_6.3V
C459
C459 1uF_6.3V
1uF_6.3V
3
C457
C457 100nF
100nF
C460
C460 100nF
100nF
(135mA 3.3V A2VDD)
A2VDD
VDDR3
(100mA 3.3V VDDR3)
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
2
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markhaml, Ontario
Markhaml, Ontario
Markhaml, Ontario
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Sheet
Sheet
Sheet
of
13 15
of
13 15
of
13 15
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 14
5
4
3
2
1
+3VRUN
R260
R260 10K
10K
R230
R230 100K
100K
6
DNI
D D
PEX_STD_SW#(10)
C C
VGA_DISABLE#(10)
B B
A A
GPIO2(2)
GPIO8(2) GPIO9(2)
GPIO11(2) GPIO12(2) GPIO13(2)
VSYNC(2,10) HSYNC(2,10)
V2SYNC(2) H2SYNC(2) GPIO21(2)
VID_0(2) VID_1(2) VID_2(2) VID_3(2) VID_6(2)
DVALID(2)
VHAD0(2)
GENERICC(2)
MEM_ID0(2) MEM_ID1(2) MEM_ID2(2)
DNI
2
+3VRUN
5
+3VRUN
R231
R231 100K
100K
DNI
DNI
1
R261 10KR261 10K
R263 10KR263 10K R265 10K DNIR265 10K DNI R264 10K DNIR264 10K DNI R267 10K DNIR267 10K DNI R266 10KR266 10K
R280 10K DNIR280 10K DNI R279 10KR279 10K
R282 10K DNIR282 10K DNI R283 10K DNIR283 10K DNI R268 10K DNIR268 10K DNI R269 10K DNIR269 10K DNI R271 10K DNIR271 10K DNI R270 10K DNIR270 10K DNI R273 10K DNIR273 10K DNI R274 10K DNIR274 10K DNI R275 10K DNIR275 10K DNI
R276 10K DNIR276 10K DNI
R278 10K DNIR278 10K DNI R285 10K DNIR285 10K DNI R284 10K DNIR284 10K DNI R286 10K DNIR286 10K DNI
5
1
3
4
32
Q51A
Q51A
2N7002
2N7002
DNI
DNI
R262
R262 10K
10K
Q51B
Q51B
2N7002
2N7002
DNI
DNI
R277
R277 10K
10K
DNI
DNI
Q52
Q52 2N7002E
2N7002E
DNI
DNI
+3VRUN
GPIO0 (2)
GPIO1 (2)
PSYNC (2)
Strap Name
TX_PWRS_ENB
TX_DEEMPH_EN GPIO1
BIF_GEN2_EN
DEBUG_ I2C_ENABLE
MSI_DIS
AUDIO_EN
CONFIG[3]
CONFIG[2]
CONFIG[1]
CONFIG[0]
BIF_CLK_PM_EN
BIOS_ROM_EN
VIP_DEVICE_STRAP_EN
VIP_DEVICE
VGA_DIS
HDMI_EN
RX_PLL_CALIB_BYPASS
FORCE_COMPLIANCE_A
4
GPIO0
GPIO2
GPIO6
VID_1
GPIO8
GPIO9
GPIO13
GPIO12
GPIO11
DVALID
GPIO22
VSYNC
VHAD_0
PSYNC
HSYNC
GPIO21
VID_3
ASSY1
ASSY1
ANTISTATIC
ANTISTATIC BAG
BAG
6_X_8
6_X_8
REF2
REF2
PCB
PCB
109-B73511-00A
109-B73511-00A
ASSY2
ASSY2
BLANK
BLANK LABEL
LABEL
1.50W_X_0.50H
1.50W_X_0.50H
Pin Straps description
Transmitter Power Savings Enable
0: 50% Tx output swing for mobile mode 1: full Tx output swing (Default setting for Desktop)
PCI Express Transmitter De-emphasis Enable
0: Tx de-emphasis disabled for mobile mode 1: Tx de-emphasis enabled (Default setting for Desktop)
0 = Advertises the PCI-E device as 2.5 GT/s capable at power-on. 1 = Advertises the PCI-E device as 5.0 GT/s capable at power-on.
5.0 GT/s capability will be controlled by software.
Internal use only. THIS PAD HAS AN INTERNALPULL-DOWN AND MUST BE 0 V AT RESET. The pad may be left unconnected, however, if it is connected to additional logic on the board, the logic must not allow this signal to be driven or pulled to any value except GND at reset.
Disable Message Signaled Interrupt is both a ROM strap and a pin strap. The pin strap is only applicable if a BIOS ROM is not present.
Enable HD Audio function in the PCI configuration space.
0 - Disable HD Audio 1 - Enable HD Audio
GPIO9,13,12,11 (config 3,2,1,0): a> If BIOS_ROM_EN = 1, then Config[3:0] defines the ROM Type: b> If BIOS_ROM_EN = 0, then Config[3:0] defines the Aperture size:Size of the primary memory apertures claimed in PCI configuration space 000 = 128MB 001 = 256MB 010 = 64MB 011 = 32MB 100 = 512MB 101 = 1GB 110 = 2GB 111 = 4GB
Enable CLKREQ# Power Management
0 - CLKREQ# power management capability is disabled 1 - CLKREQ# power management capability is enabled
Enable external BIOS ROM device 0 - Disable external BIOS ROM device 1 - Enable external BIOS ROM device
VSYNC - VIP_DEVICE_STRAP_EN
0: Driver would ignore the value sampled on VHAD_0 during reset. 1: Driver would use the sampled value sampled at reset from VHAD_0 to determine whether or not a VIP slave device (e.g. Theater chip) is connected (0 indicates yes, 1 indicates no)
If VIP_DEVICE_STRAP_EN is set to ‘1’, then this pin is used to sense whether a VIP slave device is connected to the VIP Host interface. If VIP_DEVICE_STRAP_EN is set to ‘0’, then this pin is not used as a strap at all (i.e. its value during reset is unimportant), and it can be used as a regular GPIO
PSYNC - VGA DISABLE : 0 – VGA Controller capacity enabled 1 – The device will not be recognized as the system’s VGA ontroller
HSYNC - HDMI_EN
HDMI connector presence. 0 – No HDMI connector is present on PCB 1
- HDMI connector is present on the PCB HDMI
3
Default Value
1
1
0
0
0
1
0100
0
0
0
0
0
1
0
TP1TP1
SIN(2)
SCLK(2)
SCS#(2)
+3VRUN
+3VRUN
C464
C464 1uF_6.3V
1uF_6.3V
+3VRUN
R477
R477
10K
10K
R480
R480
10K
10K
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. © 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices
© 2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
R479
R479
R478
R478
10K
10K
10K
10K
R481
R481
R482
R482
10K
10K
10K
10K
2
SIN
TP3TP3
SCLK
TP2TP2
SCS#
THEN APPLY ROM LESS DESIGN MUST KEEP TEST PONINTS AND TRACES OUT OF ASIC BALLS FOR DEBUG PURPOSE.
Y1
4
VCC
OUT
2
GND
E/D
100MHZY1100MHZ
XIN
+3VRUN
FLASH ROM
5
6
1
7
3
8
C463
C463 1uF_6.3V
1uF_6.3V
XIN
3
1
+3VRUN
U39
U39
1
XIN
2
XOUOT
4
S1
5
S0
9
FR1
8
FR0
10
C/D/OFF
AK8126
AK8126
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Sheet
Sheet
Sheet
U17
U17
D
C
S
HOLD
W
VCC
VSS
M25P05-AVNM6P
M25P05-AVNM6P
XIN
6
CKOUT
7
VDD
3
VSS
Friday, May 16, 2008
Friday, May 16, 2008
Friday, May 16, 2008
of
14 15
of
14 15
of
14 15
SOUT
2
Q
4
R446182R R446182R
R290
R290 221R
221R
R287 0R
R287 0R
DNI
DNI
R289 0R
R289 0R
DNI
DNI
+3VRUN
1uF_6.3V
1uF_6.3V
1
TP4TP4
XTALIN (2)
C555
C555
Doc No.
Doc No.
Doc No.
SOUT (2)
GPIO16_SS (2)
RevDate:
RevDate:
RevDate:
0
0
0
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
www.vinafix.vn
Page 15
5
Title
Title
Title
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
M98-L 1GB DDR3 MXM 3.0 CF
REVISION HISTORY
REVISION HISTORY
REVISION HISTORY
D D
Sch
PCB
Sch
PCB
Sch
PCB
Rev
Rev
Rev
Rev
Rev
Rev
C C
Date
Date
Date
PROTOTYPE BASED ON B65700A 05/05/080
4
NOTE:
NOTE:
NOTE:
3
105-B735xx-00A
105-B735xx-00A
105-B735xx-00A
This schematic represents the PCB, it does not represent any specific SKU.
This schematic represents the PCB, it does not represent any specific SKU.
This schematic represents the PCB, it does not represent any specific SKU. For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.
For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.
For Stuffing options (component values, DNI’s, …) please consult the product specific BOM. Please contact AMD representative to obtain latest BOM closest to the application desired.
Please contact AMD representative to obtain latest BOM closest to the application desired.
Please contact AMD representative to obtain latest BOM closest to the application desired.
REVISION DESCRIPTION
REVISION DESCRIPTION
REVISION DESCRIPTION
2
Date:Schematic No.
Date:Schematic No.
Date:Schematic No.
Monday, May 05, 2008
Monday, May 05, 2008
Monday, May 05, 2008
1
Rev
Rev
Rev
0
0
0
B B
A A
5
4
3
2
1
www.vinafix.vn
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