MSI MS-V165 Schematic 1.0
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
ASSEMBLYNVPNVARIANT
B
1
2
SKU
3
4
5
6
12
13
14
7
8
9
10
11
15
P801-A00: G96/G98 MXM V3.0
512MB/1028MB 128-BIT/64-BIT DDR2
LVDS, QUAD DP
Table of Contents
Page 1: Cover Page
Page 2: PCI EXPRESS Interface
Page 3: Frame Buffer GPU Interface
Page 4: Frame Buffer Partition A Memories
Page 5: Frame Buffer Partition C Memories
Page 6: Memory Decoupling Caps
Page 7: DACs, Clock-Generation
Page 8: DP LINK C,D,E,F
Page 9: MXM Connector, IO-Section
Page 10: GPIOs. JTAG, Thermal Senser
Page 11: LVDS, VBIOS, and HDCP ROM
Page 12: MIOA, MIOB, GPU GND
Page 13: NVVDD and VDD_IO_PLL Power Supplies
Page 14: FBVDDQ, PEX_VDD, and IFP_IOVDD Power Supplies
Page 15: STRAPS, MOUNTING HOLE, PEX SWING SELECT, ALT PEX VR
BASE
SKU0001
SKU0002
SKU0003
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
600-10801-base-000
600-10801-0001-000
600-10801-0002-000
600-10801-0003-000
<UNDEFINED>
<INDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL.
P801-A00 SKU1 G96-710 MXM3.0 TYPE-A 1024MB 8pcs 64Mx16
P801-A00 SKU2 G96-610 MXM3.0 TYPE-A 512MB 4pcs 64Mx316
P801-A00 SKU3 G98-750 MXM3.0 TYPE-A 512MB 4pcs 64MX16
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
P801-A00 SKU2 G96-610 MXM3.0 TYPE-A 512MB 4pcs 64Mx316
Cover Page
www.vinafix.vn
600-10801-0002-000 A
p801_a00
cfox
1 OF 15
27-AUG-2008
G1
OUT
1/16 PCI_EXPRESS
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
NC_18
NC_17
NC_16
NC_15
NC_14
NC_13
NC_12
NC_11
NC_10
NC_9
NC_8
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1
NC_19
VDD33_5
VDD33_4
VDD33_3
VDD33_2
VDD33_1
VDD_SENSE
GND_SENSE
PEX_PLLVDD
PEX_RFU1
PEX_RFU2
PEX_TERMP
TESTMODE
PEX_CLKREQ
PEX_RST
PEX_RX1
PEX_RX0
PEX_RX0
PEX_REFCLK
PEX_REFCLK
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_TX0
PEX_TX0
PEX_TX1
PEX_TX1
PEX_TX4
PEX_TX4
PEX_RX1
PEX_RX2
PEX_RX2
PEX_RX3
PEX_RX3
PEX_RX4
PEX_RX4
PEX_TX2
PEX_TX2
PEX_TX3
PEX_TX3
PEX_TX5
PEX_TX8
PEX_TX8
PEX_RX6
PEX_RX6
PEX_RX5
PEX_RX5
PEX_RX7
PEX_RX7
PEX_TX5
PEX_TX6
PEX_TX6
PEX_TX7
PEX_TX7
PEX_TX11
PEX_TX11
PEX_TX10
PEX_TX10
PEX_RX8
PEX_RX8
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_TX9
PEX_TX9
PEX_TX15
PEX_TX15
PEX_TX14
PEX_TX14
PEX_RX12
PEX_RX12
PEX_RX13
PEX_RX13
PEX_RX14
PEX_RX14
PEX_TX12
PEX_TX12
PEX_TX13
PEX_TX13
PEX_RX15
PEX_RX15
OUT
1/2 PCI-Express, Power
CLK_REQ
PEX_STD_SW
PEX_RST
PEX_REFCLK
PEX_REFCLK
PEX_RX0
PRSNT_R
PRSNT_L
PEX_RX0
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_RX3
PEX_TX0
PEX_TX0
PEX_RX1
PEX_RX1
PEX_TX1
PEX_TX1
PEX_RX3
PEX_TX3
PEX_RX5
PEX_RX4
PEX_RX4
PEX_TX6
PEX_TX5
PEX_TX5
PEX_RX6
PEX_TX6
PEX_TX3
PEX_TX4
PEX_TX4
PEX_RX5
PEX_RX6
PEX_RX7
PEX_RX7
PEX_TX7
PEX_TX7
PEX_RX8
PEX_RX8
PEX_TX8
PEX_TX8
PEX_RX9
PEX_RX9
PEX_TX9
PEX_TX9
PEX_RX10
PEX_RX10
PEX_TX12
PEX_RX12
PEX_TX10
PEX_TX10
PEX_RX11
PEX_TX11
PEX_RX11
PEX_TX11
PEX_TX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_RX15
PEX_RX15
PEX_RX14
PEX_RX14
PEX_TX14
PEX_TX15
PEX_TX15
(2.5A)
5V
(1A)
3V3
PWR_SRC
PWR_SRC
(10A)
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
G98-730-A1 NB
AM16
AJ17
AJ18
AR16
AR17
AL17
AM17
AP17
AN17
AM18
AM19
AN19
AP19
AL19
AK19
AR19
AR20
AL20
AM20
AP20
AN20
AM21
AM22
AN22
AP22
AL22
AK22
AR22
AR23
AL23
AM23
AP23
AN23
AM24
AM25
AN25
AP25
AL25
AK25
AR25
AR26
AL26
AM26
AP26
AN26
AM27
AM28
AN28
AP28
AL28
AK28
AR28
AR29
AK29
AL29
AP29
AN29
AM29
AM30
AN31
AP31
AM31
AM32
AR31
AR32
AN32
AP32
AR34
AP34
BGA969
COMMON
15
R29
0402
STUFF FOR PEX TEST
200
COMMON
1%
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
3V3
5V
PWR_SRC
C663
.1UF
6.3V
10%
X7R
0402
C57
.1UF
6.3V
10%
X7R
0402
COMMON
C510
.01UF
25V
10%
X7R
0402
COMMON
C661
4.7UF
6.3V
10%
X5R
0603
COMMONCOMMON
GND
C521
2.2UF
6.3V
20%
X5R
0402
COMMON
GND
C513
4.7UF
25V
+/-10%
X5R
1206
COMMON
GND
CN1
CON_MXM3_EDGE
NPHY
NPHY
COMMON
278
1
E1
E2
11
36
37
46
47
52
53
58
59
64
65
70
71
76
77
82
83
88
89
94
95
100
101
106
107
112
113
118
119
124
125
133
134
139
140
145
146
151
152
157
166
173
174
179
180
185
186
191
192
197
198
203
204
209
210
215
216
221
222
228
244
250
251
256
257
262
263
268
269
275
E3
E4
GND
2
281
19
156
154
155
153
149
147
150
148
143
141
144
142
137
135
138
136
123
121
122
120
117
115
116
114
111
109
110
108
105
103
104
102
99
97
98
96
93
91
92
90
87
85
86
84
81
79
80
78
75
73
74
72
69
67
68
66
63
61
62
60
57
55
56
54
51
49
50
48
GND
PEX_STD_SW*
PEX_RST
PEX_CLKREQ
PAGE 2) MXM 3.0 GOLD EDGE FINGER PCI EXPRESS INTERFACE
3V3_RUN
10K
R553
NO STUFF
0402
R564
0402
R563
0402
5%
5%
5%
0
COMMON
0
NO STUFF
GND
PEX_TSTCLK_OUT
1
PEX_TSTCLK_OUT
1
PEX_REFCLK
1
PEX_REFCLK
1
PEX_TX0
1
PEX_TX0
1
PEX_RX0
1
PEX_RX0
1
PEX_TX1
1
PEX_TX1
1
PEX_RX1
1
PEX_RX1
1
PEX_TX2
1
PEX_TX2
1
PEX_RX2
1
PEX_RX2
1
PEX_TX3
1
PEX_TX3
1
PEX_RX3
1
PEX_RX3
1
PEX_TX4
1
PEX_TX4
1
PEX_RX4
1
PEX_RX4
1
PEX_TX5
1
PEX_TX5
1
PEX_RX5
1
PEX_RX5
1
PEX_TX6
1
PEX_TX6
1
PEX_RX6
1
PEX_RX6
1
PEX_TX7
1
PEX_TX7
1
PEX_RX7
1
PEX_RX7
1
PEX_TX8
1
1 PEX_TX8
PEX_RX8
1
PEX_RX8
1
PEX_TX9
1
PEX_TX9
1
PEX_RX9
1
PEX_RX9
1
PEX_TX10
1
PEX_TX10
1
PEX_RX10
1
PEX_RX10
1
PEX_TX11
1
PEX_TX11
1
PEX_RX11
1
PEX_RX11
1
PEX_TX12
1
PEX_TX12
1
PEX_RX12
1
PEX_RX12
1
PEX_TX13
1
PEX_TX13
1
PEX_RX13
1
PEX_RX13
1
PEX_TX14
1
PEX_TX14
1
PEX_RX14
1
PEX_RX14
1
1 PEX_TX15
1
PEX_TX15
1
PEX_RX15
1 PEX_RX15
PEX_RST
PEX_CLKREQ_R AR13
NET_NAMEDIFF_PAIRNV_CRITICAL_NETNV_IMPEDANCE
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT*
PEX_REFCLK
PEX_REFCLK*
PEX_TX0
PEX_TX0*
PEX_RX0
PEX_RX0*
PEX_TX1
PEX_TX1*
PEX_RX1
PEX_RX1*
PEX_TX2
PEX_TX2*
PEX_RX2
PEX_RX2*
PEX_TX3
PEX_TX3*
PEX_RX3
PEX_RX3*
PEX_TX4
PEX_TX4*
PEX_RX4
PEX_RX4*
PEX_TX5
PEX_TX5*
PEX_RX5
PEX_RX5*
PEX_TX6
PEX_TX6*
PEX_RX6
PEX_RX6*
PEX_TX7
PEX_TX7*
PEX_RX7
PEX_RX7*
PEX_TX8
PEX_TX8*
PEX_RX8
PEX_RX8*
PEX_TX9
PEX_TX9*
PEX_RX9
PEX_RX9*
PEX_TX10
PEX_TX10*
PEX_RX10
PEX_RX10*
PEX_TX11
PEX_TX11*
PEX_RX11
PEX_RX11*
PEX_TX12
PEX_TX12*
PEX_RX12
PEX_RX12*
PEX_TX13
PEX_TX13*
PEX_RX13
PEX_RX13*
PEX_TX14
PEX_TX14*
PEX_RX14
PEX_RX14*
PEX_TX15
PEX_TX15*
PEX_RX15
PEX_RX15*
P801-A00 SKU2 G96-610 MXM3.0 TYPE-A 512MB 4pcs 64Mx316
PCI EXPRESS Interface
www.vinafix.vn
AK16
AK17
AK21
AK24
AK27
AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16
SNN_GPU_NC1
A2
SNN_GPU_NC2
AB7
SNN_GPU_NC3
AD6
SNN_GPU_NC4
AF6
SNN_GPU_NC5
AG6
SNN_GPU_NC6
AJ5
SNN_GPU_NC7
AK15
SNN_GPU_NC8
AL7
SNN_GPU_NC9
D35
SNN_GPU_NC10
E35
SNN_GPU_NC11
E7
SNN_GPU_NC12
F7
SNN_GPU_NC13
H32
SNN_GPU_NC14
M7
SNN_GPU_NC15
P6
SNN_GPU_NC16
P7
SNN_GPU_NC17
R7
SNN_GPU_NC18
U7
SNN_GPU_NC19V6
J10
J11
J12
J13
J9
AD19
AG14
AG19
AG20
C601
.1UF
6.3V
10%
X7R
0402
COMMON
C548
4.7UF
6.3V
10%
X5R
0603
COMMON
NVVDD_SENSEAD20
GND_SENSE
PEX_PLLDVDD
SNN_PEX_RFU1
SNN_PEX_RFU2
AG21 PEX_TERMP
AP35 GPU_TESTMODE
C586
.1UF
6.3V
10%
X7R
0402
COMMON
C28
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
C582
.022UF
6.3V
10%
X7R
0402
COMMON
C587
.022UF
6.3V
10%
X7R
0402
COMMON
C592
.022UF
6.3V
10%
X7R
0402
COMMON
C600
.022UF
6.3V
10%
X7R
0402
COMMON
C31
4.7UF
10%
X5R
0603
COMMON
C629
.1UF
6.3V
10%
X7R
0402
COMMON
25MIL
C605
.1UF
6.3V
10%
X7R
0402
COMMON
Place under GPU
R557
0402
1%
R43
0402
5%
C596
.1UF
6.3V
10%
X7R
0402
COMMON
Place close to GPU
C585
.022UF
6.3V
10%
X7R
0402
COMMON
C576
.022UF
6.3V
10%
X7R
0402
COMMON
C615
.022UF
6.3V
10%
X7R
0402
COMMON
C594
.022UF
6.3V
10%
X7R
0402
COMMON
C35
4.7UF
10%
X5R
0603
COMMON
C611
.1UF
6.3V
10%
X7R
0402
COMMON
13
TP503
2.49K
COMMON
10K
COMMON
GND
C589
.1UF
6.3V
10%
X7R
0402
COMMON
C614
.1UF
6.3V
10%
X7R
0402
COMMON
C584
.1UF
6.3V
10%
X7R
0402
COMMON
C595
.1UF
6.3V
10%
X7R
0402
COMMON
C591
1UF
6.3V
10%
X7R
0603
COMMON
C607
.1UF
6.3V
10%
X7R
0402
COMMON
C603
.1UF
6.3V
10%
X7R
0402
COMMON
C578
.1UF
6.3V
10%
X7R
0402
COMMON
C583
.1UF
6.3V
10%
X7R
0402
COMMON
C648
4.7UF
6.3V
10%
X5R
0603
COMMON
3V3
3V3_RUN
5V
PWR_SRC
GND
600-10801-0002-000 A
p801_a00
cfox
C580
.1UF
6.3V
10%
X7R
0402
COMMON
C613
1UF
6.3V
10%
X7R
0603
COMMON
C590
.022UF
6.3V
10%
X7R
0402
COMMON
C575
.022UF
6.3V
10%
X7R
0402
COMMON
C609
.022UF
6.3V
10%
X7R
0402
COMMON
C604
.022UF
6.3V
10%
X7R
0402
COMMON
C38
4.7UF
Place close to GPU
6.3V6.3V6.3V
10%
X5R
0603
COMMON
3V3_RUN
C660
4.7UF
6.3V
10%
X5R
0603
COMMON
Place close to GPUPlace under GPU
GND
C644
2.2UF
6.3V
20%
X5R
0402
COMMON
Place close to GPU
LB505
GND
3V3
3V3_RUN
5V
PWR_SRC
GND
C574
1UF
6.3V
10%
X7R
0603
COMMON
C602
.1UF
6.3V
10%
X7R
0402
COMMON
C610
.1UF
6.3V
10%
X7R
0402
COMMON
C598
.1UF
6.3V
10%
X7R
0402
COMMON
C617
.1UF
6.3V
10%
X7R
0402
COMMON
COMMON0603
3.3V
3.3V
5V
20V
0V
PEX_VDD
GND
NVVDD
VDD_IO_PLL
10nH
C599
1UF
Place under GPU
6.3V
10%
X7R
0603
COMMON
Place under GPU
Place under GPU
Place under GPU
Place under GPU
GND
16MIL 2.5A
16MIL
12MIL
1.0A12MIL
1.0A12MIL
10A
15A
2 OF 15
27-AUG-2008
PAGE 3) GPU MEMORY INTERFACE
OUT
OUT
OUT
OUT
OUTBIOUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
BI
G96 only
3/16 FBC
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD6
FBC_CMD5
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CLK0
FBC_CMD30
FBC_CMD29
FBC_CMD28
FBC_DEBUG
FBC_CLK1
FBC_CLK1
FBC_CLK0
FBAC_PLLAVDD
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_PD_VDDQ
FBAC_DLLAVDD
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_RN7
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN2
FBC_DQS_RN1
FBC_DQS_RN0
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_DQS_RN3
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
OUT
OUT
OUT
OUT
BI
2/16 FBA
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBA_CMD6
FBA_CMD5
FBA_CMD4
FBA_CMD3
FBA_CMD2
FBA_CMD1
FBA_CMD0
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_DEBUG
FBA_CMD30
FBA_CMD29
FBA_CMD28
FBA_CLK1
FBA_CLK1
FBA_CLK0
FBA_CLK0
FB_PLLAVDD
FB_DLLAVDD
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
RFU
RFU
RFU
RFU
RFU
RFU
FB_VREF
RFU
RFU
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
G1
G98-730-A1 NB
BGA969
FBA_D<63..0>
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
FBA_DQM<7..0>
TP502
FBA_D<0>
0
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_D<5>
5
FBA_D<6>
6
FBA_D<7>
7
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_D<16>
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
20
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_D<32>
32
FBA_D<33>
33
FBA_D<34>
34
FBA_D<35>
35
FBA_D<36>
36
FBA_D<37>
37
FBA_D<38>
38
FBA_D<39>
39
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50>
50
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DQM<0>
0
FBA_DQM<1>
1
FBA_DQM<2>
2
FBA_DQM<3>
3
FBA_DQM<4>
4
FBA_DQM<5>
5
FBA_DQM<6>
6
FBA_DQM<7>
7
FBA_DQS0
FBA_DQS1
FBA_DQS2
FBA_DQS3
FBA_DQS4
FBA_DQS5
FBA_DQS6
FBA_DQS7
FBA_DQS0*
FBA_DQS1*
FBA_DQS2*
FBA_DQS3*
FBA_DQS4*
FBA_DQS5*
FBA_DQS6*
FBA_DQS7*
SNN_FBA_WDS0
SNN_FBA_WDS0*
SNN_FBA_WDS1
SNN_FBA_WDS1*
SNN_FBA_WDS2
SNN_FBA_WDS2*
SNN_FBA_WDS3
SNN_FBA_WDS3*
FB_VREF
12MIL
R30
R32
P31
N30
L31
M32
M30
L30
P33
P34
N35
P35
N34
L33
L32
N33
K31
K30
G30
K32
G32
H30
F30
G31
H33
K35
K33
G34
K34
E33
E34
G33
AG30
AH31
AG32
AF31
AF30
AD30
AC32
AE30
AE32
AF33
AF34
AE35
AE33
AE34
AC35
AB32
AN33
AK32
AL33
AM33
AL31
AK30
AJ30
AH30
AM35
AH33
AH35
AH32
AH34
AM34
AL35
AJ33
P30
P32
J30
H34
AF32
AF35
AL32
AL34
N31
L34
J32
H35
AE31
AC33
AJ32
AJ34
N32
L35
H31
G35
AD32
AC34
AJ31
AJ35
P29
R29
L29
M29
AD29
AE29
AG29
AH29
J27
COMMON
J23
J24
J29
AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
V32
W31
U31
Y32
AB35
AB34
W35
W33
W30
T34
T35
AB31
Y30
Y34
W32
AA30
AA32
Y33
U32
Y31
U34
Y35
W34
V30
U35
U30
U33
AB30
AB33
T33
W29
T32
T31
AC31
AC30
T30
AG27
AF27
Place close to GPU
FBA_CMD<0>
FBA_CMD<1>
FBA_CMD<2>
FBA_CMD<3>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
SNN_FBA_CMD7
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<12>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<15>
FBA_CMD<16>
FBA_CMD<17>
FBA_CMD<18>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<21>
FBA_CMD<22>
FBA_CMD<23>
FBA_CMD<24>
FBA_CMD<25>
SNN_FBA_CMD26
FBA_CMD<27>
SNN_FBA_CMD28
SNN_FBA_CMD29
SNN_FBA_CMD30
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_DEBUG
FBA_PLLAVDD_GPU
Place under GPU
C570
.1UF
10% 10%
X7R
0402
COMMON
C569
.1UF
6.3V6.3V
X7R
0402
COMMON
C647
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
FBA_CMD<27..0>
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
TP501
12MIL
C568
.1UF
6.3V
10%
X7R
0402
COMMON
Place under GPU
ODT
CKE
C571
.1UF
6.3V
10%
X7R
0402
COMMON
C565
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
GND
C567
1UF
6.3V
10%
X7R
0603
COMMON
4
FBC_D<63..0>
5
PD required for
initialization
FBA_CMD<12>
FBA_CMD<11>
1.1V
GND
10K
R542
COMMON
0402
5%
GND
10K
R544
COMMON
0402
5%
GND
4
4
4
4
LB501
240R@100MHz
BEAD_0402
COMMON
C559
4.7UF
6.3V
10%
X5R
0603
COMMON
Place close to GPU
FBC_DQM<7..0>
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
VDD_IO_PLL
P801-A00 SKU2 G96-610 MXM3.0 TYPE-A 512MB 4pcs 64Mx316
Frame Buffer GPU Interface
www.vinafix.vn
FBC_D<0>
0
FBC_D<1>
1
FBC_D<2>
2
FBC_D<3>
3
FBC_D<4>
4
FBC_D<5>
5
FBC_D<6>
6
FBC_D<7>
7
FBC_D<8>
8
FBC_D<9>
9
FBC_D<10>
10
FBC_D<11>
11
FBC_D<12>
12
FBC_D<13>
13
14
FBC_D<15>
15
FBC_D<16>
16
FBC_D<17>
17
FBC_D<18>
18
FBC_D<19>
19
FBC_D<20>
20
FBC_D<21>
21
FBC_D<22>
22
FBC_D<23>
23
FBC_D<24>
24
FBC_D<25>
25
FBC_D<26>
26
FBC_D<27>
27
FBC_D<28>
28
FBC_D<29>
29
FBC_D<30>
30
FBC_D<31>
31
FBC_D<32>
32
FBC_D<33>
33
FBC_D<34>
34
FBC_D<35> F25
35
FBC_D<36>
36
FBC_D<37>
37
FBC_D<38>
38
FBC_D<39>
39
FBC_D<40>
40
FBC_D<41>
41
FBC_D<42>
42
FBC_D<43>
43
FBC_D<44>
44
FBC_D<45>
45
FBC_D<46>
46
FBC_D<47>
47
FBC_D<48>
48
FBC_D<49>
49
FBC_D<50>
50
FBC_D<51>
51
FBC_D<52>
52
FBC_D<53>
53
FBC_D<54>
54
FBC_D<55>
55
FBC_D<56>
56
FBC_D<57>
57
FBC_D<58>
58
FBC_D<59>
59
FBC_D<60>
60
FBC_D<61>
61
FBC_D<62>
62
FBC_D<63>
63
FBC_DQM<0>
0
FBC_DQM<1>
1
FBC_DQM<2>
2
FBC_DQM<3>
3
FBC_DQM<4>
4
FBC_DQM<5>
5
FBC_DQM<6>
6
FBC_DQM<7>
7
FBC_DQS0 E10
FBC_DQS1
FBC_DQS2
FBC_DQS3
FBC_DQS4
FBC_DQS5
FBC_DQS6
FBC_DQS7
FBC_DQS0*
FBC_DQS1*
FBC_DQS2*
FBC_DQS3*
FBC_DQS4*
FBC_DQS5*
FBC_DQS6*
FBC_DQS7*
SNN_FBC_WDS0
SNN_FBC_WDS0*
SNN_FBC_WDS1
SNN_FBC_WDS1*
SNN_FBC_WDS2
SNN_FBC_WDS2*
SNN_FBC_WDS3
D11
E11
F10
F12
B11
C13
A11
C11FBC_D<14>
C10
D12
E13
F17
F15
F16
E16
F14
F13
D13
A13
B13
A14
C16
A17
B16
D16
D24
D26
E25
F27
E28
F28
D29
A25
B25
D25
C26
C28
B28
A28
A29
E29
F29
D30
E31
C33
D33
F32
E32
B29
C29
B31
C31
B32
C32
B34
B35
F11
D10
D15
A16
D27
D28
D34
A34
A10
D14
C14
E26
B26
D32
A32
B10
E14
B14
F26
A26
D31
A31
G11
G12
G14
G15
G24
G25
G27
G28SNN_FBC_WDS3*
D8
F8
F9
E8
B8
A8
C8
D9
G1
G98-730-A1 NB
BGA969
COMMON
N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27
C17
B19
D18
F21
A23
D21
B23
E20
G21
F20
F19
F23
A22
C22
B17
F24
C25
E22
C20
B22
A19
D22
D20
E19
D19
F18
C19
F22
C23
B20
A20
E17
D17
D23
E23
G19
J19
J18
K27
L27
M27
FBC_CMD<0>
FBC_CMD<1>
FBC_CMD<2>
FBC_CMD<3>
FBC_CMD<4>
FBC_CMD<5>
FBC_CMD<6>
SNN_FBC_CMD7
FBC_CMD<8>
FBC_CMD<9>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<12>
FBC_CMD<13>
FBC_CMD<14>
FBC_CMD<15>
FBC_CMD<16>
FBC_CMD<17>
FBC_CMD<18>
FBC_CMD<19>
FBC_CMD<20>
FBC_CMD<21>
FBC_CMD<22>
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
SNN_FBC_CMD26
FBC_CMD<27>
SNN_FBC_CMD28
SNN_FBC_CMD29
SNN_FBC_CMD30
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBC_DEBUG
FBC_PLLAVDD
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
Place under GPU
C573
.1UF
6.3V
10%
X7R
0402
COMMON
C624
.1UF
6.3V
10%
X7R
0402
COMMON
Place close to GPU
C34
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
FBC_CMD<27..0>
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
TP504
1.1V
R548
0402
R550
04021%COMMON
R551
0402
ODT
CKE
12MIL
C593
.1UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
30.1
COMMON
1%
36.5
40.2
NO STUFF
1%
GND
600-10801-0002-000 A
p801_a00
cfox
FBVDDQ
C581
.1UF
6.3V
10%
X7R
0402
COMMON
GND
PD required for
initialization
FBC_CMD<12>
FBC_CMD<11>
LB502
240R@100MHz
COMMON
C597
.1UF
6.3V
10%
X7R
0402
COMMON
GND
C572
1UF
6.3V
10%
X7R
0603
COMMON
R554
0402
R555
0402
BEAD_0402
C588
4.7UF
6.3V
10%
X5R
0603
COMMON
Place close to GPUPlace under GPU
5
10K
NO STUFF
5%
GND
10K
NO STUFF
5%
GND
5
5
5
5
VDD_IO_PLL
3 OF 15
27-AUG-2008
PAGE 4) FRAME BUFFER PARTITION A
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
IN
IN
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIIN
IN
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
IN
IN
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BIBIBIBIINININBIIN
OUTBIINBIBI
BI
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
BIININ
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BIBIBIBIINININININ
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
4 3
3 3 4
4
4 3
4 3
FBA_CMD<27..0>
FBA_CMD<15>
15
FBA_CMD<25>
25
FBA_CMD<9>
9
FBA_CMD<8>
8
FBA_CMD<1>
1
FBA_CMD<3>
3
FBA_CMD<2>
2
FBA_CMD<0>
0
FBA_CMD<24>
24
FBA_CMD<22>
22
FBA_CMD<21>
21
FBA_CMD<23>
23
FBA_CMD<19>
19
FBA_CMD<20>
20
FBA_CMD<17>
17
FBA_CMD<16>
16
FBA_CMD<14>
14
SNN_FBA1_R8
SNN_FBA1_R3
SNN_FBA1_R7
FBA_CMD<10>
10
FBA_CMD<18>
18
27
FBA_CMD<27>
FBA_CMD<11>
11
FBA_CLK0
FBA_CLK0*
FBA_CMD<12>
12
SNN_FBA1_A2
SNN_FBA1_E2
FBA_D<63..0>
FBA_DQM<7..0>
0
1
M3
64MX16DDR2-2.0
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBA_D<0>
0
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_D<5>
5
FBA_D<6>
6
FBA_D<7>
7
FBA_DQM<0>
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_DQM<1>
4
5
M502
64MX16DDR2-2.0
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBA_D<32>
32
FBA_D<33>
33
FBA_D<34>
34
FBA_D<35>
35
FBA_D<36>
36
FBA_D<37>
37
FBA_D<38>
38
FBA_D<39>
39
FBA_DQM<4>
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_DQM<5>
FBVDDQ
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9M2
J1
A3
E3
J3
N1
GND
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
FBA_VREF2
J2
M502
64MX16DDR2-2.0
BGA84
COMMON
F9
F1
G8
H1
G2
H7
H9
H3
F3
4
4
4
4
FBA_DQS4*
3
FBA_DQS5
3
FBA_DQS5*
3
FBA_DQS4
3
F7
E8
M4
64MX16DDR2-2.0
BGA84
COMMON
H3
G2
F1
F9
H9
G8
H7
H1
F3
F7
E8
C562
.047UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
GND
3 4
3 4
R545
1K
1%
0402
COMMON
R546
1K
1%
0402
COMMON
FBA_CMD<15>
15
FBA_CMD<25>
25
FBA_CMD<9>
9
FBA_CMD<8>
8
FBA_CMD<1>
1
FBA_CMD<3>
3
FBA_CMD<13>
13
FBA_CMD<4>
4
FBA_CMD<5>
5
FBA_CMD<6>
6
FBA_CMD<21>
21
FBA_CMD<23>
23
FBA_CMD<19>
19
FBA_CMD<20>
20
FBA_CMD<17>
17
FBA_CMD<16>
16
FBA_CMD<14>
14
SNN_FBA4_R8
SNN_FBA4_R3
SNN_FBA4_R7
FBA_CMD<10>
10
FBA_CMD<18>
18
27
FBA_CMD<27>
FBA_CMD<11>
11
FBA_CLK1
FBA_CLK1*
FBA_CMD<12>
12
SNN_FBA4_A2
SNN_FBA4_E2
M501
2
3
64MX16DDR2-2.0
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBA_D<16>
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
20
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_DQM<2>
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_DQM<3>
FBA_DQS2
3 3 4
4
4
FBA_DQS2*
FBA_DQS3
3 3 4
FBA_DQS3*
FBVDDQ
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9M2
J1
A3
E3
J3
N1
GND
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
FBA_VREF0
J2
M3
64MX16DDR2-2.0
BGA84
COMMON
H9
H7
H3
H1
G8
F1
G2
F9
F3
FBA_DQS0
3 3 4
4
4
FBA_DQS0*
FBA_DQS1
3 3 4
FBA_DQS1*
F7
E8
M501
64MX16DDR2-2.0
BGA84
COMMON
G8
H9
H1
H3
G2
H7
F9
F1
F3
F7
E8
C36
.047UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
GND
3 4
3 4
R44
1K
1%
0402
COMMON
R45
1K
1%
0402
COMMON
FBA_CMD<15>
15
FBA_CMD<25>
25
FBA_CMD<9>
9
FBA_CMD<8>
8
FBA_CMD<1>
1
FBA_CMD<3>
3
FBA_CMD<2>
2
FBA_CMD<0>
0
FBA_CMD<24>
24
FBA_CMD<22>
22
FBA_CMD<21>
21
FBA_CMD<23>
23
FBA_CMD<19>
19
FBA_CMD<20>
20
FBA_CMD<17>
17
FBA_CMD<16>
16
FBA_CMD<14>
14
SNN_FBA2_R8
SNN_FBA2_R3
SNN_FBA2_R7
FBA_CMD<10>
10
FBA_CMD<18>
18
27
FBA_CMD<27>
FBA_CMD<11>
11
FBA_CLK0
FBA_CLK0*
FBA_CMD<12>
12
SNN_FBA2_A2
SNN_FBA2_E2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
J2
M3
64MX16DDR2-2.0
BGA84
COMMON
C2
D1
D7
B1
C8
D3
B9
D9
B3
B7
A8
M501
64MX16DDR2-2.0
BGA84
COMMON
D7
D9
B9
D3
C8
B1
D1
C2
B3
B7
A8
FBVDDQ
FBA_VREF1
FBA_CMD<15>
15
FBA_CMD<25>
25
FBA_CMD<9>
9
FBA_CMD<8>
8
FBA_CMD<1>
1
FBA_CMD<3>
3
FBA_CMD<13>
13
FBA_CMD<4>
4
FBA_CMD<5>
5
FBA_CMD<6>
6
FBA_CMD<21>
21
FBA_CMD<23>
23
FBA_CMD<19>
19
FBA_CMD<20>
20
FBA_CMD<17>
17
FBA_CMD<16>
16
FBA_CMD<14>
14
SNN_FBA3_R8
SNN_FBA3_R3
SNN_FBA3_R7
FBA_CMD<10>
10
FBA_CMD<18>
GND
3 4
3 4
FBVDDQ
R536
1K
1%
0402
COMMON
C551
.047UF
6.3V
10%
X7R
0402
COMMON
R537
1K
1%
0402
COMMON
GND
18
27
FBA_CMD<27>
FBA_CMD<11>
11
FBA_CLK1
FBA_CLK1*
FBA_CMD<12>
12
SNN_FBA3_A2
SNN_FBA3_E2
6
7
M4
64MX16DDR2-2.0
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50>
50
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_DQM<6>
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DQM<7>
FBVDDQ
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9M2
J1
A3
E3
J3
N1
GND
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
FBA_VREF3
J2
M4
64MX16DDR2-2.0
BGA84
COMMON
B1
D3
D1
C2
B9
C8
D9
D7
B3
4
4
4
4
FBA_DQS6*
3
FBA_DQS7
3
FBA_DQS7*
3
FBA_DQS6
3
B7
A8
M502
64MX16DDR2-2.0
BGA84
COMMON
C8
D1
B1
D3
C2
D9
D7
B9
B3
B7
A8
C49
.047UF
6.3V
10%
X7R
0402
COMMON
FBVDDQ
GND
R52
1K
1%
0402
COMMON
R50
1K
1%
0402
COMMON
CLOCK TERMINATIONS
FBA_CLK0
3 4
FBA_CLK1
3 4
R48
0402
R541
0402
1%
1%
475
COMMON
475
COMMON
FBA_CLK0*
FBA_CLK1*
4 4 3
3
3
4
3
4
3
4
3
4
3
4
3
4
3
4
NET
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_DQM<7..0>
FBA_D<63..0>
FBA_CMD<27..0>
NV_CRITICAL
NET
FBA_VREF1
FBA_VREF2
FBA_VREF0
FBA_VREF3
NET RULES for FrameBuffer A
DIFFPAIRNV_IMPEDANCE
1
1
1
1
1
1
1
VOLTAGE
0.9V
0.9V
0.9V
0.9V
100DIFF
100DIFF
100DIFF
100DIFF
50OHM
50OHM
50OHM
MAX_CURRENT
0.02A
0.02A
0.02A
0.02A
P801-A00 SKU2 G96-610 MXM3.0 TYPE-A 512MB 4pcs 64Mx316
Frame Buffer Partition A Memories
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
MIN_WIDTH
12MIL
12MIL
12MIL
12MIL
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
www.vinafix.vn
FBA_DQS0
FBA_DQS0*
FBA_DQS1
FBA_DQS1*
FBA_DQS2
FBA_DQS2*
FBA_DQS3
FBA_DQS3*
FBA_DQS4
FBA_DQS4*
FBA_DQS5
FBA_DQS5*
FBA_DQS6
FBA_DQS6*
FBA_DQS7
FBA_DQS7*
1
1
1
1
1
1
1
1
1
1
1
1
1
1 100DIFF
1 100DIFF
1
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
DIFFPAIRNV_IMPEDANCENV_CRITICALNET
FBA_DQS0
FBA_DQS0
FBA_DQS1
FBA_DQS1
FBA_DQS2
FBA_DQS2
FBA_DQS3
FBA_DQS3
FBA_DQS4
FBA_DQS4
FBA_DQS5
FBA_DQS5
FBA_DQS6
FBA_DQS6
FBA_DQS7
FBA_DQS7
600-10801-0002-000 A
p801_a00
cfox
4 OF 15
27-AUG-2008
PAGE 5) FRAME BUFFER PARTITION C
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
IN
IN
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
IN
IN
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BIBIBIBIINININININ
OUTBIBIBIBIBIININBI
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
ININBI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
ININBIBIBIBIINININ
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
5 3
3 3 5
5
3 5
3 5
FBC_CMD<27..0>
FBC_CMD<15>
15
FBC_CMD<25>
25
FBC_CMD<9>
9
FBC_CMD<8>
8
FBC_CMD<1>
1
FBC_CMD<3>
3
FBC_CMD<2>
2
FBC_CMD<0>
0
FBC_CMD<24>
24
FBC_CMD<22>
22
FBC_CMD<21>
21
FBC_CMD<23>
23
FBC_CMD<19>
19
FBC_CMD<20>
20
FBC_CMD<17>
17
FBC_CMD<16>
16
FBC_CMD<14>
14
SNN_FBC1_R8
SNN_FBC1_R3
SNN_FBC1_R7
FBC_CMD<10>
10
FBC_CMD<18>
18
27
FBC_CMD<27>
FBC_CMD<11>
11
FBC_CLK0
FBC_CLK0*
FBC_CMD<12>
12
SNN_FBC1_A2
SNN_FBC1_E2
FBC_D<63..0>
FBC_DQM<7..0>
0
1
M1
64MX16DDR2-2.0
BGA84
NO STUFF
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBC_D<0>
0
FBC_D<1>
1
FBC_D<2>
2
FBC_D<3>
3
FBC_D<4>
4
FBC_D<5>
5
FBC_D<6>
6
FBC_D<7>
7
FBC_DQM<0>
FBC_D<8>
8
FBC_D<9>
9
FBC_D<10>
10
FBC_D<11>
11
FBC_D<12>
12
FBC_D<13>
13
FBC_D<14>
14
FBC_D<15>
15
FBC_DQM<1>
4
5
M503
64MX16DDR2-2.0
BGA84
NO STUFF
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBC_D<32>
32
FBC_D<33>
33
FBC_D<34>
34
FBC_D<35>
35
FBC_D<36>
36
FBC_D<37>
37
FBC_D<38>
38
FBC_D<39>
39
FBC_DQM<4>
FBC_D<40>
40
FBC_D<41>
41
FBC_D<42>
42
FBC_D<43>
43
FBC_D<44>
44
FBC_D<45>
45
FBC_D<46>
46
FBC_D<47>
47
FBC_DQM<5>
FBVDDQ
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A3
E3
J3
N1
GND
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
FBC_VREF2
J2
M2
64MX16DDR2-2.0
BGA84
NO STUFF
H3
G8
H1
H7
F9
H9
F1
G2
F3
FBC_DQS4
3 3 5
5
5
FBC_DQS4*
FBC_DQS5
3 3 5
FBC_DQS5*
F7
E8
M503
64MX16DDR2-2.0
BGA84
NO STUFF
H3
G8
H7
H9
G2
H1
F1
F9
F3
F7
E8
C579
.047UF
6.3V
10%
X7R
0402
NO STUFF
FBVDDQ
GND
3 5
3 5
R549
1K
1%
0402
NO STUFF
R552
1K
1%
0402
NO STUFF
FBC_CMD<15>
15
FBC_CMD<25>
25
FBC_CMD<9>
9
FBC_CMD<8>
8
FBC_CMD<1>
1
FBC_CMD<3>
3
FBC_CMD<13>
13
FBC_CMD<4>
4
FBC_CMD<5>
5
FBC_CMD<6>
6
FBC_CMD<21>
21
FBC_CMD<23>
23
FBC_CMD<19>
19
FBC_CMD<20>
20
FBC_CMD<17>
17
FBC_CMD<16>
16
FBC_CMD<14>
14
SNN_FBC4_R8
SNN_FBC4_R3
SNN_FBC4_R7
FBC_CMD<10>
10
FBC_CMD<18>
18
27
FBC_CMD<27>
FBC_CMD<11>
11
FBC_CLK1
FBC_CLK1*
FBC_CMD<12>
12
SNN_FBC4_A2
SNN_FBC4_E2
M504
2
3
64MX16DDR2-2.0
BGA84
NO STUFF
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBC_D<16>
16
FBC_D<17>
17
FBC_D<18>
18
FBC_D<19>
19
FBC_D<20>
20
FBC_D<21>
21
FBC_D<22>
22
FBC_D<23>
23
FBC_DQM<2>
FBC_D<24>
24
FBC_D<25>
25
FBC_D<26>
26
FBC_D<27>
27
FBC_D<28>
28
FBC_D<29>
29
FBC_D<30>
30
FBC_D<31>
31
FBC_DQM<3>
FBC_DQS2
3 3 5
5
5
FBC_DQS2*
FBC_DQS3
3 3 5
FBC_DQS3*
FBVDDQ
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A3
E3
J3
N1
GND
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
FBC_VREF0
J2
M504
64MX16DDR2-2.0
BGA84
NO STUFF
D9
C8
B9
D3
D1
B1
C2
D7
B3
FBC_DQS0
3 3 5
5
5
FBC_DQS0*
FBC_DQS1
3 3 5
FBC_DQS1*
B7
A8
M1
64MX16DDR2-2.0
BGA84
NO STUFF
D1
C2
B1
C8
D9
B9
D3
D7
B3
B7
A8
C21
.047UF
6.3V
10%
X7R
0402
NO STUFF
5
5
FBVDDQ
GND
3
3
1
R39
1K
1%
0402
NO STUFF2
R40
1K
1%
0402
NO STUFF
FBC_CMD<15>
15
FBC_CMD<25>
25
FBC_CMD<9>
9
FBC_CMD<8>
8
FBC_CMD<1>
1
FBC_CMD<3>
3
FBC_CMD<2>
2
FBC_CMD<0>
0
FBC_CMD<24>
24
FBC_CMD<22>
22
FBC_CMD<21>
21
FBC_CMD<23>
23
FBC_CMD<19>
19
FBC_CMD<20>
20
FBC_CMD<17>
17
FBC_CMD<16>
16
FBC_CMD<14>
14
SNN_FBC2_R8
SNN_FBC2_R3
SNN_FBC2_R7
FBC_CMD<10>
10
FBC_CMD<18>
18
27
FBC_CMD<27>
FBC_CMD<11>
11
FBC_CLK0
FBC_CLK0*
FBC_CMD<12>
12
SNN_FBC2_A2
SNN_FBC2_E2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
J2
M1
64MX16DDR2-2.0
BGA84
NO STUFF
F1
G2
H9
G8
F9
H3
H7
H1
F3
F7
E8
M504
64MX16DDR2-2.0
BGA84
NO STUFF
F9
G2
F1
H9
G8
H1
H3
H7
F3
F7
E8
FBVDDQ
FBC_VREF1
FBC_CMD<15>
15
FBC_CMD<25>
25
FBC_CMD<9>
9
FBC_CMD<8>
8
FBC_CMD<1>
1
FBC_CMD<3>
3
FBC_CMD<13>
13
FBC_CMD<4>
4
FBC_CMD<5>
5
FBC_CMD<6>
6
FBC_CMD<21>
21
FBC_CMD<23>
23
FBC_CMD<19>
19
FBC_CMD<20>
20
FBC_CMD<17>
17
FBC_CMD<16>
16
FBC_CMD<14>
14
SNN_FBC3_R8
SNN_FBC3_R3
SNN_FBC3_R7
FBC_CMD<10>
10
FBC_CMD<18>
GND
3 5
3 5
FBVDDQ
R586
1K
1%
0402
NO STUFF
C645
.047UF
6.3V
10%
X7R
0402
NO STUFF
GND
R587
1K
1%
0402
NO STUFF
18
27
FBC_CMD<27>
FBC_CMD<11>
11
FBC_CLK1
FBC_CLK1*
FBC_CMD<12>
12
SNN_FBC3_A2
SNN_FBC3_E2
6
7
M2
64MX16DDR2-2.0
BGA84
NO STUFF
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBC_D<48>
48
FBC_D<49>
49
FBC_D<50>
50
FBC_D<51>
51
FBC_D<52>
52
FBC_D<53>
53
FBC_D<54>
54
FBC_D<55>
55
FBC_DQM<6>
FBC_D<56>
56
FBC_D<57>
57
FBC_D<58>
58
FBC_D<59>
59
FBC_D<60>
60
FBC_D<61>
61
FBC_D<62>
62
FBC_D<63>
63
FBC_DQM<7>
FBVDDQ
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A3
E3
J3
N1
GND
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
FBC_VREF3
J2
M2
64MX16DDR2-2.0
BGA84
NO STUFF
D9
B9
C8
B1
D7
D3
D1
C2
B3
5
5
5
5
FBC_DQS6*
3
FBC_DQS7
3
FBC_DQS7*
3
FBC_DQS6
3
B7
A8
M503
64MX16DDR2-2.0
BGA84
NO STUFF
D1
C2
D3
D9
B1
B9
D7
C8
B3
B7
A8
C23
.047UF
6.3V
10%
X7R
0402
NO STUFF
FBVDDQ
GND
R41
1K
1%
0402
NO STUFF
R42
1K
1%
0402
NO STUFF
5 3
CLOCK TERMINATIONS
FBC_CLK0
3 5
FBC_CLK1
R28
0402
R547
0402
1%
1%
475
NO STUFF
475
NO STUFF
FBC_CLK0*
FBC_CLK1*
3 5
3 5
3
5
3
5
3
5
3
5
3
5
3
5
3
5
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBC_DQM<7..0>
FBC_D<63..0>
FBC_CMD<27..0>
NV_CRITICALNET
NET
FBC_VREF1
FBC_VREF2
FBC_VREF0
FBC_VREF3
NET RULES for FrameBuffer C
DIFFPAIRNV_IMPEDANCE
1
1
1
1
1
1
1
0.9V
0.9V
0.9V
0.9V
100DIFF
100DIFF
100DIFF
100DIFF
50OHM
50OHM
50OHM
MAX_CURRENTVOLTAGE
0.02A
0.02A
0.02A
0.02A
P801-A00 SKU2 G96-610 MXM3.0 TYPE-A 512MB 4pcs 64Mx316
Frame Buffer Partition C Memories
FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1
MIN_WIDTH
12MIL
12MIL
12MIL
12MIL
5 3
5 3
5
5 3
5
5 3
3 5
3 5
3 5
3 5
3 5
3
3 5
3 5
3 5
3
3 5
3 5
www.vinafix.vn
NET
FBC_DQS0
FBC_DQS0*
FBC_DQS1
FBC_DQS1*
FBC_DQS2
FBC_DQS2*
FBC_DQS3
FBC_DQS3*
FBC_DQS4
FBC_DQS4*
FBC_DQS5
FBC_DQS5*
FBC_DQS6
FBC_DQS6*
FBC_DQS7
FBC_DQS7*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 100DIFF
1 100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
DIFFPAIRNV_IMPEDANCENV_CRITICAL
FBC_DQS0
FBC_DQS0
FBC_DQS1
FBC_DQS1
FBC_DQS2
FBC_DQS2
FBC_DQS3
FBC_DQS3
FBC_DQS4
FBC_DQS4
FBC_DQS5
FBC_DQS5
FBC_DQS6
FBC_DQS6
FBC_DQS7
FBC_DQS7
600-10801-0002-000 A
p801_a00
cfox
5 OF 15
27-AUG-2008
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