MSI MS-V162 Schematic 1.0

8

+12V_BUS

C1

CAP CER 10UF 20% 16V X5R

10UFC110UF

(1206)1.8MM H MAX

+12V_BUS

+12V_BUS

C3

D D

C C

B B

C2

150nF_16VC3150nF_16V

150nF_16VC2150nF_16V

+3.3V_BUS

CAP CER 10UF 10% 6.3V X6S
(0805)1.4MM MAX THICK

C5
10uF_X6SC510uF_X6S

+3.3V_BUS

C7
1uF_6.3VC71uF_6.3V

C8
10nFC810nF

C6
100nF_6.3VC6100nF_6.3V

Place these caps as close to the PCIE
connector as possible

7

+3.3V

R5

R6

4.7KR54.7K

GPIO_4_SMBCLK(6)

GPIO_3_SMBDATA(6)

TEST_EN_J TEST_EN_J

C9

4.7KR64.7K
DNIDNI

100nF_6.3VC9100nF_6.3V

PETp10_GFXRp10(2)
PETn10_GFXRn10(2)

PETp11_GFXRp11(2)
PETn11_GFXRn11(2)

PETp12_GFXRp12(2)
PETn12_GFXRn12(2)

PETp13_GFXRp13(2)
PETn13_GFXRn13(2)

PETp14_GFXRp14(2)
PETn14_GFXRn14(2)

PETp15_GFXRp15(2)
PETn15_GFXRn15(2)

PETn0_GFXRn0(2)

PETp1_GFXRp1(2)
PETn1_GFXRn1(2)

PETp2_GFXRp2(2)
PETn2_GFXRn2(2)

PETp3_GFXRp3(2)
PETn3_GFXRn3(2)

PETp4_GFXRp4(2)
PETn4_GFXRn4(2)

PETp5_GFXRp5(2)
PETn5_GFXRn5(2)

PETp6_GFXRp6(2)
PETn6_GFXRn6(2)

PETp7_GFXRp7(2)
PETn7_GFXRn7(2)

PETp8_GFXRp8(2)
PETn8_GFXRn8(2)

PETp9_GFXRp9(2)
PETn9_GFXRn9(2)

+3.3V_BUS

6

U12

U12

VCC8OE1
1B2OE2

6

1A

2B

4

GND

2A

NC7WB66K8X

NC7WB66K8X

DNI , To Bypass U12

+3.3V_BUS

JTRST

PRESENCE

5

PCI-EXPRESS EDGE CONNECTOR

7
3
1
5

SMCLK
SMDAT

C10

C10
100nF_6.3V

100nF_6.3V

+12V_BUS

+3.3V

R40RR4

0R

x16 PCIe

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11

B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82

+12V#B1
+12V#B2
+12V#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1

3.3Vaux
WAKE#

RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82

x16 PCIe

Mechanical Key

Mechanical Key

MPCIE1

MPCIE1

PRSNT1#A1

+3.3V#A10

RSVD#A19

RSVD#A32
RSVD#A33

RSVD#A50

+12V#A2
+12V#A3
GND#A4

JTAG2
JTAG3
JTAG4
JTAG5

+3.3V#A9

PERST#

GND#A12
REFCLK+
REFCLK­GND#A15

PERp0
PERn0

GND#A18
GND#A20

PERp1

PERn1
GND#A23
GND#A24

PERp2

PERn2
GND#A27
GND#A28

PERp3

PERn3
GND#A31

GND#A34

PERp4

PERn4
GND#A37
GND#A38

PERp5

PERn5
GND#A41
GND#A42

PERp6

PERn6
GND#A45
GND#A46

PERp7

PERn7
GND#A49

GND#A51

PERp8

PERn8
GND#A54
GND#A55

PERp9

PERn9
GND#A58
GND#A59

PERp10

PERn10
GND#A62
GND#A63

PERp11

PERn11
GND#A66
GND#A67

PERp12

PERn12
GND#A70
GND#A71

PERp13

PERn13
GND#A74
GND#A75

PERp14

PERn14
GND#A78
GND#A79

PERp15

PERn15
GND#A82

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82

PRESENCE

JTDI

4

+12V_BUS

+3.3V_BUS

PERp0
PERn0

PERp1
PERn1

PERp2
PERn2

PERp3
PERn3

PERp4
PERn4

PERp5
PERn5

PERp6
PERn6

PERp7
PERn7

PERp8
PERn8

PERp9
PERn9

PERp10
PERn10

PERp11
PERn11

PERp12
PERn12

PERp13
PERn13

PERp14
PERn14

PERp15
PERn15

JTCK
JTDO

JTMS

PERST#

JTRST

No JTAG

TDA08H0SB1R

TDA08H0SB1R

21 345678

21 345678

ON

ON

TSW1

TSW1

3

98
107
116
125
134
143
152
161

TP4

TP4
35mil

35mil

JTAG_MODE
JTAG_TRSTB
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS

PCIE_REFCLKP (2)
PCIE_REFCLKN (2)PETp0_GFXRp0(2)

PERp0 (2)
PERn0 (2)

PERp1 (2)
PERn1 (2)

PERp2 (2)
PERn2 (2)

PERp3 (2)
PERn3 (2)

PERp4 (2)
PERn4 (2)

PERp5 (2)
PERn5 (2)

PERp6 (2)
PERn6 (2)

PERp7 (2)
PERn7 (2)

PERp8 (2)
PERn8 (2)

PERp9 (2)
PERn9 (2)

PERp10 (2)
PERn10 (2)

PERp11 (2)
PERn11 (2)

PERp12 (2)
PERn12 (2)

PERp13 (2)
PERn13 (2)

PERp14 (2)
PERn14 (2)

PERp15 (2)
PERn15 (2)

TP32

TP32
35mil

35mil

TP1

TP1
35mil

35mil

TP2

TP2
35mil

35mil

TP5

TP5
35mil

35mil

TP3

TP3
35mil

35mil

2

U1A

R21 1KR21 1K

JTAG_TMS (17)
JTAG_TDO (17)

JTAG_TDI (17)

JTAG_TCK (17)

JTAG_MODE (17)

PWR_GOOD(6,14,15,16)

MR9 1KMR9 1K

Share one pad

U1A

AD28

TESTEN

AM23

JTAG_TRSTB

AK23

JTAG_TCK

AN23

JTAG_TDI

AM24

JTAG_TDO

AL24

JTAG_TMS

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

+3.3V_BUS

1
2

PART 1 OF 15

PART 1 OF 15

J

J
T

T
A

A
G

G

+3.3V

R100RR10
0R

53

R_RST

1

Share one pad

NC7SZ08P5X_NL

NC7SZ08P5X_NL

4

U11

U11

DNI

Place R3 in U5

Table 1: Connection for JTAG

Production
(No JTAG)

Internal Use Only

TSW1, R1 & R2 are located on the bottom side of the board close to PCIE connector.

Install R1, R2 & Don't Install TSW1

Install TSW1 & Don't Install R1 & R2

TSW1 Switch #1, 2, 3, 4, 5 and 6 closed (ON)

JTAG

#8 and 7 open

TSW1 Switch #1, 2, 3, 4, 5 and 6 open

NO JTAG

#8 & 7 closed (ON)

C4
100nF_6.3VC4100nF_6.3V

PERST#_buf (2,16)

SYMBOL LEGEND

DO NOT

DNI

INSTALL

#

ACTIVE
LOW

DIGITAL
GROUND

ANALOG

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

8

7

6

5

4

3

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

119

of

119

of

119

GROUND

BUO BRING UP

ONLY

Doc No.

Doc No.

Doc No.

102-B66801-00

102-B66801-00

102-B66801-00

1

RevDate:

RevDate:

RevDate:

07

07

07

www.vinafix.vn

5

4

3

2

1

(2) RV730 PCIE Interface

NOTE: some of the PCIE testpoints will
be available trought via on traces.

PETp0_GFXRp0(1)
PETn0_GFXRn0(1)

PETp1_GFXRp1(1)
PETn1_GFXRn1(1)

D D

C C

+1.8V

+1.8V

+1.1V

B B

PETp2_GFXRp2(1)
PETn2_GFXRn2(1)

PETp3_GFXRp3(1)
PETn3_GFXRn3(1)

PETp4_GFXRp4(1)
PETn4_GFXRn4(1)

PETp5_GFXRp5(1)
PETn5_GFXRn5(1)

PETp6_GFXRp6(1)
PETn6_GFXRn6(1)

PETp7_GFXRp7(1)
PETn7_GFXRn7(1)

PETp8_GFXRp8(1)
PETn8_GFXRn8(1)

PETp9_GFXRp9(1)
PETn9_GFXRn9(1)

PETp10_GFXRp10(1)
PETn10_GFXRn10(1)

PETp11_GFXRp11(1)
PETn11_GFXRn11(1)

PETp12_GFXRp12(1)
PETn12_GFXRn12(1)

PETp13_GFXRp13(1)
PETn13_GFXRn13(1)

PETp14_GFXRp14(1)
PETn14_GFXRn14(1)

PETp15_GFXRp15(1)
PETn15_GFXRn15(1)

B22 BLM15BD121SN1B22 BLM15BD121SN1

B23 26R_600mAB23 26R_600mA

B21 220R_2AB21 220R_2A

+PCIE_PVDD

+PCIE_VDDR

+PCIE_VDDC

1uF_6.3V

1uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

C101

C101

C94

C94

10uF_X6S

10uF_X6S

C98

C98

1uF_6.3V

1uF_6.3V

C95

C95

1uF_6.3V

1uF_6.3V

C90

C90

1uF_6.3V

1uF_6.3V

C51

C51

10uF_X6S

10uF_X6S

C86

C86

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

TP6TP6

TP13TP13

TP14TP14

TP7TP7

TP15TP15

TP8TP8

TP9TP9

TP16TP16

TP17TP17

TP10TP10

TP11TP11

TP19TP19

TP18TP18

TP12TP12

TP20TP20

TP22TP22

TP21TP21

TP23TP23

TP24TP24

TP26TP26

TP25TP25

TP27TP27

PCIE_REFCLKP(1)
PCIE_REFCLKN(1)

PERST#_buf(1,16)

C85

C85

C87

C87

100nF_6.3V

100nF_6.3V

C99

C99

100nF_6.3V

100nF_6.3V

C96

C96

C91

C91

1uF_6.3V

1uF_6.3V

C88

C88

1uF_6.3V

1uF_6.3V

C100

C100

C92

C92

C89

C89

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C84

C84

10nF

10nF

C97

C97

C93

C93

U1B

U1B

AA38

PCIE_RX0P

Y37

PCIE_RX0N

Y35

PCIE_RX1P

W36

PCIE_RX1N

W38

PCIE_RX2P

V37

PCIE_RX2N

V35

PCIE_RX3P

U36

PCIE_RX3N

U38

PCIE_RX4P

T37

PCIE_RX4N

T35

PCIE_RX5P

R36

PCIE_RX5N

R38

PCIE_RX6P

P37

PCIE_RX6N

P35

PCIE_RX7P

N36

PCIE_RX7N

N38

PCIE_RX8P

M37

PCIE_RX8N

M35

PCIE_RX9P

L36

PCIE_RX9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AA30

PERSTB

AB37

PCIE_PVDD

AA31

PCIE_VDDR#1

AA32

PCIE_VDDR#2

AA33

PCIE_VDDR#3

AA34

PCIE_VDDR#4

V28

PCIE_VDDR#5

W29

PCIE_VDDR#6

W30

PCIE_VDDR#7

Y31

PCIE_VDDR#8

G30

PCIE_VDDC#1

G31

PCIE_VDDC#2

H29

PCIE_VDDC#3

H30

PCIE_VDDC#4

J29

PCIE_VDDC#5

J30

PCIE_VDDC#6

L28

PCIE_VDDC#7

M28

PCIE_VDDC#8

N28

PCIE_VDDC#9

R28

PCIE_VDDC#10

T28

PCIE_VDDC#11

U28

PCIE_VDDC#12

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

PART 2 OF 15

PART 2 OF 15

P

P
C

C
I

I
E

E
X

X
P

P
R

R
E

E
S

S
S

S

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

PCIE_CALRP
PCIE_CALRN

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8

PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35

Y33
Y32

W33
W32

U33
U32

U30
U29

T33
T32

T30
T29

P33
P32

P30
P29

N33
N32

N30
N29

L33
L32

L30
L29

K33
K32

J33
J32

K30
K29

H33
H32

Y30
Y29

AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

PCIE_CALRP
PCIE_CALRN

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C11

C11

100nF_6.3V

100nF_6.3V

C13

C13

R221.27K R221.27K

R242.0K R242.0K

C12

C12

C14

C14
100nF_6.3V

100nF_6.3V

C15

C15

C16

C16
100nF_6.3V

100nF_6.3V

C17

C17

C18

C18
100nF_6.3V

100nF_6.3V

C19

C19

C20

C20
100nF_6.3V

100nF_6.3V

C21

C21

C22

C22
100nF_6.3V

100nF_6.3V

C23

C23

C24

C24
100nF_6.3V

100nF_6.3V

C25

C25

C26

C26
100nF_6.3V

100nF_6.3V

C27

C27

C28

C28
100nF_6.3V

100nF_6.3V

C29

C29

C30

C30
100nF_6.3V

100nF_6.3V

C31

C31

C32

C32
100nF_6.3V

100nF_6.3V

C33

C33

C34

C34
100nF_6.3V

100nF_6.3V

C35

C35

C36

C36
100nF_6.3V

100nF_6.3V

C37

C37

C38

C38
100nF_6.3V

100nF_6.3V

C39

C39

C40

C40
100nF_6.3V

100nF_6.3V

C41

C41

C42

C42
100nF_6.3V

100nF_6.3V

+PCIE_VDDC

PERp0 (1)
PERn0 (1)

PERp1 (1)
PERn1 (1)

PERp2 (1)
PERn2 (1)

PERp3 (1)
PERn3 (1)

PERp4 (1)
PERn4 (1)

PERp5 (1)
PERn5 (1)

PERp6 (1)
PERn6 (1)

PERp7 (1)
PERn7 (1)

PERp8 (1)
PERn8 (1)

PERp9 (1)
PERn9 (1)

PERp10 (1)
PERn10 (1)

PERp11 (1)
PERn11 (1)

PERp12 (1)
PERn12 (1)

PERp13 (1)
PERn13 (1)

PERp14 (1)
PERn14 (1)

PERp15 (1)
PERn15 (1)

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

5

4

3

2

RH RV730 DDR2 DVIII-TVO-DVII

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

219

of

219

of

219

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

5

(3) RV730 MEM Interface Ch A&B

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10

D D

DQMA_0(4)
DQMA_1(4)
DQMA_2(4)
DQMA_3(4)

QSA_0(4)
QSA_1(4)
QSA_2(4)
QSA_3(4)

C C

B B

ODTA0(4) ODTB0(5)

MAA_[14..0](4)

MAA_BA_[2..0](4)

DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31

CKEA0(4)
CLKA0(4)

CLKA0b(4)

CSA0b_0(4)

CASA0b(4)
RASA0b(4)
WEA0b(4)

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14

MAA_BA_0
MAA_BA_1
MAA_BA_2

U1C

U1C

C37

DQA_0

C35

DQA_1

A35

DQA_2

E34

DQA_3

G32

DQA_4

D33

DQA_5

F32

DQA_6

E32

DQA_7

D31

DQA_8

F30

DQA_9

C30

DQA_10

A30

DQA_11

F28

DQA_12

C28

DQA_13

A28

DQA_14

E28

DQA_15

D27

DQA_16

F26

DQA_17

C26

DQA_18

A26

DQA_19

F24

DQA_20

C24

DQA_21

A24

DQA_22

E24

DQA_23

C22

DQA_24

A22

DQA_25

F22

DQA_26

D21

DQA_27

A20

DQA_28

F20

DQA_29

D19

DQA_30

E18

DQA_31

A32

DQMA_0

C32

DQMA_1

D23

DQMA_2

E22

DQMA_3

C34

QSA_0

D29

QSA_1

D25

QSA_2

E20

QSA_3

A34

QSA_0B

E30

QSA_1B

E26

QSA_2B

C20

QSA_3B

J21

ODTA0

K21

CKEA0

H27

CLKA0

G27

CLKA0B

K24

CSA0B_0

K27

CSA0B_1

K20

CASA0B

K23

RASA0B

K26

WEA0B

G24

MAA_0

J23

MAA_1

H24

MAA_2

J24

MAA_3

H26

MAA_4

J26

MAA_5

H21

MAA_6

G21

MAA_7

H19

MAA_8

H20

MAA_9

L13

MAA_10

G16

MAA_11

J16

MAA_12

H23

NC_MAA_13

J19

NC_MAA_14

J17

MAA_BA0

H17

MAA_BA1

H16

MAA_BA2

AH11

DRAM_RST

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

DDR2

DDR2

Single or

Single or

PART 3 OF 15

PART 3 OF 15

Diff Strobes

Diff Strobes

DDR3

DDR3

M

M
E

E
M

M
O

O
R

R
Y

Y

I

I
N

N
T

T
E

E
R

R
F

F
A

A
C

C
E

E

Differential Strobes

Differential Strobes

B

B
A

A
N

N
K

K

A

A

DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63

DQMA_4
DQMA_5
DQMA_6
DQMA_7

GDDR3

GDDR3

Read

Strobes

Read

Strobes

QSA_4B
QSA_5B
QSA_6B
QSA_7B

Write

Strobes

Write

Strobes

CLKA1B

CSA1B_0
CSA1B_1

CASA1B
RASA1B

NC_MEM_CALRP0
NC_MEM_CALRN0

MEM_CALRP1
NC_MEM_CALRN1
NC_MEM_CALRP2
NC_MEM_CALRN2

MVREFDA

MVREFSA

C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5

C14
A14
E10
D9

E16

QSA_4

E12

QSA_5

J10

QSA_6

D7

QSA_7

C16
C12
J11
F8

G19

ODTA1

J20

CKEA1

J14

CLKA1

H14

M13
K16

K17
K19
L15

WEA1B

M27
L27
M12
N12
AH12
AG12

L18

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

L20

DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8

DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

MEM_CALRP0

MEM_CALRN0

MEM_CALRP1

MEM_CALRN1

MEM_CALRP2

MEM_CALRN2

MVREFD_A

MVREFS_A

4

3

U1D

DQA1_[31..0] (4)DQA0_[31..0](4) DQB0_[31..0](5) DQB1_[31..0] (5)

CLKA1b (4)

DNI

1uF_6.3V

1uF_6.3V

DNI

1uF_6.3V

1uF_6.3V

DQMA_4 (4)
DQMA_5 (4)
DQMA_6 (4)
DQMA_7 (4)

QSA_4 (4)
QSA_5 (4)
QSA_6 (4)
QSA_7 (4)

CKEA1 (4)

CLKA1 (4)

CSA1b_0 (4)

CASA1b (4)
RASA1b (4)

WEA1b (4)

R118 243RR118 243R

R122

R122

100R

100R

1%

R125

R125

C300

C300

100R

100R

1%

R126

R126

100R

100R

R128

R128

C305

C305

100R

100R

1%

+MVDD

+MVDD

+MVDD

DQMB_0(5)
DQMB_1(5)
DQMB_2(5)
DQMB_3(5)

QSB_0(5)
QSB_1(5)
QSB_2(5)
QSB_3(5)

MAB_[14..0](5)

MAB_BA_[2..0](5)

DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31

CKEB0(5)
CLKB0(5)

CLKB0b(5)

CSB0b_0(5)

CASB0b(5)
RASB0b(5)
WEB0b(5)

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14

MAB_BA_0
MAB_BA_1
MAB_BA_2

U1D

C5

DQB_0

C3

DQB_1

E3

DQB_2

E1

DQB_3

F1

DQB_4

F3

DQB_5

F5

DQB_6

G4

DQB_7

H5

DQB_8

H6

DQB_9

J4

DQB_10

K6

DQB_11

K5

DQB_12

L4

DQB_13

M6

DQB_14

M1

DQB_15

M3

DQB_16

M5

DQB_17

N4

DQB_18

P6

DQB_19

P5

DQB_20

R4

DQB_21

T6

DQB_22

T1

DQB_23

U4

DQB_24

V6

DQB_25

V1

DQB_26

V3

DQB_27

Y6

DQB_28

Y1

DQB_29

Y3

DQB_30

Y5

DQB_31

H3

DQMB_0

H1

DQMB_1

T3

DQMB_2

T5

DQMB_3

F6

QSB_0

K3

QSB_1

P3

QSB_2

V5

QSB_3

G7

QSB_0B

K1

QSB_1B

P1

QSB_2B

W4

QSB_3B

T7

ODTB0

U10

CKEB0

L9

CLKB0

L8

CLKB0B

P10

CSB0B_0

L10

CSB0B_1

W10

CASB0B

T10

RASB0B

N10

WEB0B

P8

MAB_0

T9

MAB_1

P9

MAB_2

N7

MAB_3

N8

MAB_4

N9

MAB_5

U9

MAB_6

U8

MAB_7

Y9

MAB_8

W9

MAB_9

AC8

MAB_10

AC9

MAB_11

AA7

MAB_12

T8

NC_MAB_13

W8

NC_MAB_14

Y8

MAB_BA0

AA9

MAB_BA1

AA8

MAB_BA2

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

DDR2

DDR2

Single or

Diff Strobes

Single or

Diff Strobes

PART 4 OF 15

PART 4 OF 15

M

M
E

E
M

M
O

O
R

R
Y

Y

I

I
N

N
T

T
E

E
R

R
F

F
A

A
C

C
E

E

DDR3 GDDR3

DDR3 GDDR3

Differential Strobes

Differential Strobes

B

B
A

A
N

N
K

K

B

B

2

DQB1_0

AA4

DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

DQMB_4
DQMB_5
DQMB_6
DQMB_7

QSB_4
QSB_5
QSB_6
QSB_7

Read

Strobes

Read

Strobes

QSB_4B
QSB_5B
QSB_6B
QSB_7B

Write

Strobes

Write

Strobes

ODTB1

CKEB1
CLKB1

CLKB1B

CSB1B_0
CSB1B_1

CASB1B
RASB1B

WEB1B

MVREFDB

MVREFSB

DQB1_1

AB6

DQB1_2

AB1

DQB1_3

AB3

DQB1_4

AD6

DQB1_5

AD1

DQB1_6

AD3

DQB1_7

AD5

DQB1_8

AF1

DQB1_9

AF3

DQB1_10

AF6

DQB1_11

AG4

DQB1_12

AH5

DQB1_13

AH6

DQB1_14

AJ4

DQB1_15

AK3

DQB1_16

AF8

DQB1_17

AF9

DQB1_18

AG8

DQB1_19

AG7

DQB1_20

AK9

DQB1_21

AL7

DQB1_22

AM8

DQB1_23

AM7

DQB1_24

AK1

DQB1_25

AL4

DQB1_26

AM6

DQB1_27

AM1

DQB1_28

AN4

DQB1_29

AP3

DQB1_30

AP1

DQB1_31

AP5

AE4
AF5
AK6
AK5

AB5
AH1
AJ9
AM5

AC4
AH3
AJ8
AM3

W7

AA11
AD8

AD7

AD10
AC10

AA10
Y10
AB11

MVREFD_B

Y12

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

MVREFS_B

AA12

CLKB1b (5)

DNI

1uF_6.3V

1uF_6.3V

DNI

1uF_6.3V

1uF_6.3V

DQMB_4 (5)
DQMB_5 (5)
DQMB_6 (5)
DQMB_7 (5)

QSB_4 (5)
QSB_5 (5)
QSB_6 (5)
QSB_7 (5)

CKEB1 (5)

CLKB1 (5)

CSB1b_0 (5)

CASB1b (5)
RASB1b (5)

WEB1b (5)

R123

R123

100R

100R

1%

R124

R124

C298

C298

100R

100R

1%

R127

R127

100R

100R

1%1%

R129

R129

C307

C307

100R

100R

1%

1

+MVDD

+MVDD

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

5

4

3

2

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

319

of

319

of

319

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

5

(4) DDR2 Ch A

DQA0_[31..0](3) DQA1_[31..0](3)

D D

C C

MAA_BA_[2..0](3)

MAA_[14..0](3)

+MVDD +MVDD +MVDD

R201

R201

4.99K

4.99K

R202

R202

C2202

C2202

4.99K

4.99K

100nF_6.3V

100nF_6.3V

MAA_BA_0
MAA_BA_1
MAA_BA_2 MAA_BA_2

MAA_12
MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

CLKA0b(3)
CLKA0(3)

CKEA0(3)

CSA0b_0(3)

WEA0b(3)
RASA0b(3)
CASA0b(3)

DQMA_2
DQMA_0

DQMA_0(3)

ODTA0(3)

QSA_2

QSA_2(3) QSA_1(3)

VREF_A0

QSA_0

MAA_14
MAA_13

U201

U201

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23B21147QT02

23B21147QT02

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQA0_2

B9

DQA0_5

B1

DQA0_0

D9

DQA0_7

D1

DQA0_6

D3

DQA0_1

D7

DQA0_3

C2

DQ9

DQA0_4

C8

DQ8

DQA0_18

F9

DQ7

DQA0_21

F1

DQ6

DQA0_16

H9

DQ5

DQA0_20

H1

DQ4

DQA0_23

H3

DQ3

DQA0_17

H7

DQ2

DQA0_22

G2

DQ1

DQA0_19

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9

B2201

B2201

M9

220R_200mA

220R_200mA

R1
J1

J7

C2200

C2200

C2201

C2201

100nF_6.3V

100nF_6.3V

1uF_6.3V

R203

R203

4.99K

4.99K

R204

R204

4.99K

4.99K

1uF_6.3V

VREF_U202

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

4

3

CHANNEL A: 128MB/256MB DDR2

U203

U202
MAA_BA_0
MAA_BA_1

MAA_12
MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1

+MVDD

+MVDD

DQMA_1(3)DQMA_2(3)
DQMA_3(3) DQMA_4(3)

C2205

C2205
100nF_6.3V

100nF_6.3V

MAA_0

CLKA0b(3)
CLKA0(3)

CKEA0(3)

CSA0b_0(3)

WEA0b(3)
RASA0b(3)
CASA0b(3)

DQMA_1
DQMA_3

ODTA0(3) ODTA0(3)

QSA_1

QSA_3

QSA_3(3)

VREF_A0VREF_A0

MAA_14
MAA_13

U202

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23B21147QT02

23B21147QT02

DQ15

DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQA0_28

B9

DQA0_26

B1

DQA0_30

D9

DQA0_27

D1

DQA0_25

D3

DQA0_31

D7

DQA0_24

C2

DQ9

DQA0_29

C8

DQ8

DQA0_15

F9

DQ7

DQA0_8

F1

DQ6

DQA0_14

H9

DQ5

DQA0_11

H1

DQ4

DQA0_9

H3

DQ3

DQA0_13

H7

DQ2

DQA0_10

G2

DQ1

DQA0_12

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C2203

C2203
100nF_6.3V

100nF_6.3V

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

+MVDD

+MVDD

B2202

B2202
220R_200mA

220R_200mA

R205

R205

4.99K

4.99K

R206

R206

4.99K

4.99K

DQMA_7(3)
DQMA_6(3)

C2204

C2204
1uF_6.3V

1uF_6.3V

VREF_U203VREF_U201 VREF_U204

C2208

C2208
100nF_6.3V

100nF_6.3V

MAA_BA_0
MAA_BA_1
MAA_BA_2

MAA_12
MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

CLKA1b(3)
CLKA1(3)

CKEA1(3)

CSA1b_0(3)

WEA1b(3)
RASA1b(3)
CASA1b(3)

DQMA_7
DQMA_6

QSA_7

QSA_7(3)

VREF_A1VREF_A0

QSA_6

QSA_6(3)

VREF_A1

MAA_14
MAA_13

U203

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23B21147QT02

23B21147QT02

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQA1_20

B9

DQA1_19

B1

DQA1_22

D9

DQA1_18

D1

DQA1_17

D3

DQA1_23

D7

DQA1_16

C2

DQ9

DQA1_21

C8

DQ8

DQA1_28

F9

DQ7

DQA1_26

F1

DQ6

DQA1_29

H9

DQ5

DQA1_27

H1

DQ4

DQA1_25

H3

DQ3

DQA1_31

H7

DQ2

DQA1_24

G2

DQ1

DQA1_30

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C2206

C2206
100nF_6.3V

100nF_6.3V

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

2

B2203

B2203
220R_200mA

220R_200mA

R207

R207

4.99K

4.99K

R208

R208

4.99K

4.99K

C2207

C2207
1uF_6.3V

1uF_6.3V

+MVDD

+MVDD

C2211

C2211
100nF_6.3V

100nF_6.3V

1

U204
MAA_BA_0
MAA_BA_1
MAA_BA_2

MAA_12
MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

CLKA1b(3)
CLKA1(3)

CKEA1(3)

CSA1b_0(3)

WEA1b(3)
RASA1b(3)
CASA1b(3)

DQMA_5

DQMA_5(3)

DQMA_4

ODTA0(3)

QSA_5

QSA_5(3)

VREF_A1

QSA_4

QSA_4(3)QSA_0(3)

VREF_A1

MAA_14
MAA_13

U204

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23B21147QT02

23B21147QT02

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQA1_2

B9

DQA1_4

B1

DQA1_0

D9

DQA1_6

D1

DQA1_7

D3

DQA1_1

D7

DQA1_5

C2

DQ9

DQA1_3

C8

DQ8

DQA1_11

F9

DQ7

DQA1_12

F1

DQ6

DQA1_10

H9

DQ5

DQA1_15

H1

DQ4

DQA1_14

H3

DQ3

DQA1_9

H7

DQ2

DQA1_13

G2

DQ1

DQA1_8

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C2209

C2209
100nF_6.3V

100nF_6.3V

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B2204

B2204
220R_200mA

220R_200mA

C2210

C2210
1uF_6.3V

1uF_6.3V

+MVDD

+MVDD

C1347 1uF_6.3VC1347 1uF_6.3V

C1364 1uF_6.3VC1364 1uF_6.3V

CLKA0(3)

CLKA0b(3)

CLKA1(3)

CLKA1b(3)

C1365 1uF_6.3VC1365 1uF_6.3V

C1357 1uF_6.3VC1357 1uF_6.3V

C1348 1uF_6.3VC1348 1uF_6.3V

+MVDD+MVDD

R209

VREF_A0VREF_A1

C1545 1uF_6.3VC1545 1uF_6.3V

C1337 1uF_6.3VC1337 1uF_6.3V

C1338 1uF_6.3VC1338 1uF_6.3V

MC1361 4.7uF_6.3VMC1361 4.7uF_6.3V

R209

4.99K

4.99K

R210

R210

4.99K

4.99K

C1346 1uF_6.3VC1346 1uF_6.3V

C1326 1uF_6.3VC1326 1uF_6.3V

R219

R219

4.99K

B B

+MVDD +MVDD +MVDD

C1356 1uF_6.3VC1356 1uF_6.3V

C1541 1uF_6.3VC1541 1uF_6.3V

C1542 1uF_6.3VC1542 1uF_6.3V

MC1368 4.7uF_6.3VMC1368 4.7uF_6.3V

C1367 1uF_6.3VC1367 1uF_6.3V

C1363 1uF_6.3VC1363 1uF_6.3V

C1355 1uF_6.3VC1355 1uF_6.3V

+MVDD +MVDD +MVDD

MC1325 4.7uF_6.3VMC1325 4.7uF_6.3V

C1360 1uF_6.3VC1360 1uF_6.3V

C1344 1uF_6.3VC1344 1uF_6.3V

C1345 1uF_6.3VC1345 1uF_6.3V

C1331 1uF_6.3VC1331 1uF_6.3V

C1332 1uF_6.3VC1332 1uF_6.3V

C1333 1uF_6.3VC1333 1uF_6.3V

DNI DNI DNI

C1540 1uF_6.3VC1540 1uF_6.3V

A A

Overlap cap pair
foorprints (0805
with 0603)

5

4.99K

R220

R220

4.99K

4.99K

C1544 1uF_6.3VC1544 1uF_6.3V

C1543 1uF_6.3VC1543 1uF_6.3V

MC1327 4.7uF_6.3VMC1327 4.7uF_6.3V

Overlap cap pair
foorprints (0805
with 0603)

4

C1349 1uF_6.3VC1349 1uF_6.3V

R221

R221
56R

56R

C244 10nFC244 10nF

R222

R222
56R

56R

R223

R223
56R

56R

C245 10nFC245 10nF

R224

R224
56R

56R

C1546 1uF_6.3VC1546 1uF_6.3V

C1547 1uF_6.3VC1547 1uF_6.3V

+MVDD+MVDD +MVDD

MC1330 4.7uF_6.3VMC1330 4.7uF_6.3V

Overlap cap pair
foorprints (0805
with 0603)

3

C1548 1uF_6.3VC1548 1uF_6.3V

C1341 1uF_6.3VC1341 1uF_6.3V

C1342 1uF_6.3VC1342 1uF_6.3V

MC1352 4.7uF_6.3VMC1352 4.7uF_6.3V

C1328 1uF_6.3VC1328 1uF_6.3V

C1329 1uF_6.3VC1329 1uF_6.3V

C1343 1uF_6.3VC1343 1uF_6.3V

C1324 1uF_6.3VC1324 1uF_6.3V

C1366 1uF_6.3VC1366 1uF_6.3V

C1362 1uF_6.3VC1362 1uF_6.3V

C1351 1uF_6.3VC1351 1uF_6.3V

C1358 1uF_6.3VC1358 1uF_6.3V

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

2

RH RV730 DDR2 DVIII-TVO-DVII

+MVDD

C1538 1uF_6.3VC1538 1uF_6.3V

C1537 1uF_6.3VC1537 1uF_6.3V

C1539 1uF_6.3VC1539 1uF_6.3V

+MVDD

MC1319 4.7uF_6.3VMC1319 4.7uF_6.3V

Overlap cap pair
foorprints (0805
with 0603)

C1312 1uF_6.3VC1312 1uF_6.3V

C1309 1uF_6.3VC1309 1uF_6.3V

C1311 1uF_6.3VC1311 1uF_6.3V

C1310 1uF_6.3VC1310 1uF_6.3V

+MVDD

MC1320 4.7uF_6.3VMC1320 4.7uF_6.3V

DNI

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

419

of

419

of

419

C1313 1uF_6.3VC1313 1uF_6.3V

1

C1314 1uF_6.3VC1314 1uF_6.3V

C1315 1uF_6.3VC1315 1uF_6.3V

C1316 1uF_6.3VC1316 1uF_6.3V

Doc No.

Doc No.

Doc No.

C1317 1uF_6.3VC1317 1uF_6.3V

C1318 1uF_6.3VC1318 1uF_6.3V

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

5

(5) DDR2 Ch B

DQB0_[31..0](3) DQB1_[31..0](3)

MAB_BA_[2..0](3)

D D

C C

B B

+MVDD

MAB_[14..0](3)

R301

R301

4.99K

4.99K
VREF_U301

R302

R302

4.99K

4.99K

C2302

C2302
100nF_6.3V

100nF_6.3V

MAB_BA_0
MAB_BA_1
MAB_BA_2 MAB_BA_2 MAB_BA_2

MAB_12
MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1
MAB_0

CLKB0b(3)
CLKB0(3)

CKEB0(3)

CSB0b_0(3)

WEB0b(3)
RASB0b(3)
CASB0b(3)

DQMB_2
DQMB_0

DQMB_0(3)

ODTB0(3)

QSB_2

VREF_B0

QSB_0

QSB_0(3)

VREF_B0

MAB_14
MAB_13

U301

U301

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23B21147QT02

23B21147QT02

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQB0_2

B9

DQB0_5

B1

DQB0_0

D9

DQB0_7

D1

DQB0_6

D3

DQB0_1

D7

DQB0_4

C2

DQ9

DQB0_3

C8

DQ8

DQB0_18

F9

DQ7

DQB0_21

F1

DQ6

DQB0_17

H9

DQ5

DQB0_20

H1

DQ4

DQB0_23

H3

DQ3

DQB0_16

H7

DQ2

DQB0_22

G2

DQ1

DQB0_19

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9

B301

B301

M9

220R_200mA

220R_200mA

R1
J1

J7

C2300

C2300

C2301

C2301

100nF_6.3V

100nF_6.3V

1uF_6.3V

+MVDD

R303

R303

4.99K

4.99K

R304

R304

4.99K

4.99K

1uF_6.3V

VREF_U302

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

4

CHANNEL B: 128MB/256MB DDR2

U302

R309

R309

4.99K

4.99K

R310

R310

4.99K

4.99K

U302

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23B21147QT02

23B21147QT02

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

R319

R319

4.99K

4.99K

R320

R320

4.99K

4.99K

DQB0_29

B9

DQB0_25

B1

DQB0_31

D9

DQB0_27

D1

DQB0_26

D3

DQB0_28

D7

DQB0_24

C2

DQ9

DQB0_30

C8

DQ8

DQB0_11

F9

DQ7

DQB0_9

F1

DQ6

DQB0_15

H9

DQ5

DQB0_10

H1

DQ4

DQB0_8

H3

DQ3

DQB0_13

H7

DQ2

DQB0_12

G2

DQ1

DQB0_14

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

CLKB0(3)

CLKB0b(3)

CLKB1(3)

CLKB1b(3)

MAB_BA_0
MAB_BA_1

MAB_12
MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1

+MVDD

+MVDD

C2305

C2305
100nF_6.3V

100nF_6.3V

MAB_0

CLKB0b(3)
CLKB0(3)

CKEB0(3)

CSB0b_0(3)

WEB0b(3)
RASB0b(3)
CASB0b(3)

DQMB_1

DQMB_1(3)DQMB_2(3)

DQMB_3

DQMB_3(3) DQMB_4(3)

ODTB0(3) ODTB0(3) ODTB0(3)

QSB_1 QSB_5

QSB_1(3)QSB_2(3)

VREF_B0

QSB_3

QSB_3(3) QSB_4(3)

VREF_B0

MAB_14
MAB_13

+MVDD +MVDD

VREF_B0 VREF_B1

B302

B302
220R_200mA

220R_200mA

C2303

C2303
100nF_6.3V

100nF_6.3V

R305

R305

4.99K

4.99K

R306

R306

4.99K

4.99K

+MVDD

+MVDD

C2304

C2304
1uF_6.3V

1uF_6.3V

VREF_U303

3

C2308

C2308
100nF_6.3V

100nF_6.3V

R321

R321
56R

56R

R322

R322
56R

56R

R323

R323
56R

56R

R324

R324
56R

56R

DQMB_5(3)

QSB_5(3)

MAB_BA_0
MAB_BA_1

MAB_12
MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1
MAB_0

CLKB1b(3)
CLKB1(3)

CKEB1(3)

CSB1b_0(3)

WEB1b(3)
RASB1b(3)
CASB1b(3)

DQMB_5
DQMB_4

VREF_B1

QSB_4

VREF_B1

MAB_14
MAB_13

C344 10nFC344 10nF

C345 10nFC345 10nF

U303

U303

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23B21147QT02

23B21147QT02

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

2

U304

DQB1_2

B9

DQB1_5

B1

DQB1_0

D9

DQB1_4

D1

DQB1_7

D3

DQB1_1

D7

DQB1_6

C2

DQ9

DQB1_3

C8

DQ8

DQB1_11

F9

DQ7

DQB1_12

F1

DQ6

DQB1_10

H9

DQ5

DQB1_15

H1

DQ4

DQB1_14

H3

DQ3

DQB1_8

H7

DQ2

DQB1_13

G2

DQ1

DQB1_9

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C2306

C2306
100nF_6.3V

100nF_6.3V

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B303

B303
220R_200mA

220R_200mA

R307

R307

4.99K

4.99K

R308

R308

4.99K

4.99K

C2307

C2307
1uF_6.3V

1uF_6.3V

VREF_U304

C2587

C2587
100nF_6.3V

100nF_6.3V

+MVDD

+MVDD

DQMB_7(3)
DQMB_6(3)

MAB_BA_0
MAB_BA_1
MAB_BA_2

MAB_12
MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1
MAB_0

CLKB1b(3)
CLKB1(3)

CKEB1(3)

CSB1b_0(3)

WEB1b(3)
RASB1b(3)
CASB1b(3)

DQMB_7
DQMB_6

QSB_7

QSB_7(3)

VREF_B1

QSB_6

QSB_6(3)

VREF_B1

MAB_14
MAB_13

U304

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23B21147QT02

23B21147QT02

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

1

DQB1_21

B9

DQB1_18

B1

DQB1_23

D9

DQB1_16

D1

DQB1_17

D3

DQB1_22

D7

DQB1_19

C2

DQ9

DQB1_20

C8

DQ8

DQB1_28

F9

DQ7

DQB1_25

F1

DQ6

DQB1_31

H9

DQ5

DQB1_26

H1

DQ4

DQB1_27

H3

DQ3

DQB1_30

H7

DQ2

DQB1_24

G2

DQ1

DQB1_29

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B304

B304
220R_200mA

220R_200mA

C2309

C2309
100nF_6.3V

100nF_6.3V

+MVDD

+MVDD

C2310

C2310
1uF_6.3V

1uF_6.3V

+MVDD

C1550 1uF_6.3VC1550 1uF_6.3V

C1551 1uF_6.3VC1551 1uF_6.3V

C1476 1uF_6.3VC1476 1uF_6.3V

C1478 1uF_6.3VC1478 1uF_6.3V

MC1486 4.7uF_6.3VMC1486 4.7uF_6.3V

C1477 1uF_6.3VC1477 1uF_6.3V

MC1487 4.7uF_6.3VMC1487 4.7uF_6.3V

+MVDD

DNI

+MVDD+MVDD

C1518 1uF_6.3VC1518 1uF_6.3V

C1519 1uF_6.3VC1519 1uF_6.3V

C1556 1uF_6.3VC1556 1uF_6.3V

C1555 1uF_6.3VC1555 1uF_6.3V

+MVDD +MVDD

MC1497 4.7uF_6.3VMC1497 4.7uF_6.3V

MC1506 4.7uF_6.3VMC1506 4.7uF_6.3VC1559 1uF_6.3VC1559 1uF_6.3V

A A

Overlap cap pair
foorprints (0805
with 0603)

5

C1536 1uF_6.3VC1536 1uF_6.3V

C1491 1uF_6.3VC1491 1uF_6.3V

C1502 1uF_6.3VC1502 1uF_6.3V

C1505 1uF_6.3VC1505 1uF_6.3V

C1520 1uF_6.3VC1520 1uF_6.3V

C1501 1uF_6.3VC1501 1uF_6.3V

+MVDD +MVDD +MVDD

C1531 1uF_6.3VC1531 1uF_6.3V

C1534 1uF_6.3VC1534 1uF_6.3V

DNI DNI DNI

4

C1558 1uF_6.3VC1558 1uF_6.3V

C1560 1uF_6.3VC1560 1uF_6.3V

C1557 1uF_6.3VC1557 1uF_6.3V

MC1532 4.7uF_6.3VMC1532 4.7uF_6.3V

Overlap cap pair
foorprints (0805
with 0603)

C1507 1uF_6.3VC1507 1uF_6.3V

MC1503 4.7uF_6.3VMC1503 4.7uF_6.3V

C1508 1uF_6.3VC1508 1uF_6.3V

C1492 1uF_6.3VC1492 1uF_6.3V

C1493 1uF_6.3VC1493 1uF_6.3V

C1522 1uF_6.3VC1522 1uF_6.3V

C1523 1uF_6.3VC1523 1uF_6.3V

C1509 1uF_6.3VC1509 1uF_6.3V

C1510 1uF_6.3VC1510 1uF_6.3V

C1511 1uF_6.3VC1511 1uF_6.3V

C1499 1uF_6.3VC1499 1uF_6.3V

3

+MVDD

C1554 1uF_6.3VC1554 1uF_6.3V

C1553 1uF_6.3VC1553 1uF_6.3V

C1552 1uF_6.3VC1552 1uF_6.3V

+MVDD

MC1504 4.7uF_6.3VMC1504 4.7uF_6.3V

Overlap cap pair
foorprints (0805
with 0603)

C1513 1uF_6.3VC1513 1uF_6.3V

MC1528 4.7uF_6.3VMC1528 4.7uF_6.3V

C1514 1uF_6.3VC1514 1uF_6.3V

C1526 1uF_6.3VC1526 1uF_6.3V

C1500 1uF_6.3VC1500 1uF_6.3V

C1494 1uF_6.3VC1494 1uF_6.3V

C1495 1uF_6.3VC1495 1uF_6.3V

C1496 1uF_6.3VC1496 1uF_6.3V

C1515 1uF_6.3VC1515 1uF_6.3V

C1527 1uF_6.3VC1527 1uF_6.3V

C1516 1uF_6.3VC1516 1uF_6.3V

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

2

RH RV730 DDR2 DVIII-TVO-DVII

C1549 1uF_6.3VC1549 1uF_6.3V

+MVDD

Overlap cap pair
foorprints (0805
with 0603)

C1482 1uF_6.3VC1482 1uF_6.3V

C1480 1uF_6.3VC1480 1uF_6.3V

C1479 1uF_6.3VC1479 1uF_6.3V

C1481 1uF_6.3VC1481 1uF_6.3V

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

519

of

519

of

519

1

C1483 1uF_6.3VC1483 1uF_6.3V

C1484 1uF_6.3VC1484 1uF_6.3V

C1485 1uF_6.3VC1485 1uF_6.3V

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

5

(06) RV730 GPIOs Strap CF XTAL

U1E

+3.3V

C333

C333

C334

100nF_6.3V

100nF_6.3V

SCL(17)
SDA(17)

R899

R899

5.1K

5.1K

C334
100nF_6.3V

100nF_6.3V

SCL
SDA

DDC6CLK
DDC6DATA

PWR_GOOD

GPIO_22_ROMCSb_R
GPIO_8_R

C332

C332
100nF_6.3V

100nF_6.3V

D D

DDC6CLK(17)

DDC6DATA(17)

+3.3V_BUS +1.8V

PWR_GOOD(1,14,15,16)

C C

U1E

AF23

VDDR3#1

AF24

VDDR3#2

AG23

VDDR3#3

AG24

VDDR3#4

AK26

SCL

AJ26

SDA

AJ30

DDC6CLK

AJ31

DDC6DATA

AF28

RSVD#1

AF35

RSVD#2

AG28

RSVD#3

AG36

RSVD#4

AJ27

RSVD#5

AK27

RSVD#6

AL31

RSVD#7

AN36

RSVD#8

AP37

RSVD#9

AJ21

NC#1

AK21

NC#2

AH16

NC_PWRGOOD

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

R180

R180
10K

10K

4

PART 5 OF 15

PART 5 OF 15

G

G
P

P
I

I
O

O

GPIO_17_THERMAL_INT

U2

U2

1

CE#

VCC

2

SO

HOLD#

3

WP#

SCK

GND4SI

PM25LV512A-100SCE

PM25LV512A-100SCE

GPIO_0
GPIO_1
GPIO_2

GPIO_3_SMBDATA

GPIO_4_SMBCLK

GPIO_5_AC_BATT

GPIO_6_TACH
GPIO_7_BLON

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_11
GPIO_12
GPIO_13

GPIO_14_HPD2

GPIO_15_PWRCNTL_0

GPIO_16_SSIN

GPIO_18_HPD3

GPIO_19_CTF

GPIO_20_PWRCNTL_1

GPIO_21_BB_EN

GPIO_22_ROMCSB

GPIO_23_CLKREQB

GENERICA

GENERICB
GENERICC
GENERICD

GENERICE_HPD4

GENERICF
GENERICG

HPD1

+3.3V

8
7

GPIO_10_R

6

GPIO_9_R

5

AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13

AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24

AK24

C342

C342
100nF_6.3V

100nF_6.3V

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5
GPIO_6_TACH
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
HPD2
PWRCNTL_0
GPIO_16
GPIO_17_ThermINT

GPIO_19_CTF
PWRCNTL_1

GPIO_22_ROMCSb

GENERICA

HPD1

BIOS1

BIOS1

BIOS

BIOS

113-B339XX-XXX

113-B339XX-XXX
VIDEO BIOS
FIRMWARE

RP1C33R RP1C33R

63

RP1B33R RP1B33R

72

RP1A33R RP1A33R

81

54

GPIO_8_R
GPIO_9_R
GPIO_10_R

GPIO_22_ROMCSb_R

RP1D33R RP1D33R

3

GPIO_0 (17)
GPIO_1 (17)
GPIO_2 (17)

GPIO_3_SMBDATA (1)

GPIO_4_SMBCLK (1)

GPIO_6_TACH (16,17)
GPIO_7 (17)
GPIO_8_R (17)

GPIO_9_R (17)
GPIO_10_R (17)

HPD2 (9)
PWRCNTL_0 (15)

GPIO_17_ThermINT (17)
GPIO_19_CTF (16)

PWRCNTL_1 (15)

GPIO_22_ROMCSb_R (17)

GENERICA (7,17)

HPD1 (8)

to be removed hpd3

2

R149 10KR149 10K

R152 10KR152 10K

R157 10KR157 10K

R160 10KR160 10K

R161 10KR161 10K

R164 10KR164 10K

R176 10KR176 10K

PIN BASED STRAPS

V2SYNC (7)

V2SYNC

GPIO_9_R

GPIO_0

GPIO_0 (17)

GPIO_1

GPIO_1 (17)

GPIO_2

GPIO_2 (17)

GPIO_11
GPIO_13
GPIO_12

GPIO_12

V1SYNC (7)

V1SYNC

H1SYNC (7)

H1SYNC

GPIO_8_R

GPIO_5

GPIO_16

H2SYNC (7)

H2SYNC

GPIO_7

GPIO_7 (17)

+3.3V

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

1

VIP_DEVICE_STRAP_EN
0: No slave VIP host port devices reporting presence during reset (use
for configurations without video-in)
1:VIP host port devices present (use if Theater is populated)

VGA DISABLE : 1 for disable (set to 0 for normal operation)

GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)
0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)

GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable)
0 : Default. (Driver Controlled Gen2)
1 : Strap Controlled Gen2

GPIO(11, 13,12) - CONFIG[2..0]

100 - 512Kbit M25P05A (ST)
101 - 1Mbit M25P10A (ST)

CONFIG[2]

101 - 2Mbit M25P20 (ST)
101 - 4Mbit M25P40 (ST)

CONFIG[1]

101 - 8Mbit M25P80 (ST)
100 - 512Kbit Pm25LV512 (Chingis)

CONFIG[0]

101 - 1Mbit Pm25LV010 (Chingis)

AUD[0] : AUD strap bit 0

AUD[1] : AUD strap bit 1

BIF_CLK_PM_EN
0 - Disable CLKREQ# power management capability
1 - Enable CLKREQ# power management capability

MEMORY CONFIG
[GPIO_5: GPIO_16]
Quimonda [0:0]
Hynix [0:1]
Samsung [1:0]

RESERVED :Internal use only. Other logic must not affect this signal
during RESET.

ATI Board Feature I

1 - NTSC TVO0 - PAL TVO TV OUT STANDARD

PN 2280007900G for 1Mbit (PM25LV010A-100SCE)

U1F

+1.8V

C331

C331

C335

C335

C326

1uF_6.3V

1uF_6.3V

C148

C148

1uF_6.3V

1uF_6.3V

C145

C145

1uF_6.3V

1uF_6.3V

C150

C150

1uF_6.3V

1uF_6.3V

C326
100nF_6.3V

100nF_6.3V

DVOCLK
DVPCNTL_0

DVPCNTL_1
DVPCNTL_2

DVP_MVP_CNTL_0
DVP_MVP_CNTL_1

VREFG

C149

C149

100nF_6.3V

100nF_6.3V

C146

C146

100nF_6.3V

100nF_6.3V

C151

C151

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

B B

TP84 35milTP84 35mil
TP85 35milTP85 35mil

TP86 35milTP86 35mil
TP87 35milTP87 35mil

TP88 35milTP88 35mil

+1.8V

+1.8V

B110 BLM15BD121SN1B110 BLM15BD121SN1

NS6 NS_VIANS6 NS_VIA

1 2

+1.1V

B109 BLM15BD121SN1B109 BLM15BD121SN1

+1.8V

A A

NS7 NS_VIANS7 NS_VIA

+1.1V
+VDDC

B107 BLM15BD121SN1B107 BLM15BD121SN1

+1.8V +MPV18

+DPLL_PVDD

+DPLL_VDDC

+SPV18

1 2

+SPV10

5

TP89 35milTP89 35mil

R147 221RR147 221R
R151 110RR151 110R
C328 100nF_6.3VC328 100nF_6.3V

C147

C147

10uF_X6S

10uF_X6S
GND_DPLL_PVSS

GND_SPVSS

U1F

AD12

VDDR4#1

AF11

VDDR4#2

AF12

VDDR4#3

AG11

VDDR4#4

AF13

VDDR5#1

AF15

VDDR5#2

AG13

VDDR5#3

AG15

VDDR5#4

AR1

DVPCLK

AP8

DVPCNTL_0

AW8

DVPCNTL_1

AR3

DVPCNTL_2

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AH13

VREFG

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1
U1G

U1G

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AM10

NC_SPV18

AN10

SPVSS

AN9

SPV10

H7

NC_MPV18#1

H8

NC_MPV18#2

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

PART 6 OF 15

PART 6 OF 15

PART 7 OF 15

PART 7 OF 15

P

P
L

L
L

L
S

S

X

X
T

T
A

A
L

L

4

D

D
V

V
P

P

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8

DVPDATA_9
DVPDATA_10
DVPDATA_11

DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

XTALOUT

XTALIN

CLKTESTA
CLKTESTB

AU34

AV33

AK10
AL10

DVPDATA_0

AU1

DVPDATA_1

AU3

DVPDATA_2

AW3

DVPDATA_3

AP6

DVPDATA_4

AW5

DVPDATA_5

AU5

DVPDATA_6

AR6

DVPDATA_7

AW6

DVPDATA_8

AU6

DVPDATA_9

AT7

DVPDATA_10

AV7

DVPDATA_11

AN7

DVPDATA_12

AV9

DVPDATA_13

AT9

DVPDATA_14

AR10

DVPDATA_15

AW10

DVPDATA_16

AU10

DVPDATA_17

AP10

DVPDATA_18

AV11

DVPDATA_19

AT11

DVPDATA_20

AR12

DVPDATA_21

AW12

DVPDATA_22

AU12

DVPDATA_23

AP12

XTALOUT

R86 0RR86 0R

R_RTCLK

XTALIN

R81 0RR81 0R

Place R_RTCLK close to XTAL so the
main clock line has shortest stub

CLKTESTA
CLKTESTB

TP6035mil TP6035mil
TP6135mil TP6135mil
TP6235mil TP6235mil
TP6335mil TP6335mil
TP6435mil TP6435mil
TP6535mil TP6535mil
TP6635mil TP6635mil
TP6735mil TP6735mil
TP6835mil TP6835mil
TP6935mil TP6935mil
TP7035mil TP7035mil
TP7135mil TP7135mil

TP7235mil TP7235mil
TP7335mil TP7335mil
TP7435mil TP7435mil
TP7535mil TP7535mil
TP7635mil TP7635mil
TP7735mil TP7735mil
TP7835mil TP7835mil
TP7935mil TP7935mil
TP8035mil TP8035mil
TP8135mil TP8135mil
TP8235mil TP8235mil
TP8335mil TP8335mil

XTALOUT_S

27.000MHz_10PPM

R841MR84

1M

27.000MHz_10PPM

XTALIN_S

3

C83

C83

15pF

15pF

21

Y82

Y82

C82

C82

15pF

15pF

PWR_GOOD

+1.8V

+3.3V_BUS

PWR_GOOD (1,14,15,16)

2

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

619

of

619

of

619

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

8

(07) RV730 DAC1 and DAC2/TV

+1.8V

B204 BLM15BD121SN1B204 BLM15BD121SN1

NS9 NS_VIANS9 NS_VIA

1 2

+1.8V

B205 BLM15BD121SN1B205 BLM15BD121SN1

D D

NS10 NS_VIANS10 NS_VIA

1 2

+VDD1DI

GND_AVSSQ

GND_AVSSQ

+AVDD

C210

C210

1uF_6.3V

1uF_6.3V

GND_VSS1DI

C213

C213

1uF_6.3V

1uF_6.3V

R110 499RR110 499R

C211

C211

100nF_6.3V

100nF_6.3V

C214

C214

100nF_6.3V

100nF_6.3V

RSET

C212

C212

C215

C215

7

U1H

U1H

PART 8 OF 15

PART 8 OF 15

AC33

10nF

10nF

10nF

10nF

VDD1DI

AC34

VSS1DI

AD34

AVDD

AE34

AVSSQ

AB34

RSET

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

D

D
A

A
C

C
1

1

HSYNC
VSYNC

6

R_DAC1

AD39

R

RB_DAC1

AD37

RB

G_DAC1

AE36

G

GB_DAC1

AD35

GB

B_DAC1

AF37

B

BB_DAC1

AE38

BB

H1SYNC

AC36

V1SYNC

AC38

H1SYNC(6)

V1SYNC(6)

H1SYNC

V1SYNC

R1027 37.4RR1027 37.4R

R1028 37.4RR1028 37.4R

R1029 37.4RR1029 37.4R

C2009

C2009

100nF_6.3V

100nF_6.3V

5

See BOM for qualified filters

Pseudo differential RGB should be routed from the ASIC to the display
connector without switching reference plane or running over split plane.

R1001

R1001
75R

75R

R1002

R1002
75R

75R

R1003

R1003
75R

75R

+5V

U2001A

U2001A

14

74VHC125

74VHC125

74VHC125

74VHC125

U2001B

U2001B

HSYNC_DAC1_B

VSYNC_DAC1_B

2 3

1

7

4

5 6

L1001

L1001
47nH

47nH

L1002

L1002
47nH

47nH

L1003

L1003
47nH

47nH

4

DDC4DATA(8)

DDC4CLK(8)

HSYNC_DAC1_R

10R

10R

R1010

R1010

VSYNC_DAC1_R

10R

10R

R1011

R1011

R1008

R1008

2.2K

2.2K

+5V+5V

DDC4DATA
DDC4CLK

R1005

R1005

2.2K

2.2K

3

+3.3V

R1006 33RR1006 33R
R1009 33RR1009 33R

+5V_VESA

2

A_R_DAC1_F
A_G_DAC1_F
A_B_DAC1_F

DDCDATA_DAC1_R
DDCCLK_DAC1_R
HSYNC_DAC1_R

VSYNC_DAC1_R

VSYNC_DAC1_R (8)
HSYNC_DAC1_R (8)
DDCCLK_DAC1_R (8)

DDCDATA_DAC1_R (8)
A_B_DAC1_F (8)
A_G_DAC1_F (8)
A_R_DAC1_F (8)

603

+5V_VESA

+5V_DAC1_VESA

Overlap pads

1

R10120RR1012
0R

+5V_DAC1_VESA (8)

DDC2_MONID0
DDC2_MONID2

C C

+1.8V

B201 BLM15BD121SN1B201 BLM15BD121SN1

NS11 NS_VIANS11 NS_VIA

1 2

+1.8V

B203 BLM15BD121SN1B203 BLM15BD121SN1

NS5 NS_VIANS5 NS_VIA

1 2

+3.3V

B202 BLM15BD121SN1B202 BLM15BD121SN1

B B

A A

+VDD2DI

C201

C201

C200

C200

1uF_6.3V

1uF_6.3V

GND_VSS2DI

+A2VDDQ

C207

C207

1uF_6.3V

1uF_6.3V

GND_A2VSSQ

+A2VDD

C203

C203

C204

1uF_6.3V

1uF_6.3V

GND_A2VSSQ

C204

4.7uF_6.3V

4.7uF_6.3V

8

100nF_6.3V

100nF_6.3V

C208

C208

100nF_6.3V

100nF_6.3V

C205

C205

100nF_6.3V

100nF_6.3V

C202

C202

10nF

10nF

C206

C206

10nF

10nF

R2SET

R111715R R111715R

7

U1I

U1I

PART 9 OF 15

PART 9 OF 15

AG31

VDD2DI

AG32

VSS2DI

AD33

A2VDDQ

AF33

A2VSSQ

AG33

A2VDD

AA29

R2SET

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

R_DAC2

AC30

R2

RB_DAC2

AC31

R2B

G_DAC2

AD30

G2

GB_DAC2

AD31

G2B

D

D
A

A
C

C
2

2
/

/
T

T

H2SYNC

V

V

V2SYNC

H2SYNC(6)

V2SYNC(6)

COMP

B_DAC2

AF30

B2

BB_DAC2

AF31

B2B

H2SYNC

AD29

V2SYNC

AC29

Y_DAC2

AD32

Y

C_DAC2

AC32

C

COMP_DAC2

AF32

Y_DAC2

C_DAC2

COMP_DAC2

6

R2027 37.4RR2027 37.4R

R2028 37.4RR2028 37.4R

R2029 37.4RR2029 37.4R

12 11

9 8

Place near connector
0R leaves footprint for Ferrite
Beads if req'd for EMI

R3001

R3001
75R

75R

R3002

R3002
75R

75R

R3003

R3003
75R

75R

See BOM for qualified filters

Pseudo differential RGB should be routed from the ASIC to the display
connector without switching reference plane or running over split plane.

R2001

R2001
75R

75R

402

402

R2002

R2002
75R

75R

402

R2003

R2003
75R

75R

402

HSYNC_DAC2_B

U2001D

U2001D
74VHC125

74VHC125

13
10

74VHC125

74VHC125
U2001C

U2001C

VSYNC_DAC2_B

L3001 470nH_250mAL3001 470nH_250mA

C3001

C3001
47pF_50V

47pF_50V

L3002 470nH_250mAL3002 470nH_250mA

C3002

C3002
47pF_50V

47pF_50V

L3003 470nH_250mAL3003 470nH_250mA

C3003

C3003
47pF_50V

47pF_50V

5

L2001

L2001
47nH

47nH

L2002

L2002
47nH

47nH

L2003

L2003
47nH

47nH

C3004

C3004
47pF_50V

47pF_50V

DAC2_C_F

C3005

C3005
47pF_50V

47pF_50V

DAC2_COMP_F

C3006

C3006
47pF_50V

47pF_50V

The 7-pin MiniDIN footprint allows one of the two MiniDINs:

- 7-pin Svideo/Composite MiniDIN P/N 6071001500G

- 4-pin Svideo MiniDIN P/N 6070001000G

402

402402

402402

R2010

R2010

R2011

R2011

DAC2_C_F
DAC2_COMP_F

4

DDC5DATA(9)

DDC5CLK(9)

402

10R

10R

402

10R

10R

Install for Dell

R3004 0RR3004 0R
R3005 0RR3005 0R
R3006 0RR3006 0R

DNI for Dell

R2008

R2008

2.2K

2.2K

HSYNC_DAC2_R

VSYNC_DAC2_R

GENERICA(6,17)

+3.3V

+5V +5V

R2005

R2005

2.2K

2.2K

A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F

R2006 33RR2006 33R
R2009 33RR2009 33R

402

STV/HDTV#_DET PIN6
DAC2_Y_DINDAC2_Y_FDAC2_Y_F

DAC2_C_DIN
DAC2_COMP_DIN

+3.3V

R3008

R3008
10K

10K

+5V_VESA

Install for Dell

R3009 0RR3009 0R

DDCDATA_DAC2_R
DDCCLK_DAC2_R
HSYNC_DAC2_R

VSYNC_DAC2_R

VSYNC_DAC2_R (9)
HSYNC_DAC2_R (9)
DDCCLK_DAC2_R (9)

DDCDATA_DAC2_R (9)
A_B_DAC2_F (9)
A_G_DAC2_F (9)
A_R_DAC2_F (9)

R30070RR3007
0R

DNI for Dell

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

3

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

2

+5V_VESA

R20130RR2013
0R

+5V_DAC2_VESA

603

+5V_DAC2_VESA (9)

Overlap pads

DDC2_MONID0
DDC2_MONID2

Install for Dell only when it's needed for EMI

TV Out

J3001

J3001

6

HDTV_OUT_DET#

3

Y-OUT

4

C-OUT

7

Comp_out

CompIn

5

SYNC

1

GND

2

GND#2

8

Rpin5

CASE

9

CASE#9

10

CASE#10

Conn_DIN_Mini_Circular_7_Pin_with_O_Ring

Conn_DIN_Mini_Circular_7_Pin_with_O_Ring

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

719

of

719

of

719

Doc No.

Doc No.

Doc No.

1

102-B66801-00

102-B66801-00

102-B66801-00

RevDate:

RevDate:

RevDate:

07

07

07

www.vinafix.vn

8

7

6

5

4

3

2

1

(08) RV730 TMDS A&B

U1J

U1J

AU28

AV27

AV29

AR28

AP31
AP32

AN33
AP33

AN24
AP24

AP25
AP26

AW28

AN27
AP28

AP27
AW24
AW26

AP30

AN29

AP29
AW30
AW32

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

ABTX5P
ABTX5M

ABTX4P
ABTX4M

ABTX3P
ABTX3M

DPA_PVDD

DPA_PVSS

DPB_PVDD

DPB_PVSS

DPA_VDD10#1
DPA_VDD10#2

DPB_VDD10#1
DPB_VDD10#2

NC_DPA_VDD18#1
NC_DPA_VDD18#2

NC_DPB_VDD18#1
NC_DPB_VDD18#2

DPAB_CALR

DPA_VSSR#1
DPA_VSSR#3
DPA_VSSR#2
DPA_VSSR#4
DPA_VSSR#5
DPB_VSSR#3
DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#4
DPB_VSSR#5

PART 10 OF 15

PART 10 OF 15

T

T
M

M
D

D
P

P

A

A
/

/
B

B

ABTX5P
ABTX5M

ABTX4P
ABTX4M

ABTX3P
ABTX3M

TX2P_DPA0P
TX2M_DPA0N
TX1P_DPA1P
TX1M_DPA1N
TX0P_DPA2P

TX0M_DPA2N
TXCAP_DPA3P
TXCAM_DPA3N

AUX1P
AUX1N

DDC1CLK

DDC1DATA

TX5P_DPB0P
TX5M_DPB0N
TX4P_DPB1P
TX4M_DPB1N
TX3P_DPB2P
TX3M_DPB2N

TXCBP_DPB3P
TXCBM_DPB3N

DDCCLK_AUX4P

DDCDATA_AUX4N

AT27
AR26
AU26
AV25
AT25
AR24
AU24
AV23

AM27
AL27

AM26
AN26

AT33
AU32
AR32
AT31
AV31
AU30
AR30
AT29

AL29
AM29

DPA_TX2P
DPA_TX2N
DPA_TX1P

DPA_TX0P
DPA_TX0N
DPA_TXCAP
DPA_TXCAN

DPB_TX5P
DPB_TX5N
DPB_TX4P
DPB_TX4N

DPB_TX3N

DDC4CLK
DDC4DATA

C1120 100nF_6.3VC1120 100nF_6.3V

C1121 100nF_6.3VC1121 100nF_6.3V

C1122 100nF_6.3VC1122 100nF_6.3V

C1123 100nF_6.3VC1123 100nF_6.3V

C1124 100nF_6.3VC1124 100nF_6.3V

C1125 100nF_6.3VC1125 100nF_6.3V

C1126 100nF_6.3VC1126 100nF_6.3V

C1127 100nF_6.3VC1127 100nF_6.3V

C1132 100nF_6.3VC1132 100nF_6.3V

C1133 100nF_6.3VC1133 100nF_6.3V

C1134 100nF_6.3VC1134 100nF_6.3V

C1135 100nF_6.3VC1135 100nF_6.3V

C1136 100nF_6.3VC1136 100nF_6.3V

C1137 100nF_6.3VC1137 100nF_6.3V

DDC4CLK (7)
DDC4DATA (7)

R1120 499RR1120 499R

R1122 499RR1122 499RC106

R1124 499RR1124 499R

R1126 499RR1126 499R

R1132 499RR1132 499R

R1134 499RR1134 499R

R1136 499RR1136 499R

ALL_RAILS_UP(9,15)

R1121 499RR1121 499R

R1123 499RR1123 499R

R1125 499RR1125 499R

R1127 499RR1127 499R

R1133 499RR1133 499R

R1135 499RR1135 499R

R1137 499RR1137 499R

DPAB_GND

ABTX2P
ABTX2M
ABTX1P
ABTX1MDPA_TX1N
ABTX0P
ABTX0M
ABTXCP
ABTXCM

ABTX5P
ABTX5M
ABTX4P
ABTX4M
ABTX3PDPB_TX3P
ABTX3M

32

Q1110

Q1110
SI2304DS

SI2304DS

1

HPD1(6)

Q1021

Q1021

MMBT3904

MMBT3904

+5V_DAC1_VESA(7)

DDCCLK_DAC1_R(7)

DDCDATA_DAC1_R(7)

VSYNC_DAC1_R(7)

A_R_DAC1_F(7)
A_G_DAC1_F(7)
A_B_DAC1_F(7)
HSYNC_DAC1_R(7)

+3.3V

1

2 3

R1023

R1023
10K

10K

R1022 10KR1022 10K

+5V_DAC1_VESA

ABTX2M
ABTX2P

ABTX4M
ABTX4P
DDCCLK_DAC2_R
DDCDATA_DAC2_R
VSYNC_DAC2_R
ABTX1M
ABTX1P

ABTX3M
ABTX3P

ABTX0M
ABTX0P

ABTX5M
ABTX5P

ABTXCP
ABTXCM

A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F
HSYNC_DAC2_R

HPD_DVIAB

J1001

J1001

25

CASE

1

TMDS Data2-

2

TMDS Data2+

3

TMDS Data2/4 Shield

4

TMDS Data4-

5

TMDS Data4+

6

DDC Clock

7

DDC Data

8

Analog VSYNC

9

TMDS Data1-

10

TMDS Data1+

11

TMDS Data1/3 Shield

12

TMDS Data3-

13

TMDS Data3+

14

+5V Power

15

GND (for +5V)

16

Hot Plug Detect

17

TMDS Data0-

18

TMDS Data0+

19

TMDS Data0/5 Shield

20

TMDS Data5-

21

TMDS Data5+

22

TMDS Clock Shield

23

TMDS Clock+

24

TMDS Clock-

C1

Analog Red

C2

Analog Green

C3

Analog Blue

C4

Analog HYNC

C5

Analog GND

C6

Analog GND#C6

26

CASE#26

27

CASE#27

28

CASE#28

29

CASE#29

30

CASE#30

DVI_CONNECTOR

DVI_CONNECTOR

C104

C104

100nF

100nF

GND_DPABVSS

C110

C110

100nF

100nF

R130150R R130150R

+DPAB_PVDD

+DPAB_VDD10

+DPAB_VDD18

DPAB_CALR

+1.8V

B102 BLM15BD121SN1B102 BLM15BD121SN1

C103

C103

C102

C102

C106

1uF_6.3V

1uF_6.3V

NS1NS_VIA NS1NS_VIA

+1.1V

B104 BLM15BD121SN1B104 BLM15BD121SN1

+1.8V

1 2

C112

C112

1uF_6.3V

1uF_6.3V

D D

C C

4.7uF_6.3V

4.7uF_6.3V

C108

C108

4.7uF_6.3V

4.7uF_6.3V

1uF_6.3V

1uF_6.3V

C109

C109

1uF_6.3V

1uF_6.3V

ESD protection dioes

B B

ABTX2P
ABTX2M

ABTX1P
ABTX1M

ABTX0P
ABTX0M

ABTXCP
ABTXCM

ABTX2P
ABTX2M

ABTX1P
ABTX1M

ABTX0P
ABTX0M

ABTXCP
ABTXCM

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

8

7

6

5

4

3

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

819

of

819

of

819

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

8

7

6

5

4

3

2

1

(09) RV730 TMDS C&D

U1K

+1.8V

BLM15BD121SN1

D D

C C

B B

BLM15BD121SN1

NS3 NS_VIANS3 NS_VIA

1 2

BLM15BD121SN1

BLM15BD121SN1

+1.1V

B124

B124

+1.8V

B122

B122

C122

C122

4.7uF_6.3V

4.7uF_6.3V

C128

C128

4.7uF_6.3V

4.7uF_6.3V

C123

C123

1uF_6.3V

1uF_6.3V

C129

C129

1uF_6.3V

1uF_6.3V

C124

C124

100nF

100nF

GND_DPCDVSS

C130

C130

100nF

100nF

R109150R R109150R

+DPCD_PVDD

+DPCD_VDD10

+DPCD_VDD18

DPCD_CALR

ESD protection dioes

CDTX2P
CDTX2M

CDTX1P CDTX1P
CDTX1M

CDTX0P
CDTX0M

CDTXCP
CDTXCM

A A

CDTX2P
CDTX2M

CDTX1M

CDTX0P
CDTX0M

CDTXCP
CDTXCM

CDTX5P
CDTX5M

CDTX4P
CDTX4M

CDTX3P
CDTX3M

U1K

AU18

DPC_PVDD

AV17

DPC_PVSS

AV19

DPD_PVDD

AR18

DPD_PVSS

AP13

DPC_VDD10#1

AT13

DPC_VDD10#2

AP14

DPD_VDD10#1

AP15

DPD_VDD10#2

AP20

NC_DPC_VDD18#1

AP21

NC_DPC_VDD18#2

AP22

NC_DPD_VDD18#1

AP23

NC_DPD_VDD18#2

AW18

DPCD_CALR

AN17

DPC_VSSR#1

AP16

DPC_VSSR#2

AP17

DPC_VSSR#3

AW14

DPC_VSSR#4

AW16

DPC_VSSR#5

AN19

DPD_VSSR#1

AP18

DPD_VSSR#2

AP19

DPD_VSSR#3

AW20

DPD_VSSR#4

AW22

DPD_VSSR#5

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

PART 11 OF 15

PART 11 OF 15

T

T
M

M
D

D
P

P

C

C
/

/
D

D

CDTX5P
CDTX5M

CDTX4P
CDTX4M

CDTX3P
CDTX3M

TX2P_DPC0P

TX2M_DPC0N

TX1P_DPC1P

TX1M_DPC1N

TX0P_DPC2P

TX0M_DPC2N
TXCCP_DPC3P
TXCCM_DPC3N

AUX2P

AUX2N

DDC2CLK

DDC2DATA

TX5P_DPD0P

TX5M_DPD0N

TX4P_DPD1P

TX4M_DPD1N

TX3P_DPD2P

TX3M_DPD2N
TXCDP_DPD3P
TXCDM_DPD3N

DDCCLK_AUX5P

DDCDATA_AUX5N

AT17
AR16
AU16
AV15
AT15
AR14
AU14
AV13

AN20
AM20

AM19
AL19

AT23
AR22
AU22
AV21
AT21
AR20
AU20
AT19

AN21
AM21

DPC_TX2P
DPC_TX2N
DPC_TX1P
DPC_TX1N

DPC_TX0N
DPC_TXCCP
DPC_TXCCN

DPD_TX5P
DPD_TX5N
DPD_TX4P
DPD_TX4N
DPD_TX3P
DPD_TX3N

DDCAUX5P
DDCAUX5N

C2120 100nF_6.3VC2120 100nF_6.3V

C2121 100nF_6.3VC2121 100nF_6.3V

C2122 100nF_6.3VC2122 100nF_6.3V

C2123 100nF_6.3VC2123 100nF_6.3V

C2124 100nF_6.3VC2124 100nF_6.3V

C2125 100nF_6.3VC2125 100nF_6.3V

C2126 100nF_6.3VC2126 100nF_6.3V

C2127 100nF_6.3VC2127 100nF_6.3V

C2130 100nF_6.3VC2130 100nF_6.3V

C2131 100nF_6.3VC2131 100nF_6.3V

C2132 100nF_6.3VC2132 100nF_6.3V

C2133 100nF_6.3VC2133 100nF_6.3V

C2134 100nF_6.3VC2134 100nF_6.3V

C2135 100nF_6.3VC2135 100nF_6.3V

DDC5CLK (7)
DDC5DATA (7)

R2120 499RR2120 499R

R2124 499RR2124 499R

R2126 499RR2126 499R

R2132 499RR2132 499R

R2134 499RR2134 499R

R2136 499RR2136 499R

ALL_RAILS_UP(8,15)

R2121 499RR2121 499RR2122 499RR2122 499R

R2123 499RR2123 499R

R2125 499RR2125 499R

R2127 499RR2127 499R

R2133 499RR2133 499R

R2135 499RR2135 499R

R2137 499RR2137 499R

DPCD_GND

CDTX2P
CDTX2M
CDTX1P
CDTX1M
CDTX0PDPC_TX0P
CDTX0M
CDTXCP
CDTXCM

CDTX5P
CDTX5M
CDTX4P
CDTX4M
CDTX3P
CDTX3M

32

Q2110

Q2110
SI2304DS

SI2304DS

1

HPD2(6)

Q7002

Q7002

MMBT3904

MMBT3904

+3.3V

+5V_DAC2_VESA(7)

DDCCLK_DAC2_R(7)

DDCDATA_DAC2_R(7)

VSYNC_DAC2_R(7)

A_R_DAC2_F(7)
A_G_DAC2_F(7)
A_B_DAC2_F(7)
HSYNC_DAC2_R(7)

2 3

R7006

R7006
10K

10K

1

R7003 10KR7003 10K

+5V_DAC2_VESA

CDTX2M
CDTX2P

CDTX4M
CDTX4P
DDCCLK_DAC2_R
DDCDATA_DAC2_R
VSYNC_DAC2_R
CDTX1M
CDTX1P

CDTX3M
CDTX3P

CDTX0M
CDTX0P

CDTX5M
CDTX5P

CDTXCP
CDTXCM

A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F
HSYNC_DAC2_R

HPD_DVICD

J2001

J2001

25

CASE

1

TMDS Data2-

2

TMDS Data2+

3

TMDS Data2/4 Shield

4

TMDS Data4-

5

TMDS Data4+

6

DDC Clock

7

DDC Data

8

Analog VSYNC

9

TMDS Data1-

10

TMDS Data1+

11

TMDS Data1/3 Shield

12

TMDS Data3-

13

TMDS Data3+

14

+5V Power

15

GND (for +5V)

16

Hot Plug Detect

17

TMDS Data0-

18

TMDS Data0+

19

TMDS Data0/5 Shield

20

TMDS Data5-

21

TMDS Data5+

22

TMDS Clock Shield

23

TMDS Clock+

24

TMDS Clock-

C1

Analog Red

C2

Analog Green

C3

Analog Blue

C4

Analog HYNC

C5

Analog GND

C6

Analog GND#C6

26

CASE#26

27

CASE#27

28

CASE#28

29

CASE#29

30

CASE#30

DVI_CONNECTOR

DVI_CONNECTOR

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

8

7

6

5

4

3

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

919

of

919

of

919

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

8

7

6

5

4

3

2

1

(10) No Connect E&F

D D

U1L

U1L

AM37

AN38

AL38

C C

AM35

AM33

AL33

AK34
AK33

AJ34

AH34

DPE_PVDD

DPE_PVSS

NC_DPF_PVDD

NC_DPF_PVSS

DPE_VDD10#2
DPE_VDD10#1

DPF_VDD10#2
DPF_VDD10#1

DPE_VDD18#2
DPE_VDD18#1

PART 12 OF 15

PART 12 OF 15

L

L
V

V
T

T
M

M
D

D
P

P

E

E
/

/
F

F

T2X2P_DPE0P
T2X2M_DPE0N
T2X1P_DPE1P
T2X1M_DPE1N

T2X0P_DPE2P

T2X0M_DPE2N

T2XCEP_DPE3P

T2XCEM_DPE3N

DDCCLK_AUX3P

DDCDATA_AUX3N

AP35
AR35
AR37
AU39
AW37
AU35
AP34
AR34

AL30
AM30

AG38

AG34

DPF_VDD18#2

AF34

DPF_VDD18#1

DPEF_CALR

R133150R R133150R

B B

A A

8

7

AM39

DPEF_CALR

AN34

DPE_VSSR#1

AP39

DPE_VSSR#2

AR39

DPE_VSSR#3

AU37

DPE_VSSR#4

AW35

DPE_VSSR#5

AF39

DPF_VSSR#1

AL34

DPF_VSSR#4

AH39

DPF_VSSR#2

AM34

DPF_VSSR#5

AK39

DPF_VSSR#3

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

6

T2X5P_DPF0P

T2X5M_DPF0N

T2X4P_DPF1P

T2X4M_DPF1N

T2X3P_DPF2P

T2X3M_DPF2N
T2XCFM_DPF3N
T2XCFP_DPF3P

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

5

AH37
AH35
AJ36
AJ38
AK37
AL36
AK35

AK30
AK29

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

4

3

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

10 19

of

10 19

of

10 19

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

5

(11) RV730 Power & GND

4

3

2

1

C277

C277
1uF_6.3V

1uF_6.3V

C170

C170
1uF_6.3V

1uF_6.3V

C180

C180
1uF_6.3V

1uF_6.3V

C941

C941
1uF_6.3V

1uF_6.3V

MC194

MC194

4.7uF_6.3V

4.7uF_6.3V

+VDDC

C942

C942
1uF_6.3V

1uF_6.3V

U1N

U1N

B31

GND#91

B33

GND#92

B7

GND#93

B9

GND#94

C1

GND#95

C39

GND#96

E35

GND#97

E5

GND#98

F11

GND#99

F13

GND#100

F15

GND#101

F17

GND#102

F19

GND#103

F21

GND#104

F23

GND#105

F25

GND#106

F27

GND#107

F29

GND#108

F31

GND#109

F33

GND#110

F7

GND#111

F9

GND#112

G2

GND#113

G6

GND#114

H9

GND#115

J2

GND#116

J27

GND#117

J6

GND#118

J8

GND#119

K14

GND#120

K7

GND#121

L11

GND#122

L17

GND#123

L2

GND#124

L22

GND#125

L24

GND#126

L6

GND#127

M17

GND#128

M22

GND#129

M24

GND#130

N16

GND#131

N18

GND#132

N2

GND#133

N21

GND#134

N23

GND#135

N26

GND#136

N6

GND#137

R15

GND#138

R17

GND#139

R2

GND#140

R20

GND#141

R22

GND#142

R24

GND#143

R27

GND#144

R6

GND#145

T11

GND#146

T13

GND#147

T16

GND#148

T18

GND#149

T21

GND#150

T23

GND#151

T26

GND#152

U13

GND#153

U15

GND#154

U17

GND#155

U2

GND#156

U20

GND#157

U22

GND#158

U24

GND#159

U27

GND#160

U6

GND#161

V11

GND#162

V13

GND#163

V16

GND#164

V18

GND#165

V21

GND#166

V23

GND#167

V26

GND#168

W2

GND#169

W6

GND#170

Y15

GND#171

Y17

GND#172

Y20

GND#173

Y22

GND#174

Y24

GND#175

Y27

GND#176

A39

VSS_MECH#1

AW1

VSS_MECH#2

AW39

VSS_MECH#3

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

PART 14 OF 15

PART 14 OF 15

G

G
N

N
D

D

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8

GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AH29
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29

Swap With C1225, C1226, C1227, C1228, C1229,
C1230, C1231, C1232, C1233, C1272, C1273, C1274
refdes locations

C2400

C2400

C2411

C2409

C2409

C286

C286

100nF_6.3V

100nF_6.3V

100nF_6.3V

C282

C282
1uF_6.3V

1uF_6.3V

C2408

C2408
1uF_6.3V

1uF_6.3V

100nF_6.3V

C2401

C2401
1uF_6.3V

1uF_6.3V

C283

C283
1uF_6.3V

1uF_6.3V

D D

100nF_6.3V

100nF_6.3V

C284

C284
1uF_6.3V

1uF_6.3V

C2410

C2410
1uF_6.3V

1uF_6.3V

C2411
100nF_6.3V

100nF_6.3V

C2403

C2403
1uF_6.3V

1uF_6.3V

C285

C285
1uF_6.3V

1uF_6.3V

C2254

C2254
1uF_6.3V

1uF_6.3V

C2402

C2402
100nF_6.3V

100nF_6.3V

C278

C278
1uF_6.3V

1uF_6.3V

C2404

C2404
1uF_6.3V

1uF_6.3V

C2267

C2267
1uF_6.3V

1uF_6.3V

C279

C279
1uF_6.3V

1uF_6.3V

C2405

C2405
1uF_6.3V

1uF_6.3V

C2412

C2412
1uF_6.3V

1uF_6.3V

C280

C280
1uF_6.3V

1uF_6.3V

C288

C288
1uF_6.3V

1uF_6.3V

C2406

C2406
1uF_6.3V

1uF_6.3V

C2413

C2413
1uF_6.3V

1uF_6.3V

C281

C281
1uF_6.3V

1uF_6.3V

C289

C289
1uF_6.3V

1uF_6.3V

C2407

C2407
1uF_6.3V

1uF_6.3V

C2414

C2414
1uF_6.3V

1uF_6.3V

+MVDD

Overlap cap pair foorprints (0805 with 0603)

C2418

C2421

C2421

C2420

C2420

4.7uF_6.3V

4.7uF_6.3V

C C

B B

4.7uF_6.3V

4.7uF_6.3V

C2422

C2422

4.7uF_6.3V

4.7uF_6.3V

+1.8V

+VDDC

C2416

C2416

C2423

C2423

4.7uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

+MVDD

NS120 NS_VIANS120 NS_VIA

+MVDD

NS121 NS_VIANS121 NS_VIA

B112 BLM15BD121SN1B112 BLM15BD121SN1

B77 220R_2AB77 220R_2A

Overlap footprints

C2418

C2417

C2417

4.7uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

B120 BLM15BD121SN1B120 BLM15BD121SN1

1 2

B121 BLM15BD121SN1B121 BLM15BD121SN1

1 2

C189

C189

C188

1uF_6.3V

1uF_6.3V

10uF_X6S

10uF_X6S

C188

1uF_6.3V

1uF_6.3V

C77

C77

C2419

C2419

4.7uF_6.3V

4.7uF_6.3V

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C187

C187

C75

C75

+VDDRHA

+VDDRHB

+VDD_CT

100nF_6.3V

100nF_6.3V

+VDDCI

100nF_6.3V

100nF_6.3V

C120

C120

1uF_6.3V

1uF_6.3V

GND_VSSRHA

C121

C121

1uF_6.3V

1uF_6.3V

GND_VSSRHB

C186

C186

C74

C74

U1M

U1M

PART 13 OF 15

PART 13 OF 15

AC7

VDDR1#1

AD11

VDDR1#2

AF7

VDDR1#3

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

VDDR1#15

J7

VDDR1#16

J9

VDDR1#17

K11

VDDR1#18

K13

VDDR1#19

K8

VDDR1#20

L12

VDDR1#21

L16

VDDR1#22

L21

VDDR1#23

L23

VDDR1#24

L26

VDDR1#25

L7

VDDR1#26

M11

VDDR1#27

N11

VDDR1#28

P7

VDDR1#29

R11

VDDR1#30

U11

VDDR1#31

U7

VDDR1#32

Y11

VDDR1#33

Y7

VDDR1#34

M20

VDDRHA

M21

VSSRHA

V12

VDDRHB

U12

VSSRHB

AF26

VDD_CT#1

AF27

VDD_CT#2

AG26

VDD_CT#3

AG27

VDD_CT#4

M15

VDDCI#1

N13

VDDCI#2

R12

VDDCI#3

T12

VDDCI#4

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

AA13

VDDC#1

AA15

VDDC#2

AA17

VDDC#3

AA20

VDDC#4

AA22

VDDC#5

AA24

VDDC#6

AA27

VDDC#7

AB13

VDDC#8

AB16

VDDC#9

AB18

VDDC#10

AB21

VDDC#11

AB23

VDDC#12

AB26

VDDC#13

AB28

VDDC#14

AC12

VDDC#15

AC15

VDDC#16

AC17

VDDC#17

AC20

VDDC#18

AC22

VDDC#19

AC24

VDDC#20

AC27

VDDC#21

AD13

VDDC#22

AD16

VDDC#23

AD18

VDDC#24

AD21

VDDC#25

AD23

VDDC#26

AD26

VDDC#27

AF17

VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDC#59
VDDC#60
VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67
VDDC#68
VDDC#69
VDDC#70
VDDC#71
VDDC#72
VDDC#73
VDDC#74
VDDC#75
VDDC#76

AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M16
M18
M23
M26
N15
N17
N20
N22
N24
N27
R13
R16
R18
R21
R23
R26
T15
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V15
V17
V20
V22
V24
V27
Y13
Y16
Y18
Y21
Y23
Y26
Y28

P

P
O

O
W

W
E

E
R

R

C943

C943
1uF_6.3V

1uF_6.3V

C161

C161
1uF_6.3V

1uF_6.3V

C171

C171
1uF_6.3V

1uF_6.3V

C160

C160
1uF_6.3V

1uF_6.3V

Overlap cap pair foorprints (0805 with 0603)

C269

C269
1uF_6.3V

1uF_6.3V

C162

C162
1uF_6.3V

1uF_6.3V

C172

C172
1uF_6.3V

1uF_6.3V

C184

C184
1uF_6.3V

1uF_6.3V

MC181

MC181

4.7uF_6.3V

4.7uF_6.3V

C270

C270
1uF_6.3V

1uF_6.3V

C163

C163
1uF_6.3V

1uF_6.3V

C173

C173
1uF_6.3V

1uF_6.3V

C185

C185
1uF_6.3V

1uF_6.3V

MC182

MC182

4.7uF_6.3V

4.7uF_6.3V

C271

C271
1uF_6.3V

1uF_6.3V

C164

C164
1uF_6.3V

1uF_6.3V

C174

C174
1uF_6.3V

1uF_6.3V

C190

C190
1uF_6.3V

1uF_6.3V

MC183

MC183

4.7uF_6.3V

4.7uF_6.3V

C272

C272
1uF_6.3V

1uF_6.3V

C165

C165
1uF_6.3V

1uF_6.3V

C175

C175
1uF_6.3V

1uF_6.3V

C944

C944
1uF_6.3V

1uF_6.3V

C273

C273
1uF_6.3V

1uF_6.3V

C166

C166
1uF_6.3V

1uF_6.3V

C176

C176
1uF_6.3V

1uF_6.3V

C945

C945
1uF_6.3V

1uF_6.3V

MC191

MC191

4.7uF_6.3V

4.7uF_6.3V

C274

C274
1uF_6.3V

1uF_6.3V

C167

C167
1uF_6.3V

1uF_6.3V

C177

C177
1uF_6.3V

1uF_6.3V

C946

C946
1uF_6.3V

1uF_6.3V

MC192

MC192

4.7uF_6.3V

4.7uF_6.3V

C275

C275
1uF_6.3V

1uF_6.3V

C168

C168
1uF_6.3V

1uF_6.3V

C178

C178
1uF_6.3V

1uF_6.3V

C947

C947
1uF_6.3V

1uF_6.3V

C276

C276
1uF_6.3V

1uF_6.3V

C169

C169
1uF_6.3V

1uF_6.3V

C179

C179
1uF_6.3V

1uF_6.3V

C948

C948
1uF_6.3V

1uF_6.3V

MC193

MC193

4.7uF_6.3V

4.7uF_6.3V

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

5

4

3

2

RH RV730 DDR2 DVIII-TVO-DVII

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

11 19

of

11 19

of

11 19

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

8

7

6

5

4

3

2

1

(12) VDDC

+12V_BUS

C695

C632

C632
10UF_16V

10UF_16V

12061206

C695

100uF

100uF
SM 6.3mm Dia

Mirrored on PCB

+VDDC_Source

MC626

MC626
470UF_16V

12061206

470UF_16V

TH 8mm Dia

SM 8mm Dia

Bulk Cap

Overlap

MC623

MC623
470UF_16V

470UF_16V

TH 8mm Dia

Bulk Cap

SM 8mm Dia

Overlap

L622

L622

IND_0.47uH_7A

IND_0.47uH_7A

D D

C633

C633

150nF_16V

150nF_16V

603

805

Mirrored on PCB

805

Overlap

C631

C631
10UF_16V

10UF_16V

Mirrored on PCB

C644

C644
10UF_16V

10UF_16V

12061206

C630

C630
10UF_16V

10UF_16V

Mirrored on PCB

R6230RR623
0R

402

402

+PW_VDDC_HGDR1

+PW_VDDC_HGDR2

+PW_VDDC_LGDR1

+PW_VDDC_LGDR2

5

Overlap

TH

L601

L601

TH

.47UH

.47UH

Rs

1210
1%

402

Cs

X7R
25V

Place Rs and Cs across QL

MULTI FOOTPRINT

2

MQ602

MQ602

IPD135N03L G

IPD135N03L G

3

RC snubber values shown
are for reference only,
tuning is required

VDDC_FB(15,17)

TO252 DPAK PKG

1

+PW_VDDC_M

VDDC_FB

2

MQ603

MQ603

IPD040N03L G

IPD040N03L G

3

3

Place R1 and R4 close to PWM
and routed with separate 20mil
trace to the ASIC

0.8V Vref

R4 = (R1 x 0.8V) / (Vout1 - 0.8V)

MULTI FOOTPRINT

SSO-8 PKG

+PW_VDDC_HGDR1 +PW_VDDC_LGDR2

+VDDC_Source

+PW_VDDC_HGDR2 +PW_VDDC_LGDR1

+VDDC_Source

1

4

+VDDC

12

NS600

NS600
NS_VIA

NS_VIA

Sense Point

VDDC_FB_TRACE

R6590RR659

0R

603

Reserve for
Loop Measurement

VDDC_SV

C613

C613

2.7nF_50V_5%

2.7nF_50V_5%

Rt2

402

16V

10%

X7R

RFB1
R611

R611
10K

10K

R6131KR613

402

1K

402

1%

5%

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

+VDDC

***

C641

C641
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

+VDDC

C646

C646
10uf

10uf

1206 6.3V

1206 6.3V

+VDDC

C627

C627
100nF

100nF

402 402 603

Sheet

Sheet

Sheet

2

Input Cap

***

C642

C642
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

C647

C647

C648

Y5V

10uf

10uf

1206 6.3V

C628

C628
15nF

15nF

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

of

12 19

of

12 19

of

12 19

C648
10uf

10uf

1206 6.3V

C635

C635
390pF

390pF

Y5V

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

C649

C649

Y5V

10uf

10uf

1206 6.3V

Doc No.

Doc No.

Doc No.

1

***

***

8 x 8 mm, TH

Y5V

1206

RevDate:

RevDate:

RevDate:

102-B66801-00

102-B66801-00

102-B66801-00

Y5V

07

07

07

+PW_VDDC_HGD

+PW_VDDC_M

+PW_VDDC_LGD

R622 0RR622 0R

603

603

EN

BOOT

FB

UGATE

VCC

PHASE

GND

LGATE

GND1

GND4

GND210GND3

+VDDC_B

1

+PW_VDDC_HGD

2

+PW_VDDC_M

8

+PW_VDDC_LGD

4
12

11

R615

R615

42.2K

42.2K

place R615
close to IC pin4

402

U603

EN1(15)

C C

B B

VDDC_COMP
VDDC_FB

+VDD_VCC

C603

C603

0.22uF

0.22uF

U603

7
6
5
3
9

uP6101BU8-A

uP6101BU8-A

SO-8 PKG
w/ Bottom Thermal Pad

COMPENSATION CIRCUIT

FILTERED SMPS VCC

+VDD_VCC

7

+12V_BUS

R607

R607

2.2R

2.2R

C607

C607
100nF

100nF

603
X7R
5%

402

C612

C612
47pF_50V

47pF_50V

603

50V
5%

NPOX7R

R6090RR609
0R

share pad of R1314,R1309

8

VDDC_COMP

402

10V

X5R

10%

VDDC_FB

C611

C611
33nF_16V

33nF_16V

10V

402

A A

R612

R612
12K

12K

402
1%

10%

BOOT CIRCUIT

C605

C605
100nF

100nF

603 X7R

16V

5%

+12V_BUS

+VDDC_B

+PW_VDDC_M

6

www.vinafix.vn

8

(13) MVDD

7

6

5

4

3

2

1

+VDDC_Source

+MVDDC_S

D D

MULTI FOOTPRINT SSO8 PKG

QH

+PW_MVDDC_HGD

EN

BOOT

FB

UGATE

VCC

PHASE

GND

LGATE

GND1

GND4

GND210GND3

+MVDDC_B
1
2

+PW_MVDDC_M

8

+PW_MVDDC_LGD

4
12

11

+PW_MVDDC_M

402

+PW_MVDDC_LGD

U703

MVDD_EN(15,16)

C C

MVDDC_COMP

MVDDC_FB +PW_MVDDC_HGD

+MVDD_VCC

C703

C703

0.22uF

0.22uF

U703

7
6
5
3
9

uP6101BU8-A

uP6101BU8-A

place R1315 close to IC pin4

R721 0RR721 0R

402

603

R7220RR722
0R

+PW_MVDDC_HGDR

+PW_MVDDC_LGDR

Q702

Q702

QL

Thermal

Thermal

4 5
3
2
1

BSC120N03LSG

BSC120N03LSG

Pad

Pad

9

6
7
8

MVDDC_FB(15,17)

C715

C715

C716

C716

10UF

10UF

10UF

10UF

12061206 805

Mirrored on PCB

PL701 2.18UHPL701 2.18UH

1 2

R719

R719
33MOHM

33MOHM

Rs

1210
1%

C708

C708
10nF_25V

10nF_25V

402

Cs

X7R
25V

Place Rs and Cs across QL

RC snubber values shown
are for reference only,
tuning is required

MVDDC_FB

C717

C717

4.7uF_16V

4.7uF_16V

Mirrored on PCB

Overlap

C719

C719

4.7uF_16V

4.7uF_16V

805

0.8V Ref

R4 = (R1 x 0.8V) / (Vout1 - 0.8V)

12

NS700

NS700
NS_VIA

NS_VIA

Sense Point

MVDD_FB_TRACE

R7160RR716
0R

603

Reserve for
Loop Measurement

MVDD_SV

RFB1
R711

R711
10K

10K

402
1%

C713

C713

3.9nF

3.9nF

402
10%

R7131KR713
1K

402
5%

R7240RR724
0R

C718

C718
150nF_16V

150nF_16V

603

16V
X7R

Overlap

TH 10mm Dia SM 10mm Dia

Overlap

C731

C731
470uF_25V

470uF_25V

C726

C726
820uF_2.5V

820uF_2.5V

10 mm, TH 6.3V

8 x 8 mm, TH

Over Lap

Y5V

1206 6.3V

1206

+MVDD

Y5V

+MVDDC_S

9

6
7
8

MULTI FOOTPRINT SO-8 PKG

B B

+PW_MVDDC_HGDR

MQ701

MQ701

Thermal

Thermal

Pad

Pad

4 5
3
2
1

BSO119N03S

BSO119N03S

+PW_MVDDC_LGDR

+PW_MVDDC_M

COMPENSATION CIRCUIT

FILTERED SMPS VCC BOOT CIRCUIT

+12V_BUS

A A

33nF_16V

33nF_16V

402

10V

X7R

10%

R712

R712

30.1K

30.1K

402
1%

10pF_50V

10pF_50V

50V

603

5%

NPO

R7090RR709
0R

8

402
X5R

MVDDC_FB

10V
10%

+MVDD_VCC

+12V_BUS

603
X7R

C707

C707

5%

100nF

100nF

7

C705

C705
100nF

100nF

603 X7R
5%

6

+MVDDC_B

16V

+PW_MVDDC_M

5

4

3

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

13 19

of

13 19

of

13 19

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

402

MVDDC_COMP

C712

C712

C711

C711

www.vinafix.vn

8

(14) Linear Regulators

D D

7

6

5

4

3

2

1

Regulators for +5V, +5V_VESA and +5V_VESA2

+12V_BUS

F3

F3

1206

nanoSMDC020F

nanoSMDC020F

1/4W

5%

+5V_VESA

Overlap footprints

U810

U810

LDO #1:
PCB: 50 to 70mm sq. copper area for cooling

+3.3V_BUS

1

VIN

5

NC

8

NC#8

C810

C810
100nF

100nF

0603

Iout = 1.0A (TBV) RMS MAXVout = +1.8V +/- 2%Vin = 3.0V to 3.6V MAX

16V

ADJ4VOUT
LM317LCDR

LM317LCDR

Vout(V) = Vref (1+R2/R1)

VOUT#2
VOUT#3
VOUT#6

2
3

R813

R813

6

499R

499R

7

0402

R1

C811

C811

1uF_6.3V

1uF_6.3V

R814

R814

1.5K

1.5K

0402

R2

Overlap footprints

C C

LDO1_VIN

R878 0.50RR878 0.50R

1206
Use 2.4R

PWR_GOOD(1,6,15,16)
LDO1_2_EN(15)

LDO #2: Vout = +1.1V +/- 2%
PCB: 50 to 70mm sq. copper area for cooling

+MVDD

R861 1R_1210R861 1R_1210

B B

R860 1R_1210R860 1R_1210
R859 1R_1210R859 1R_1210
R858 1R_1210R858 1R_1210

1210
Use 0.5R

PWR_GOOD(1,6,15,16)
LDO1_2_EN(15)

TP871TP871

TP870TP870

C876

C876

10uF_X6S

10uF_X6S

+5V

C878

C878
1uF_6.3V

1uF_6.3V

PWR_GOOD

U871

U871

1

POK

2

EN

3

VIN
CNTL4REFIN

uP7706U8

uP7706U8

GND#8

VOUT

GND#9

8
7

FB

6
5
9

Vin = +1.5V to 2.0VMAX Iout = 1.7A (TBV) RMS MAX

C856

C856

TP851TP851

+5V

TP850TP850

U851

U851

PWR_GOOD

1

POK

GND#8

2

EN

3

VIN

VOUT

CNTL4REFIN

GND#9

uP7706U8

C858

C858
1uF_6.3V

1uF_6.3V

uP7706U8

LDO2_VIN

10uF_X6S

10uF_X6S

+1.8V_LDO1

R875

R875
12K4

12K4

LDO1_FB

DNI

VOUT = Vref x (1 + R5/R4)

8
7

FB

6
5

DNI

9

+1.1V

R874

R874
10K

10K

0402

0.1%

LDO2_FB

R5

R855

R855

3.92K

3.92K

R854

R854
10K

10K

0.1%

R4

R5

C875

C875
33pF_50V

33pF_50V

C3

R4

+1.8V_LDO1

C855

C855
33pF_50V

33pF_50V

C3

+1.1V

C871

C871

C874

C874

10uF_X6S

10uF_X6S

100nF

C851

C851
10uF_X6S

10uF_X6S

100nF

C854

C854
100nF

100nF

DNIDNI

DNIDNI

VOUT = Vref x (1 + R5/R4)

+1.8V+MVDD

R8690RR869
0R

THIS RESISTOR IS FOR
CURRENT MEASUREMENT

+12V_BUS

1206

1/4W

5%

Overlap footprints

C830

C830
100nF

100nF

0603
16V

+5V_VESA +5V

If using diode stuff a 470 or 680 on R382

Place D861 inside

MR8320RMR832
0R

0805

1/8W

5%

MU830 or U830

U830

U830

1

VIN

5

NC

8

NC#8
ADJ4VOUT

LM317LCDR

LM317LCDR

+5V+5V

VOUT#2
VOUT#3
VOUT#6

Vout(V) = Vref (1+R2/R1)

+5V

2
3

R833

R833

6

499R

499R

7

0402

R1

C831

C831

1uF_6.3V

1uF_6.3V

R834

R834

1.5K

1.5K

0402

R2

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

8

7

6

5

4

3

RH RV730 DDR2 DVIII-TVO-DVII

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

14 19

of

14 19

of

14 19

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

5

4

3

2

1

(15) Power Management

Power up Sequencing

+12V_BUS

+12V_BUS

D D

+3.3V_BUS

2.2K

2.2K
R680

R680

R6811KR681
1K

R687

R687
10K

10K

R6881KR688
1K

R689

R689

R6971KR697

1K

5.1K

5.1K

R682

R682

5.1K

5.1K

R683 5.1KR683 5.1K

C636

C636

R690 5.1KR690 5.1K

1

Q677

Q677
MMBT3904

MMBT3904

2 3

100nF

Q678

Q678
MMBT3904

MMBT3904

2 3

100nF

1

EN1_N EN1_N

BUS_RAILS_UP_N

VDDC_SHDN_N(16)

BUS_RAILS_UP_N (16)

R6980RR698
0R

EN1VDDC_SHDN_N

EN1 (12)

1

Q679

Q679
MMBT3904

MMBT3904

2 3

PWRCNTL_1 PWRCNTL_0

GPIO_15GPIO_20

0

1

Vout = Vref * (1+Rt/Rb)
VDDC1 (Dual Phase): Vref = 0.6V, Rt = 5.11K
VDDC2 (Single Phase): Vref = 0.8V, Rt = 10K
MVDDC (Single Phase): Vref = 0.8V, Rt = 10K

VDDC Voltage Settings Using GPIOs (for VDDC1 Dual Phase)

Rf1=82.5K Rf2=63.4K

0

10

01

1

0.90V

1.00V

1.03V

1.125V

Power Play

Output Voltage (V)

Rf1=
Rf2=

Rf1=
Rf2=

R1246 0RR1246 0R

Power-up Default

VDDC_FB (12,17)

VDDC Enable Circuit

+3.3V

R1240

R1240
10K

+3.3V

10K

R1241

R1241
10K

10K

C C

B B

+VDDC +12V_BUS

R8411KR841
1K

1

C841

C841
1uF_6.3V

1uF_6.3V

Test cct for low VDDC voltage.
DNI

+MVDD

PWR_GOOD(1,6,14,16)

R843

R843

5.1K

5.1K

5%

Q840

Q840
MMBT3904

MMBT3904

2 3

PWR_GOOD(1,6,14,16)

R844 5.1KR844 5.1K

DNI

R846 5.1KR846 5.1K

+3.3V_BUS

5.1K

5.1K
R845

R845

LDO1_2_EN

Q841

Q841

1

5%

5%

MMBT3904

MMBT3904

2 3

Q842

Q842

1

MMBT3904

MMBT3904

2 3

LDO1_2_EN (14)

MVDD_EN (13,16)

LDOs and MVDD Enable Circuit

Q843

R847 10KR847 10K

C844

C844
1uF_6.3V

1uF_6.3V

Q843

1

MMBT3904

MMBT3904

2 3

+3.3V_BUS +3.3V

+12V_BUS

C842

C842
10uF_X6S

R849

R849
10K

10K

Q844

Q844

MMBT3904

MMBT3904

2 3

10uF_X6S

C843

C843
100NF

100NF

402
X5R
16V

R848

R848
100K

100K

1

3 2

1

Q845

Q845

SI2304DS

SI2304DS

ALL_RAILS_UP (8,9)

PWRCNTL_0(6)

PWRCNTL_1(6)

R1244

R1244

Rf1 Rf2

82.5K

82.5K

32

1

Q1242

Q1242
BSH111

BSH111

R1245

R1245

63.4K

63.4K

Resistors to set the output
voltages for +VDDC and +MVDDC

32

Q1240

Q1240
BSH111

BSH111

1

Rb1

R650

R650

78.7K

78.7K

402
RFB2

Rb

RFB2
R710

R710

6.65K

6.65K

402
1%

MVDDC_FB (13,17)

3.3V Enable Circuit

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

5

4

3

2

RH RV730 DDR2 DVIII-TVO-DVII

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

15 19

of

15 19

of

15 19

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

8

(16) Mechanical and Thermal Management

1 2

R1251 27KR1251 27K

R1250 2.2KR1250 2.2K

R1681

R1681

10.2K

10.2K
PTC_MVDD

PTC2

R1668

R1668
470R_THERMISTOR

470R_THERMISTOR
603

R1688

R1688

10.2K

10.2K
PTC_VDDC

PTC1

R1659

R1659
470_Thermistor

470_Thermistor
603

+TSVDD

C365

GND_TSVSS

R12551KR1255
1K

C365

1uF_6.3V

1uF_6.3V

Overlap cap pair
foorprints

C366

C366

100nF_6.3V

100nF_6.3V

+3.3V_BUS

C367

C367

R12560RR1256
0R

C1252

C1252

4.7uF_6.3V

4.7uF_6.3V

VDDC, MVDD Thermal Protection

+3.3V_BUS

-

-

LM2903PWR

LM2903PWR

2

+5V

+

+

C1630

C1630

R1684

R1684

R1683

R1683

10.2K

10.2K

4.75K

4.75K

3

VREF_PTC

C1628

C1628
10nF_25V

10nF_25V

6
5

VREF_PTC

8 4

-

-

LM2903PWR

LM2903PWR

+

+

U1607B

U1607B

U1607A

U1607A

220nF

220nF

C1629

C1629

220nF

220nF

+1.8V

B119 BLM15BD121SN1B119 BLM15BD121SN1

D D

NS8 NS_VIANS8 NS_VIA

BUS_RAILS_UP_N(15)

C C

PERST#_buf(1,2)

GPIO_19_CTF(6)

B B

+5V

+5V

7

AJ32

10nF

10nF

AJ33

+3.3V_BUS

R1252

R1252

5.1K

5.1K

Q1256

Q1256

1

BSH111

BSH111

2 3

Q1250

Q1250

1

MMBT3904

MMBT3904

2 3

C1627

C1627

C1626

C1626

100nF

100nF

100nF

100nF

1

PTC_II

R1682

R1682

33K

33K

PTC_I

Table 5

7

>= Themal shutdown temp (R>=4.7K)
< Themal shutdown temp (R < 4.7K)

6

U1O

U1O

PART 15 OF 15

PART 15 OF 15

TSVDD

T

T

TSVSS

RV730 PRO A11 HF MVE SLT B1

RV730 PRO A11 HF MVE SLT B1

DMINUS

S

S
S

S

F

F
D

D
O

O

TS_FDO

DPLUS

AF29

AG29

AK32

GPU_DPLUS

GPU_DMINUS

TS_FDO

PWM(17)

+3.3V

R4032

R4032

2.61K

2.61K
R4007 1KR4007 1K

C4004

C4004

2.2nF_50V

2.2nF_50V

GPU_DPLUS (17)

GPU_DMINUS (17)

R4019 0RR4019 0R

Warning: TS_FDO is not 5V tolerant. MAX sink current 1.65mA

If Critical Temperature is reached this will force the fan to run at full
speed while power is removed from GPU & rest of the board.

+3.3V_BUS

C1250

C1250
100nF_6.3V

100nF_6.3V

2

1

Place caps very
close to power pin

R1686 0RR1686 0R

R1687 0RR1687 0R

PTC Themal Protection

PTC

D

C

This is an open collector signal. Active level is hard pull down to ground.

U1250

U1250

8

7

NC7SZ74K8X

NC7SZ74K8X

LED_ON

5

Q

PR

Vcc

R1259 2.2KR1259 2.2K

3

Q

G4CL

6

CTF_SHDN(17)

PTC

- Place PTC1, PTC2
close to VDDC
MOSFET

- Place PTC3, PTC4
close to MVDD

R1257

R1257
100K

100K

THEM_PRT

Low

Hi

LED_ON (17)

CTF_SHDN

RV730Pro_Fansink

RV730Pro_Fansink

R1260 1KR1260 1K

R1261 1KR1261 1K

R1262 1KR1262 1K

H2A

H2A

2345678

1

Share one pad b/w
R4019 and R4034

DNI

H2B

H2B

9

10111213141516

RV730Pro_Fansink

RV730Pro_Fansink

5

+12V_BUS

PWM_b(17)

1

1

1

+VDDC_Source

B4002

B4002

26R_600mA

26R_600mA

PWM_rPWM

1

PWM_b

Q1253

Q1253
MMBT3904

MMBT3904

2 3

Q1251

Q1251
MMBT3904

MMBT3904

2 3

Q1254

Q1254
MMBT3904

MMBT3904

2 3

H2C

H2C

17181920212223

RV730Pro_Fansink

RV730Pro_Fansink

+12V_BUS

PWM_b

Q4001

Q4001

MMBT3904

MMBT3904

2 3

VDDC_SHDN_N (15)

PWR_GOOD (1,6,14,15)

MVDD_EN (13,15)

H2D

H2D

25262728293031

24

RV730Pro_Fansink

RV730Pro_Fansink

FAN_POWER

0805
16V

32

4

Overlap footprints

C4103

C4103
1uF_16V

1uF_16V

DVI/DVI SCREWS with top tab

+12V_BUS

R4101

R4101

21

5.1K

5.1K
D4101

D4101
BAT54KFILM

BAT54KFILM

R4102

R4102

6.8K

6.8K

overlap
footprints for
D4101 and
MD4101

+12V_BUS

R40171KR4017
1K

1%

R4016

R4016

22.1K

22.1K

1%

For 4-WIRE FAN ONLY

3

FANOUT_P

FANOUT_N

C4100

C4100
100nF

100nF

+12V_BUS

Pfb

805
16V
Y5V

+3.3V_BUS +3.3V_BUS

DNI

PWM

Fan Control (New)

+12V_BUS+12V_BUS

R41051KR4105
1K

23

1

C4102

C4102
1uF

1uF

R41061KR4106
1K

23

Q4102

Q4102

1

MMBT3906

MMBT3906

Q4101

Q4101

Pfb Nfb

MMBT3906

MMBT3906

Fan Control (Legacy)

FAN_POWER

+12V_BUS

DNI

402

GPIO_6_TACH(6,17)

DNI (bypass for fan
with 3.3V PWM)

2

FAN_POWER FANOUT_P

R4014 0RR4014 0R

R4107 820RR4107 820R

DNI

Vdiff

1

4

Q4103

Q4103

3 2

PBSS4350Z

PBSS4350Z

FAN_VE

R41100RR4110
0R

FANOUT_N

For 2-WIRE FAN ONLY

FANOUT_P
FANOUT_N

DNI

GPIO_6_TACH

+12V_BUS

DNI

Header is 2mm, and
it does not follow

2.54mm spacing as 4-pin
PWM Fan Specification

FAN_POWER

Overlap MJ4030 and J4030

1

MJ4030MJ4030

1
2

ASSY-SCREW2

A A

ASSY-SCREW5

ASSY-SCREW5

SCREW

SCREW
SCREW, PAN HD, PHILLIPS, 4-40 X 3/16L

DNI

SCREW, PAN HD, PHILLIPS, 4-40 X 3/16L

PCB1

PCB1

109-B66831-00A

109-B66831-00A

8

ASSY-SCREW1

ASSY-SCREW1

PCB

PCB

ASSY-SCREW2

SCREW

SCREW

SCREW
JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT
<3rd part field>

<3rd part field>

ASSY2

ASSY2

8020038600G

8020038600G

SCREW
JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT
<3rd part field>

<3rd part field>

MT1

MT1
MT_Hole_0.136_in.

MT_Hole_0.136_in.

BRACKET

BRACKET

7

Need New Bracket

MT2

MT2
MT_Hole_0.136_in_6VIA

MT_Hole_0.136_in_6VIA

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

6

5

4

3

RH RV730 DDR2 DVIII-TVO-DVII

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

16 19

of

16 19

of

16 19

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

5

(17) Debug Circuits

4

3

2

1

TR2 0RTR2 0R

Place it at top edge of the

D D

C C

board on the bottom side.

+3.3V

TC1

TC1

JTAG_MODE(1)

100nF_6.3V

100nF_6.3V

In production, this block
will not be populated.

Mating connector: 6010028300G
(HEADER 2X8 1.27MM PITCH, SMD)
When attaching the daughter card (B176) align it by mounting hole.

JTAG_TCK(1)
JTAG_TMS(1)
JTAG_TDI(1)
JTAG_TDO(1)

DDC6CLK(6)

DDC6DATA(6)

GPIO_17_ThermINT(6)

LED_ON

LED_ON(16)

GENERICA

DNI

BUO
TJ1

TJ1

2

1

JTAG_MODEJTAG_MODE

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO

+3.3V+3.3V +3.3V

R114

R114

4.7K

4.7K

Not intended for production

4

3

6

5

8

7

10

9

12

11

14

13

16

15

2X8SOCKET

2X8SOCKET

R4003

R4003

R115

R115

10K

10K

4.7K

4.7K

LED off shows the fault

+3.3V_BUS

TR1257

TR1257

1

2.2K

2.2K

TP30

TP30
35mil

35mil

TR1256

TR1256
499R

499R

TQ1250

TQ1250
MMBT3904

MMBT3904

2 3
21

TD1250TD1250

TP31

TP31
35mil

35mil

GPIO_8_T
ROMCSb_T
GPIO_9_T
GPIO_10_T
SDA
SCL

R4001100R R4001100R
R4002100R R4002100R
R40080R R40080R

For wire soldering

EXT_ADJ_1.8V

100pF_50V

100pF_50V

SCL_R
SDA_R

ThermINT

GENERICA (6,7)

Place TRP1 & TR2 in a way
to minimize the stub when
they are not populated.

GPIO_8_R

TRP1D33R TRP1D33R

54

GPIO_22_ROMCSb_R

TRP1C33R TRP1C33R

63

GPIO_9_R

TRP1B33R TRP1B33R

72

GPIO_10_R

TRP1A33R TRP1A33R

81

+3.3V

C4002

C4002

C4003

C4003

Bypass Switch
(not for production)

3 2

1uF_6.3V

1uF_6.3V

U4001

U4001

8

SMBCLK

7

SMBDAT

6

ALERT
GND5PWM

LM63CIMAX

LM63CIMAX

SW3B

SW3B
DIP_SWX2

DIP_SWX2

C4001

C4001

10uF_X6S

10uF_X6S

4 1

VDD

SW3A

SW3A
DIP_SWX2

DIP_SWX2

D+

D-

GPIO_8_R (6)
GPIO_22_ROMCSb_R (6)
GPIO_9_R (6)
GPIO_10_R (6)

1

GPU_DPLUS

2

GPU_DMINUS

3
4

GPIO_6_TACH(6,16)

TACH Connection is for testing
and RPM measurement only

CTF_SHDN (16)

TP4001

TP4001

35mil

35mil

TP4002

TP4002

35mil

35mil

GPU_DPLUS (16)
GPU_DMINUS (16)

GPIO_6_TACH

C4030

C4030
10nF

10nF

DNI

TC2

TC2
100nF_6.3V

100nF_6.3V

R4004

R4004

13.3K

13.3K

+3.3V+5V

TR3

TR3

4.7K

4.7K

+3.3V

DNI For Production

TR4

TR4

4.7K

4.7K
BUOBUO

DNI

SW4A

SW4A

DIP_SWX2

DIP_SWX2

41

SDA (6)

SCL (6)

PWMLM63_PWM

PWM (16)

PWM_B

PWM_b (16)

32

SW4B

SW4B
DIP_SWX2

DIP_SWX2

DNI For Production

GPIO_0

GPIO_0(6)

GPIO_1

GPIO_1(6)

GPIO_2

GPIO_2(6)

GPIO_7

GPIO_7(6)

DDC6DATA(6)

DDC6CLK(6)

DDC6DATA
DDC6CLK

+3.3V_BUS

DCC to control VDDC1 and MVDD Voltage.

For Testing purposes only

R1202

R1202

1.8R

1.8R

SW1A

SW1A

DIP_SWX2

DIP_SWX2
SW1B

SW1B

DIP_SWX2

DIP_SWX2
SW2A

SW2A

DIP_SWX2

DIP_SWX2
SW2B

SW2B

DIP_SWX2

DIP_SWX2

DNI

DNI

C1201

C1201
10uF

10uF

41

32

41

32

R1200

R1200
200R

200R
R1201

R1201
200R

200R

C1200

C1200
100nF_6.3V

100nF_6.3V

NR153 2.2KNR153 2.2K

1
2

9

13

15

3

+3.3V

U1200

U1200

SDA
SCL
A111NC#12
A0

VCC

EPAD
GND

DS4402

DS4402

OUT0
OUT1

NC#14

NC#4
NC#5

GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)
0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)

GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable)
0 : Default. (Driver Controlled Gen2)
1 : Strap Controlled Gen2

CUR_ADJ_0

8

CUR_ADJ_1

10
12
14

4
5
6

FS1

7

FS0

R1203

R1203
127K

127K
R1204

R1204

63.4K

63.4K

R1205 0RR1205 0R

R1206 0RR1206 0R

1 - NTSC TVO0 - PAL TVO TV OUT STANDARD

VDDC_FB (12,15)

MVDDC_FB (13,15)

B B

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

5

4

3

2

RH RV730 DDR2 DVIII-TVO-DVII

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008

Sheet

Sheet

Sheet

of

17 19

of

17 19

of

17 19

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

07

07

07

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

5

4

3

2

1

MEMORY CHANNEL A

DDR2 4pcs 32Mx16 (256MB)

D D

Chnl A Chnl B

Debug

POWER REGULATORS

From +12V

+VDDC, VDDCI,
SPV10, +MVDD

From +12V LINEAR:

C C

+5V, +5V_VESA,

From +12V DIRECT:

FAN

From +MVDD Linear (1.1V):

PCIE_VDDC, DPLL_VDDC,
DPx_VDD10

From +3.3V Direct:

VDDR3,

From 3.3V Linear (1.8V)

VDDR4, VDDR5, VDD_CT,
TSVDD, PCIE_VDDR,
PCIE_PVDD, DPLL_PVDD,
VDD1DI, AVDD, DPx_PVDD

CrossFire
Interlink
Header

FAN

Connector

Straps

BIOS

Speed control
& temperature
sense

Built-in PWM

INTERRUPT
Temp. Sensing

Dynamic VDDC

CrossFire

DVOCLK
DVPCNTL_[0..2]
DVPDATA[23:0]
DVP_MVP_CNTL[1:0]
GPIO[2:1]
GENERICB, C, D

GPIO

ROM

Thermal

DDC6

GPIO17, GPIO6
D+/D-

TS_FDO

GPIO15, GPIO20

POWER DELIVERY

+PCIE_SOURCE

B B

+3.3V

3.3V_BUS
delayed circuit

SMPS Enable
Circuit

+12V_BUS

Temperature Critical

RV730

CTF

PCI-Express

DAC1

CRT2

H/VSync

TMDPCD

TMDPC

HPD2
DDC5

DAC2

Y,C
COMP

XTALIN

XTALOUT

TMDPAB

DL TMDS

HPD1

DAC2

CRT2

H/VSync

DDC4

MEMORY CHANNEL B

DDR2 4pcs 32Mx16 (256MB)

AC Coupling Caps

AC Coupling Caps

Oscillator

XTAL

AC Coupling Caps

RBG Filters

RBG Filters

Pull Downs

Pull Downs

DVI_1 &
Slim-VGA

Connector

HPD2

5V_VESA

TV out
Connector

HPD1

DVI-I
Slim-VGA
Connector

5V_VESA

&

+3.3V_BUS
+12V_BUS

PCI-Express Bus

RH PCIE RV730 2x256MB DDR2
DVII TVO DVII FH

REV 0

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII

RH RV730 DDR2 DVIII-TVO-DVII

5

4

3

2

RH RV730 DDR2 DVIII-TVO-DVII

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, July 25, 2008

Friday, July 25, 2008

Friday, July 25, 2008
18 19

18 19

18 19

Sheet

Sheet

Sheet

of

of

of

1

Doc No.

Doc No.

Doc No.

07

07

07

RevDate:

RevDate:

RevDate:

102-B66801-00

102-B66801-00

102-B66801-00

www.vinafix.vn

5

Title

Title

Title

RH RV730 DDR2 DVIII-TVO-DVII Friday, July 25, 2008

RH RV730 DDR2 DVIII-TVO-DVII Friday, July 25, 2008

RH RV730 DDR2 DVIII-TVO-DVII Friday, July 25, 2008

REVISION HISTORY

REVISION HISTORY

REVISION HISTORY

D D

Sch

Sch

Sch

Rev

Rev

Rev

C C

PCB

PCB

PCB

Rev

Rev

Rev

0

00A

1

00

Date

Date

Date

08/05/26

08/07/21

Initial design for RV730 DDR2, DVII TVO DVII

Release to Rev 00
Moved the fan tack pull up after the divider.
Added optional zener to the 5V regulator.

4

NOTE:

NOTE:

NOTE:

3

102-B66801-00

102-B66801-00

102-B66801-00

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.
For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.

For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.

For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.
Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

REVISION DESCRIPTION

REVISION DESCRIPTION

REVISION DESCRIPTION

2

Date:Schematic No.

Date:Schematic No.

Date:Schematic No.

1

Rev

Rev

Rev

07

07

07

B B

A A

5

4

3

2

1

www.vinafix.vn